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Differential D143573

AMDGPU/MC: Add assembler tests for v2f32 and v2b32 with imm operand
ClosedPublic

Authored by Petar.Avramovic on Feb 8 2023, 4:58 AM.

Details

Reviewers
dp
Commits
rG524c89e837ec: AMDGPU/MC: Add assembler tests for v2f32 and v2b32 with imm operand
Summary

Add test coverage for https://github.com/llvm/llvm-project/issues/60563.
D142636 introduced a bug: incorrect disassembly of floating point inline
constants for v_pk_mov_b32, v_pk_add_f32, v_pk_mul_f32 and v_pk_fma_f32.
Precommit for D143574.

Diff Detail

Event Timeline

Petar.Avramovic created this revision.Feb 8 2023, 4:58 AM
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Herald added subscribers: kosarev, kerbowa, tpr and 4 others. · View Herald Transcript
Petar.Avramovic requested review of this revision.Feb 8 2023, 4:58 AM
Herald added a project: Restricted Project. · View Herald TranscriptFeb 8 2023, 4:58 AM
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Harbormaster completed remote builds in B212579: Diff 495806.Feb 8 2023, 6:14 AM
dp added inline comments.Feb 8 2023, 7:49 AM
llvm/test/MC/Disassembler/AMDGPU/gfx90a_features.txt
54

It is unusual to add invalid tests with the purpose of fixing them in a separate patch.
At a minimum, I think you should mention this in the description and make these patches dependent (stacked). Or they could be merged.
Aside from that, both patches look good, thanks.

Petar.Avramovic edited the summary of this revision. (Show Details)Feb 8 2023, 8:11 AM
Petar.Avramovic added a child revision: D143574: AMDGPU/MC: Fix decoders for VSrc_v2b32 and VSrc_v2f32 RegisterOperands.
dp accepted this revision.Feb 8 2023, 8:15 AM
This revision is now accepted and ready to land.Feb 8 2023, 8:15 AM
Closed by commit rG524c89e837ec: AMDGPU/MC: Add assembler tests for v2f32 and v2b32 with imm operand (authored by Petar.Avramovic). · Explain WhyFeb 9 2023, 3:17 AM
This revision was automatically updated to reflect the committed changes.
Petar.Avramovic added a commit: rG524c89e837ec: AMDGPU/MC: Add assembler tests for v2f32 and v2b32 with imm operand.

Revision Contents

PathSize
llvm/
test/
MC/
AMDGPU/
20 lines
Disassembler/
AMDGPU/
15 lines

Diff 496067

llvm/test/MC/AMDGPU/gfx90a_asm_features.s

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// GFX90A: v_pk_fma_f32 v[8:9], v[0:1], s[0:1], v[4:5] clamp ; encoding: [0x08,0xc0,0xb0,0xd3,0x00,0x01,0x10,0x1c] // GFX90A: v_pk_fma_f32 v[8:9], v[0:1], s[0:1], v[4:5] clamp ; encoding: [0x08,0xc0,0xb0,0xd3,0x00,0x01,0x10,0x1c]
v_pk_fma_f32 v[8:9], v[0:1], s[0:1], v[4:5] clamp v_pk_fma_f32 v[8:9], v[0:1], s[0:1], v[4:5] clamp
// NOT-GFX90A: :[[@LINE+2]]:{{[0-9]+}}: error: instruction not supported on this GPU // NOT-GFX90A: :[[@LINE+2]]:{{[0-9]+}}: error: instruction not supported on this GPU
// GFX90A: v_pk_fma_f32 v[0:1], v[4:5], v[8:9], v[16:17] ; encoding: [0x00,0x40,0xb0,0xd3,0x04,0x11,0x42,0x1c] // GFX90A: v_pk_fma_f32 v[0:1], v[4:5], v[8:9], v[16:17] ; encoding: [0x00,0x40,0xb0,0xd3,0x04,0x11,0x42,0x1c]
v_pk_fma_f32 v[0:1], v[4:5], v[8:9], v[16:17] v_pk_fma_f32 v[0:1], v[4:5], v[8:9], v[16:17]
// NOT-GFX90A: :[[@LINE+2]]:{{[0-9]+}}: error: instruction not supported on this GPU // NOT-GFX90A: :[[@LINE+2]]:{{[0-9]+}}: error: instruction not supported on this GPU
// GFX90A: v_pk_fma_f32 v[0:1], v[2:3], v[4:5], 1.0 ; encoding: [0x00,0x40,0xb0,0xd3,0x02,0x09,0xca,0x1b]
v_pk_fma_f32 v[0:1], v[2:3], v[4:5], 1.0
// NOT-GFX90A: :[[@LINE+2]]:{{[0-9]+}}: error: instruction not supported on this GPU
// GFX90A: v_pk_mul_f32 v[254:255], v[8:9], v[16:17] ; encoding: [0xfe,0x40,0xb1,0xd3,0x08,0x21,0x02,0x18] // GFX90A: v_pk_mul_f32 v[254:255], v[8:9], v[16:17] ; encoding: [0xfe,0x40,0xb1,0xd3,0x08,0x21,0x02,0x18]
v_pk_mul_f32 v[254:255], v[8:9], v[16:17] v_pk_mul_f32 v[254:255], v[8:9], v[16:17]
// NOT-GFX90A: :[[@LINE+2]]:{{[0-9]+}}: error: instruction not supported on this GPU // NOT-GFX90A: :[[@LINE+2]]:{{[0-9]+}}: error: instruction not supported on this GPU
// GFX90A: v_pk_mul_f32 v[4:5], v[254:255], v[16:17] ; encoding: [0x04,0x40,0xb1,0xd3,0xfe,0x21,0x02,0x18] // GFX90A: v_pk_mul_f32 v[4:5], v[254:255], v[16:17] ; encoding: [0x04,0x40,0xb1,0xd3,0xfe,0x21,0x02,0x18]
v_pk_mul_f32 v[4:5], v[254:255], v[16:17] v_pk_mul_f32 v[4:5], v[254:255], v[16:17]
// NOT-GFX90A: :[[@LINE+2]]:{{[0-9]+}}: error: instruction not supported on this GPU // NOT-GFX90A: :[[@LINE+2]]:{{[0-9]+}}: error: instruction not supported on this GPU
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// GFX90A: v_pk_mul_f32 v[4:5], v[8:9], v[16:17] neg_hi:[1,1] ; encoding: [0x04,0x43,0xb1,0xd3,0x08,0x21,0x02,0x18] // GFX90A: v_pk_mul_f32 v[4:5], v[8:9], v[16:17] neg_hi:[1,1] ; encoding: [0x04,0x43,0xb1,0xd3,0x08,0x21,0x02,0x18]
v_pk_mul_f32 v[4:5], v[8:9], v[16:17] neg_hi:[1,1] v_pk_mul_f32 v[4:5], v[8:9], v[16:17] neg_hi:[1,1]
// NOT-GFX90A: :[[@LINE+2]]:{{[0-9]+}}: error: instruction not supported on this GPU // NOT-GFX90A: :[[@LINE+2]]:{{[0-9]+}}: error: instruction not supported on this GPU
// GFX90A: v_pk_mul_f32 v[4:5], v[8:9], v[16:17] clamp ; encoding: [0x04,0xc0,0xb1,0xd3,0x08,0x21,0x02,0x18] // GFX90A: v_pk_mul_f32 v[4:5], v[8:9], v[16:17] clamp ; encoding: [0x04,0xc0,0xb1,0xd3,0x08,0x21,0x02,0x18]
v_pk_mul_f32 v[4:5], v[8:9], v[16:17] clamp v_pk_mul_f32 v[4:5], v[8:9], v[16:17] clamp
// NOT-GFX90A: :[[@LINE+2]]:{{[0-9]+}}: error: instruction not supported on this GPU // NOT-GFX90A: :[[@LINE+2]]:{{[0-9]+}}: error: instruction not supported on this GPU
// GFX90A: v_pk_mul_f32 v[0:1], v[2:3], 1.0 ; encoding: [0x00,0x40,0xb1,0xd3,0x02,0xe5,0x01,0x18]
v_pk_mul_f32 v[0:1], v[2:3], 1.0
// NOT-GFX90A: :[[@LINE+2]]:{{[0-9]+}}: error: instruction not supported on this GPU
// GFX90A: v_pk_add_f32 v[254:255], v[8:9], v[16:17] ; encoding: [0xfe,0x40,0xb2,0xd3,0x08,0x21,0x02,0x18] // GFX90A: v_pk_add_f32 v[254:255], v[8:9], v[16:17] ; encoding: [0xfe,0x40,0xb2,0xd3,0x08,0x21,0x02,0x18]
v_pk_add_f32 v[254:255], v[8:9], v[16:17] v_pk_add_f32 v[254:255], v[8:9], v[16:17]
// NOT-GFX90A: :[[@LINE+2]]:{{[0-9]+}}: error: instruction not supported on this GPU // NOT-GFX90A: :[[@LINE+2]]:{{[0-9]+}}: error: instruction not supported on this GPU
// GFX90A: v_pk_add_f32 v[4:5], v[254:255], v[16:17] ; encoding: [0x04,0x40,0xb2,0xd3,0xfe,0x21,0x02,0x18] // GFX90A: v_pk_add_f32 v[4:5], v[254:255], v[16:17] ; encoding: [0x04,0x40,0xb2,0xd3,0xfe,0x21,0x02,0x18]
v_pk_add_f32 v[4:5], v[254:255], v[16:17] v_pk_add_f32 v[4:5], v[254:255], v[16:17]
// NOT-GFX90A: :[[@LINE+2]]:{{[0-9]+}}: error: instruction not supported on this GPU // NOT-GFX90A: :[[@LINE+2]]:{{[0-9]+}}: error: instruction not supported on this GPU
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// GFX90A: v_pk_add_f32 v[4:5], v[8:9], v[16:17] neg_hi:[1,1] ; encoding: [0x04,0x43,0xb2,0xd3,0x08,0x21,0x02,0x18] // GFX90A: v_pk_add_f32 v[4:5], v[8:9], v[16:17] neg_hi:[1,1] ; encoding: [0x04,0x43,0xb2,0xd3,0x08,0x21,0x02,0x18]
v_pk_add_f32 v[4:5], v[8:9], v[16:17] neg_hi:[1,1] v_pk_add_f32 v[4:5], v[8:9], v[16:17] neg_hi:[1,1]
// NOT-GFX90A: :[[@LINE+2]]:{{[0-9]+}}: error: instruction not supported on this GPU // NOT-GFX90A: :[[@LINE+2]]:{{[0-9]+}}: error: instruction not supported on this GPU
// GFX90A: v_pk_add_f32 v[4:5], v[8:9], v[16:17] clamp ; encoding: [0x04,0xc0,0xb2,0xd3,0x08,0x21,0x02,0x18] // GFX90A: v_pk_add_f32 v[4:5], v[8:9], v[16:17] clamp ; encoding: [0x04,0xc0,0xb2,0xd3,0x08,0x21,0x02,0x18]
v_pk_add_f32 v[4:5], v[8:9], v[16:17] clamp v_pk_add_f32 v[4:5], v[8:9], v[16:17] clamp
// NOT-GFX90A: :[[@LINE+2]]:{{[0-9]+}}: error: instruction not supported on this GPU // NOT-GFX90A: :[[@LINE+2]]:{{[0-9]+}}: error: instruction not supported on this GPU
// GFX90A: v_pk_add_f32 v[0:1], v[2:3], 1.0 ; encoding: [0x00,0x40,0xb2,0xd3,0x02,0xe5,0x01,0x18]
v_pk_add_f32 v[0:1], v[2:3], 1.0
// NOT-GFX90A: :[[@LINE+2]]:{{[0-9]+}}: error: instruction not supported on this GPU
// GFX90A: v_pk_mov_b32 v[0:1], v[2:3], v[4:5] ; encoding: [0x00,0x40,0xb3,0xd3,0x02,0x09,0x02,0x18] // GFX90A: v_pk_mov_b32 v[0:1], v[2:3], v[4:5] ; encoding: [0x00,0x40,0xb3,0xd3,0x02,0x09,0x02,0x18]
v_pk_mov_b32 v[0:1], v[2:3], v[4:5] v_pk_mov_b32 v[0:1], v[2:3], v[4:5]
// GFX90A: v_pk_mov_b32 v[0:1], flat_scratch, v[4:5] ; encoding: [0x00,0x40,0xb3,0xd3,0x66,0x08,0x02,0x18] // GFX90A: v_pk_mov_b32 v[0:1], flat_scratch, v[4:5] ; encoding: [0x00,0x40,0xb3,0xd3,0x66,0x08,0x02,0x18]
// NOT-GFX90A: :[[@LINE+1]]:{{[0-9]+}}: error: instruction not supported on this GPU // NOT-GFX90A: :[[@LINE+1]]:{{[0-9]+}}: error: instruction not supported on this GPU
v_pk_mov_b32 v[0:1], flat_scratch, v[4:5] v_pk_mov_b32 v[0:1], flat_scratch, v[4:5]
// NOT-GFX90A: :[[@LINE+2]]:{{[0-9]+}}: error: instruction not supported on this GPU // NOT-GFX90A: :[[@LINE+2]]:{{[0-9]+}}: error: instruction not supported on this GPU
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// GFX90A: v_pk_mov_b32 v[0:1], v[2:3], v[4:5] op_sel:[1,0] ; encoding: [0x00,0x48,0xb3,0xd3,0x02,0x09,0x02,0x18] // GFX90A: v_pk_mov_b32 v[0:1], v[2:3], v[4:5] op_sel:[1,0] ; encoding: [0x00,0x48,0xb3,0xd3,0x02,0x09,0x02,0x18]
v_pk_mov_b32 v[0:1], v[2:3], v[4:5] op_sel:[1,0] v_pk_mov_b32 v[0:1], v[2:3], v[4:5] op_sel:[1,0]
// NOT-GFX90A: :[[@LINE+2]]:{{[0-9]+}}: error: instruction not supported on this GPU // NOT-GFX90A: :[[@LINE+2]]:{{[0-9]+}}: error: instruction not supported on this GPU
// GFX90A: v_pk_mov_b32 v[0:1], v[2:3], v[4:5] op_sel:[1,1] ; encoding: [0x00,0x58,0xb3,0xd3,0x02,0x09,0x02,0x18] // GFX90A: v_pk_mov_b32 v[0:1], v[2:3], v[4:5] op_sel:[1,1] ; encoding: [0x00,0x58,0xb3,0xd3,0x02,0x09,0x02,0x18]
v_pk_mov_b32 v[0:1], v[2:3], v[4:5] op_sel:[1,1] v_pk_mov_b32 v[0:1], v[2:3], v[4:5] op_sel:[1,1]
// NOT-GFX90A: :[[@LINE+2]]:{{[0-9]+}}: error: instruction not supported on this GPU // NOT-GFX90A: :[[@LINE+2]]:{{[0-9]+}}: error: instruction not supported on this GPU
// GFX90A: v_pk_mov_b32 v[0:1], v[2:3], 4 ; encoding: [0x00,0x40,0xb3,0xd3,0x02,0x09,0x01,0x18]
v_pk_mov_b32 v[0:1], v[2:3], 4
// NOT-GFX90A: :[[@LINE+2]]:{{[0-9]+}}: error: instruction not supported on this GPU
// GFX90A: v_pk_mov_b32 v[0:1], v[2:3], 2.0 ; encoding: [0x00,0x40,0xb3,0xd3,0x02,0xe9,0x01,0x18]
v_pk_mov_b32 v[0:1], v[2:3], 2.0
// NOT-GFX90A: :[[@LINE+2]]:{{[0-9]+}}: error: instruction not supported on this GPU
// GFX90A: buffer_wbl2 ; encoding: [0x00,0x00,0xa0,0xe0,0x00,0x00,0x00,0x00] // GFX90A: buffer_wbl2 ; encoding: [0x00,0x00,0xa0,0xe0,0x00,0x00,0x00,0x00]
buffer_wbl2 buffer_wbl2
// NOT-GFX90A: :[[@LINE+2]]:{{[0-9]+}}: error: instruction not supported on this GPU // NOT-GFX90A: :[[@LINE+2]]:{{[0-9]+}}: error: instruction not supported on this GPU
// GFX90A: buffer_invl2 ; encoding: [0x00,0x00,0xa4,0xe0,0x00,0x00,0x00,0x00] // GFX90A: buffer_invl2 ; encoding: [0x00,0x00,0xa4,0xe0,0x00,0x00,0x00,0x00]
buffer_invl2 buffer_invl2
// NOT-GFX90A: :[[@LINE+2]]:{{[0-9]+}}: error: instruction not supported on this GPU // NOT-GFX90A: :[[@LINE+2]]:{{[0-9]+}}: error: instruction not supported on this GPU
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llvm/test/MC/Disassembler/AMDGPU/gfx90a_features.txt

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0x08,0x44,0xb0,0xd3,0x00,0x01,0x10,0x1c 0x08,0x44,0xb0,0xd3,0x00,0x01,0x10,0x1c
# GFX90A: v_pk_fma_f32 v[8:9], v[0:1], s[0:1], v[4:5] clamp ; encoding: [0x08,0xc0,0xb0,0xd3,0x00,0x01,0x10,0x1c] # GFX90A: v_pk_fma_f32 v[8:9], v[0:1], s[0:1], v[4:5] clamp ; encoding: [0x08,0xc0,0xb0,0xd3,0x00,0x01,0x10,0x1c]
0x08,0xc0,0xb0,0xd3,0x00,0x01,0x10,0x1c 0x08,0xc0,0xb0,0xd3,0x00,0x01,0x10,0x1c
# GFX90A: v_pk_fma_f32 v[0:1], v[4:5], v[8:9], v[16:17] ; encoding: [0x00,0x40,0xb0,0xd3,0x04,0x11,0x42,0x1c] # GFX90A: v_pk_fma_f32 v[0:1], v[4:5], v[8:9], v[16:17] ; encoding: [0x00,0x40,0xb0,0xd3,0x04,0x11,0x42,0x1c]
0x00,0x40,0xb0,0xd3,0x04,0x11,0x42,0x1c 0x00,0x40,0xb0,0xd3,0x04,0x11,0x42,0x1c
# GFX90A: v_pk_fma_f32 v[0:1], v[2:3], v[4:5], 0 ; encoding: [0x00,0x40,0xb0,0xd3,0x02,0x09,0x02,0x1a]
dpUnsubmitted
Not Done
ReplyInline Actions

It is unusual to add invalid tests with the purpose of fixing them in a separate patch.
At a minimum, I think you should mention this in the description and make these patches dependent (stacked). Or they could be merged.
Aside from that, both patches look good, thanks.

dp: It is unusual to add invalid tests with the purpose of fixing them in a separate patch. At a…
0x00,0x40,0xb0,0xd3,0x02,0x09,0xca,0x1b
# GFX90A: v_pk_mul_f32 v[254:255], v[8:9], v[16:17] ; encoding: [0xfe,0x40,0xb1,0xd3,0x08,0x21,0x02,0x18] # GFX90A: v_pk_mul_f32 v[254:255], v[8:9], v[16:17] ; encoding: [0xfe,0x40,0xb1,0xd3,0x08,0x21,0x02,0x18]
0xfe,0x00,0xb1,0xd3,0x08,0x21,0x02,0x18 0xfe,0x00,0xb1,0xd3,0x08,0x21,0x02,0x18
# GFX90A: v_pk_mul_f32 v[4:5], v[254:255], v[16:17] ; encoding: [0x04,0x40,0xb1,0xd3,0xfe,0x21,0x02,0x18] # GFX90A: v_pk_mul_f32 v[4:5], v[254:255], v[16:17] ; encoding: [0x04,0x40,0xb1,0xd3,0xfe,0x21,0x02,0x18]
0x04,0x00,0xb1,0xd3,0xfe,0x21,0x02,0x18 0x04,0x00,0xb1,0xd3,0xfe,0x21,0x02,0x18
# GFX90A: v_pk_mul_f32 v[4:5], s[2:3], v[16:17] ; encoding: [0x04,0x40,0xb1,0xd3,0x02,0x20,0x02,0x18] # GFX90A: v_pk_mul_f32 v[4:5], s[2:3], v[16:17] ; encoding: [0x04,0x40,0xb1,0xd3,0x02,0x20,0x02,0x18]
0x04,0x00,0xb1,0xd3,0x02,0x20,0x02,0x18 0x04,0x00,0xb1,0xd3,0x02,0x20,0x02,0x18
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0x04,0x02,0xb1,0xd3,0x08,0x21,0x02,0x18 0x04,0x02,0xb1,0xd3,0x08,0x21,0x02,0x18
# GFX90A: v_pk_mul_f32 v[4:5], v[8:9], v[16:17] neg_hi:[1,1] ; encoding: [0x04,0x43,0xb1,0xd3,0x08,0x21,0x02,0x18] # GFX90A: v_pk_mul_f32 v[4:5], v[8:9], v[16:17] neg_hi:[1,1] ; encoding: [0x04,0x43,0xb1,0xd3,0x08,0x21,0x02,0x18]
0x04,0x03,0xb1,0xd3,0x08,0x21,0x02,0x18 0x04,0x03,0xb1,0xd3,0x08,0x21,0x02,0x18
# GFX90A: v_pk_mul_f32 v[4:5], v[8:9], v[16:17] clamp ; encoding: [0x04,0xc0,0xb1,0xd3,0x08,0x21,0x02,0x18] # GFX90A: v_pk_mul_f32 v[4:5], v[8:9], v[16:17] clamp ; encoding: [0x04,0xc0,0xb1,0xd3,0x08,0x21,0x02,0x18]
0x04,0x80,0xb1,0xd3,0x08,0x21,0x02,0x18 0x04,0x80,0xb1,0xd3,0x08,0x21,0x02,0x18
# GFX90A: v_pk_mul_f32 v[0:1], v[2:3], 0 ; encoding: [0x00,0x40,0xb1,0xd3,0x02,0x01,0x01,0x18]
0x00,0x40,0xb1,0xd3,0x02,0xe5,0x01,0x18
# GFX90A: v_pk_add_f32 v[254:255], v[8:9], v[16:17] ; encoding: [0xfe,0x40,0xb2,0xd3,0x08,0x21,0x02,0x18] # GFX90A: v_pk_add_f32 v[254:255], v[8:9], v[16:17] ; encoding: [0xfe,0x40,0xb2,0xd3,0x08,0x21,0x02,0x18]
0xfe,0x00,0xb2,0xd3,0x08,0x21,0x02,0x18 0xfe,0x00,0xb2,0xd3,0x08,0x21,0x02,0x18
# GFX90A: v_pk_add_f32 v[4:5], v[254:255], v[16:17] ; encoding: [0x04,0x40,0xb2,0xd3,0xfe,0x21,0x02,0x18] # GFX90A: v_pk_add_f32 v[4:5], v[254:255], v[16:17] ; encoding: [0x04,0x40,0xb2,0xd3,0xfe,0x21,0x02,0x18]
0x04,0x00,0xb2,0xd3,0xfe,0x21,0x02,0x18 0x04,0x00,0xb2,0xd3,0xfe,0x21,0x02,0x18
# GFX90A: v_pk_add_f32 v[4:5], s[2:3], v[16:17] ; encoding: [0x04,0x40,0xb2,0xd3,0x02,0x20,0x02,0x18] # GFX90A: v_pk_add_f32 v[4:5], s[2:3], v[16:17] ; encoding: [0x04,0x40,0xb2,0xd3,0x02,0x20,0x02,0x18]
0x04,0x00,0xb2,0xd3,0x02,0x20,0x02,0x18 0x04,0x00,0xb2,0xd3,0x02,0x20,0x02,0x18
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0x04,0x02,0xb2,0xd3,0x08,0x21,0x02,0x18 0x04,0x02,0xb2,0xd3,0x08,0x21,0x02,0x18
# GFX90A: v_pk_add_f32 v[4:5], v[8:9], v[16:17] neg_hi:[1,1] ; encoding: [0x04,0x43,0xb2,0xd3,0x08,0x21,0x02,0x18] # GFX90A: v_pk_add_f32 v[4:5], v[8:9], v[16:17] neg_hi:[1,1] ; encoding: [0x04,0x43,0xb2,0xd3,0x08,0x21,0x02,0x18]
0x04,0x03,0xb2,0xd3,0x08,0x21,0x02,0x18 0x04,0x03,0xb2,0xd3,0x08,0x21,0x02,0x18
# GFX90A: v_pk_add_f32 v[4:5], v[8:9], v[16:17] clamp ; encoding: [0x04,0xc0,0xb2,0xd3,0x08,0x21,0x02,0x18] # GFX90A: v_pk_add_f32 v[4:5], v[8:9], v[16:17] clamp ; encoding: [0x04,0xc0,0xb2,0xd3,0x08,0x21,0x02,0x18]
0x04,0x80,0xb2,0xd3,0x08,0x21,0x02,0x18 0x04,0x80,0xb2,0xd3,0x08,0x21,0x02,0x18
# GFX90A: v_pk_add_f32 v[0:1], v[2:3], 0 ; encoding: [0x00,0x40,0xb2,0xd3,0x02,0x01,0x01,0x18]
0x00,0x40,0xb2,0xd3,0x02,0xe5,0x01,0x18
# GFX90A: v_pk_mov_b32 v[0:1], v[2:3], v[4:5] ; encoding: [0x00,0x40,0xb3,0xd3,0x02,0x09,0x02,0x18] # GFX90A: v_pk_mov_b32 v[0:1], v[2:3], v[4:5] ; encoding: [0x00,0x40,0xb3,0xd3,0x02,0x09,0x02,0x18]
0x00,0x00,0xb3,0xd3,0x02,0x09,0x02,0x18 0x00,0x00,0xb3,0xd3,0x02,0x09,0x02,0x18
# GFX90A: v_pk_mov_b32 v[0:1], flat_scratch, v[4:5] ; encoding: [0x00,0x40,0xb3,0xd3,0x66,0x08,0x02,0x18] # GFX90A: v_pk_mov_b32 v[0:1], flat_scratch, v[4:5] ; encoding: [0x00,0x40,0xb3,0xd3,0x66,0x08,0x02,0x18]
0x00,0x00,0xb3,0xd3,0x66,0x08,0x02,0x18 0x00,0x00,0xb3,0xd3,0x66,0x08,0x02,0x18
# GFX90A: v_pk_mov_b32 v[0:1], v[2:3], vcc ; encoding: [0x00,0x40,0xb3,0xd3,0x02,0xd5,0x00,0x18] # GFX90A: v_pk_mov_b32 v[0:1], v[2:3], vcc ; encoding: [0x00,0x40,0xb3,0xd3,0x02,0xd5,0x00,0x18]
0x00,0x00,0xb3,0xd3,0x02,0xd5,0x00,0x18 0x00,0x00,0xb3,0xd3,0x02,0xd5,0x00,0x18
# GFX90A: v_pk_mov_b32 v[0:1], v[2:3], s[0:1] ; encoding: [0x00,0x40,0xb3,0xd3,0x02,0x01,0x00,0x18] # GFX90A: v_pk_mov_b32 v[0:1], v[2:3], s[0:1] ; encoding: [0x00,0x40,0xb3,0xd3,0x02,0x01,0x00,0x18]
0x00,0x00,0xb3,0xd3,0x02,0x01,0x00,0x18 0x00,0x00,0xb3,0xd3,0x02,0x01,0x00,0x18
# GFX90A: v_pk_mov_b32 v[0:1], v[2:3], v[4:5] op_sel_hi:[0,1] ; encoding: [0x00,0x40,0xb3,0xd3,0x02,0x09,0x02,0x10] # GFX90A: v_pk_mov_b32 v[0:1], v[2:3], v[4:5] op_sel_hi:[0,1] ; encoding: [0x00,0x40,0xb3,0xd3,0x02,0x09,0x02,0x10]
0x00,0x00,0xb3,0xd3,0x02,0x09,0x02,0x10 0x00,0x00,0xb3,0xd3,0x02,0x09,0x02,0x10
# GFX90A: v_pk_mov_b32 v[0:1], v[2:3], v[4:5] op_sel:[1,0] ; encoding: [0x00,0x48,0xb3,0xd3,0x02,0x09,0x02,0x18] # GFX90A: v_pk_mov_b32 v[0:1], v[2:3], v[4:5] op_sel:[1,0] ; encoding: [0x00,0x48,0xb3,0xd3,0x02,0x09,0x02,0x18]
0x00,0x08,0xb3,0xd3,0x02,0x09,0x02,0x18 0x00,0x08,0xb3,0xd3,0x02,0x09,0x02,0x18
# GFX90A: v_pk_mov_b32 v[0:1], v[2:3], v[4:5] op_sel:[1,1] ; encoding: [0x00,0x58,0xb3,0xd3,0x02,0x09,0x02,0x18] # GFX90A: v_pk_mov_b32 v[0:1], v[2:3], v[4:5] op_sel:[1,1] ; encoding: [0x00,0x58,0xb3,0xd3,0x02,0x09,0x02,0x18]
0x00,0x18,0xb3,0xd3,0x02,0x09,0x02,0x18 0x00,0x18,0xb3,0xd3,0x02,0x09,0x02,0x18
# GFX90A: v_pk_mov_b32 v[0:1], v[2:3], 4 ; encoding: [0x00,0x40,0xb3,0xd3,0x02,0x09,0x01,0x18]
0x00,0x40,0xb3,0xd3,0x02,0x09,0x01,0x18
# GFX90A: v_pk_mov_b32 v[0:1], v[2:3], 0 ; encoding: [0x00,0x40,0xb3,0xd3,0x02,0x01,0x01,0x18]
0x00,0x40,0xb3,0xd3,0x02,0xe9,0x01,0x18
# GFX90A: buffer_wbl2 ; encoding: [0x00,0x00,0xa0,0xe0,0x00,0x00,0x00,0x00] # GFX90A: buffer_wbl2 ; encoding: [0x00,0x00,0xa0,0xe0,0x00,0x00,0x00,0x00]
0x00,0x00,0xa0,0xe0,0x00,0x00,0x00,0x00 0x00,0x00,0xa0,0xe0,0x00,0x00,0x00,0x00
# GFX90A: buffer_invl2 ; encoding: [0x00,0x00,0xa4,0xe0,0x00,0x00,0x00,0x00] # GFX90A: buffer_invl2 ; encoding: [0x00,0x00,0xa4,0xe0,0x00,0x00,0x00,0x00]
0x00,0x00,0xa4,0xe0,0x00,0x00,0x00,0x00 0x00,0x00,0xa4,0xe0,0x00,0x00,0x00,0x00
# GFX90A: buffer_atomic_add_f64 v[4:5], off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x3c,0xe1,0x00,0x04,0x02,0x03] # GFX90A: buffer_atomic_add_f64 v[4:5], off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x3c,0xe1,0x00,0x04,0x02,0x03]
0xff,0x0f,0x3c,0xe1,0x00,0x04,0x02,0x03 0xff,0x0f,0x3c,0xe1,0x00,0x04,0x02,0x03
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