[mlir] support unsigned int in mlir::spirv::ConstantOp::getAsmResultNames

[python3kgae]

Summary

Fixes #60184 https://github.com/llvm/llvm-project/issues/60184

[antiagainst]

mlir/test/Conversion/PDLToPDLInterp/pdl-to-pdl-interp-uint.mlir

1

This test should actually be added into mlir/test/Dialect/SPIRV/IR/asm-op-interface.mlir?

[antiagainst]

mlir/test/Conversion/PDLToPDLInterp/pdl-to-pdl-interp-uint.mlir

1

I pushed a fix for this https://github.com/llvm/llvm-project/commit/b41eb9601cf1aa6e33eedbb1c923b8ed0dcdcd42

[python3kgae]

mlir/test/Conversion/PDLToPDLInterp/pdl-to-pdl-interp-uint.mlir

1

Thanks for fix.

mlir/lib/Dialect/SPIRV/IR/SPIRVOps.cpp

void mlir::spirv::ConstantOp::getAsmResultNames(
 
   if (IntegerAttr intCst = getValue().dyn_cast<IntegerAttr>()) {
     if (intTy && intTy.getWidth() == 1) {
       return setNameFn(getResult(), (intCst.getInt() ? "true" : "false"));
     }
 
     if (intTy.isSignless()) {
       specialName << intCst.getInt();
+    } else if (intTy.isUnsigned()) {
+      specialName << intCst.getUInt();
     } else {
       specialName << intCst.getSInt();
     }
   }
 
   if (intTy || type.isa<FloatType>()) {
     specialName << '_' << type;
   }

mlir/test/Conversion/PDLToPDLInterp/pdl-to-pdl-interp-uint.mlir

+// RUN: mlir-opt -split-input-file -convert-pdl-to-pdl-interp %s | FileCheck %s
+
+// CHECK:spirv.func @func()
+// CHECK-NEXT:%cst0_ui8 = spirv.Constant 0 : ui8
+spirv.func @func() -> () "None" { 
+  %5 = spirv.Constant 0 : ui8  
+  spirv.Return
+}