[DebugInfo] Store instr-ref/DBG_VALUE mode of a MachineFunction in a member variable

[jmorse]

Summary

Currently, CodeGen passes like LiveDebugValues work out whether DBG_INSTR_REF or DBG_VALUE instructions are being used for variable locations by examining the current optimisation level, and other attributes of the function. The assumption is that, by examining the function and optimisation level, you can work out later which flavour was used. Unfortunately this isn't always true, as reported in https://github.com/llvm/llvm-project/issues/57997 , things like opt-bisect-limit break this assumption because the optimisation level can change. When it does, the result is usually assertion failures.

To fix this, make "instruction referencing" an attribute of a MachineFunction -- it's simplest to just store whether or not the function was generated with DBG_INSTR_REF or not in a Boolean, and use that flag as the source-of-truth, rather than try to hack around this any further. This patch adds that flag to the MachineFunction (and MIR) parser, and adds the flag to the existing instruction referencing tests. As a result of this, we can un-plumb some flags out of SelectionDAG/FastISel that effectively implement the same thing. It still makes sense for InstrEmitter to hold a local copy of the are-we-using-instr-ref-flag as it checks it quite frequently.

The test changes are unremarkable; however this change means we can't feed the same MIR into both flavours of LiveDebugValues and expect to get legitimate outputs. As a result, I've duplicated three tests, to have instr-ref and DBG_VALUE versions:

• entry-value-of-modified-param.mir
• kill-entry-value-after-diamond-bbs.mir
• live-debug-values-bad-transfer.mir

Additionally there are two tests where I've just deleted the RUN lines for DBG_VALUE-behaviours and not duplicated the test:

• single-assign-propagation.mir: this test is checking that a performance-optimisation in InstrRefBasedLDV actually behaves correctly, there's nothing interesting about the way it passes through VarLocsBasedLDV. The DBG_VALUE-based check lines were only in there to provide a comparison with how VarLocBasedLDV behaved, I don't believe we actually need to be testing them.
• stack-coloring-dbg-phi.mir: this test exists because stack coloring changed codegen when it saw DBG_PHI instructions, it doesn't actually need a DBG_VALUE run line.

(retitled as this got submitted 5 seconds too early X_X)

[Orlando]

Looking at other MF flags this seems reasonable. LGTM plus some nits.

llvm/lib/CodeGen/MIRPrinter.cpp

217

nit: I think it would make sense to move this to line 203, underneath YamlMF.HasEHFunclets = MF.hasEHFunclets();

llvm/test/DebugInfo/MIR/InstrRef/stack-coloring-dbg-phi.mir

6–11

nit: out of date comment

llvm/test/DebugInfo/MIR/X86/entry-value-of-modified-param.mir

27–28

Possibly worth either deleting the VARLOCLDV check and/or mentioning in both tests that they're clones other than the RUN lines (same for other duplicated tests). YMMV.

[jmorse]

Apply review comments; I've also had an attack of conscience, and added some more check lines:

• llvm/test/DebugInfo/x86/instr-ref-flag.ll -- check that the MIR function key gets produced with true or false values, according to the command line flags,
• llvm/test/DebugInfo/MIR/InstrRef/instr-ref-roundtrip.mir -- check that the flag makes its way from the input to the output.

[Orlando]

Still LGTM

llvm/test/DebugInfo/MIR/X86/live-debug-values-bad-transfer.mir

10

smallest of nits: missing full stop (only mentioning as it's inconsistent with the other changes!).

llvm/include/llvm/CodeGen/FastISel.h

protected:
   MIMetadata MIMD;
   const TargetMachine &TM;
   const DataLayout &DL;
   const TargetInstrInfo &TII;
   const TargetLowering &TLI;
   const TargetRegisterInfo &TRI;
   const TargetLibraryInfo *LibInfo;
   bool SkipTargetIndependentISel;
-  bool UseInstrRefDebugInfo = false;
 
   /// The position of the last instruction for materializing constants
   /// for use in the current block. It resets to EmitStartPt when it makes sense
   /// (for example, it's usually profitable to avoid function calls between the
   /// definition and the use)
   MachineInstr *LastLocalValue = nullptr;
 
   /// The top most instruction in the current block that is allowed for
public:
 
   /// Prepare InsertPt to begin inserting instructions into the local
   /// value area and return the old insert position.
   SavePoint enterLocalValueArea();
 
   /// Reset InsertPt to the given old insert position.
   void leaveLocalValueArea(SavePoint Old);
 
-  /// Signal whether instruction referencing variable locations are desired for
-  /// this function's debug-info.
-  void useInstrRefDebugInfo(bool Flag) {
-    UseInstrRefDebugInfo = Flag;
-  }
-
 protected:
   explicit FastISel(FunctionLoweringInfo &FuncInfo,
                     const TargetLibraryInfo *LibInfo,
                     bool SkipTargetIndependentISel = false);
 
   /// This method is called by target-independent code when the normal
   /// FastISel process fails to select an instruction. This gives targets a
   /// chance to emit code for anything that doesn't fit into FastISel's

llvm/include/llvm/CodeGen/MIRYamlMapping.h

struct MachineFunction {
   bool CallsEHReturn = false;
   bool CallsUnwindInit = false;
   bool HasEHCatchret = false;
   bool HasEHScopes = false;
   bool HasEHFunclets = false;
 
   bool FailsVerification = false;
   bool TracksDebugUserValues = false;
+  bool UseDebugInstrRef = false;
   std::vector<VirtualRegisterDefinition> VirtualRegisters;
   std::vector<MachineFunctionLiveIn> LiveIns;
   std::optional<std::vector<FlowStringValue>> CalleeSavedRegisters;
   // TODO: Serialize the various register masks.
   // Frame information
   MachineFrameInfo FrameInfo;
   std::vector<FixedMachineStackObject> FixedStackObjects;
   std::vector<MachineStackObject> StackObjects;
static void mapping(IO &YamlIO, MachineFunction &MF) {
     YamlIO.mapOptional("tracksRegLiveness", MF.TracksRegLiveness, false);
     YamlIO.mapOptional("hasWinCFI", MF.HasWinCFI, false);
 
     YamlIO.mapOptional("callsEHReturn", MF.CallsEHReturn, false);
     YamlIO.mapOptional("callsUnwindInit", MF.CallsUnwindInit, false);
     YamlIO.mapOptional("hasEHCatchret", MF.HasEHCatchret, false);
     YamlIO.mapOptional("hasEHScopes", MF.HasEHScopes, false);
     YamlIO.mapOptional("hasEHFunclets", MF.HasEHFunclets, false);
+    YamlIO.mapOptional("debugInstrRef", MF.UseDebugInstrRef, false);
 
     YamlIO.mapOptional("failsVerification", MF.FailsVerification, false);
     YamlIO.mapOptional("tracksDebugUserValues", MF.TracksDebugUserValues,
                        false);
     YamlIO.mapOptional("registers", MF.VirtualRegisters,
                        std::vector<VirtualRegisterDefinition>());
     YamlIO.mapOptional("liveins", MF.LiveIns,
                        std::vector<MachineFunctionLiveIn>());

llvm/include/llvm/CodeGen/MachineFunction.h

public:
     DebugPHIRegallocPos(MachineBasicBlock *MBB, Register Reg, unsigned SubReg)
         : MBB(MBB), Reg(Reg), SubReg(SubReg) {}
   };
 
   /// Map of debug instruction numbers to the position of their PHI instructions
   /// during register allocation. See DebugPHIRegallocPos.
   DenseMap<unsigned, DebugPHIRegallocPos> DebugPHIPositions;
 
+  /// Flag for whether this function contains DBG_VALUEs (false) or
+  /// DBG_INSTR_REF (true).
+  bool UseDebugInstrRef = false;
+
   /// Create a substitution between one <instr,operand> value to a different,
   /// new value.
   void makeDebugValueSubstitution(DebugInstrOperandPair, DebugInstrOperandPair,
                                   unsigned SubReg = 0);
 
   /// Create substitutions for any tracked values in \p Old, to point at
   /// \p New. Needed when we re-create an instruction during optimization,
   /// which has the same signature (i.e., def operands in the same place) but
public:
 
   /// Finalise any partially emitted debug instructions. These are DBG_INSTR_REF
   /// instructions where we only knew the vreg of the value they use, not the
   /// instruction that defines that vreg. Once isel finishes, we should have
   /// enough information for every DBG_INSTR_REF to point at an instruction
   /// (or DBG_PHI).
   void finalizeDebugInstrRefs();
 
-  /// Returns true if the function's variable locations should be tracked with
+  /// Determine whether, in the current machine configuration, we should use
+  /// instruction referencing or not.
+  bool shouldUseDebugInstrRef() const;
+
+  /// Returns true if the function's variable locations are tracked with
   /// instruction referencing.
   bool useDebugInstrRef() const;
 
+  /// Set whether this function will use instruction referencing or not.
+  void setUseDebugInstrRef(bool UseInstrRef);
+
   /// A reserved operand number representing the instructions memory operand,
   /// for instructions that have a stack spill fused into them.
   const static unsigned int DebugOperandMemNumber;
 
   MachineFunction(Function &F, const LLVMTargetMachine &Target,
                   const TargetSubtargetInfo &STI, unsigned FunctionNum,
                   MachineModuleInfo &MMI);
   MachineFunction(const MachineFunction &) = delete;

llvm/include/llvm/CodeGen/SelectionDAG.h

class SelectionDAG {
 
   /// PersistentId counter to be used when inserting the next
   /// SDNode to this SelectionDAG. We do not place that under
   /// `#if LLVM_ENABLE_ABI_BREAKING_CHECKS` intentionally because
   /// it adds unneeded complexity without noticeable
   /// benefits (see discussion with @thakis in D120714).
   uint16_t NextPersistentId = 0;
 
-  /// Are instruction referencing variable locations desired for this function?
-  bool UseInstrRefDebugInfo = false;
-
 public:
   /// Clients of various APIs that cause global effects on
   /// the DAG can optionally implement this interface.  This allows the clients
   /// to handle the various sorts of updates that happen.
   ///
   /// A DAGUpdateListener automatically registers itself with DAG when it is
   /// constructed, and removes itself when destroyed in RAII fashion.
   struct DAGUpdateListener {
public:
   SDDbgInfo::DbgLabelIterator DbgLabelEnd() const {
     return DbgInfo->DbgLabelEnd();
   }
 
   /// To be invoked on an SDNode that is slated to be erased. This
   /// function mirrors \c llvm::salvageDebugInfo.
   void salvageDebugInfo(SDNode &N);
 
-  /// Signal whether instruction referencing variable locations are desired for
-  /// this function's debug-info.
-  void useInstrRefDebugInfo(bool Flag) {
-    UseInstrRefDebugInfo = Flag;
-  }
-
-  bool getUseInstrRefDebugInfo() const {
-    return UseInstrRefDebugInfo;
-  }
-
   void dump() const;
 
   /// In most cases this function returns the ABI alignment for a given type,
   /// except for illegal vector types where the alignment exceeds that of the
   /// stack. In such cases we attempt to break the vector down to a legal type
   /// and return the ABI alignment for that instead.
   Align getReducedAlign(EVT VT, bool UseABI);
 

llvm/include/llvm/CodeGen/SelectionDAGISel.h

public:
   AAResults *AA = nullptr;
   AssumptionCache *AC = nullptr;
   GCFunctionInfo *GFI = nullptr;
   CodeGenOpt::Level OptLevel;
   const TargetInstrInfo *TII;
   const TargetLowering *TLI;
   bool FastISelFailed;
   SmallPtrSet<const Instruction *, 4> ElidedArgCopyInstrs;
-  bool UseInstrRefDebugInfo = false;
 
   /// Current optimization remark emitter.
   /// Used to report things like combines and FastISel failures.
   std::unique_ptr<OptimizationRemarkEmitter> ORE;
 
   explicit SelectionDAGISel(char &ID, TargetMachine &tm,
                             CodeGenOpt::Level OL = CodeGenOpt::Default);
   ~SelectionDAGISel() override;

llvm/lib/CodeGen/MIRParser/MIRParser.cpp

for (auto &MI : MBB)
       MaxInstrNum = std::max((unsigned)MI.peekDebugInstrNum(), MaxInstrNum);
   MF.setDebugInstrNumberingCount(MaxInstrNum);
 
   // Load any substitutions.
   for (const auto &Sub : YamlMF.DebugValueSubstitutions) {
     MF.makeDebugValueSubstitution({Sub.SrcInst, Sub.SrcOp},
                                   {Sub.DstInst, Sub.DstOp}, Sub.Subreg);
   }
+
+  // Flag for whether we're supposed to be using DBG_INSTR_REF.
+  MF.setUseDebugInstrRef(YamlMF.UseDebugInstrRef);
 }
 
 bool
 MIRParserImpl::initializeMachineFunction(const yaml::MachineFunction &YamlMF,
                                          MachineFunction &MF) {
   // TODO: Recreate the machine function.
   if (Target) {
     // Avoid clearing state if we're using the same subtarget again.

llvm/lib/CodeGen/MIRPrinter.cpp

void MIRPrinter::print(const MachineFunction &MF) {
   YamlMF.ExposesReturnsTwice = MF.exposesReturnsTwice();
   YamlMF.HasWinCFI = MF.hasWinCFI();
 
   YamlMF.CallsEHReturn = MF.callsEHReturn();
   YamlMF.CallsUnwindInit = MF.callsUnwindInit();
   YamlMF.HasEHCatchret = MF.hasEHCatchret();
   YamlMF.HasEHScopes = MF.hasEHScopes();
   YamlMF.HasEHFunclets = MF.hasEHFunclets();
+  YamlMF.UseDebugInstrRef = MF.useDebugInstrRef();
 
   YamlMF.Legalized = MF.getProperties().hasProperty(
       MachineFunctionProperties::Property::Legalized);
   YamlMF.RegBankSelected = MF.getProperties().hasProperty(
       MachineFunctionProperties::Property::RegBankSelected);
   YamlMF.Selected = MF.getProperties().hasProperty(
       MachineFunctionProperties::Property::Selected);
   YamlMF.FailedISel = MF.getProperties().hasProperty(
       MachineFunctionProperties::Property::FailedISel);
   YamlMF.FailsVerification = MF.getProperties().hasProperty(
       MachineFunctionProperties::Property::FailsVerification);
   YamlMF.TracksDebugUserValues = MF.getProperties().hasProperty(
       MachineFunctionProperties::Property::TracksDebugUserValues);
 
   convert(YamlMF, MF.getRegInfo(), MF.getSubtarget().getRegisterInfo());
   MachineModuleSlotTracker MST(&MF);
   MST.incorporateFunction(MF.getFunction());
   convert(MST, YamlMF.FrameInfo, MF.getFrameInfo());
   convertStackObjects(YamlMF, MF, MST);
   convertCallSiteObjects(YamlMF, MF, MST);
   for (const auto &Sub : MF.DebugValueSubstitutions) {
     const auto &SubSrc = Sub.Src;

llvm/lib/CodeGen/MachineFunction.cpp

for (auto &MI : MBB) {
       }
 
       if (!IsValidRef)
         MakeUndefDbgValue(MI);
     }
   }
 }
 
-bool MachineFunction::useDebugInstrRef() const {
+bool MachineFunction::shouldUseDebugInstrRef() const {
   // Disable instr-ref at -O0: it's very slow (in compile time). We can still
   // have optimized code inlined into this unoptimized code, however with
   // fewer and less aggressive optimizations happening, coverage and accuracy
   // should not suffer.
   if (getTarget().getOptLevel() == CodeGenOpt::None)
     return false;
 
   // Don't use instr-ref if this function is marked optnone.
   if (F.hasFnAttribute(Attribute::OptimizeNone))
     return false;
 
   if (llvm::debuginfoShouldUseDebugInstrRef(getTarget().getTargetTriple()))
     return true;
 
   return false;
 }
 
+bool MachineFunction::useDebugInstrRef() const {
+  return UseDebugInstrRef;
+}
+
+void MachineFunction::setUseDebugInstrRef(bool Use) {
+  UseDebugInstrRef = Use;
+}
+
 // Use one million as a high / reserved number.
 const unsigned MachineFunction::DebugOperandMemNumber = 1000000;
 
 /// \}
 
 //===----------------------------------------------------------------------===//
 //  MachineJumpTableInfo implementation
 //===----------------------------------------------------------------------===//

llvm/lib/CodeGen/SelectionDAG/FastISel.cpp

if (!Op && !Address->use_empty() && isa<Instruction>(Address) &&
         (!isa<AllocaInst>(Address) ||
          !FuncInfo.StaticAllocaMap.count(cast<AllocaInst>(Address))))
       Op = MachineOperand::CreateReg(FuncInfo.InitializeRegForValue(Address),
                                      false);
 
     if (Op) {
       assert(DI->getVariable()->isValidLocationForIntrinsic(MIMD.getDL()) &&
              "Expected inlined-at fields to agree");
-      if (UseInstrRefDebugInfo && Op->isReg()) {
+      if (FuncInfo.MF->useDebugInstrRef() && Op->isReg()) {
         // If using instruction referencing, produce this as a DBG_INSTR_REF,
         // to be later patched up by finalizeDebugInstrRefs. Tack a deref onto
         // the expression, we don't have an "indirect" flag in DBG_INSTR_REF.
         SmallVector<uint64_t, 3> Ops(
             {dwarf::DW_OP_LLVM_arg, 0, dwarf::DW_OP_deref});
         auto *NewExpr = DIExpression::prependOpcodes(DI->getExpression(), Ops);
         BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, MIMD.getDL(),
                 TII.get(TargetOpcode::DBG_INSTR_REF), /*IsIndirect*/ false, *Op,
case Intrinsic::dbg_value: {
     } else if (const auto *CF = dyn_cast<ConstantFP>(V)) {
       BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, MIMD, II)
           .addFPImm(CF)
           .addImm(0U)
           .addMetadata(DI->getVariable())
           .addMetadata(DI->getExpression());
     } else if (Register Reg = lookUpRegForValue(V)) {
       // FIXME: This does not handle register-indirect values at offset 0.
-      if (!UseInstrRefDebugInfo) {
+      if (!FuncInfo.MF->useDebugInstrRef()) {
         bool IsIndirect = false;
         BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, MIMD.getDL(), II, IsIndirect,
                 Reg, DI->getVariable(), DI->getExpression());
       } else {
         // If using instruction referencing, produce this as a DBG_INSTR_REF,
         // to be later patched up by finalizeDebugInstrRefs.
         SmallVector<MachineOperand, 1> MOs({MachineOperand::CreateReg(
             /* Reg */ Reg, /* isDef */ false, /* isImp */ false,

llvm/lib/CodeGen/SelectionDAG/InstrEmitter.h

public:
   MachineBasicBlock *getBlock() { return MBB; }
 
   /// getInsertPos - Return the current insertion position.
   MachineBasicBlock::iterator getInsertPos() { return InsertPos; }
 
   /// InstrEmitter - Construct an InstrEmitter and set it to start inserting
   /// at the given position in the given block.
   InstrEmitter(const TargetMachine &TM, MachineBasicBlock *mbb,
-               MachineBasicBlock::iterator insertpos,
-               bool UseInstrRefDebugInfo);
+               MachineBasicBlock::iterator insertpos);
 
 private:
   void EmitMachineNode(SDNode *Node, bool IsClone, bool IsCloned,
                        DenseMap<SDValue, Register> &VRBaseMap);
   void EmitSpecialNode(SDNode *Node, bool IsClone, bool IsCloned,
                        DenseMap<SDValue, Register> &VRBaseMap);
 };
 } // namespace llvm
 
 #endif

llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp

case ISD::INLINEASM_BR: {
     break;
   }
   }
 }
 
 /// InstrEmitter - Construct an InstrEmitter and set it to start inserting
 /// at the given position in the given block.
 InstrEmitter::InstrEmitter(const TargetMachine &TM, MachineBasicBlock *mbb,
-                           MachineBasicBlock::iterator insertpos,
-                           bool UseInstrRefDebugInfo)
+                           MachineBasicBlock::iterator insertpos)
     : MF(mbb->getParent()), MRI(&MF->getRegInfo()),
       TII(MF->getSubtarget().getInstrInfo()),
       TRI(MF->getSubtarget().getRegisterInfo()),
       TLI(MF->getSubtarget().getTargetLowering()), MBB(mbb),
       InsertPos(insertpos) {
-  EmitDebugInstrRefs = UseInstrRefDebugInfo;
+  EmitDebugInstrRefs = mbb->getParent()->useDebugInstrRef();
 }

llvm/lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp

void ScheduleDAGLinearize::Schedule() {
   }
 
   Sequence.reserve(DAGSize);
   ScheduleNode(DAG->getRoot().getNode());
 }
 
 MachineBasicBlock*
 ScheduleDAGLinearize::EmitSchedule(MachineBasicBlock::iterator &InsertPos) {
-  InstrEmitter Emitter(DAG->getTarget(), BB, InsertPos,
-                       DAG->getUseInstrRefDebugInfo());
+  InstrEmitter Emitter(DAG->getTarget(), BB, InsertPos);
   DenseMap<SDValue, Register> VRBaseMap;
 
   LLVM_DEBUG({ dbgs() << "\n*** Final schedule ***\n"; });
 
   unsigned NumNodes = Sequence.size();
   MachineBasicBlock *BB = Emitter.getBlock();
   for (unsigned i = 0; i != NumNodes; ++i) {
     SDNode *N = Sequence[NumNodes-i-1];

llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp

 }
 
 /// EmitSchedule - Emit the machine code in scheduled order. Return the new
 /// InsertPos and MachineBasicBlock that contains this insertion
 /// point. ScheduleDAGSDNodes holds a BB pointer for convenience, but this does
 /// not necessarily refer to returned BB. The emitter may split blocks.
 MachineBasicBlock *ScheduleDAGSDNodes::
 EmitSchedule(MachineBasicBlock::iterator &InsertPos) {
-  InstrEmitter Emitter(DAG->getTarget(), BB, InsertPos,
-                       DAG->getUseInstrRefDebugInfo());
+  InstrEmitter Emitter(DAG->getTarget(), BB, InsertPos);
   DenseMap<SDValue, Register> VRBaseMap;
   DenseMap<SUnit*, Register> CopyVRBaseMap;
   SmallVector<std::pair<unsigned, MachineInstr*>, 32> Orders;
   SmallSet<Register, 8> Seen;
   bool HasDbg = DAG->hasDebugValues();
 
   // Emit a node, and determine where its first instruction is for debuginfo.
   // Zero, one, or multiple instructions can be created when emitting a node.

llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp

bool SelectionDAGISel::runOnMachineFunction(MachineFunction &mf) {
   assert((!EnableFastISelAbort || TM.Options.EnableFastISel) &&
          "-fast-isel-abort > 0 requires -fast-isel");
 
   const Function &Fn = mf.getFunction();
   MF = &mf;
 
   // Decide what flavour of variable location debug-info will be used, before
   // we change the optimisation level.
-  UseInstrRefDebugInfo = mf.useDebugInstrRef();
-  CurDAG->useInstrRefDebugInfo(UseInstrRefDebugInfo);
+  bool InstrRef = mf.shouldUseDebugInstrRef();
+  mf.setUseDebugInstrRef(InstrRef);
 
   // Reset the target options before resetting the optimization
   // level below.
   // FIXME: This is a horrible hack and should be processed via
   // codegen looking at the optimization level explicitly when
   // it wants to look at it.
   TM.resetTargetOptions(Fn);
   // Reset OptLevel to None for optnone functions.
bool SelectionDAGISel::runOnMachineFunction(MachineFunction &mf) {
 
   DenseMap<unsigned, unsigned> LiveInMap;
   if (!FuncInfo->ArgDbgValues.empty())
     for (std::pair<unsigned, unsigned> LI : RegInfo->liveins())
       if (LI.second)
         LiveInMap.insert(LI);
 
   // Insert DBG_VALUE instructions for function arguments to the entry block.
-  bool InstrRef = MF->useDebugInstrRef();
   for (unsigned i = 0, e = FuncInfo->ArgDbgValues.size(); i != e; ++i) {
     MachineInstr *MI = FuncInfo->ArgDbgValues[e - i - 1];
     assert(MI->getOpcode() != TargetOpcode::DBG_VALUE_LIST &&
            "Function parameters should not be described by DBG_VALUE_LIST.");
     bool hasFI = MI->getDebugOperand(0).isFI();
     Register Reg =
         hasFI ? TRI.getFrameRegister(*MF) : MI->getDebugOperand(0).getReg();
     if (Reg.isPhysical())
if (LDI != LiveInMap.end()) {
         MachineBasicBlock::iterator Pos = CopyUseMI;
         EntryMBB->insertAfter(Pos, NewMI);
       }
     }
   }
 
   // For debug-info, in instruction referencing mode, we need to perform some
   // post-isel maintenence.
-  if (UseInstrRefDebugInfo)
+  if (MF->useDebugInstrRef())
     MF->finalizeDebugInstrRefs();
 
   // Determine if there are any calls in this machine function.
   MachineFrameInfo &MFI = MF->getFrameInfo();
   for (const auto &MBB : *MF) {
     if (MFI.hasCalls() && MF->hasInlineAsm())
       break;
 

 
 void SelectionDAGISel::SelectAllBasicBlocks(const Function &Fn) {
   FastISelFailed = false;
   // Initialize the Fast-ISel state, if needed.
   FastISel *FastIS = nullptr;
   if (TM.Options.EnableFastISel) {
     LLVM_DEBUG(dbgs() << "Enabling fast-isel\n");
     FastIS = TLI->createFastISel(*FuncInfo, LibInfo);
-    if (FastIS)
-      FastIS->useInstrRefDebugInfo(UseInstrRefDebugInfo);
   }
 
   ReversePostOrderTraversal<const Function*> RPOT(&Fn);
 
   // Lower arguments up front. An RPO iteration always visits the entry block
   // first.
   assert(*RPOT.begin() == &Fn.getEntryBlock());
   ++NumEntryBlocks;

llvm/test/CodeGen/X86/dbg-value-superreg-copy2.mir

--- |
   !9 = !DILocation(line: 0, scope: !4)
   !10 = !DILocation(line: 4, column: 22, scope: !11)
   !11 = distinct !DILexicalBlock(scope: !4, file: !1, line: 3, column: 19)
 
 ...
 ---
 name:            foo
 tracksRegLiveness: true
+debugInstrRef: true
 debugValueSubstitutions:
   - { srcinst: 2, srcop: 0, dstinst: 1, dstop: 0, subreg: 2 }
 body:             |
   bb.0:
     %0:gr16_abcd = MOV16ri 1, debug-instr-number 1, debug-location !9
 
   bb.1:
     DBG_INSTR_REF !7, !DIExpression(DW_OP_LLVM_arg, 0), dbg-instr-ref(2, 0), debug-location !9

llvm/test/DebugInfo/MIR/InstrRef/accept-nonlive-reg-phis.mir

--- |
   !36 = !DILocation(line: 8, column: 3, scope: !13)
 
 ...
 ---
 name:            c
 alignment:       16
 tracksRegLiveness: true
 tracksDebugUserValues: true
+debugInstrRef: true
 frameInfo:
   maxAlignment:    4
 machineFunctionInfo: {}
 body:             |
   bb.0.entry:
   
     DBG_PHI $fp0, 3
     DBG_INSTR_REF !17, !DIExpression(DW_OP_LLVM_arg, 0), dbg-instr-ref(3, 0), debug-location !30
     $eax = MOV32ri 0
     RET 0, debug-location !36
 
 ...

llvm/test/DebugInfo/MIR/InstrRef/dbg-phi-subregister-location.mir

--- |
   !12 = !DILocalVariable(name: "baz", arg: 2, scope: !7, file: !1, line: 3, type: !11)
   !13 = !DILocation(line: 0, scope: !7)
 
 ...
 ---
 name:            foo
 alignment:       16
 tracksRegLiveness: true
+debugInstrRef: true
 liveins:
   - { reg: '$edi' }
 frameInfo:
   maxAlignment:    1
   maxCallFrameSize: 0
 debugValueSubstitutions:
   - { srcinst: 2, srcop: 0, dstinst: 1, dstop: 0, subreg: 1 }
 machineFunctionInfo: {}

llvm/test/DebugInfo/MIR/InstrRef/dbg-phis-in-ldv.mir

--- |
   !25 = !DILocation(line: 13, column: 10, scope: !7)
   !26 = !DILocation(line: 13, column: 3, scope: !7)
 
 ...
 ---
 name:            foo
 alignment:       16
 tracksRegLiveness: true
+debugInstrRef: true
 liveins:
   - { reg: '$rdi' }
   - { reg: '$rsi' }
 frameInfo:
   stackSize:       24
   offsetAdjustment: -24
   maxAlignment:    1
   adjustsStack:    true

llvm/test/DebugInfo/MIR/InstrRef/dbg-phis-in-ldv2.mir

--- |
   !19 = distinct !DILexicalBlock(scope: !7, file: !1, line: 8, column: 7)
   !26 = !DILocation(line: 13, column: 3, scope: !7)
 
 ...
 ---
 name:            foo
 alignment:       16
 tracksRegLiveness: true
+debugInstrRef: true
 liveins:
   - { reg: '$rdi' }
   - { reg: '$rsi' }
 frameInfo:
   stackSize:       24
   offsetAdjustment: -24
   maxAlignment:    1
   adjustsStack:    true

llvm/test/DebugInfo/MIR/InstrRef/dbg-phis-merging-in-ldv.mir

--- |
   !30 = !DILocation(line: 17, column: 10, scope: !7)
   !31 = !DILocation(line: 17, column: 3, scope: !7)
 
 ...
 ---
 name:            foo
 alignment:       16
 tracksRegLiveness: true
+debugInstrRef: true
 liveins:
   - { reg: '$rdi' }
   - { reg: '$rsi' }
 frameInfo:
   stackSize:       24
   offsetAdjustment: -24
   maxAlignment:    1
   adjustsStack:    true

llvm/test/DebugInfo/MIR/InstrRef/dbg-phis-with-loops.mir

--- |
   !30 = !DILocation(line: 17, column: 10, scope: !7)
   !31 = !DILocation(line: 17, column: 3, scope: !7)
 
 ...
 ---
 name:            foo
 alignment:       16
 tracksRegLiveness: true
+debugInstrRef: true
 liveins:
   - { reg: '$rdi' }
   - { reg: '$rsi' }
 frameInfo:
   stackSize:       24
   offsetAdjustment: -24
   maxAlignment:    1
   adjustsStack:    true

llvm/test/DebugInfo/MIR/InstrRef/deref-spills-with-size.mir

--- |
   !11 = !DIBasicType(name: "long", size: 64, encoding: DW_ATE_signed)
 
 
 ...
 ---
 name:            _ZNSt5dequeIPN4llvm4LoopESaIS2_EE13_M_insert_auxESt15_Deque_iteratorIS2_RS2_PS2_EmRKS2_
 alignment:       16
 tracksRegLiveness: true
+debugInstrRef: true
 liveins:
   - { reg: '$rdi' }
   - { reg: '$rsi' }
   - { reg: '$rdx' }
 frameInfo:
   stackSize:       48
   offsetAdjustment: -48
   maxAlignment:    8

llvm/test/DebugInfo/MIR/InstrRef/follow-spill-of-indir-value.mir

--- |
   !29 = !{!"Simple C++ TBAA"}
   !30 = !DILocation(line: 12, column: 3, scope: !7)
 
 ...
 ---
 name:            _Z3foo10NonTrivial
 alignment:       16
 tracksRegLiveness: true
+debugInstrRef: true
 tracksDebugUserValues: true
 liveins:
   - { reg: '$rdi' }
 frameInfo:
   stackSize:       48
   offsetAdjustment: -48
   maxAlignment:    8
   maxCallFrameSize: 0

llvm/test/DebugInfo/MIR/InstrRef/follow-spill-of-live-value.mir

--- |
   !7 = !DILocation(line: 1, scope: !3)
   !8 = !DILocalVariable(name: "flannel", scope: !3)
 
 ...
 ---
 name:            _ZNSt5dequeIPN4llvm4LoopESaIS2_EE13_M_insert_auxESt15_Deque_iteratorIS2_RS2_PS2_EmRKS2_
 alignment:       16
 tracksRegLiveness: true
+debugInstrRef: true
 liveins:
   - { reg: '$rdi' }
   - { reg: '$rsi' }
   - { reg: '$rdx' }
 frameInfo:
   stackSize:       48
   offsetAdjustment: -48
   maxAlignment:    8

llvm/test/DebugInfo/MIR/InstrRef/instr-ref-roundtrip.mir

 # RUN: llc %s -march=x86-64 -run-pass=machineverifier -o - -experimental-debug-variable-locations | FileCheck %s
 #
 # REQUIRES: x86-registered-target
 #
+# CHECK: debugInstrRef: true
 # CHECK: MOV64rr $rdi, debug-instr-number 1
 ---
 name: test
 tracksRegLiveness: true
+debugInstrRef: true
 liveins:
   - { reg: '$rdi', virtual-reg: '' }
 body:  |
   bb.0:
   liveins: $rdi, $rax
     $rbp = MOV64rr $rdi, debug-instr-number 1
     dead $rcx = MOV64ri 0
     CMP64ri8 renamable $rax, 1, implicit-def $eflags
     RET64 $rax
 ...

llvm/test/DebugInfo/MIR/InstrRef/livedebugvalues-transfer-variadic-instr-ref.mir

--- |
   !37 = !{}
 
 ...
 ---
 name:            _Z3fooii
 alignment:       16
 tracksRegLiveness: true
 tracksDebugUserValues: true
+debugInstrRef: true
 registers:       []
 liveins:
   - { reg: '$edi', virtual-reg: '' }
   - { reg: '$esi', virtual-reg: '' }
 frameInfo:
   stackSize:       72
   offsetAdjustment: -72
   maxAlignment:    4

llvm/test/DebugInfo/MIR/InstrRef/livedebugvalues_illegal_locs.mir

--- |
   !14 = !{!6, !6}
   !15 = !{!16}
   !16 = !DILocalVariable(name: "myVar", scope: !12, file: !1, line: 7, type: !6)
   !17 = !DILocation(line: 10, scope: !12)
 
 ...
 ---
 name: _Z8bb_to_bb
+debugInstrRef: true
 debugValueSubstitutions:
   - { srcinst: 4, srcop: 0, dstinst: 3, dstop: 0, subreg: 0 }
 body:  |
   bb.0.entry:
     successors: %bb.1, %bb.2
     ; CHECK-LABE: bb.0.entry:
 
     $rax = MOV64ri 1, debug-instr-number 1, debug-location !17

llvm/test/DebugInfo/MIR/InstrRef/livedebugvalues_instrref_tolocs.mir

--- |
   !14 = !{!6, !6}
   !15 = !{!16}
   !16 = !DILocalVariable(name: "myVar", scope: !12, file: !1, line: 7, type: !6)
   !17 = !DILocation(line: 10, scope: !12)
 
 ...
 ---
 name: _Z8bb_to_bb
+debugInstrRef: true
 debugValueSubstitutions:
   - { srcinst: 4, srcop: 0, dstinst: 3, dstop: 0, subreg: 0 }
 body:  |
   bb.0.entry:
     $rax = MOV64ri 1, debug-instr-number 1, debug-location !17
     ; This debug instruction should identify the value as being in $rax.
     DBG_INSTR_REF !16, !DIExpression(DW_OP_LLVM_arg, 0), dbg-instr-ref(1, 0), debug-location !17
     ; CHECK: DBG_VALUE_LIST {{.+}}, $rax

llvm/test/DebugInfo/MIR/InstrRef/livedebugvalues_recover_clobbers.mir

--- |
   !14 = !{!6, !6}
   !15 = !{!16}
   !16 = !DILocalVariable(name: "myVar", scope: !12, file: !1, line: 7, type: !6)
   !17 = !DILocation(line: 10, scope: !12)
 
 ...
 ---
 name: _Z8bb_to_bb
+debugInstrRef: true
 stack:
   - { id: 0, type: spill-slot, offset: -12, size: 4, alignment: 4 }
 body:  |
   bb.0.entry:
     $eax = MOV32ri 0, debug-location !17
     $eax = COPY $ebx
     DBG_VALUE $eax, $noreg, !16, !DIExpression(), debug-location !17
     ;; Over-write eax, we should recover its location as being in ebx.

llvm/test/DebugInfo/MIR/InstrRef/livedebugvalues_stackslot_subregs.mir

--- |
   !9 = !{!2, !2}
   !10 = !{!11}
   !11 = !DILocalVariable(name: "baz", scope: !7, file: !1, line: 7, type: !2)
   !12 = !DILocation(line: 10, scope: !7)
 ...
 ---
 name: test
 tracksRegLiveness: true
+debugInstrRef: true
 liveins:
   - { reg: '$rdi', virtual-reg: '' }
 stack:
   - { id: 0, name: '', type: spill-slot, offset: -16, size: 8, alignment: 8,
       stack-id: default, callee-saved-register: '', callee-saved-restored: true,
       debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
 body:  |
   bb.0:

llvm/test/DebugInfo/MIR/InstrRef/livedebugvalues_subreg_substitutions.mir

--- |
   !9 = !{!2, !2}
   !10 = !{!11}
   !11 = !DILocalVariable(name: "baz", scope: !7, file: !1, line: 7, type: !2)
   !12 = !DILocation(line: 10, scope: !7)
 ...
 ---
 name: test
 tracksRegLiveness: true
+debugInstrRef: true
 liveins:
   - { reg: '$rdi', virtual-reg: '' }
 debugValueSubstitutions:
   - { srcinst: 1, srcop: 0, dstinst: 2, dstop: 0, subreg: 1 } # sub_8bit
   - { srcinst: 2, srcop: 0, dstinst: 3, dstop: 0, subreg: 4 } # sub_16bit
   - { srcinst: 3, srcop: 0, dstinst: 4, dstop: 5, subreg: 6 } # sub_32bit
   # Substitution involving sub_8bit_hi, should land in $ah
   - { srcinst: 5, srcop: 0, dstinst: 6, dstop: 0, subreg: 2 } # sub_8bit_hi

llvm/test/DebugInfo/MIR/InstrRef/memory-operand-folding-tieddef.mir

--- |
   !14 = !DILocalVariable(name: "baz", arg: 2, scope: !7, file: !1, line: 3, type: !11)
   !15 = distinct !DILexicalBlock(scope: !7, file: !1, line: 8, column: 7)
 
 ...
 ---
 name:            _ZNK4llvm5APInt5magicEv
 alignment:       16
 tracksRegLiveness: true
+debugInstrRef: true
 registers:
   - { id: 0, class: gr64 }
   - { id: 1, class: gr32 }
   - { id: 2, class: gr64 }
   - { id: 3, class: gr32 }
   - { id: 4, class: gr64 }
   - { id: 5, class: gr32 }
   - { id: 6, class: gr32 }

llvm/test/DebugInfo/MIR/InstrRef/memory-operand-folding.mir

--- |
   !14 = !DILocalVariable(name: "baz", arg: 2, scope: !7, file: !1, line: 3, type: !11)
   !15 = distinct !DILexicalBlock(scope: !7, file: !1, line: 8, column: 7)
 
 
 ...
 ---
 name: beans
 tracksRegLiveness: True
+debugInstrRef: true
 body: |
   bb.0:
     liveins: $edi
     %7:gr32 = COPY $edi
     CMP32ri8 %7, 4, implicit-def $eflags
     %0:gr8 = SETCCr 4, implicit $eflags, debug-instr-number 1
 
     ; clobber all registers to force a spill/reload
     INLINEASM &nop, 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $rax, 12 /* clobber */, implicit-def dead early-clobber $rbx, 12 /* clobber */, implicit-def dead early-clobber $rcx, 12 /* clobber */, implicit-def dead early-clobber $rdx, 12 /* clobber */, implicit-def dead early-clobber $rsi, 12 /* clobber */, implicit-def dead early-clobber $rdi, 12 /* clobber */, implicit-def dead early-clobber $rbp, 12 /* clobber */, implicit-def dead early-clobber $r8, 12 /* clobber */, implicit-def dead early-clobber $r9, 12 /* clobber */, implicit-def dead early-clobber $r10, 12 /* clobber */, implicit-def dead early-clobber $r11, 12 /* clobber */, implicit-def dead early-clobber $r12, 12 /* clobber */, implicit-def dead early-clobber $r13, 12 /* clobber */, implicit-def dead early-clobber $r14, 12 /* clobber */, implicit-def dead early-clobber $r15
 
     $al = COPY %0
     RET 0, $al
 ...

llvm/test/DebugInfo/MIR/InstrRef/memory-operand-load-folding.mir

--- |
   !15 = !{}
   !16 = !DIBasicType(name: "char", size: 8, encoding: DW_ATE_signed_char)
   !17 = !DILocation(line: 0, scope: !7)
 
 ...
 ---
 name:            foo
 tracksRegLiveness: true
+debugInstrRef: true
 registers:
   - { id: 0, class: gr32, preferred-register: '' }
   - { id: 1, class: fr32, preferred-register: '' }
   - { id: 2, class: gr32, preferred-register: '' }
   - { id: 3, class: gr8, preferred-register: '' }
   - { id: 4, class: gr64, preferred-register: '' }
   - { id: 5, class: gr32, preferred-register: '' }
   - { id: 6, class: gr32, preferred-register: '' }

llvm/test/DebugInfo/MIR/InstrRef/memory-operand-tracking.mir

--- |
   !9 = !{!2, !2}
   !10 = !{!11}
   !11 = !DILocalVariable(name: "baz", scope: !7, file: !1, line: 7, type: !2)
   !12 = !DILocation(line: 10, scope: !7)
 ...
 ---
 name: test
 tracksRegLiveness: true
+debugInstrRef: true
 liveins:
   - { reg: '$rdi', virtual-reg: '' }
 debugValueSubstitutions:
 - { srcinst: 2, srcop: 0, dstinst: 3, dstop: 1000000, subreg: 0 }
 - { srcinst: 4, srcop: 0, dstinst: 5, dstop: 1000000, subreg: 0 }
 stack:
   - { id: 0, name: '', type: spill-slot, offset: -16, size: 8, alignment: 8,
       stack-id: default, callee-saved-register: '', callee-saved-restored: true,

llvm/test/DebugInfo/MIR/InstrRef/no-duplicates.mir

--- |
   !9 = !{!2, !2}
   !10 = !{!11}
   !11 = !DILocalVariable(name: "baz", scope: !7, file: !1, line: 7, type: !2)
   !12 = !DILocation(line: 10, scope: !7)
 ...
 ---
 name: test
 tracksRegLiveness: true
+debugInstrRef: true
 liveins:
   - { reg: '$rdi', virtual-reg: '' }
 body:  |
   bb.0:
   liveins: $rdi, $rax
     $rbp = MOV64rr $rdi, debug-instr-number 1, debug-location !12
     dead $rcx = MOV64ri 0, debug-instr-number 1, debug-location !12
     CMP64ri8 renamable $rax, 1, implicit-def $eflags
     RET64 $rax
 ...

llvm/test/DebugInfo/MIR/InstrRef/no-metainstrs.mir

--- |
   !9 = !{!2, !2}
   !10 = !{!11}
   !11 = !DILocalVariable(name: "baz", scope: !7, file: !1, line: 7, type: !2)
   !12 = !DILocation(line: 10, scope: !7)
 ...
 ---
 name: test
 tracksRegLiveness: true
+debugInstrRef: true
 liveins:
   - { reg: '$rdi', virtual-reg: '' }
 body:  |
   bb.0:
   liveins: $rdi, $rax
     $rbp = MOV64rr $rdi, debug-instr-number 1, debug-location !12
     $ebp = KILL killed $rbp, debug-instr-number 2, debug-location !12
     dead $rcx = MOV64ri 0
     CMP64ri8 renamable $rax, 1, implicit-def $eflags
     RET64 $rax
 ...

llvm/test/DebugInfo/MIR/InstrRef/out-of-scope-blocks.mir

--- |
   !15 = !DILocation(line: 0, scope: !14)
   !16 = !DILocation(line: 50, column: 11, scope: !11)
 
 ...
 ---
 name:            main
 alignment:       16
 tracksRegLiveness: true
+debugInstrRef: true
 liveins:
   - { reg: '$rsi' }
 frameInfo:
   stackSize:       24
   offsetAdjustment: -24
   maxAlignment:    1
   adjustsStack:    true
   hasCalls:        true

llvm/test/DebugInfo/MIR/InstrRef/phi-coalesce-subreg.mir

--- |
   !14 = !DILocalVariable(name: "baz", arg: 2, scope: !7, file: !1, line: 3, type: !11)
   !15 = distinct !DILexicalBlock(scope: !7, file: !1, line: 8, column: 7)
 
 ...
 ---
 name:            foo
 alignment:       16
 tracksRegLiveness: true
+debugInstrRef: true
 liveins:
   - { reg: '$edi', virtual-reg: '%3' }
   - { reg: '$esi', virtual-reg: '%4' }
 frameInfo:
   maxAlignment:    1
   hasCalls:        true
 machineFunctionInfo: {}
 body:             |

llvm/test/DebugInfo/MIR/InstrRef/phi-coalescing.mir

--- |
   !14 = !DILocalVariable(name: "baz", arg: 2, scope: !7, file: !1, line: 3, type: !11)
   !15 = distinct !DILexicalBlock(scope: !7, file: !1, line: 8, column: 7)
 
 ...
 ---
 name:            foo
 alignment:       16
 tracksRegLiveness: true
+debugInstrRef: true
 liveins:
   - { reg: '$rdi', virtual-reg: '%3' }
   - { reg: '$rsi', virtual-reg: '%5' }
 frameInfo:
   maxAlignment:    1
   hasCalls:        true
 machineFunctionInfo: {}
 body:             |

llvm/test/DebugInfo/MIR/InstrRef/phi-on-stack-coalesced.mir

--- |
   !18 = !DILocation(line: 0, scope: !16)
   !19 = !DILocation(line: 9, column: 3, scope: !7)
 
 ...
 ---
 name:            foo
 alignment:       16
 tracksRegLiveness: true
+debugInstrRef: true
 registers:
   - { id: 0, class: gr16 }
   - { id: 1, class: gr32 }
   - { id: 2, class: gr32 }
   - { id: 3, class: gr32 }
   - { id: 4, class: gr32 }
 liveins:
   - { reg: '$edi', virtual-reg: '%1' }

llvm/test/DebugInfo/MIR/InstrRef/phi-on-stack-coalesced2.mir

--- |
   !18 = !DILocation(line: 0, scope: !16)
   !19 = !DILocation(line: 9, column: 3, scope: !7)
 
 ...
 ---
 name:            foo
 alignment:       16
 tracksRegLiveness: true
+debugInstrRef: true
 registers:
   - { id: 0, class: gr8 }
   - { id: 1, class: gr32_abcd }
   - { id: 2, class: gr32_abcd }
   - { id: 3, class: gr32 }
   - { id: 4, class: gr32 }
 liveins:
   - { reg: '$edi', virtual-reg: '%1' }

llvm/test/DebugInfo/MIR/InstrRef/phi-regallocd-to-stack.mir

--- |
   !18 = !DILocation(line: 0, scope: !16)
   !19 = !DILocation(line: 9, column: 3, scope: !7)
 
 ...
 ---
 name:            foo
 alignment:       16
 tracksRegLiveness: true
+debugInstrRef: true
 registers:
   - { id: 0, class: gr32 }
   - { id: 1, class: gr32 }
   - { id: 2, class: gr32 }
   - { id: 3, class: gr32 }
   - { id: 4, class: gr32 }
 liveins:
   - { reg: '$edi', virtual-reg: '%1' }

llvm/test/DebugInfo/MIR/InstrRef/phi-through-regalloc.mir

--- |
   !18 = !DILocation(line: 0, scope: !16)
   !19 = !DILocation(line: 9, column: 3, scope: !7)
 
 ...
 ---
 name:            foo
 alignment:       16
 tracksRegLiveness: true
+debugInstrRef: true
 registers:
   - { id: 0, class: gr32 }
   - { id: 1, class: gr32 }
   - { id: 2, class: gr32 }
   - { id: 3, class: gr32 }
   - { id: 4, class: gr32 }
 liveins:
   - { reg: '$edi', virtual-reg: '%1' }

llvm/test/DebugInfo/MIR/InstrRef/pick-vphi-in-shifting-loop.mir

--- |
   !32 = !{!"llvm.loop.mustprogress"}
   !33 = !{!"llvm.loop.unroll.disable"}
 
 ...
 ---
 name:            bees
 alignment:       16
 tracksRegLiveness: true
+debugInstrRef: true
 frameInfo:
   maxAlignment:    1
   maxCallFrameSize: 0
 machineFunctionInfo: {}
 body:             |
   bb.0:
     $rdx = MOV64ri 0, implicit-def $eflags
     $esi = MOV32ri 0, implicit-def $eflags

llvm/test/DebugInfo/MIR/InstrRef/restore-clobber-with-indirectness.mir

--- |
   !7 = !DILocation(line: 1, scope: !3)
   !8 = !DILocalVariable(name: "flannel", scope: !3)
 
 ...
 ---
 name:            _ZNSt5dequeIPN4llvm4LoopESaIS2_EE13_M_insert_auxESt15_Deque_iteratorIS2_RS2_PS2_EmRKS2_
 alignment:       16
 tracksRegLiveness: true
+debugInstrRef: true
 liveins:
   - { reg: '$rdi' }
   - { reg: '$rsi' }
   - { reg: '$rdx' }
 frameInfo:
   stackSize:       48
   offsetAdjustment: -48
   maxAlignment:    8

llvm/test/DebugInfo/MIR/InstrRef/restore-to-rsp-crash.mir

--- |
   !13 = !DILocation(line: 0, scope: !7)
   !14 = !DILocalVariable(name: "baz", arg: 2, scope: !7, file: !1, line: 3, type: !11)
 
 ...
 ---
 name:            foo
 alignment:       16
 tracksRegLiveness: true
+debugInstrRef: true
 frameInfo:
   stackSize:       24
   offsetAdjustment: -24
   maxAlignment:    1
   adjustsStack:    true
   hasCalls:        true
   maxCallFrameSize: 0
   cvBytesOfCalleeSavedRegisters: 16

llvm/test/DebugInfo/MIR/InstrRef/single-assign-propagation.mir

 # RUN: llc %s -march=x86-64 -run-pass=livedebugvalues -o - \
 # RUN:       -experimental-debug-variable-locations=true \
 # RUN:     | FileCheck %s -implicit-check-not=DBG_VALUE \
 # RUN:        --check-prefixes=CHECK,COMMON
-# RUN: llc %s -march=x86-64 -run-pass=livedebugvalues -o - \
-# RUN:       -experimental-debug-variable-locations=false \
-# RUN:     | FileCheck %s -implicit-check-not=DBG_VALUE \
-# RUN:        --check-prefixes=VARLOC,COMMON
 #
 # This test is designed to stimulate a simplification of variable-value
 # propagation in InstrRefBasedLDV. When we only have a single assignment of
 # a variable, we don't have to completely enumerate all the PHIs the variable
 # has and then value propagate through them: the variable value is available
 # only in those blocks dominated by the assignment. Example in this test:
 #
 #             entry

 ## No location here because it's out-of-scope.
 # CHECK-LABEL: bb.3:
 # CHECK:       DBG_VALUE
 # CHECK-LABEL: bb.4:
 # CHECK:       DBG_VALUE
 #
 ## VarLocBasedLDV will take the DBG_VALUE in the assignment block, propagate
 ## to bb.3, but not into bb.4 because of the intervening out-of-scope block.
+## Disabled actual testing of this because it's just for comparison purposes.
 #
-# VARLOC-LABEL: bb.1:
-# VARLOC:       DBG_VALUE
-# VARLOC-LABEL: bb.2:
+# varloc-label: bb.1:
+# varloc:       DBG_VALUE
+# varloc-label: bb.2:
 ## No location here because it's out-of-scope.
-# VARLOC-LABEL: bb.3:
-# VARLOC:       DBG_VALUE
+# varloc-label: bb.3:
+# varloc:       DBG_VALUE
 #
 ## Common tail for 'test2' -- this is checking that the assignment of undef or
 ## $noreg in single-assignment mode doesn't lead to trouble further down the
 ## line, specifically assertion failures.
 #
 # COMMON-LABEL: name: test2
 # COMMON: DBG_VALUE $noreg
 --- |
--- |
   !117 = !DILocation(line: 10, scope: !118)
   !118 = distinct !DILexicalBlock(scope: !112, file: !1, line: 1, column: 1)
   !119 = distinct !DILexicalBlock(scope: !112, file: !1, line: 1, column: 1)
   !120 = !DILocation(line: 10, scope: !119)
 
 ...
 ---
 name: _Z8bb_to_bb
+debugInstrRef: true
 debugValueSubstitutions:
   - { srcinst: 4, srcop: 0, dstinst: 3, dstop: 0, subreg: 0 }
 body:  |
   bb.0.entry:
     successors: %bb.1, %bb.5, %bb.6
 
     $rax = MOV64ri 1, debug-instr-number 1, debug-location !17
     JCC_1 %bb.5, 1, implicit $eflags

llvm/test/DebugInfo/MIR/InstrRef/spill-slot-limits.mir

--- |
   !9 = !{!2, !2}
   !10 = !{!11}
   !11 = !DILocalVariable(name: "baz", scope: !7, file: !1, line: 7, type: !2)
   !12 = !DILocation(line: 10, scope: !7)
 ...
 ---
 name: test
 tracksRegLiveness: true
+debugInstrRef: true
 liveins:
   - { reg: '$rdi', virtual-reg: '' }
 stack:
   - { id: 0, name: '', type: spill-slot, offset: -16, size: 8, alignment: 8,
       stack-id: default, callee-saved-register: '', callee-saved-restored: true,
       debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
 body:  |
   bb.0:

llvm/test/DebugInfo/MIR/InstrRef/stack-coloring-dbg-phi.mir

-# RUN: sed 's_;AAAAAA __' < %s \
-# RUN: | llc -x mir -o - -start-before=phi-node-elimination \
+# RUN: llc %s -o - -start-before=phi-node-elimination \
 # RUN:     -stop-after=stack-slot-coloring -simplify-mir \
 # RUN:     -experimental-debug-variable-locations=true \
 # RUN: | FileCheck %s --check-prefix=DBGPHIS
-# RUN: sed 's_;BBBBBB __' < %s \
-# RUN: | llc -x mir -o - -start-before=phi-node-elimination \
-# RUN:     -stop-after=stack-slot-coloring -simplify-mir \
-# RUN:     -experimental-debug-variable-locations=false \
-# RUN: | FileCheck %s --check-prefix=DBGVALS
 #
 # Test that DBG_PHI instructions do not add "weight" to stack slots and cause
 # their coalescing / coloring to change. This is hard to trigger, because it's
 # closely coupled with the register allocator. Thus, the test is very
 # complicated and hard to reduce.
 #
-# In block 13 there are two implementations of variable location tracking, but
-# both are commented out. Use sed in the command lines above to un-comment
-# each one and test what it does: in each case, the PHI should occur in
-# %stack.4 rather than anywhere else.
-#
 # Future register allocator changes might change the slot; in that case, just
 # update the slot number, so long as it's the same between each RUN.
 #
 # DBGPHIS: DBG_PHI %stack.4,
-# DBGVALS: DBG_VALUE %stack.4, 
 
 --- |
   target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
   target triple = "x86_64-unknown-linux-gnu"
   
   define hidden fastcc i64 @amd64_push_arguments(i32 *%regcache, i32 *%args) unnamed_addr !dbg !4 {
     ret i64 0
   }
--- |
   !8 = !{}
   !9 = !DILocation(line: 0, scope: !4)
   !10 = !DILocalVariable(name: "flannel", scope: !4, file: !3, line: 1, type: !7)
 ...
 ---
 name:            amd64_push_arguments
 alignment:       16
 tracksRegLiveness: true
+debugInstrRef: true
 registers:
   - { id: 0, class: gr32 }
   - { id: 1, class: gr32 }
   - { id: 2, class: gr32 }
   - { id: 3, class: gr64 }
   - { id: 4, class: gr32 }
   - { id: 5, class: gr32 }
   - { id: 6, class: gr32 }
bb.12:
     successors: 
   
   
   bb.13:
     successors: %bb.18(0x2aaaaaab), %bb.14(0x55555555)
   
     %2:gr32 = PHI undef %35:gr32, %bb.11, %14, %bb.21
     %3:gr64 = PHI %36, %bb.11, %13, %bb.21
-    ;AAAAAA %4:gr32 = PHI %0, %bb.11, %10, %bb.21, debug-instr-number 1
-    ;BBBBBB %4:gr32 = PHI %0, %bb.11, %10, %bb.21
+    %4:gr32 = PHI %0, %bb.11, %10, %bb.21, debug-instr-number 1
     %5:gr32 = PHI undef %35:gr32, %bb.11, %9, %bb.21
-    ;AAAAAA DBG_INSTR_REF !10, !DIExpression(DW_OP_LLVM_arg, 0), dbg-instr-ref(1, 0), debug-location !9
-    ;BBBBBB DBG_VALUE %4, 0, !10, !DIExpression(), debug-location !9
+    DBG_INSTR_REF !10, !DIExpression(DW_OP_LLVM_arg, 0), dbg-instr-ref(1, 0), debug-location !9
     %39:gr8 = COPY %27.sub_8bit
     TEST8rr killed %39, %39, implicit-def $eflags, debug-location !9
     JCC_1 %bb.18, 5, implicit killed $eflags, debug-location !9
     JMP_1 %bb.14, debug-location !9
   
   bb.14:
     successors: %bb.17(0x40000001), %bb.15(0x3fffffff)
   

llvm/test/DebugInfo/MIR/InstrRef/substitusions-roundtrip.mir

 # RUN: llc %s -march=x86-64 -run-pass=machineverifier \
 # RUN:     -experimental-debug-variable-locations -o - 2>&1 | FileCheck %s
 #
 # REQUIRES: x86-registered-target
 #
 # CHECK:      debugValueSubstitutions:
 # CHECK-NEXT: - { srcinst: 1, srcop: 0, dstinst: 2, dstop: 0, subreg: 0 }
 #
 # CHECK:      MOV64rr $rdi, debug-instr-number 2
 # CHECK-NEXT: DBG_INSTR_REF dbg-instr-ref(1, 0)
 ---
 name: test
 tracksRegLiveness: true
+debugInstrRef: true
 liveins:
   - { reg: '$rdi', virtual-reg: '' }
 debugValueSubstitutions:
   - { srcinst: 1, srcop: 0, dstinst: 2, dstop: 0, subreg: 0 }
 body:  |
   bb.0:
   liveins: $rdi, $rax
     $rbp = MOV64rr $rdi, debug-instr-number 2
     DBG_INSTR_REF dbg-instr-ref(1, 0)
     dead $rcx = MOV64ri 0
     CMP64ri8 renamable $rax, 1, implicit-def $eflags
     RET64 $rax
 ...

llvm/test/DebugInfo/MIR/InstrRef/survives-livedebugvars.mir

--- |
   !19 = !DILocation(line: 7, column: 2, scope: !15)
   !29 = !DILocalVariable(name: "c", scope: !4, file: !1, line: 5, type: !10)
 
 ...
 ---
 name:            bar
 alignment:       16
 tracksRegLiveness: true
+debugInstrRef: true
 registers:
   - { id: 0, class: gr64 }
   - { id: 1, class: gr32 }
   - { id: 2, class: gr64 }
   - { id: 3, class: gr64 }
   - { id: 4, class: gr32 }
   - { id: 5, class: gr32 }
   - { id: 6, class: gr32 }

llvm/test/DebugInfo/MIR/InstrRef/twoaddr-to-threeaddr-sub.mir

 # CHECK:      LEA64_32r
 # CHECK-SAME: debug-instr-number 2
 #
 # CHECK:      DBG_INSTR_REF dbg-instr-ref(1, 0)
 ---
 name:            test1
 alignment:       16
 tracksRegLiveness: true
+debugInstrRef: true
 registers:
   - { id: 0, class: gr32 }
   - { id: 1, class: gr32 }
   - { id: 2, class: gr32 }
 liveins:
   - { reg: '$edi', virtual-reg: '%0' }
 frameInfo:
   maxAlignment:    1

llvm/test/DebugInfo/MIR/InstrRef/win32-chkctk-modifies-esp.mir

--- |
   !48 = !DILocation(line: 10, column: 20, scope: !35)
   !49 = !DILocation(line: 11, column: 1, scope: !35)
 
 ...
 ---
 name:            "\x01?foo@@YAXH@Z"
 alignment:       16
 tracksRegLiveness: true
+debugInstrRef: true
 hasWinCFI:       true
 frameInfo:
   stackSize:       8
   offsetAdjustment: -8
   maxAlignment:    4
   adjustsStack:    true
   maxCallFrameSize: 0
 fixedStack:

llvm/test/DebugInfo/MIR/InstrRef/x86-drop-compare-inst.mir

--- |
   !7 = !DILocation(line: 1, scope: !3)
   !8 = !DILocalVariable(name: "flannel", scope: !3)
 
 ...
 ---
 name:            soup
 alignment:       16
 tracksRegLiveness: true
+debugInstrRef: true
 registers:
   - { id: 0, class: gr64 }
   - { id: 1, class: gr64 }
   - { id: 2, class: gr32 }
   - { id: 3, class: gr32 }
 frameInfo:
   maxAlignment:    1
 machineFunctionInfo: {}

llvm/test/DebugInfo/MIR/InstrRef/x86-fixup-bw-inst-subreb.mir

 # be instrumented. At a high level, copies do not define a value; they move
 # them.
 
 ---
 # CHECK-LABEL: name: test1
 name:            test1
 alignment:       16
 tracksRegLiveness: true
+debugInstrRef: true
 liveins:
   - { reg: '$rax' }
 # CHECK:     debugValueSubstitutions:
 # CHECK-NEXT - { srcinst: 1, srcop: 0, dstinst: 2, dstop: 0, subreg: 4 }
 ## Subreg 4 -> sub_16bit
 body:             |
   bb.0:
     liveins: $rax
 
     $ax = MOV16rm killed $rax, 1, $noreg, 0, $noreg, debug-instr-number 1
     ; CHECK: $eax = MOVZX32rm16 killed $rax, {{.*}} debug-instr-number 2
 
     RET64 $ax
 
 ...
 ---
 # CHECK-LABEL: name: test3
 name:            test3
 alignment:       16
 tracksRegLiveness: true
+debugInstrRef: true
 liveins:
   - { reg: '$rdi' }
 # CHECK:     debugValueSubstitutions:
 # CHECK-NEXT - { srcinst: 1, srcop: 0, dstinst: 2, dstop: 0, subreg: 4 }
 ## Subreg 4 -> sub_16bit
 body:             |
   bb.0:
     successors: %bb.1(0x30000000), %bb.2(0x50000000)

llvm/test/DebugInfo/MIR/InstrRef/x86-fp-stackifier-drop-locations.mir

--- |
   !30 = !DILocation(line: 12, column: 12, scope: !13)
   !31 = !DILocation(line: 12, column: 3, scope: !13)
 
 ...
 ---
 name:            foo
 alignment:       16
 tracksRegLiveness: true
+debugInstrRef: true
 frameInfo:
   hasCalls:        true
 fixedStack:
   - { id: 0, type: default, offset: 24, size: 10, alignment: 8, stack-id: default, 
       isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true, 
       debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
   - { id: 1, type: default, offset: 12, size: 10, alignment: 4, stack-id: default, 
       isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true, 

llvm/test/DebugInfo/MIR/InstrRef/x86-lea-fixup-2.mir

 # RUN: llc -run-pass x86-fixup-LEAs -mtriple=i386 -verify-machineinstrs -mcpu=corei7-avx -o - %s | FileCheck %s
 #
 # Test that several LEA => ADD transforms get substitutions applied to them,
 # for corner cases that we can only hit with -mtriple=i386.
 ---
 name:            test2add_32
 # CHECK: name: test2add_32
 alignment:       16
 tracksRegLiveness: true
+debugInstrRef: true
 liveins:
   - { reg: '$eax' }
   - { reg: '$ebp' }
 # CHECK:       debugValueSubstitutions:
 # CHECK-NAME:  - { srcinst: 1, srcop: 0, dstinst: 2, dstop: 0, subreg: 0 }
 body:             |
   bb.0:
     liveins: $eax, $ebp
 
     ; CHECK: $eax = ADD32ri8 {{.*}} debug-instr-number 2
     $eax = LEA32r killed $eax, 1, killed $ebp, -5, $noreg, debug-instr-number 1
     RET64 $eax
 
 ...
 ---
 name:            test1mov1add_ebp_32
 # CHECK-LABEL: name: test1mov1add_ebp_32
 alignment:       16
 tracksRegLiveness: true
+debugInstrRef: true
 liveins:
   - { reg: '$eax' }
   - { reg: '$ebx' }
   - { reg: '$ebp' }
 # CHECK:       debugValueSubstitutions:
 # CHECK-NEXT:  - { srcinst: 1, srcop: 0, dstinst: 2, dstop: 0, subreg: 0 }
 body:             |
   bb.0:
     liveins: $eax, $ebp, $ebx
 
     ; CHECK: $ebx = ADD32rr {{.*}} debug-instr-number 2
     $ebx = LEA32r killed $ebp, 1, $ebp, 0, $noreg, debug-instr-number 1
     RET64 $ebx
 
 ...
 ---
 name:            testleaadd_ebp_index_32
 # CHECK-LABEL: name: testleaadd_ebp_index_32
 alignment:       16
 tracksRegLiveness: true
+debugInstrRef: true
 liveins:
   - { reg: '$ebx' }
   - { reg: '$ebp' }
 # CHECK:       debugValueSubstitutions:
 # CHECK-NEXT:  - { srcinst: 1, srcop: 0, dstinst: 2, dstop: 0, subreg: 0 }
 body:             |
   bb.0:
     liveins: $eax, $ebp, $ebx
 
     ; CHECK: $ebx = ADD32rr {{.*}} debug-instr-number 2
     $ebx = LEA32r $ebp, 1, $ebp, 5, $noreg, debug-instr-number 1
     RET64 $ebx
 
 ...

llvm/test/DebugInfo/MIR/InstrRef/x86-lea-fixup.mir

 # RUN: llc -run-pass x86-fixup-LEAs -mtriple=x86_64-gnu-unknown -verify-machineinstrs -mcpu=corei7-avx -o - %s | FileCheck %s --check-prefixes=COREI7,CHECK
 # RUN: llc -run-pass x86-fixup-LEAs -mtriple=x86_64-gnu-unknown -verify-machineinstrs -mcpu=haswell -o - %s | FileCheck %s --check-prefixes=HASWELL,CHECK
 # RUN: llc -run-pass x86-fixup-LEAs -mtriple=x86_64-unknown-unknown -verify-machineinstrs -mcpu=atom -o - %s | FileCheck %s --check-prefixes=ATOM,CHECK
 #
 # Test several LEA <=> ADD transformations that the fixup-leas pass performs,
 # and check that any debug-instr-number attached to the original instruction
 # is substituted onto the new instruction.
 # Some are only reachable under specific CPU modes it seems -- each function
 # in this file is only tested by one prefix / CPU mode. Some i386 specific
 # behaviours are in the -2 flavour of this file.
 ---
 # COREI7-LABEL: name: pr43758
 name:            pr43758
 alignment:       16
 tracksRegLiveness: true
+debugInstrRef: true
 liveins:
   - { reg: '$rax' }
   - { reg: '$rbp' }
 # COREI7:      debugValueSubstitutions:
 # COREI7-NEXT: - { srcinst: 1, srcop: 0, dstinst: 2, dstop: 0, subreg: 0 }
 body:             |
   bb.0:
     liveins: $rax, $rbp
 
     $ebp = LEA64_32r killed $rbp, 1, killed $rax, 0, $noreg, debug-instr-number 1
     ; COREI7: ADD32rr {{.*}} debug-instr-number 2
     RET64 $ebp
 
 ...
 ---
 name:            test_mul_spec
 # HASWELL-LABEL: name: test_mul_spec
 alignment:       16
 tracksRegLiveness: true
+debugInstrRef: true
 liveins:
   - { reg: '$edi' }
 frameInfo:
   maxAlignment:    1
   maxCallFrameSize: 0
 machineFunctionInfo: {}
 # HASWELL:      debugValueSubstitutions:
 # HASWELL-NEXT:  - { srcinst: 1, srcop: 0, dstinst: 3, dstop: 0, subreg: 0 }
bb.0:
     RET64 $eax
 
 ...
 ---
 name:            testthree
 # ATOM-LABEL: name: testthree
 alignment:       16
 tracksRegLiveness: true
+debugInstrRef: true
 frameInfo:
   maxAlignment:    1
   maxCallFrameSize: 0
 machineFunctionInfo: {}
 # ATOM:       debugValueSubstitutions:
 # ATOM-NEXT:  - { srcinst: 1, srcop: 0, dstinst: 2, dstop: 0, subreg: 0 }
 body:             |
   bb.0.entry:

 # CHECK-LABEL: testfour
 # In this code sequence, an LEA is converted into a subtract that's combined
 # with another subtract. The instruction number on the computed value should
 # only be attached to the last subtract.
 name:            testfour
 alignment:       16
 tracksRegLiveness: true
 tracksDebugUserValues: true
+debugInstrRef: true
 liveins:
   - { reg: '$esi' }
 frameInfo:
   maxAlignment:    1
   maxCallFrameSize: 0
 machineFunctionInfo: {}
 # CHECK:      debugValueSubstitutions:
 # CHECK-NEXT:  - { srcinst: 1, srcop: 0, dstinst: 2, dstop: 0, subreg: 0 }

llvm/test/DebugInfo/MIR/X86/entry-value-of-modified-param.mir

-# RUN: llc -run-pass=livedebugvalues -march=x86-64 -o - %s  \
-# RUN:  -experimental-debug-variable-locations=false \
-# RUN: | FileCheck %s --check-prefixes=CHECK,VARLOCLDV
-# RUN: llc -run-pass=livedebugvalues -march=x86-64 -o - %s \
+# RUN: llc -run-pass=livedebugvalues -march=x86-64 -o - %s \
 # RUN:  -experimental-debug-variable-locations=true \
 # RUN: | FileCheck %s --check-prefixes=CHECK,INSTRREFLDV
 #
+# NB: clone of this test for VarLocBasedLDV is in
+# entry-value-of-modified-param2.mir.
+#
 #extern void fn1 (int, int, int);
 #
 #__attribute__((noinline))
 #int
 #fn2 (int a, int b, int c) {
 #  int q = 2 + a;
 #
 #  fn1 (5, 6, q);
 #
 #  b = b + 7;
 #  if (b < 17)
 #    return 1;
 #  else
 #    return 0;
 #}
 #
 # CHECK: ![[ARG_A:.*]] = !DILocalVariable(name: "a"
 # CHECK: ![[ARG_B:.*]] = !DILocalVariable(name: "b"
 # CHECK: ![[ARG_C:.*]] = !DILocalVariable(name: "c"
 ## TODO: Support KILL instruction, which doesn't clobber parameter value.
-# VARLOCLDV: DBG_VALUE $edi, $noreg, ![[ARG_A]], !DIExpression()
 # CHECK: DBG_VALUE $edx, $noreg, ![[ARG_C]], !DIExpression(DW_OP_LLVM_entry_value, 1)
-# VARLOCLDV-NOT: DBG_VALUE $edi, $noreg, ![[ARG_A]], !DIExpression(DW_OP_LLVM_entry_value, 1)
 # INSTRREFLDV: DBG_VALUE $edi, $noreg, ![[ARG_A]], !DIExpression(DW_OP_LLVM_entry_value, 1)
 # CHECK-NOT: DBG_VALUE $esi, $noreg, ![[ARG_B]], !DIExpression(DW_OP_LLVM_entry_value, 1)
 #
 --- |
   ; ModuleID = 'test.c'
   source_filename = "test.c"
   target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
   target triple = "x86_64-unknown-linux-gnu"
--- |
   !24 = distinct !DILexicalBlock(scope: !12, file: !1, line: 12, column: 9)
   !25 = !DILocation(line: 0, scope: !24)
   !26 = !DILocation(line: 16, column: 1, scope: !12)
 
 ...
 ---
 name:            fn2
 alignment:       16
+debugInstrRef: true
 body:             |
   bb.0.entry:
     liveins: $edi, $esi, $rbx
 
     DBG_VALUE $edi, $noreg, !16, !DIExpression(), debug-location !20
     DBG_VALUE $esi, $noreg, !17, !DIExpression(), debug-location !20
     DBG_VALUE $edx, $noreg, !18, !DIExpression(), debug-location !20
     frame-setup PUSH64r killed $rbx, implicit-def $rsp, implicit $rsp

llvm/test/DebugInfo/MIR/X86/entry-value-of-modified-param2.mir

 # RUN: llc -run-pass=livedebugvalues -march=x86-64 -o - %s  \
 # RUN:  -experimental-debug-variable-locations=false \
 # RUN: | FileCheck %s --check-prefixes=CHECK,VARLOCLDV
-# RUN: llc -run-pass=livedebugvalues -march=x86-64 -o - %s \
-# RUN:  -experimental-debug-variable-locations=true \
-# RUN: | FileCheck %s --check-prefixes=CHECK,INSTRREFLDV
+#
+# NB: clone of this file testing InstrRefBasedLDV is in
+# llvm/test/DebugInfo/MIR/X86/entry-value-of-modified-param.mir
 #
 #extern void fn1 (int, int, int);
 #
 #__attribute__((noinline))
 #int
 #fn2 (int a, int b, int c) {
 #  int q = 2 + a;
 #
 #  fn1 (5, 6, q);
 #
 #  b = b + 7;
 #  if (b < 17)
 #    return 1;
 #  else
 #    return 0;
 #}
 #
 # CHECK: ![[ARG_A:.*]] = !DILocalVariable(name: "a"
 # CHECK: ![[ARG_B:.*]] = !DILocalVariable(name: "b"
 # CHECK: ![[ARG_C:.*]] = !DILocalVariable(name: "c"
 ## TODO: Support KILL instruction, which doesn't clobber parameter value.
 # VARLOCLDV: DBG_VALUE $edi, $noreg, ![[ARG_A]], !DIExpression()
 # CHECK: DBG_VALUE $edx, $noreg, ![[ARG_C]], !DIExpression(DW_OP_LLVM_entry_value, 1)
 # VARLOCLDV-NOT: DBG_VALUE $edi, $noreg, ![[ARG_A]], !DIExpression(DW_OP_LLVM_entry_value, 1)
-# INSTRREFLDV: DBG_VALUE $edi, $noreg, ![[ARG_A]], !DIExpression(DW_OP_LLVM_entry_value, 1)
 # CHECK-NOT: DBG_VALUE $esi, $noreg, ![[ARG_B]], !DIExpression(DW_OP_LLVM_entry_value, 1)
 #
 --- |
   ; ModuleID = 'test.c'
   source_filename = "test.c"
   target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
   target triple = "x86_64-unknown-linux-gnu"
 

llvm/test/DebugInfo/MIR/X86/instr-ref-join-def-vphi.mir

 hasWinCFI:       true
 callsEHReturn:   false
 callsUnwindInit: false
 hasEHCatchret:   false
 hasEHScopes:     false
 hasEHFunclets:   false
 failsVerification: false
 tracksDebugUserValues: true
+debugInstrRef: true
 registers:       []
 liveins:
   - { reg: '$ecx', virtual-reg: '' }
 frameInfo:
   isFrameAddressTaken: false
   isReturnAddressTaken: false
   hasStackMap:     false
   hasPatchPoint:   false

llvm/test/DebugInfo/MIR/X86/kill-entry-value-after-diamond-bbs.mir

-# RUN: llc -debug-entry-values -run-pass=livedebugvalues -march=x86-64 -o - %s -experimental-debug-variable-locations=false | FileCheck %s --check-prefixes=CHECK,VARLOCLDV
 # RUN: llc -debug-entry-values -run-pass=livedebugvalues -march=x86-64 -o - %s -experimental-debug-variable-locations=true | FileCheck %s --check-prefixes=CHECK,INSTRREFLDV
 #
 # The test case was artificially adjusted, in order to make proper diamond basic
 # block structure relevant to the debug entry values clobbering.
 #
 # CHECK: ![[ARG_B:.*]] = !DILocalVariable(name: "b"
 # CHECK: bb.0.entry
 # CHECK: DBG_VALUE $esi, $noreg, ![[ARG_B]], !DIExpression()
 # CHECK: bb.1.if.then
 # CHECK: DBG_VALUE $esi, $noreg, ![[ARG_B]], !DIExpression()
 # CHECK: $ebx = MOV32rr $esi
 # CHECK-NEXT: DBG_VALUE $ebx, $noreg, ![[ARG_B]], !DIExpression()
 # CHECK-NEXT: $esi = MOV32ri 5
 # CHECK-NEXT: $ebx = MOV32ri 1
 # CHECK-NEXT: DBG_VALUE $esi, $noreg, ![[ARG_B]], !DIExpression(DW_OP_LLVM_entry_value, 1)
 # CHECK: bb.2.if.else
 # CHECK: DBG_VALUE $esi, $noreg, ![[ARG_B]], !DIExpression()
 # CHECK: $ebp = MOV32rr $esi
 # CHECK: DBG_VALUE $ebp, $noreg, ![[ARG_B]], !DIExpression()
 # CHECK-NEXT: $esi = MOV32ri 1
 # CHECK-NEXT: $ebp = MOV32ri 2
 # CHECK-NEXT: DBG_VALUE $esi, $noreg, ![[ARG_B]], !DIExpression(DW_OP_LLVM_entry_value, 1)
 # CHECK: bb.3.if.end
-# VARLOCLDV-NOT: DBG_VALUE $esi, $noreg, ![[ARG_B]], !DIExpression(DW_OP_LLVM_entry_value, 1)
 # INSTRREFLDV: DBG_VALUE $esi, $noreg, ![[ARG_B]], !DIExpression(DW_OP_LLVM_entry_value, 1)
 #
-## Final two lines: VarLoc LiveDebugValues cannot determine that the DBG_VALUEs
-## down either path of the diamond set the variable to be its original value,
-## wheras instruction referencing LiveDebugValues can.
+## NB: an identical test in llvm/test/DebugInfo/MIR/X86/kill-entry-value-after-diamond-bbs2.mir
+## checks the same things for VarLocBasedLDV.
 #
 --- |
   ; ModuleID = 'test.c'
   source_filename = "test.c"
   target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
   target triple = "x86_64-unknown-linux-gnu"
 
   ; Function Attrs: noinline nounwind uwtable
--- |
   !32 = !DILocation(line: 16, column: 7, scope: !31)
   !33 = !DILocation(line: 0, scope: !24)
   !34 = !DILocation(line: 19, column: 5, scope: !12)
 
 ...
 ---
 name:            fn2
 alignment:       16
+debugInstrRef: true
 fixedStack:
   - { id: 0, type: spill-slot, offset: -24, size: 8, alignment: 8, stack-id: default,
       callee-saved-register: '$rbx', callee-saved-restored: true, debug-info-variable: '',
       debug-info-expression: '', debug-info-location: '' }
   - { id: 1, type: spill-slot, offset: -16, size: 8, alignment: 16, stack-id: default,
       callee-saved-register: '$rbp', callee-saved-restored: true, debug-info-variable: '',
       debug-info-expression: '', debug-info-location: '' }
 body:             |

llvm/test/DebugInfo/MIR/X86/kill-entry-value-after-diamond-bbs2.mir

 # RUN: llc -debug-entry-values -run-pass=livedebugvalues -march=x86-64 -o - %s -experimental-debug-variable-locations=false | FileCheck %s --check-prefixes=CHECK,VARLOCLDV
-# RUN: llc -debug-entry-values -run-pass=livedebugvalues -march=x86-64 -o - %s -experimental-debug-variable-locations=true | FileCheck %s --check-prefixes=CHECK,INSTRREFLDV
 #
 # The test case was artificially adjusted, in order to make proper diamond basic
 # block structure relevant to the debug entry values clobbering.
 #
 # CHECK: ![[ARG_B:.*]] = !DILocalVariable(name: "b"
 # CHECK: bb.0.entry
 # CHECK: DBG_VALUE $esi, $noreg, ![[ARG_B]], !DIExpression()
 # CHECK: bb.1.if.then
 # CHECK: DBG_VALUE $esi, $noreg, ![[ARG_B]], !DIExpression()
 # CHECK: $ebx = MOV32rr $esi
 # CHECK-NEXT: DBG_VALUE $ebx, $noreg, ![[ARG_B]], !DIExpression()
 # CHECK-NEXT: $esi = MOV32ri 5
 # CHECK-NEXT: $ebx = MOV32ri 1
 # CHECK-NEXT: DBG_VALUE $esi, $noreg, ![[ARG_B]], !DIExpression(DW_OP_LLVM_entry_value, 1)
 # CHECK: bb.2.if.else
 # CHECK: DBG_VALUE $esi, $noreg, ![[ARG_B]], !DIExpression()
 # CHECK: $ebp = MOV32rr $esi
 # CHECK: DBG_VALUE $ebp, $noreg, ![[ARG_B]], !DIExpression()
 # CHECK-NEXT: $esi = MOV32ri 1
 # CHECK-NEXT: $ebp = MOV32ri 2
 # CHECK-NEXT: DBG_VALUE $esi, $noreg, ![[ARG_B]], !DIExpression(DW_OP_LLVM_entry_value, 1)
 # CHECK: bb.3.if.end
 # VARLOCLDV-NOT: DBG_VALUE $esi, $noreg, ![[ARG_B]], !DIExpression(DW_OP_LLVM_entry_value, 1)
-# INSTRREFLDV: DBG_VALUE $esi, $noreg, ![[ARG_B]], !DIExpression(DW_OP_LLVM_entry_value, 1)
 #
 ## Final two lines: VarLoc LiveDebugValues cannot determine that the DBG_VALUEs
 ## down either path of the diamond set the variable to be its original value,
 ## wheras instruction referencing LiveDebugValues can.
+##
+## An identical test in llvm/test/DebugInfo/MIR/X86/kill-entry-value-after-diamond-bbs.mir
+## checks this for InstrRefBasedLDV.
 #
 --- |
   ; ModuleID = 'test.c'
   source_filename = "test.c"
   target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
   target triple = "x86_64-unknown-linux-gnu"
 
   ; Function Attrs: noinline nounwind uwtable

llvm/test/DebugInfo/MIR/X86/live-debug-values-bad-transfer.mir

-# RUN: llc %s -mtriple=x86_64-unknown-unknown -o - -run-pass=livedebugvalues -experimental-debug-variable-locations=false | FileCheck %s --implicit-check-not=DBG_VALUE
 # RUN: llc %s -mtriple=x86_64-unknown-unknown -o - -run-pass=livedebugvalues -experimental-debug-variable-locations=true | FileCheck %s -check-prefix=NEWLDV --implicit-check-not=DBG_VALUE
 #
 # Test that the DBG_VALUE of ecx below does not get propagated. It is considered
 # live-in on LiveDebugValues' first pass through the loop, but on the second it
 # should be removed from the InLocs set because it gets clobbered inside the
 # loop. There should be no transfer from ecx to ebx -- this is ensured by the
 # FileCheck implicit-check-not option.
 #
-# FIXME: we successfully prevent the false location (ebx) from being
-# propagated into block 2, but the original transfer isn't yet eliminated.
-# Thus we get no DBG_VALUe in block 2, but an invalid one in block 1.
-#
-# CHECK-LABEL: name: foo
-# CHECK-LABEL: bb.0.entry:
-# CHECK:       $ecx = MOV32ri 0
-# CHECK-NEXT:  DBG_VALUE
-# CHECK-LABEL: bb.1.loop:
-# CHECK:       $ebx = COPY killed $ecx
-# CHECK-NEXT:  DBG_VALUE
-#
-# This doesn't occur under value-tracking LiveDebugValues though.
+# An identical test in llvm/test/DebugInfo/MIR/X86/live-debug-values-bad-transfer2.mir
+# checks this for VarLocBasedLDV.
 #
 # NEWLDV-LABEL: name: foo
 # NEWLDV-LABEL: bb.0.entry:
 # NEWLDV:       $ecx = MOV32ri 0
 # NEWLDV-NEXT:  DBG_VALUE
 
 --- |
   source_filename = "live-debug-values-remove-range.ll"
--- |
   !9 = !DILocalVariable(name: "thin", scope: !4, file: !3, line: 1, type: !7)
   !10 = !DILocation(line: 1, scope: !4)
 
 ...
 ---
 name:            foo
 alignment:       4
 tracksRegLiveness: true
+debugInstrRef: true
 liveins:
   - { reg: '$edi' }
 frameInfo:
   stackSize:       8
   offsetAdjustment: -8
   maxAlignment:    1
   adjustsStack:    true
   hasCalls:        true

llvm/test/DebugInfo/MIR/X86/live-debug-values-bad-transfer2.mir

 # RUN: llc %s -mtriple=x86_64-unknown-unknown -o - -run-pass=livedebugvalues -experimental-debug-variable-locations=false | FileCheck %s --implicit-check-not=DBG_VALUE
-# RUN: llc %s -mtriple=x86_64-unknown-unknown -o - -run-pass=livedebugvalues -experimental-debug-variable-locations=true | FileCheck %s -check-prefix=NEWLDV --implicit-check-not=DBG_VALUE
 #
 # Test that the DBG_VALUE of ecx below does not get propagated. It is considered
 # live-in on LiveDebugValues' first pass through the loop, but on the second it
 # should be removed from the InLocs set because it gets clobbered inside the
 # loop. There should be no transfer from ecx to ebx -- this is ensured by the
 # FileCheck implicit-check-not option.
 #
 # FIXME: we successfully prevent the false location (ebx) from being
 # propagated into block 2, but the original transfer isn't yet eliminated.
 # Thus we get no DBG_VALUe in block 2, but an invalid one in block 1.
 #
 # CHECK-LABEL: name: foo
 # CHECK-LABEL: bb.0.entry:
 # CHECK:       $ecx = MOV32ri 0
 # CHECK-NEXT:  DBG_VALUE
 # CHECK-LABEL: bb.1.loop:
 # CHECK:       $ebx = COPY killed $ecx
 # CHECK-NEXT:  DBG_VALUE
 #
-# This doesn't occur under value-tracking LiveDebugValues though.
-#
-# NEWLDV-LABEL: name: foo
-# NEWLDV-LABEL: bb.0.entry:
-# NEWLDV:       $ecx = MOV32ri 0
-# NEWLDV-NEXT:  DBG_VALUE
+# An identical test in llvm/test/DebugInfo/MIR/X86/live-debug-values-bad-transfer.mir
+# checks this for InstrRefBasedLDV.
 
 --- |
   source_filename = "live-debug-values-remove-range.ll"
   target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
   
   declare void @llvm.dbg.value(metadata, metadata, metadata)
   
   define i32 @foo(i32 %bar) !dbg !4 {

llvm/test/DebugInfo/MIR/X86/live-debug-values-fragments.mir

--- |
   !84 = !DILocalVariable(name: "goblin", scope: !80, file: !2, line: 1, type: !16)
   !88 = !DILocation(line: 4, scope: !80)
   !93 = !{!83, !84}
 
 ...
 ---
 name:            foo
 tracksRegLiveness: true
+debugInstrRef: true
 registers:       []
 liveins:         
   - { reg: '$rdi', virtual-reg: '' }
 body:             |
   bb.0.entry:
     successors: %bb.1
     liveins: $rdi
   
bb.3.bb3:
     liveins: $eax, $ebx, $r9d, $r10d
     $eax = XOR32rr killed $eax, killed $ebx, implicit-def $eflags
     RET64 $eax, debug-location !8
 
 ...
 ---
 name:            bar
 tracksRegLiveness: true
+debugInstrRef: true
 registers:       []
 liveins:         
   - { reg: '$rdi', virtual-reg: '' }
 body:             |
   bb.0.entry:
     successors: %bb.1
     liveins: $rdi
   
bb.3.bb3:
     liveins: $eax, $ebx, $r9d, $r10d
     $eax = XOR32rr killed $eax, killed $ebx, implicit-def $eflags
     RET64 $eax, debug-location !48
 
 ...
 ---
 name:            baz
 tracksRegLiveness: true
+debugInstrRef: true
 registers:       []
 liveins:         
   - { reg: '$rdi', virtual-reg: '' }
 body:             |
   bb.0.entry:
     successors: %bb.1
     liveins: $rdi
   

llvm/test/DebugInfo/MIR/X86/live-debug-values-reg-copy.mir

 ---
 name:            foo
 alignment:       16
 exposesReturnsTwice: false
 legalized:       false
 regBankSelected: false
 selected:        false
 tracksRegLiveness: true
+debugInstrRef: true
 registers:
 liveins:
   - { reg: '$edi', virtual-reg: '' }
   - { reg: '$r8d', virtual-reg: '' }
 frameInfo:
   isFrameAddressTaken: false
   isReturnAddressTaken: false
   hasStackMap:     false

llvm/test/DebugInfo/MIR/X86/live-debug-values-restore.mir

 name:            f
 alignment:       16
 exposesReturnsTwice: false
 legalized:       false
 regBankSelected: false
 selected:        false
 failedISel:      false
 tracksRegLiveness: true
+debugInstrRef: true
 hasWinCFI:       false
 registers:       []
 liveins:         
   - { reg: '$rdi', virtual-reg: '' }
 frameInfo:       
   isFrameAddressTaken: false
   isReturnAddressTaken: false
   hasStackMap:     false

 # CHECK-NOT: !DIExpression()
 # CHECK-LABEL: bb.2.if.end:
 # CHECK:       DBG_VALUE $rbx, $noreg, ![[QVAR]], !DIExpression(DW_OP_LLVM_fragment, 32, 32)
 # CHECK:       DBG_VALUE $rdi, $noreg, ![[QVAR]], !DIExpression(DW_OP_LLVM_fragment, 0, 32)
 
 name:            g
 alignment:       16
 tracksRegLiveness: true
+debugInstrRef: true
 liveins:         
   - { reg: '$rdi', virtual-reg: '' }
 frameInfo:       
   stackSize:       48
   offsetAdjustment: -48
   maxAlignment:    8
   cvBytesOfCalleeSavedRegisters: 48
   localFrameSize:  0

 # CHECK:       DBG_VALUE $rsp, $noreg, ![[RVAR]], !DIExpression(DW_OP_constu, 8, DW_OP_minus, DW_OP_deref, DW_OP_plus_uconst, 1)
 # CHECK:       DBG_VALUE $rdi, $noreg, ![[RVAR]], !DIExpression(DW_OP_plus_uconst, 1)
 # CHECK-LABEL: bb.2.if.end:
 # CHECK:       DBG_VALUE $rdi, $noreg, ![[RVAR]], !DIExpression(DW_OP_plus_uconst, 1)
 
 name:            h
 alignment:       16
 tracksRegLiveness: true
+debugInstrRef: true
 liveins:         
   - { reg: '$rdi', virtual-reg: '' }
 frameInfo:       
   stackSize:       48
   offsetAdjustment: -48
   maxAlignment:    8
   cvBytesOfCalleeSavedRegisters: 48
   localFrameSize:  0

 # CHECK-LABEL: bb.2.if.then:
 # CHECK:       DBG_VALUE $rsp, $noreg, ![[SVAR]], !DIExpression(DW_OP_constu, 8, DW_OP_minus, DW_OP_deref, DW_OP_plus_uconst, 1)
 # CHECK-LABEL: bb.3.if.end
 # CHECK:       DBG_VALUE $rsp, $noreg, ![[SVAR]], !DIExpression(DW_OP_constu, 8, DW_OP_minus, DW_OP_deref, DW_OP_plus_uconst, 1)
 # CHECK:       DBG_VALUE $rdi, $noreg, ![[SVAR]], !DIExpression(DW_OP_plus_uconst, 1)
 name:            i
 alignment:       16
 tracksRegLiveness: true
+debugInstrRef: true
 liveins:         
   - { reg: '$rdi', virtual-reg: '' }
 frameInfo:       
   stackSize:       48
   offsetAdjustment: -48
   maxAlignment:    8
   cvBytesOfCalleeSavedRegisters: 48
   localFrameSize:  0

 # CHECK-LABEL: bb.1.if.then:
 # CHECK:       DBG_VALUE $rsp, 0, ![[TVAR]], !DIExpression(DW_OP_constu, 8, DW_OP_minus, DW_OP_deref)
 # CHECK:       INLINEASM
 # CHECK:       DBG_VALUE ${{[a-zA-Z0-9]+}}, 0, ![[TVAR]], !DIExpression()
 # CHECK-LABEL: bb.2.if.end
 
 name:            j
 tracksRegLiveness: true
+debugInstrRef: true
 liveins:         
   - { reg: '$rdi', virtual-reg: '' }
 frameInfo:       
   stackSize:       48
   offsetAdjustment: -48
   maxAlignment:    8
   cvBytesOfCalleeSavedRegisters: 48
 fixedStack:      

 # CHECK:       DBG_VALUE_LIST ![[UVAR]], !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_plus_uconst, 1, DW_OP_LLVM_arg, 1, DW_OP_constu, 16, DW_OP_minus, DW_OP_deref, DW_OP_plus), $rdi, $rsp
 # CHECK:       DBG_VALUE_LIST ![[UVAR]], !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_plus_uconst, 1, DW_OP_LLVM_arg, 1, DW_OP_plus), $rdi, $r10
 # CHECK-LABEL: bb.2.if.end:
 # CHECK:       DBG_VALUE_LIST ![[UVAR]], !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_plus_uconst, 1, DW_OP_LLVM_arg, 1, DW_OP_plus), $rdi, $r10
 
 name:            k
 alignment:       16
 tracksRegLiveness: true
+debugInstrRef: true
 liveins:         
   - { reg: '$rdi', virtual-reg: '' }
   - { reg: '$r10', virtual-reg: '' }
 frameInfo:       
   stackSize:       48
   offsetAdjustment: -48
   maxAlignment:    8
   cvBytesOfCalleeSavedRegisters: 48

llvm/test/DebugInfo/MIR/X86/live-debug-values-stack-clobber.mir

--- |
   !18 = !DILocalVariable(name: "b", arg: 2, scope: !12, file: !3, line: 15, type: !15)
   !19 = !DILocalVariable(name: "c", scope: !12, file: !3, line: 23, type: !7)
   !28 = !DILocation(line: 1, column: 1, scope: !12)
 
 ...
 ---
 name:            f
 tracksRegLiveness: true
+debugInstrRef: true
 liveins:
   - { reg: '$rdi', virtual-reg: '' }
   - { reg: '$rsi', virtual-reg: '' }
 frameInfo:
   stackSize:       72
   offsetAdjustment: -72
   maxAlignment:    8
   adjustsStack:    true

llvm/test/DebugInfo/MIR/X86/livedebugvalues_load_in_loop.mir

--- |
   !15 = !{!16}
   !16 = !DILocalVariable(name: "myVar", scope: !12, file: !1, line: 7, type: !6)
   !17 = !DILocation(line: 10, scope: !12)
 
 ...
 ---
 name: _Z8bb_to_bb
 tracksRegLiveness: true
+debugInstrRef: true
 liveins:
   - { reg: '$rdi', virtual-reg: '' }
 stack:
   - { id: 0, name: '', type: spill-slot, offset: -8, size: 8, alignment: 8,
       stack-id: default, callee-saved-register: '', callee-saved-restored: true,
       debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
 body:  |
   bb.0.entry:

llvm/test/DebugInfo/X86/instr-ref-flag.ll

 ; RUN: llc %s -o - -stop-before=finalize-isel -march=x86-64 \
 ; RUN: | FileCheck %s --check-prefixes=INSTRREFON
 ; RUN: llc %s -o - -stop-before=finalize-isel -march=x86-64 \
 ; RUN:    -experimental-debug-variable-locations=true \
 ; RUN: | FileCheck %s --check-prefixes=INSTRREFON
 
 ; RUN: llc %s -o - -stop-before=finalize-isel -march=x86-64 \
 ; RUN:    -experimental-debug-variable-locations=false \
 ; RUN: | FileCheck %s --check-prefixes=INSTRREFOFF \
 ; RUN:    --implicit-check-not=DBG_INSTR_REF
 
 ;; This test checks that for an x86 triple, instruction referencing is used
 ;; by llc by default, and that it can be turned explicitly on or off as
 ;; desired.
 
+; INSTRREFON: debugInstrRef: true
 ; INSTRREFON: DBG_INSTR_REF
+; INSTRREFOFF: debugInstrRef: false
 ; INSTRREFOFF: DBG_VALUE
 
 target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
 target triple = "x86_64-unknown-unknown"
 
 define hidden i32 @foo(i32 %a) local_unnamed_addr !dbg !7 {
   %b = add i32 %a, 1
   call void @llvm.dbg.value(metadata i32 %b, metadata !11, metadata !DIExpression()), !dbg !12

llvm/test/DebugInfo/X86/instr-ref-track-clobbers.mir

 hasWinCFI:       false
 callsEHReturn:   false
 callsUnwindInit: false
 hasEHCatchret:   false
 hasEHScopes:     false
 hasEHFunclets:   false
 failsVerification: false
 tracksDebugUserValues: true
+debugInstrRef: true
 registers:       []
 liveins:
   - { reg: '$rdi', virtual-reg: '' }
   - { reg: '$rsi', virtual-reg: '' }
 frameInfo:
   isFrameAddressTaken: false
   isReturnAddressTaken: false
   hasStackMap:     false