[SchedBoundary] Add dump method for resource usage.

[fpetrogalli]

Summary

As supporting information, I have added an example that describes how
the indexes of the vector of resources SchedBoundary::ReservedCycles
are tracked by the field SchedBoundary::ReservedCyclesIndex.

[jroelofs]

LGTM

llvm/include/llvm/CodeGen/MachineScheduler.h

694

s/slow/slot/ ?

llvm/lib/CodeGen/MachineScheduler.cpp

2600

invert + early return?

llvm/test/CodeGen/AArch64/dump-reserved-cycles.mir

6

Probably a good idea to explicitly specify the mcpu so it's resilient to the possibility of the default changing out from under it.

[fpetrogalli]

Address code review.

[fpetrogalli]

Rebase on main branch. NFC.

[fpetrogalli]

Reopening to update with a rework after a revert of the original submission to main

[fpetrogalli]

Add -mtriple to the invocation of llc in the test to prevent it fail on non-aarch64 machines.

See for example https://lab.llvm.org/buildbot#builders/231/builds/7245

[fpetrogalli]

Rebase. NFC. (Sorting my head on how properly do a recommit, apologies for the noise).

llvm/include/llvm/CodeGen/MachineScheduler.h

private:
 
   // Is the scheduled region resource limited vs. latency limited.
   bool IsResourceLimited;
 
   // Record the highest cycle at which each resource has been reserved by a
   // scheduled instruction.
   SmallVector<unsigned, 16> ReservedCycles;
 
-  // For each PIdx, stores first index into ReservedCycles that corresponds to
-  // it.
+  /// For each PIdx, stores first index into ReservedCycles that corresponds to
+  /// it.
+  ///
+  /// For example, consider the following 3 resources (ResourceCount =
+  /// 3):
+  ///
+  ///   +------------+--------+
+  ///   |ResourceName|NumUnits|
+  ///   +------------+--------+
+  ///   |     X      |    2   |
+  ///   +------------+--------+
+  ///   |     Y      |    3   |
+  ///   +------------+--------+
+  ///   |     Z      |    1   |
+  ///   +------------+--------+
+  ///
+  /// In this case, the total number of resource instances is 6. The
+  /// vector \ref ReservedCycles will have a slow for each instance. The
+  /// vector \ref ReservedCyclesIndex will track at what index the first
+  /// instance of the resource is found in the vector of \ref
+  /// ReservedCycles:
+  ///
+  ///                              Indexes of instances in ReservedCycles
+  ///                              0   1   2   3   4  5
+  /// ReservedCyclesIndex[0] = 0; [X0, X1,
+  /// ReservedCyclesIndex[1] = 2;          Y0, Y1, Y2
+  /// ReservedCyclesIndex[2] = 5;                     Z
   SmallVector<unsigned, 16> ReservedCyclesIndex;
 
   // For each PIdx, stores the resource group IDs of its subunits
   SmallVector<APInt, 16> ResourceGroupSubUnitMasks;
 
 #if LLVM_ENABLE_ABI_BREAKING_CHECKS
   // Remember the greatest possible stall as an upper bound on the number of
   // times we should retry the pending queue because of a hazard.
public:
 
   void removeReady(SUnit *SU);
 
   /// Call this before applying any other heuristics to the Available queue.
   /// Updates the Available/Pending Q's if necessary and returns the single
   /// available instruction, or NULL if there are multiple candidates.
   SUnit *pickOnlyChoice();
 
+  /// Dump the state of the information that tracks resource usage.
+  void dumpReservedCycles() const;
   void dumpScheduledState() const;
 };
 
 /// Base class for GenericScheduler. This class maintains information about
 /// scheduling candidates based on TargetSchedModel making it easy to implement
 /// heuristics for either preRA or postRA scheduling.
 class GenericSchedulerBase : public MachineSchedStrategy {
 public:

llvm/lib/CodeGen/MachineScheduler.cpp

cl::opt<bool> VerifyScheduling(
     cl::desc("Verify machine instrs before and after machine scheduling"));
 
 #ifndef NDEBUG
 cl::opt<bool> ViewMISchedDAGs(
     "view-misched-dags", cl::Hidden,
     cl::desc("Pop up a window to show MISched dags after they are processed"));
 cl::opt<bool> PrintDAGs("misched-print-dags", cl::Hidden,
                         cl::desc("Print schedule DAGs"));
+cl::opt<bool> MISchedDumpReservedCycles(
+    "misched-dump-reserved-cycles", cl::Hidden, cl::init(false),
+    cl::desc("Dump resource usage at schedule boundary."));
 #else
 const bool ViewMISchedDAGs = false;
 const bool PrintDAGs = false;
 #endif // NDEBUG
 
 } // end namespace llvm
 
 #ifndef NDEBUG
//           "permanent hazard");
   LLVM_DEBUG(Available.dump());
 
   if (Available.size() == 1)
     return *Available.begin();
   return nullptr;
 }
 
 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
+
+/// Dump the content of the \ref ReservedCycles vector for the
+/// resources that are used in the basic block.
+///
+LLVM_DUMP_METHOD void SchedBoundary::dumpReservedCycles() const {
+  if (SchedModel->hasInstrSchedModel()) {
+
+    unsigned ResourceCount = SchedModel->getNumProcResourceKinds();
+    unsigned StartIdx = 0;
+
+    for (unsigned ResIdx = 0; ResIdx < ResourceCount; ++ResIdx) {
+      const unsigned NumUnits = SchedModel->getProcResource(ResIdx)->NumUnits;
+      std::string ResName = SchedModel->getResourceName(ResIdx);
+      for (unsigned UnitIdx = 0; UnitIdx < NumUnits; ++UnitIdx) {
+        dbgs() << ResName << "(" << UnitIdx
+               << ") = " << ReservedCycles[StartIdx + UnitIdx] << "\n";
+      }
+      StartIdx += NumUnits;
+    }
+  }
+}
+
 // This is useful information to dump after bumpNode.
 // Note that the Queue contents are more useful before pickNodeFromQueue.
 LLVM_DUMP_METHOD void SchedBoundary::dumpScheduledState() const {
   unsigned ResFactor;
   unsigned ResCount;
   if (ZoneCritResIdx) {
     ResFactor = SchedModel->getResourceFactor(ZoneCritResIdx);
     ResCount = getResourceCount(ZoneCritResIdx);
   } else {
     ResFactor = SchedModel->getMicroOpFactor();
     ResCount = RetiredMOps * ResFactor;
   }
   unsigned LFactor = SchedModel->getLatencyFactor();
   dbgs() << Available.getName() << " @" << CurrCycle << "c\n"
          << "  Retired: " << RetiredMOps;
   dbgs() << "\n  Executed: " << getExecutedCount() / LFactor << "c";
   dbgs() << "\n  Critical: " << ResCount / LFactor << "c, "
          << ResCount / ResFactor << " "
          << SchedModel->getResourceName(ZoneCritResIdx)
          << "\n  ExpectedLatency: " << ExpectedLatency << "c\n"
          << (IsResourceLimited ? "  - Resource" : "  - Latency")
          << " limited.\n";
+  if (MISchedDumpReservedCycles)
+    dumpReservedCycles();
 }
 #endif
 
 //===----------------------------------------------------------------------===//
 // GenericScheduler - Generic implementation of MachineSchedStrategy.
 //===----------------------------------------------------------------------===//
 
 void GenericSchedulerBase::SchedCandidate::

llvm/test/CodeGen/AArch64/dump-reserved-cycles.mir

+# RUN: llc -mtriple=aarch64-unknown-linux -misched-dump-reserved-cycles=true \
+# RUN: -run-pass=machine-scheduler -debug-only=machine-scheduler -o - %s 2>&1 | FileCheck %s
+
+# RUN: llc -mtriple=aarch64-unknown-linux -misched-dump-reserved-cycles=false\
+# RUN: -run-pass=machine-scheduler -debug-only=machine-scheduler -o - %s 2>&1 | FileCheck %s --check-prefix=NODUMP
+
+# REQUIRES: asserts
+---
+name: f
+tracksRegLiveness: true
+body:             |
+  bb.0:
+    liveins: $x0, $x1, $x2
+    $x3 = ADDXrr $x0, $x0
+    $x4 = ADDXrr $x1, $x1
+    $x5 = ADDXrr $x2, $x2
+
+# It is enough to check the last one of the printout of the state of
+# the schedule boundary, just before the final schedule is printed.
+
+# CHECK-LABEL:   Ready @1c
+# CHECK-NEXT:   CortexA55UnitALU +1x1u
+# CHECK-NEXT: BotQ.A @1c
+# CHECK-NEXT:   Retired: 3
+# CHECK-NEXT:   Executed: 1c
+# CHECK-NEXT:   Critical: 1c, 3 MOps
+# CHECK-NEXT:   ExpectedLatency: 0c
+# CHECK-NEXT:   - Latency limited.
+# CHECK-NEXT: CortexA55UnitALU(0) = 1
+# CHECK-NEXT: CortexA55UnitALU(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitB(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitDiv(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPDIV(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitLd(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitSt(0) = 4294967295
+# CHECK-NEXT: ** ScheduleDAGMILive::schedule picking next node
+# CHECK-NEXT: *** Final schedule for %bb.0 ***
+# CHECK-NEXT: SU(0):   $x3 = ADDXrr $x0, $x0
+# CHECK-NEXT: SU(1):   $x4 = ADDXrr $x1, $x1
+# CHECK-NEXT: SU(2):   $x5 = ADDXrr $x2, $x2
+
+# NODUMP-LABEL:   Ready @1c
+# NODUMP-NEXT:   CortexA55UnitALU +1x1u
+# NODUMP-NEXT: BotQ.A @1c
+# NODUMP-NEXT:   Retired: 3
+# NODUMP-NEXT:   Executed: 1c
+# NODUMP-NEXT:   Critical: 1c, 3 MOps
+# NODUMP-NEXT:   ExpectedLatency: 0c
+# NODUMP-NEXT:   - Latency limited.
+# NODUMP-NEXT: ** ScheduleDAGMILive::schedule picking next node
+# NODUMP-NEXT: *** Final schedule for %bb.0 ***
+# NODUMP-NEXT: SU(0):   $x3 = ADDXrr $x0, $x0
+# NODUMP-NEXT: SU(1):   $x4 = ADDXrr $x1, $x1
+# NODUMP-NEXT: SU(2):   $x5 = ADDXrr $x2, $x2
+