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Differential D138710

[AMDGPU][MC][GFX11] Disable non-VGPR src operands for v_fmac_f16_e64_dpp and v_fmac_f32_e64_dpp instructions
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Authored by dp on Nov 25 2022, 6:30 AM.

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Reviewers
Joe_Nash
foad
Commits
rGf2d589ea46d8: [AMDGPU][MC][GFX11] Disable non-VGPR src operands for VOP3_DPP variants of fmac…
Summary

Fix this bug.

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Unit TestsFailed
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TimeTest
40 msx64 debian > LLVM.CodeGen/AMDGPU::assert-wrong-alloca-addrspace.ll
Script: -- : 'RUN: at line 1'; not /var/lib/buildkite-agent/builds/llvm-project/build/bin/llc -march=amdgcn -mcpu=gfx900 -filetype=null /var/lib/buildkite-agent/builds/llvm-project/llvm/test/CodeGen/AMDGPU/assert-wrong-alloca-addrspace.ll 2>&1 | /var/lib/buildkite-agent/builds/llvm-project/build/bin/FileCheck

Event Timeline

dp created this revision.Nov 25 2022, 6:30 AM
Herald added a project: Restricted Project. · View Herald TranscriptNov 25 2022, 6:30 AM
Herald added subscribers: kosarev, kerbowa, hiraditya and 6 others. · View Herald Transcript
dp requested review of this revision.Nov 25 2022, 6:30 AM
Herald added a project: Restricted Project. · View Herald TranscriptNov 25 2022, 6:30 AM
Herald added subscribers: llvm-commits, wdng. · View Herald Transcript
Harbormaster completed remote builds in B199538: Diff 477935.Nov 25 2022, 7:17 AM
Joe_Nash added a comment.Nov 28 2022, 11:03 AM

Its not just SGPRs we want to disable, right? Its inline and literal operands too. So the commit title is slightly misleading.

llvm/lib/Target/AMDGPU/VOP2Instructions.td
429

I think it can be the following, which is more generic.

let InsVOP3Base  = getIns64<Src0VOP3DPP, Src1VOP3DPP, RegisterOperand<VGPR_32>, 3,
                       0, HasModifiers, HasModifiers, HasOMod,
                       Src0ModVOP3DPP, Src1ModVOP3DPP, Src2Mod>.ret;
dp updated this revision to Diff 478621.Nov 29 2022, 9:04 AM
dp retitled this revision from [AMDGPU][MC][GFX11] Disable SGPRs as src operands of v_fmac_f16_e64_dpp and v_fmac_f32_e64_dpp instructions to [AMDGPU][MC][GFX11] Disable non-VGPR src operands for v_fmac_f16_e64_dpp and v_fmac_f32_e64_dpp instructions.

Retitle and correct as suggested by Joe.

llvm/lib/Target/AMDGPU/VOP2Instructions.td
429

Thanks! It works and looks more logical.

Joe_Nash accepted this revision.Nov 29 2022, 9:07 AM

Thanks, LGTM

This revision is now accepted and ready to land.Nov 29 2022, 9:07 AM
Harbormaster completed remote builds in B200052: Diff 478621.Nov 29 2022, 10:58 AM
This revision was landed with ongoing or failed builds.Nov 30 2022, 3:55 AM
Closed by commit rGf2d589ea46d8: [AMDGPU][MC][GFX11] Disable non-VGPR src operands for VOP3_DPP variants of fmac… (authored by dp). · Explain Why
This revision was automatically updated to reflect the committed changes.
dp added a commit: rGf2d589ea46d8: [AMDGPU][MC][GFX11] Disable non-VGPR src operands for VOP3_DPP variants of fmac….

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PathSize
llvm/
lib/
Target/
AMDGPU/
4 lines
test/
MC/
AMDGPU/
36 lines

Diff 478621

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llvm/lib/Target/AMDGPU/VOP2Instructions.td

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llvm/test/MC/AMDGPU/gfx11_asm_err.s

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