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Differential D138482

[AMDGPU] Add encoding tests for SALU_CYCLE_2/3
ClosedPublic

Authored by piotr on Nov 22 2022, 2:03 AM.

Details

Reviewers
foad
Joe_Nash
mbrkusanin
Group Reviewers
Restricted Project
Commits
rGde767db633f6: [AMDGPU] Add encoding tests for SALU_CYCLE_2/3
Summary

Add missing assembler/disassembler tests for INSTID_SALU_CYCLE_2
and INSTID_SALU_CYCLE_3 which are possible arguments in S_DELAY_ALU.

Diff Detail

Event Timeline

piotr created this revision.Nov 22 2022, 2:03 AM
Herald added a project: Restricted Project. · View Herald TranscriptNov 22 2022, 2:03 AM
Herald added subscribers: kosarev, kerbowa, tpr and 4 others. · View Herald Transcript
piotr requested review of this revision.Nov 22 2022, 2:03 AM
Herald added a project: Restricted Project. · View Herald TranscriptNov 22 2022, 2:03 AM
Herald added subscribers: llvm-commits, wdng. · View Herald Transcript
piotr added reviewers: foad, Joe_Nash, mbrkusanin, Restricted Project.Nov 22 2022, 2:04 AM
foad accepted this revision.Nov 22 2022, 2:09 AM

and INSTID_SALU_CYCLE_2

Typo for "3". LGTM apart from that.

This revision is now accepted and ready to land.Nov 22 2022, 2:09 AM
piotr edited the summary of this revision. (Show Details)Nov 22 2022, 2:41 AM
This revision was landed with ongoing or failed builds.Nov 22 2022, 2:43 AM
Closed by commit rGde767db633f6: [AMDGPU] Add encoding tests for SALU_CYCLE_2/3 (authored by piotr). · Explain Why
This revision was automatically updated to reflect the committed changes.
piotr added a commit: rGde767db633f6: [AMDGPU] Add encoding tests for SALU_CYCLE_2/3.
Harbormaster completed remote builds in B198934: Diff 477118.Nov 22 2022, 5:09 AM

Revision Contents

PathSize
llvm/
test/
MC/
AMDGPU/
6 lines
Disassembler/
AMDGPU/
6 lines

Diff 477124

llvm/test/MC/AMDGPU/gfx11_asm_sopp.s

Show First 20 Lines • Show All 105 Lines • ▼ Show 20 Lines
// GFX11: s_delay_alu instid0(VALU_DEP_1) ; encoding: [0x01,0x00,0x87,0xbf] // GFX11: s_delay_alu instid0(VALU_DEP_1) ; encoding: [0x01,0x00,0x87,0xbf]
s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1) s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
// GFX11: s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1) ; encoding: [0x81,0x04,0x87,0xbf] // GFX11: s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1) ; encoding: [0x81,0x04,0x87,0xbf]
s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3) s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
// GFX11: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3) ; encoding: [0x91,0x01,0x87,0xbf] // GFX11: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3) ; encoding: [0x91,0x01,0x87,0xbf]
s_delay_alu instid1(SALU_CYCLE_2)
// GFX11: s_delay_alu instid1(SALU_CYCLE_2) ; encoding: [0x00,0x05,0x87,0xbf]
s_delay_alu instid1(SALU_CYCLE_3)
// GFX11: s_delay_alu instid1(SALU_CYCLE_3) ; encoding: [0x80,0x05,0x87,0xbf]
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
// s_waitcnt_depctr // s_waitcnt_depctr
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
s_waitcnt_depctr 0xfffe s_waitcnt_depctr 0xfffe
// GFX11: s_waitcnt_depctr 0xfffe ; encoding: [0xfe,0xff,0x88,0xbf] // GFX11: s_waitcnt_depctr 0xfffe ; encoding: [0xfe,0xff,0x88,0xbf]
s_waitcnt_depctr 0 s_waitcnt_depctr 0
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llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_sopp.txt

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0x01,0x00,0x87,0xbf 0x01,0x00,0x87,0xbf
# GFX11: s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1) ; encoding: [0x81,0x04,0x87,0xbf] # GFX11: s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1) ; encoding: [0x81,0x04,0x87,0xbf]
0x81,0x04,0x87,0xbf 0x81,0x04,0x87,0xbf
# GFX11: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3) ; encoding: [0x91,0x01,0x87,0xbf] # GFX11: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3) ; encoding: [0x91,0x01,0x87,0xbf]
0x91,0x01,0x87,0xbf 0x91,0x01,0x87,0xbf
# GFX11: s_delay_alu instid1(SALU_CYCLE_2) ; encoding: [0x00,0x05,0x87,0xbf]
0x00,0x05,0x87,0xbf
# GFX11: s_delay_alu instid1(SALU_CYCLE_3) ; encoding: [0x80,0x05,0x87,0xbf]
0x80,0x05,0x87,0xbf
# GFX11: s_delay_alu instid0(/* invalid instid value */) | instskip(/* invalid instskip value */) | instid1(/* invalid instid value */) ; encoding: [0xff,0x07,0x87,0xbf] # GFX11: s_delay_alu instid0(/* invalid instid value */) | instskip(/* invalid instskip value */) | instid1(/* invalid instid value */) ; encoding: [0xff,0x07,0x87,0xbf]
0xff,0x07,0x87,0xbf 0xff,0x07,0x87,0xbf
# GFX11: s_denorm_mode 0 ; encoding: [0x00,0x00,0x92,0xbf] # GFX11: s_denorm_mode 0 ; encoding: [0x00,0x00,0x92,0xbf]
0x00,0x00,0x92,0xbf 0x00,0x00,0x92,0xbf
# GFX11: s_denorm_mode 0x1234 ; encoding: [0x34,0x12,0x92,0xbf] # GFX11: s_denorm_mode 0x1234 ; encoding: [0x34,0x12,0x92,0xbf]
0x34,0x12,0x92,0xbf 0x34,0x12,0x92,0xbf
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