[mlir][LLVM] Add base type and flag support to composite type

[rriddle]

Summary

This requires defining the DIFlag enum from LLVM.

mlir/include/mlir/Dialect/LLVMIR/LLVMAttrDefs.td

def LLVM_DICompositeTypeAttr : LLVM_Attr<"DICompositeType", "di_composite_type", [
     SubElementAttrInterface
   ], "DITypeAttr"> {
   let parameters = (ins
     LLVM_DITagParameter:$tag,
     "StringAttr":$name,
     OptionalParameter<"DIFileAttr">:$file,
     "uint32_t":$line,
     OptionalParameter<"DIScopeAttr">:$scope,
+    OptionalParameter<"DITypeAttr">:$baseType,
+    OptionalParameter<"DIFlags", "DIFlags::Zero">:$flags,
     "uint64_t":$sizeInBits,
     "uint64_t":$alignInBits,
     OptionalArrayRefParameter<"DINodeAttr">:$elements
   );
   let assemblyFormat = "`<` struct(params) `>`";
 }
 
 //===----------------------------------------------------------------------===//

mlir/include/mlir/Dialect/LLVMIR/LLVMEnums.td

"LLVM debug emission kind", [
       LLVM_DIEmissionFull,
       LLVM_DIEmissionLineTablesOnly,
       LLVM_DIEmissionDebugDirectivesOnly,
     ]> {
   let cppNamespace = "::mlir::LLVM";
 }
 
 //===----------------------------------------------------------------------===//
+// DIFlags
+//===----------------------------------------------------------------------===//
+
+def LLVM_DIFlagZero : I32BitEnumAttrCaseNone<"Zero">;
+
+// The first two bits are used for a visibility enum.
+//   * Private = 1
+//   * Protected = 2
+//   * Public = 3
+def LLVM_DIFlagVisibilityBit0 : I32BitEnumAttrCaseBit<"Bit0", 0>;
+def LLVM_DIFlagVisibilityBit1 : I32BitEnumAttrCaseBit<"Bit1", 1>;
+def LLVM_DIFlagPrivate : I32BitEnumAttrCaseGroup<"Private",
+  [LLVM_DIFlagVisibilityBit0]
+>;
+def LLVM_DIFlagProtected : I32BitEnumAttrCaseGroup<"Protected",
+  [LLVM_DIFlagVisibilityBit1]
+>;
+def LLVM_DIFlagPublic : I32BitEnumAttrCaseGroup<"Public",
+  [LLVM_DIFlagVisibilityBit0, LLVM_DIFlagVisibilityBit1]
+>;
+
+// The remaining bits are used for the various flags.
+def LLVM_DIFlagFwdDecl             : I32BitEnumAttrCaseBit<"FwdDecl", 2>;
+def LLVM_DIFlagAppleBlock          : I32BitEnumAttrCaseBit<"AppleBlock", 3>;
+def LLVM_DIFlagReservedBit4        : I32BitEnumAttrCaseBit<"ReservedBit4", 4>;
+def LLVM_DIFlagVirtual             : I32BitEnumAttrCaseBit<"Virtual", 5>;
+def LLVM_DIFlagArtificial          : I32BitEnumAttrCaseBit<"Artificial", 6>;
+def LLVM_DIFlagExplicit            : I32BitEnumAttrCaseBit<"Explicit", 7>;
+def LLVM_DIFlagPrototyped          : I32BitEnumAttrCaseBit<"Prototyped", 8>;
+def LLVM_DIFlagObjcClassComplete   : I32BitEnumAttrCaseBit<"ObjcClassComplete", 9>;
+def LLVM_DIFlagObjectPointer       : I32BitEnumAttrCaseBit<"ObjectPointer", 10>;
+def LLVM_DIFlagVector              : I32BitEnumAttrCaseBit<"Vector", 11>;
+def LLVM_DIFlagStaticMember        : I32BitEnumAttrCaseBit<"StaticMember", 12>;
+def LLVM_DIFlagLValueReference     : I32BitEnumAttrCaseBit<"LValueReference", 13>;
+def LLVM_DIFlagRValueReference     : I32BitEnumAttrCaseBit<"RValueReference", 14>;
+def LLVM_DIFlagExportSymbols       : I32BitEnumAttrCaseBit<"ExportSymbols", 15>;
+def LLVM_DIFlagSingleInheritance   : I32BitEnumAttrCaseBit<"SingleInheritance", 16>;
+def LLVM_DIFlagMultipleInheritance : I32BitEnumAttrCaseBit<"MultipleInheritance", 16>;
+def LLVM_DIFlagVirtualInheritance  : I32BitEnumAttrCaseBit<"VirtualInheritance", 16>;
+def LLVM_DIFlagIntroducedVirtual   : I32BitEnumAttrCaseBit<"IntroducedVirtual", 18>;
+def LLVM_DIFlagBitField            : I32BitEnumAttrCaseBit<"BitField", 19>;
+def LLVM_DIFlagNoReturn            : I32BitEnumAttrCaseBit<"NoReturn", 20>;
+def LLVM_DIFlagTypePassByValue     : I32BitEnumAttrCaseBit<"TypePassByValue", 22>;
+def LLVM_DIFlagTypePassByReference : I32BitEnumAttrCaseBit<"TypePassByReference", 23>;
+def LLVM_DIFlagEnumClass           : I32BitEnumAttrCaseBit<"EnumClass", 24>;
+def LLVM_DIFlagThunk               : I32BitEnumAttrCaseBit<"Thunk", 25>;
+def LLVM_DIFlagNonTrivial          : I32BitEnumAttrCaseBit<"NonTrivial", 26>;
+def LLVM_DIFlagBigEndian           : I32BitEnumAttrCaseBit<"BigEndian", 27>;
+def LLVM_DIFlagLittleEndian        : I32BitEnumAttrCaseBit<"LittleEndian", 28>;
+def LLVM_DIFlagAllCallsDescribed   : I32BitEnumAttrCaseBit<"AllCallsDescribed", 29>;
+
+def DIFlags : I32BitEnumAttr<
+    "DIFlags",
+    "LLVM DI flags", [
+      LLVM_DIFlagZero,
+      LLVM_DIFlagVisibilityBit0,
+      LLVM_DIFlagVisibilityBit1,
+      LLVM_DIFlagPrivate,
+      LLVM_DIFlagProtected,
+      LLVM_DIFlagPublic,
+      LLVM_DIFlagFwdDecl,
+      LLVM_DIFlagAppleBlock,
+      LLVM_DIFlagReservedBit4,
+      LLVM_DIFlagVirtual,
+      LLVM_DIFlagArtificial,
+      LLVM_DIFlagExplicit,
+      LLVM_DIFlagPrototyped,
+      LLVM_DIFlagObjcClassComplete,
+      LLVM_DIFlagObjectPointer,
+      LLVM_DIFlagVector,
+      LLVM_DIFlagStaticMember,
+      LLVM_DIFlagLValueReference,
+      LLVM_DIFlagRValueReference,
+      LLVM_DIFlagExportSymbols,
+      LLVM_DIFlagSingleInheritance,
+      LLVM_DIFlagMultipleInheritance,
+      LLVM_DIFlagVirtualInheritance,
+      LLVM_DIFlagIntroducedVirtual,
+      LLVM_DIFlagBitField,
+      LLVM_DIFlagNoReturn,
+      LLVM_DIFlagTypePassByValue,
+      LLVM_DIFlagTypePassByReference,
+      LLVM_DIFlagEnumClass,
+      LLVM_DIFlagThunk,
+      LLVM_DIFlagNonTrivial,
+      LLVM_DIFlagBigEndian,
+      LLVM_DIFlagLittleEndian,
+      LLVM_DIFlagAllCallsDescribed
+    ]> {
+  let cppNamespace = "::mlir::LLVM";
+  let printBitEnumPrimaryGroups = 1;
+}
+
+//===----------------------------------------------------------------------===//
 // DISubprogramFlags
 //===----------------------------------------------------------------------===//
 
 def LLVM_DISPVirtual        : I32BitEnumAttrCaseBit<"Virtual", 0>;
 def LLVM_DISPPureVirtual    : I32BitEnumAttrCaseBit<"PureVirtual", 1>;
 def LLVM_DISPLocalToUnit    : I32BitEnumAttrCaseBit<"LocalToUnit", 2>;
 def LLVM_DISPDefinition     : I32BitEnumAttrCaseBit<"Definition", 3>;
 def LLVM_DISPOptimized      : I32BitEnumAttrCaseBit<"Optimized", 4>;

mlir/lib/Target/LLVMIR/DebugTranslation.cpp

 
 llvm::DICompositeType *
 DebugTranslation::translateImpl(DICompositeTypeAttr attr) {
   SmallVector<llvm::Metadata *> elements;
   for (auto member : attr.getElements())
     elements.push_back(translate(member));
   return llvm::DICompositeType::get(
       llvmCtx, attr.getTag(), attr.getName(), translate(attr.getFile()),
-      attr.getLine(), translate(attr.getScope()), /*BaseType=*/nullptr,
+      attr.getLine(), translate(attr.getScope()), translate(attr.getBaseType()),
       attr.getSizeInBits(), attr.getAlignInBits(),
-      /*OffsetInBits=*/0, /*Flags=*/llvm::DINode::FlagZero,
+      /*OffsetInBits=*/0,
+      /*Flags=*/static_cast<llvm::DINode::DIFlags>(attr.getFlags()),
       llvm::MDNode::get(llvmCtx, elements),
       /*RuntimeLang=*/0, /*VTableHolder=*/nullptr);
 }
 
 llvm::DIDerivedType *DebugTranslation::translateImpl(DIDerivedTypeAttr attr) {
   return llvm::DIDerivedType::get(
       llvmCtx, attr.getTag(), attr.getName(), /*File=*/nullptr, /*Line=*/0,
       /*Scope=*/nullptr, translate(attr.getBaseType()), attr.getSizeInBits(),

mlir/test/Target/LLVMIR/llvmir-debug.mlir

#cu = #llvm.di_compile_unit<
   sourceLanguage = DW_LANG_C, file = #file, producer = "MLIR",
   isOptimized = true, emissionKind = Full
 >
 #composite = #llvm.di_composite_type<
   tag = DW_TAG_structure_type, name = "composite", file = #file,
   line = 0, sizeInBits = 0, alignInBits = 0,
   elements = #llvm.di_subrange<count = 4>
 >
-#spType = #llvm.di_subroutine_type<callingConvention = DW_CC_normal, types = #si64, #composite>
+#vector = #llvm.di_composite_type<
+  tag = DW_TAG_array_type, name = "array", file = #file,
+  line = 0, baseType = #si64, sizeInBits = 0, alignInBits = 0,
+  flags = Vector,
+  elements = #llvm.di_subrange<count = 4>
+>
+#spType = #llvm.di_subroutine_type<callingConvention = DW_CC_normal, types = #si64, #composite, #vector>
 #sp = #llvm.di_subprogram<
   compileUnit = #cu, scope = #file, name = "intrinsics", linkageName = "intrinsics",
   file = #file, line = 3, scopeLine = 3, subprogramFlags = "Definition|Optimized", type = #spType
 >
 #fileScope = #llvm.di_lexical_block_file<scope = #sp, file = #file, descriminator = 0>
 #variable = #llvm.di_local_variable<scope = #fileScope, name = "arg", file = #file, line = 6, arg = 1, alignInBits = 0, type = #si64>
 
 // CHECK-LABEL: define void @func_with_debug(
llvm.func @func_with_debug(%arg: i64) {
   llvm.return
 } loc(fused<#sp>["foo.mlir":1:1])
 
 // CHECK: ![[CU_LOC:.*]] = distinct !DICompileUnit(language: DW_LANG_C, file: ![[CU_FILE_LOC:.*]], producer: "MLIR", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug)
 // CHECK: ![[CU_FILE_LOC]] = !DIFile(filename: "foo.mlir", directory: "/test/")
 
 // CHECK: ![[FUNC_LOC]] = distinct !DISubprogram(name: "intrinsics", linkageName: "intrinsics", scope: ![[CU_FILE_LOC]], file: ![[CU_FILE_LOC]], line: 3, type: ![[FUNC_TYPE:.*]], scopeLine: 3, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: ![[CU_LOC]])
 // CHECK: ![[FUNC_TYPE]] = !DISubroutineType(cc: DW_CC_normal, types: ![[ARG_TYPES:.*]])
-// CHECK: ![[ARG_TYPES]] = !{![[ARG_TYPE:.*]], ![[COMPOSITE_TYPE:.*]]}
+// CHECK: ![[ARG_TYPES]] = !{![[ARG_TYPE:.*]], ![[COMPOSITE_TYPE:.*]], ![[VECTOR_TYPE:.*]]}
 // CHECK: ![[ARG_TYPE]] = !DIBasicType(name: "si64", encoding: DW_ATE_signed)
 // CHECK: ![[COMPOSITE_TYPE]] = !DICompositeType(tag: DW_TAG_structure_type, name: "composite", file: ![[CU_FILE_LOC]], elements: ![[COMPOSITE_ELEMENTS:.*]])
 // CHECK: ![[COMPOSITE_ELEMENTS]] = !{![[COMPOSITE_ELEMENT:.*]]}
 // CHECK: ![[COMPOSITE_ELEMENT]] = !DISubrange(count: 4)
-
+// CHECK: ![[VECTOR_TYPE]] = !DICompositeType(tag: DW_TAG_array_type, name: "array", file: ![[CU_FILE_LOC]], baseType: ![[ARG_TYPE]], flags: DIFlagVector
 // CHECK: ![[VAR_LOC]] = !DILocalVariable(name: "arg", arg: 1, scope: ![[VAR_SCOPE:.*]], file: ![[CU_FILE_LOC]], line: 6, type: ![[ARG_TYPE]])
 // CHECK: ![[VAR_SCOPE]] = distinct !DILexicalBlockFile(scope: ![[FUNC_LOC]], file: ![[CU_FILE_LOC]], discriminator: 0)
 
 // CHECK-DAG: ![[CALLSITE_LOC]] = !DILocation(line: 3, column: 4,
 // CHECK-DAG: ![[FILE_LOC]] = !DILocation(line: 1, column: 2,
 // CHECK-DAG: ![[NAMED_LOC]] = !DILocation(line: 10, column: 10
 // CHECK-DAG: ![[FUSED_LOC]] = !DILocation(line: 1, column: 1