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Differential D135975

[BranchRelaxation] Fix test for duplicate branch instruction
ClosedPublic

Authored by gandhi21299 on Oct 14 2022, 10:59 AM.

Details

Reviewers
arsenm
bcahoon
Commits
rG94ac8f3a8cf9: [BranchRelaxation] Fix test for duplicate branch instruction
Summary

This patch is a follow up for D134557, inserting a check
for a duplicate unconditional branch to fall through.

Diff Detail

Event Timeline

gandhi21299 created this revision.Oct 14 2022, 10:59 AM
Herald added a project: Restricted Project. · View Herald TranscriptOct 14 2022, 10:59 AM
Herald added subscribers: kosarev, kerbowa, jvesely. · View Herald Transcript
gandhi21299 requested review of this revision.Oct 14 2022, 10:59 AM
Herald added a project: Restricted Project. · View Herald TranscriptOct 14 2022, 10:59 AM
Herald added subscribers: llvm-commits, wdng. · View Herald Transcript
arsenm accepted this revision.Oct 14 2022, 11:18 AM
This revision is now accepted and ready to land.Oct 14 2022, 11:18 AM
This revision was landed with ongoing or failed builds.Oct 14 2022, 11:22 AM
Closed by commit rG94ac8f3a8cf9: [BranchRelaxation] Fix test for duplicate branch instruction (authored by gandhi21299). · Explain Why
This revision was automatically updated to reflect the committed changes.
gandhi21299 added a commit: rG94ac8f3a8cf9: [BranchRelaxation] Fix test for duplicate branch instruction.
Harbormaster completed remote builds in B192228: Diff 467842.Oct 14 2022, 12:16 PM
foad added a subscriber: foad.Dec 14 2022, 4:18 AM
foad added inline comments.
llvm/test/CodeGen/AMDGPU/branch-relax-no-terminators.mir
100

This won't survive the next time someone regenerates the checks for this file.

gandhi21299 added inline comments.Dec 14 2022, 10:50 AM
llvm/test/CodeGen/AMDGPU/branch-relax-no-terminators.mir
100

Should I get rid of that specific line then?

foad added inline comments.Dec 14 2022, 11:09 PM
llvm/test/CodeGen/AMDGPU/branch-relax-no-terminators.mir
100

That already happened when I regenerated the checks for D140012. But it wasn't doing anything useful anyway because it was surrounded by CHECK-NEXT lines which would have failed if an extra S_BRANCH instruction appeared.

arsenm added a comment.Dec 15 2022, 4:20 AM

There’s definitely something broken with block handling in update_mir_test_checks

Revision Contents

PathSize
llvm/
test/
CodeGen/
AMDGPU/
2 lines

Diff 467855

llvm/test/CodeGen/AMDGPU/branch-relax-no-terminators.mir

Show First 20 Lines • Show All 91 Lines • ▼ Show 20 Linesbody: |
; CHECK-NEXT: $sgpr4 = S_MOV_B32 killed $sgpr5 ; CHECK-NEXT: $sgpr4 = S_MOV_B32 killed $sgpr5
; CHECK-NEXT: $sgpr5 = S_MOV_B32 killed $sgpr6 ; CHECK-NEXT: $sgpr5 = S_MOV_B32 killed $sgpr6
; CHECK-NEXT: $sgpr6 = S_MOV_B32 killed $sgpr7 ; CHECK-NEXT: $sgpr6 = S_MOV_B32 killed $sgpr7
; CHECK-NEXT: $sgpr7 = S_MOV_B32 killed $sgpr8 ; CHECK-NEXT: $sgpr7 = S_MOV_B32 killed $sgpr8
; CHECK-NEXT: $sgpr8 = S_MOV_B32 killed $sgpr9 ; CHECK-NEXT: $sgpr8 = S_MOV_B32 killed $sgpr9
; CHECK-NEXT: $sgpr9 = S_MOV_B32 killed $sgpr10 ; CHECK-NEXT: $sgpr9 = S_MOV_B32 killed $sgpr10
; CHECK-NEXT: $sgpr10 = S_MOV_B32 killed $sgpr11 ; CHECK-NEXT: $sgpr10 = S_MOV_B32 killed $sgpr11
; CHECK-NEXT: S_BRANCH %bb.4 ; CHECK-NEXT: S_BRANCH %bb.4
; CHECK-NOT: S_BRANCH %bb.4
foadUnsubmitted
Not Done
ReplyInline Actions

This won't survive the next time someone regenerates the checks for this file.

foad: This won't survive the next time someone regenerates the checks for this file.
gandhi21299AuthorUnsubmitted
Done
ReplyInline Actions

Should I get rid of that specific line then?

gandhi21299: Should I get rid of that specific line then?
foadUnsubmitted
Not Done
ReplyInline Actions

That already happened when I regenerated the checks for D140012. But it wasn't doing anything useful anyway because it was surrounded by CHECK-NEXT lines which would have failed if an extra S_BRANCH instruction appeared.

foad: That already happened when I regenerated the checks for D140012. But it wasn't doing anything…
; CHECK-NEXT: {{ $}} ; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.6: ; CHECK-NEXT: bb.6:
; CHECK-NEXT: successors: %bb.4(0x80000000) ; CHECK-NEXT: successors: %bb.4(0x80000000)
; CHECK-NEXT: liveins: $vcc_hi, $vcc_lo, $sgpr4, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $sgpr10, $sgpr11, $sgpr12, $sgpr13, $sgpr14, $sgpr15, $sgpr16, $sgpr17, $sgpr18, $sgpr19, $sgpr20, $sgpr21, $sgpr22, $sgpr23, $sgpr24, $sgpr25, $sgpr26, $sgpr27, $sgpr28, $sgpr29, $sgpr30, $sgpr31, $sgpr34, $sgpr35, $sgpr36, $sgpr37, $sgpr38, $sgpr39, $sgpr40, $sgpr41, $sgpr42, $sgpr43, $sgpr44, $sgpr45, $sgpr46, $sgpr47, $sgpr48, $sgpr49, $sgpr50, $sgpr51, $sgpr52, $sgpr53, $sgpr54, $sgpr55, $sgpr56, $sgpr57, $sgpr58, $sgpr59, $sgpr60, $sgpr61, $sgpr62, $sgpr63, $sgpr64, $sgpr65, $sgpr66, $sgpr67, $sgpr68, $sgpr69, $sgpr70, $sgpr71, $sgpr72, $sgpr73, $sgpr74, $sgpr75, $sgpr76, $sgpr77, $sgpr78, $sgpr79, $sgpr80, $sgpr81, $sgpr82, $sgpr83, $sgpr84, $sgpr85, $sgpr86, $sgpr87, $sgpr88, $sgpr89, $sgpr90, $sgpr91, $sgpr92, $sgpr93, $sgpr94, $sgpr95, $sgpr96, $sgpr97, $sgpr98, $sgpr99, $sgpr100, $sgpr101, $vgpr0, $vgpr1, $vgpr2, $sgpr33 ; CHECK-NEXT: liveins: $vcc_hi, $vcc_lo, $sgpr4, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $sgpr10, $sgpr11, $sgpr12, $sgpr13, $sgpr14, $sgpr15, $sgpr16, $sgpr17, $sgpr18, $sgpr19, $sgpr20, $sgpr21, $sgpr22, $sgpr23, $sgpr24, $sgpr25, $sgpr26, $sgpr27, $sgpr28, $sgpr29, $sgpr30, $sgpr31, $sgpr34, $sgpr35, $sgpr36, $sgpr37, $sgpr38, $sgpr39, $sgpr40, $sgpr41, $sgpr42, $sgpr43, $sgpr44, $sgpr45, $sgpr46, $sgpr47, $sgpr48, $sgpr49, $sgpr50, $sgpr51, $sgpr52, $sgpr53, $sgpr54, $sgpr55, $sgpr56, $sgpr57, $sgpr58, $sgpr59, $sgpr60, $sgpr61, $sgpr62, $sgpr63, $sgpr64, $sgpr65, $sgpr66, $sgpr67, $sgpr68, $sgpr69, $sgpr70, $sgpr71, $sgpr72, $sgpr73, $sgpr74, $sgpr75, $sgpr76, $sgpr77, $sgpr78, $sgpr79, $sgpr80, $sgpr81, $sgpr82, $sgpr83, $sgpr84, $sgpr85, $sgpr86, $sgpr87, $sgpr88, $sgpr89, $sgpr90, $sgpr91, $sgpr92, $sgpr93, $sgpr94, $sgpr95, $sgpr96, $sgpr97, $sgpr98, $sgpr99, $sgpr100, $sgpr101, $vgpr0, $vgpr1, $vgpr2, $sgpr33
; CHECK-NEXT: {{ $}} ; CHECK-NEXT: {{ $}}
; CHECK-NEXT: $sgpr0 = V_READLANE_B32 $vgpr2, 0, implicit-def $sgpr0_sgpr1 ; CHECK-NEXT: $sgpr0 = V_READLANE_B32 $vgpr2, 0, implicit-def $sgpr0_sgpr1
; CHECK-NEXT: $sgpr1 = V_READLANE_B32 killed $vgpr2, 1 ; CHECK-NEXT: $sgpr1 = V_READLANE_B32 killed $vgpr2, 1
; CHECK-NEXT: $vgpr2 = BUFFER_LOAD_DWORD_OFFSET $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, 0, implicit $exec :: (load (s32) from %stack.0, addrspace 5) ; CHECK-NEXT: $vgpr2 = BUFFER_LOAD_DWORD_OFFSET $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, 0, implicit $exec :: (load (s32) from %stack.0, addrspace 5)
▲ Show 20 Lines • Show All 51 Lines • ▼ Show 20 Lines bb.3:
$sgpr4 = S_MOV_B32 killed $sgpr5 $sgpr4 = S_MOV_B32 killed $sgpr5
$sgpr5 = S_MOV_B32 killed $sgpr6 $sgpr5 = S_MOV_B32 killed $sgpr6
$sgpr6 = S_MOV_B32 killed $sgpr7 $sgpr6 = S_MOV_B32 killed $sgpr7
$sgpr7 = S_MOV_B32 killed $sgpr8 $sgpr7 = S_MOV_B32 killed $sgpr8
$sgpr8 = S_MOV_B32 killed $sgpr9 $sgpr8 = S_MOV_B32 killed $sgpr9
$sgpr9 = S_MOV_B32 killed $sgpr10 $sgpr9 = S_MOV_B32 killed $sgpr10
$sgpr10 = S_MOV_B32 killed $sgpr11 $sgpr10 = S_MOV_B32 killed $sgpr11
S_BRANCH %bb.4
bb.4: bb.4:
liveins: $vcc_hi, $vcc_lo, $sgpr4, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $sgpr10, $sgpr11, $sgpr12, $sgpr13, $sgpr14, $sgpr15, $sgpr16, $sgpr17, $sgpr18, $sgpr19, $sgpr20, $sgpr21, $sgpr22, $sgpr23, $sgpr24, $sgpr25, $sgpr26, $sgpr27, $sgpr28, $sgpr29, $sgpr30, $sgpr31, $sgpr34, $sgpr35, $sgpr36, $sgpr37, $sgpr38, $sgpr39, $sgpr40, $sgpr41, $sgpr42, $sgpr43, $sgpr44, $sgpr45, $sgpr46, $sgpr47, $sgpr48, $sgpr49, $sgpr50, $sgpr51, $sgpr52, $sgpr53, $sgpr54, $sgpr55, $sgpr56, $sgpr57, $sgpr58, $sgpr59, $sgpr60, $sgpr61, $sgpr62, $sgpr63, $sgpr64, $sgpr65, $sgpr66, $sgpr67, $sgpr68, $sgpr69, $sgpr70, $sgpr71, $sgpr72, $sgpr73, $sgpr74, $sgpr75, $sgpr76, $sgpr77, $sgpr78, $sgpr79, $sgpr80, $sgpr81, $sgpr82, $sgpr83, $sgpr84, $sgpr85, $sgpr86, $sgpr87, $sgpr88, $sgpr89, $sgpr90, $sgpr91, $sgpr92, $sgpr93, $sgpr94, $sgpr95, $sgpr96, $sgpr97, $sgpr98, $sgpr99, $sgpr100, $sgpr101, $vgpr0, $vgpr1, $sgpr0, $sgpr1, $sgpr2, $sgpr3, $sgpr32, $sgpr33, $sgpr0_sgpr1_sgpr2_sgpr3 liveins: $vcc_hi, $vcc_lo, $sgpr4, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $sgpr10, $sgpr11, $sgpr12, $sgpr13, $sgpr14, $sgpr15, $sgpr16, $sgpr17, $sgpr18, $sgpr19, $sgpr20, $sgpr21, $sgpr22, $sgpr23, $sgpr24, $sgpr25, $sgpr26, $sgpr27, $sgpr28, $sgpr29, $sgpr30, $sgpr31, $sgpr34, $sgpr35, $sgpr36, $sgpr37, $sgpr38, $sgpr39, $sgpr40, $sgpr41, $sgpr42, $sgpr43, $sgpr44, $sgpr45, $sgpr46, $sgpr47, $sgpr48, $sgpr49, $sgpr50, $sgpr51, $sgpr52, $sgpr53, $sgpr54, $sgpr55, $sgpr56, $sgpr57, $sgpr58, $sgpr59, $sgpr60, $sgpr61, $sgpr62, $sgpr63, $sgpr64, $sgpr65, $sgpr66, $sgpr67, $sgpr68, $sgpr69, $sgpr70, $sgpr71, $sgpr72, $sgpr73, $sgpr74, $sgpr75, $sgpr76, $sgpr77, $sgpr78, $sgpr79, $sgpr80, $sgpr81, $sgpr82, $sgpr83, $sgpr84, $sgpr85, $sgpr86, $sgpr87, $sgpr88, $sgpr89, $sgpr90, $sgpr91, $sgpr92, $sgpr93, $sgpr94, $sgpr95, $sgpr96, $sgpr97, $sgpr98, $sgpr99, $sgpr100, $sgpr101, $vgpr0, $vgpr1, $sgpr0, $sgpr1, $sgpr2, $sgpr3, $sgpr32, $sgpr33, $sgpr0_sgpr1_sgpr2_sgpr3
$sgpr101 = V_READLANE_B32 $vgpr1, 6 $sgpr101 = V_READLANE_B32 $vgpr1, 6
$sgpr100 = V_READLANE_B32 $vgpr1, 5 $sgpr100 = V_READLANE_B32 $vgpr1, 5
$sgpr4_sgpr5 = S_OR_SAVEEXEC_B64 -1, implicit-def $exec, implicit-def dead $scc, implicit $exec $sgpr4_sgpr5 = S_OR_SAVEEXEC_B64 -1, implicit-def $exec, implicit-def dead $scc, implicit $exec
$vgpr0 = BUFFER_LOAD_DWORD_OFFSET $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, 0, implicit $exec $vgpr0 = BUFFER_LOAD_DWORD_OFFSET $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, 0, implicit $exec
$vgpr1 = BUFFER_LOAD_DWORD_OFFSET $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 4, 0, 0, 0, implicit $exec $vgpr1 = BUFFER_LOAD_DWORD_OFFSET $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 4, 0, 0, 0, implicit $exec
$exec = S_MOV_B64 killed $sgpr4_sgpr5 $exec = S_MOV_B64 killed $sgpr4_sgpr5
S_WAITCNT 3952 S_WAITCNT 3952
S_SETPC_B64_return undef $sgpr30_sgpr31 S_SETPC_B64_return undef $sgpr30_sgpr31
... ...