[mlir][llvm] Use TableGen to import compare ops from LLVM IR.

[gysit]

Summary

The revision imports compare operations using TableGen generated
builders, instead of using the special handlers defined by the Importer.
It therefore adds a new llvmArgIndexes field that allows to specify
a mapping between MLIR argument and LLVM IR operand indexes if they do
not match. Additionally, the FCmp op is extended with an additional
builder and all compare operations are extended with verification
traits to ensure the operands types match. These extensions simplify
the logic of the newly introduced builders and are in line with the
compare operations define by the arithmetic dialect.

[ftynse]

mlir/include/mlir/Dialect/LLVMIR/LLVMOpBase.td

240

Ultra-nit

mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp

97–105

Nit: maybe we can overload LLVM::getVectorType to take llvm::ElementCount.

mlir/test/Target/LLVMIR/Import/instructions.ll

51

Any reason why this has to be on the next line? Otherwise I'd just CHECK. We also have a tendency to intersperse check lines and IR lines to improve the readability flow of long segments.

mlir/tools/mlir-tblgen/LLVMIRConversionGen.cpp

213–215

would llvm::append_range(llvmArgIndices, seq<int64_t>(...)) work here?

234

You may want to error out when a variadic operand is used.

[gysit]

mlir/test/Target/LLVMIR/Import/instructions.ll

51

The intention was to make sure I did not miss a line. I will then switch back to interspersing check and ir for these long test functions!

[ftynse]

mlir/test/Target/LLVMIR/Import/instructions.ll

51

If you intersperse, you see that you haven't missed a line :)

[gysit]

Address comments.

mlir/include/mlir/Dialect/LLVMIR/LLVMOpBase.td

class LLVM_OpBase<Dialect dialect, string mnemonic, list<Trait> traits = []> :
   //             name matches the result name, by a reference to store the
   //             result of the newly created MLIR operation to;
   //   - $_int_attr - substituted by a call to an integer attribute matcher;
   //   - $_resultType - substituted with the MLIR result type;
   //   - $_location - substituted with the MLIR location;
   //   - $_builder - substituted with the MLIR builder;
   //   - $_qualCppClassName - substitiuted with the MLIR operation class name.
   // Additionally, `$$` can be used to produce the dollar character.
-  // NOTE: The $name variable resolution assumes the MLIR and LLVM argument
-  // orders match and there are no optional or variadic arguments.
+  // FIXME: The $name variable resolution does not support variadic arguments.
   string mlirBuilder = "";
+
+  // An array that specifies a mapping from MLIR argument indices to LLVM IR
+  // operand indices. The mapping is necessary since argument and operand
+  // indices do not always match. If not defined, the array is set to the
+  // identity permutation. An operation may define any custom index permutation
+  // and set a specific argument index to -1 if it does not map to an LLVM IR
+  // operand.
+  list<int> llvmArgIndices = [];
 }
 
 //===----------------------------------------------------------------------===//
 // Base classes for LLVM dialect operations.
 //===----------------------------------------------------------------------===//
 
 // Base class for LLVM operations. All operations get an "llvm." prefix in
 // their name automatically. LLVM operations have either zero or one result,

mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td

def ICmpPredicate : I64EnumAttr<
     "ICmpPredicate",
     "llvm.icmp comparison predicate",
     [ICmpPredicateEQ, ICmpPredicateNE, ICmpPredicateSLT, ICmpPredicateSLE,
      ICmpPredicateSGT, ICmpPredicateSGE, ICmpPredicateULT, ICmpPredicateULE,
      ICmpPredicateUGT, ICmpPredicateUGE]> {
   let cppNamespace = "::mlir::LLVM";
 }
 
+// Base class for compare operations. A compare operation takes two operands
+// of the same type and returns a boolean result. If the operands are
+// vectors, then the result has to be a boolean vector of the same shape.
+class LLVM_ArithmeticCmpOp<string mnemonic, list<Trait> traits = []> :
+    LLVM_Op<mnemonic, traits # [SameTypeOperands, TypesMatchWith<
+    "result type has i1 element type and same shape as operands",
+    "lhs", "res", "::getI1SameShape($_self)">]> {
+  let results = (outs LLVM_ScalarOrVectorOf<I1>:$res);
+}
+
 // Other integer operations.
-def LLVM_ICmpOp : LLVM_Op<"icmp", [Pure]> {
+def LLVM_ICmpOp : LLVM_ArithmeticCmpOp<"icmp", [Pure]> {
   let arguments = (ins ICmpPredicate:$predicate,
-                   AnyTypeOf<[LLVM_ScalarOrVectorOf<AnyInteger>, LLVM_ScalarOrVectorOf<LLVM_AnyPointer>]>:$lhs,
-                   AnyTypeOf<[LLVM_ScalarOrVectorOf<AnyInteger>, LLVM_ScalarOrVectorOf<LLVM_AnyPointer>]>:$rhs);
-  let results = (outs LLVM_ScalarOrVectorOf<I1>:$res);
-  let llvmBuilder = [{
-    $res = builder.CreateICmp(getLLVMCmpPredicate($predicate), $lhs, $rhs);
-  }];
+                   AnyTypeOf<[LLVM_ScalarOrVectorOf<AnyInteger>,
+                              LLVM_ScalarOrVectorOf<LLVM_AnyPointer>]>:$lhs,
+                   AnyTypeOf<[LLVM_ScalarOrVectorOf<AnyInteger>,
+                              LLVM_ScalarOrVectorOf<LLVM_AnyPointer>]>:$rhs);
   let builders = [
     OpBuilder<(ins "ICmpPredicate":$predicate, "Value":$lhs, "Value":$rhs)>
   ];
   let hasCustomAssemblyFormat = 1;
+  string llvmInstName = "ICmp";
+  string llvmBuilder = [{
+    $res = builder.CreateICmp(getLLVMCmpPredicate($predicate), $lhs, $rhs);
+  }];
+  string mlirBuilder = [{
+    auto *iCmpInst = cast<llvm::ICmpInst>(inst);
+    $res = $_builder.create<$_qualCppClassName>(
+      $_location, getICmpPredicate(iCmpInst->getPredicate()), $lhs, $rhs);
+  }];
+  // Set the $predicate index to -1 to indicate there is no matching operand
+  // and decrement the following indices.
+  list<int> llvmArgIndices = [-1, 0, 1];
 }
 
 // Predicate for float comparisons
 def FCmpPredicateFALSE  : I64EnumAttrCase<"_false", 0>;
 def FCmpPredicateOEQ    : I64EnumAttrCase<"oeq", 1>;
 def FCmpPredicateOGT    : I64EnumAttrCase<"ogt", 2>;
 def FCmpPredicateOGE    : I64EnumAttrCase<"oge", 3>;
 def FCmpPredicateOLT    : I64EnumAttrCase<"olt", 4>;
def FCmpPredicate : I64EnumAttr<
      FCmpPredicateOLT, FCmpPredicateOLE, FCmpPredicateONE, FCmpPredicateORD,
      FCmpPredicateUEQ, FCmpPredicateUGT, FCmpPredicateUGE, FCmpPredicateULT,
      FCmpPredicateULE, FCmpPredicateUNE, FCmpPredicateUNO, FCmpPredicateTRUE
     ]> {
   let cppNamespace = "::mlir::LLVM";
 }
 
 // Other floating-point operations.
-def LLVM_FCmpOp : LLVM_Op<"fcmp", [
+def LLVM_FCmpOp : LLVM_ArithmeticCmpOp<"fcmp", [
     Pure, DeclareOpInterfaceMethods<FastmathFlagsInterface>]> {
   let arguments = (ins FCmpPredicate:$predicate,
                    LLVM_ScalarOrVectorOf<LLVM_AnyFloat>:$lhs,
                    LLVM_ScalarOrVectorOf<LLVM_AnyFloat>:$rhs,
                    DefaultValuedAttr<LLVM_FMFAttr, "{}">:$fastmathFlags);
-  let results = (outs LLVM_ScalarOrVectorOf<I1>:$res);
-  let llvmBuilder = [{
+  let builders = [
+    OpBuilder<(ins "FCmpPredicate":$predicate, "Value":$lhs, "Value":$rhs)>
+  ];
+  let hasCustomAssemblyFormat = 1;
+  string llvmInstName = "FCmp";
+  string llvmBuilder = [{
     $res = builder.CreateFCmp(getLLVMCmpPredicate($predicate), $lhs, $rhs);
   }];
-  let hasCustomAssemblyFormat = 1;
+  // FIXME: Import fastmath flags.
+  string mlirBuilder = [{
+    auto *fCmpInst = cast<llvm::FCmpInst>(inst);
+    $res = $_builder.create<$_qualCppClassName>(
+      $_location, getFCmpPredicate(fCmpInst->getPredicate()), $lhs, $rhs);
+  }];
+  // Set the $predicate index to -1 to indicate there is no matching operand
+  // and decrement the following indices.
+  list<int> llvmArgIndices = [-1, 0, 1, 2];
 }
 
 // Floating point binary operations.
 def LLVM_FAddOp : LLVM_FloatArithmeticOp<"fadd", "FAdd">;
 def LLVM_FSubOp : LLVM_FloatArithmeticOp<"fsub", "FSub">;
 def LLVM_FMulOp : LLVM_FloatArithmeticOp<"fmul", "FMul">;
 def LLVM_FDivOp : LLVM_FloatArithmeticOp<"fdiv", "FDiv">;
 def LLVM_FRemOp : LLVM_FloatArithmeticOp<"frem", "FRem">;

mlir/include/mlir/Dialect/LLVMIR/LLVMTypes.h

 /// Returns whether a vector type is scalable or not.
 bool isScalableVectorType(Type vectorType);
 
 /// Creates an LLVM dialect-compatible vector type with the given element type
 /// and length.
 Type getVectorType(Type elementType, unsigned numElements,
                    bool isScalable = false);
 
+/// Creates an LLVM dialect-compatible vector type with the given element type
+/// and length.
+Type getVectorType(Type elementType, const llvm::ElementCount &numElements);
+
 /// Creates an LLVM dialect-compatible type with the given element type and
 /// length.
 Type getFixedVectorType(Type elementType, unsigned numElements);
 
 /// Creates an LLVM dialect-compatible type with the given element type and
 /// length.
 Type getScalableVectorType(Type elementType, unsigned numElements);
 

mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp

static LogicalResult verifySymbolAttrUse(FlatSymbolRefAttr symbol,
   if (!func)
     return op->emitOpError("'")
            << name << "' does not reference a valid LLVM function";
   if (func.isExternal())
     return op->emitOpError("'") << name << "' does not have a definition";
   return success();
 }
 
+/// Returns a boolean type that has the same shape as `type`. It supports both
+/// fixed size vectors as well as scalable vectors.
+static Type getI1SameShape(Type type) {
+  Type i1Type = IntegerType::get(type.getContext(), 1);
+  if (LLVM::isCompatibleVectorType(type))
+    return LLVM::getVectorType(i1Type, LLVM::getVectorNumElements(type));
+  return i1Type;
+}
+
 //===----------------------------------------------------------------------===//
 // Printing, parsing and builder for LLVM::CmpOp.
 //===----------------------------------------------------------------------===//
 
 void ICmpOp::build(OpBuilder &builder, OperationState &result,
                    ICmpPredicate predicate, Value lhs, Value rhs) {
-  auto boolType = IntegerType::get(lhs.getType().getContext(), 1);
-  if (LLVM::isCompatibleVectorType(lhs.getType()) ||
-      LLVM::isCompatibleVectorType(rhs.getType())) {
-    int64_t numLHSElements = 1, numRHSElements = 1;
-    if (LLVM::isCompatibleVectorType(lhs.getType()))
-      numLHSElements =
-          LLVM::getVectorNumElements(lhs.getType()).getFixedValue();
-    if (LLVM::isCompatibleVectorType(rhs.getType()))
-      numRHSElements =
-          LLVM::getVectorNumElements(rhs.getType()).getFixedValue();
-    build(builder, result,
-          VectorType::get({std::max(numLHSElements, numRHSElements)}, boolType),
-          predicate, lhs, rhs);
-  } else {
-    build(builder, result, boolType, predicate, lhs, rhs);
-  }
+  build(builder, result, getI1SameShape(lhs.getType()), predicate, lhs, rhs);
+
+void FCmpOp::build(OpBuilder &builder, OperationState &result,
+                   FCmpPredicate predicate, Value lhs, Value rhs) {
+  build(builder, result, getI1SameShape(lhs.getType()), predicate, lhs, rhs);
 }
 
 void ICmpOp::print(OpAsmPrinter &p) {
   p << " \"" << stringifyICmpPredicate(getPredicate()) << "\" " << getOperand(0)
     << ", " << getOperand(1);
   p.printOptionalAttrDict((*this)->getAttrs(), {"predicate"});
   p << " : " << getLhs().getType();
 }
 
 void FCmpOp::print(OpAsmPrinter &p) {
   p << " \"" << stringifyFCmpPredicate(getPredicate()) << "\" " << getOperand(0)
     << ", " << getOperand(1);
   p.printOptionalAttrDict(processFMFAttr((*this)->getAttrs()), {"predicate"});
   p << " : " << getLhs().getType();
 }
 
 // <operation> ::= `llvm.icmp` string-literal ssa-use `,` ssa-use
 //                 attribute-dict? `:` type
 // <operation> ::= `llvm.fcmp` string-literal ssa-use `,` ssa-use
 //                 attribute-dict? `:` type
 template <typename CmpPredicateType>
 static ParseResult parseCmpOp(OpAsmParser &parser, OperationState &result) {
-  Builder &builder = parser.getBuilder();
-
   StringAttr predicateAttr;
   OpAsmParser::UnresolvedOperand lhs, rhs;
   Type type;
   SMLoc predicateLoc, trailingTypeLoc;
   if (parser.getCurrentLocation(&predicateLoc) ||
       parser.parseAttribute(predicateAttr, "predicate", result.attributes) ||
       parser.parseOperand(lhs) || parser.parseComma() ||
       parser.parseOperand(rhs) ||
if (std::is_same<CmpPredicateType, ICmpPredicate>()) {
     predicateValue = static_cast<int64_t>(*predicate);
   }
 
   result.attributes.set("predicate",
                         parser.getBuilder().getI64IntegerAttr(predicateValue));
 
   // The result type is either i1 or a vector type <? x i1> if the inputs are
   // vectors.
-  Type resultType = IntegerType::get(builder.getContext(), 1);
   if (!isCompatibleType(type))
     return parser.emitError(trailingTypeLoc,
                             "expected LLVM dialect-compatible type");
-  if (LLVM::isCompatibleVectorType(type)) {
-    if (LLVM::isScalableVectorType(type)) {
-      resultType = LLVM::getVectorType(
-          resultType, LLVM::getVectorNumElements(type).getKnownMinValue(),
-          /*isScalable=*/true);
-    } else {
-      resultType = LLVM::getVectorType(
-          resultType, LLVM::getVectorNumElements(type).getFixedValue(),
-          /*isScalable=*/false);
-    }
-  }
-
-  result.addTypes({resultType});
+  result.addTypes(getI1SameShape(type));
   return success();
 }
 
 ParseResult ICmpOp::parse(OpAsmParser &parser, OperationState &result) {
   return parseCmpOp<ICmpPredicate>(parser, result);
 }
 
 ParseResult FCmpOp::parse(OpAsmParser &parser, OperationState &result) {

mlir/lib/Dialect/LLVMIR/IR/LLVMTypes.cpp

Type mlir::LLVM::getVectorType(Type elementType, unsigned numElements,
   if (useLLVM) {
     if (isScalable)
       return LLVMScalableVectorType::get(elementType, numElements);
     return LLVMFixedVectorType::get(elementType, numElements);
   }
   return VectorType::get(numElements, elementType, (unsigned)isScalable);
 }
 
+Type mlir::LLVM::getVectorType(Type elementType,
+                               const llvm::ElementCount &numElements) {
+  if (numElements.isScalable())
+    return getVectorType(elementType, numElements.getKnownMinValue(),
+                         /*isScalable=*/true);
+  return getVectorType(elementType, numElements.getFixedValue(),
+                       /*isScalable=*/false);
+}
+
 Type mlir::LLVM::getFixedVectorType(Type elementType, unsigned numElements) {
   bool useLLVM = LLVMFixedVectorType::isValidElementType(elementType);
   bool useBuiltIn = VectorType::isValidElementType(elementType);
   (void)useBuiltIn;
   assert((useLLVM ^ useBuiltIn) && "expected LLVM-compatible fixed-vector type "
                                    "to be either builtin or LLVM dialect type");
   if (useLLVM)
     return LLVMFixedVectorType::get(elementType, numElements);

mlir/lib/Target/LLVMIR/ConvertFromLLVMIR.cpp

if (succeeded(convertIntrinsic(b, callInst)))
       return success();
 
   // Convert all operations that provide an MLIR builder.
   if (succeeded(convertOperation(b, inst)))
     return success();
 
   // Convert all special instructions that do not provide an MLIR builder.
   Location loc = translateLoc(inst->getDebugLoc());
-  if (inst->getOpcode() == llvm::Instruction::ICmp) {
-    Value lhs = processValue(inst->getOperand(0));
-    Value rhs = processValue(inst->getOperand(1));
-    Value res = b.create<ICmpOp>(
-        loc, getICmpPredicate(cast<llvm::ICmpInst>(inst)->getPredicate()), lhs,
-        rhs);
-    mapValue(inst, res);
-    return success();
-  }
-  if (inst->getOpcode() == llvm::Instruction::FCmp) {
-    Value lhs = processValue(inst->getOperand(0));
-    Value rhs = processValue(inst->getOperand(1));
-
-    if (lhs.getType() != rhs.getType())
-      return failure();
-
-    Type boolType = b.getI1Type();
-    Type resType = boolType;
-    if (LLVM::isCompatibleVectorType(lhs.getType())) {
-      unsigned numElements =
-          LLVM::getVectorNumElements(lhs.getType()).getFixedValue();
-      resType = VectorType::get({numElements}, boolType);
-    }
-
-    Value res = b.create<FCmpOp>(
-        loc, resType,
-        getFCmpPredicate(cast<llvm::FCmpInst>(inst)->getPredicate()), lhs, rhs);
-    mapValue(inst, res);
-    return success();
-  }
   if (inst->getOpcode() == llvm::Instruction::Br) {
     auto *brInst = cast<llvm::BranchInst>(inst);
     OperationState state(loc,
                          brInst->isConditional() ? "llvm.cond_br" : "llvm.br");
     if (brInst->isConditional()) {
       Value condition = processValue(brInst->getCondition());
       state.addOperands(condition);
     }

mlir/test/Target/LLVMIR/Import/basic.ll

 ; CHECK-LABEL: llvm.func @f3() -> !llvm.ptr<i32>
 define i32* @f3() {
 ; CHECK: %[[c:[0-9]+]] = llvm.mlir.addressof @g2 : !llvm.ptr<f64>
 ; CHECK: %[[b:[0-9]+]] = llvm.bitcast %[[c]] : !llvm.ptr<f64> to !llvm.ptr<i32>
 ; CHECK: llvm.return %[[b]] : !llvm.ptr<i32>
   ret i32* bitcast (double* @g2 to i32*)
 }
 
-; CHECK-LABEL: llvm.func @f5
-define void @f5(i32 %d) {
-; FIXME: icmp should return i1.
-; CHECK: = llvm.icmp "eq"
-  %1 = icmp eq i32 %d, 2
-; CHECK: = llvm.icmp "slt"
-  %2 = icmp slt i32 %d, 2
-; CHECK: = llvm.icmp "sle"
-  %3 = icmp sle i32 %d, 2
-; CHECK: = llvm.icmp "sgt"
-  %4 = icmp sgt i32 %d, 2
-; CHECK: = llvm.icmp "sge"
-  %5 = icmp sge i32 %d, 2
-; CHECK: = llvm.icmp "ult"
-  %6 = icmp ult i32 %d, 2
-; CHECK: = llvm.icmp "ule"
-  %7 = icmp ule i32 %d, 2
-; CHECK: = llvm.icmp "ugt"
-  %8 = icmp ugt i32 %d, 2
-  ret void
-}
-
 ; CHECK-LABEL: llvm.func @f6(%arg0: !llvm.ptr<func<void (i16)>>)
 define void @f6(void (i16) *%fn) {
 ; CHECK: %[[c:[0-9]+]] = llvm.mlir.constant(0 : i16) : i16
 ; CHECK: llvm.call %arg0(%[[c]])
   call void %fn(i16 0)
   ret void
 }
 
-; CHECK-LABEL: llvm.func @FPComparison(%arg0: f32, %arg1: f32)
-define void @FPComparison(float %a, float %b) {
-  ; CHECK: llvm.fcmp "_false" %arg0, %arg1
-  %1 = fcmp false float %a, %b
-  ; CHECK: llvm.fcmp "oeq" %arg0, %arg1
-  %2 = fcmp oeq float %a, %b
-  ; CHECK: llvm.fcmp "ogt" %arg0, %arg1
-  %3 = fcmp ogt float %a, %b
-  ; CHECK: llvm.fcmp "oge" %arg0, %arg1
-  %4 = fcmp oge float %a, %b
-  ; CHECK: llvm.fcmp "olt" %arg0, %arg1
-  %5 = fcmp olt float %a, %b
-  ; CHECK: llvm.fcmp "ole" %arg0, %arg1
-  %6 = fcmp ole float %a, %b
-  ; CHECK: llvm.fcmp "one" %arg0, %arg1
-  %7 = fcmp one float %a, %b
-  ; CHECK: llvm.fcmp "ord" %arg0, %arg1
-  %8 = fcmp ord float %a, %b
-  ; CHECK: llvm.fcmp "ueq" %arg0, %arg1
-  %9 = fcmp ueq float %a, %b
-  ; CHECK: llvm.fcmp "ugt" %arg0, %arg1
-  %10 = fcmp ugt float %a, %b
-  ; CHECK: llvm.fcmp "uge" %arg0, %arg1
-  %11 = fcmp uge float %a, %b
-  ; CHECK: llvm.fcmp "ult" %arg0, %arg1
-  %12 = fcmp ult float %a, %b
-  ; CHECK: llvm.fcmp "ule" %arg0, %arg1
-  %13 = fcmp ule float %a, %b
-  ; CHECK: llvm.fcmp "une" %arg0, %arg1
-  %14 = fcmp une float %a, %b
-  ; CHECK: llvm.fcmp "uno" %arg0, %arg1
-  %15 = fcmp uno float %a, %b
-  ; CHECK: llvm.fcmp "_true" %arg0, %arg1
-  %16 = fcmp true float %a, %b
-  ret void
-}
-
 ; Testing rest of the floating point constant kinds.
 ; CHECK-LABEL: llvm.func @FPConstant(%arg0: f16, %arg1: bf16, %arg2: f128, %arg3: f80)
 define void @FPConstant(half %a, bfloat %b, fp128 %c, x86_fp80 %d) {
   ; CHECK-DAG: %[[C0:.+]] = llvm.mlir.constant(7.000000e+00 : f80) : f80
   ; CHECK-DAG: %[[C1:.+]] = llvm.mlir.constant(0.000000e+00 : f128) : f128
   ; CHECK-DAG: %[[C2:.+]] = llvm.mlir.constant(1.000000e+00 : bf16) : bf16
   ; CHECK-DAG: %[[C3:.+]] = llvm.mlir.constant(1.000000e+00 : f16) : f16
 

mlir/test/Target/LLVMIR/Import/instructions.ll

 ; RUN: mlir-translate -import-llvm -split-input-file %s | FileCheck %s
 
 ; CHECK-LABEL: @integer_arith
 ; CHECK-SAME:  %[[ARG1:[a-zA-Z0-9]+]]
 ; CHECK-SAME:  %[[ARG2:[a-zA-Z0-9]+]]
 ; CHECK-SAME:  %[[ARG3:[a-zA-Z0-9]+]]
 ; CHECK-SAME:  %[[ARG4:[a-zA-Z0-9]+]]
 define void @integer_arith(i32 %arg1, i32 %arg2, i64 %arg3, i64 %arg4) {
   ; CHECK-DAG:  %[[C1:[0-9]+]] = llvm.mlir.constant(-7 : i32) : i32
   ; CHECK-DAG:  %[[C2:[0-9]+]] = llvm.mlir.constant(42 : i32) : i32
   ; CHECK:  llvm.add %[[ARG1]], %[[C1]] : i32
-  ; CHECK:  llvm.add %[[C2]], %[[ARG2]] : i32
-  ; CHECK:  llvm.sub %[[ARG3]], %[[ARG4]] : i64
-  ; CHECK:  llvm.mul %[[ARG1]], %[[ARG2]] : i32
-  ; CHECK:  llvm.udiv %[[ARG3]], %[[ARG4]] : i64
-  ; CHECK:  llvm.sdiv %[[ARG1]], %[[ARG2]] : i32
-  ; CHECK:  llvm.urem %[[ARG3]], %[[ARG4]] : i64
-  ; CHECK:  llvm.srem %[[ARG1]], %[[ARG2]] : i32
-  ; CHECK:  llvm.shl %[[ARG3]], %[[ARG4]] : i64
-  ; CHECK:  llvm.lshr %[[ARG1]], %[[ARG2]] : i32
-  ; CHECK:  llvm.ashr %[[ARG3]], %[[ARG4]] : i64
-  ; CHECK:  llvm.and %[[ARG1]], %[[ARG2]] : i32
-  ; CHECK:  llvm.or %[[ARG3]], %[[ARG4]] : i64
-  ; CHECK:  llvm.xor %[[ARG1]], %[[ARG2]] : i32
   %1 = add i32 %arg1, -7
+  ; CHECK:  llvm.add %[[C2]], %[[ARG2]] : i32
   %2 = add i32 42, %arg2
+  ; CHECK:  llvm.sub %[[ARG3]], %[[ARG4]] : i64
   %3 = sub i64 %arg3, %arg4
+  ; CHECK:  llvm.mul %[[ARG1]], %[[ARG2]] : i32
   %4 = mul i32 %arg1, %arg2
+  ; CHECK:  llvm.udiv %[[ARG3]], %[[ARG4]] : i64
   %5 = udiv i64 %arg3, %arg4
+  ; CHECK:  llvm.sdiv %[[ARG1]], %[[ARG2]] : i32
   %6 = sdiv i32 %arg1, %arg2
+  ; CHECK:  llvm.urem %[[ARG3]], %[[ARG4]] : i64
   %7 = urem i64 %arg3, %arg4
+  ; CHECK:  llvm.srem %[[ARG1]], %[[ARG2]] : i32
   %8 = srem i32 %arg1, %arg2
+  ; CHECK:  llvm.shl %[[ARG3]], %[[ARG4]] : i64
   %9 = shl i64 %arg3, %arg4
+  ; CHECK:  llvm.lshr %[[ARG1]], %[[ARG2]] : i32
   %10 = lshr i32 %arg1, %arg2
+  ; CHECK:  llvm.ashr %[[ARG3]], %[[ARG4]] : i64
   %11 = ashr i64 %arg3, %arg4
+  ; CHECK:  llvm.and %[[ARG1]], %[[ARG2]] : i32
   %12 = and i32 %arg1, %arg2
+  ; CHECK:  llvm.or %[[ARG3]], %[[ARG4]] : i64
   %13 = or i64 %arg3, %arg4
+  ; CHECK:  llvm.xor %[[ARG1]], %[[ARG2]] : i32
   %14 = xor i32 %arg1, %arg2
   ret void
 }
 
 ; // -----
 
+; CHECK-LABEL: @integer_compare
+; CHECK-SAME:  %[[ARG1:[a-zA-Z0-9]+]]
+; CHECK-SAME:  %[[ARG2:[a-zA-Z0-9]+]]
+; CHECK-SAME:  %[[ARG3:[a-zA-Z0-9]+]]
+; CHECK-SAME:  %[[ARG4:[a-zA-Z0-9]+]]
+define i1 @integer_compare(i32 %arg1, i32 %arg2, <4 x i64> %arg3, <4 x i64> %arg4) {
+  ; CHECK:  llvm.icmp "eq" %[[ARG3]], %[[ARG4]] : vector<4xi64>
+  %1 = icmp eq <4 x i64> %arg3, %arg4
+  ; CHECK:  llvm.icmp "slt" %[[ARG1]], %[[ARG2]] : i32
+  %2 = icmp slt i32 %arg1, %arg2
+  ; CHECK:  llvm.icmp "sle" %[[ARG1]], %[[ARG2]] : i32
+  %3 = icmp sle i32 %arg1, %arg2
+  ; CHECK:  llvm.icmp "sgt" %[[ARG1]], %[[ARG2]] : i32
+  %4 = icmp sgt i32 %arg1, %arg2
+  ; CHECK:  llvm.icmp "sge" %[[ARG1]], %[[ARG2]] : i32
+  %5 = icmp sge i32 %arg1, %arg2
+  ; CHECK:  llvm.icmp "ult" %[[ARG1]], %[[ARG2]] : i32
+  %6 = icmp ult i32 %arg1, %arg2
+  ; CHECK:  llvm.icmp "ule" %[[ARG1]], %[[ARG2]] : i32
+  %7 = icmp ule i32 %arg1, %arg2
+  ; Verify scalar comparisons return a scalar boolean
+  ; CHECK:  llvm.icmp "ugt" %[[ARG1]], %[[ARG2]] : i32
+  %8 = icmp ugt i32 %arg1, %arg2
+  ret i1 %8
+}
+
+; // -----
+
 ; CHECK-LABEL: @fp_arith
 ; CHECK-SAME:  %[[ARG1:[a-zA-Z0-9]+]]
 ; CHECK-SAME:  %[[ARG2:[a-zA-Z0-9]+]]
 ; CHECK-SAME:  %[[ARG3:[a-zA-Z0-9]+]]
 ; CHECK-SAME:  %[[ARG4:[a-zA-Z0-9]+]]
 define void @fp_arith(float %arg1, float %arg2, double %arg3, double %arg4) {
   ; CHECK:  %[[C1:[0-9]+]] = llvm.mlir.constant(3.030000e+01 : f64) : f64
   ; CHECK:  %[[C2:[0-9]+]] = llvm.mlir.constant(3.030000e+01 : f32) : f32
   ; CHECK:  llvm.fadd %[[C2]], %[[ARG1]] : f32
-  ; CHECK:  llvm.fadd %[[ARG1]], %[[ARG2]] : f32
-  ; CHECK:  llvm.fadd %[[C1]], %[[ARG3]] : f64
-  ; CHECK:  llvm.fsub %[[ARG1]], %[[ARG2]] : f32
-  ; CHECK:  llvm.fmul %[[ARG3]], %[[ARG4]] : f64
-  ; CHECK:  llvm.fdiv %[[ARG1]], %[[ARG2]] : f32
-  ; CHECK:  llvm.frem %[[ARG3]], %[[ARG4]] : f64
-  ; CHECK:  llvm.fneg %[[ARG1]] : f32
   %1 = fadd float 0x403E4CCCC0000000, %arg1
+  ; CHECK:  llvm.fadd %[[ARG1]], %[[ARG2]] : f32
   %2 = fadd float %arg1, %arg2
+  ; CHECK:  llvm.fadd %[[C1]], %[[ARG3]] : f64
   %3 = fadd double 3.030000e+01, %arg3
+  ; CHECK:  llvm.fsub %[[ARG1]], %[[ARG2]] : f32
   %4 = fsub float %arg1, %arg2
+  ; CHECK:  llvm.fmul %[[ARG3]], %[[ARG4]] : f64
   %5 = fmul double %arg3, %arg4
+  ; CHECK:  llvm.fdiv %[[ARG1]], %[[ARG2]] : f32
   %6 = fdiv float %arg1, %arg2
+  ; CHECK:  llvm.frem %[[ARG3]], %[[ARG4]] : f64
   %7 = frem double %arg3, %arg4
+  ; CHECK:  llvm.fneg %[[ARG1]] : f32
   %8 = fneg float %arg1
   ret void
 }
 
 ; // -----
 
+; CHECK-LABEL: @fp_compare
+; CHECK-SAME:  %[[ARG1:[a-zA-Z0-9]+]]
+; CHECK-SAME:  %[[ARG2:[a-zA-Z0-9]+]]
+; CHECK-SAME:  %[[ARG3:[a-zA-Z0-9]+]]
+; CHECK-SAME:  %[[ARG4:[a-zA-Z0-9]+]]
+define <4 x i1> @fp_compare(float %arg1, float %arg2, <4 x double> %arg3, <4 x double> %arg4) {
+  ; CHECK:  llvm.fcmp "_false" %[[ARG1]], %[[ARG2]] : f32
+  %1 = fcmp false float %arg1, %arg2
+  ; CHECK:  llvm.fcmp "oeq" %[[ARG1]], %[[ARG2]] : f32
+  %2 = fcmp oeq float %arg1, %arg2
+  ; CHECK:  llvm.fcmp "ogt" %[[ARG1]], %[[ARG2]] : f32
+  %3 = fcmp ogt float %arg1, %arg2
+  ; CHECK:  llvm.fcmp "oge" %[[ARG1]], %[[ARG2]] : f32
+  %4 = fcmp oge float %arg1, %arg2
+  ; CHECK:  llvm.fcmp "olt" %[[ARG1]], %[[ARG2]] : f32
+  %5 = fcmp olt float %arg1, %arg2
+  ; CHECK:  llvm.fcmp "ole" %[[ARG1]], %[[ARG2]] : f32
+  %6 = fcmp ole float %arg1, %arg2
+  ; CHECK:  llvm.fcmp "one" %[[ARG1]], %[[ARG2]] : f32
+  %7 = fcmp one float %arg1, %arg2
+  ; CHECK:  llvm.fcmp "ord" %[[ARG1]], %[[ARG2]] : f32
+  %8 = fcmp ord float %arg1, %arg2
+  ; CHECK:  llvm.fcmp "ueq" %[[ARG1]], %[[ARG2]] : f32
+  %9 = fcmp ueq float %arg1, %arg2
+  ; CHECK:  llvm.fcmp "ugt" %[[ARG1]], %[[ARG2]] : f32
+  %10 = fcmp ugt float %arg1, %arg2
+  ; CHECK:  llvm.fcmp "uge" %[[ARG1]], %[[ARG2]] : f32
+  %11 = fcmp uge float %arg1, %arg2
+  ; CHECK:  llvm.fcmp "ult" %[[ARG1]], %[[ARG2]] : f32
+  %12 = fcmp ult float %arg1, %arg2
+  ; CHECK:  llvm.fcmp "ule" %[[ARG1]], %[[ARG2]] : f32
+  %13 = fcmp ule float %arg1, %arg2
+  ; CHECK:  llvm.fcmp "une" %[[ARG1]], %[[ARG2]] : f32
+  %14 = fcmp une float %arg1, %arg2
+  ; CHECK:  llvm.fcmp "uno" %[[ARG1]], %[[ARG2]] : f32
+  %15 = fcmp uno float %arg1, %arg2
+  ; Verify vector comparisons return a vector of booleans
+  ; CHECK:  llvm.fcmp "_true" %[[ARG3]], %[[ARG4]] : vector<4xf64>
+  %16 = fcmp true <4 x double> %arg3, %arg4
+  ret <4 x i1> %16
+}
+
+; // -----
+
 ; CHECK-LABEL: @fp_casts
 ; CHECK-SAME:  %[[ARG1:[a-zA-Z0-9]+]]
 ; CHECK-SAME:  %[[ARG2:[a-zA-Z0-9]+]]
 ; CHECK-SAME:  %[[ARG3:[a-zA-Z0-9]+]]
 define void @fp_casts(float %arg1, double %arg2, i32 %arg3) {
   ; CHECK:  llvm.fptrunc %[[ARG2]] : f64 to f32
   ; CHECK:  llvm.fpext %[[ARG1]] : f32 to f64
   ; CHECK:  llvm.fptosi %[[ARG2]] : f64 to i16

mlir/tools/mlir-tblgen/LLVMIRConversionGen.cpp

 //===----------------------------------------------------------------------===//
 
 #include "mlir/Support/LogicalResult.h"
 #include "mlir/TableGen/Argument.h"
 #include "mlir/TableGen/Attribute.h"
 #include "mlir/TableGen/GenInfo.h"
 #include "mlir/TableGen/Operator.h"
 
+#include "llvm/ADT/Sequence.h"
 #include "llvm/ADT/StringExtras.h"
 #include "llvm/ADT/Twine.h"
 #include "llvm/Support/FormatVariadic.h"
 #include "llvm/Support/raw_ostream.h"
 #include "llvm/TableGen/Record.h"
 #include "llvm/TableGen/TableGenBackend.h"
 
 using namespace llvm;
static LogicalResult emitOneMLIRBuilder(const Record &record, raw_ostream &os,
   if (!record.getValue("mlirBuilder"))
     return emitError("no 'mlirBuilder' field for op " + op.getOperationName());
 
   // Return early if there is no builder specified.
   StringRef builderStrRef = record.getValueAsString("mlirBuilder");
   if (builderStrRef.empty())
     return success();
 
+  // Access the argument index array that maps argument indices to LLVM IR
+  // operand indices. If the operation defines no custom mapping, set the array
+  // to the identity permutation.
+  std::vector<int64_t> llvmArgIndices =
+      record.getValueAsListOfInts("llvmArgIndices");
+  if (llvmArgIndices.empty())
+    append_range(llvmArgIndices, seq<int64_t>(0, op.getNumArgs()));
+  if (llvmArgIndices.size() != static_cast<size_t>(op.getNumArgs())) {
+    return emitError(
+        "'llvmArgIndices' does not match the number of arguments for op " +
+        op.getOperationName());
+  }
+
   // Progressively create the builder string by replacing $-variables. Keep only
   // the not-yet-traversed part of the builder pattern to avoid re-traversing
   // the string multiple times.
   std::string builder;
   llvm::raw_string_ostream bs(builder);
   while (StringLoc loc = findNextVariable(builderStrRef)) {
     auto name = loc.in(builderStrRef).drop_front();
     // First, insert the non-matched part as is.
     bs << builderStrRef.substr(0, loc.pos);
     // Then, rewrite the name based on its kind.
     FailureOr<int> argIndex = getArgumentIndex(op, name);
     if (succeeded(argIndex)) {
-      // Process the argument value assuming the MLIR and LLVM operand orders
-      // match and there are no optional or variadic arguments.
-      bs << formatv("processValue(llvmOperands[{0}])", *argIndex);
+      // Access the LLVM IR operand that maps to the given argument index using
+      // the provided argument indices mapping.
+      // FIXME: support trailing variadic arguments.
+      int64_t operandIdx = llvmArgIndices[*argIndex];
+      assert(operandIdx >= 0 && "expected argument to have a mapping");
+      assert(!isVariadicOperandName(op, name) && "unexpected variadic operand");
+      bs << formatv("processValue(llvmOperands[{0}])", operandIdx);
     } else if (isResultName(op, name)) {
       assert(op.getNumResults() == 1 &&
              "expected operation to have one result");
       bs << formatv("mapValue(inst)");
     } else if (name == "_int_attr") {
       bs << "matchIntegerAttr";
     } else if (name == "_resultType") {
       bs << "convertType(inst->getType())";