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gfx11_dasm_vop1.txt

Differential D133437

[AMDGPU][MC][GFX11] Add disassembler tests for v_readfirstlane_b32
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Authored by dp on Sep 7 2022, 10:29 AM.

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Joe_Nash
foad

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rG405b19bb679e: [AMDGPU][MC][GFX11] Add disassembler tests for v_readfirstlane_b32

Summary

These tests are formally not valid because this instruction may be promoted to VOP3 and so VOP1 variant should have _e32 suffix when disassembled. But we do not support VOP3 variant of this instruction yet (and maybe never will).

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Event Timeline

dp created this revision.Sep 7 2022, 10:29 AM

Herald added a project: Restricted Project. · View Herald TranscriptSep 7 2022, 10:29 AM

Herald added subscribers: kosarev, kerbowa, t-tye and 5 others. · View Herald Transcript

dp requested review of this revision.Sep 7 2022, 10:29 AM

Herald added a project: Restricted Project. · View Herald TranscriptSep 7 2022, 10:29 AM

Herald added subscribers: llvm-commits, wdng. · View Herald Transcript

Harbormaster completed remote builds in B185447: Diff 458498.Sep 7 2022, 11:09 AM

Joe_Nash accepted this revision.Sep 15 2022, 7:11 AM

This revision is now accepted and ready to land.Sep 15 2022, 7:11 AM

Closed by commit rG405b19bb679e: [AMDGPU][MC][GFX11] Add disassembler tests for v_readfirstlane_b32 (authored by dp). · Explain WhySep 15 2022, 8:18 AM

This revision was automatically updated to reflect the committed changes.

dp added a commit: rG405b19bb679e: [AMDGPU][MC][GFX11] Add disassembler tests for v_readfirstlane_b32.

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llvm/

test/

MC/

Disassembler/

AMDGPU/

gfx11_dasm_vop1.txt

18 lines

Diff 458498

llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop1.txt

	Show First 20 Lines • Show All 2,644 Lines • ▼ Show 20 Lines
	0xf0,0x56,0x0a,0x7e			0xf0,0x56,0x0a,0x7e

	# GFX11: v_rcp_iflag_f32_e32 v5, src_scc ; encoding: [0xfd,0x56,0x0a,0x7e]			# GFX11: v_rcp_iflag_f32_e32 v5, src_scc ; encoding: [0xfd,0x56,0x0a,0x7e]
	0xfd,0x56,0x0a,0x7e			0xfd,0x56,0x0a,0x7e

	# GFX11: v_rcp_iflag_f32_e32 v255, 0xaf123456 ; encoding: [0xff,0x56,0xfe,0x7f,0x56,0x34,0x12,0xaf]			# GFX11: v_rcp_iflag_f32_e32 v255, 0xaf123456 ; encoding: [0xff,0x56,0xfe,0x7f,0x56,0x34,0x12,0xaf]
	0xff,0x56,0xfe,0x7f,0x56,0x34,0x12,0xaf			0xff,0x56,0xfe,0x7f,0x56,0x34,0x12,0xaf

				# GFX11: v_readfirstlane_b32 s5, v1 ; encoding: [0x01,0x05,0x0a,0x7e]
				0x01,0x05,0x0a,0x7e

				# GFX11: v_readfirstlane_b32 s105, v1 ; encoding: [0x01,0x05,0xd2,0x7e]
				0x01,0x05,0xd2,0x7e

				# GFX11: v_readfirstlane_b32 vcc_lo, v1 ; encoding: [0x01,0x05,0xd4,0x7e]
				0x01,0x05,0xd4,0x7e

				# GFX11: v_readfirstlane_b32 vcc_hi, v1 ; encoding: [0x01,0x05,0xd6,0x7e]
				0x01,0x05,0xd6,0x7e

				# GFX11: v_readfirstlane_b32 ttmp15, v1 ; encoding: [0x01,0x05,0xf6,0x7e]
				0x01,0x05,0xf6,0x7e

				# GFX11: v_readfirstlane_b32 null, v255 ; encoding: [0xff,0x05,0xf8,0x7e]
				0xff,0x05,0xf8,0x7e

	# GFX11: v_rndne_f16_e32 v5, v1 ; encoding: [0x01,0xbd,0x0a,0x7e]			# GFX11: v_rndne_f16_e32 v5, v1 ; encoding: [0x01,0xbd,0x0a,0x7e]
	0x01,0xbd,0x0a,0x7e			0x01,0xbd,0x0a,0x7e

	# GFX11: v_rndne_f16_e32 v5, v127 ; encoding: [0x7f,0xbd,0x0a,0x7e]			# GFX11: v_rndne_f16_e32 v5, v127 ; encoding: [0x7f,0xbd,0x0a,0x7e]
	0x7f,0xbd,0x0a,0x7e			0x7f,0xbd,0x0a,0x7e

	# GFX11: v_rndne_f16_e32 v5, s1 ; encoding: [0x01,0xbc,0x0a,0x7e]			# GFX11: v_rndne_f16_e32 v5, s1 ; encoding: [0x01,0xbc,0x0a,0x7e]
	0x01,0xbc,0x0a,0x7e			0x01,0xbc,0x0a,0x7e
	▲ Show 20 Lines • Show All 642 Lines • Show Last 20 Lines