[mlir][vector] Fix warp distribution test

[ThomasRaoux]

Summary

The test was using a missing prefix. Add the prefix and fix the naming.

Found by @csigg

mlir/test/Dialect/Vector/vector-warp-distribute.mlir

 // RUN: mlir-opt %s -allow-unregistered-dialect -split-input-file -test-vector-warp-distribute=rewrite-warp-ops-to-scf-if | FileCheck %s --check-prefix=CHECK-SCF-IF
 // RUN: mlir-opt %s -allow-unregistered-dialect -split-input-file -test-vector-warp-distribute="hoist-uniform" | FileCheck --check-prefixes=CHECK-HOIST %s
 // RUN: mlir-opt %s -allow-unregistered-dialect -split-input-file -test-vector-warp-distribute="hoist-uniform distribute-transfer-write" | FileCheck --check-prefixes=CHECK-D %s
 // RUN: mlir-opt %s -allow-unregistered-dialect -split-input-file -test-vector-warp-distribute=propagate-distribution -canonicalize | FileCheck --check-prefixes=CHECK-PROP %s
+// RUN: mlir-opt %s -allow-unregistered-dialect -split-input-file -test-vector-warp-distribute="hoist-uniform distribute-transfer-write propagate-distribution" -canonicalize | FileCheck --check-prefixes=CHECK-DIST-AND-PROP %s
+
 
 // CHECK-SCF-IF-DAG: memref.global "private" @__shared_32xf32 : memref<32xf32, 3>
 // CHECK-SCF-IF-DAG: memref.global "private" @__shared_64xf32 : memref<64xf32, 3>
 // CHECK-SCF-IF-DAG: memref.global "private" @__shared_128xf32 : memref<128xf32, 3>
 // CHECK-SCF-IF-DAG: memref.global "private" @__shared_256xf32 : memref<256xf32, 3>
 
 // CHECK-SCF-IF-LABEL: func @rewrite_warp_op_to_scf_if(
 //  CHECK-SCF-IF-SAME:     %[[laneid:.*]]: index,
//       CHECK-SCF-IF:   "some_use"(%[[r1]]) : (vector<2xf32>) -> ()
   "some_use"(%r#1) : (vector<2xf32>) -> ()
   return
 }
 
 // -----
 
 // CHECK-D-DAG: #[[MAP1:.*]] = affine_map<()[s0] -> (s0 * 2 + 32)>
 
-// CHECK-ALL-LABEL: func @warp(
+// CHECK-DIST-AND-PROP-LABEL: func @warp(
 // CHECK-HOIST: memref.subview
 // CHECK-HOIST: memref.subview
 // CHECK-HOIST: memref.subview
 // CHECK-HOIST: vector.warp_execute_on_lane_0
 
 //     CHECK-D: %[[R:.*]]:2 = vector.warp_execute_on_lane_0(%{{.*}})[32] -> (vector<2xf32>, vector<1xf32>) {
 //     CHECK-D:   arith.addf {{.*}} : vector<32xf32>
 //     CHECK-D:   arith.addf {{.*}} : vector<64xf32>
 //     CHECK-D:   vector.yield %{{.*}}, %{{.*}} : vector<64xf32>, vector<32xf32>
 // CHECK-D-DAG: vector.transfer_write %[[R]]#1, %{{.*}}[%{{.*}}] {in_bounds = [true]} : vector<1xf32>, memref<128xf32
 // CHECK-D-DAG: %[[ID1:.*]] = affine.apply #[[MAP1]]()[%{{.*}}]
 // CHECK-D-DAG: vector.transfer_write %[[R]]#0, %2[%[[ID1]]] {in_bounds = [true]} : vector<2xf32>, memref<128xf32
 
-// CHECK-ALL-NOT: vector.warp_execute_on_lane_0
-// CHECK-ALL: vector.transfer_read {{.*}} vector<1xf32>
-// CHECK-ALL: vector.transfer_read {{.*}} vector<1xf32>
-// CHECK-ALL: vector.transfer_read {{.*}} vector<2xf32>
-// CHECK-ALL: vector.transfer_read {{.*}} vector<2xf32>
-// CHECK-ALL: arith.addf {{.*}} : vector<1xf32>
-// CHECK-ALL: arith.addf {{.*}} : vector<2xf32>
-// CHECK-ALL: vector.transfer_write {{.*}} : vector<1xf32>
-// CHECK-ALL: vector.transfer_write {{.*}} : vector<2xf32>
+// CHECK-DIST-AND-PROP-NOT: vector.warp_execute_on_lane_0
+// CHECK-DIST-AND-PROP: vector.transfer_read {{.*}} vector<1xf32>
+// CHECK-DIST-AND-PROP: vector.transfer_read {{.*}} vector<1xf32>
+// CHECK-DIST-AND-PROP: vector.transfer_read {{.*}} vector<2xf32>
+// CHECK-DIST-AND-PROP: vector.transfer_read {{.*}} vector<2xf32>
+// CHECK-DIST-AND-PROP: arith.addf {{.*}} : vector<1xf32>
+// CHECK-DIST-AND-PROP: arith.addf {{.*}} : vector<2xf32>
+// CHECK-DIST-AND-PROP: vector.transfer_write {{.*}} : vector<1xf32>
+// CHECK-DIST-AND-PROP: vector.transfer_write {{.*}} : vector<2xf32>
 
 #map0 =  affine_map<(d0)[s0] -> (d0 + s0)>
 func.func @warp(%laneid: index, %arg1: memref<1024xf32>, %arg2: memref<1024xf32>,
            %arg3: memref<1024xf32>, %gid : index) {
   vector.warp_execute_on_lane_0(%laneid)[32] {
     %sa = memref.subview %arg1[%gid] [128] [1] : memref<1024xf32> to memref<128xf32, #map0>
     %sb = memref.subview %arg2[%gid] [128] [1] : memref<1024xf32> to memref<128xf32, #map0>
     %sc = memref.subview %arg3[%gid] [128] [1] : memref<1024xf32> to memref<128xf32, #map0>