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Differential D130347

[AMDGPU] user-sgpr-init16-bug does not apply to gfx1103
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Authored by foad on Jul 22 2022, 4:41 AM.

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Reviewers
dstuttard
msearles
arsenm
Group Reviewers
Restricted Project
Commits
rG3cfa9b14312b: [AMDGPU] user-sgpr-init16-bug does not apply to gfx1103

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Event Timeline

foad created this revision.Jul 22 2022, 4:41 AM
Herald added a project: Restricted Project. · View Herald TranscriptJul 22 2022, 4:41 AM
Herald added subscribers: kosarev, kerbowa, hiraditya and 6 others. · View Herald Transcript
foad requested review of this revision.Jul 22 2022, 4:41 AM
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Harbormaster completed remote builds in B176982: Diff 446786.Jul 22 2022, 5:25 AM
foad added a reviewer: msearles.Jul 29 2022, 1:19 AM

Ping!

arsenm accepted this revision.Jul 29 2022, 6:11 AM

LGTM, but I didn't confirm this with the hardware documentation

This revision is now accepted and ready to land.Jul 29 2022, 6:11 AM
foad added a comment.Jul 29 2022, 6:19 AM

I didn't confirm this with the hardware documentation

I have checked. It is quite explicit that it affects gfx1100 and gfx1102 only.

This revision was landed with ongoing or failed builds.Jul 29 2022, 6:25 AM
Closed by commit rG3cfa9b14312b: [AMDGPU] user-sgpr-init16-bug does not apply to gfx1103 (authored by foad). · Explain Why
This revision was automatically updated to reflect the committed changes.
foad added a commit: rG3cfa9b14312b: [AMDGPU] user-sgpr-init16-bug does not apply to gfx1103.

Revision Contents

PathSize
llvm/
lib/
Target/
AMDGPU/
4 lines
2 lines
test/
CodeGen/
AMDGPU/
4 lines

Diff 448609

llvm/lib/Target/AMDGPU/AMDGPU.td

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def FeatureISAVersion11_0_1 : FeatureSet< def FeatureISAVersion11_0_1 : FeatureSet<
!listconcat(FeatureISAVersion11_Common.Features, !listconcat(FeatureISAVersion11_Common.Features,
[])>; [])>;
def FeatureISAVersion11_0_2 : FeatureSet< def FeatureISAVersion11_0_2 : FeatureSet<
!listconcat(FeatureISAVersion11_Common.Features, !listconcat(FeatureISAVersion11_Common.Features,
[FeatureUserSGPRInit16Bug])>; [FeatureUserSGPRInit16Bug])>;
def FeatureISAVersion11_0_3 : FeatureSet<
!listconcat(FeatureISAVersion11_Common.Features,
[])>;
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
def AMDGPUInstrInfo : InstrInfo { def AMDGPUInstrInfo : InstrInfo {
let guessInstructionProperties = 1; let guessInstructionProperties = 1;
let noNamedPositionallyEncodedOperands = 1; let noNamedPositionallyEncodedOperands = 1;
} }
def AMDGPUAsmParser : AsmParser { def AMDGPUAsmParser : AsmParser {
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llvm/lib/Target/AMDGPU/GCNProcessors.td

Show First 20 Lines • Show All 255 Lines • ▼ Show 20 Linesdef : ProcessorModel<"gfx1101", GFX11SpeedModel,
FeatureISAVersion11_0_1.Features FeatureISAVersion11_0_1.Features
>; >;
def : ProcessorModel<"gfx1102", GFX11SpeedModel, def : ProcessorModel<"gfx1102", GFX11SpeedModel,
FeatureISAVersion11_0_2.Features FeatureISAVersion11_0_2.Features
>; >;
def : ProcessorModel<"gfx1103", GFX11SpeedModel, def : ProcessorModel<"gfx1103", GFX11SpeedModel,
FeatureISAVersion11_0_2.Features FeatureISAVersion11_0_3.Features
>; >;

llvm/test/CodeGen/AMDGPU/gfx11-user-sgpr-init16-bug.ll

; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1100 -amdgpu-enable-vopd=0 < %s | FileCheck -check-prefixes=GCN,WORKAROUND %s ; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1100 -amdgpu-enable-vopd=0 < %s | FileCheck -check-prefixes=GCN,WORKAROUND %s
; RUN: llc -global-isel=1 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1100 -amdgpu-enable-vopd=0 < %s | FileCheck -check-prefixes=GCN,WORKAROUND %s ; RUN: llc -global-isel=1 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1100 -amdgpu-enable-vopd=0 < %s | FileCheck -check-prefixes=GCN,WORKAROUND %s
; Does not apply to wave64 ; Does not apply to wave64
; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1100 -mattr=+wavefrontsize64 -amdgpu-enable-vopd=0 < %s | FileCheck -check-prefixes=GCN,NOWORKAROUND %s ; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1100 -mattr=+wavefrontsize64 -amdgpu-enable-vopd=0 < %s | FileCheck -check-prefixes=GCN,NOWORKAROUND %s
; RUN: llc -global-isel=1 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1100 -mattr=+wavefrontsize64 -amdgpu-enable-vopd=0 < %s | FileCheck -check-prefixes=GCN,NOWORKAROUND %s ; RUN: llc -global-isel=1 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1100 -mattr=+wavefrontsize64 -amdgpu-enable-vopd=0 < %s | FileCheck -check-prefixes=GCN,NOWORKAROUND %s
; Does not apply to gfx1101 ; Does not apply to gfx1101
; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1101 -amdgpu-enable-vopd=0 < %s | FileCheck -check-prefixes=GCN,NOWORKAROUND %s ; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1101 -amdgpu-enable-vopd=0 < %s | FileCheck -check-prefixes=GCN,NOWORKAROUND %s
; RUN: llc -global-isel=1 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1101 -amdgpu-enable-vopd=0 < %s | FileCheck -check-prefixes=GCN,NOWORKAROUND %s ; RUN: llc -global-isel=1 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1101 -amdgpu-enable-vopd=0 < %s | FileCheck -check-prefixes=GCN,NOWORKAROUND %s
; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1102 -amdgpu-enable-vopd=0 < %s | FileCheck -check-prefixes=GCN,WORKAROUND %s ; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1102 -amdgpu-enable-vopd=0 < %s | FileCheck -check-prefixes=GCN,WORKAROUND %s
; RUN: llc -global-isel=1 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1102 -amdgpu-enable-vopd=0 < %s | FileCheck -check-prefixes=GCN,WORKAROUND %s ; RUN: llc -global-isel=1 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1102 -amdgpu-enable-vopd=0 < %s | FileCheck -check-prefixes=GCN,WORKAROUND %s
; Does not apply to gfx1103
; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1103 -amdgpu-enable-vopd=0 < %s | FileCheck -check-prefixes=GCN,NOWORKAROUND %s
; RUN: llc -global-isel=1 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1103 -amdgpu-enable-vopd=0 < %s | FileCheck -check-prefixes=GCN,NOWORKAROUND %s
; There aren't any stack objects, but we still enable the ; There aren't any stack objects, but we still enable the
; private_segment_wavefront_offset to get to 16, and the workgroup ID ; private_segment_wavefront_offset to get to 16, and the workgroup ID
; is in s14. ; is in s14.
; private_segment_buffer + workgroup_id_x = 5, + 11 padding ; private_segment_buffer + workgroup_id_x = 5, + 11 padding
; GCN-LABEL: {{^}}minimal_kernel_inputs: ; GCN-LABEL: {{^}}minimal_kernel_inputs:
; WORKAROUND: v_mov_b32_e32 [[V:v[0-9]+]], s15 ; WORKAROUND: v_mov_b32_e32 [[V:v[0-9]+]], s15
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