[llvm][test] preprocess test with update_llc_test_checks NFC

[nickdesaulniers]

Summary

In preparation for https://reviews.llvm.org/D130127, preprocess
llvm/test/CodeGen/AArch64/callbr-asm-obj-file.ll with
update_llc_test_checks.py. Add nounwind fn attr to remove .cfi
directives. -asm-verbose=0 would be nice but breaks
update_llc_test_checks.py. Remove IR comments, and unnecessary keywords.

[nickdesaulniers]

• remove one more hidden

[nickdesaulniers]

Rereading https://reviews.llvm.org/D65352, we might either want:

1. to also do this for llvm/test/CodeGen/X86/callbr-asm-obj-file.ll
2. not do this, and simply manually fix up the test in https://reviews.llvm.org/D130127 (avoiding the use of utils/update_llc_test_checks.py)
3. OTHER

[nickdesaulniers]

I think for https://reviews.llvm.org/D130127 it's better to keep the test as is.

llvm/test/CodeGen/AArch64/callbr-asm-obj-file.ll

-; RUN: llc < %s -mtriple=aarch64-unknown-linux-gnu -filetype=obj -o - \
-; RUN:  | llvm-objdump --triple=aarch64-unknown-linux-gnu -d - \
-; RUN:  | FileCheck %s
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc %s -mtriple=aarch64-unknown-linux-gnu -o - | FileCheck %s
 
 %struct.c = type { i1 (...)* }
 
-@l = common hidden local_unnamed_addr global i32 0, align 4
+@l = hidden global i32 0
 
-; CHECK-LABEL: <test1>:
-; CHECK-LABEL: <$d.1>:
-; CHECK-LABEL: <$x.2>:
-; CHECK-NEXT:    b 0x2c <$x.4>
-; CHECK-LABEL: <$x.4>:
+define i32 @test1() nounwind {
+; CHECK-LABEL: test1:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    str x30, [sp, #-16]! // 8-byte Folded Spill
+; CHECK-NEXT:    bl g
+; CHECK-NEXT:    cbz w0, .LBB0_2
+; CHECK-NEXT:  // %bb.1:
+; CHECK-NEXT:    ldr x30, [sp], #16 // 8-byte Folded Reload
+; CHECK-NEXT:    b i
+; CHECK-NEXT:  .LBB0_2:
+; CHECK-NEXT:    //APP
+; CHECK-NEXT:  .Ltmp1:
+; CHECK-NEXT:    nop
+; CHECK-NEXT:    .xword a
+; CHECK-NEXT:    b .Ltmp0
+; CHECK-NEXT:    .xword 0
+; CHECK-NEXT:    //NO_APP
+; CHECK-NEXT:  .Ltmp0: // Block address taken
+; CHECK-NEXT:  // %bb.3:
 ; CHECK-NEXT:    mov w0, wzr
-; CHECK-NEXT:    ldr x30, [sp], #16
+; CHECK-NEXT:    ldr x30, [sp], #16 // 8-byte Folded Reload
 ; CHECK-NEXT:    ret
-define hidden i32 @test1() {
   %1 = tail call i32 bitcast (i32 (...)* @g to i32 ()*)()
   %2 = icmp eq i32 %1, 0
   br i1 %2, label %3, label %5
 
-3:                                                ; preds = %0
+3:
   callbr void asm sideeffect "1: nop\0A\09.quad a\0A\09b ${1:l}\0A\09.quad ${0:c}", "i,!i"(i32* null)
           to label %4 [label %7]
 
-4:                                                ; preds = %3
+4:
   br label %7
 
-5:                                                ; preds = %0
+5:
   %6 = tail call i32 bitcast (i32 (...)* @i to i32 ()*)()
   br label %7
 
-7:                                                ; preds = %3, %4, %5
+7:
   %8 = phi i32 [ %6, %5 ], [ 0, %4 ], [ 0, %3 ]
   ret i32 %8
 }
 
-declare dso_local i32 @g(...) local_unnamed_addr
+declare i32 @g(...)
+declare i32 @i(...)
 
-declare dso_local i32 @i(...) local_unnamed_addr
-
-; CHECK-LABEL: <test2>:
-; CHECK:         bl {{.*}} <test2+0x18>
-; CHECK-LABEL: <$d.5>:
-; CHECK-LABEL: <$x.6>:
-; CHECK-NEXT:    b {{.*}} <test2+0x18>
-define hidden i32 @test2() local_unnamed_addr {
+define i32 @test2() nounwind {
+; CHECK-LABEL: test2:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    str x30, [sp, #-16]! // 8-byte Folded Spill
+; CHECK-NEXT:    adrp x8, l
+; CHECK-NEXT:    ldr w8, [x8, :lo12:l]
+; CHECK-NEXT:    cbz w8, .LBB1_4
+; CHECK-NEXT:  // %bb.1:
+; CHECK-NEXT:    bl g
+; CHECK-NEXT:    cbz w0, .LBB1_3
+; CHECK-NEXT:  .Ltmp2: // Block address taken
+; CHECK-NEXT:  .LBB1_2:
+; CHECK-NEXT:    bl i
+; CHECK-NEXT:    b .LBB1_4
+; CHECK-NEXT:  .LBB1_3:
+; CHECK-NEXT:    //APP
+; CHECK-NEXT:  .Ltmp3:
+; CHECK-NEXT:    nop
+; CHECK-NEXT:    .xword b
+; CHECK-NEXT:    b .Ltmp2
+; CHECK-NEXT:    .xword 0
+; CHECK-NEXT:    //NO_APP
+; CHECK-NEXT:  .LBB1_4:
+; CHECK-NEXT:    ldr x30, [sp], #16 // 8-byte Folded Reload
+; CHECK-NEXT:    ret
   %1 = load i32, i32* @l, align 4
   %2 = icmp eq i32 %1, 0
   br i1 %2, label %10, label %3
 
-3:                                                ; preds = %0
+3:
   %4 = tail call i32 bitcast (i32 (...)* @g to i32 ()*)()
   %5 = icmp eq i32 %4, 0
   br i1 %5, label %6, label %7
 
-6:                                                ; preds = %3
+6:
   callbr void asm sideeffect "1: nop\0A\09.quad b\0A\09b ${1:l}\0A\09.quad ${0:c}", "i,!i"(i32* null)
           to label %10 [label %7]
 
-7:                                                ; preds = %3
+7:
   %8 = tail call i32 bitcast (i32 (...)* @i to i32 ()*)()
   br label %10
 
-9:                                                ; preds = %6
+9:
   br label %10
 
-10:                                               ; preds = %7, %0, %6, %9
+10:
   ret i32 undef
 }
 
-; CHECK-LABEL: <test3>:
-; CHECK-LABEL: <$d.9>:
-; CHECK-LABEL: <$x.10>:
-; CHECK-NEXT:    b {{.*}} <test3+0x18>
-; CHECK-LABEL: <$x.12>:
-; CHECK-NEXT:    mov w0, wzr
-; CHECK-NEXT:    ldr x30, [sp], #16
+define i1 @test3() nounwind {
+; CHECK-LABEL: test3:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    str x30, [sp, #-16]! // 8-byte Folded Spill
+; CHECK-NEXT:    bl g
+; CHECK-NEXT:    cbz w0, .LBB2_2
+; CHECK-NEXT:  // %bb.1:
+; CHECK-NEXT:    bl i
+; CHECK-NEXT:    cmp w0, #0
+; CHECK-NEXT:    cset w0, ne
+; CHECK-NEXT:    b .LBB2_3
+; CHECK-NEXT:  .LBB2_2:
+; CHECK-NEXT:    //APP
+; CHECK-NEXT:  .Ltmp5:
+; CHECK-NEXT:    nop
+; CHECK-NEXT:    .xword c
+; CHECK-NEXT:    b .Ltmp4
+; CHECK-NEXT:    .xword 0
+; CHECK-NEXT:    //NO_APP
+; CHECK-NEXT:  .Ltmp4: // Block address taken
+; CHECK-NEXT:  .LBB2_3:
+; CHECK-NEXT:    ldr x30, [sp], #16 // 8-byte Folded Reload
 ; CHECK-NEXT:    ret
-define internal i1 @test3() {
   %1 = tail call i32 bitcast (i32 (...)* @g to i32 ()*)()
   %2 = icmp eq i32 %1, 0
   br i1 %2, label %3, label %5
 
-3:                                                ; preds = %0
+3:
   callbr void asm sideeffect "1: nop\0A\09.quad c\0A\09b ${1:l}\0A\09.quad ${0:c}", "i,!i"(i32* null)
           to label %4 [label %8]
 
-4:                                                ; preds = %3
+4:
   br label %8
 
-5:                                                ; preds = %0
+5:
   %6 = tail call i32 bitcast (i32 (...)* @i to i32 ()*)()
   %7 = icmp ne i32 %6, 0
   br label %8
 
-8:                                                ; preds = %3, %4, %5
+8:
   %9 = phi i1 [ %7, %5 ], [ false, %4 ], [ false, %3 ]
   ret i1 %9
 }