[OpenMP][DeviceRTL] Remove `atomic::store`

[tianshilei1992]

Summary

atomic::store currently is being used by AMDGPU for named barrier. Internally
it calls __atomic_store_n compiler builtin. However, NVPTX backends doesn't
support AtomicStore instruction, causing backend crash when calling llc on
the device runtime directly, where atomic::store is not optimized out. This
patch removes atomic::store from public area and uses __atomic_store_n
directly where it is needed as a workaround. We can come back and revisit it in
the future is atomic::store is needed somewhere else.

[jdoerfert]

LG, though the backend should be able to handle this, IMHO

[tianshilei1992]

In D130030#3660553, @jdoerfert wrote:

LG, though the backend should be able to handle this, IMHO

Yeah, __atomic_exchange_n is expanded based on the ordering, and one of the expansion is still atomic store, which goes back to current situation. atomic::store is only being used by AMDGPU to implement named barrier. I'm wondering if we want to drop atomic::store and use the __atomic_store_n wherever it needs?

[tianshilei1992]

refine it

[jdoerfert]

No, this is strictly worse. If anything, we can introduce a switch to ensure the ordering is known statically. We can use a macro and do it for all of the atomic ops.

[tianshilei1992]

In D130030#3663558, @jdoerfert wrote:

No, this is strictly worse. If anything, we can introduce a switch to ensure the ordering is known statically. We can use a macro and do it for all of the atomic ops.

It doesn't work because __atomic_exchange_n with __ATOMIC_RELEASE will be lowered to atomicLoad, which again causes the issue.

openmp/libomptarget/DeviceRTL/src/Synchronization.cpp

 /// NOTE: This function needs to be implemented by every target.
 uint32_t atomicInc(uint32_t *Address, uint32_t Val, int Ordering);
 
 uint32_t atomicLoad(uint32_t *Address, int Ordering) {
   return __atomic_fetch_add(Address, 0U, __ATOMIC_SEQ_CST);
 }
 
 void atomicStore(uint32_t *Address, uint32_t Val, int Ordering) {
-  __atomic_store_n(Address, Val, Ordering);
+  (void)__atomic_exchange_n(Address, Val, Ordering);
 }
 
 uint32_t atomicAdd(uint32_t *Address, uint32_t Val, int Ordering) {
   return __atomic_fetch_add(Address, Val, Ordering);
 }
 uint32_t atomicMax(uint32_t *Address, uint32_t Val, int Ordering) {
   return __atomic_fetch_max(Address, Val, Ordering);
 }