[AMDGPU][NFC] Validate G_MERGE_VALUES as we match zero-extended 32-bit scalars.

[kosarev]

Caught by Jay in https://reviews.llvm.org/D128836#inline-1240242.

llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp

static Register matchZeroExtendFromS32(MachineRegisterInfo &MRI, Register Reg) {
   if (mi_match(Reg, MRI, m_GZExt(m_Reg(ZExtSrc))))
     return MRI.getType(ZExtSrc) == LLT::scalar(32) ? ZExtSrc : Register();
 
   // Match legalized form %zext = G_MERGE_VALUES (s32 %x), (s32 0)
   const MachineInstr *Def = getDefIgnoringCopies(Reg, MRI);
   if (Def->getOpcode() != AMDGPU::G_MERGE_VALUES)
     return Register();
 
+  assert(Def->getNumOperands() == 3 &&
+         MRI.getType(Def->getOperand(0).getReg()) == LLT::scalar(64));
   if (mi_match(Def->getOperand(2).getReg(), MRI, m_ZeroInt())) {
     return Def->getOperand(1).getReg();
   }
 
   return Register();
 }
 
 bool AMDGPUInstructionSelector::selectGlobalLoadLds(MachineInstr &MI) const{