This is an archive of the discontinued LLVM Phabricator instance.

[LoongArch] Optimize the atomic store with amswap_db.[w/d]
ClosedPublic

Authored by gonglingqin on Jul 15 2022, 12:23 AM.

Details

Summary

When AtomicOrdering is release or stronger, use

amswap_db.[w/d] $zero, $a1, $a0

instead of

dbar 0
st.[w/d] $a0, $a1, 0

Thanks to @xry111 for the suggestion: https://reviews.llvm.org/D128901#3626635

Diff Detail

Event Timeline

gonglingqin created this revision.Jul 15 2022, 12:23 AM
Herald added a project: Restricted Project. · View Herald TranscriptJul 15 2022, 12:23 AM
gonglingqin requested review of this revision.Jul 15 2022, 12:23 AM
Herald added a project: Restricted Project. · View Herald TranscriptJul 15 2022, 12:23 AM
xry111 added inline comments.Jul 19 2022, 4:18 AM
llvm/test/CodeGen/LoongArch/ir-instruction/load-store-atomic.ll
308

The manual says LA32 may lack amswap_db.w (its not in Table 2-1, page 12 in the Chinese version). If it's not a documentation error we need to keep the old behavior for LA32.

gonglingqin added inline comments.Jul 19 2022, 6:10 PM
llvm/test/CodeGen/LoongArch/ir-instruction/load-store-atomic.ll
308

Thanks, I will change that.

Address @xry111's comments.

A polite ping. Thanks:)

xen0n added a comment.Aug 1 2022, 6:32 AM

I'm not sure about the changes (they are a little bit too much and I must admit I'm relatively weak at memory models) but the test case changes are good. I'd leave the LGTM to someone else for now...

SixWeining added inline comments.Aug 19 2022, 12:43 AM
llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
1754

No need to use else after return.

1755–1757

Size = isa<StoreInst>(I) ? I->getOperand(0)->getType()->getIntegerBitWidth() : 0;

SixWeining added inline comments.Aug 19 2022, 12:50 AM
llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
1755–1761

How about:

if (isa<LoadInst>(I))
  return true;

// On LA64, atomic store operations with IntegerBitWidth of 32 and 64 do not
// require fences beacuse we can use amswap_db.[w/d].
if (isa<StoreInst>(I)) {
  unsigned Size = I->getOperand(0)->getType()->getIntegerBitWidth();
  return (Size == 8 || Size == 16);
}

return false;
gonglingqin added inline comments.Aug 19 2022, 1:28 AM
llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
1754

Thanks.

1755–1757

Thanks.

1755–1761

Thanks, I will change it.

Address @SixWeining's comments.

This revision is now accepted and ready to land.Aug 21 2022, 8:00 PM