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Differential D129760

[AMDGPU] Pre-commit tests for D129759
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Authored by abinavpp on Jul 14 2022, 5:15 AM.

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arsenm
foad
rampitec
Commits
rG4baf8f092b47: [AMDGPU] Pre-commit tests for D129759

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Unit TestsFailed

TimeTest
60,040 msx64 debian > ThreadSanitizer-x86_64.ThreadSanitizer-x86_64::restore_stack.cpp

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abinavpp created this revision.Jul 14 2022, 5:15 AM
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abinavpp requested review of this revision.Jul 14 2022, 5:15 AM
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abinavpp added a child revision: D129759: [AMDGPU] Set amdgpu-memory-bound if a basic block has dense global memory access.Jul 14 2022, 5:16 AM
Harbormaster completed remote builds in B175368: Diff 444609.Jul 14 2022, 7:29 AM
rampitec accepted this revision.Jul 15 2022, 10:58 AM
This revision is now accepted and ready to land.Jul 15 2022, 10:58 AM
This revision was landed with ongoing or failed builds.Jul 19 2022, 2:47 AM
Closed by commit rG4baf8f092b47: [AMDGPU] Pre-commit tests for D129759 (authored by abinavpp). · Explain Why
This revision was automatically updated to reflect the committed changes.
abinavpp added a commit: rG4baf8f092b47: [AMDGPU] Pre-commit tests for D129759.

Revision Contents

PathSize
llvm/
test/
CodeGen/
AMDGPU/
69 lines

Diff 444609

llvm/test/CodeGen/AMDGPU/perfhint.ll

Show All 13 Linesbb:
%tmp6 = add nuw nsw i64 %tmp2, 1 %tmp6 = add nuw nsw i64 %tmp2, 1
%tmp7 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %arg, i64 %tmp6 %tmp7 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %arg, i64 %tmp6
%tmp8 = load <4 x i32>, <4 x i32> addrspace(1)* %tmp7, align 16 %tmp8 = load <4 x i32>, <4 x i32> addrspace(1)* %tmp7, align 16
%tmp9 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %arg1, i64 %tmp6 %tmp9 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %arg1, i64 %tmp6
store <4 x i32> %tmp8, <4 x i32> addrspace(1)* %tmp9, align 16 store <4 x i32> %tmp8, <4 x i32> addrspace(1)* %tmp9, align 16
ret void ret void
} }
; GCN-LABEL: {{^}}test_membound_1:
; GCN: MemoryBound: 0
define amdgpu_kernel void @test_membound_1(<2 x double> addrspace(1)* nocapture readonly %ptr.0,
<2 x double> addrspace(1)* nocapture %ptr.1,
<2 x double> %arg.0, i32 %arg.1, <4 x double> %arg.2) {
bb.entry:
%id.32 = tail call i32 @llvm.amdgcn.workitem.id.x()
%id.0 = zext i32 %id.32 to i64
%gep.0 = getelementptr inbounds <2 x double>, <2 x double> addrspace(1)* %ptr.0, i64 %id.0
%ld.0 = load <2 x double>, <2 x double> addrspace(1)* %gep.0, align 16
%add.0 = fadd <2 x double> %arg.0, %ld.0
%id.1 = add nuw nsw i64 %id.0, 1
%gep.1 = getelementptr inbounds <2 x double>, <2 x double> addrspace(1)* %ptr.0, i64 %id.1
%ld.1 = load <2 x double>, <2 x double> addrspace(1)* %gep.1, align 16
%add.1 = fadd <2 x double> %add.0, %ld.1
%id.2 = add nuw nsw i64 %id.0, 2
%gep.2 = getelementptr inbounds <2 x double>, <2 x double> addrspace(1)* %ptr.0, i64 %id.2
%ld.2 = load <2 x double>, <2 x double> addrspace(1)* %gep.2, align 16
%add.2 = fadd <2 x double> %add.1, %ld.2
%id.3 = add nuw nsw i64 %id.0, 3
%gep.3= getelementptr inbounds <2 x double>, <2 x double> addrspace(1)* %ptr.0, i64 %id.3
%ld.3 = load <2 x double>, <2 x double> addrspace(1)* %gep.3, align 16
%add.3 = fadd <2 x double> %add.2, %ld.3
%id.4 = add nuw nsw i64 %id.0, 4
%gep.4= getelementptr inbounds <2 x double>, <2 x double> addrspace(1)* %ptr.0, i64 %id.4
%ld.4 = load <2 x double>, <2 x double> addrspace(1)* %gep.4, align 16
%add.4 = fadd <2 x double> %add.3, %ld.4
store <2 x double> %add.4, <2 x double> addrspace(1)* %ptr.1, align 16
%cond = icmp eq i32 %arg.1, 0
br i1 %cond, label %bb.true, label %bb.ret
bb.true:
%i0.arg.0 = extractelement <2 x double> %arg.0, i32 0
%i1.arg.0 = extractelement <2 x double> %arg.0, i32 1
%add.1.0 = fadd double %i0.arg.0, %i1.arg.0
%i0.arg.2 = extractelement <4 x double> %arg.2, i32 0
%i1.arg.2 = extractelement <4 x double> %arg.2, i32 1
%add.1.1 = fadd double %i0.arg.2, %i1.arg.2
%add.1.2 = fadd double %add.1.0, %add.1.1
%i2.arg.2 = extractelement <4 x double> %arg.2, i32 2
%i3.arg.2 = extractelement <4 x double> %arg.2, i32 3
%add.1.3 = fadd double %i2.arg.2, %i3.arg.2
%add.1.4 = fadd double %add.1.2, %add.1.3
%i0.add.0 = extractelement <2 x double> %add.0, i32 0
%i1.add.0 = extractelement <2 x double> %add.0, i32 1
%add.1.5 = fadd double %i0.add.0, %i1.add.0
%add.1.6 = fadd double %add.1.4, %add.1.5
%i0.add.1 = extractelement <2 x double> %add.1, i32 0
%i1.add.1 = extractelement <2 x double> %add.1, i32 1
%add.1.7 = fadd double %i0.add.1, %i1.add.1
%add.1.8 = fadd double %add.1.6, %add.1.7
%i0.add.2 = extractelement <2 x double> %add.2, i32 0
%i1.add.2 = extractelement <2 x double> %add.2, i32 1
%add.1.9 = fadd double %i0.add.2, %i1.add.2
%add.1.10 = fadd double %add.1.8, %add.1.9
%ptr.1.bc = bitcast <2 x double> addrspace(1)* %ptr.1 to double addrspace(1)*
store double %add.1.8, double addrspace(1)* %ptr.1.bc, align 8
br label %bb.ret
bb.ret:
ret void
}
; GCN-LABEL: {{^}}test_large_stride: ; GCN-LABEL: {{^}}test_large_stride:
; GCN: MemoryBound: 0 ; GCN: MemoryBound: 0
; GCN: WaveLimiterHint : 1 ; GCN: WaveLimiterHint : 1
define amdgpu_kernel void @test_large_stride(i32 addrspace(1)* nocapture %arg) { define amdgpu_kernel void @test_large_stride(i32 addrspace(1)* nocapture %arg) {
bb: bb:
%tmp = getelementptr inbounds i32, i32 addrspace(1)* %arg, i64 4096 %tmp = getelementptr inbounds i32, i32 addrspace(1)* %arg, i64 4096
%tmp1 = load i32, i32 addrspace(1)* %tmp, align 4 %tmp1 = load i32, i32 addrspace(1)* %tmp, align 4
%mul1 = mul i32 %tmp1, %tmp1 %mul1 = mul i32 %tmp1, %tmp1
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