[PPC32] fix stack size allocated for float point argument

[shchenz]

Summary

This is for https://github.com/llvm/llvm-project/issues/56469

For now, we allocate 8 bytes for float type arguments on PPC32. Actually we should use 4 for PPC32. Even though float point value will be converted to double precision in the registers, but in the memory, it is still 4 bytes.

I can observe same behavior for PPC32 AIX. Only 4 bytes allocated for float type.

[kernigh]

Thank you. This diff fixed the pass.c from my bug report. To apply the diff, I needed to remove the pr56469.ll part, because I don't have that file.

[shchenz]

In D129558#3649380, @kernigh wrote:

Thank you. This diff fixed the pass.c from my bug report. To apply the diff, I needed to remove the pr56469.ll part, because I don't have that file.

Right. pr56469.ll is still on my local branch. I just want to show the diff caused by this patch for better review.

[shchenz]

gentle ping.

[nemanjai]

In D129558#3650601, @shchenz wrote:

In D129558#3649380, @kernigh wrote:

Thank you. This diff fixed the pass.c from my bug report. To apply the diff, I needed to remove the pr56469.ll part, because I don't have that file.

Right. pr56469.ll is still on my local branch. I just want to show the diff caused by this patch for better review.

Normally, you should pre-commit a test like this so that any developer can apply the patch cleanly to ToT.

Nonetheless, LGTM.

llvm/lib/Target/PowerPC/PPCCallingConv.td

CCIfType<[f32],
            CCIfSubtarget<"hasSPE()",
                          CCAssignToReg<[R3, R4, R5, R6, R7, R8, R9, R10]>>>,
 
   // Split arguments have an alignment of 8 bytes on the stack.
   CCIfType<[i32], CCIfSplit<CCAssignToStack<4, 8>>>,
   
   CCIfType<[i32], CCAssignToStack<4, 4>>,
   
-  // Floats are stored in double precision format, thus they have the same
-  // alignment and size as doubles.
-  // With SPE floats are stored as single precision, so have alignment and
-  // size of int.
-  CCIfType<[f32,f64], CCIfNotSubtarget<"hasSPE()", CCAssignToStack<8, 8>>>,
-  CCIfType<[f32], CCIfSubtarget<"hasSPE()", CCAssignToStack<4, 4>>>,
-  CCIfType<[f64], CCIfSubtarget<"hasSPE()", CCAssignToStack<8, 8>>>,
+  CCIfType<[f32], CCAssignToStack<4, 4>>,
+  CCIfType<[f64], CCAssignToStack<8, 8>>,
 
   // Vectors and float128 get 16-byte stack slots that are 16-byte aligned.
   CCIfType<[v16i8, v8i16, v4i32, v4f32, v2f64, v2i64], CCAssignToStack<16, 16>>,
   CCIfType<[f128], CCIfSubtarget<"hasAltivec()", CCAssignToStack<16, 16>>>
 ]>;
 
 // This calling convention puts vector arguments always on the stack. It is used
 // to assign vector arguments which belong to the variable portion of the

llvm/test/CodeGen/PowerPC/fminnum.ll

 ; CHECK-NEXT:    stfd 28, 96(1) # 8-byte Folded Spill
 ; CHECK-NEXT:    fmr 28, 5
 ; CHECK-NEXT:    stfd 29, 104(1) # 8-byte Folded Spill
 ; CHECK-NEXT:    fmr 29, 6
 ; CHECK-NEXT:    stfd 30, 112(1) # 8-byte Folded Spill
 ; CHECK-NEXT:    fmr 30, 7
 ; CHECK-NEXT:    stfd 31, 120(1) # 8-byte Folded Spill
 ; CHECK-NEXT:    fmr 31, 8
-; CHECK-NEXT:    lfs 24, 192(1)
-; CHECK-NEXT:    lfs 23, 184(1)
-; CHECK-NEXT:    lfs 22, 176(1)
-; CHECK-NEXT:    lfs 21, 168(1)
-; CHECK-NEXT:    lfs 20, 160(1)
-; CHECK-NEXT:    lfs 19, 152(1)
-; CHECK-NEXT:    lfs 18, 144(1)
+; CHECK-NEXT:    lfs 24, 164(1)
+; CHECK-NEXT:    lfs 23, 160(1)
+; CHECK-NEXT:    lfs 22, 156(1)
+; CHECK-NEXT:    lfs 21, 152(1)
+; CHECK-NEXT:    lfs 20, 148(1)
+; CHECK-NEXT:    lfs 19, 144(1)
+; CHECK-NEXT:    lfs 18, 140(1)
 ; CHECK-NEXT:    bl fminf
 ; CHECK-NEXT:    fmr 17, 1
 ; CHECK-NEXT:    fmr 1, 25
 ; CHECK-NEXT:    fmr 2, 18
 ; CHECK-NEXT:    bl fminf
 ; CHECK-NEXT:    fmr 25, 1
 ; CHECK-NEXT:    fmr 1, 26
 ; CHECK-NEXT:    fmr 2, 19

llvm/test/CodeGen/PowerPC/pr56469.ll

 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc -verify-machineinstrs -mtriple=powerpc-unknown-openbsd < %s | FileCheck %s
 
 @.str = private constant [32 x i8] c"i = %g, j = %g, k = %g, l = %g\0A\00", align 1
 
 define void @callee(float  %a, float  %b, float  %c, float  %d, float  %e, float  %f, float  %g, float  %h, float  %i, float  %j, float  %k, float  %l)  nounwind {
 ; CHECK-LABEL: callee:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    mflr 0
 ; CHECK-NEXT:    stw 0, 4(1)
 ; CHECK-NEXT:    stwu 1, -16(1)
 ; CHECK-NEXT:    lfs 1, 24(1)
 ; CHECK-NEXT:    lis 3, .L.str@ha
-; CHECK-NEXT:    lfs 2, 32(1)
+; CHECK-NEXT:    lfs 2, 28(1)
 ; CHECK-NEXT:    la 3, .L.str@l(3)
-; CHECK-NEXT:    lfs 3, 40(1)
+; CHECK-NEXT:    lfs 3, 32(1)
 ; CHECK-NEXT:    creqv 6, 6, 6
-; CHECK-NEXT:    lfs 4, 48(1)
+; CHECK-NEXT:    lfs 4, 36(1)
 ; CHECK-NEXT:    bl printf
 ; CHECK-NEXT:    lwz 0, 20(1)
 ; CHECK-NEXT:    addi 1, 1, 16
 ; CHECK-NEXT:    mtlr 0
 ; CHECK-NEXT:    blr
 entry:
   %conv = fpext float %i to double
   %conv1 = fpext float %j to double
   %conv2 = fpext float %k to double
   %conv3 = fpext float %l to double
   %call = tail call signext i32 (i8*, ...) @printf(i8*  nonnull dereferenceable(1) getelementptr inbounds ([32 x i8], [32 x i8]* @.str, i64 0, i64 0), double  %conv, double  %conv1, double  %conv2, double  %conv3)
   ret void
 }
 
 declare  signext i32 @printf(i8* nocapture  readonly, ...)