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[X86][NFCI] Remove target-specific branch optimisation that's handled in BranchFolding
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Authored by asb on Jul 6 2022, 7:41 AM.

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Summary

I was looking at other target's implementations of analyzeBranch to see if there's anything we're neglecting to handle for RISC-V. It looks like this optimisation in analyzeBranch is handled in OptimizeBlock in BranchFolding, so it's not clear there's any advantage in repeating in in X86's analyzeBranch. Certainly, no tests fail upon removing it.

Perhaps there's a benefit of handling it here that I'm missing?

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asb created this revision.Jul 6 2022, 7:41 AM
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asb requested review of this revision.Jul 6 2022, 7:41 AM
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LGTM but I don't know this code very well - @pengfei @craig.topper any comments?

There seems a test for it: https://github.com/llvm/llvm-project/blob/main/llvm/test/CodeGen/X86/brcond.ll#L39
Maybe it has become dead code. LGTM.

@asb please can you confirm if the tests fail if the OptimizeBlock variant of the code is disabled as well?

asb added a comment.EditedAug 9 2022, 12:51 AM

There seems a test for it: https://github.com/llvm/llvm-project/blob/main/llvm/test/CodeGen/X86/brcond.ll#L39
Maybe it has become dead code. LGTM.

@asb please can you confirm if the tests fail if the OptimizeBlock variant of the code is disabled as well?

Weirdly that particular test in brcond.ll doesn't fail, but if disabling the code that implements this transform in OptimizeBlock:

--- a/llvm/lib/CodeGen/BranchFolding.cpp
+++ b/llvm/lib/CodeGen/BranchFolding.cpp
@@ -1452,17 +1452,17 @@ ReoptimizeBlock:
     // If the prior block branches here on true and somewhere else on false, and
     // if the branch condition is reversible, reverse the branch to create a
     // fall-through.
-    if (PriorTBB == MBB) {
-      SmallVector<MachineOperand, 4> NewPriorCond(PriorCond);
-      if (!TII->reverseBranchCondition(NewPriorCond)) {
-        DebugLoc dl = getBranchDebugLoc(PrevBB);
-        TII->removeBranch(PrevBB);
-        TII->insertBranch(PrevBB, PriorFBB, nullptr, NewPriorCond, dl);
-        MadeChange = true;
-        ++NumBranchOpts;
-        goto ReoptimizeBlock;
-      }
-    }
+//  if (PriorTBB == MBB) {
+//    SmallVector<MachineOperand, 4> NewPriorCond(PriorCond);
+//    if (!TII->reverseBranchCondition(NewPriorCond)) {
+//      DebugLoc dl = getBranchDebugLoc(PrevBB);
+//      TII->removeBranch(PrevBB);
+//      TII->insertBranch(PrevBB, PriorFBB, nullptr, NewPriorCond, dl);
+//      MadeChange = true;
+//      ++NumBranchOpts;
+//      goto ReoptimizeBlock;
+//    }
+//  }

Then the following X86 tests fail:

Failed Tests (8):
  LLVM :: CodeGen/X86/2010-09-17-SideEffectsInChain.ll
  LLVM :: CodeGen/X86/atomic-flags.ll
  LLVM :: CodeGen/X86/fp-une-cmp.ll
  LLVM :: CodeGen/X86/ins_subreg_coalesce-3.ll
  LLVM :: CodeGen/X86/reverse_branches.ll
  LLVM :: CodeGen/X86/speculative-load-hardening.ll
  LLVM :: CodeGen/X86/stack-protector-3.ll
  LLVM :: CodeGen/X86/switch.ll
RKSimon accepted this revision.Aug 10 2022, 1:53 AM

LGTM - thanks for checking - I can't see any reason we duplicate this

This revision is now accepted and ready to land.Aug 10 2022, 1:53 AM
This revision was landed with ongoing or failed builds.Aug 10 2022, 2:37 AM
This revision was automatically updated to reflect the committed changes.