[SPARC] Don't do leaf optimization on procedures with inline assembly

[koakuma]

Summary

On SPARC, leaf function optimization omits the register window sliding (and the associated register name changes). This might result in miscompilation of procedures containing inline assembly, as some of the register constraints used may interfere with the register usage of optimized functions, so we disable leaf procedure optimization on those procedures to prevent it from happening.

This is a continuation of patch D102342 by @LemonBoy, the original comment is reproduced below:

Leaf functions allow the compiler to omit the setup and teardown of a frame pointer, therefore avoiding the exchange of the in/out register. According to the SPARC architecture manual every reference to %i0-%i5 should be replaced with %o0-o5, if the target register is already in use a further remapping step to %g1-%g7 is required to free the output register.

Add a simple check to make sure not to stomp on any output register that's already in use.

[koakuma]

Also update other inline asm-related SPARC tests.

llvm/lib/Target/Sparc/SparcFrameLowering.cpp

 }
 
 bool SparcFrameLowering::isLeafProc(MachineFunction &MF) const
 {
 
   MachineRegisterInfo &MRI = MF.getRegInfo();
   MachineFrameInfo    &MFI = MF.getFrameInfo();
 
-  return !(MFI.hasCalls()                  // has calls
-           || MRI.isPhysRegUsed(SP::L0)    // Too many registers needed
-           || MRI.isPhysRegUsed(SP::O6)    // %sp is used
-           || hasFP(MF));                  // need %fp
+  return !(MFI.hasCalls()               // has calls
+           || MRI.isPhysRegUsed(SP::L0) // Too many registers needed
+           || MRI.isPhysRegUsed(SP::O6) // %sp is used
+           || hasFP(MF)                 // need %fp
+           || MF.hasInlineAsm());       // has inline assembly
 }
 
 void SparcFrameLowering::remapRegsForLeafProc(MachineFunction &MF) const {
   MachineRegisterInfo &MRI = MF.getRegInfo();
   // Remap %i[0-7] to %o[0-7].
   for (unsigned reg = SP::I0; reg <= SP::I7; ++reg) {
     if (!MRI.isPhysRegUsed(reg))
       continue;

llvm/test/CodeGen/SPARC/leafproc.ll

entry:
   %1 = getelementptr inbounds [2 x i32], [2 x i32]* %array, i32 0, i32 0
   store i32 1, i32* %1, align 4
   %2 = getelementptr inbounds [2 x i32], [2 x i32]* %array, i32 0, i32 1
   store i32 2, i32* %2, align 4
   %3 = getelementptr inbounds [2 x i32], [2 x i32]* %array, i32 0, i32 %a
   %4 = load i32, i32* %3, align 4
   ret i32 %4
 }
+
+; Here we have a leaf function where it contains inline assembly, which means
+; that register renumbering might interfere with the register constraints.
+; As a result the function is not marked as being a leaf one.
+
+; CHECK-LABEL: leaf_proc_give_up
+; CHECK: save %sp, -96, %sp
+; CHECK: ld [%fp+92], %o5
+; CHECK: mov %i0, %g1
+; CHECK: mov %i1, %o0
+; CHECK: mov %i2, %o1
+; CHECK: mov %i3, %o2
+; CHECK: mov %i4, %o3
+; CHECK: mov %i5, %o4
+; CHECK: ret
+; CHECK-NEXT: restore %g0, %o0, %o0
+
+define i32 @leaf_proc_give_up(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, i32 %6) {
+Entry:
+  %g = call i32 asm sideeffect "", "={o0},{g1},{o0},{o1},{o2},{o3},{o4},{o5}"(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, i32 %6)
+  ret i32 %g
+}