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[PowerPC] Allow llvm.ppc.cfence to accept pointer types
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Authored by lkail on Jun 10 2022, 8:50 PM.

Details

Summary

In the context of atomic load, integer, pointer and float point types are allowed, thus we should allow llvm.ppc.cfence to accept any type mentioned.

Fixes https://github.com/llvm/llvm-project/issues/55983.

Diff Detail

Event Timeline

lkail created this revision.Jun 10 2022, 8:50 PM
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lkail requested review of this revision.Jun 10 2022, 8:50 PM
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lkail updated this revision to Diff 436099.Jun 10 2022, 9:19 PM
lkail updated this revision to Diff 436102.Jun 10 2022, 9:37 PM

Rebased to where float tests are added.

lkail updated this revision to Diff 436111.Jun 10 2022, 11:35 PM

Added original reduced case from @nemanjai .

This looks great. Is this safe to backport to LLVM13 or LLVM14?

lkail added a comment.EditedJun 14 2022, 1:22 AM

This looks great. Is this safe to backport to LLVM13 or LLVM14?

Should be safe to LLVM-14, if there is 14.0.6. And noted that, when it's landed, it can be cherry-picked cleanly to LLVM-14 due to the floating point tests added.

lkail updated this revision to Diff 436704.Jun 14 2022, 2:01 AM

Avoid using undef in tests.

LGTM with one nit.

Thanks for fixing this.

llvm/include/llvm/IR/IntrinsicsPowerPC.td
1500

Maybe we need to add assertion in PPCTargetLowering::emitTrailingFence to explicitly check when we generate ppc_cfence, we are not generating fence for any undesired types? After this change, any type is accepted, for example fp128 or vector types.

IR level verifier can be disabled and the assertion when lower this intrinsic in ISEL is a little late IMO.

shchenz accepted this revision as: shchenz.Jun 16 2022, 9:21 PM
This revision is now accepted and ready to land.Jun 16 2022, 9:21 PM
vchuravy accepted this revision.Jun 23 2022, 6:54 AM

Backported this for Julia to 13 & 14 and this fixes our build!

lkail updated this revision to Diff 439593.Jun 23 2022, 7:20 PM

Rebased.

This revision was landed with ongoing or failed builds.Jun 23 2022, 7:55 PM
This revision was automatically updated to reflect the committed changes.
thakis added a subscriber: thakis.Jun 23 2022, 8:49 PM

Looks like this breaks tests on non-linux: http://45.33.8.238/macm1/37997/step_11.txt , http://45.33.8.238/win/60800/step_11.txt

Please take a look and revert for now if it takes a while to fix.

lkail added a comment.Jun 23 2022, 9:07 PM

Looks like this breaks tests on non-linux: http://45.33.8.238/macm1/37997/step_11.txt , http://45.33.8.238/win/60800/step_11.txt

Please take a look and revert for now if it takes a while to fix.

Hi, I've pushed a fix https://github.com/llvm/llvm-project/commit/106657df4cb36b325056efc57c91340d3d85236d. Should be green in next build.

nemanjai added inline comments.Jun 24 2022, 1:12 AM
llvm/test/CodeGen/PowerPC/cfence-double.ll
7

Is the plan here to do something better than assert? Perhaps emit a fatal error? What happens on non-assert builds on these tests now? Something terrible?

lkail added inline comments.Jun 24 2022, 2:00 AM
llvm/test/CodeGen/PowerPC/cfence-double.ll
7

I've posted https://reviews.llvm.org/D127563 to fix cfence on floating point types on PowerPC side. Alternative solution would be https://reviews.llvm.org/D127609(since the solution on PowerPC side assumes the floating point value is converted from integer value). For non-assert builds, the test causes an ICE.

lkail added inline comments.Jun 24 2022, 2:03 AM
llvm/test/CodeGen/PowerPC/cfence-double.ll
7

The ICE is something like

LLVM ERROR: Cannot select: 0x6534da8: i64 = any_extend 0x6534b38
  0x6534b38: f64 = bitcast 0x6534ad0
    0x6534ad0: i64,ch = AtomicLoad<(load monotonic (s64) from %ir.0)> 0x64befe8, 0x6534a68
      0x6534a68: i64,ch = CopyFromReg 0x64befe8, Register:i64 %0
        0x6534a00: i64 = Register %0