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Differential D126935

[LLVM] [NFC] remove unnecessary, confusing scope
ClosedPublic

Authored by fmayer on Jun 2 2022, 6:12 PM.

Details

Reviewers
dmgreen
Commits
rG7e48dae5a180: [LLVM] [NFC] remove unnecessary, confusing scope

Diff Detail

Event Timeline

fmayer created this revision.Jun 2 2022, 6:12 PM
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fmayer requested review of this revision.Jun 2 2022, 6:12 PM
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fmayer added a reviewer: dmgreen.Jun 2 2022, 6:16 PM
fmayer retitled this revision from [LLVM] [NFC] remove unnecssary, confusing scope to [LLVM] [NFC] remove unnecessary, confusing scope.
Harbormaster completed remote builds in B167654: Diff 433933.Jun 2 2022, 6:48 PM
dmgreen accepted this revision.Jun 3 2022, 1:58 AM

Sure, that does look odd! LGTM

This revision is now accepted and ready to land.Jun 3 2022, 1:58 AM
Closed by commit rG7e48dae5a180: [LLVM] [NFC] remove unnecessary, confusing scope (authored by fmayer). · Explain WhyJun 3 2022, 10:10 AM
This revision was automatically updated to reflect the committed changes.
fmayer added a commit: rG7e48dae5a180: [LLVM] [NFC] remove unnecessary, confusing scope.

Revision Contents

PathSize
llvm/
lib/
Target/
AArch64/
5 lines

Diff 434058

llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp

Show First 20 Lines • Show All 1,257 Lines • ▼ Show 20 Lines if (STI->hasZeroCycleZeroingFPWorkaround() &&
TmpInst.addOperand(MCOperand::createReg(MI->getOperand(0).getReg())); TmpInst.addOperand(MCOperand::createReg(MI->getOperand(0).getReg()));
TmpInst.addOperand(MCOperand::createImm(MI->getOperand(1).getImm())); TmpInst.addOperand(MCOperand::createImm(MI->getOperand(1).getImm()));
EmitToStreamer(*OutStreamer, TmpInst); EmitToStreamer(*OutStreamer, TmpInst);
return; return;
} }
break; break;
case AArch64::DBG_VALUE: case AArch64::DBG_VALUE:
case AArch64::DBG_VALUE_LIST: { case AArch64::DBG_VALUE_LIST:
if (isVerbose() && OutStreamer->hasRawTextSupport()) { if (isVerbose() && OutStreamer->hasRawTextSupport()) {
SmallString<128> TmpStr; SmallString<128> TmpStr;
raw_svector_ostream OS(TmpStr); raw_svector_ostream OS(TmpStr);
PrintDebugValueComment(MI, OS); PrintDebugValueComment(MI, OS);
OutStreamer->emitRawText(StringRef(OS.str())); OutStreamer->emitRawText(StringRef(OS.str()));
} }
return; return;
case AArch64::EMITBKEY: { case AArch64::EMITBKEY: {
ExceptionHandling ExceptionHandlingType = MAI->getExceptionHandlingType(); ExceptionHandling ExceptionHandlingType = MAI->getExceptionHandlingType();
if (ExceptionHandlingType != ExceptionHandling::DwarfCFI && if (ExceptionHandlingType != ExceptionHandling::DwarfCFI &&
ExceptionHandlingType != ExceptionHandling::ARM) ExceptionHandlingType != ExceptionHandling::ARM)
return; return;
if (getFunctionCFISectionType(*MF) == CFISection::None) if (getFunctionCFISectionType(*MF) == CFISection::None)
return; return;
OutStreamer->emitCFIBKeyFrame(); OutStreamer->emitCFIBKeyFrame();
return; return;
} }
}
// Tail calls use pseudo instructions so they have the proper code-gen // Tail calls use pseudo instructions so they have the proper code-gen
// attributes (isCall, isReturn, etc.). We lower them to the real // attributes (isCall, isReturn, etc.). We lower them to the real
// instruction here. // instruction here.
case AArch64::TCRETURNri: case AArch64::TCRETURNri:
case AArch64::TCRETURNriBTI: case AArch64::TCRETURNriBTI:
case AArch64::TCRETURNriALL: { case AArch64::TCRETURNriALL: {
MCInst TmpInst; MCInst TmpInst;
▲ Show 20 Lines • Show All 263 Lines • Show Last 20 Lines