[JITLink][ELF/AARCH64] Implement R_AARCH64_LDST*_ABS_LO12_NC relocation types

[sunho]

Summary

Implement R_AARCH64_LDST*_ABS_LO12_NC relocaiton entries by reusing PageOffset21 generic relocation edge. The difference between macho backend is that in ELF, the shift value is explicitly given by relocation type. lld generates the relocation type that matches with instruction bitwidth, so getting the shift value implicitly from instruction bytes should be fine in typical use cases.

Another way to achieve this is create explicit edges like PageOffset21Shift0, PageOffset21Shift1, PageOffset21Shift2, ... and macho backend explicitly lower to that reading instructions bytes, if that's more preferred way, I'll change to that.

[sunho]

Merge testcase

[sgraenitz]

The difference between macho backend is that in ELF, the shift value is explicitly given by relocation type. lld generates the relocation type that matches with instruction bitwidth, so getting the shift value implicitly from instruction bytes should be fine in typical use cases.

Good explanation, thanks. Yes, I'd agree that's the best solution.

Merge testcase

Thanks!

llvm/lib/ExecutionEngine/JITLink/ELF_aarch64.cpp

145

Alignment can not be smaller then one byte right? Can we skip the check in this case?

156

Can we factor this out into a helper function like checkAlignment(Instr, N)? I guess it's sufficient for the error message to say something like "not aligned to N byte boundary".

[sunho]

llvm/lib/ExecutionEngine/JITLink/ELF_aarch64.cpp

145

I realized the I wrote a very confusing error message here. The more clear message would be "R_AARCH64_LDST8_ABS_LO12_NC target is not a LDRB/STRB (imm12) instruction." I'll change to that.

We still need to check here because technically R_AARCH64_LDST8_ABS_LO12_NC relocation needs the address to be not shifted at all, but if instruction is like LDRH, we're going to shift it left by 1 since getPageOffset12Shift(Instr) returns 1.

I belive such a relocation should not be generated if codegen is doing sane thing, but we still need to check just in case.

[sunho]

Change error messages

[sunho]

Rebase

[sunho]

Rebase

[sunho]

Fix MSVC build error

[sgraenitz]

LGTM, thanks for working on this!

[sunho]

Rebase

[lhames]

Very nice. LGTM!

[lhames]

Committed in ab472c9615447c8a036d198df7debd4fd9b2e8cc.

llvm/include/llvm/ExecutionEngine/JITLink/ELF_aarch64.h

 namespace llvm {
 namespace jitlink {
 
 namespace ELF_aarch64_Edges {
 enum ELFAArch64RelocationKind : Edge::Kind {
   ELFCall26 = Edge::FirstRelocation,
   ELFAdrPage21,
   ELFAddAbs12,
+  ELFLdSt8Abs12,
+  ELFLdSt16Abs12,
+  ELFLdSt32Abs12,
+  ELFLdSt64Abs12,
+  ELFLdSt128Abs12,
+  ELFDelta32
 };
 } // namespace ELF_aarch64_Edges
 
 /// Create a LinkGraph from an ELF/aarch64 relocatable object
 ///
 /// Note: The graph does not take ownership of the underlying buffer, nor copy
 /// its contents. The caller is responsible for ensuring that the object buffer
 /// outlives the graph.

llvm/lib/ExecutionEngine/JITLink/ELF_aarch64.cpp

getRelocationKind(const uint32_t Type) {
     using namespace aarch64;
     switch (Type) {
     case ELF::R_AARCH64_CALL26:
       return ELF_aarch64_Edges::ELFCall26;
     case ELF::R_AARCH64_ADR_PREL_PG_HI21:
       return ELF_aarch64_Edges::ELFAdrPage21;
     case ELF::R_AARCH64_ADD_ABS_LO12_NC:
       return ELF_aarch64_Edges::ELFAddAbs12;
+    case ELF::R_AARCH64_LDST8_ABS_LO12_NC:
+      return ELF_aarch64_Edges::ELFLdSt8Abs12;
+    case ELF::R_AARCH64_LDST16_ABS_LO12_NC:
+      return ELF_aarch64_Edges::ELFLdSt16Abs12;
+    case ELF::R_AARCH64_LDST32_ABS_LO12_NC:
+      return ELF_aarch64_Edges::ELFLdSt32Abs12;
+    case ELF::R_AARCH64_LDST64_ABS_LO12_NC:
+      return ELF_aarch64_Edges::ELFLdSt64Abs12;
+    case ELF::R_AARCH64_LDST128_ABS_LO12_NC:
+      return ELF_aarch64_Edges::ELFLdSt128Abs12;
+    case ELF::R_AARCH64_PREL32:
+      return ELF_aarch64_Edges::ELFDelta32;
     }
 
     return make_error<JITLinkError>("Unsupported aarch64 relocation:" +
                                     formatv("{0:d}", Type));
   }
 
   Error addRelocations() override {
     LLVM_DEBUG(dbgs() << "Processing relocations:\n");
 
     using Base = ELFLinkGraphBuilder<ELFT>;
     using Self = ELFLinkGraphBuilder_aarch64<ELFT>;
     for (const auto &RelSect : Base::Sections)
       if (Error Err = Base::forEachRelocation(RelSect, this,
                                               &Self::addSingleRelocation))
         return Err;
 
     return Error::success();
   }
 
   Error addSingleRelocation(const typename ELFT::Rela &Rel,
                             const typename ELFT::Shdr &FixupSect,
                             Block &BlockToFix) {
+    using namespace support;
     using Base = ELFLinkGraphBuilder<ELFT>;
 
     uint32_t SymbolIndex = Rel.getSymbol(false);
     auto ObjSymbol = Base::Obj.getRelocationSymbol(Rel, Base::SymTabSec);
     if (!ObjSymbol)
       return ObjSymbol.takeError();
 
     Symbol *GraphSymbol = Base::getGraphSymbol(SymbolIndex);
Error addSingleRelocation(const typename ELFT::Rela &Rel,
     if (!RelocKind)
       return RelocKind.takeError();
 
     int64_t Addend = Rel.r_addend;
     orc::ExecutorAddr FixupAddress =
         orc::ExecutorAddr(FixupSect.sh_addr) + Rel.r_offset;
     Edge::OffsetT Offset = FixupAddress - BlockToFix.getAddress();
 
+   // Get a pointer to the fixup content.
+  const void *FixupContent = BlockToFix.getContent().data() +
+                              (FixupAddress - BlockToFix.getAddress());
+
     Edge::Kind Kind = Edge::Invalid;
 
     switch (*RelocKind) {
     case ELFCall26: {
       Kind = aarch64::Branch26;
       break;
     }
     case ELFAdrPage21: {
       Kind = aarch64::Page21;
       break;
     }
     case ELFAddAbs12: {
       Kind = aarch64::PageOffset12;
       break;
     }
+    case ELFLdSt8Abs12: {
+      uint32_t Instr = *(const ulittle32_t *)FixupContent;
+      if (!aarch64::isLoadStoreImm12(Instr) || aarch64::getPageOffset12Shift(Instr) != 0)
+        return make_error<JITLinkError>("R_AARCH64_LDST8_ABS_LO12_NC target is not a "
+                                            "byte alligend LD/ST (imm12) instruction");
+
+      Kind = aarch64::PageOffset12;
+      break;
+    }
+    case ELFLdSt16Abs12: {
+      uint32_t Instr = *(const ulittle32_t *)FixupContent;
+      if (!aarch64::isLoadStoreImm12(Instr) || aarch64::getPageOffset12Shift(Instr) != 1)
+        return make_error<JITLinkError>("R_AARCH64_LDST16_ABS_LO12_NC target is not a "
+                                            "half alligend LD/ST (imm12) instruction");
+
+      Kind = aarch64::PageOffset12;
+      break;
+    }
+    case ELFLdSt32Abs12: {
+      uint32_t Instr = *(const ulittle32_t *)FixupContent;
+      if (!aarch64::isLoadStoreImm12(Instr) || aarch64::getPageOffset12Shift(Instr) != 2)
+        return make_error<JITLinkError>("R_AARCH64_LDST32_ABS_LO12_NC target is not a "
+                                            "word alligend LD/ST (imm12) instruction");
+
+      Kind = aarch64::PageOffset12;
+      break;
+    }
+    case ELFLdSt64Abs12: {
+      uint32_t Instr = *(const ulittle32_t *)FixupContent;
+      if (!aarch64::isLoadStoreImm12(Instr) || aarch64::getPageOffset12Shift(Instr) != 3)
+        return make_error<JITLinkError>("R_AARCH64_LDST64_ABS_LO12_NC target is not a "
+                                            "doubleword alligend LD/ST (imm12) instruction");
+
+      Kind = aarch64::PageOffset12;
+      break;
+    }
+    case ELFLdSt128Abs12: {
+      uint32_t Instr = *(const ulittle32_t *)FixupContent;
+      if (!aarch64::isLoadStoreImm12(Instr) || aarch64::getPageOffset12Shift(Instr) != 4)
+        return make_error<JITLinkError>("R_AARCH64_LDST128_ABS_LO12_NC target is not a "
+                                            "quadword alligend LD/ST (imm12) instruction");
+
+      Kind = aarch64::PageOffset12;
+      break;
+    }
+    case ELFDelta32: {
+      Kind = aarch64::Delta32;
+      break;
+    }
     };
 
     Edge GE(Kind, Offset, *GraphSymbol, Addend);
     LLVM_DEBUG({
       dbgs() << "    ";
       printEdge(dbgs(), BlockToFix, GE, aarch64::getEdgeKindName(Kind));
       dbgs() << "\n";
     });

 const char *getELFAArch64RelocationKindName(Edge::Kind R) {
   switch (R) {
   case ELF_aarch64_Edges::ELFCall26:
     return "ELFCall26";
   case ELF_aarch64_Edges::ELFAdrPage21:
     return "ELFAdrPage21";
   case ELF_aarch64_Edges::ELFAddAbs12:
     return "ELFAddAbs12";
+  case ELF_aarch64_Edges::ELFLdSt8Abs12:
+    return "ELFLdSt8Abs12";
+  case ELF_aarch64_Edges::ELFLdSt16Abs12:
+    return "ELFLdSt16Abs12";
+  case ELF_aarch64_Edges::ELFLdSt32Abs12:
+    return "ELFLdSt32Abs12";
+  case ELF_aarch64_Edges::ELFLdSt64Abs12:
+    return "ELFLdSt64Abs12";
+  case ELF_aarch64_Edges::ELFLdSt128Abs12:
+    return "ELFLdSt128Abs12";
   default:
     return getGenericEdgeKindName(static_cast<Edge::Kind>(R));
   }
 }
 
 } // namespace jitlink
 } // namespace llvm