[PowerPC] Defined and lowered llvm.ppc.kill.canary intrinsic

[shchenz]

Can you add some test cases?
How is this new intrinsic will be used? For now there is no user for it and it will only be used in LLVM IR?

[pscoro]

Added tests and debugging

[pscoro]

[PowerPC] implemented kill_canary intrinsic and tests

[pscoro]

[PowerPC]
Removed accidental patch files

[pscoro]

[PowerPC]
Removed commented change

[pscoro]

@shchenz I have added the test cases.
This intrinsic is defined in order to test the stackprotect functionality on xlf. Use the -qdebug=smashstack flag to use it, make sure that -qstackprotect=all is also set

[shchenz]

llvm/lib/Target/PowerPC/PPCISelLowering.cpp

11112

Why should return -1?

11120

nit: the first letter should be upper for deadBird according to LLVM coding style.

And how can we make sure 0x4C6C566D is not the same with the canary word load with TargetOpcode::LOAD_STACK_GUARD?

11122

Need to run clang-format for the new codes.

11136

nit: no need for the break after a return

llvm/test/CodeGen/PowerPC/kill-canary-intrinsic.ll

3 ↗

(On Diff #438988)

We may also need to add test cases for AIX 32/64 bit too as stack protector is also supported on AIX.

13 ↗

(On Diff #438988)

This seems wrong. When there is no stack protector related instructions in the function, we should not generate the killed store to the stack slot for canary word.

The store instruction now will store a word to the caller unexpectedly.

[pscoro]

llvm/lib/Target/PowerPC/PPCISelLowering.cpp

11112

The source code for getStackProtectorIndex just returns StackProtectorIndex which is initialized to -1, it makes sense as the stack protector byte should be right before the stack frame begins

11120

What would you suggest for this? I'm not sure exactly how the canary word is created, is it worth loading the canary word first, manipulating it to make sure that we store something different?

[pscoro]

patch fix

llvm/include/llvm/IR/IntrinsicsPowerPC.td

def int_ppc_minfl
       : Intrinsic<
             [llvm_double_ty],
             [llvm_double_ty, llvm_double_ty, llvm_double_ty, llvm_vararg_ty],
             [IntrNoMem]>;
   def int_ppc_minfs
       : Intrinsic<[llvm_float_ty],
                   [llvm_float_ty, llvm_float_ty, llvm_float_ty, llvm_vararg_ty],
                   [IntrNoMem]>;
+  def int_ppc_kill_canary
+      : Intrinsic<[],
+                  [],
+                  [IntrWriteMem, IntrHasSideEffects]>;
 }
 
 let TargetPrefix = "ppc" in {  // All PPC intrinsics start with "llvm.ppc.".
   /// PowerPC_Vec_Intrinsic - Base class for all altivec intrinsics.
   class PowerPC_Vec_Intrinsic<string GCCIntSuffix, list<LLVMType> ret_types,
                               list<LLVMType> param_types,
                               list<IntrinsicProperty> properties>
     : GCCBuiltin<!strconcat("__builtin_altivec_", GCCIntSuffix)>,

llvm/lib/Target/PowerPC/PPCISelLowering.cpp

 //===-- PPCISelLowering.cpp - PPC DAG Lowering Implementation -------------===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
 //
SDValue PPCTargetLowering::LowerINTRINSIC_VOID(SDValue Op,
   case Intrinsic::ppc_vsx_stxvp: {
     if (DisablePairedVecSt) {
       SDValue Store = DAG.getStore(Op->getOperand(0), DL, Op->getOperand(2),
                                    Op->getOperand(3), MachinePointerInfo());
       return LowerVectorStore(Store, DAG);
     }
     break;
   }
+  case Intrinsic::ppc_kill_canary: {
+    MachineFunction &MF = DAG.getMachineFunction();
+    if (MF.getFunction().hasFnAttribute(Attribute::SafeStack)) {
+  break;
+    }
+
+    MachineFrameInfo &MFI = MF.getFrameInfo();
+    int SPI = MFI.getStackProtectorIndex(); // should return  -1
+    
+    PPCFunctionInfo *FuncInfo = MF.getInfo<PPCFunctionInfo>();
+    EVT PtrVT = getPointerTy(MF.getDataLayout());
+    SDValue FIN = DAG.getFrameIndex(FuncInfo->getVarArgsFrameIndex(), PtrVT); // frame index
+
+    unsigned int deadBird = 0x4C6C566D; // replaces canary word
+
+    SDValue Store = DAG.getStore( // create store instr, stores (deadBird + 0) into addr (frame index + stack protector)
+            Op->getOperand(0), 
+            DL,
+      DAG.getNode( // add deadBird, 0, return node result
+        ISD::ADD,
+        DL, 
+        PtrVT, 
+        DAG.getConstant(deadBird, DL, PtrVT), 
+        DAG.getConstant(0, DL, PtrVT) 
+            ),
+            DAG.getNode( // add frame index, stack protector index, return node result
+                    ISD::ADD,
+                    DL,      
+                    PtrVT,    
+                    FIN,       
+                    DAG.getConstant(SPI, DL, PtrVT)
+            ), 
+            MachinePointerInfo() 
+    );
+    return Store;
+    break;
+  }
   default:
     break;
   }
   return SDValue();
 }
 
 // Lower scalar BSWAP64 to xxbrd.
 SDValue PPCTargetLowering::LowerBSWAP(SDValue Op, SelectionDAG &DAG) const {