[WebAssembly][NFC] Convert StackBased instruction field to 'bit' from string

[asb]

Summary

This is (IMHO) cleaner and (objectively) more strongly typed than using strings.

A follow-on patch will do the same for IsWasm64.

It feels like modifying TableGen to support KeyCol = [false] and ValueCols = [[true]] etc might be slightly nicer than ["0"] and [["1"]]. @Paul-C-Anagnostopoulos - any thoughts on how feasible it would be to add that or if it might lead to unexpected issues?

[Paul-C-Anagnostopoulos]

The 'true' and 'false' literals are available.

https://llvm.org/docs/TableGen/ProgRef.html#simple-values

[asb]

In D125713#3517006, @Paul-C-Anagnostopoulos wrote:

The 'true' and 'false' literals are available.

https://llvm.org/docs/TableGen/ProgRef.html#simple-values

@Paul-C-Anagnostopoulos indeed, but they're not usable in KeyCol/ValueCols without some further changes to TableGen Element type mismatch for list: element type 'int' not convertible to 'string

[asb]

In D125713#3517844, @asb wrote:

In D125713#3517006, @Paul-C-Anagnostopoulos wrote:

The 'true' and 'false' literals are available.

https://llvm.org/docs/TableGen/ProgRef.html#simple-values

@Paul-C-Anagnostopoulos indeed, but they're not usable in KeyCol/ValueCols without some further changes to TableGen Element type mismatch for list: element type 'int' not convertible to 'string

Having a quick look at the options:

• Make it so int/bits are coercible to string. It would be very handy in this case, but I'd worry about unintended consequences
• Add some shorthand for !cast<string>(foo) that makes it a bit more attractive to use in this case. e.g. let KeyCol = [!tostr(false)]
• Making the logic for comparing KeyCol/ValueCols fuzzier. i.e. compare the field vs "false" in addition to "0". Not sure if this would have unintended consequences either...

Anyway, for the time being I'll land this and live with "0" and "1". But if you have any thoughts on the above, let me know.

[Paul-C-Anagnostopoulos]

I think you can use defvar to define two constants strue and sfalse, then use them instead of true and false. However, defvar'ed constants are a bit funky, so you'll have to test it.

llvm/lib/Target/WebAssembly/WebAssemblyInstrFormats.td

 //=- WebAssemblyInstrFormats.td - WebAssembly Instr. Formats -*- tablegen -*-=//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
 /// WebAssembly instruction format definitions.
 ///
 //===----------------------------------------------------------------------===//
 
 // WebAssembly Instruction Format.
 // We instantiate 2 of these for every actual instruction (register based
 // and stack based), see below.
-class WebAssemblyInst<bits<32> inst, string asmstr, string stack, string is64>
+class WebAssemblyInst<bits<32> inst, string asmstr, bit stack, string is64>
   : StackRel, RegisterRel, Wasm64Rel, Instruction {
   bits<32> Inst = inst; // Instruction encoding.
-  string StackBased = stack;
+  bit StackBased = stack;
   string BaseName = NAME;
   string IsWasm64 = is64;
   string Wasm32Name = !subst("_A64", "_A32", NAME);
   let Namespace   = "WebAssembly";
   let Pattern     = [];
   let AsmString   = asmstr;
   // When there are multiple instructions that map to the same encoding (in
   // e.g. the disassembler use case) prefer the one where IsCanonical == 1.
   bit IsCanonical = 0;
 }
 
 // Normal instructions. Default instantiation of a WebAssemblyInst.
-class NI<dag oops, dag iops, list<dag> pattern, string stack,
+class NI<dag oops, dag iops, list<dag> pattern, bit stack,
          string asmstr = "", bits<32> inst = -1, string is64 = "false">
     : WebAssemblyInst<inst, asmstr, stack, is64> {
   dag OutOperandList = oops;
   dag InOperandList  = iops;
   let Pattern        = pattern;
   let Defs           = [ARGUMENTS];
 }
 

 // are converted to their corresponding stack instructions before lowering to
 // MC.
 // Every instruction should want to be based on this multi-class to guarantee
 // there is always an equivalent pair of instructions.
 multiclass I<dag oops_r, dag iops_r, dag oops_s, dag iops_s,
              list<dag> pattern_r, string asmstr_r = "", string asmstr_s = "",
              bits<32> inst = -1, string is64 = "false"> {
   let isCodeGenOnly = 1 in
-  def "" : NI<oops_r, iops_r, pattern_r, "false", asmstr_r, inst, is64>;
+  def "" : NI<oops_r, iops_r, pattern_r, false, asmstr_r, inst, is64>;
   let BaseName = NAME in
-  def _S : NI<oops_s, iops_s, [], "true", asmstr_s, inst, is64>;
+  def _S : NI<oops_s, iops_s, [], true, asmstr_s, inst, is64>;
 }
 
 // For instructions that have no register ops, so both sets are the same.
 multiclass NRI<dag oops, dag iops, list<dag> pattern, string asmstr = "",
                bits<32> inst = -1> {
   defm "": I<oops, iops, oops, iops, pattern, asmstr, asmstr, inst>;
 }

llvm/lib/Target/WebAssembly/WebAssemblyInstrInfo.td

 // WebAssembly Register to Stack instruction mapping
 //===----------------------------------------------------------------------===//
 
 class StackRel;
 def getStackOpcode : InstrMapping {
   let FilterClass = "StackRel";
   let RowFields = ["BaseName"];
   let ColFields = ["StackBased"];
-  let KeyCol = ["false"];
-  let ValueCols = [["true"]];
+  let KeyCol = ["0"];
+  let ValueCols = [["1"]];
 }
 
 //===----------------------------------------------------------------------===//
 // WebAssembly Stack to Register instruction mapping
 //===----------------------------------------------------------------------===//
 
 class RegisterRel;
 def getRegisterOpcode : InstrMapping {
   let FilterClass = "RegisterRel";
   let RowFields = ["BaseName"];
   let ColFields = ["StackBased"];
-  let KeyCol = ["true"];
-  let ValueCols = [["false"]];
+  let KeyCol = ["1"];
+  let ValueCols = [["0"]];
 }
 
 //===----------------------------------------------------------------------===//
 // WebAssembly 32 to 64-bit instruction mapping
 //===----------------------------------------------------------------------===//
 
 class Wasm64Rel;
 def getWasm64Opcode : InstrMapping {

llvm/utils/TableGen/WebAssemblyDisassemblerEmitter.cpp

if (Opc <= 0xFFFF) {
       Opc = Opc & 0xFF;
     } else {
       Prefix = Opc >> 16;
       Opc = Opc & 0xFFFF;
     }
     auto &CGIP = OpcodeTable[Prefix][Opc];
     // All wasm instructions have a StackBased field of type string, we only
     // want the instructions for which this is "true".
-    auto StackString =
-        Def.getValue("StackBased")->getValue()->getCastTo(StringRecTy::get(RK));
-    auto IsStackBased =
-        StackString &&
-        reinterpret_cast<const StringInit *>(StackString)->getValue() == "true";
+    bool IsStackBased = Def.getValueAsBit("StackBased");
     if (!IsStackBased)
       continue;
     if (CGIP.second) {
       // We already have an instruction for this slot, so decide which one
       // should be the canonical one. This determines which variant gets
       // printed in a disassembly. We want e.g. "call" not "i32.call", and
       // "end" when we don't know if its "end_loop" or "end_block" etc.
       bool IsCanonicalExisting = CGIP.second->TheDef->getValueAsBit("IsCanonical");