[BOLT][NFC] Add MCPlus::primeOperands iterator_range

bolt/include/bolt/Core/MCPlus.h

inline unsigned getNumPrimeOperands(const MCInst &Inst) {
   if (Inst.getNumOperands() > 0 && std::prev(Inst.end())->isInst()) {
     assert(std::prev(Inst.end())->getInst()->getOpcode() ==
            TargetOpcode::ANNOTATION_LABEL);
     return Inst.getNumOperands() - 1;
   }
   return Inst.getNumOperands();
 }
 
+/// Return iterator range of operands excluding operands representing
+/// annotations.
+inline iterator_range<MCInst::iterator> primeOperands(MCInst &Inst) {
+  return iterator_range<MCInst::iterator>(
+      Inst.begin(), Inst.begin() + getNumPrimeOperands(Inst));
+}
+
+inline iterator_range<MCInst::const_iterator>
+primeOperands(const MCInst &Inst) {
+  return iterator_range<MCInst::const_iterator>(
+      Inst.begin(), Inst.begin() + getNumPrimeOperands(Inst));
+}
+
 } // namespace MCPlus
 
 } // namespace bolt
 } // namespace llvm
 
 #endif

bolt/lib/Core/BinaryFunction.cpp

for (const MCInst &Inst : *BB) {
         HashString.push_back(0);
 
       while (Opcode) {
         uint8_t LSB = Opcode & 0xff;
         HashString.push_back(LSB);
         Opcode = Opcode >> 8;
       }
 
-      for (unsigned I = 0, E = MCPlus::getNumPrimeOperands(Inst); I != E; ++I)
-        HashString.append(OperandHashFunc(Inst.getOperand(I)));
+      for (const MCOperand &Op : MCPlus::primeOperands(Inst))
+        HashString.append(OperandHashFunc(Op));
     }
   }
 
   return Hash = std::hash<std::string>{}(HashString);
 }
 
 void BinaryFunction::insertBasicBlocks(
     BinaryBasicBlock *Start,

bolt/lib/Passes/AllocCombiner.cpp

if (BC.MIB->isCFI(Inst))
     return true;
 
   const MCInstrDesc II = BC.MII->get(Inst.getOpcode());
   if (BC.MIB->isTerminator(Inst) ||
       II.hasImplicitDefOfPhysReg(BC.MIB->getStackPointer(), BC.MRI.get()) ||
       II.hasImplicitUseOfPhysReg(BC.MIB->getStackPointer()))
     return false;
 
-  for (int I = 0, E = MCPlus::getNumPrimeOperands(Inst); I != E; ++I) {
-    const MCOperand &Operand = Inst.getOperand(I);
+  for (const MCOperand &Operand : MCPlus::primeOperands(Inst))
     if (Operand.isReg() && Operand.getReg() == BC.MIB->getStackPointer())
       return false;
-  }
   return true;
 }
 
 bool shouldProcess(const BinaryFunction &Function) {
   return Function.isSimple() && Function.hasCFG() && !Function.isIgnored();
 }
 
 void runForAllWeCare(std::map<uint64_t, BinaryFunction> &BFs,

bolt/lib/Passes/AsmDump.cpp

for (const MCInst &Instr : *BB) {
       if (BC.MIB->isPseudo(Instr)) {
         if (BC.MIB->isCFI(Instr))
           dumpCFI(BF, Instr, *MAP.get());
         continue;
       }
 
       // Analyze symbol references (data, functions) from the instruction.
       bool IsCall = BC.MIB->isCall(Instr);
-      for (unsigned I = 0, E = MCPlus::getNumPrimeOperands(Instr); I != E;
-           ++I) {
-        MCOperand Operand = Instr.getOperand(I);
+      for (const MCOperand &Operand : MCPlus::primeOperands(Instr)) {
         if (Operand.isExpr() &&
             Operand.getExpr()->getKind() == MCExpr::SymbolRef) {
           std::pair<const MCSymbol *, uint64_t> TSI =
               BC.MIB->getTargetSymbolInfo(Operand.getExpr());
           const MCSymbol *Symbol = TSI.first;
           if (IsCall)
             CallReferences.insert(Symbol);
           else if (const BinaryData *BD =

bolt/lib/Passes/RegReAssign.cpp

 void RegReAssign::swap(BinaryFunction &Function, MCPhysReg A, MCPhysReg B) {
   BinaryContext &BC = Function.getBinaryContext();
   const BitVector &AliasA = BC.MIB->getAliases(A, false);
   const BitVector &AliasB = BC.MIB->getAliases(B, false);
 
   // Regular instructions
   for (BinaryBasicBlock &BB : Function) {
     for (MCInst &Inst : BB) {
-      for (int I = 0, E = MCPlus::getNumPrimeOperands(Inst); I != E; ++I) {
-        MCOperand &Operand = Inst.getOperand(I);
+      for (MCOperand &Operand : MCPlus::primeOperands(Inst)) {
         if (!Operand.isReg())
           continue;
 
         unsigned Reg = Operand.getReg();
         if (AliasA.test(Reg)) {
           Operand.setReg(BC.MIB->getAliasSized(B, BC.MIB->getRegSize(Reg)));
           --StaticBytesSaved;
           DynBytesSaved -= BB.getKnownExecutionCount();

bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp

public:
   DenseMap<const MCInst *, SmallVector<MCInst *, 4>>
   computeLocalUDChain(const MCInst *CurInstr, InstructionIterator Begin,
                       InstructionIterator End) const {
     DenseMap<int, MCInst *> RegAliasTable;
     DenseMap<const MCInst *, SmallVector<MCInst *, 4>> Uses;
 
     auto addInstrOperands = [&](const MCInst &Instr) {
       // Update Uses table
-      for (unsigned OpNum = 0, OpEnd = MCPlus::getNumPrimeOperands(Instr);
-           OpNum != OpEnd; ++OpNum) {
-        if (!Instr.getOperand(OpNum).isReg())
+      for (const MCOperand &Operand : MCPlus::primeOperands(Instr)) {
+        if (!Operand.isReg())
           continue;
-        unsigned Reg = Instr.getOperand(OpNum).getReg();
+        unsigned Reg = Operand.getReg();
         MCInst *AliasInst = RegAliasTable[Reg];
         Uses[&Instr].push_back(AliasInst);
         LLVM_DEBUG({
           dbgs() << "Adding reg operand " << Reg << " refs ";
           if (AliasInst != nullptr)
             AliasInst->dump();
           else
             dbgs() << "\n";

bolt/lib/Target/X86/X86MCPlusBuilder.cpp

bool cannotUseREX(const MCInst &Inst) const override {
     case X86::MOV8mr:
     case X86::MOV8rm:
     case X86::MOV8rr:
     case X86::MOVSX32rm8:
     case X86::MOVSX32rr8:
     case X86::MOVZX32rm8:
     case X86::MOVZX32rr8:
     case X86::TEST8ri:
-      for (int I = 0, E = MCPlus::getNumPrimeOperands(Inst); I != E; ++I) {
-        const MCOperand &Operand = Inst.getOperand(I);
+      for (const MCOperand &Operand : MCPlus::primeOperands(Inst)) {
         if (!Operand.isReg())
           continue;
         if (isUpper8BitReg(Operand.getReg()))
           return true;
       }
       LLVM_FALLTHROUGH;
     default:
       return false;