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Differential D124485

[AMDGPU] Remove vdata from buffer to lds load
ClosedPublic

Authored by rampitec on Apr 26 2022, 3:55 PM.

Details

Reviewers
arsenm
dp
Joe_Nash
Commits
rG00d84a9f923a: [AMDGPU] Remove vdata from buffer to lds load

Diff Detail

Event Timeline

rampitec created this revision.Apr 26 2022, 3:55 PM
Herald added a project: Restricted Project. · View Herald TranscriptApr 26 2022, 3:55 PM
Herald added subscribers: hsmhsm, foad, kerbowa and 8 others. · View Herald Transcript
rampitec requested review of this revision.Apr 26 2022, 3:55 PM
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rampitec added a comment.Apr 26 2022, 4:59 PM

A fake def seems like a bug to me for which I have the only excuse: no one really used it. This might be OK in asm, but certainty not in the MIR instructions stream.

This changes asm syntax though.

arsenm added a comment.Apr 26 2022, 4:59 PM

Did these instructions just not actually have vdata?

llvm/lib/Target/AMDGPU/BUFInstructions.td
497

Extra space after outs

rampitec added a comment.Apr 26 2022, 5:03 PM
In D124485#3475887, @arsenm wrote:

Did these instructions just not actually have vdata?

Yes, they don't. These are DMA. They read vmem and write LDS without touching any VGPRs. That's the whole point for these to exist.

buffer_store_lds does not have it, any of flat DMA instructions don't. This is just the old bug.

llvm/lib/Target/AMDGPU/BUFInstructions.td
497

Did we finally fixed the issue when this extra space was needed?

arsenm accepted this revision.Apr 26 2022, 5:05 PM
arsenm added inline comments.
llvm/lib/Target/AMDGPU/BUFInstructions.td
497

Not sure

This revision is now accepted and ready to land.Apr 26 2022, 5:05 PM
Harbormaster completed remote builds in B161474: Diff 425326.Apr 26 2022, 5:12 PM
rampitec updated this revision to Diff 425352.Apr 26 2022, 5:17 PM
rampitec marked 2 inline comments as done.
rampitec added inline comments.
llvm/lib/Target/AMDGPU/BUFInstructions.td
497

Apparently we did. Removed space.

This revision was landed with ongoing or failed builds.Apr 26 2022, 5:28 PM
Closed by commit rG00d84a9f923a: [AMDGPU] Remove vdata from buffer to lds load (authored by rampitec). · Explain Why
This revision was automatically updated to reflect the committed changes.
rampitec added a commit: rG00d84a9f923a: [AMDGPU] Remove vdata from buffer to lds load.
Harbormaster completed remote builds in B161490: Diff 425352.Apr 26 2022, 6:26 PM
foad added a reviewer: Joe_Nash.Apr 27 2022, 2:09 AM
foad added inline comments.
llvm/test/MC/AMDGPU/gfx7_asm_mubuf.s
102

Can you explain this? Does the lds version of this instruction not exist at allon gfx7? Or does it just need different operands?

rampitec added inline comments.Apr 27 2022, 2:14 AM
llvm/test/MC/AMDGPU/gfx7_asm_mubuf.s
102

It does not exist.

dp mentioned this in D125811: [AMDGPU][MC][NFC] MUBUF code cleanup.May 17 2022, 10:11 AM
dp mentioned this in rG95a8af2750e4: [AMDGPU][MC][NFC] MUBUF code cleanup.May 18 2022, 5:01 AM
dp mentioned this in rG9c7e803f2d51: [AMDGPU][GFX7][DOC][NFC] Update assembler syntax description.Jun 6 2022, 5:57 AM
dp mentioned this in rG4fed5f174fa5: [AMDGPU][GFX8][DOC][NFC] Update assembler syntax description.Jun 6 2022, 7:42 AM
dp mentioned this in rG480f3e022839: [AMDGPU][GFX9][DOC][NFC] Update assembler syntax description.Jun 27 2022, 4:04 AM
dp mentioned this in rG1774f2e326b6: [AMDGPU][GFX90a][DOC][NFC] Update assembler syntax description.Jun 29 2022, 3:31 AM
dp mentioned this in rGf90f0e8fe7f5: [AMDGPU][GFX10][DOC][NFC] Update assembler syntax description.Jul 4 2022, 3:31 AM
dp mentioned this in rG2044e4c53ee8: [AMDGPU][GFX1030][DOC][NFC] Update assembler syntax description.Jul 6 2022, 7:04 AM

Revision Contents

PathSize
llvm/
lib/
Target/
AMDGPU/
AsmParser/
15 lines
8 lines
test/
MC/
AMDGPU/
18 lines
24 lines
24 lines
24 lines
8 lines
96 lines
Disassembler/
AMDGPU/
24 lines
18 lines
24 lines
53 lines

Diff 425358

llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp

  • This file is larger than 256 KB, so syntax highlighting is disabled by default.
Show First 20 Lines • Show All 7,410 Lines • ▼ Show 20 Lines if (Op.isToken()) {
continue; continue;
} }
assert(Op.isImm()); assert(Op.isImm());
// Handle optional arguments // Handle optional arguments
OptionalIdx[Op.getImmTy()] = i; OptionalIdx[Op.getImmTy()] = i;
} }
// This is a workaround for an llvm quirk which may result in an
// incorrect instruction selection. Lds and non-lds versions of
// MUBUF instructions are identical except that lds versions
// have mandatory 'lds' modifier. However this modifier follows
// optional modifiers and llvm asm matcher regards this 'lds'
// modifier as an optional one. As a result, an lds version
// of opcode may be selected even if it has no 'lds' modifier.
if (IsLdsOpcode && !HasLdsModifier) {
int NoLdsOpcode = AMDGPU::getMUBUFNoLdsInst(Inst.getOpcode());
if (NoLdsOpcode != -1) { // Got lds version - correct it.
Inst.setOpcode(NoLdsOpcode);
IsLdsOpcode = false;
}
}
addOptionalImmOperand(Inst, Operands, OptionalIdx, AMDGPUOperand::ImmTyOffset); addOptionalImmOperand(Inst, Operands, OptionalIdx, AMDGPUOperand::ImmTyOffset);
addOptionalImmOperand(Inst, Operands, OptionalIdx, AMDGPUOperand::ImmTyCPol, 0); addOptionalImmOperand(Inst, Operands, OptionalIdx, AMDGPUOperand::ImmTyCPol, 0);
if (!IsLdsOpcode) { // tfe is not legal with lds opcodes if (!IsLdsOpcode) { // tfe is not legal with lds opcodes
addOptionalImmOperand(Inst, Operands, OptionalIdx, AMDGPUOperand::ImmTyTFE); addOptionalImmOperand(Inst, Operands, OptionalIdx, AMDGPUOperand::ImmTyTFE);
} }
addOptionalImmOperand(Inst, Operands, OptionalIdx, AMDGPUOperand::ImmTySWZ); addOptionalImmOperand(Inst, Operands, OptionalIdx, AMDGPUOperand::ImmTySWZ);
} }
▲ Show 20 Lines • Show All 1,277 Lines • Show Last 20 Lines

llvm/lib/Target/AMDGPU/BUFInstructions.td

Show First 20 Lines • Show All 314 Lines • ▼ Show 20 Linesclass MUBUF_Pseudo <string opName, dag outs, dag ins,
let SchedRW = [WriteVMEM]; let SchedRW = [WriteVMEM];
let AsmMatchConverter = "cvtMubuf"; let AsmMatchConverter = "cvtMubuf";
bits<1> offen = 0; bits<1> offen = 0;
bits<1> idxen = 0; bits<1> idxen = 0;
bits<1> addr64 = 0; bits<1> addr64 = 0;
bits<1> lds = 0; bits<1> lds = 0;
bits<1> has_vdata = 1; bits<1> has_vdata = !not(lds);
bits<1> has_vaddr = 1; bits<1> has_vaddr = 1;
bits<1> has_glc = 1; bits<1> has_glc = 1;
bits<1> has_dlc = 1; bits<1> has_dlc = 1;
bits<1> glc_value = 0; // the value for glc if no such operand bits<1> glc_value = 0; // the value for glc if no such operand
bits<1> dlc_value = 0; // the value for dlc if no such operand bits<1> dlc_value = 0; // the value for dlc if no such operand
bits<1> has_srsrc = 1; bits<1> has_srsrc = 1;
bits<1> has_soffset = 1; bits<1> has_soffset = 1;
bits<1> has_offset = 1; bits<1> has_offset = 1;
Show All 36 Linesclass MUBUF_Real <MUBUF_Pseudo ps> :
bits<8> vaddr; bits<8> vaddr;
bits<10> vdata; bits<10> vdata;
bits<7> srsrc; bits<7> srsrc;
bits<1> tfe; bits<1> tfe;
bits<8> soffset; bits<8> soffset;
// GFX90A+ only: instruction uses AccVGPR for data // GFX90A+ only: instruction uses AccVGPR for data
// Bit supersedes tfe. // Bit supersedes tfe.
bits<1> acc = !if(ps.has_vdata, vdata{9}, 0); bits<1> acc = !if(ps.has_vdata, vdata{9}, !if(ps.lds, ?, 0));
} }
// For cache invalidation instructions. // For cache invalidation instructions.
class MUBUF_Invalidate <string opName, SDPatternOperator node = null_frag> : class MUBUF_Invalidate <string opName, SDPatternOperator node = null_frag> :
MUBUF_Pseudo<opName, (outs), (ins), "", [(node)]> { MUBUF_Pseudo<opName, (outs), (ins), "", [(node)]> {
let AsmMatchConverter = ""; let AsmMatchConverter = "";
▲ Show 20 Lines • Show All 104 Lines • ▼ Show 20 Linesclass MUBUF_Load_Pseudo <string opName,
bit HasTiedDest = 0, bit HasTiedDest = 0,
bit isLds = 0, bit isLds = 0,
list<dag> pattern=[], list<dag> pattern=[],
// Workaround bug bz30254 // Workaround bug bz30254
int addrKindCopy = addrKind, int addrKindCopy = addrKind,
RegisterClass vdata_rc = getVregSrcForVT<vdata_vt>.ret, RegisterClass vdata_rc = getVregSrcForVT<vdata_vt>.ret,
RegisterOperand vdata_op = getLdStRegisterOperand<vdata_rc>.ret> RegisterOperand vdata_op = getLdStRegisterOperand<vdata_rc>.ret>
: MUBUF_Pseudo<opName, : MUBUF_Pseudo<opName,
(outs vdata_op:$vdata), !if(isLds, (outs), (outs vdata_op:$vdata)),
arsenmUnsubmitted
Done
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Extra space after outs

arsenm: Extra space after outs
rampitecAuthorUnsubmitted
Done
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Did we finally fixed the issue when this extra space was needed?

rampitec: Did we finally fixed the issue when this extra space was needed?
arsenmUnsubmitted
Done
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Not sure

arsenm: Not sure
rampitecAuthorUnsubmitted
Done
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Apparently we did. Removed space.

rampitec: Apparently we did. Removed space.
!con(getMUBUFIns<addrKindCopy, [], isLds>.ret, !con(getMUBUFIns<addrKindCopy, [], isLds>.ret,
!if(HasTiedDest, (ins vdata_op:$vdata_in), (ins))), !if(HasTiedDest, (ins vdata_op:$vdata_in), (ins))),
" $vdata, " # getMUBUFAsmOps<addrKindCopy>.ret # "$cpol" # !if(isLds, " ", " $vdata, ") # getMUBUFAsmOps<addrKindCopy>.ret # "$cpol" #
!if(isLds, " lds", "$tfe") # "$swz", !if(isLds, " lds", "$tfe") # "$swz",
pattern>, pattern>,
MUBUF_SetupAddr<addrKindCopy> { MUBUF_SetupAddr<addrKindCopy> {
let PseudoInstr = opName # !if(isLds, "_lds", "") # let PseudoInstr = opName # !if(isLds, "_lds", "") #
"_" # getAddrName<addrKindCopy>.ret; "_" # getAddrName<addrKindCopy>.ret;
let AsmMatchConverter = !if(isLds, "cvtMubufLds", "cvtMubuf"); let AsmMatchConverter = !if(isLds, "cvtMubufLds", "cvtMubuf");
let Constraints = !if(HasTiedDest, "$vdata = $vdata_in", ""); let Constraints = !if(HasTiedDest, "$vdata = $vdata_in", "");
▲ Show 20 Lines • Show All 2,303 Lines • Show Last 20 Lines

llvm/test/MC/AMDGPU/gfx7_asm_mubuf.s

Show First 20 Lines • Show All 93 Lines • ▼ Show 20 Lines
// CHECK: [0x07,0x00,0x00,0xe0,0x00,0x05,0x02,0x03] // CHECK: [0x07,0x00,0x00,0xe0,0x00,0x05,0x02,0x03]
buffer_load_format_x v5, off, s[8:11], s3 offset:4095 glc buffer_load_format_x v5, off, s[8:11], s3 offset:4095 glc
// CHECK: [0xff,0x4f,0x00,0xe0,0x00,0x05,0x02,0x03] // CHECK: [0xff,0x4f,0x00,0xe0,0x00,0x05,0x02,0x03]
buffer_load_format_x v5, off, s[8:11], s3 offset:4095 slc buffer_load_format_x v5, off, s[8:11], s3 offset:4095 slc
// CHECK: [0xff,0x0f,0x00,0xe0,0x00,0x05,0x42,0x03] // CHECK: [0xff,0x0f,0x00,0xe0,0x00,0x05,0x42,0x03]
buffer_load_format_x v5, off, s[8:11], s3 offset:4095 lds
foadUnsubmitted
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Can you explain this? Does the lds version of this instruction not exist at allon gfx7? Or does it just need different operands?

foad: Can you explain this? Does the lds version of this instruction not exist at allon gfx7? Or does…
rampitecAuthorUnsubmitted
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It does not exist.

rampitec: It does not exist.
// CHECK: [0xff,0x0f,0x01,0xe0,0x00,0x05,0x02,0x03]
buffer_load_format_xy v[5:6], off, s[8:11], s3 offset:4095 buffer_load_format_xy v[5:6], off, s[8:11], s3 offset:4095
// CHECK: [0xff,0x0f,0x04,0xe0,0x00,0x05,0x02,0x03] // CHECK: [0xff,0x0f,0x04,0xe0,0x00,0x05,0x02,0x03]
buffer_load_format_xy v[254:255], off, s[8:11], s3 offset:4095 buffer_load_format_xy v[254:255], off, s[8:11], s3 offset:4095
// CHECK: [0xff,0x0f,0x04,0xe0,0x00,0xfe,0x02,0x03] // CHECK: [0xff,0x0f,0x04,0xe0,0x00,0xfe,0x02,0x03]
buffer_load_format_xy v[5:6], off, s[12:15], s3 offset:4095 buffer_load_format_xy v[5:6], off, s[12:15], s3 offset:4095
// CHECK: [0xff,0x0f,0x04,0xe0,0x00,0x05,0x03,0x03] // CHECK: [0xff,0x0f,0x04,0xe0,0x00,0x05,0x03,0x03]
▲ Show 20 Lines • Show All 776 Lines • ▼ Show 20 Lines
// CHECK: [0x07,0x00,0x20,0xe0,0x00,0x05,0x02,0x03] // CHECK: [0x07,0x00,0x20,0xe0,0x00,0x05,0x02,0x03]
buffer_load_ubyte v5, off, s[8:11], s3 offset:4095 glc buffer_load_ubyte v5, off, s[8:11], s3 offset:4095 glc
// CHECK: [0xff,0x4f,0x20,0xe0,0x00,0x05,0x02,0x03] // CHECK: [0xff,0x4f,0x20,0xe0,0x00,0x05,0x02,0x03]
buffer_load_ubyte v5, off, s[8:11], s3 offset:4095 slc buffer_load_ubyte v5, off, s[8:11], s3 offset:4095 slc
// CHECK: [0xff,0x0f,0x20,0xe0,0x00,0x05,0x42,0x03] // CHECK: [0xff,0x0f,0x20,0xe0,0x00,0x05,0x42,0x03]
buffer_load_ubyte v5, off, s[8:11], s3 offset:4095 lds
// CHECK: [0xff,0x0f,0x21,0xe0,0x00,0x05,0x02,0x03]
buffer_load_sbyte v5, off, s[8:11], s3 offset:4095 buffer_load_sbyte v5, off, s[8:11], s3 offset:4095
// CHECK: [0xff,0x0f,0x24,0xe0,0x00,0x05,0x02,0x03] // CHECK: [0xff,0x0f,0x24,0xe0,0x00,0x05,0x02,0x03]
buffer_load_sbyte v255, off, s[8:11], s3 offset:4095 buffer_load_sbyte v255, off, s[8:11], s3 offset:4095
// CHECK: [0xff,0x0f,0x24,0xe0,0x00,0xff,0x02,0x03] // CHECK: [0xff,0x0f,0x24,0xe0,0x00,0xff,0x02,0x03]
buffer_load_sbyte v5, off, s[12:15], s3 offset:4095 buffer_load_sbyte v5, off, s[12:15], s3 offset:4095
// CHECK: [0xff,0x0f,0x24,0xe0,0x00,0x05,0x03,0x03] // CHECK: [0xff,0x0f,0x24,0xe0,0x00,0x05,0x03,0x03]
▲ Show 20 Lines • Show All 83 Lines • ▼ Show 20 Lines
// CHECK: [0x07,0x00,0x24,0xe0,0x00,0x05,0x02,0x03] // CHECK: [0x07,0x00,0x24,0xe0,0x00,0x05,0x02,0x03]
buffer_load_sbyte v5, off, s[8:11], s3 offset:4095 glc buffer_load_sbyte v5, off, s[8:11], s3 offset:4095 glc
// CHECK: [0xff,0x4f,0x24,0xe0,0x00,0x05,0x02,0x03] // CHECK: [0xff,0x4f,0x24,0xe0,0x00,0x05,0x02,0x03]
buffer_load_sbyte v5, off, s[8:11], s3 offset:4095 slc buffer_load_sbyte v5, off, s[8:11], s3 offset:4095 slc
// CHECK: [0xff,0x0f,0x24,0xe0,0x00,0x05,0x42,0x03] // CHECK: [0xff,0x0f,0x24,0xe0,0x00,0x05,0x42,0x03]
buffer_load_sbyte v5, off, s[8:11], s3 offset:4095 lds
// CHECK: [0xff,0x0f,0x25,0xe0,0x00,0x05,0x02,0x03]
buffer_load_ushort v5, off, s[8:11], s3 offset:4095 buffer_load_ushort v5, off, s[8:11], s3 offset:4095
// CHECK: [0xff,0x0f,0x28,0xe0,0x00,0x05,0x02,0x03] // CHECK: [0xff,0x0f,0x28,0xe0,0x00,0x05,0x02,0x03]
buffer_load_ushort v255, off, s[8:11], s3 offset:4095 buffer_load_ushort v255, off, s[8:11], s3 offset:4095
// CHECK: [0xff,0x0f,0x28,0xe0,0x00,0xff,0x02,0x03] // CHECK: [0xff,0x0f,0x28,0xe0,0x00,0xff,0x02,0x03]
buffer_load_ushort v5, off, s[12:15], s3 offset:4095 buffer_load_ushort v5, off, s[12:15], s3 offset:4095
// CHECK: [0xff,0x0f,0x28,0xe0,0x00,0x05,0x03,0x03] // CHECK: [0xff,0x0f,0x28,0xe0,0x00,0x05,0x03,0x03]
▲ Show 20 Lines • Show All 83 Lines • ▼ Show 20 Lines
// CHECK: [0x07,0x00,0x28,0xe0,0x00,0x05,0x02,0x03] // CHECK: [0x07,0x00,0x28,0xe0,0x00,0x05,0x02,0x03]
buffer_load_ushort v5, off, s[8:11], s3 offset:4095 glc buffer_load_ushort v5, off, s[8:11], s3 offset:4095 glc
// CHECK: [0xff,0x4f,0x28,0xe0,0x00,0x05,0x02,0x03] // CHECK: [0xff,0x4f,0x28,0xe0,0x00,0x05,0x02,0x03]
buffer_load_ushort v5, off, s[8:11], s3 offset:4095 slc buffer_load_ushort v5, off, s[8:11], s3 offset:4095 slc
// CHECK: [0xff,0x0f,0x28,0xe0,0x00,0x05,0x42,0x03] // CHECK: [0xff,0x0f,0x28,0xe0,0x00,0x05,0x42,0x03]
buffer_load_ushort v5, off, s[8:11], s3 offset:4095 lds
// CHECK: [0xff,0x0f,0x29,0xe0,0x00,0x05,0x02,0x03]
buffer_load_sshort v5, off, s[8:11], s3 offset:4095 buffer_load_sshort v5, off, s[8:11], s3 offset:4095
// CHECK: [0xff,0x0f,0x2c,0xe0,0x00,0x05,0x02,0x03] // CHECK: [0xff,0x0f,0x2c,0xe0,0x00,0x05,0x02,0x03]
buffer_load_sshort v255, off, s[8:11], s3 offset:4095 buffer_load_sshort v255, off, s[8:11], s3 offset:4095
// CHECK: [0xff,0x0f,0x2c,0xe0,0x00,0xff,0x02,0x03] // CHECK: [0xff,0x0f,0x2c,0xe0,0x00,0xff,0x02,0x03]
buffer_load_sshort v5, off, s[12:15], s3 offset:4095 buffer_load_sshort v5, off, s[12:15], s3 offset:4095
// CHECK: [0xff,0x0f,0x2c,0xe0,0x00,0x05,0x03,0x03] // CHECK: [0xff,0x0f,0x2c,0xe0,0x00,0x05,0x03,0x03]
▲ Show 20 Lines • Show All 83 Lines • ▼ Show 20 Lines
// CHECK: [0x07,0x00,0x2c,0xe0,0x00,0x05,0x02,0x03] // CHECK: [0x07,0x00,0x2c,0xe0,0x00,0x05,0x02,0x03]
buffer_load_sshort v5, off, s[8:11], s3 offset:4095 glc buffer_load_sshort v5, off, s[8:11], s3 offset:4095 glc
// CHECK: [0xff,0x4f,0x2c,0xe0,0x00,0x05,0x02,0x03] // CHECK: [0xff,0x4f,0x2c,0xe0,0x00,0x05,0x02,0x03]
buffer_load_sshort v5, off, s[8:11], s3 offset:4095 slc buffer_load_sshort v5, off, s[8:11], s3 offset:4095 slc
// CHECK: [0xff,0x0f,0x2c,0xe0,0x00,0x05,0x42,0x03] // CHECK: [0xff,0x0f,0x2c,0xe0,0x00,0x05,0x42,0x03]
buffer_load_sshort v5, off, s[8:11], s3 offset:4095 lds
// CHECK: [0xff,0x0f,0x2d,0xe0,0x00,0x05,0x02,0x03]
buffer_load_dword v5, off, s[8:11], s3 offset:4095 buffer_load_dword v5, off, s[8:11], s3 offset:4095
// CHECK: [0xff,0x0f,0x30,0xe0,0x00,0x05,0x02,0x03] // CHECK: [0xff,0x0f,0x30,0xe0,0x00,0x05,0x02,0x03]
buffer_load_dword v255, off, s[8:11], s3 offset:4095 buffer_load_dword v255, off, s[8:11], s3 offset:4095
// CHECK: [0xff,0x0f,0x30,0xe0,0x00,0xff,0x02,0x03] // CHECK: [0xff,0x0f,0x30,0xe0,0x00,0xff,0x02,0x03]
buffer_load_dword v5, off, s[12:15], s3 offset:4095 buffer_load_dword v5, off, s[12:15], s3 offset:4095
// CHECK: [0xff,0x0f,0x30,0xe0,0x00,0x05,0x03,0x03] // CHECK: [0xff,0x0f,0x30,0xe0,0x00,0x05,0x03,0x03]
▲ Show 20 Lines • Show All 83 Lines • ▼ Show 20 Lines
// CHECK: [0x07,0x00,0x30,0xe0,0x00,0x05,0x02,0x03] // CHECK: [0x07,0x00,0x30,0xe0,0x00,0x05,0x02,0x03]
buffer_load_dword v5, off, s[8:11], s3 offset:4095 glc buffer_load_dword v5, off, s[8:11], s3 offset:4095 glc
// CHECK: [0xff,0x4f,0x30,0xe0,0x00,0x05,0x02,0x03] // CHECK: [0xff,0x4f,0x30,0xe0,0x00,0x05,0x02,0x03]
buffer_load_dword v5, off, s[8:11], s3 offset:4095 slc buffer_load_dword v5, off, s[8:11], s3 offset:4095 slc
// CHECK: [0xff,0x0f,0x30,0xe0,0x00,0x05,0x42,0x03] // CHECK: [0xff,0x0f,0x30,0xe0,0x00,0x05,0x42,0x03]
buffer_load_dword v5, off, s[8:11], s3 offset:4095 lds
// CHECK: [0xff,0x0f,0x31,0xe0,0x00,0x05,0x02,0x03]
buffer_load_dwordx2 v[5:6], off, s[8:11], s3 offset:4095 buffer_load_dwordx2 v[5:6], off, s[8:11], s3 offset:4095
// CHECK: [0xff,0x0f,0x34,0xe0,0x00,0x05,0x02,0x03] // CHECK: [0xff,0x0f,0x34,0xe0,0x00,0x05,0x02,0x03]
buffer_load_dwordx2 v[254:255], off, s[8:11], s3 offset:4095 buffer_load_dwordx2 v[254:255], off, s[8:11], s3 offset:4095
// CHECK: [0xff,0x0f,0x34,0xe0,0x00,0xfe,0x02,0x03] // CHECK: [0xff,0x0f,0x34,0xe0,0x00,0xfe,0x02,0x03]
buffer_load_dwordx2 v[5:6], off, s[12:15], s3 offset:4095 buffer_load_dwordx2 v[5:6], off, s[12:15], s3 offset:4095
// CHECK: [0xff,0x0f,0x34,0xe0,0x00,0x05,0x03,0x03] // CHECK: [0xff,0x0f,0x34,0xe0,0x00,0x05,0x03,0x03]
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llvm/test/MC/AMDGPU/gfx8_asm_mubuf.s

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// CHECK: [0x07,0x00,0x00,0xe0,0x00,0x05,0x02,0x03] // CHECK: [0x07,0x00,0x00,0xe0,0x00,0x05,0x02,0x03]
buffer_load_format_x v5, off, s[8:11], s3 offset:4095 glc buffer_load_format_x v5, off, s[8:11], s3 offset:4095 glc
// CHECK: [0xff,0x4f,0x00,0xe0,0x00,0x05,0x02,0x03] // CHECK: [0xff,0x4f,0x00,0xe0,0x00,0x05,0x02,0x03]
buffer_load_format_x v5, off, s[8:11], s3 offset:4095 slc buffer_load_format_x v5, off, s[8:11], s3 offset:4095 slc
// CHECK: [0xff,0x0f,0x02,0xe0,0x00,0x05,0x02,0x03] // CHECK: [0xff,0x0f,0x02,0xe0,0x00,0x05,0x02,0x03]
buffer_load_format_x v5, off, s[8:11], s3 offset:4095 lds buffer_load_format_x off, s[8:11], s3 offset:4095 lds
// CHECK: [0xff,0x0f,0x01,0xe0,0x00,0x05,0x02,0x03] // CHECK: [0xff,0x0f,0x01,0xe0,0x00,0x00,0x02,0x03]
buffer_load_format_xy v[5:6], off, s[8:11], s3 offset:4095 buffer_load_format_xy v[5:6], off, s[8:11], s3 offset:4095
// CHECK: [0xff,0x0f,0x04,0xe0,0x00,0x05,0x02,0x03] // CHECK: [0xff,0x0f,0x04,0xe0,0x00,0x05,0x02,0x03]
buffer_load_format_xy v[254:255], off, s[8:11], s3 offset:4095 buffer_load_format_xy v[254:255], off, s[8:11], s3 offset:4095
// CHECK: [0xff,0x0f,0x04,0xe0,0x00,0xfe,0x02,0x03] // CHECK: [0xff,0x0f,0x04,0xe0,0x00,0xfe,0x02,0x03]
buffer_load_format_xy v[5:6], off, s[12:15], s3 offset:4095 buffer_load_format_xy v[5:6], off, s[12:15], s3 offset:4095
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// CHECK: [0x07,0x00,0x40,0xe0,0x00,0x05,0x02,0x03] // CHECK: [0x07,0x00,0x40,0xe0,0x00,0x05,0x02,0x03]
buffer_load_ubyte v5, off, s[8:11], s3 offset:4095 glc buffer_load_ubyte v5, off, s[8:11], s3 offset:4095 glc
// CHECK: [0xff,0x4f,0x40,0xe0,0x00,0x05,0x02,0x03] // CHECK: [0xff,0x4f,0x40,0xe0,0x00,0x05,0x02,0x03]
buffer_load_ubyte v5, off, s[8:11], s3 offset:4095 slc buffer_load_ubyte v5, off, s[8:11], s3 offset:4095 slc
// CHECK: [0xff,0x0f,0x42,0xe0,0x00,0x05,0x02,0x03] // CHECK: [0xff,0x0f,0x42,0xe0,0x00,0x05,0x02,0x03]
buffer_load_ubyte v5, off, s[8:11], s3 offset:4095 lds buffer_load_ubyte off, s[8:11], s3 offset:4095 lds
// CHECK: [0xff,0x0f,0x41,0xe0,0x00,0x05,0x02,0x03] // CHECK: [0xff,0x0f,0x41,0xe0,0x00,0x00,0x02,0x03]
buffer_load_sbyte v5, off, s[8:11], s3 offset:4095 buffer_load_sbyte v5, off, s[8:11], s3 offset:4095
// CHECK: [0xff,0x0f,0x44,0xe0,0x00,0x05,0x02,0x03] // CHECK: [0xff,0x0f,0x44,0xe0,0x00,0x05,0x02,0x03]
buffer_load_sbyte v255, off, s[8:11], s3 offset:4095 buffer_load_sbyte v255, off, s[8:11], s3 offset:4095
// CHECK: [0xff,0x0f,0x44,0xe0,0x00,0xff,0x02,0x03] // CHECK: [0xff,0x0f,0x44,0xe0,0x00,0xff,0x02,0x03]
buffer_load_sbyte v5, off, s[12:15], s3 offset:4095 buffer_load_sbyte v5, off, s[12:15], s3 offset:4095
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// CHECK: [0x07,0x00,0x44,0xe0,0x00,0x05,0x02,0x03] // CHECK: [0x07,0x00,0x44,0xe0,0x00,0x05,0x02,0x03]
buffer_load_sbyte v5, off, s[8:11], s3 offset:4095 glc buffer_load_sbyte v5, off, s[8:11], s3 offset:4095 glc
// CHECK: [0xff,0x4f,0x44,0xe0,0x00,0x05,0x02,0x03] // CHECK: [0xff,0x4f,0x44,0xe0,0x00,0x05,0x02,0x03]
buffer_load_sbyte v5, off, s[8:11], s3 offset:4095 slc buffer_load_sbyte v5, off, s[8:11], s3 offset:4095 slc
// CHECK: [0xff,0x0f,0x46,0xe0,0x00,0x05,0x02,0x03] // CHECK: [0xff,0x0f,0x46,0xe0,0x00,0x05,0x02,0x03]
buffer_load_sbyte v5, off, s[8:11], s3 offset:4095 lds buffer_load_sbyte off, s[8:11], s3 offset:4095 lds
// CHECK: [0xff,0x0f,0x45,0xe0,0x00,0x05,0x02,0x03] // CHECK: [0xff,0x0f,0x45,0xe0,0x00,0x00,0x02,0x03]
buffer_load_ushort v5, off, s[8:11], s3 offset:4095 buffer_load_ushort v5, off, s[8:11], s3 offset:4095
// CHECK: [0xff,0x0f,0x48,0xe0,0x00,0x05,0x02,0x03] // CHECK: [0xff,0x0f,0x48,0xe0,0x00,0x05,0x02,0x03]
buffer_load_ushort v255, off, s[8:11], s3 offset:4095 buffer_load_ushort v255, off, s[8:11], s3 offset:4095
// CHECK: [0xff,0x0f,0x48,0xe0,0x00,0xff,0x02,0x03] // CHECK: [0xff,0x0f,0x48,0xe0,0x00,0xff,0x02,0x03]
buffer_load_ushort v5, off, s[12:15], s3 offset:4095 buffer_load_ushort v5, off, s[12:15], s3 offset:4095
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// CHECK: [0x07,0x00,0x48,0xe0,0x00,0x05,0x02,0x03] // CHECK: [0x07,0x00,0x48,0xe0,0x00,0x05,0x02,0x03]
buffer_load_ushort v5, off, s[8:11], s3 offset:4095 glc buffer_load_ushort v5, off, s[8:11], s3 offset:4095 glc
// CHECK: [0xff,0x4f,0x48,0xe0,0x00,0x05,0x02,0x03] // CHECK: [0xff,0x4f,0x48,0xe0,0x00,0x05,0x02,0x03]
buffer_load_ushort v5, off, s[8:11], s3 offset:4095 slc buffer_load_ushort v5, off, s[8:11], s3 offset:4095 slc
// CHECK: [0xff,0x0f,0x4a,0xe0,0x00,0x05,0x02,0x03] // CHECK: [0xff,0x0f,0x4a,0xe0,0x00,0x05,0x02,0x03]
buffer_load_ushort v5, off, s[8:11], s3 offset:4095 lds buffer_load_ushort off, s[8:11], s3 offset:4095 lds
// CHECK: [0xff,0x0f,0x49,0xe0,0x00,0x05,0x02,0x03] // CHECK: [0xff,0x0f,0x49,0xe0,0x00,0x00,0x02,0x03]
buffer_load_sshort v5, off, s[8:11], s3 offset:4095 buffer_load_sshort v5, off, s[8:11], s3 offset:4095
// CHECK: [0xff,0x0f,0x4c,0xe0,0x00,0x05,0x02,0x03] // CHECK: [0xff,0x0f,0x4c,0xe0,0x00,0x05,0x02,0x03]
buffer_load_sshort v255, off, s[8:11], s3 offset:4095 buffer_load_sshort v255, off, s[8:11], s3 offset:4095
// CHECK: [0xff,0x0f,0x4c,0xe0,0x00,0xff,0x02,0x03] // CHECK: [0xff,0x0f,0x4c,0xe0,0x00,0xff,0x02,0x03]
buffer_load_sshort v5, off, s[12:15], s3 offset:4095 buffer_load_sshort v5, off, s[12:15], s3 offset:4095
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// CHECK: [0x07,0x00,0x4c,0xe0,0x00,0x05,0x02,0x03] // CHECK: [0x07,0x00,0x4c,0xe0,0x00,0x05,0x02,0x03]
buffer_load_sshort v5, off, s[8:11], s3 offset:4095 glc buffer_load_sshort v5, off, s[8:11], s3 offset:4095 glc
// CHECK: [0xff,0x4f,0x4c,0xe0,0x00,0x05,0x02,0x03] // CHECK: [0xff,0x4f,0x4c,0xe0,0x00,0x05,0x02,0x03]
buffer_load_sshort v5, off, s[8:11], s3 offset:4095 slc buffer_load_sshort v5, off, s[8:11], s3 offset:4095 slc
// CHECK: [0xff,0x0f,0x4e,0xe0,0x00,0x05,0x02,0x03] // CHECK: [0xff,0x0f,0x4e,0xe0,0x00,0x05,0x02,0x03]
buffer_load_sshort v5, off, s[8:11], s3 offset:4095 lds buffer_load_sshort off, s[8:11], s3 offset:4095 lds
// CHECK: [0xff,0x0f,0x4d,0xe0,0x00,0x05,0x02,0x03] // CHECK: [0xff,0x0f,0x4d,0xe0,0x00,0x00,0x02,0x03]
buffer_load_dword v5, off, s[8:11], s3 offset:4095 buffer_load_dword v5, off, s[8:11], s3 offset:4095
// CHECK: [0xff,0x0f,0x50,0xe0,0x00,0x05,0x02,0x03] // CHECK: [0xff,0x0f,0x50,0xe0,0x00,0x05,0x02,0x03]
buffer_load_dword v255, off, s[8:11], s3 offset:4095 buffer_load_dword v255, off, s[8:11], s3 offset:4095
// CHECK: [0xff,0x0f,0x50,0xe0,0x00,0xff,0x02,0x03] // CHECK: [0xff,0x0f,0x50,0xe0,0x00,0xff,0x02,0x03]
buffer_load_dword v5, off, s[12:15], s3 offset:4095 buffer_load_dword v5, off, s[12:15], s3 offset:4095
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// CHECK: [0x07,0x00,0x50,0xe0,0x00,0x05,0x02,0x03] // CHECK: [0x07,0x00,0x50,0xe0,0x00,0x05,0x02,0x03]
buffer_load_dword v5, off, s[8:11], s3 offset:4095 glc buffer_load_dword v5, off, s[8:11], s3 offset:4095 glc
// CHECK: [0xff,0x4f,0x50,0xe0,0x00,0x05,0x02,0x03] // CHECK: [0xff,0x4f,0x50,0xe0,0x00,0x05,0x02,0x03]
buffer_load_dword v5, off, s[8:11], s3 offset:4095 slc buffer_load_dword v5, off, s[8:11], s3 offset:4095 slc
// CHECK: [0xff,0x0f,0x52,0xe0,0x00,0x05,0x02,0x03] // CHECK: [0xff,0x0f,0x52,0xe0,0x00,0x05,0x02,0x03]
buffer_load_dword v5, off, s[8:11], s3 offset:4095 lds buffer_load_dword off, s[8:11], s3 offset:4095 lds
// CHECK: [0xff,0x0f,0x51,0xe0,0x00,0x05,0x02,0x03] // CHECK: [0xff,0x0f,0x51,0xe0,0x00,0x00,0x02,0x03]
buffer_load_dwordx2 v[5:6], off, s[8:11], s3 offset:4095 buffer_load_dwordx2 v[5:6], off, s[8:11], s3 offset:4095
// CHECK: [0xff,0x0f,0x54,0xe0,0x00,0x05,0x02,0x03] // CHECK: [0xff,0x0f,0x54,0xe0,0x00,0x05,0x02,0x03]
buffer_load_dwordx2 v[254:255], off, s[8:11], s3 offset:4095 buffer_load_dwordx2 v[254:255], off, s[8:11], s3 offset:4095
// CHECK: [0xff,0x0f,0x54,0xe0,0x00,0xfe,0x02,0x03] // CHECK: [0xff,0x0f,0x54,0xe0,0x00,0xfe,0x02,0x03]
buffer_load_dwordx2 v[5:6], off, s[12:15], s3 offset:4095 buffer_load_dwordx2 v[5:6], off, s[12:15], s3 offset:4095
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llvm/test/MC/AMDGPU/gfx90a_ldst_acc.s

  • This file is larger than 256 KB, so syntax highlighting is disabled by default.
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// GFX90A: buffer_load_format_x a5, off, s[8:11], s3 offset:4095 glc ; encoding: [0xff,0x4f,0x00,0xe0,0x00,0x05,0x82,0x03] // GFX90A: buffer_load_format_x a5, off, s[8:11], s3 offset:4095 glc ; encoding: [0xff,0x4f,0x00,0xe0,0x00,0x05,0x82,0x03]
// NOT-GFX90A: error: invalid register class: agpr loads and stores not supported on this GPU // NOT-GFX90A: error: invalid register class: agpr loads and stores not supported on this GPU
buffer_load_format_x a5, off, s[8:11], s3 offset:4095 glc buffer_load_format_x a5, off, s[8:11], s3 offset:4095 glc
// GFX90A: buffer_load_format_x a5, off, s[8:11], s3 offset:4095 slc ; encoding: [0xff,0x0f,0x02,0xe0,0x00,0x05,0x82,0x03] // GFX90A: buffer_load_format_x a5, off, s[8:11], s3 offset:4095 slc ; encoding: [0xff,0x0f,0x02,0xe0,0x00,0x05,0x82,0x03]
// NOT-GFX90A: error: invalid register class: agpr loads and stores not supported on this GPU // NOT-GFX90A: error: invalid register class: agpr loads and stores not supported on this GPU
buffer_load_format_x a5, off, s[8:11], s3 offset:4095 slc buffer_load_format_x a5, off, s[8:11], s3 offset:4095 slc
// GFX90A: buffer_load_format_x a5, off, s[8:11], s3 offset:4095 lds ; encoding: [0xff,0x0f,0x01,0xe0,0x00,0x05,0x82,0x03]
// NOT-GFX90A: error: invalid register class: agpr loads and stores not supported on this GPU
buffer_load_format_x a5, off, s[8:11], s3 offset:4095 lds
// GFX90A: buffer_load_format_xy a[6:7], off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x04,0xe0,0x00,0x06,0x82,0x03] // GFX90A: buffer_load_format_xy a[6:7], off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x04,0xe0,0x00,0x06,0x82,0x03]
// NOT-GFX90A: error: invalid register class: agpr loads and stores not supported on this GPU // NOT-GFX90A: error: invalid register class: agpr loads and stores not supported on this GPU
buffer_load_format_xy a[6:7], off, s[8:11], s3 offset:4095 buffer_load_format_xy a[6:7], off, s[8:11], s3 offset:4095
// GFX90A: buffer_load_format_xy a[254:255], off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x04,0xe0,0x00,0xfe,0x82,0x03] // GFX90A: buffer_load_format_xy a[254:255], off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x04,0xe0,0x00,0xfe,0x82,0x03]
// NOT-GFX90A: error: invalid register class: agpr loads and stores not supported on this GPU // NOT-GFX90A: error: invalid register class: agpr loads and stores not supported on this GPU
buffer_load_format_xy a[254:255], off, s[8:11], s3 offset:4095 buffer_load_format_xy a[254:255], off, s[8:11], s3 offset:4095
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// GFX90A: buffer_load_ubyte a5, off, s[8:11], s3 offset:4095 glc ; encoding: [0xff,0x4f,0x40,0xe0,0x00,0x05,0x82,0x03] // GFX90A: buffer_load_ubyte a5, off, s[8:11], s3 offset:4095 glc ; encoding: [0xff,0x4f,0x40,0xe0,0x00,0x05,0x82,0x03]
// NOT-GFX90A: error: invalid register class: agpr loads and stores not supported on this GPU // NOT-GFX90A: error: invalid register class: agpr loads and stores not supported on this GPU
buffer_load_ubyte a5, off, s[8:11], s3 offset:4095 glc buffer_load_ubyte a5, off, s[8:11], s3 offset:4095 glc
// GFX90A: buffer_load_ubyte a5, off, s[8:11], s3 offset:4095 slc ; encoding: [0xff,0x0f,0x42,0xe0,0x00,0x05,0x82,0x03] // GFX90A: buffer_load_ubyte a5, off, s[8:11], s3 offset:4095 slc ; encoding: [0xff,0x0f,0x42,0xe0,0x00,0x05,0x82,0x03]
// NOT-GFX90A: error: invalid register class: agpr loads and stores not supported on this GPU // NOT-GFX90A: error: invalid register class: agpr loads and stores not supported on this GPU
buffer_load_ubyte a5, off, s[8:11], s3 offset:4095 slc buffer_load_ubyte a5, off, s[8:11], s3 offset:4095 slc
// GFX90A: buffer_load_ubyte a5, off, s[8:11], s3 offset:4095 lds ; encoding: [0xff,0x0f,0x41,0xe0,0x00,0x05,0x82,0x03]
// NOT-GFX90A: error: invalid register class: agpr loads and stores not supported on this GPU
buffer_load_ubyte a5, off, s[8:11], s3 offset:4095 lds
// GFX90A: buffer_load_sbyte a5, off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x44,0xe0,0x00,0x05,0x82,0x03] // GFX90A: buffer_load_sbyte a5, off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x44,0xe0,0x00,0x05,0x82,0x03]
// NOT-GFX90A: error: invalid register class: agpr loads and stores not supported on this GPU // NOT-GFX90A: error: invalid register class: agpr loads and stores not supported on this GPU
buffer_load_sbyte a5, off, s[8:11], s3 offset:4095 buffer_load_sbyte a5, off, s[8:11], s3 offset:4095
// GFX90A: buffer_load_sbyte a255, off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x44,0xe0,0x00,0xff,0x82,0x03] // GFX90A: buffer_load_sbyte a255, off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x44,0xe0,0x00,0xff,0x82,0x03]
// NOT-GFX90A: error: invalid register class: agpr loads and stores not supported on this GPU // NOT-GFX90A: error: invalid register class: agpr loads and stores not supported on this GPU
buffer_load_sbyte a255, off, s[8:11], s3 offset:4095 buffer_load_sbyte a255, off, s[8:11], s3 offset:4095
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// GFX90A: buffer_load_sbyte a5, off, s[8:11], s3 offset:4095 glc ; encoding: [0xff,0x4f,0x44,0xe0,0x00,0x05,0x82,0x03] // GFX90A: buffer_load_sbyte a5, off, s[8:11], s3 offset:4095 glc ; encoding: [0xff,0x4f,0x44,0xe0,0x00,0x05,0x82,0x03]
// NOT-GFX90A: error: invalid register class: agpr loads and stores not supported on this GPU // NOT-GFX90A: error: invalid register class: agpr loads and stores not supported on this GPU
buffer_load_sbyte a5, off, s[8:11], s3 offset:4095 glc buffer_load_sbyte a5, off, s[8:11], s3 offset:4095 glc
// GFX90A: buffer_load_sbyte a5, off, s[8:11], s3 offset:4095 slc ; encoding: [0xff,0x0f,0x46,0xe0,0x00,0x05,0x82,0x03] // GFX90A: buffer_load_sbyte a5, off, s[8:11], s3 offset:4095 slc ; encoding: [0xff,0x0f,0x46,0xe0,0x00,0x05,0x82,0x03]
// NOT-GFX90A: error: invalid register class: agpr loads and stores not supported on this GPU // NOT-GFX90A: error: invalid register class: agpr loads and stores not supported on this GPU
buffer_load_sbyte a5, off, s[8:11], s3 offset:4095 slc buffer_load_sbyte a5, off, s[8:11], s3 offset:4095 slc
// GFX90A: buffer_load_sbyte a5, off, s[8:11], s3 offset:4095 lds ; encoding: [0xff,0x0f,0x45,0xe0,0x00,0x05,0x82,0x03]
// NOT-GFX90A: error: invalid register class: agpr loads and stores not supported on this GPU
buffer_load_sbyte a5, off, s[8:11], s3 offset:4095 lds
// GFX90A: buffer_load_ushort a5, off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x48,0xe0,0x00,0x05,0x82,0x03] // GFX90A: buffer_load_ushort a5, off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x48,0xe0,0x00,0x05,0x82,0x03]
// NOT-GFX90A: error: invalid register class: agpr loads and stores not supported on this GPU // NOT-GFX90A: error: invalid register class: agpr loads and stores not supported on this GPU
buffer_load_ushort a5, off, s[8:11], s3 offset:4095 buffer_load_ushort a5, off, s[8:11], s3 offset:4095
// GFX90A: buffer_load_ushort a255, off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x48,0xe0,0x00,0xff,0x82,0x03] // GFX90A: buffer_load_ushort a255, off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x48,0xe0,0x00,0xff,0x82,0x03]
// NOT-GFX90A: error: invalid register class: agpr loads and stores not supported on this GPU // NOT-GFX90A: error: invalid register class: agpr loads and stores not supported on this GPU
buffer_load_ushort a255, off, s[8:11], s3 offset:4095 buffer_load_ushort a255, off, s[8:11], s3 offset:4095
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// GFX90A: buffer_load_ushort a5, off, s[8:11], s3 offset:4095 glc ; encoding: [0xff,0x4f,0x48,0xe0,0x00,0x05,0x82,0x03] // GFX90A: buffer_load_ushort a5, off, s[8:11], s3 offset:4095 glc ; encoding: [0xff,0x4f,0x48,0xe0,0x00,0x05,0x82,0x03]
// NOT-GFX90A: error: invalid register class: agpr loads and stores not supported on this GPU // NOT-GFX90A: error: invalid register class: agpr loads and stores not supported on this GPU
buffer_load_ushort a5, off, s[8:11], s3 offset:4095 glc buffer_load_ushort a5, off, s[8:11], s3 offset:4095 glc
// GFX90A: buffer_load_ushort a5, off, s[8:11], s3 offset:4095 slc ; encoding: [0xff,0x0f,0x4a,0xe0,0x00,0x05,0x82,0x03] // GFX90A: buffer_load_ushort a5, off, s[8:11], s3 offset:4095 slc ; encoding: [0xff,0x0f,0x4a,0xe0,0x00,0x05,0x82,0x03]
// NOT-GFX90A: error: invalid register class: agpr loads and stores not supported on this GPU // NOT-GFX90A: error: invalid register class: agpr loads and stores not supported on this GPU
buffer_load_ushort a5, off, s[8:11], s3 offset:4095 slc buffer_load_ushort a5, off, s[8:11], s3 offset:4095 slc
// GFX90A: buffer_load_ushort a5, off, s[8:11], s3 offset:4095 lds ; encoding: [0xff,0x0f,0x49,0xe0,0x00,0x05,0x82,0x03]
// NOT-GFX90A: error: invalid register class: agpr loads and stores not supported on this GPU
buffer_load_ushort a5, off, s[8:11], s3 offset:4095 lds
// GFX90A: buffer_load_sshort a5, off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x4c,0xe0,0x00,0x05,0x82,0x03] // GFX90A: buffer_load_sshort a5, off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x4c,0xe0,0x00,0x05,0x82,0x03]
// NOT-GFX90A: error: invalid register class: agpr loads and stores not supported on this GPU // NOT-GFX90A: error: invalid register class: agpr loads and stores not supported on this GPU
buffer_load_sshort a5, off, s[8:11], s3 offset:4095 buffer_load_sshort a5, off, s[8:11], s3 offset:4095
// GFX90A: buffer_load_sshort a255, off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x4c,0xe0,0x00,0xff,0x82,0x03] // GFX90A: buffer_load_sshort a255, off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x4c,0xe0,0x00,0xff,0x82,0x03]
// NOT-GFX90A: error: invalid register class: agpr loads and stores not supported on this GPU // NOT-GFX90A: error: invalid register class: agpr loads and stores not supported on this GPU
buffer_load_sshort a255, off, s[8:11], s3 offset:4095 buffer_load_sshort a255, off, s[8:11], s3 offset:4095
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// GFX90A: buffer_load_sshort a5, off, s[8:11], s3 offset:4095 glc ; encoding: [0xff,0x4f,0x4c,0xe0,0x00,0x05,0x82,0x03] // GFX90A: buffer_load_sshort a5, off, s[8:11], s3 offset:4095 glc ; encoding: [0xff,0x4f,0x4c,0xe0,0x00,0x05,0x82,0x03]
// NOT-GFX90A: error: invalid register class: agpr loads and stores not supported on this GPU // NOT-GFX90A: error: invalid register class: agpr loads and stores not supported on this GPU
buffer_load_sshort a5, off, s[8:11], s3 offset:4095 glc buffer_load_sshort a5, off, s[8:11], s3 offset:4095 glc
// GFX90A: buffer_load_sshort a5, off, s[8:11], s3 offset:4095 slc ; encoding: [0xff,0x0f,0x4e,0xe0,0x00,0x05,0x82,0x03] // GFX90A: buffer_load_sshort a5, off, s[8:11], s3 offset:4095 slc ; encoding: [0xff,0x0f,0x4e,0xe0,0x00,0x05,0x82,0x03]
// NOT-GFX90A: error: invalid register class: agpr loads and stores not supported on this GPU // NOT-GFX90A: error: invalid register class: agpr loads and stores not supported on this GPU
buffer_load_sshort a5, off, s[8:11], s3 offset:4095 slc buffer_load_sshort a5, off, s[8:11], s3 offset:4095 slc
// GFX90A: buffer_load_sshort a5, off, s[8:11], s3 offset:4095 lds ; encoding: [0xff,0x0f,0x4d,0xe0,0x00,0x05,0x82,0x03]
// NOT-GFX90A: error: invalid register class: agpr loads and stores not supported on this GPU
buffer_load_sshort a5, off, s[8:11], s3 offset:4095 lds
// GFX90A: buffer_load_dword a5, off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x50,0xe0,0x00,0x05,0x82,0x03] // GFX90A: buffer_load_dword a5, off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x50,0xe0,0x00,0x05,0x82,0x03]
// NOT-GFX90A: error: invalid register class: agpr loads and stores not supported on this GPU // NOT-GFX90A: error: invalid register class: agpr loads and stores not supported on this GPU
buffer_load_dword a5, off, s[8:11], s3 offset:4095 buffer_load_dword a5, off, s[8:11], s3 offset:4095
// GFX90A: buffer_load_dword a255, off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x50,0xe0,0x00,0xff,0x82,0x03] // GFX90A: buffer_load_dword a255, off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x50,0xe0,0x00,0xff,0x82,0x03]
// NOT-GFX90A: error: invalid register class: agpr loads and stores not supported on this GPU // NOT-GFX90A: error: invalid register class: agpr loads and stores not supported on this GPU
buffer_load_dword a255, off, s[8:11], s3 offset:4095 buffer_load_dword a255, off, s[8:11], s3 offset:4095
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// GFX90A: buffer_load_dword a5, off, s[8:11], s3 offset:4095 glc ; encoding: [0xff,0x4f,0x50,0xe0,0x00,0x05,0x82,0x03] // GFX90A: buffer_load_dword a5, off, s[8:11], s3 offset:4095 glc ; encoding: [0xff,0x4f,0x50,0xe0,0x00,0x05,0x82,0x03]
// NOT-GFX90A: error: invalid register class: agpr loads and stores not supported on this GPU // NOT-GFX90A: error: invalid register class: agpr loads and stores not supported on this GPU
buffer_load_dword a5, off, s[8:11], s3 offset:4095 glc buffer_load_dword a5, off, s[8:11], s3 offset:4095 glc
// GFX90A: buffer_load_dword a5, off, s[8:11], s3 offset:4095 slc ; encoding: [0xff,0x0f,0x52,0xe0,0x00,0x05,0x82,0x03] // GFX90A: buffer_load_dword a5, off, s[8:11], s3 offset:4095 slc ; encoding: [0xff,0x0f,0x52,0xe0,0x00,0x05,0x82,0x03]
// NOT-GFX90A: error: invalid register class: agpr loads and stores not supported on this GPU // NOT-GFX90A: error: invalid register class: agpr loads and stores not supported on this GPU
buffer_load_dword a5, off, s[8:11], s3 offset:4095 slc buffer_load_dword a5, off, s[8:11], s3 offset:4095 slc
// GFX90A: buffer_load_dword a5, off, s[8:11], s3 offset:4095 lds ; encoding: [0xff,0x0f,0x51,0xe0,0x00,0x05,0x82,0x03]
// NOT-GFX90A: error: invalid register class: agpr loads and stores not supported on this GPU
buffer_load_dword a5, off, s[8:11], s3 offset:4095 lds
// GFX90A: buffer_load_dwordx2 a[6:7], off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x54,0xe0,0x00,0x06,0x82,0x03] // GFX90A: buffer_load_dwordx2 a[6:7], off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x54,0xe0,0x00,0x06,0x82,0x03]
// NOT-GFX90A: error: invalid register class: agpr loads and stores not supported on this GPU // NOT-GFX90A: error: invalid register class: agpr loads and stores not supported on this GPU
buffer_load_dwordx2 a[6:7], off, s[8:11], s3 offset:4095 buffer_load_dwordx2 a[6:7], off, s[8:11], s3 offset:4095
// GFX90A: buffer_load_dwordx2 a[254:255], off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x54,0xe0,0x00,0xfe,0x82,0x03] // GFX90A: buffer_load_dwordx2 a[254:255], off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x54,0xe0,0x00,0xfe,0x82,0x03]
// NOT-GFX90A: error: invalid register class: agpr loads and stores not supported on this GPU // NOT-GFX90A: error: invalid register class: agpr loads and stores not supported on this GPU
buffer_load_dwordx2 a[254:255], off, s[8:11], s3 offset:4095 buffer_load_dwordx2 a[254:255], off, s[8:11], s3 offset:4095
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llvm/test/MC/AMDGPU/gfx9_asm_mubuf.s

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// CHECK: [0x07,0x00,0x00,0xe0,0x00,0x05,0x02,0x03] // CHECK: [0x07,0x00,0x00,0xe0,0x00,0x05,0x02,0x03]
buffer_load_format_x v5, off, s[8:11], s3 offset:4095 glc buffer_load_format_x v5, off, s[8:11], s3 offset:4095 glc
// CHECK: [0xff,0x4f,0x00,0xe0,0x00,0x05,0x02,0x03] // CHECK: [0xff,0x4f,0x00,0xe0,0x00,0x05,0x02,0x03]
buffer_load_format_x v5, off, s[8:11], s3 offset:4095 slc buffer_load_format_x v5, off, s[8:11], s3 offset:4095 slc
// CHECK: [0xff,0x0f,0x02,0xe0,0x00,0x05,0x02,0x03] // CHECK: [0xff,0x0f,0x02,0xe0,0x00,0x05,0x02,0x03]
buffer_load_format_x v5, off, s[8:11], s3 offset:4095 lds buffer_load_format_x off, s[8:11], s3 offset:4095 lds
// CHECK: [0xff,0x0f,0x01,0xe0,0x00,0x05,0x02,0x03] // CHECK: [0xff,0x0f,0x01,0xe0,0x00,0x00,0x02,0x03]
buffer_load_format_xy v[5:6], off, s[8:11], s3 offset:4095 buffer_load_format_xy v[5:6], off, s[8:11], s3 offset:4095
// CHECK: [0xff,0x0f,0x04,0xe0,0x00,0x05,0x02,0x03] // CHECK: [0xff,0x0f,0x04,0xe0,0x00,0x05,0x02,0x03]
buffer_load_format_xy v[254:255], off, s[8:11], s3 offset:4095 buffer_load_format_xy v[254:255], off, s[8:11], s3 offset:4095
// CHECK: [0xff,0x0f,0x04,0xe0,0x00,0xfe,0x02,0x03] // CHECK: [0xff,0x0f,0x04,0xe0,0x00,0xfe,0x02,0x03]
buffer_load_format_xy v[5:6], off, s[12:15], s3 offset:4095 buffer_load_format_xy v[5:6], off, s[12:15], s3 offset:4095
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// CHECK: [0x07,0x00,0x40,0xe0,0x00,0x05,0x02,0x03] // CHECK: [0x07,0x00,0x40,0xe0,0x00,0x05,0x02,0x03]
buffer_load_ubyte v5, off, s[8:11], s3 offset:4095 glc buffer_load_ubyte v5, off, s[8:11], s3 offset:4095 glc
// CHECK: [0xff,0x4f,0x40,0xe0,0x00,0x05,0x02,0x03] // CHECK: [0xff,0x4f,0x40,0xe0,0x00,0x05,0x02,0x03]
buffer_load_ubyte v5, off, s[8:11], s3 offset:4095 slc buffer_load_ubyte v5, off, s[8:11], s3 offset:4095 slc
// CHECK: [0xff,0x0f,0x42,0xe0,0x00,0x05,0x02,0x03] // CHECK: [0xff,0x0f,0x42,0xe0,0x00,0x05,0x02,0x03]
buffer_load_ubyte v5, off, s[8:11], s3 offset:4095 lds buffer_load_ubyte off, s[8:11], s3 offset:4095 lds
// CHECK: [0xff,0x0f,0x41,0xe0,0x00,0x05,0x02,0x03] // CHECK: [0xff,0x0f,0x41,0xe0,0x00,0x00,0x02,0x03]
buffer_load_sbyte v5, off, s[8:11], s3 offset:4095 buffer_load_sbyte v5, off, s[8:11], s3 offset:4095
// CHECK: [0xff,0x0f,0x44,0xe0,0x00,0x05,0x02,0x03] // CHECK: [0xff,0x0f,0x44,0xe0,0x00,0x05,0x02,0x03]
buffer_load_sbyte v255, off, s[8:11], s3 offset:4095 buffer_load_sbyte v255, off, s[8:11], s3 offset:4095
// CHECK: [0xff,0x0f,0x44,0xe0,0x00,0xff,0x02,0x03] // CHECK: [0xff,0x0f,0x44,0xe0,0x00,0xff,0x02,0x03]
buffer_load_sbyte v5, off, s[12:15], s3 offset:4095 buffer_load_sbyte v5, off, s[12:15], s3 offset:4095
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// CHECK: [0x07,0x00,0x44,0xe0,0x00,0x05,0x02,0x03] // CHECK: [0x07,0x00,0x44,0xe0,0x00,0x05,0x02,0x03]
buffer_load_sbyte v5, off, s[8:11], s3 offset:4095 glc buffer_load_sbyte v5, off, s[8:11], s3 offset:4095 glc
// CHECK: [0xff,0x4f,0x44,0xe0,0x00,0x05,0x02,0x03] // CHECK: [0xff,0x4f,0x44,0xe0,0x00,0x05,0x02,0x03]
buffer_load_sbyte v5, off, s[8:11], s3 offset:4095 slc buffer_load_sbyte v5, off, s[8:11], s3 offset:4095 slc
// CHECK: [0xff,0x0f,0x46,0xe0,0x00,0x05,0x02,0x03] // CHECK: [0xff,0x0f,0x46,0xe0,0x00,0x05,0x02,0x03]
buffer_load_sbyte v5, off, s[8:11], s3 offset:4095 lds buffer_load_sbyte off, s[8:11], s3 offset:4095 lds
// CHECK: [0xff,0x0f,0x45,0xe0,0x00,0x05,0x02,0x03] // CHECK: [0xff,0x0f,0x45,0xe0,0x00,0x00,0x02,0x03]
buffer_load_ushort v5, off, s[8:11], s3 offset:4095 buffer_load_ushort v5, off, s[8:11], s3 offset:4095
// CHECK: [0xff,0x0f,0x48,0xe0,0x00,0x05,0x02,0x03] // CHECK: [0xff,0x0f,0x48,0xe0,0x00,0x05,0x02,0x03]
buffer_load_ushort v255, off, s[8:11], s3 offset:4095 buffer_load_ushort v255, off, s[8:11], s3 offset:4095
// CHECK: [0xff,0x0f,0x48,0xe0,0x00,0xff,0x02,0x03] // CHECK: [0xff,0x0f,0x48,0xe0,0x00,0xff,0x02,0x03]
buffer_load_ushort v5, off, s[12:15], s3 offset:4095 buffer_load_ushort v5, off, s[12:15], s3 offset:4095
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// CHECK: [0x07,0x00,0x48,0xe0,0x00,0x05,0x02,0x03] // CHECK: [0x07,0x00,0x48,0xe0,0x00,0x05,0x02,0x03]
buffer_load_ushort v5, off, s[8:11], s3 offset:4095 glc buffer_load_ushort v5, off, s[8:11], s3 offset:4095 glc
// CHECK: [0xff,0x4f,0x48,0xe0,0x00,0x05,0x02,0x03] // CHECK: [0xff,0x4f,0x48,0xe0,0x00,0x05,0x02,0x03]
buffer_load_ushort v5, off, s[8:11], s3 offset:4095 slc buffer_load_ushort v5, off, s[8:11], s3 offset:4095 slc
// CHECK: [0xff,0x0f,0x4a,0xe0,0x00,0x05,0x02,0x03] // CHECK: [0xff,0x0f,0x4a,0xe0,0x00,0x05,0x02,0x03]
buffer_load_ushort v5, off, s[8:11], s3 offset:4095 lds buffer_load_ushort off, s[8:11], s3 offset:4095 lds
// CHECK: [0xff,0x0f,0x49,0xe0,0x00,0x05,0x02,0x03] // CHECK: [0xff,0x0f,0x49,0xe0,0x00,0x00,0x02,0x03]
buffer_load_sshort v5, off, s[8:11], s3 offset:4095 buffer_load_sshort v5, off, s[8:11], s3 offset:4095
// CHECK: [0xff,0x0f,0x4c,0xe0,0x00,0x05,0x02,0x03] // CHECK: [0xff,0x0f,0x4c,0xe0,0x00,0x05,0x02,0x03]
buffer_load_sshort v255, off, s[8:11], s3 offset:4095 buffer_load_sshort v255, off, s[8:11], s3 offset:4095
// CHECK: [0xff,0x0f,0x4c,0xe0,0x00,0xff,0x02,0x03] // CHECK: [0xff,0x0f,0x4c,0xe0,0x00,0xff,0x02,0x03]
buffer_load_sshort v5, off, s[12:15], s3 offset:4095 buffer_load_sshort v5, off, s[12:15], s3 offset:4095
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// CHECK: [0x07,0x00,0x4c,0xe0,0x00,0x05,0x02,0x03] // CHECK: [0x07,0x00,0x4c,0xe0,0x00,0x05,0x02,0x03]
buffer_load_sshort v5, off, s[8:11], s3 offset:4095 glc buffer_load_sshort v5, off, s[8:11], s3 offset:4095 glc
// CHECK: [0xff,0x4f,0x4c,0xe0,0x00,0x05,0x02,0x03] // CHECK: [0xff,0x4f,0x4c,0xe0,0x00,0x05,0x02,0x03]
buffer_load_sshort v5, off, s[8:11], s3 offset:4095 slc buffer_load_sshort v5, off, s[8:11], s3 offset:4095 slc
// CHECK: [0xff,0x0f,0x4e,0xe0,0x00,0x05,0x02,0x03] // CHECK: [0xff,0x0f,0x4e,0xe0,0x00,0x05,0x02,0x03]
buffer_load_sshort v5, off, s[8:11], s3 offset:4095 lds buffer_load_sshort off, s[8:11], s3 offset:4095 lds
// CHECK: [0xff,0x0f,0x4d,0xe0,0x00,0x05,0x02,0x03] // CHECK: [0xff,0x0f,0x4d,0xe0,0x00,0x00,0x02,0x03]
buffer_load_dword v5, off, s[8:11], s3 offset:4095 buffer_load_dword v5, off, s[8:11], s3 offset:4095
// CHECK: [0xff,0x0f,0x50,0xe0,0x00,0x05,0x02,0x03] // CHECK: [0xff,0x0f,0x50,0xe0,0x00,0x05,0x02,0x03]
buffer_load_dword v255, off, s[8:11], s3 offset:4095 buffer_load_dword v255, off, s[8:11], s3 offset:4095
// CHECK: [0xff,0x0f,0x50,0xe0,0x00,0xff,0x02,0x03] // CHECK: [0xff,0x0f,0x50,0xe0,0x00,0xff,0x02,0x03]
buffer_load_dword v5, off, s[12:15], s3 offset:4095 buffer_load_dword v5, off, s[12:15], s3 offset:4095
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// CHECK: [0x07,0x00,0x50,0xe0,0x00,0x05,0x02,0x03] // CHECK: [0x07,0x00,0x50,0xe0,0x00,0x05,0x02,0x03]
buffer_load_dword v5, off, s[8:11], s3 offset:4095 glc buffer_load_dword v5, off, s[8:11], s3 offset:4095 glc
// CHECK: [0xff,0x4f,0x50,0xe0,0x00,0x05,0x02,0x03] // CHECK: [0xff,0x4f,0x50,0xe0,0x00,0x05,0x02,0x03]
buffer_load_dword v5, off, s[8:11], s3 offset:4095 slc buffer_load_dword v5, off, s[8:11], s3 offset:4095 slc
// CHECK: [0xff,0x0f,0x52,0xe0,0x00,0x05,0x02,0x03] // CHECK: [0xff,0x0f,0x52,0xe0,0x00,0x05,0x02,0x03]
buffer_load_dword v5, off, s[8:11], s3 offset:4095 lds buffer_load_dword off, s[8:11], s3 offset:4095 lds
// CHECK: [0xff,0x0f,0x51,0xe0,0x00,0x05,0x02,0x03] // CHECK: [0xff,0x0f,0x51,0xe0,0x00,0x00,0x02,0x03]
buffer_load_dwordx2 v[5:6], off, s[8:11], s3 offset:4095 buffer_load_dwordx2 v[5:6], off, s[8:11], s3 offset:4095
// CHECK: [0xff,0x0f,0x54,0xe0,0x00,0x05,0x02,0x03] // CHECK: [0xff,0x0f,0x54,0xe0,0x00,0x05,0x02,0x03]
buffer_load_dwordx2 v[254:255], off, s[8:11], s3 offset:4095 buffer_load_dwordx2 v[254:255], off, s[8:11], s3 offset:4095
// CHECK: [0xff,0x0f,0x54,0xe0,0x00,0xfe,0x02,0x03] // CHECK: [0xff,0x0f,0x54,0xe0,0x00,0xfe,0x02,0x03]
buffer_load_dwordx2 v[5:6], off, s[12:15], s3 offset:4095 buffer_load_dwordx2 v[5:6], off, s[12:15], s3 offset:4095
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llvm/test/MC/AMDGPU/mubuf-gfx10.s

// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -show-encoding %s | FileCheck -check-prefix=GFX10 %s // RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -show-encoding %s | FileCheck -check-prefix=GFX10 %s
buffer_load_sbyte v5, off, s[8:11], s3 glc slc lds buffer_load_sbyte off, s[8:11], s3 glc slc lds
// GFX10: buffer_load_sbyte v5, off, s[8:11], s3 glc slc lds ; encoding: [0x00,0x40,0x25,0xe0,0x00,0x05,0x42,0x03] // GFX10: buffer_load_sbyte off, s[8:11], s3 glc slc lds ; encoding: [0x00,0x40,0x25,0xe0,0x00,0x00,0x42,0x03]
buffer_load_sbyte v5, off, s[8:11], s3 glc slc lds dlc buffer_load_sbyte off, s[8:11], s3 glc slc lds dlc
// GFX10: buffer_load_sbyte v5, off, s[8:11], s3 glc slc dlc lds ; encoding: [0x00,0xc0,0x25,0xe0,0x00,0x05,0x42,0x03] // GFX10: buffer_load_sbyte off, s[8:11], s3 glc slc dlc lds ; encoding: [0x00,0xc0,0x25,0xe0,0x00,0x00,0x42,0x03]
buffer_load_sbyte v5, off, s[8:11], s3 glc slc dlc buffer_load_sbyte v5, off, s[8:11], s3 glc slc dlc
// GFX10: buffer_load_sbyte v5, off, s[8:11], s3 glc slc dlc ; encoding: [0x00,0xc0,0x24,0xe0,0x00,0x05,0x42,0x03] // GFX10: buffer_load_sbyte v5, off, s[8:11], s3 glc slc dlc ; encoding: [0x00,0xc0,0x24,0xe0,0x00,0x05,0x42,0x03]
buffer_atomic_fcmpswap v[0:1], off, s[0:3], s0 offset:4095 buffer_atomic_fcmpswap v[0:1], off, s[0:3], s0 offset:4095
// GFX10: buffer_atomic_fcmpswap v[0:1], off, s[0:3], s0 offset:4095 ; encoding: [0xff,0x0f,0xf8,0xe0,0x00,0x00,0x00,0x00] // GFX10: buffer_atomic_fcmpswap v[0:1], off, s[0:3], s0 offset:4095 ; encoding: [0xff,0x0f,0xf8,0xe0,0x00,0x00,0x00,0x00]
buffer_atomic_fcmpswap_x2 v[0:3], off, s[0:3], s0 offset:4095 buffer_atomic_fcmpswap_x2 v[0:3], off, s[0:3], s0 offset:4095
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llvm/test/MC/AMDGPU/mubuf.s

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buffer_atomic_fmin_x2 v[0:1], v0, s[0:3], s0 idxen offset:4095 buffer_atomic_fmin_x2 v[0:1], v0, s[0:3], s0 idxen offset:4095
// SICI: buffer_atomic_fmin_x2 v[0:1], v0, s[0:3], s0 idxen offset:4095 ; encoding: [0xff,0x2f,0x7c,0xe1,0x00,0x00,0x00,0x00] // SICI: buffer_atomic_fmin_x2 v[0:1], v0, s[0:3], s0 idxen offset:4095 ; encoding: [0xff,0x2f,0x7c,0xe1,0x00,0x00,0x00,0x00]
// NOVI: error: instruction not supported on this GPU // NOVI: error: instruction not supported on this GPU
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
// Lds support // Lds support
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
buffer_load_sbyte v5, off, s[8:11], s3 lds buffer_load_sbyte off, s[8:11], s3 lds
// SICI: buffer_load_sbyte v5, off, s[8:11], s3 lds ; encoding: [0x00,0x00,0x25,0xe0,0x00,0x05,0x02,0x03] // SICI: buffer_load_sbyte off, s[8:11], s3 lds ; encoding: [0x00,0x00,0x25,0xe0,0x00,0x00,0x02,0x03]
// VI: buffer_load_sbyte v5, off, s[8:11], s3 lds ; encoding: [0x00,0x00,0x45,0xe0,0x00,0x05,0x02,0x03] // VI: buffer_load_sbyte off, s[8:11], s3 lds ; encoding: [0x00,0x00,0x45,0xe0,0x00,0x00,0x02,0x03]
buffer_load_sbyte v5, off, s[8:11], s3 glc slc lds buffer_load_sbyte off, s[8:11], s3 glc slc lds
// SICI: buffer_load_sbyte v5, off, s[8:11], s3 glc slc lds ; encoding: [0x00,0x40,0x25,0xe0,0x00,0x05,0x42,0x03] // SICI: buffer_load_sbyte off, s[8:11], s3 glc slc lds ; encoding: [0x00,0x40,0x25,0xe0,0x00,0x00,0x42,0x03]
// VI: buffer_load_sbyte v5, off, s[8:11], s3 glc slc lds ; encoding: [0x00,0x40,0x47,0xe0,0x00,0x05,0x02,0x03] // VI: buffer_load_sbyte off, s[8:11], s3 glc slc lds ; encoding: [0x00,0x40,0x47,0xe0,0x00,0x00,0x02,0x03]
buffer_load_sbyte v5, off, s[8:11], s3 offset:4095 glc slc lds buffer_load_sbyte off, s[8:11], s3 offset:4095 glc slc lds
// SICI: buffer_load_sbyte v5, off, s[8:11], s3 offset:4095 glc slc lds ; encoding: [0xff,0x4f,0x25,0xe0,0x00,0x05,0x42,0x03] // SICI: buffer_load_sbyte off, s[8:11], s3 offset:4095 glc slc lds ; encoding: [0xff,0x4f,0x25,0xe0,0x00,0x00,0x42,0x03]
// VI: buffer_load_sbyte v5, off, s[8:11], s3 offset:4095 glc slc lds ; encoding: [0xff,0x4f,0x47,0xe0,0x00,0x05,0x02,0x03] // VI: buffer_load_sbyte off, s[8:11], s3 offset:4095 glc slc lds ; encoding: [0xff,0x4f,0x47,0xe0,0x00,0x00,0x02,0x03]
buffer_load_sbyte v5, v0, s[8:11], s3 offen offset:4095 slc lds buffer_load_sbyte v0, s[8:11], s3 offen offset:4095 slc lds
// SICI: buffer_load_sbyte v5, v0, s[8:11], s3 offen offset:4095 slc lds ; encoding: [0xff,0x1f,0x25,0xe0,0x00,0x05,0x42,0x03] // SICI: buffer_load_sbyte v0, s[8:11], s3 offen offset:4095 slc lds ; encoding: [0xff,0x1f,0x25,0xe0,0x00,0x00,0x42,0x03]
// VI: buffer_load_sbyte v5, v0, s[8:11], s3 offen offset:4095 slc lds ; encoding: [0xff,0x1f,0x47,0xe0,0x00,0x05,0x02,0x03] // VI: buffer_load_sbyte v0, s[8:11], s3 offen offset:4095 slc lds ; encoding: [0xff,0x1f,0x47,0xe0,0x00,0x00,0x02,0x03]
buffer_load_sbyte v5, v0, s[8:11], s3 offen lds buffer_load_sbyte v0, s[8:11], s3 offen lds
// SICI: buffer_load_sbyte v5, v0, s[8:11], s3 offen lds ; encoding: [0x00,0x10,0x25,0xe0,0x00,0x05,0x02,0x03] // SICI: buffer_load_sbyte v0, s[8:11], s3 offen lds ; encoding: [0x00,0x10,0x25,0xe0,0x00,0x00,0x02,0x03]
// VI: buffer_load_sbyte v5, v0, s[8:11], s3 offen lds ; encoding: [0x00,0x10,0x45,0xe0,0x00,0x05,0x02,0x03] // VI: buffer_load_sbyte v0, s[8:11], s3 offen lds ; encoding: [0x00,0x10,0x45,0xe0,0x00,0x00,0x02,0x03]
buffer_load_sbyte v5, v0, s[8:11], s3 idxen glc slc lds buffer_load_sbyte v0, s[8:11], s3 idxen glc slc lds
// SICI: buffer_load_sbyte v5, v0, s[8:11], s3 idxen glc slc lds ; encoding: [0x00,0x60,0x25,0xe0,0x00,0x05,0x42,0x03] // SICI: buffer_load_sbyte v0, s[8:11], s3 idxen glc slc lds ; encoding: [0x00,0x60,0x25,0xe0,0x00,0x00,0x42,0x03]
// VI: buffer_load_sbyte v5, v0, s[8:11], s3 idxen glc slc lds ; encoding: [0x00,0x60,0x47,0xe0,0x00,0x05,0x02,0x03] // VI: buffer_load_sbyte v0, s[8:11], s3 idxen glc slc lds ; encoding: [0x00,0x60,0x47,0xe0,0x00,0x00,0x02,0x03]
buffer_load_sbyte v5, v[0:1], s[8:11], s3 idxen offen offset:4095 lds buffer_load_sbyte v[0:1], s[8:11], s3 idxen offen offset:4095 lds
// SICI: buffer_load_sbyte v5, v[0:1], s[8:11], s3 idxen offen offset:4095 lds ; encoding: [0xff,0x3f,0x25,0xe0,0x00,0x05,0x02,0x03] // SICI: buffer_load_sbyte v[0:1], s[8:11], s3 idxen offen offset:4095 lds ; encoding: [0xff,0x3f,0x25,0xe0,0x00,0x00,0x02,0x03]
// VI: buffer_load_sbyte v5, v[0:1], s[8:11], s3 idxen offen offset:4095 lds ; encoding: [0xff,0x3f,0x45,0xe0,0x00,0x05,0x02,0x03] // VI: buffer_load_sbyte v[0:1], s[8:11], s3 idxen offen offset:4095 lds ; encoding: [0xff,0x3f,0x45,0xe0,0x00,0x00,0x02,0x03]
buffer_load_sbyte v5, v[0:1], s[8:11], s3 idxen offen offset:4095 glc slc lds buffer_load_sbyte v[0:1], s[8:11], s3 idxen offen offset:4095 glc slc lds
// SICI: buffer_load_sbyte v5, v[0:1], s[8:11], s3 idxen offen offset:4095 glc slc lds ; encoding: [0xff,0x7f,0x25,0xe0,0x00,0x05,0x42,0x03] // SICI: buffer_load_sbyte v[0:1], s[8:11], s3 idxen offen offset:4095 glc slc lds ; encoding: [0xff,0x7f,0x25,0xe0,0x00,0x00,0x42,0x03]
// VI: buffer_load_sbyte v5, v[0:1], s[8:11], s3 idxen offen offset:4095 glc slc lds ; encoding: [0xff,0x7f,0x47,0xe0,0x00,0x05,0x02,0x03] // VI: buffer_load_sbyte v[0:1], s[8:11], s3 idxen offen offset:4095 glc slc lds ; encoding: [0xff,0x7f,0x47,0xe0,0x00,0x00,0x02,0x03]
buffer_load_ubyte v5, off, s[8:11], s3 offset:4095 lds buffer_load_ubyte off, s[8:11], s3 offset:4095 lds
// SICI: buffer_load_ubyte v5, off, s[8:11], s3 offset:4095 lds ; encoding: [0xff,0x0f,0x21,0xe0,0x00,0x05,0x02,0x03] // SICI: buffer_load_ubyte off, s[8:11], s3 offset:4095 lds ; encoding: [0xff,0x0f,0x21,0xe0,0x00,0x00,0x02,0x03]
// VI: buffer_load_ubyte v5, off, s[8:11], s3 offset:4095 lds ; encoding: [0xff,0x0f,0x41,0xe0,0x00,0x05,0x02,0x03] // VI: buffer_load_ubyte off, s[8:11], s3 offset:4095 lds ; encoding: [0xff,0x0f,0x41,0xe0,0x00,0x00,0x02,0x03]
buffer_load_sshort v5, v0, s[8:11], s3 offen offset:4095 glc slc lds buffer_load_sshort v0, s[8:11], s3 offen offset:4095 glc slc lds
// SICI: buffer_load_sshort v5, v0, s[8:11], s3 offen offset:4095 glc slc lds ; encoding: [0xff,0x5f,0x2d,0xe0,0x00,0x05,0x42,0x03] // SICI: buffer_load_sshort v0, s[8:11], s3 offen offset:4095 glc slc lds ; encoding: [0xff,0x5f,0x2d,0xe0,0x00,0x00,0x42,0x03]
// VI: buffer_load_sshort v5, v0, s[8:11], s3 offen offset:4095 glc slc lds ; encoding: [0xff,0x5f,0x4f,0xe0,0x00,0x05,0x02,0x03] // VI: buffer_load_sshort v0, s[8:11], s3 offen offset:4095 glc slc lds ; encoding: [0xff,0x5f,0x4f,0xe0,0x00,0x00,0x02,0x03]
buffer_load_ushort v5, v0, s[8:11], s3 idxen offset:4095 glc slc lds buffer_load_ushort v0, s[8:11], s3 idxen offset:4095 glc slc lds
// SICI: buffer_load_ushort v5, v0, s[8:11], s3 idxen offset:4095 glc slc lds ; encoding: [0xff,0x6f,0x29,0xe0,0x00,0x05,0x42,0x03] // SICI: buffer_load_ushort v0, s[8:11], s3 idxen offset:4095 glc slc lds ; encoding: [0xff,0x6f,0x29,0xe0,0x00,0x00,0x42,0x03]
// VI: buffer_load_ushort v5, v0, s[8:11], s3 idxen offset:4095 glc slc lds ; encoding: [0xff,0x6f,0x4b,0xe0,0x00,0x05,0x02,0x03] // VI: buffer_load_ushort v0, s[8:11], s3 idxen offset:4095 glc slc lds ; encoding: [0xff,0x6f,0x4b,0xe0,0x00,0x00,0x02,0x03]
buffer_load_dword v5, v0, s[8:11], s101 offen lds buffer_load_dword v0, s[8:11], s101 offen lds
// SICI: buffer_load_dword v5, v0, s[8:11], s101 offen lds ; encoding: [0x00,0x10,0x31,0xe0,0x00,0x05,0x02,0x65] // SICI: buffer_load_dword v0, s[8:11], s101 offen lds ; encoding: [0x00,0x10,0x31,0xe0,0x00,0x00,0x02,0x65]
// VI: buffer_load_dword v5, v0, s[8:11], s101 offen lds ; encoding: [0x00,0x10,0x51,0xe0,0x00,0x05,0x02,0x65] // VI: buffer_load_dword v0, s[8:11], s101 offen lds ; encoding: [0x00,0x10,0x51,0xe0,0x00,0x00,0x02,0x65]
buffer_load_format_x v5, v[0:1], s[8:11], s3 idxen offen offset:4095 glc slc lds buffer_load_format_x v[0:1], s[8:11], s3 idxen offen offset:4095 glc slc lds
// SICI: buffer_load_format_x v5, v[0:1], s[8:11], s3 idxen offen offset:4095 glc slc lds ; encoding: [0xff,0x7f,0x01,0xe0,0x00,0x05,0x42,0x03] // SICI: buffer_load_format_x v[0:1], s[8:11], s3 idxen offen offset:4095 glc slc lds ; encoding: [0xff,0x7f,0x01,0xe0,0x00,0x00,0x42,0x03]
// VI: buffer_load_format_x v5, v[0:1], s[8:11], s3 idxen offen offset:4095 glc slc lds ; encoding: [0xff,0x7f,0x03,0xe0,0x00,0x05,0x02,0x03] // VI: buffer_load_format_x v[0:1], s[8:11], s3 idxen offen offset:4095 glc slc lds ; encoding: [0xff,0x7f,0x03,0xe0,0x00,0x00,0x02,0x03]
buffer_store_lds_dword s[4:7], s0 lds buffer_store_lds_dword s[4:7], s0 lds
// NOSICI: error: instruction not supported on this GPU // NOSICI: error: instruction not supported on this GPU
// VI: buffer_store_lds_dword s[4:7], s0 lds ; encoding: [0x00,0x00,0xf5,0xe0,0x00,0x00,0x01,0x00] // VI: buffer_store_lds_dword s[4:7], s0 lds ; encoding: [0x00,0x00,0xf5,0xe0,0x00,0x00,0x01,0x00]
buffer_store_lds_dword s[4:7], s0 offset:4095 lds buffer_store_lds_dword s[4:7], s0 offset:4095 lds
// NOSICI: error: instruction not supported on this GPU // NOSICI: error: instruction not supported on this GPU
// VI: buffer_store_lds_dword s[4:7], s0 offset:4095 lds ; encoding: [0xff,0x0f,0xf5,0xe0,0x00,0x00,0x01,0x00] // VI: buffer_store_lds_dword s[4:7], s0 offset:4095 lds ; encoding: [0xff,0x0f,0xf5,0xe0,0x00,0x00,0x01,0x00]
buffer_store_lds_dword s[4:7], s8 offset:4 lds glc slc buffer_store_lds_dword s[4:7], s8 offset:4 lds glc slc
// NOSICI: error: instruction not supported on this GPU // NOSICI: error: instruction not supported on this GPU
// VI: buffer_store_lds_dword s[4:7], s8 offset:4 lds glc slc ; encoding: [0x04,0x40,0xf7,0xe0,0x00,0x00,0x01,0x08] // VI: buffer_store_lds_dword s[4:7], s8 offset:4 lds glc slc ; encoding: [0x04,0x40,0xf7,0xe0,0x00,0x00,0x01,0x08]
buffer_load_dwordx2 v[1:2], off, s[4:7], s1 lds buffer_load_dwordx2 off, s[4:7], s1 lds
// NOSICI: error: operands are not valid for this GPU or mode // NOSICI: error: operands are not valid for this GPU or mode
// VI: buffer_load_dwordx2 v[1:2], off, s[4:7], s1 lds ; encoding: [0x00,0x00,0x55,0xe0,0x00,0x01,0x01,0x01] // VI: buffer_load_dwordx2 off, s[4:7], s1 lds ; encoding: [0x00,0x00,0x55,0xe0,0x00,0x00,0x01,0x01]
buffer_load_dwordx3 v[0:2], off, s[4:7], s0 offset:4095 lds buffer_load_dwordx3 off, s[4:7], s0 offset:4095 lds
// NOSICI: error: operands are not valid for this GPU or mode // NOSICI: error: not a valid operand
// VI: buffer_load_dwordx3 v[0:2], off, s[4:7], s0 offset:4095 lds ; encoding: [0xff,0x0f,0x59,0xe0,0x00,0x00,0x01,0x00] // VI: buffer_load_dwordx3 off, s[4:7], s0 offset:4095 lds ; encoding: [0xff,0x0f,0x59,0xe0,0x00,0x00,0x01,0x00]
buffer_load_dwordx4 v[1:4], off, s[4:7], s1 lds buffer_load_dwordx4 off, s[4:7], s1 lds
// NOSICI: error: operands are not valid for this GPU or mode // NOSICI: error: operands are not valid for this GPU or mode
// VI: buffer_load_dwordx4 v[1:4], off, s[4:7], s1 lds ; encoding: [0x00,0x00,0x5d,0xe0,0x00,0x01,0x01,0x01] // VI: buffer_load_dwordx4 off, s[4:7], s1 lds ; encoding: [0x00,0x00,0x5d,0xe0,0x00,0x00,0x01,0x01]
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
// Errors handling // Errors handling
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
buffer_load_sbyte v5, off, s[8:11], s3 lds tfe buffer_load_sbyte off, s[8:11], s3 lds tfe
// NOSICIVI: error: invalid operand for instruction // NOSICIVI: error: invalid operand for instruction
buffer_load_dword v5, off, s[8:11], s3 tfe lds buffer_load_dword off, s[8:11], s3 tfe lds
// NOSICIVI: error: invalid operand for instruction // NOSICIVI: error: invalid operand for instruction
buffer_store_lds_dword s[4:7], s8 offset:4 lds tfe buffer_store_lds_dword s[4:7], s8 offset:4 lds tfe
// NOSICI: error: instruction not supported on this GPU // NOSICI: error: instruction not supported on this GPU
// NOVI: error: invalid operand for instruction // NOVI: error: invalid operand for instruction
buffer_store_lds_dword s[4:7], s8 offset:4 tfe lds buffer_store_lds_dword s[4:7], s8 offset:4 tfe lds
// NOSICI: error: instruction not supported on this GPU // NOSICI: error: instruction not supported on this GPU
// NOVI: error: invalid operand for instruction // NOVI: error: invalid operand for instruction

llvm/test/MC/Disassembler/AMDGPU/gfx8_dasm_all.txt

Show First 20 Lines • Show All 6,696 Lines • ▼ Show 20 Lines
0x07,0x00,0x00,0xe0,0x00,0x05,0x02,0x03 0x07,0x00,0x00,0xe0,0x00,0x05,0x02,0x03
# CHECK: buffer_load_format_x v5, off, s[8:11], s3 offset:4095 glc ; encoding: [0xff,0x4f,0x00,0xe0,0x00,0x05,0x02,0x03] # CHECK: buffer_load_format_x v5, off, s[8:11], s3 offset:4095 glc ; encoding: [0xff,0x4f,0x00,0xe0,0x00,0x05,0x02,0x03]
0xff,0x4f,0x00,0xe0,0x00,0x05,0x02,0x03 0xff,0x4f,0x00,0xe0,0x00,0x05,0x02,0x03
# CHECK: buffer_load_format_x v5, off, s[8:11], s3 offset:4095 slc ; encoding: [0xff,0x0f,0x02,0xe0,0x00,0x05,0x02,0x03] # CHECK: buffer_load_format_x v5, off, s[8:11], s3 offset:4095 slc ; encoding: [0xff,0x0f,0x02,0xe0,0x00,0x05,0x02,0x03]
0xff,0x0f,0x02,0xe0,0x00,0x05,0x02,0x03 0xff,0x0f,0x02,0xe0,0x00,0x05,0x02,0x03
# CHECK: buffer_load_format_x v5, off, s[8:11], s3 offset:4095 lds ; encoding: [0xff,0x0f,0x01,0xe0,0x00,0x05,0x02,0x03] # CHECK: buffer_load_format_x off, s[8:11], s3 offset:4095 lds ; encoding: [0xff,0x0f,0x01,0xe0,0x00,0x00,0x02,0x03]
0xff,0x0f,0x01,0xe0,0x00,0x05,0x02,0x03 0xff,0x0f,0x01,0xe0,0x00,0x00,0x02,0x03
# CHECK: buffer_load_format_xy v[5:6], off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x04,0xe0,0x00,0x05,0x02,0x03] # CHECK: buffer_load_format_xy v[5:6], off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x04,0xe0,0x00,0x05,0x02,0x03]
0xff,0x0f,0x04,0xe0,0x00,0x05,0x02,0x03 0xff,0x0f,0x04,0xe0,0x00,0x05,0x02,0x03
# CHECK: buffer_load_format_xy v[254:255], off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x04,0xe0,0x00,0xfe,0x02,0x03] # CHECK: buffer_load_format_xy v[254:255], off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x04,0xe0,0x00,0xfe,0x02,0x03]
0xff,0x0f,0x04,0xe0,0x00,0xfe,0x02,0x03 0xff,0x0f,0x04,0xe0,0x00,0xfe,0x02,0x03
# CHECK: buffer_load_format_xy v[5:6], off, s[12:15], s3 offset:4095 ; encoding: [0xff,0x0f,0x04,0xe0,0x00,0x05,0x03,0x03] # CHECK: buffer_load_format_xy v[5:6], off, s[12:15], s3 offset:4095 ; encoding: [0xff,0x0f,0x04,0xe0,0x00,0x05,0x03,0x03]
▲ Show 20 Lines • Show All 801 Lines • ▼ Show 20 Lines
0x07,0x00,0x40,0xe0,0x00,0x05,0x02,0x03 0x07,0x00,0x40,0xe0,0x00,0x05,0x02,0x03
# CHECK: buffer_load_ubyte v5, off, s[8:11], s3 offset:4095 glc ; encoding: [0xff,0x4f,0x40,0xe0,0x00,0x05,0x02,0x03] # CHECK: buffer_load_ubyte v5, off, s[8:11], s3 offset:4095 glc ; encoding: [0xff,0x4f,0x40,0xe0,0x00,0x05,0x02,0x03]
0xff,0x4f,0x40,0xe0,0x00,0x05,0x02,0x03 0xff,0x4f,0x40,0xe0,0x00,0x05,0x02,0x03
# CHECK: buffer_load_ubyte v5, off, s[8:11], s3 offset:4095 slc ; encoding: [0xff,0x0f,0x42,0xe0,0x00,0x05,0x02,0x03] # CHECK: buffer_load_ubyte v5, off, s[8:11], s3 offset:4095 slc ; encoding: [0xff,0x0f,0x42,0xe0,0x00,0x05,0x02,0x03]
0xff,0x0f,0x42,0xe0,0x00,0x05,0x02,0x03 0xff,0x0f,0x42,0xe0,0x00,0x05,0x02,0x03
# CHECK: buffer_load_ubyte v5, off, s[8:11], s3 offset:4095 lds ; encoding: [0xff,0x0f,0x41,0xe0,0x00,0x05,0x02,0x03] # CHECK: buffer_load_ubyte off, s[8:11], s3 offset:4095 lds ; encoding: [0xff,0x0f,0x41,0xe0,0x00,0x00,0x02,0x03]
0xff,0x0f,0x41,0xe0,0x00,0x05,0x02,0x03 0xff,0x0f,0x41,0xe0,0x00,0x00,0x02,0x03
# CHECK: buffer_load_sbyte v5, off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x44,0xe0,0x00,0x05,0x02,0x03] # CHECK: buffer_load_sbyte v5, off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x44,0xe0,0x00,0x05,0x02,0x03]
0xff,0x0f,0x44,0xe0,0x00,0x05,0x02,0x03 0xff,0x0f,0x44,0xe0,0x00,0x05,0x02,0x03
# CHECK: buffer_load_sbyte v255, off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x44,0xe0,0x00,0xff,0x02,0x03] # CHECK: buffer_load_sbyte v255, off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x44,0xe0,0x00,0xff,0x02,0x03]
0xff,0x0f,0x44,0xe0,0x00,0xff,0x02,0x03 0xff,0x0f,0x44,0xe0,0x00,0xff,0x02,0x03
# CHECK: buffer_load_sbyte v5, off, s[12:15], s3 offset:4095 ; encoding: [0xff,0x0f,0x44,0xe0,0x00,0x05,0x03,0x03] # CHECK: buffer_load_sbyte v5, off, s[12:15], s3 offset:4095 ; encoding: [0xff,0x0f,0x44,0xe0,0x00,0x05,0x03,0x03]
Show All 36 Lines
0x07,0x00,0x44,0xe0,0x00,0x05,0x02,0x03 0x07,0x00,0x44,0xe0,0x00,0x05,0x02,0x03
# CHECK: buffer_load_sbyte v5, off, s[8:11], s3 offset:4095 glc ; encoding: [0xff,0x4f,0x44,0xe0,0x00,0x05,0x02,0x03] # CHECK: buffer_load_sbyte v5, off, s[8:11], s3 offset:4095 glc ; encoding: [0xff,0x4f,0x44,0xe0,0x00,0x05,0x02,0x03]
0xff,0x4f,0x44,0xe0,0x00,0x05,0x02,0x03 0xff,0x4f,0x44,0xe0,0x00,0x05,0x02,0x03
# CHECK: buffer_load_sbyte v5, off, s[8:11], s3 offset:4095 slc ; encoding: [0xff,0x0f,0x46,0xe0,0x00,0x05,0x02,0x03] # CHECK: buffer_load_sbyte v5, off, s[8:11], s3 offset:4095 slc ; encoding: [0xff,0x0f,0x46,0xe0,0x00,0x05,0x02,0x03]
0xff,0x0f,0x46,0xe0,0x00,0x05,0x02,0x03 0xff,0x0f,0x46,0xe0,0x00,0x05,0x02,0x03
# CHECK: buffer_load_sbyte v5, off, s[8:11], s3 offset:4095 lds ; encoding: [0xff,0x0f,0x45,0xe0,0x00,0x05,0x02,0x03] # CHECK: buffer_load_sbyte off, s[8:11], s3 offset:4095 lds ; encoding: [0xff,0x0f,0x45,0xe0,0x00,0x00,0x02,0x03]
0xff,0x0f,0x45,0xe0,0x00,0x05,0x02,0x03 0xff,0x0f,0x45,0xe0,0x00,0x00,0x02,0x03
# CHECK: buffer_load_ushort v5, off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x48,0xe0,0x00,0x05,0x02,0x03] # CHECK: buffer_load_ushort v5, off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x48,0xe0,0x00,0x05,0x02,0x03]
0xff,0x0f,0x48,0xe0,0x00,0x05,0x02,0x03 0xff,0x0f,0x48,0xe0,0x00,0x05,0x02,0x03
# CHECK: buffer_load_ushort v255, off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x48,0xe0,0x00,0xff,0x02,0x03] # CHECK: buffer_load_ushort v255, off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x48,0xe0,0x00,0xff,0x02,0x03]
0xff,0x0f,0x48,0xe0,0x00,0xff,0x02,0x03 0xff,0x0f,0x48,0xe0,0x00,0xff,0x02,0x03
# CHECK: buffer_load_ushort v5, off, s[12:15], s3 offset:4095 ; encoding: [0xff,0x0f,0x48,0xe0,0x00,0x05,0x03,0x03] # CHECK: buffer_load_ushort v5, off, s[12:15], s3 offset:4095 ; encoding: [0xff,0x0f,0x48,0xe0,0x00,0x05,0x03,0x03]
Show All 36 Lines
0x07,0x00,0x48,0xe0,0x00,0x05,0x02,0x03 0x07,0x00,0x48,0xe0,0x00,0x05,0x02,0x03
# CHECK: buffer_load_ushort v5, off, s[8:11], s3 offset:4095 glc ; encoding: [0xff,0x4f,0x48,0xe0,0x00,0x05,0x02,0x03] # CHECK: buffer_load_ushort v5, off, s[8:11], s3 offset:4095 glc ; encoding: [0xff,0x4f,0x48,0xe0,0x00,0x05,0x02,0x03]
0xff,0x4f,0x48,0xe0,0x00,0x05,0x02,0x03 0xff,0x4f,0x48,0xe0,0x00,0x05,0x02,0x03
# CHECK: buffer_load_ushort v5, off, s[8:11], s3 offset:4095 slc ; encoding: [0xff,0x0f,0x4a,0xe0,0x00,0x05,0x02,0x03] # CHECK: buffer_load_ushort v5, off, s[8:11], s3 offset:4095 slc ; encoding: [0xff,0x0f,0x4a,0xe0,0x00,0x05,0x02,0x03]
0xff,0x0f,0x4a,0xe0,0x00,0x05,0x02,0x03 0xff,0x0f,0x4a,0xe0,0x00,0x05,0x02,0x03
# CHECK: buffer_load_ushort v5, off, s[8:11], s3 offset:4095 lds ; encoding: [0xff,0x0f,0x49,0xe0,0x00,0x05,0x02,0x03] # CHECK: buffer_load_ushort off, s[8:11], s3 offset:4095 lds ; encoding: [0xff,0x0f,0x49,0xe0,0x00,0x00,0x02,0x03]
0xff,0x0f,0x49,0xe0,0x00,0x05,0x02,0x03 0xff,0x0f,0x49,0xe0,0x00,0x00,0x02,0x03
# CHECK: buffer_load_sshort v5, off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x4c,0xe0,0x00,0x05,0x02,0x03] # CHECK: buffer_load_sshort v5, off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x4c,0xe0,0x00,0x05,0x02,0x03]
0xff,0x0f,0x4c,0xe0,0x00,0x05,0x02,0x03 0xff,0x0f,0x4c,0xe0,0x00,0x05,0x02,0x03
# CHECK: buffer_load_sshort v255, off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x4c,0xe0,0x00,0xff,0x02,0x03] # CHECK: buffer_load_sshort v255, off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x4c,0xe0,0x00,0xff,0x02,0x03]
0xff,0x0f,0x4c,0xe0,0x00,0xff,0x02,0x03 0xff,0x0f,0x4c,0xe0,0x00,0xff,0x02,0x03
# CHECK: buffer_load_sshort v5, off, s[12:15], s3 offset:4095 ; encoding: [0xff,0x0f,0x4c,0xe0,0x00,0x05,0x03,0x03] # CHECK: buffer_load_sshort v5, off, s[12:15], s3 offset:4095 ; encoding: [0xff,0x0f,0x4c,0xe0,0x00,0x05,0x03,0x03]
Show All 36 Lines
0x07,0x00,0x4c,0xe0,0x00,0x05,0x02,0x03 0x07,0x00,0x4c,0xe0,0x00,0x05,0x02,0x03
# CHECK: buffer_load_sshort v5, off, s[8:11], s3 offset:4095 glc ; encoding: [0xff,0x4f,0x4c,0xe0,0x00,0x05,0x02,0x03] # CHECK: buffer_load_sshort v5, off, s[8:11], s3 offset:4095 glc ; encoding: [0xff,0x4f,0x4c,0xe0,0x00,0x05,0x02,0x03]
0xff,0x4f,0x4c,0xe0,0x00,0x05,0x02,0x03 0xff,0x4f,0x4c,0xe0,0x00,0x05,0x02,0x03
# CHECK: buffer_load_sshort v5, off, s[8:11], s3 offset:4095 slc ; encoding: [0xff,0x0f,0x4e,0xe0,0x00,0x05,0x02,0x03] # CHECK: buffer_load_sshort v5, off, s[8:11], s3 offset:4095 slc ; encoding: [0xff,0x0f,0x4e,0xe0,0x00,0x05,0x02,0x03]
0xff,0x0f,0x4e,0xe0,0x00,0x05,0x02,0x03 0xff,0x0f,0x4e,0xe0,0x00,0x05,0x02,0x03
# CHECK: buffer_load_sshort v5, off, s[8:11], s3 offset:4095 lds ; encoding: [0xff,0x0f,0x4d,0xe0,0x00,0x05,0x02,0x03] # CHECK: buffer_load_sshort off, s[8:11], s3 offset:4095 lds ; encoding: [0xff,0x0f,0x4d,0xe0,0x00,0x00,0x02,0x03]
0xff,0x0f,0x4d,0xe0,0x00,0x05,0x02,0x03 0xff,0x0f,0x4d,0xe0,0x00,0x00,0x02,0x03
# CHECK: buffer_load_dword v5, off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x50,0xe0,0x00,0x05,0x02,0x03] # CHECK: buffer_load_dword v5, off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x50,0xe0,0x00,0x05,0x02,0x03]
0xff,0x0f,0x50,0xe0,0x00,0x05,0x02,0x03 0xff,0x0f,0x50,0xe0,0x00,0x05,0x02,0x03
# CHECK: buffer_load_dword v255, off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x50,0xe0,0x00,0xff,0x02,0x03] # CHECK: buffer_load_dword v255, off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x50,0xe0,0x00,0xff,0x02,0x03]
0xff,0x0f,0x50,0xe0,0x00,0xff,0x02,0x03 0xff,0x0f,0x50,0xe0,0x00,0xff,0x02,0x03
# CHECK: buffer_load_dword v5, off, s[12:15], s3 offset:4095 ; encoding: [0xff,0x0f,0x50,0xe0,0x00,0x05,0x03,0x03] # CHECK: buffer_load_dword v5, off, s[12:15], s3 offset:4095 ; encoding: [0xff,0x0f,0x50,0xe0,0x00,0x05,0x03,0x03]
Show All 36 Lines
0x07,0x00,0x50,0xe0,0x00,0x05,0x02,0x03 0x07,0x00,0x50,0xe0,0x00,0x05,0x02,0x03
# CHECK: buffer_load_dword v5, off, s[8:11], s3 offset:4095 glc ; encoding: [0xff,0x4f,0x50,0xe0,0x00,0x05,0x02,0x03] # CHECK: buffer_load_dword v5, off, s[8:11], s3 offset:4095 glc ; encoding: [0xff,0x4f,0x50,0xe0,0x00,0x05,0x02,0x03]
0xff,0x4f,0x50,0xe0,0x00,0x05,0x02,0x03 0xff,0x4f,0x50,0xe0,0x00,0x05,0x02,0x03
# CHECK: buffer_load_dword v5, off, s[8:11], s3 offset:4095 slc ; encoding: [0xff,0x0f,0x52,0xe0,0x00,0x05,0x02,0x03] # CHECK: buffer_load_dword v5, off, s[8:11], s3 offset:4095 slc ; encoding: [0xff,0x0f,0x52,0xe0,0x00,0x05,0x02,0x03]
0xff,0x0f,0x52,0xe0,0x00,0x05,0x02,0x03 0xff,0x0f,0x52,0xe0,0x00,0x05,0x02,0x03
# CHECK: buffer_load_dword v5, off, s[8:11], s3 offset:4095 lds ; encoding: [0xff,0x0f,0x51,0xe0,0x00,0x05,0x02,0x03] # CHECK: buffer_load_dword off, s[8:11], s3 offset:4095 lds ; encoding: [0xff,0x0f,0x51,0xe0,0x00,0x00,0x02,0x03]
0xff,0x0f,0x51,0xe0,0x00,0x05,0x02,0x03 0xff,0x0f,0x51,0xe0,0x00,0x00,0x02,0x03
# CHECK: buffer_load_dwordx2 v[5:6], off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x54,0xe0,0x00,0x05,0x02,0x03] # CHECK: buffer_load_dwordx2 v[5:6], off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x54,0xe0,0x00,0x05,0x02,0x03]
0xff,0x0f,0x54,0xe0,0x00,0x05,0x02,0x03 0xff,0x0f,0x54,0xe0,0x00,0x05,0x02,0x03
# CHECK: buffer_load_dwordx2 v[254:255], off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x54,0xe0,0x00,0xfe,0x02,0x03] # CHECK: buffer_load_dwordx2 v[254:255], off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x54,0xe0,0x00,0xfe,0x02,0x03]
0xff,0x0f,0x54,0xe0,0x00,0xfe,0x02,0x03 0xff,0x0f,0x54,0xe0,0x00,0xfe,0x02,0x03
# CHECK: buffer_load_dwordx2 v[5:6], off, s[12:15], s3 offset:4095 ; encoding: [0xff,0x0f,0x54,0xe0,0x00,0x05,0x03,0x03] # CHECK: buffer_load_dwordx2 v[5:6], off, s[12:15], s3 offset:4095 ; encoding: [0xff,0x0f,0x54,0xe0,0x00,0x05,0x03,0x03]
▲ Show 20 Lines • Show All 65,527 Lines • Show Last 20 Lines

llvm/test/MC/Disassembler/AMDGPU/gfx90a_ldst_acc.txt

Show First 20 Lines • Show All 2,007 Lines • ▼ Show 20 Lines
0x07,0x00,0x00,0xe0,0x00,0x05,0x82,0x03 0x07,0x00,0x00,0xe0,0x00,0x05,0x82,0x03
# GFX90A: buffer_load_format_x a5, off, s[8:11], s3 offset:4095 glc ; encoding: [0xff,0x4f,0x00,0xe0,0x00,0x05,0x82,0x03] # GFX90A: buffer_load_format_x a5, off, s[8:11], s3 offset:4095 glc ; encoding: [0xff,0x4f,0x00,0xe0,0x00,0x05,0x82,0x03]
0xff,0x4f,0x00,0xe0,0x00,0x05,0x82,0x03 0xff,0x4f,0x00,0xe0,0x00,0x05,0x82,0x03
# GFX90A: buffer_load_format_x a5, off, s[8:11], s3 offset:4095 slc ; encoding: [0xff,0x0f,0x02,0xe0,0x00,0x05,0x82,0x03] # GFX90A: buffer_load_format_x a5, off, s[8:11], s3 offset:4095 slc ; encoding: [0xff,0x0f,0x02,0xe0,0x00,0x05,0x82,0x03]
0xff,0x0f,0x02,0xe0,0x00,0x05,0x82,0x03 0xff,0x0f,0x02,0xe0,0x00,0x05,0x82,0x03
# GFX90A: buffer_load_format_x a5, off, s[8:11], s3 offset:4095 lds ; encoding: [0xff,0x0f,0x01,0xe0,0x00,0x05,0x82,0x03]
0xff,0x0f,0x01,0xe0,0x00,0x05,0x82,0x03
# GFX90A: buffer_load_format_xy a[6:7], off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x04,0xe0,0x00,0x06,0x82,0x03] # GFX90A: buffer_load_format_xy a[6:7], off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x04,0xe0,0x00,0x06,0x82,0x03]
0xff,0x0f,0x04,0xe0,0x00,0x06,0x82,0x03 0xff,0x0f,0x04,0xe0,0x00,0x06,0x82,0x03
# GFX90A: buffer_load_format_xy a[254:255], off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x04,0xe0,0x00,0xfe,0x82,0x03] # GFX90A: buffer_load_format_xy a[254:255], off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x04,0xe0,0x00,0xfe,0x82,0x03]
0xff,0x0f,0x04,0xe0,0x00,0xfe,0x82,0x03 0xff,0x0f,0x04,0xe0,0x00,0xfe,0x82,0x03
# GFX90A: buffer_load_format_xy a[6:7], off, s[12:15], s3 offset:4095 ; encoding: [0xff,0x0f,0x04,0xe0,0x00,0x06,0x83,0x03] # GFX90A: buffer_load_format_xy a[6:7], off, s[12:15], s3 offset:4095 ; encoding: [0xff,0x0f,0x04,0xe0,0x00,0x06,0x83,0x03]
0xff,0x0f,0x04,0xe0,0x00,0x06,0x83,0x03 0xff,0x0f,0x04,0xe0,0x00,0x06,0x83,0x03
▲ Show 20 Lines • Show All 800 Lines • ▼ Show 20 Lines
0x07,0x00,0x40,0xe0,0x00,0x05,0x82,0x03 0x07,0x00,0x40,0xe0,0x00,0x05,0x82,0x03
# GFX90A: buffer_load_ubyte a5, off, s[8:11], s3 offset:4095 glc ; encoding: [0xff,0x4f,0x40,0xe0,0x00,0x05,0x82,0x03] # GFX90A: buffer_load_ubyte a5, off, s[8:11], s3 offset:4095 glc ; encoding: [0xff,0x4f,0x40,0xe0,0x00,0x05,0x82,0x03]
0xff,0x4f,0x40,0xe0,0x00,0x05,0x82,0x03 0xff,0x4f,0x40,0xe0,0x00,0x05,0x82,0x03
# GFX90A: buffer_load_ubyte a5, off, s[8:11], s3 offset:4095 slc ; encoding: [0xff,0x0f,0x42,0xe0,0x00,0x05,0x82,0x03] # GFX90A: buffer_load_ubyte a5, off, s[8:11], s3 offset:4095 slc ; encoding: [0xff,0x0f,0x42,0xe0,0x00,0x05,0x82,0x03]
0xff,0x0f,0x42,0xe0,0x00,0x05,0x82,0x03 0xff,0x0f,0x42,0xe0,0x00,0x05,0x82,0x03
# GFX90A: buffer_load_ubyte a5, off, s[8:11], s3 offset:4095 lds ; encoding: [0xff,0x0f,0x41,0xe0,0x00,0x05,0x82,0x03]
0xff,0x0f,0x41,0xe0,0x00,0x05,0x82,0x03
# GFX90A: buffer_load_sbyte a5, off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x44,0xe0,0x00,0x05,0x82,0x03] # GFX90A: buffer_load_sbyte a5, off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x44,0xe0,0x00,0x05,0x82,0x03]
0xff,0x0f,0x44,0xe0,0x00,0x05,0x82,0x03 0xff,0x0f,0x44,0xe0,0x00,0x05,0x82,0x03
# GFX90A: buffer_load_sbyte a255, off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x44,0xe0,0x00,0xff,0x82,0x03] # GFX90A: buffer_load_sbyte a255, off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x44,0xe0,0x00,0xff,0x82,0x03]
0xff,0x0f,0x44,0xe0,0x00,0xff,0x82,0x03 0xff,0x0f,0x44,0xe0,0x00,0xff,0x82,0x03
# GFX90A: buffer_load_sbyte a5, off, s[12:15], s3 offset:4095 ; encoding: [0xff,0x0f,0x44,0xe0,0x00,0x05,0x83,0x03] # GFX90A: buffer_load_sbyte a5, off, s[12:15], s3 offset:4095 ; encoding: [0xff,0x0f,0x44,0xe0,0x00,0x05,0x83,0x03]
0xff,0x0f,0x44,0xe0,0x00,0x05,0x83,0x03 0xff,0x0f,0x44,0xe0,0x00,0x05,0x83,0x03
Show All 35 Lines
0x07,0x00,0x44,0xe0,0x00,0x05,0x82,0x03 0x07,0x00,0x44,0xe0,0x00,0x05,0x82,0x03
# GFX90A: buffer_load_sbyte a5, off, s[8:11], s3 offset:4095 glc ; encoding: [0xff,0x4f,0x44,0xe0,0x00,0x05,0x82,0x03] # GFX90A: buffer_load_sbyte a5, off, s[8:11], s3 offset:4095 glc ; encoding: [0xff,0x4f,0x44,0xe0,0x00,0x05,0x82,0x03]
0xff,0x4f,0x44,0xe0,0x00,0x05,0x82,0x03 0xff,0x4f,0x44,0xe0,0x00,0x05,0x82,0x03
# GFX90A: buffer_load_sbyte a5, off, s[8:11], s3 offset:4095 slc ; encoding: [0xff,0x0f,0x46,0xe0,0x00,0x05,0x82,0x03] # GFX90A: buffer_load_sbyte a5, off, s[8:11], s3 offset:4095 slc ; encoding: [0xff,0x0f,0x46,0xe0,0x00,0x05,0x82,0x03]
0xff,0x0f,0x46,0xe0,0x00,0x05,0x82,0x03 0xff,0x0f,0x46,0xe0,0x00,0x05,0x82,0x03
# GFX90A: buffer_load_sbyte a5, off, s[8:11], s3 offset:4095 lds ; encoding: [0xff,0x0f,0x45,0xe0,0x00,0x05,0x82,0x03]
0xff,0x0f,0x45,0xe0,0x00,0x05,0x82,0x03
# GFX90A: buffer_load_ushort a5, off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x48,0xe0,0x00,0x05,0x82,0x03] # GFX90A: buffer_load_ushort a5, off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x48,0xe0,0x00,0x05,0x82,0x03]
0xff,0x0f,0x48,0xe0,0x00,0x05,0x82,0x03 0xff,0x0f,0x48,0xe0,0x00,0x05,0x82,0x03
# GFX90A: buffer_load_ushort a255, off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x48,0xe0,0x00,0xff,0x82,0x03] # GFX90A: buffer_load_ushort a255, off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x48,0xe0,0x00,0xff,0x82,0x03]
0xff,0x0f,0x48,0xe0,0x00,0xff,0x82,0x03 0xff,0x0f,0x48,0xe0,0x00,0xff,0x82,0x03
# GFX90A: buffer_load_ushort a5, off, s[12:15], s3 offset:4095 ; encoding: [0xff,0x0f,0x48,0xe0,0x00,0x05,0x83,0x03] # GFX90A: buffer_load_ushort a5, off, s[12:15], s3 offset:4095 ; encoding: [0xff,0x0f,0x48,0xe0,0x00,0x05,0x83,0x03]
0xff,0x0f,0x48,0xe0,0x00,0x05,0x83,0x03 0xff,0x0f,0x48,0xe0,0x00,0x05,0x83,0x03
Show All 35 Lines
0x07,0x00,0x48,0xe0,0x00,0x05,0x82,0x03 0x07,0x00,0x48,0xe0,0x00,0x05,0x82,0x03
# GFX90A: buffer_load_ushort a5, off, s[8:11], s3 offset:4095 glc ; encoding: [0xff,0x4f,0x48,0xe0,0x00,0x05,0x82,0x03] # GFX90A: buffer_load_ushort a5, off, s[8:11], s3 offset:4095 glc ; encoding: [0xff,0x4f,0x48,0xe0,0x00,0x05,0x82,0x03]
0xff,0x4f,0x48,0xe0,0x00,0x05,0x82,0x03 0xff,0x4f,0x48,0xe0,0x00,0x05,0x82,0x03
# GFX90A: buffer_load_ushort a5, off, s[8:11], s3 offset:4095 slc ; encoding: [0xff,0x0f,0x4a,0xe0,0x00,0x05,0x82,0x03] # GFX90A: buffer_load_ushort a5, off, s[8:11], s3 offset:4095 slc ; encoding: [0xff,0x0f,0x4a,0xe0,0x00,0x05,0x82,0x03]
0xff,0x0f,0x4a,0xe0,0x00,0x05,0x82,0x03 0xff,0x0f,0x4a,0xe0,0x00,0x05,0x82,0x03
# GFX90A: buffer_load_ushort a5, off, s[8:11], s3 offset:4095 lds ; encoding: [0xff,0x0f,0x49,0xe0,0x00,0x05,0x82,0x03]
0xff,0x0f,0x49,0xe0,0x00,0x05,0x82,0x03
# GFX90A: buffer_load_sshort a5, off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x4c,0xe0,0x00,0x05,0x82,0x03] # GFX90A: buffer_load_sshort a5, off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x4c,0xe0,0x00,0x05,0x82,0x03]
0xff,0x0f,0x4c,0xe0,0x00,0x05,0x82,0x03 0xff,0x0f,0x4c,0xe0,0x00,0x05,0x82,0x03
# GFX90A: buffer_load_sshort a255, off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x4c,0xe0,0x00,0xff,0x82,0x03] # GFX90A: buffer_load_sshort a255, off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x4c,0xe0,0x00,0xff,0x82,0x03]
0xff,0x0f,0x4c,0xe0,0x00,0xff,0x82,0x03 0xff,0x0f,0x4c,0xe0,0x00,0xff,0x82,0x03
# GFX90A: buffer_load_sshort a5, off, s[12:15], s3 offset:4095 ; encoding: [0xff,0x0f,0x4c,0xe0,0x00,0x05,0x83,0x03] # GFX90A: buffer_load_sshort a5, off, s[12:15], s3 offset:4095 ; encoding: [0xff,0x0f,0x4c,0xe0,0x00,0x05,0x83,0x03]
0xff,0x0f,0x4c,0xe0,0x00,0x05,0x83,0x03 0xff,0x0f,0x4c,0xe0,0x00,0x05,0x83,0x03
Show All 35 Lines
0x07,0x00,0x4c,0xe0,0x00,0x05,0x82,0x03 0x07,0x00,0x4c,0xe0,0x00,0x05,0x82,0x03
# GFX90A: buffer_load_sshort a5, off, s[8:11], s3 offset:4095 glc ; encoding: [0xff,0x4f,0x4c,0xe0,0x00,0x05,0x82,0x03] # GFX90A: buffer_load_sshort a5, off, s[8:11], s3 offset:4095 glc ; encoding: [0xff,0x4f,0x4c,0xe0,0x00,0x05,0x82,0x03]
0xff,0x4f,0x4c,0xe0,0x00,0x05,0x82,0x03 0xff,0x4f,0x4c,0xe0,0x00,0x05,0x82,0x03
# GFX90A: buffer_load_sshort a5, off, s[8:11], s3 offset:4095 slc ; encoding: [0xff,0x0f,0x4e,0xe0,0x00,0x05,0x82,0x03] # GFX90A: buffer_load_sshort a5, off, s[8:11], s3 offset:4095 slc ; encoding: [0xff,0x0f,0x4e,0xe0,0x00,0x05,0x82,0x03]
0xff,0x0f,0x4e,0xe0,0x00,0x05,0x82,0x03 0xff,0x0f,0x4e,0xe0,0x00,0x05,0x82,0x03
# GFX90A: buffer_load_sshort a5, off, s[8:11], s3 offset:4095 lds ; encoding: [0xff,0x0f,0x4d,0xe0,0x00,0x05,0x82,0x03]
0xff,0x0f,0x4d,0xe0,0x00,0x05,0x82,0x03
# GFX90A: buffer_load_dword a5, off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x50,0xe0,0x00,0x05,0x82,0x03] # GFX90A: buffer_load_dword a5, off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x50,0xe0,0x00,0x05,0x82,0x03]
0xff,0x0f,0x50,0xe0,0x00,0x05,0x82,0x03 0xff,0x0f,0x50,0xe0,0x00,0x05,0x82,0x03
# GFX90A: buffer_load_dword a255, off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x50,0xe0,0x00,0xff,0x82,0x03] # GFX90A: buffer_load_dword a255, off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x50,0xe0,0x00,0xff,0x82,0x03]
0xff,0x0f,0x50,0xe0,0x00,0xff,0x82,0x03 0xff,0x0f,0x50,0xe0,0x00,0xff,0x82,0x03
# GFX90A: buffer_load_dword a5, off, s[12:15], s3 offset:4095 ; encoding: [0xff,0x0f,0x50,0xe0,0x00,0x05,0x83,0x03] # GFX90A: buffer_load_dword a5, off, s[12:15], s3 offset:4095 ; encoding: [0xff,0x0f,0x50,0xe0,0x00,0x05,0x83,0x03]
0xff,0x0f,0x50,0xe0,0x00,0x05,0x83,0x03 0xff,0x0f,0x50,0xe0,0x00,0x05,0x83,0x03
Show All 35 Lines
0x07,0x00,0x50,0xe0,0x00,0x05,0x82,0x03 0x07,0x00,0x50,0xe0,0x00,0x05,0x82,0x03
# GFX90A: buffer_load_dword a5, off, s[8:11], s3 offset:4095 glc ; encoding: [0xff,0x4f,0x50,0xe0,0x00,0x05,0x82,0x03] # GFX90A: buffer_load_dword a5, off, s[8:11], s3 offset:4095 glc ; encoding: [0xff,0x4f,0x50,0xe0,0x00,0x05,0x82,0x03]
0xff,0x4f,0x50,0xe0,0x00,0x05,0x82,0x03 0xff,0x4f,0x50,0xe0,0x00,0x05,0x82,0x03
# GFX90A: buffer_load_dword a5, off, s[8:11], s3 offset:4095 slc ; encoding: [0xff,0x0f,0x52,0xe0,0x00,0x05,0x82,0x03] # GFX90A: buffer_load_dword a5, off, s[8:11], s3 offset:4095 slc ; encoding: [0xff,0x0f,0x52,0xe0,0x00,0x05,0x82,0x03]
0xff,0x0f,0x52,0xe0,0x00,0x05,0x82,0x03 0xff,0x0f,0x52,0xe0,0x00,0x05,0x82,0x03
# GFX90A: buffer_load_dword a5, off, s[8:11], s3 offset:4095 lds ; encoding: [0xff,0x0f,0x51,0xe0,0x00,0x05,0x82,0x03]
0xff,0x0f,0x51,0xe0,0x00,0x05,0x82,0x03
# GFX90A: buffer_load_dwordx2 a[6:7], off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x54,0xe0,0x00,0x06,0x82,0x03] # GFX90A: buffer_load_dwordx2 a[6:7], off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x54,0xe0,0x00,0x06,0x82,0x03]
0xff,0x0f,0x54,0xe0,0x00,0x06,0x82,0x03 0xff,0x0f,0x54,0xe0,0x00,0x06,0x82,0x03
# GFX90A: buffer_load_dwordx2 a[254:255], off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x54,0xe0,0x00,0xfe,0x82,0x03] # GFX90A: buffer_load_dwordx2 a[254:255], off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x54,0xe0,0x00,0xfe,0x82,0x03]
0xff,0x0f,0x54,0xe0,0x00,0xfe,0x82,0x03 0xff,0x0f,0x54,0xe0,0x00,0xfe,0x82,0x03
# GFX90A: buffer_load_dwordx2 a[6:7], off, s[12:15], s3 offset:4095 ; encoding: [0xff,0x0f,0x54,0xe0,0x00,0x06,0x83,0x03] # GFX90A: buffer_load_dwordx2 a[6:7], off, s[12:15], s3 offset:4095 ; encoding: [0xff,0x0f,0x54,0xe0,0x00,0x06,0x83,0x03]
0xff,0x0f,0x54,0xe0,0x00,0x06,0x83,0x03 0xff,0x0f,0x54,0xe0,0x00,0x06,0x83,0x03
▲ Show 20 Lines • Show All 5,316 Lines • Show Last 20 Lines

llvm/test/MC/Disassembler/AMDGPU/gfx9_dasm_all.txt

Show First 20 Lines • Show All 6,969 Lines • ▼ Show 20 Lines
0x07,0x00,0x00,0xe0,0x00,0x05,0x02,0x03 0x07,0x00,0x00,0xe0,0x00,0x05,0x02,0x03
# CHECK: buffer_load_format_x v5, off, s[8:11], s3 offset:4095 glc ; encoding: [0xff,0x4f,0x00,0xe0,0x00,0x05,0x02,0x03] # CHECK: buffer_load_format_x v5, off, s[8:11], s3 offset:4095 glc ; encoding: [0xff,0x4f,0x00,0xe0,0x00,0x05,0x02,0x03]
0xff,0x4f,0x00,0xe0,0x00,0x05,0x02,0x03 0xff,0x4f,0x00,0xe0,0x00,0x05,0x02,0x03
# CHECK: buffer_load_format_x v5, off, s[8:11], s3 offset:4095 slc ; encoding: [0xff,0x0f,0x02,0xe0,0x00,0x05,0x02,0x03] # CHECK: buffer_load_format_x v5, off, s[8:11], s3 offset:4095 slc ; encoding: [0xff,0x0f,0x02,0xe0,0x00,0x05,0x02,0x03]
0xff,0x0f,0x02,0xe0,0x00,0x05,0x02,0x03 0xff,0x0f,0x02,0xe0,0x00,0x05,0x02,0x03
# CHECK: buffer_load_format_x v5, off, s[8:11], s3 offset:4095 lds ; encoding: [0xff,0x0f,0x01,0xe0,0x00,0x05,0x02,0x03] # CHECK: buffer_load_format_x off, s[8:11], s3 offset:4095 lds ; encoding: [0xff,0x0f,0x01,0xe0,0x00,0x00,0x02,0x03]
0xff,0x0f,0x01,0xe0,0x00,0x05,0x02,0x03 0xff,0x0f,0x01,0xe0,0x00,0x00,0x02,0x03
# CHECK: buffer_load_format_xy v[5:6], off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x04,0xe0,0x00,0x05,0x02,0x03] # CHECK: buffer_load_format_xy v[5:6], off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x04,0xe0,0x00,0x05,0x02,0x03]
0xff,0x0f,0x04,0xe0,0x00,0x05,0x02,0x03 0xff,0x0f,0x04,0xe0,0x00,0x05,0x02,0x03
# CHECK: buffer_load_format_xy v[254:255], off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x04,0xe0,0x00,0xfe,0x02,0x03] # CHECK: buffer_load_format_xy v[254:255], off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x04,0xe0,0x00,0xfe,0x02,0x03]
0xff,0x0f,0x04,0xe0,0x00,0xfe,0x02,0x03 0xff,0x0f,0x04,0xe0,0x00,0xfe,0x02,0x03
# CHECK: buffer_load_format_xy v[5:6], off, s[12:15], s3 offset:4095 ; encoding: [0xff,0x0f,0x04,0xe0,0x00,0x05,0x03,0x03] # CHECK: buffer_load_format_xy v[5:6], off, s[12:15], s3 offset:4095 ; encoding: [0xff,0x0f,0x04,0xe0,0x00,0x05,0x03,0x03]
▲ Show 20 Lines • Show All 753 Lines • ▼ Show 20 Lines
0x07,0x00,0x40,0xe0,0x00,0x05,0x02,0x03 0x07,0x00,0x40,0xe0,0x00,0x05,0x02,0x03
# CHECK: buffer_load_ubyte v5, off, s[8:11], s3 offset:4095 glc ; encoding: [0xff,0x4f,0x40,0xe0,0x00,0x05,0x02,0x03] # CHECK: buffer_load_ubyte v5, off, s[8:11], s3 offset:4095 glc ; encoding: [0xff,0x4f,0x40,0xe0,0x00,0x05,0x02,0x03]
0xff,0x4f,0x40,0xe0,0x00,0x05,0x02,0x03 0xff,0x4f,0x40,0xe0,0x00,0x05,0x02,0x03
# CHECK: buffer_load_ubyte v5, off, s[8:11], s3 offset:4095 slc ; encoding: [0xff,0x0f,0x42,0xe0,0x00,0x05,0x02,0x03] # CHECK: buffer_load_ubyte v5, off, s[8:11], s3 offset:4095 slc ; encoding: [0xff,0x0f,0x42,0xe0,0x00,0x05,0x02,0x03]
0xff,0x0f,0x42,0xe0,0x00,0x05,0x02,0x03 0xff,0x0f,0x42,0xe0,0x00,0x05,0x02,0x03
# CHECK: buffer_load_ubyte v5, off, s[8:11], s3 offset:4095 lds ; encoding: [0xff,0x0f,0x41,0xe0,0x00,0x05,0x02,0x03] # CHECK: buffer_load_ubyte off, s[8:11], s3 offset:4095 lds ; encoding: [0xff,0x0f,0x41,0xe0,0x00,0x00,0x02,0x03]
0xff,0x0f,0x41,0xe0,0x00,0x05,0x02,0x03 0xff,0x0f,0x41,0xe0,0x00,0x00,0x02,0x03
# CHECK: buffer_load_sbyte v5, off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x44,0xe0,0x00,0x05,0x02,0x03] # CHECK: buffer_load_sbyte v5, off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x44,0xe0,0x00,0x05,0x02,0x03]
0xff,0x0f,0x44,0xe0,0x00,0x05,0x02,0x03 0xff,0x0f,0x44,0xe0,0x00,0x05,0x02,0x03
# CHECK: buffer_load_sbyte v255, off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x44,0xe0,0x00,0xff,0x02,0x03] # CHECK: buffer_load_sbyte v255, off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x44,0xe0,0x00,0xff,0x02,0x03]
0xff,0x0f,0x44,0xe0,0x00,0xff,0x02,0x03 0xff,0x0f,0x44,0xe0,0x00,0xff,0x02,0x03
# CHECK: buffer_load_sbyte v5, off, s[12:15], s3 offset:4095 ; encoding: [0xff,0x0f,0x44,0xe0,0x00,0x05,0x03,0x03] # CHECK: buffer_load_sbyte v5, off, s[12:15], s3 offset:4095 ; encoding: [0xff,0x0f,0x44,0xe0,0x00,0x05,0x03,0x03]
Show All 33 Lines
0x07,0x00,0x44,0xe0,0x00,0x05,0x02,0x03 0x07,0x00,0x44,0xe0,0x00,0x05,0x02,0x03
# CHECK: buffer_load_sbyte v5, off, s[8:11], s3 offset:4095 glc ; encoding: [0xff,0x4f,0x44,0xe0,0x00,0x05,0x02,0x03] # CHECK: buffer_load_sbyte v5, off, s[8:11], s3 offset:4095 glc ; encoding: [0xff,0x4f,0x44,0xe0,0x00,0x05,0x02,0x03]
0xff,0x4f,0x44,0xe0,0x00,0x05,0x02,0x03 0xff,0x4f,0x44,0xe0,0x00,0x05,0x02,0x03
# CHECK: buffer_load_sbyte v5, off, s[8:11], s3 offset:4095 slc ; encoding: [0xff,0x0f,0x46,0xe0,0x00,0x05,0x02,0x03] # CHECK: buffer_load_sbyte v5, off, s[8:11], s3 offset:4095 slc ; encoding: [0xff,0x0f,0x46,0xe0,0x00,0x05,0x02,0x03]
0xff,0x0f,0x46,0xe0,0x00,0x05,0x02,0x03 0xff,0x0f,0x46,0xe0,0x00,0x05,0x02,0x03
# CHECK: buffer_load_sbyte v5, off, s[8:11], s3 offset:4095 lds ; encoding: [0xff,0x0f,0x45,0xe0,0x00,0x05,0x02,0x03] # CHECK: buffer_load_sbyte off, s[8:11], s3 offset:4095 lds ; encoding: [0xff,0x0f,0x45,0xe0,0x00,0x00,0x02,0x03]
0xff,0x0f,0x45,0xe0,0x00,0x05,0x02,0x03 0xff,0x0f,0x45,0xe0,0x00,0x00,0x02,0x03
# CHECK: buffer_load_ushort v5, off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x48,0xe0,0x00,0x05,0x02,0x03] # CHECK: buffer_load_ushort v5, off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x48,0xe0,0x00,0x05,0x02,0x03]
0xff,0x0f,0x48,0xe0,0x00,0x05,0x02,0x03 0xff,0x0f,0x48,0xe0,0x00,0x05,0x02,0x03
# CHECK: buffer_load_ushort v255, off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x48,0xe0,0x00,0xff,0x02,0x03] # CHECK: buffer_load_ushort v255, off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x48,0xe0,0x00,0xff,0x02,0x03]
0xff,0x0f,0x48,0xe0,0x00,0xff,0x02,0x03 0xff,0x0f,0x48,0xe0,0x00,0xff,0x02,0x03
# CHECK: buffer_load_ushort v5, off, s[12:15], s3 offset:4095 ; encoding: [0xff,0x0f,0x48,0xe0,0x00,0x05,0x03,0x03] # CHECK: buffer_load_ushort v5, off, s[12:15], s3 offset:4095 ; encoding: [0xff,0x0f,0x48,0xe0,0x00,0x05,0x03,0x03]
Show All 33 Lines
0x07,0x00,0x48,0xe0,0x00,0x05,0x02,0x03 0x07,0x00,0x48,0xe0,0x00,0x05,0x02,0x03
# CHECK: buffer_load_ushort v5, off, s[8:11], s3 offset:4095 glc ; encoding: [0xff,0x4f,0x48,0xe0,0x00,0x05,0x02,0x03] # CHECK: buffer_load_ushort v5, off, s[8:11], s3 offset:4095 glc ; encoding: [0xff,0x4f,0x48,0xe0,0x00,0x05,0x02,0x03]
0xff,0x4f,0x48,0xe0,0x00,0x05,0x02,0x03 0xff,0x4f,0x48,0xe0,0x00,0x05,0x02,0x03
# CHECK: buffer_load_ushort v5, off, s[8:11], s3 offset:4095 slc ; encoding: [0xff,0x0f,0x4a,0xe0,0x00,0x05,0x02,0x03] # CHECK: buffer_load_ushort v5, off, s[8:11], s3 offset:4095 slc ; encoding: [0xff,0x0f,0x4a,0xe0,0x00,0x05,0x02,0x03]
0xff,0x0f,0x4a,0xe0,0x00,0x05,0x02,0x03 0xff,0x0f,0x4a,0xe0,0x00,0x05,0x02,0x03
# CHECK: buffer_load_ushort v5, off, s[8:11], s3 offset:4095 lds ; encoding: [0xff,0x0f,0x49,0xe0,0x00,0x05,0x02,0x03] # CHECK: buffer_load_ushort off, s[8:11], s3 offset:4095 lds ; encoding: [0xff,0x0f,0x49,0xe0,0x00,0x00,0x02,0x03]
0xff,0x0f,0x49,0xe0,0x00,0x05,0x02,0x03 0xff,0x0f,0x49,0xe0,0x00,0x00,0x02,0x03
# CHECK: buffer_load_sshort v5, off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x4c,0xe0,0x00,0x05,0x02,0x03] # CHECK: buffer_load_sshort v5, off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x4c,0xe0,0x00,0x05,0x02,0x03]
0xff,0x0f,0x4c,0xe0,0x00,0x05,0x02,0x03 0xff,0x0f,0x4c,0xe0,0x00,0x05,0x02,0x03
# CHECK: buffer_load_sshort v255, off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x4c,0xe0,0x00,0xff,0x02,0x03] # CHECK: buffer_load_sshort v255, off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x4c,0xe0,0x00,0xff,0x02,0x03]
0xff,0x0f,0x4c,0xe0,0x00,0xff,0x02,0x03 0xff,0x0f,0x4c,0xe0,0x00,0xff,0x02,0x03
# CHECK: buffer_load_sshort v5, off, s[12:15], s3 offset:4095 ; encoding: [0xff,0x0f,0x4c,0xe0,0x00,0x05,0x03,0x03] # CHECK: buffer_load_sshort v5, off, s[12:15], s3 offset:4095 ; encoding: [0xff,0x0f,0x4c,0xe0,0x00,0x05,0x03,0x03]
Show All 33 Lines
0x07,0x00,0x4c,0xe0,0x00,0x05,0x02,0x03 0x07,0x00,0x4c,0xe0,0x00,0x05,0x02,0x03
# CHECK: buffer_load_sshort v5, off, s[8:11], s3 offset:4095 glc ; encoding: [0xff,0x4f,0x4c,0xe0,0x00,0x05,0x02,0x03] # CHECK: buffer_load_sshort v5, off, s[8:11], s3 offset:4095 glc ; encoding: [0xff,0x4f,0x4c,0xe0,0x00,0x05,0x02,0x03]
0xff,0x4f,0x4c,0xe0,0x00,0x05,0x02,0x03 0xff,0x4f,0x4c,0xe0,0x00,0x05,0x02,0x03
# CHECK: buffer_load_sshort v5, off, s[8:11], s3 offset:4095 slc ; encoding: [0xff,0x0f,0x4e,0xe0,0x00,0x05,0x02,0x03] # CHECK: buffer_load_sshort v5, off, s[8:11], s3 offset:4095 slc ; encoding: [0xff,0x0f,0x4e,0xe0,0x00,0x05,0x02,0x03]
0xff,0x0f,0x4e,0xe0,0x00,0x05,0x02,0x03 0xff,0x0f,0x4e,0xe0,0x00,0x05,0x02,0x03
# CHECK: buffer_load_sshort v5, off, s[8:11], s3 offset:4095 lds ; encoding: [0xff,0x0f,0x4d,0xe0,0x00,0x05,0x02,0x03] # CHECK: buffer_load_sshort off, s[8:11], s3 offset:4095 lds ; encoding: [0xff,0x0f,0x4d,0xe0,0x00,0x00,0x02,0x03]
0xff,0x0f,0x4d,0xe0,0x00,0x05,0x02,0x03 0xff,0x0f,0x4d,0xe0,0x00,0x00,0x02,0x03
# CHECK: buffer_load_dword v5, off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x50,0xe0,0x00,0x05,0x02,0x03] # CHECK: buffer_load_dword v5, off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x50,0xe0,0x00,0x05,0x02,0x03]
0xff,0x0f,0x50,0xe0,0x00,0x05,0x02,0x03 0xff,0x0f,0x50,0xe0,0x00,0x05,0x02,0x03
# CHECK: buffer_load_dword v255, off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x50,0xe0,0x00,0xff,0x02,0x03] # CHECK: buffer_load_dword v255, off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x50,0xe0,0x00,0xff,0x02,0x03]
0xff,0x0f,0x50,0xe0,0x00,0xff,0x02,0x03 0xff,0x0f,0x50,0xe0,0x00,0xff,0x02,0x03
# CHECK: buffer_load_dword v5, off, s[12:15], s3 offset:4095 ; encoding: [0xff,0x0f,0x50,0xe0,0x00,0x05,0x03,0x03] # CHECK: buffer_load_dword v5, off, s[12:15], s3 offset:4095 ; encoding: [0xff,0x0f,0x50,0xe0,0x00,0x05,0x03,0x03]
Show All 33 Lines
0x07,0x00,0x50,0xe0,0x00,0x05,0x02,0x03 0x07,0x00,0x50,0xe0,0x00,0x05,0x02,0x03
# CHECK: buffer_load_dword v5, off, s[8:11], s3 offset:4095 glc ; encoding: [0xff,0x4f,0x50,0xe0,0x00,0x05,0x02,0x03] # CHECK: buffer_load_dword v5, off, s[8:11], s3 offset:4095 glc ; encoding: [0xff,0x4f,0x50,0xe0,0x00,0x05,0x02,0x03]
0xff,0x4f,0x50,0xe0,0x00,0x05,0x02,0x03 0xff,0x4f,0x50,0xe0,0x00,0x05,0x02,0x03
# CHECK: buffer_load_dword v5, off, s[8:11], s3 offset:4095 slc ; encoding: [0xff,0x0f,0x52,0xe0,0x00,0x05,0x02,0x03] # CHECK: buffer_load_dword v5, off, s[8:11], s3 offset:4095 slc ; encoding: [0xff,0x0f,0x52,0xe0,0x00,0x05,0x02,0x03]
0xff,0x0f,0x52,0xe0,0x00,0x05,0x02,0x03 0xff,0x0f,0x52,0xe0,0x00,0x05,0x02,0x03
# CHECK: buffer_load_dword v5, off, s[8:11], s3 offset:4095 lds ; encoding: [0xff,0x0f,0x51,0xe0,0x00,0x05,0x02,0x03] # CHECK: buffer_load_dword off, s[8:11], s3 offset:4095 lds ; encoding: [0xff,0x0f,0x51,0xe0,0x00,0x00,0x02,0x03]
0xff,0x0f,0x51,0xe0,0x00,0x05,0x02,0x03 0xff,0x0f,0x51,0xe0,0x00,0x00,0x02,0x03
# CHECK: buffer_load_dwordx2 v[5:6], off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x54,0xe0,0x00,0x05,0x02,0x03] # CHECK: buffer_load_dwordx2 v[5:6], off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x54,0xe0,0x00,0x05,0x02,0x03]
0xff,0x0f,0x54,0xe0,0x00,0x05,0x02,0x03 0xff,0x0f,0x54,0xe0,0x00,0x05,0x02,0x03
# CHECK: buffer_load_dwordx2 v[254:255], off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x54,0xe0,0x00,0xfe,0x02,0x03] # CHECK: buffer_load_dwordx2 v[254:255], off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x54,0xe0,0x00,0xfe,0x02,0x03]
0xff,0x0f,0x54,0xe0,0x00,0xfe,0x02,0x03 0xff,0x0f,0x54,0xe0,0x00,0xfe,0x02,0x03
# CHECK: buffer_load_dwordx2 v[5:6], off, s[12:15], s3 offset:4095 ; encoding: [0xff,0x0f,0x54,0xe0,0x00,0x05,0x03,0x03] # CHECK: buffer_load_dwordx2 v[5:6], off, s[12:15], s3 offset:4095 ; encoding: [0xff,0x0f,0x54,0xe0,0x00,0x05,0x03,0x03]
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llvm/test/MC/Disassembler/AMDGPU/mubuf_vi.txt

Show First 20 Lines • Show All 358 Lines • ▼ Show 20 Lines
# VI: buffer_atomic_inc v1, v[2:3], s[8:11], 56 idxen offen offset:4 glc slc ; encoding: [0x04,0x70,0x2e,0xe1,0x02,0x01,0x02,0xb8] # VI: buffer_atomic_inc v1, v[2:3], s[8:11], 56 idxen offen offset:4 glc slc ; encoding: [0x04,0x70,0x2e,0xe1,0x02,0x01,0x02,0xb8]
0x04 0x70 0x2e 0xe1 0x02 0x01 0x02 0xb8 0x04 0x70 0x2e 0xe1 0x02 0x01 0x02 0xb8
#===------------------------------------------------------------------------===# #===------------------------------------------------------------------------===#
# Lds support # Lds support
#===------------------------------------------------------------------------===# #===------------------------------------------------------------------------===#
# VI: buffer_load_sbyte v5, off, s[8:11], s3 lds ; encoding: [0x00,0x00,0x45,0xe0,0x00,0x05,0x02,0x03] # VI: buffer_load_sbyte off, s[8:11], s3 lds ; encoding: [0x00,0x00,0x45,0xe0,0x00,0x00,0x02,0x03]
0x00,0x00,0x45,0xe0,0x00,0x00,0x02,0x03
# VI: buffer_load_sbyte off, s[8:11], s3 lds ; encoding: [0x00,0x00,0x45,0xe0,0x00,0x00,0x02,0x03]
0x00,0x00,0x45,0xe0,0x00,0x05,0x02,0x03 0x00,0x00,0x45,0xe0,0x00,0x05,0x02,0x03
# VI: buffer_load_sbyte v5, off, s[8:11], s3 glc slc lds ; encoding: [0x00,0x40,0x47,0xe0,0x00,0x05,0x02,0x03] # VI: buffer_load_sbyte off, s[8:11], s3 glc slc lds ; encoding: [0x00,0x40,0x47,0xe0,0x00,0x00,0x02,0x03]
0x00,0x40,0x47,0xe0,0x00,0x05,0x02,0x03 0x00,0x40,0x47,0xe0,0x00,0x00,0x02,0x03
# VI: buffer_load_sbyte v5, off, s[8:11], s3 offset:4095 glc slc lds ; encoding: [0xff,0x4f,0x47,0xe0,0x00,0x05,0x02,0x03] # VI: buffer_load_sbyte off, s[8:11], s3 offset:4095 glc slc lds ; encoding: [0xff,0x4f,0x47,0xe0,0x00,0x00,0x02,0x03]
0xff,0x4f,0x47,0xe0,0x00,0x05,0x02,0x03 0xff,0x4f,0x47,0xe0,0x00,0x00,0x02,0x03
# VI: buffer_load_sbyte v5, v0, s[8:11], s3 offen offset:4095 slc lds ; encoding: [0xff,0x1f,0x47,0xe0,0x00,0x05,0x02,0x03] # VI: buffer_load_sbyte v0, s[8:11], s3 offen offset:4095 slc lds ; encoding: [0xff,0x1f,0x47,0xe0,0x00,0x00,0x02,0x03]
0xff,0x1f,0x47,0xe0,0x00,0x05,0x02,0x03 0xff,0x1f,0x47,0xe0,0x00,0x00,0x02,0x03
# VI: buffer_load_sbyte v5, v0, s[8:11], s3 offen lds ; encoding: [0x00,0x10,0x45,0xe0,0x00,0x05,0x02,0x03] # VI: buffer_load_sbyte v0, s[8:11], s3 offen lds ; encoding: [0x00,0x10,0x45,0xe0,0x00,0x00,0x02,0x03]
0x00,0x10,0x45,0xe0,0x00,0x05,0x02,0x03 0x00,0x10,0x45,0xe0,0x00,0x00,0x02,0x03
# VI: buffer_load_sbyte v5, v0, s[8:11], s3 idxen glc slc lds ; encoding: [0x00,0x60,0x47,0xe0,0x00,0x05,0x02,0x03] # VI: buffer_load_sbyte v0, s[8:11], s3 idxen glc slc lds ; encoding: [0x00,0x60,0x47,0xe0,0x00,0x00,0x02,0x03]
0x00,0x60,0x47,0xe0,0x00,0x05,0x02,0x03 0x00,0x60,0x47,0xe0,0x00,0x00,0x02,0x03
# VI: buffer_load_sbyte v5, v[0:1], s[8:11], s3 idxen offen offset:4095 lds ; encoding: [0xff,0x3f,0x45,0xe0,0x00,0x05,0x02,0x03] # VI: buffer_load_sbyte v[0:1], s[8:11], s3 idxen offen offset:4095 lds ; encoding: [0xff,0x3f,0x45,0xe0,0x00,0x00,0x02,0x03]
0xff,0x3f,0x45,0xe0,0x00,0x05,0x02,0x03 0xff,0x3f,0x45,0xe0,0x00,0x00,0x02,0x03
# VI: buffer_load_sbyte v5, v[0:1], s[8:11], s3 idxen offen offset:4095 glc slc lds ; encoding: [0xff,0x7f,0x47,0xe0,0x00,0x05,0x02,0x03] # VI: buffer_load_sbyte v[0:1], s[8:11], s3 idxen offen offset:4095 glc slc lds ; encoding: [0xff,0x7f,0x47,0xe0,0x00,0x00,0x02,0x03]
0xff,0x7f,0x47,0xe0,0x00,0x05,0x02,0x03 0xff,0x7f,0x47,0xe0,0x00,0x00,0x02,0x03
# VI: buffer_load_ubyte v5, off, s[8:11], s3 offset:4095 lds ; encoding: [0xff,0x0f,0x41,0xe0,0x00,0x05,0x02,0x03] # VI: buffer_load_ubyte off, s[8:11], s3 offset:4095 lds ; encoding: [0xff,0x0f,0x41,0xe0,0x00,0x00,0x02,0x03]
0xff,0x0f,0x41,0xe0,0x00,0x05,0x02,0x03 0xff,0x0f,0x41,0xe0,0x00,0x00,0x02,0x03
# VI: buffer_load_sshort v5, v0, s[8:11], s3 offen offset:4095 glc slc lds ; encoding: [0xff,0x5f,0x4f,0xe0,0x00,0x05,0x02,0x03] # VI: buffer_load_sshort v0, s[8:11], s3 offen offset:4095 glc slc lds ; encoding: [0xff,0x5f,0x4f,0xe0,0x00,0x00,0x02,0x03]
0xff,0x5f,0x4f,0xe0,0x00,0x05,0x02,0x03 0xff,0x5f,0x4f,0xe0,0x00,0x00,0x02,0x03
# VI: buffer_load_ushort v5, v0, s[8:11], s3 idxen offset:4095 glc slc lds ; encoding: [0xff,0x6f,0x4b,0xe0,0x00,0x05,0x02,0x03] # VI: buffer_load_ushort v0, s[8:11], s3 idxen offset:4095 glc slc lds ; encoding: [0xff,0x6f,0x4b,0xe0,0x00,0x00,0x02,0x03]
0xff,0x6f,0x4b,0xe0,0x00,0x05,0x02,0x03 0xff,0x6f,0x4b,0xe0,0x00,0x00,0x02,0x03
# VI: buffer_load_dword v5, v0, s[8:11], s101 offen lds ; encoding: [0x00,0x10,0x51,0xe0,0x00,0x05,0x02,0x65] # VI: buffer_load_dword v0, s[8:11], s101 offen lds ; encoding: [0x00,0x10,0x51,0xe0,0x00,0x00,0x02,0x65]
0x00,0x10,0x51,0xe0,0x00,0x05,0x02,0x65 0x00,0x10,0x51,0xe0,0x00,0x00,0x02,0x65
# VI: buffer_load_format_x v5, v[0:1], s[8:11], s3 idxen offen offset:4095 glc slc lds ; encoding: [0xff,0x7f,0x03,0xe0,0x00,0x05,0x02,0x03] # VI: buffer_load_format_x v[0:1], s[8:11], s3 idxen offen offset:4095 glc slc lds ; encoding: [0xff,0x7f,0x03,0xe0,0x00,0x00,0x02,0x03]
0xff,0x7f,0x03,0xe0,0x00,0x05,0x02,0x03 0xff,0x7f,0x03,0xe0,0x00,0x00,0x02,0x03
# VI: buffer_store_lds_dword s[4:7], s0 lds ; encoding: [0x00,0x00,0xf5,0xe0,0x00,0x00,0x01,0x00] # VI: buffer_store_lds_dword s[4:7], s0 lds ; encoding: [0x00,0x00,0xf5,0xe0,0x00,0x00,0x01,0x00]
0x00,0x00,0xf5,0xe0,0x00,0x00,0x01,0x00 0x00,0x00,0xf5,0xe0,0x00,0x00,0x01,0x00
# VI: buffer_store_lds_dword s[4:7], s0 offset:4095 lds ; encoding: [0xff,0x0f,0xf5,0xe0,0x00,0x00,0x01,0x00] # VI: buffer_store_lds_dword s[4:7], s0 offset:4095 lds ; encoding: [0xff,0x0f,0xf5,0xe0,0x00,0x00,0x01,0x00]
0xff,0x0f,0xf5,0xe0,0x00,0x00,0x01,0x00 0xff,0x0f,0xf5,0xe0,0x00,0x00,0x01,0x00
# VI: buffer_store_lds_dword s[4:7], s8 offset:4 lds glc slc ; encoding: [0x04,0x40,0xf7,0xe0,0x00,0x00,0x01,0x08] # VI: buffer_store_lds_dword s[4:7], s8 offset:4 lds glc slc ; encoding: [0x04,0x40,0xf7,0xe0,0x00,0x00,0x01,0x08]
0x04,0x40,0xf7,0xe0,0x00,0x00,0x01,0x08 0x04,0x40,0xf7,0xe0,0x00,0x00,0x01,0x08