[AMDGPU] Document the intended semantics of llvm.amdgcn.s.buffer.load

[dstuttard]

llvm/include/llvm/IR/IntrinsicsAMDGPU.td

957

The added description would imply that this should be updated too (since it isn't necessarily SGPR/imm)

[foad]

Remove SGPR/imm comment.

[alex-t]

llvm/include/llvm/IR/IntrinsicsAMDGPU.td

953

Does this imply that the divergent descriptor and uniform offset result in s_buffer_load too?

[foad]

llvm/include/llvm/IR/IntrinsicsAMDGPU.td

953

For this patch I just wanted to say what is special about llvm.amdgcn.s.buffer.load. I don't want to say anything about divergent descriptors because (a) they are not fully supported yet (globalisel inserts a waterfall loop for them but selectiondag does not) and (b) if/when we do document that they are supported, it would apply to many intrinsics (all the ones that take a descriptor argument) not just this one.

(But the answer to your question is yes, I would expect divergent descriptor and uniform offset to result in s_buffer_load.)

llvm/include/llvm/IR/IntrinsicsAMDGPU.td

class AMDGPUBufferLoad<LLVMType data_ty = llvm_any_ty> : Intrinsic <
    llvm_i1_ty,        // glc(imm)
    llvm_i1_ty],       // slc(imm)
   [IntrReadMem, IntrWillReturn,
    ImmArg<ArgIndex<3>>, ImmArg<ArgIndex<4>>], "", [SDNPMemOperand]>,
   AMDGPURsrcIntrinsic<0>;
 def int_amdgcn_buffer_load_format : AMDGPUBufferLoad<llvm_anyfloat_ty>;
 def int_amdgcn_buffer_load : AMDGPUBufferLoad;
 
+// Generate a buffer_load instruction that may be optimized to s_buffer_load if
+// the offset argument is uniform.
 def int_amdgcn_s_buffer_load : Intrinsic <
   [llvm_any_ty],
   [llvm_v4i32_ty,     // rsrc(SGPR)
-   llvm_i32_ty,       // byte offset(SGPR/imm)
+   llvm_i32_ty,       // byte offset
    llvm_i32_ty],      // cachepolicy(imm; bit 0 = glc, bit 2 = dlc)
   [IntrNoMem, IntrWillReturn, ImmArg<ArgIndex<2>>]>,
   AMDGPURsrcIntrinsic<0>;
 
 class AMDGPUBufferStore<LLVMType data_ty = llvm_any_ty> : Intrinsic <
   [],
   [data_ty,          // vdata(VGPR)
    llvm_v4i32_ty,     // rsrc(SGPR)