[X86] Remove TB_NO_REVERSE for 2 memory folding entries

[skan]

Summary

X86::MMX_MOVD64from64rr -> X86::MMX_MOVQ64mr
X86::MMX_MOVD64grr -> X86::MMX_MOVD64mr

These two entries were added in llvm-svn: 372770.
I think these two should be reversable.

[skan]

These two entries were added by https://reviews.llvm.org/rGa7f27f357df8b199285b0d1882ea7eb47d39cd07

I am trying to reduce the gaps between tables in X86GenFoldTables.inc and X86InstrFoldTables.cpp, and this is one of the difference.

[skan]

Put the discussion link here
https://discourse.llvm.org/t/auto-generate-the-memory-folding-tables/61100/4

[craig.topper]

I would argue that the MMX_MOVD64from64rr entry should fold to MMX_MOVQ64mr since it is one by shorter to encode. And that wouldn't be reversible since MMX_MOVD64from64rr is 64-bit mode instruction and MMX_MOVQ64mr isn't.

For the other one I'm not sure what scenario it would make sense to unfold it. It would introduce an intermediate GPR register that didn't otherwise exist. But since store unfolding is never used, I guess It doesn't really matter.

[craig.topper]

In D122217#3399901, @craig.topper wrote:

I would argue that the MMX_MOVD64from64rr entry should fold to MMX_MOVQ64mr since it is one by shorter to encode. And that wouldn't be reversible since MMX_MOVD64from64rr is 64-bit mode instruction and MMX_MOVQ64mr isn't.

Fixed in D122241

[RKSimon]

rebase?

[skan]

Rebase

[skan]

Ping

[pengfei]

LGTM.

[RKSimon]

LGTM

[skan]

Thank you all @craig.topper @RKSimon @pengfei !

llvm/lib/Target/X86/X86InstrFoldTables.cpp

static const X86MemoryFoldTableEntry MemoryFoldTable0[] = {
   { X86::IMUL64r,             X86::IMUL64m,             TB_FOLDED_LOAD },
   { X86::IMUL8r,              X86::IMUL8m,              TB_FOLDED_LOAD },
   { X86::JMP16r,              X86::JMP16m,              TB_FOLDED_LOAD },
   { X86::JMP16r_NT,           X86::JMP16m_NT,           TB_FOLDED_LOAD },
   { X86::JMP32r,              X86::JMP32m,              TB_FOLDED_LOAD },
   { X86::JMP32r_NT,           X86::JMP32m_NT,           TB_FOLDED_LOAD },
   { X86::JMP64r,              X86::JMP64m,              TB_FOLDED_LOAD },
   { X86::JMP64r_NT,           X86::JMP64m_NT,           TB_FOLDED_LOAD },
-  { X86::MMX_MOVD64from64rr,  X86::MMX_MOVQ64mr,        TB_FOLDED_STORE | TB_NO_REVERSE },
-  { X86::MMX_MOVD64grr,       X86::MMX_MOVD64mr,        TB_FOLDED_STORE | TB_NO_REVERSE },
+  { X86::MMX_MOVD64from64rr,  X86::MMX_MOVQ64mr,        TB_FOLDED_STORE },
+  { X86::MMX_MOVD64grr,       X86::MMX_MOVD64mr,        TB_FOLDED_STORE },
   { X86::MOV16ri,             X86::MOV16mi,             TB_FOLDED_STORE },
   { X86::MOV16rr,             X86::MOV16mr,             TB_FOLDED_STORE },
   { X86::MOV32ri,             X86::MOV32mi,             TB_FOLDED_STORE },
   { X86::MOV32rr,             X86::MOV32mr,             TB_FOLDED_STORE },
   { X86::MOV64ri32,           X86::MOV64mi32,           TB_FOLDED_STORE },
   { X86::MOV64rr,             X86::MOV64mr,             TB_FOLDED_STORE },
   { X86::MOV64toSDrr,         X86::MOV64mr,             TB_FOLDED_STORE | TB_NO_REVERSE },
   { X86::MOV8ri,              X86::MOV8mi,              TB_FOLDED_STORE },