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[WIP][M68k][Disassembler] Adopt the new variable length infrastructure in disassembler
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Authored by 0x59616e on Feb 25 2022, 7:18 PM.

Details

Summary

We still have some problems that need discussion

  • Arithmetic instructions with addressing mode dd & dr have decoding conflict. For example: ADD32dd & ADD32dr, SUB16dd & SUB16dr
  • pc-relative decoder.

Diff Detail

Event Timeline

0x59616e created this revision.Feb 25 2022, 7:18 PM
0x59616e requested review of this revision.Feb 25 2022, 7:18 PM
Herald added a project: Restricted Project. · View Herald TranscriptFeb 25 2022, 7:18 PM
0x59616e retitled this revision from [WIP][M68k][Disassembler] Adopt the new variable length infra in disassembler to [WIP][M68k][Disassembler] Adopt the new variable length infrastructure in disassembler.Feb 25 2022, 7:18 PM
0x59616e edited the summary of this revision. (Show Details)Feb 25 2022, 7:27 PM
0x59616e edited the summary of this revision. (Show Details)
0x59616e edited the summary of this revision. (Show Details)Feb 25 2022, 7:37 PM
0x59616e edited the summary of this revision. (Show Details)
myhsu added a reviewer: myhsu.Feb 25 2022, 8:31 PM
0x59616e edited the summary of this revision. (Show Details)Feb 25 2022, 11:22 PM

FYI, I've found some bugs in operand decoding. But that doesn't bother the discussion of the problems I listed.

0x59616e planned changes to this revision.EditedFeb 26 2022, 4:29 AM

OK, after fixing that bug, more decoding conflict show up. I don't know why. It may take some time.

0x59616e updated this revision to Diff 411612.Feb 26 2022, 7:18 AM

Bug has been fixed, llvm/test/MC/M68k/Relaxations/branch.s is passed.

0x59616e added a comment.EditedFeb 26 2022, 7:24 AM

FYI, here are the instructions that have decoding conflict:

OR16dd / OR16dr
OR32dd/ OR32dr
SUB16dd / SUB16dr
SUB32dd / SUB32dr
AND16dd / AND16dr
AND32dd / AND32dr
ADD16dd / ADD16dr
ADD32dd / ADD32dr

I have two ideas:

  • Decode these instruction manually and add a flag to suppress the "decode conflict" warning message in TableGen

or

  • Refactor these instruction. For example, can ADD32dd be removed and only use ADD32dr ?
0x59616e updated this revision to Diff 411654.Feb 26 2022, 9:11 PM
0x59616e edited the summary of this revision. (Show Details)

update diff. I forgot the context

0x59616e abandoned this revision.Feb 28 2022, 6:38 PM

More tests are needed, that's huge amount of work. I may be too hasty.