[LoongArch] Add basic support to Disassembler

[SixWeining]

Summary

With the addition of disassembler now we can do instructions 'round-trip' test
that assembles .s to obj with llvm-mc and disassembles it with llvm-objdump
to check instruction mnemonics.

[SixWeining]

Move the generation of LoongArchGenDisassemblerTables.inc from D120476 to here.

[SixWeining]

lexical ordering in Disassembler/CMakeLists.txt

[SixWeining]

rebase

[myhsu]

Overall LGTM, only a few minor issues.

llvm/test/MC/LoongArch/ISA/Basic/Integer/invalid-dis.s

1

typo, I think it should be "data smaller than 4 bytes"

llvm/test/MC/LoongArch/Misc/aligned-nops.s

2

I don't think you should use a special check prefix since there is only one variant here.

[xen0n]

Seems good to me (or rather I'm not familiar with the codebase enough to spot all the hidden bugs, huh?)

I'd wait for others to take a look for this series too.

[MaskRay]

In D120477#3356303, @xen0n wrote:

Seems good to me (or rather I'm not familiar with the codebase enough to spot all the hidden bugs, huh?)

I'd wait for others to take a look for this series too.

It's difficult for others to debug the code to verify the control flow. The stacked diff was not created via arc diff. arc patch D120477 fails for me.

[SixWeining]

In D120477#3358872, @MaskRay wrote:

In D120477#3356303, @xen0n wrote:

Seems good to me (or rather I'm not familiar with the codebase enough to spot all the hidden bugs, huh?)

I'd wait for others to take a look for this series too.

It's difficult for others to debug the code to verify the control flow. The stacked diff was not created via arc diff. arc patch D120477 fails for me.

Let me rebase the code.

[SixWeining]

Rebase and address @myhsu's comments.

[SixWeining]

llvm/test/MC/LoongArch/Directives/data.s

6 ↗

(On Diff #412955)

I just find that actually the -s option doesn't depend on Disassembler, so I will move this change to D120476.

[SixWeining]

data.s: move data encodings check to D120476

[SixWeining]

Remove the dependency with D120476 and rebase.

[SixWeining]

A polite ping. @MaskRay, I just remove the dependcy with D120476 and rebase the code. Could you help to have a look? Thanks.

[MaskRay]

llvm/lib/Target/LoongArch/Disassembler/LoongArchDisassembler.cpp

65

inline used-once variable

74

This seems strange. Is isUInt<N> check done before Imm+P?

llvm/test/MC/LoongArch/Misc/aligned-nops.s

11

You can generally omit .type, .size and associated labels.

Unuseful comments like # -- End function should be scrubbed as well.

llvm/test/MC/LoongArch/Misc/unaligned-nops.s

2

report_fatal_error easy to use but is discouraged. Proper diagnostic mechanisms like reportError are preferred.
Better not to add new not --crash tests.

[SixWeining]

Address @MaskRay's comments.

llvm/lib/Target/LoongArch/Disassembler/LoongArchDisassembler.cpp

74

Yes, isUInt<N> check should be done before Imm+P. The Imm is the immediate value in instruction's binary encoding. It's range is [0, 2^N-1] while the range of the MCOperand is [1, 2^1].

llvm/test/MC/LoongArch/Misc/unaligned-nops.s

2

OK. Thanks for the suggestion. But for this test, the report_fatal_error is called in common code lib/MC/MCAssembler.cpp but not in LoongArch backend.

lib/MC/MCAssembler.cpp calls target's writeNopData and report fatal error when it returns false.
LoongArch overrides the writeNopData interface and returns false when fail to write nop datas.

//LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp
 43 bool LoongArchAsmBackend::writeNopData(raw_ostream &OS, uint64_t Count,
 44                                        const MCSubtargetInfo *STI) const {
 45   // Check for byte count not multiple of instruction word size
 46   if (Count % 4 != 0)
 47     return false;
 48 
 49   // The nop on LoongArch is andi r0, r0, 0.
 50   for (; Count >= 4; Count -= 4)
 51     support::endian::write<uint32_t>(OS, 0x03400000, support::little);
 52 
 53   return true;
 54 }

llvm/lib/Target/LoongArch/CMakeLists.txt

 add_llvm_component_group(LoongArch)
 
 set(LLVM_TARGET_DEFINITIONS LoongArch.td)
 
 tablegen(LLVM LoongArchGenAsmMatcher.inc -gen-asm-matcher)
 tablegen(LLVM LoongArchGenAsmWriter.inc -gen-asm-writer)
 tablegen(LLVM LoongArchGenDAGISel.inc -gen-dag-isel)
+tablegen(LLVM LoongArchGenDisassemblerTables.inc -gen-disassembler)
 tablegen(LLVM LoongArchGenInstrInfo.inc -gen-instr-info)
 tablegen(LLVM LoongArchGenMCPseudoLowering.inc -gen-pseudo-lowering)
 tablegen(LLVM LoongArchGenMCCodeEmitter.inc -gen-emitter)
 tablegen(LLVM LoongArchGenRegisterInfo.inc -gen-register-info)
 tablegen(LLVM LoongArchGenSubtargetInfo.inc -gen-subtarget)
 
 add_public_tablegen_target(LoongArchCommonTableGen)
 
add_llvm_target(LoongArchCodeGen
   Target
   GlobalISel
 
   ADD_TO_COMPONENT
   LoongArch
   )
 
 add_subdirectory(AsmParser)
+add_subdirectory(Disassembler)
 add_subdirectory(MCTargetDesc)
 add_subdirectory(TargetInfo)

llvm/lib/Target/LoongArch/Disassembler/CMakeLists.txt

+add_llvm_component_library(LLVMLoongArchDisassembler
+  LoongArchDisassembler.cpp
+
+  LINK_COMPONENTS
+  LoongArchDesc
+  LoongArchInfo
+  MC
+  MCDisassembler
+  Support
+
+  ADD_TO_COMPONENT
+  LoongArch
+  )

llvm/lib/Target/LoongArch/Disassembler/LoongArchDisassembler.cpp

+//===-- LoongArchDisassembler.cpp - Disassembler for LoongArch ------------===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+//
+// This file implements the LoongArchDisassembler class.
+//
+//===----------------------------------------------------------------------===//
+
+#include "MCTargetDesc/LoongArchBaseInfo.h"
+#include "MCTargetDesc/LoongArchMCTargetDesc.h"
+#include "TargetInfo/LoongArchTargetInfo.h"
+#include "llvm/MC/MCContext.h"
+#include "llvm/MC/MCDisassembler/MCDisassembler.h"
+#include "llvm/MC/MCFixedLenDisassembler.h"
+#include "llvm/MC/MCInst.h"
+#include "llvm/MC/MCInstrInfo.h"
+#include "llvm/MC/MCRegisterInfo.h"
+#include "llvm/MC/MCSubtargetInfo.h"
+#include "llvm/MC/TargetRegistry.h"
+#include "llvm/Support/Endian.h"
+
+using namespace llvm;
+
+#define DEBUG_TYPE "loongarch-disassembler"
+
+typedef MCDisassembler::DecodeStatus DecodeStatus;
+
+namespace {
+class LoongArchDisassembler : public MCDisassembler {
+public:
+  LoongArchDisassembler(const MCSubtargetInfo &STI, MCContext &Ctx)
+      : MCDisassembler(STI, Ctx) {}
+
+  DecodeStatus getInstruction(MCInst &Instr, uint64_t &Size,
+                              ArrayRef<uint8_t> Bytes, uint64_t Address,
+                              raw_ostream &CStream) const override;
+};
+} // end anonymous namespace
+
+static MCDisassembler *createLoongArchDisassembler(const Target &T,
+                                                   const MCSubtargetInfo &STI,
+                                                   MCContext &Ctx) {
+  return new LoongArchDisassembler(STI, Ctx);
+}
+
+extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeLoongArchDisassembler() {
+  // Register the disassembler for each target.
+  TargetRegistry::RegisterMCDisassembler(getTheLoongArch32Target(),
+                                         createLoongArchDisassembler);
+  TargetRegistry::RegisterMCDisassembler(getTheLoongArch64Target(),
+                                         createLoongArchDisassembler);
+}
+
+static DecodeStatus DecodeGPRRegisterClass(MCInst &Inst, uint64_t RegNo,
+                                           uint64_t Address,
+                                           const void *Decoder) {
+  if (RegNo >= 32)
+    return MCDisassembler::Fail;
+
+  MCRegister Reg = LoongArch::R0 + RegNo;
+  Inst.addOperand(MCOperand::createReg(Reg));
+  return MCDisassembler::Success;
+}
+
+template <unsigned N, int P = 0>
+static DecodeStatus decodeUImmOperand(MCInst &Inst, uint64_t Imm,
+                                      int64_t Address, const void *Decoder) {
+  assert(isUInt<N>(Imm) && "Invalid immediate");
+  Inst.addOperand(MCOperand::createImm(Imm + P));
+  return MCDisassembler::Success;
+}
+
+template <unsigned N, unsigned S = 0>
+static DecodeStatus decodeSImmOperand(MCInst &Inst, uint64_t Imm,
+                                      int64_t Address, const void *Decoder) {
+  assert(isUInt<N>(Imm) && "Invalid immediate");
+  // Sign-extend the number in the bottom <N> bits of Imm, then shift left <S>
+  // bits.
+  Inst.addOperand(MCOperand::createImm(SignExtend64<N>(Imm) << S));
+  return MCDisassembler::Success;
+}
+
+#include "LoongArchGenDisassemblerTables.inc"
+
+DecodeStatus LoongArchDisassembler::getInstruction(MCInst &MI, uint64_t &Size,
+                                                   ArrayRef<uint8_t> Bytes,
+                                                   uint64_t Address,
+                                                   raw_ostream &CS) const {
+  uint32_t Insn;
+  DecodeStatus Result;
+
+  // We want to read exactly 4 bytes of data because all LoongArch instructions
+  // are fixed 32 bits.
+  if (Bytes.size() < 4) {
+    Size = 0;
+    return MCDisassembler::Fail;
+  }
+
+  Insn = support::endian::read32le(Bytes.data());
+  // Calling the auto-generated decoder function.
+  Result = decodeInstruction(DecoderTable32, MI, Insn, Address, this, STI);
+  Size = 4;
+
+  return Result;
+}

llvm/lib/Target/LoongArch/LoongArchInstrInfo.td

 
 def uimm2 : Operand<GRLenVT> {
   let ParserMatchClass = UImmAsmOperand<2>;
 }
 
 def uimm2_plus1 : Operand<GRLenVT> {
   let ParserMatchClass = UImmAsmOperand<2, "plus1">;
   let EncoderMethod = "getImmOpValueSub1";
+  let DecoderMethod = "decodeUImmOperand<2, 1>";
 }
 
 def uimm3 : Operand<GRLenVT> {
   let ParserMatchClass = UImmAsmOperand<3>;
 }
 
 def uimm5 : Operand<GRLenVT> {
   let ParserMatchClass = UImmAsmOperand<5>;
 }
 
 def uimm6 : Operand<GRLenVT> {
   let ParserMatchClass = UImmAsmOperand<6>;
 }
 
 def uimm12 : Operand<GRLenVT> {
   let ParserMatchClass = UImmAsmOperand<12>;
 }
 
 def uimm15 : Operand<GRLenVT> {
   let ParserMatchClass = UImmAsmOperand<15>;
 }
 
 def simm12 : Operand<GRLenVT>, ImmLeaf<GRLenVT, [{return isInt<12>(Imm);}]> {
   let ParserMatchClass = SImmAsmOperand<12>;
+  let DecoderMethod = "decodeSImmOperand<12>";
 }
 
 def simm14_lsl2 : Operand<GRLenVT> {
   let ParserMatchClass = SImmAsmOperand<14, "lsl2">;
   let EncoderMethod = "getImmOpValueAsr2";
+  let DecoderMethod = "decodeSImmOperand<14, 2>";
 }
 
 def simm16 : Operand<GRLenVT> {
   let ParserMatchClass = SImmAsmOperand<16>;
+  let DecoderMethod = "decodeSImmOperand<16>";
 }
 
 def simm16_lsl2 : Operand<GRLenVT> {
   let ParserMatchClass = SImmAsmOperand<16, "lsl2">;
   let EncoderMethod = "getImmOpValueAsr2";
+  let DecoderMethod = "decodeSImmOperand<16, 2>";
 }
 
 def simm20 : Operand<GRLenVT> {
   let ParserMatchClass = SImmAsmOperand<20>;
+  let DecoderMethod = "decodeSImmOperand<20>";
 }
 
 def simm21_lsl2 : Operand<GRLenVT> {
   let ParserMatchClass = SImmAsmOperand<21, "lsl2">;
   let EncoderMethod = "getImmOpValueAsr2";
+  let DecoderMethod = "decodeSImmOperand<21, 2>";
 }
 
 def simm26_lsl2 : Operand<GRLenVT> {
   let ParserMatchClass = SImmAsmOperand<26, "lsl2">;
   let EncoderMethod = "getImmOpValueAsr2";
+  let DecoderMethod = "decodeSImmOperand<26, 2>";
 }
 
 //===----------------------------------------------------------------------===//
 // Instruction Formats
 //===----------------------------------------------------------------------===//
 
 include "LoongArchInstrFormats.td"
 

llvm/test/MC/LoongArch/Directives/data-valid.s

 # Check that data directives supported by gas are also supported by LLVM MC.
 
 # RUN: llvm-mc -triple loongarch32 < %s | FileCheck %s
 # RUN: llvm-mc -triple loongarch64 < %s | FileCheck %s
+# RUN: llvm-mc -filetype=obj -triple loongarch32 < %s \
+# RUN:     | llvm-objdump -s - | FileCheck -check-prefix=CHECK-DATA %s
+# RUN: llvm-mc -filetype=obj -triple loongarch64 < %s \
+# RUN:     | llvm-objdump -s - | FileCheck -check-prefix=CHECK-DATA %s
 
 .data
 
 # CHECK: .byte 16
 # CHECK: .byte 32
 # CHECK: .half 12352
 # CHECK: .word 1348497536
 # CHECK: .dword 1234605616436508552
+# CHECK-DATA: Contents of section .data:
+# CHECK-DATA-NEXT: 0000 10204030 80706050 88776655 44332211
 .byte 0x10
 .byte 0x20
 .half 0x3040
 .word 0x50607080
 .dword 0x1122334455667788
 
 # CHECK: .byte 16
 # CHECK: .byte 32
 # CHECK: .half 12352
 # CHECK: .word 1348497536
 # CHECK: .dword 1234605616436508552
+# CHECK-DATA-NEXT: 0010 10204030 80706050 88776655 44332211
 .byte 0x10
 .byte 0x20
 .2byte 0x3040
 .4byte 0x50607080
 .8byte 0x1122334455667788
 
-# CHECK: .byte 16
-# CHECK: .byte 32
 # CHECK: .half 12352
 # CHECK: .half 20576
-# CHECK: .half 28800
 # CHECK: .word 2426450112
-# CHECK: .dword 1234605616436508552
-.byte 0x10
-.byte 0x20
+# CHECK-DATA-NEXT: 0020 40306050 8070c0b0 a090
 .short 0x3040
 .hword 0x5060
 .hword 0x7080
 .long 0x90a0b0c0
-.dword 0x1122334455667788

llvm/test/MC/LoongArch/ISA/Basic/Integer/arith.s

 # Test valid arithmetic operation instructions
 
 # RUN: llvm-mc %s -triple=loongarch32 -show-encoding \
-# RUN:     | FileCheck -check-prefixes=CHECK32-ASM %s
+# RUN:     | FileCheck -check-prefixes=CHECK32-ASM,CHECK32-ASM-AND-OBJ %s
 # RUN: llvm-mc %s -triple=loongarch64 -show-encoding --defsym=LA64=1 \
-# RUN:     | FileCheck -check-prefixes=CHECK32-ASM,CHECK64-ASM %s
+# RUN:     | FileCheck -check-prefixes=CHECK32-ASM,CHECK32-ASM-AND-OBJ,CHECK64-ASM,CHECK64-ASM-AND-OBJ %s
+# RUN: llvm-mc -filetype=obj -triple=loongarch32 < %s \
+# RUN:     | llvm-objdump -d - \
+# RUN:     | FileCheck -check-prefixes=CHECK32-ASM-AND-OBJ %s
+# RUN: llvm-mc -filetype=obj -triple=loongarch64 < %s --defsym=LA64=1 \
+# RUN:     | llvm-objdump -d - \
+# RUN:     | FileCheck -check-prefixes=CHECK32-ASM-AND-OBJ,CHECK64-ASM-AND-OBJ %s
 
 #############################################################
 # Instructions for both loongarch32 and loongarch64
 #############################################################
 
-# CHECK32-ASM: add.w $a5, $ra, $s8
+# CHECK32-ASM-AND-OBJ: add.w $a5, $ra, $s8
 # CHECK32-ASM: encoding: [0x29,0x7c,0x10,0x00]
 add.w $a5, $ra, $s8
 
-# CHECK32-ASM: sub.w $r21, $s2, $t7
+# CHECK32-ASM-AND-OBJ: sub.w $r21, $s2, $t7
 # CHECK32-ASM: encoding: [0x35,0x4f,0x11,0x00]
 sub.w $r21, $s2, $t7
 
-# CHECK32-ASM: addi.w $a1, $a3, 246
+# CHECK32-ASM-AND-OBJ: addi.w $a1, $a3, 246
 # CHECK32-ASM: encoding: [0xe5,0xd8,0x83,0x02]
 addi.w $a1, $a3, 246
 
-# CHECK32-ASM: alsl.w $tp, $t5, $tp, 4
+# CHECK32-ASM-AND-OBJ: alsl.w $tp, $t5, $tp, 4
 # CHECK32-ASM: encoding: [0x22,0x8a,0x05,0x00]
 alsl.w $tp, $t5, $tp, 4
 
-# CHECK32-ASM: lu12i.w $t4, 49
+# CHECK32-ASM-AND-OBJ: lu12i.w $t4, 49
 # CHECK32-ASM: encoding: [0x30,0x06,0x00,0x14]
 lu12i.w $t4, 49
 
-# CHECK32-ASM: lu12i.w $a0, -1
+# CHECK32-ASM-AND-OBJ: lu12i.w $a0, -1
 # CHECK32-ASM: encoding: [0xe4,0xff,0xff,0x15]
 lu12i.w $a0, -1
 
-# CHECK32-ASM: slt $s6, $s3, $tp
+# CHECK32-ASM-AND-OBJ: slt $s6, $s3, $tp
 # CHECK32-ASM: encoding: [0x5d,0x0b,0x12,0x00]
 slt $s6, $s3, $tp
 
-# CHECK32-ASM: sltu $a7, $r21, $s6
+# CHECK32-ASM-AND-OBJ: sltu $a7, $r21, $s6
 # CHECK32-ASM: encoding: [0xab,0xf6,0x12,0x00]
 sltu $a7, $r21, $s6
 
-# CHECK32-ASM: slti $s4, $ra, 235
+# CHECK32-ASM-AND-OBJ: slti $s4, $ra, 235
 # CHECK32-ASM: encoding: [0x3b,0xac,0x03,0x02]
 slti $s4, $ra, 235
 
-# CHECK32-ASM: sltui $zero, $a4, 162
+# CHECK32-ASM-AND-OBJ: sltui $zero, $a4, 162
 # CHECK32-ASM: encoding: [0x00,0x89,0x42,0x02]
 sltui $zero, $a4, 162
 
-# CHECK32-ASM: pcaddi $a5, 187
+# CHECK32-ASM-AND-OBJ: pcaddi $a5, 187
 # CHECK32-ASM: encoding: [0x69,0x17,0x00,0x18]
 pcaddi $a5, 187
 
-# CHECK32-ASM: pcaddu12i $zero, 37
+# CHECK32-ASM-AND-OBJ: pcaddu12i $zero, 37
 # CHECK32-ASM: encoding: [0xa0,0x04,0x00,0x1c]
 pcaddu12i $zero, 37
 
-# CHECK32-ASM: pcalau12i $a6, 89
+# CHECK32-ASM-AND-OBJ: pcalau12i $a6, 89
 # CHECK32-ASM: encoding: [0x2a,0x0b,0x00,0x1a]
 pcalau12i $a6, 89
 
-# CHECK32-ASM: and $t7, $s8, $ra
+# CHECK32-ASM-AND-OBJ: and $t7, $s8, $ra
 # CHECK32-ASM: encoding: [0xf3,0x87,0x14,0x00]
 and $t7, $s8, $ra
 
-# CHECK32-ASM: or $t5, $t4, $s7
+# CHECK32-ASM-AND-OBJ: or $t5, $t4, $s7
 # CHECK32-ASM: encoding: [0x11,0x7a,0x15,0x00]
 or $t5, $t4, $s7
 
-# CHECK32-ASM: nor $a1, $t6, $a1
+# CHECK32-ASM-AND-OBJ: nor $a1, $t6, $a1
 # CHECK32-ASM: encoding: [0x45,0x16,0x14,0x00]
 nor $a1, $t6, $a1
 
-# CHECK32-ASM: xor $t3, $t7, $a4
+# CHECK32-ASM-AND-OBJ: xor $t3, $t7, $a4
 # CHECK32-ASM: encoding: [0x6f,0xa2,0x15,0x00]
 xor $t3, $t7, $a4
 
-# CHECK32-ASM: andn $s5, $s2, $a1
+# CHECK32-ASM-AND-OBJ: andn $s5, $s2, $a1
 # CHECK32-ASM: encoding: [0x3c,0x97,0x16,0x00]
 andn $s5, $s2, $a1
 
-# CHECK32-ASM: orn $tp, $sp, $s2
+# CHECK32-ASM-AND-OBJ: orn $tp, $sp, $s2
 # CHECK32-ASM: encoding: [0x62,0x64,0x16,0x00]
 orn $tp, $sp, $s2
 
-# CHECK32-ASM: andi $s2, $zero, 106
+# CHECK32-ASM-AND-OBJ: andi $s2, $zero, 106
 # CHECK32-ASM: encoding: [0x19,0xa8,0x41,0x03]
 andi $s2, $zero, 106
 
-# CHECK32-ASM: ori $t5, $a1, 47
+# CHECK32-ASM-AND-OBJ: ori $t5, $a1, 47
 # CHECK32-ASM: encoding: [0xb1,0xbc,0x80,0x03]
 ori $t5, $a1, 47
 
-# CHECK32-ASM: xori $t6, $s0, 99
+# CHECK32-ASM-AND-OBJ: xori $t6, $s0, 99
 # CHECK32-ASM: encoding: [0xf2,0x8e,0xc1,0x03]
 xori $t6, $s0, 99
 
-# CHECK32-ASM: mul.w $a0, $t6, $sp
+# CHECK32-ASM-AND-OBJ: mul.w $a0, $t6, $sp
 # CHECK32-ASM: encoding: [0x44,0x0e,0x1c,0x00]
 mul.w $a0, $t6, $sp
 
-# CHECK32-ASM: mulh.w $s4, $s0, $zero
+# CHECK32-ASM-AND-OBJ: mulh.w $s4, $s0, $zero
 # CHECK32-ASM: encoding: [0xfb,0x82,0x1c,0x00]
 mulh.w $s4, $s0, $zero
 
-# CHECK32-ASM: mulh.wu $a6, $t5, $s1
+# CHECK32-ASM-AND-OBJ: mulh.wu $a6, $t5, $s1
 # CHECK32-ASM: encoding: [0x2a,0x62,0x1d,0x00]
 mulh.wu $a6, $t5, $s1
 
-# CHECK32-ASM: div.w $s7, $t1, $s2
+# CHECK32-ASM-AND-OBJ: div.w $s7, $t1, $s2
 # CHECK32-ASM: encoding: [0xbe,0x65,0x20,0x00]
 div.w $s7, $t1, $s2
 
-# CHECK32-ASM: mod.w $ra, $s3, $a6
+# CHECK32-ASM-AND-OBJ: mod.w $ra, $s3, $a6
 # CHECK32-ASM: encoding: [0x41,0xab,0x20,0x00]
 mod.w $ra, $s3, $a6
 
-# CHECK32-ASM: div.wu $t7, $s0, $zero
+# CHECK32-ASM-AND-OBJ: div.wu $t7, $s0, $zero
 # CHECK32-ASM: encoding: [0xf3,0x02,0x21,0x00]
 div.wu $t7, $s0, $zero
 
-# CHECK32-ASM: mod.wu $s4, $a5, $t5
+# CHECK32-ASM-AND-OBJ: mod.wu $s4, $a5, $t5
 # CHECK32-ASM: encoding: [0x3b,0xc5,0x21,0x00]
 mod.wu $s4, $a5, $t5
 
 
 #############################################################
 # Instructions only for loongarch64
 #############################################################
 
 .ifdef LA64
 
-# CHECK64-ASM: add.d $tp, $t6, $s4
+# CHECK64-ASM-AND-OBJ: add.d $tp, $t6, $s4
 # CHECK64-ASM: encoding: [0x42,0xee,0x10,0x00]
 add.d $tp, $t6, $s4
 
-# CHECK64-ASM: sub.d $a3, $t0, $a3
+# CHECK64-ASM-AND-OBJ: sub.d $a3, $t0, $a3
 # CHECK64-ASM: encoding: [0x87,0x9d,0x11,0x00]
 sub.d $a3, $t0, $a3
 
-# CHECK64-ASM: addi.d $s5, $a2, 75
+# CHECK64-ASM-AND-OBJ: addi.d $s5, $a2, 75
 # CHECK64-ASM: encoding: [0xdc,0x2c,0xc1,0x02]
 addi.d $s5, $a2, 75
 
-# CHECK64-ASM: addu16i.d $a5, $s0, 23
+# CHECK64-ASM-AND-OBJ: addu16i.d $a5, $s0, 23
 # CHECK64-ASM: encoding: [0xe9,0x5e,0x00,0x10]
 addu16i.d $a5, $s0, 23
 
-# CHECK64-ASM: alsl.wu $t7, $a4, $s2, 1
+# CHECK64-ASM-AND-OBJ: alsl.wu $t7, $a4, $s2, 1
 # CHECK64-ASM: encoding: [0x13,0x65,0x06,0x00]
 alsl.wu $t7, $a4, $s2, 1
 
-# CHECK64-ASM: alsl.d $t5, $a7, $a1, 3
+# CHECK64-ASM-AND-OBJ: alsl.d $t5, $a7, $a1, 3
 # CHECK64-ASM: encoding: [0x71,0x15,0x2d,0x00]
 alsl.d $t5, $a7, $a1, 3
 
-# CHECK64-ASM: lu32i.d $sp, 196
+# CHECK64-ASM-AND-OBJ: lu32i.d $sp, 196
 # CHECK64-ASM: encoding: [0x83,0x18,0x00,0x16]
 lu32i.d $sp, 196
 
-# CHECK64-ASM: lu52i.d $t1, $a0, 195
+# CHECK64-ASM-AND-OBJ: lu52i.d $t1, $a0, 195
 # CHECK64-ASM: encoding: [0x8d,0x0c,0x03,0x03]
 lu52i.d $t1, $a0, 195
 
-# CHECK64-ASM: pcaddu18i $t0, 26
+# CHECK64-ASM-AND-OBJ: pcaddu18i $t0, 26
 # CHECK64-ASM: encoding: [0x4c,0x03,0x00,0x1e]
 pcaddu18i $t0, 26
 
-# CHECK64-ASM: mul.d $ra, $t2, $s1
+# CHECK64-ASM-AND-OBJ: mul.d $ra, $t2, $s1
 # CHECK64-ASM: encoding: [0xc1,0xe1,0x1d,0x00]
 mul.d $ra, $t2, $s1
 
-# CHECK64-ASM: mulh.d $s5, $ra, $s4
+# CHECK64-ASM-AND-OBJ: mulh.d $s5, $ra, $s4
 # CHECK64-ASM: encoding: [0x3c,0x6c,0x1e,0x00]
 mulh.d $s5, $ra, $s4
 
-# CHECK64-ASM: mulh.du $t1, $s4, $s6
+# CHECK64-ASM-AND-OBJ: mulh.du $t1, $s4, $s6
 # CHECK64-ASM: encoding: [0x6d,0xf7,0x1e,0x00]
 mulh.du $t1, $s4, $s6
 
-# CHECK64-ASM: mulw.d.w $s4, $a2, $t5
+# CHECK64-ASM-AND-OBJ: mulw.d.w $s4, $a2, $t5
 # CHECK64-ASM: encoding: [0xdb,0x44,0x1f,0x00]
 mulw.d.w $s4, $a2, $t5
 
-# CHECK64-ASM: mulw.d.wu $t5, $fp, $s7
+# CHECK64-ASM-AND-OBJ: mulw.d.wu $t5, $fp, $s7
 # CHECK64-ASM: encoding: [0xd1,0xfa,0x1f,0x00]
 mulw.d.wu $t5, $fp, $s7
 
-# CHECK64-ASM: div.d $s0, $a2, $r21
+# CHECK64-ASM-AND-OBJ: div.d $s0, $a2, $r21
 # CHECK64-ASM: encoding: [0xd7,0x54,0x22,0x00]
 div.d $s0, $a2, $r21
 
-# CHECK64-ASM: mod.d $t4, $sp, $t3
+# CHECK64-ASM-AND-OBJ: mod.d $t4, $sp, $t3
 # CHECK64-ASM: encoding: [0x70,0xbc,0x22,0x00]
 mod.d $t4, $sp, $t3
 
-# CHECK64-ASM: div.du $s8, $s1, $t2
+# CHECK64-ASM-AND-OBJ: div.du $s8, $s1, $t2
 # CHECK64-ASM: encoding: [0x1f,0x3b,0x23,0x00]
 div.du $s8, $s1, $t2
 
-# CHECK64-ASM: mod.du $s2, $s0, $s1
+# CHECK64-ASM-AND-OBJ: mod.du $s2, $s0, $s1
 # CHECK64-ASM: encoding: [0xf9,0xe2,0x23,0x00]
 mod.du $s2, $s0, $s1
 
 .endif
 

llvm/test/MC/LoongArch/ISA/Basic/Integer/atomic.s

 # Test valid atomic memory access instructions.
 
 # RUN: llvm-mc %s -triple=loongarch32 -show-encoding \
-# RUN:     | FileCheck -check-prefixes=CHECK32-ASM %s
+# RUN:     | FileCheck -check-prefixes=CHECK32-ASM,CHECK32-ASM-AND-OBJ %s
 # RUN: llvm-mc %s -triple=loongarch64 -show-encoding --defsym=LA64=1 \
-# RUN:     | FileCheck -check-prefixes=CHECK32-ASM,CHECK64-ASM %s
+# RUN:     | FileCheck -check-prefixes=CHECK32-ASM,CHECK32-ASM-AND-OBJ,CHECK64-ASM,CHECK64-ASM-AND-OBJ %s
+# RUN: llvm-mc -filetype=obj -triple=loongarch32 < %s \
+# RUN:     | llvm-objdump -d - \
+# RUN:     | FileCheck -check-prefixes=CHECK32-ASM-AND-OBJ %s
+# RUN: llvm-mc -filetype=obj -triple=loongarch64 < %s --defsym=LA64=1 \
+# RUN:     | llvm-objdump -d - \
+# RUN:     | FileCheck -check-prefixes=CHECK32-ASM-AND-OBJ,CHECK64-ASM-AND-OBJ %s
 
 #############################################################
 # Instructions for both loongarch32 and loongarch64
 #############################################################
 
-# CHECK32-ASM: ll.w $tp, $s4, 220
+# CHECK32-ASM-AND-OBJ: ll.w $tp, $s4, 220
 # CHECK32-ASM: encoding: [0x62,0xdf,0x00,0x20]
 ll.w $tp, $s4, 220
 
-# CHECK32-ASM: sc.w $t7, $t2, 56
+# CHECK32-ASM-AND-OBJ: sc.w $t7, $t2, 56
 # CHECK32-ASM: encoding: [0xd3,0x39,0x00,0x21]
 sc.w $t7, $t2, 56
 
 
 
 #############################################################
 # Instructions only for loongarch64
 #############################################################
 
 .ifdef LA64
 
-# CHECK64-ASM: amswap.w $a2, $t0, $s1
+# CHECK64-ASM-AND-OBJ: amswap.w $a2, $t0, $s1
 # CHECK64-ASM: encoding: [0x06,0x33,0x60,0x38]
 amswap.w $a2, $t0, $s1
 
-# CHECK64-ASM: amswap.d $tp, $t2, $fp
+# CHECK64-ASM-AND-OBJ: amswap.d $tp, $t2, $fp
 # CHECK64-ASM: encoding: [0xc2,0xba,0x60,0x38]
 amswap.d $tp, $t2, $fp
 
-# CHECK64-ASM: amadd.w $a4, $t0, $r21
+# CHECK64-ASM-AND-OBJ: amadd.w $a4, $t0, $r21
 # CHECK64-ASM: encoding: [0xa8,0x32,0x61,0x38]
 amadd.w $a4, $t0, $r21
 
-# CHECK64-ASM: amadd.d $a1, $t5, $s6
+# CHECK64-ASM-AND-OBJ: amadd.d $a1, $t5, $s6
 # CHECK64-ASM: encoding: [0xa5,0xc7,0x61,0x38]
 amadd.d $a1, $t5, $s6
 
-# CHECK64-ASM: amand.w $a0, $t7, $fp
+# CHECK64-ASM-AND-OBJ: amand.w $a0, $t7, $fp
 # CHECK64-ASM: encoding: [0xc4,0x4e,0x62,0x38]
 amand.w $a0, $t7, $fp
 
-# CHECK64-ASM: amand.d $a6, $t6, $s6
+# CHECK64-ASM-AND-OBJ: amand.d $a6, $t6, $s6
 # CHECK64-ASM: encoding: [0xaa,0xcb,0x62,0x38]
 amand.d $a6, $t6, $s6
 
-# CHECK64-ASM: amor.w $a2, $t4, $s0
+# CHECK64-ASM-AND-OBJ: amor.w $a2, $t4, $s0
 # CHECK64-ASM: encoding: [0xe6,0x42,0x63,0x38]
 amor.w $a2, $t4, $s0
 
-# CHECK64-ASM: amor.d $sp, $t4, $s1
+# CHECK64-ASM-AND-OBJ: amor.d $sp, $t4, $s1
 # CHECK64-ASM: encoding: [0x03,0xc3,0x63,0x38]
 amor.d $sp, $t4, $s1
 
-# CHECK64-ASM: amxor.w $tp, $t3, $s0
+# CHECK64-ASM-AND-OBJ: amxor.w $tp, $t3, $s0
 # CHECK64-ASM: encoding: [0xe2,0x3e,0x64,0x38]
 amxor.w $tp, $t3, $s0
 
-# CHECK64-ASM: amxor.d $a4, $t8, $s5
+# CHECK64-ASM-AND-OBJ: amxor.d $a4, $t8, $s5
 # CHECK64-ASM: encoding: [0x88,0xd3,0x64,0x38]
 amxor.d $a4, $t8, $s5
 
-# CHECK64-ASM: ammax.w $ra, $a7, $s0
+# CHECK64-ASM-AND-OBJ: ammax.w $ra, $a7, $s0
 # CHECK64-ASM: encoding: [0xe1,0x2e,0x65,0x38]
 ammax.w $ra, $a7, $s0
 
-# CHECK64-ASM: ammax.d $a5, $t8, $s4
+# CHECK64-ASM-AND-OBJ: ammax.d $a5, $t8, $s4
 # CHECK64-ASM: encoding: [0x69,0xd3,0x65,0x38]
 ammax.d $a5, $t8, $s4
 
-# CHECK64-ASM: ammin.w $a5, $t2, $s0
+# CHECK64-ASM-AND-OBJ: ammin.w $a5, $t2, $s0
 # CHECK64-ASM: encoding: [0xe9,0x3a,0x66,0x38]
 ammin.w $a5, $t2, $s0
 
-# CHECK64-ASM: ammin.d $a5, $t1, $fp
+# CHECK64-ASM-AND-OBJ: ammin.d $a5, $t1, $fp
 # CHECK64-ASM: encoding: [0xc9,0xb6,0x66,0x38]
 ammin.d $a5, $t1, $fp
 
-# CHECK64-ASM: ammax.wu $a5, $a7, $fp
+# CHECK64-ASM-AND-OBJ: ammax.wu $a5, $a7, $fp
 # CHECK64-ASM: encoding: [0xc9,0x2e,0x67,0x38]
 ammax.wu $a5, $a7, $fp
 
-# CHECK64-ASM: ammax.du $a2, $t4, $s2
+# CHECK64-ASM-AND-OBJ: ammax.du $a2, $t4, $s2
 # CHECK64-ASM: encoding: [0x26,0xc3,0x67,0x38]
 ammax.du $a2, $t4, $s2
 
-# CHECK64-ASM: ammin.wu $a4, $t6, $s7
+# CHECK64-ASM-AND-OBJ: ammin.wu $a4, $t6, $s7
 # CHECK64-ASM: encoding: [0xc8,0x4b,0x68,0x38]
 ammin.wu $a4, $t6, $s7
 
-# CHECK64-ASM: ammin.du $a3, $t4, $s2
+# CHECK64-ASM-AND-OBJ: ammin.du $a3, $t4, $s2
 # CHECK64-ASM: encoding: [0x27,0xc3,0x68,0x38]
 ammin.du $a3, $t4, $s2
 
-# CHECK64-ASM: amswap_db.w $a2, $t0, $s1
+# CHECK64-ASM-AND-OBJ: amswap_db.w $a2, $t0, $s1
 # CHECK64-ASM: encoding: [0x06,0x33,0x69,0x38]
 amswap_db.w $a2, $t0, $s1
 
-# CHECK64-ASM: amswap_db.d $tp, $t2, $fp
+# CHECK64-ASM-AND-OBJ: amswap_db.d $tp, $t2, $fp
 # CHECK64-ASM: encoding: [0xc2,0xba,0x69,0x38]
 amswap_db.d $tp, $t2, $fp
 
-# CHECK64-ASM: amadd_db.w $a4, $t0, $r21
+# CHECK64-ASM-AND-OBJ: amadd_db.w $a4, $t0, $r21
 # CHECK64-ASM: encoding: [0xa8,0x32,0x6a,0x38]
 amadd_db.w $a4, $t0, $r21
 
-# CHECK64-ASM: amadd_db.d $a1, $t5, $s6
+# CHECK64-ASM-AND-OBJ: amadd_db.d $a1, $t5, $s6
 # CHECK64-ASM: encoding: [0xa5,0xc7,0x6a,0x38]
 amadd_db.d $a1, $t5, $s6
 
-# CHECK64-ASM: amand_db.w $a0, $t7, $fp
+# CHECK64-ASM-AND-OBJ: amand_db.w $a0, $t7, $fp
 # CHECK64-ASM: encoding: [0xc4,0x4e,0x6b,0x38]
 amand_db.w $a0, $t7, $fp
 
-# CHECK64-ASM: amand_db.d $a6, $t6, $s6
+# CHECK64-ASM-AND-OBJ: amand_db.d $a6, $t6, $s6
 # CHECK64-ASM: encoding: [0xaa,0xcb,0x6b,0x38]
 amand_db.d $a6, $t6, $s6
 
-# CHECK64-ASM: amor_db.w $a2, $t4, $s0
+# CHECK64-ASM-AND-OBJ: amor_db.w $a2, $t4, $s0
 # CHECK64-ASM: encoding: [0xe6,0x42,0x6c,0x38]
 amor_db.w $a2, $t4, $s0
 
-# CHECK64-ASM: amor_db.d $sp, $t4, $s1
+# CHECK64-ASM-AND-OBJ: amor_db.d $sp, $t4, $s1
 # CHECK64-ASM: encoding: [0x03,0xc3,0x6c,0x38]
 amor_db.d $sp, $t4, $s1
 
-# CHECK64-ASM: amxor_db.w $tp, $t3, $s0
+# CHECK64-ASM-AND-OBJ: amxor_db.w $tp, $t3, $s0
 # CHECK64-ASM: encoding: [0xe2,0x3e,0x6d,0x38]
 amxor_db.w $tp, $t3, $s0
 
-# CHECK64-ASM: amxor_db.d $a4, $t8, $s5
+# CHECK64-ASM-AND-OBJ: amxor_db.d $a4, $t8, $s5
 # CHECK64-ASM: encoding: [0x88,0xd3,0x6d,0x38]
 amxor_db.d $a4, $t8, $s5
 
-# CHECK64-ASM: ammax_db.w $ra, $a7, $s0
+# CHECK64-ASM-AND-OBJ: ammax_db.w $ra, $a7, $s0
 # CHECK64-ASM: encoding: [0xe1,0x2e,0x6e,0x38]
 ammax_db.w $ra, $a7, $s0
 
-# CHECK64-ASM: ammax_db.d $a5, $t8, $s4
+# CHECK64-ASM-AND-OBJ: ammax_db.d $a5, $t8, $s4
 # CHECK64-ASM: encoding: [0x69,0xd3,0x6e,0x38]
 ammax_db.d $a5, $t8, $s4
 
-# CHECK64-ASM: ammin_db.w $a5, $t2, $s0
+# CHECK64-ASM-AND-OBJ: ammin_db.w $a5, $t2, $s0
 # CHECK64-ASM: encoding: [0xe9,0x3a,0x6f,0x38]
 ammin_db.w $a5, $t2, $s0
 
-# CHECK64-ASM: ammin_db.d $a5, $t1, $fp
+# CHECK64-ASM-AND-OBJ: ammin_db.d $a5, $t1, $fp
 # CHECK64-ASM: encoding: [0xc9,0xb6,0x6f,0x38]
 ammin_db.d $a5, $t1, $fp
 
-# CHECK64-ASM: ammax_db.wu $a5, $a7, $fp
+# CHECK64-ASM-AND-OBJ: ammax_db.wu $a5, $a7, $fp
 # CHECK64-ASM: encoding: [0xc9,0x2e,0x70,0x38]
 ammax_db.wu $a5, $a7, $fp
 
-# CHECK64-ASM: ammax_db.du $a2, $t4, $s2
+# CHECK64-ASM-AND-OBJ: ammax_db.du $a2, $t4, $s2
 # CHECK64-ASM: encoding: [0x26,0xc3,0x70,0x38]
 ammax_db.du $a2, $t4, $s2
 
-# CHECK64-ASM: ammin_db.wu $a4, $t6, $s7
+# CHECK64-ASM-AND-OBJ: ammin_db.wu $a4, $t6, $s7
 # CHECK64-ASM: encoding: [0xc8,0x4b,0x71,0x38]
 ammin_db.wu $a4, $t6, $s7
 
-# CHECK64-ASM: ammin_db.du $a3, $t4, $s2
+# CHECK64-ASM-AND-OBJ: ammin_db.du $a3, $t4, $s2
 # CHECK64-ASM: encoding: [0x27,0xc3,0x71,0x38]
 ammin_db.du $a3, $t4, $s2
 
-# CHECK64-ASM: ll.d $s2, $s4, 16
+# CHECK64-ASM-AND-OBJ: ll.d $s2, $s4, 16
 # CHECK64-ASM: encoding: [0x79,0x13,0x00,0x22]
 ll.d $s2, $s4, 16
 
-# CHECK64-ASM: sc.d $t5, $t5, 244
+# CHECK64-ASM-AND-OBJ: sc.d $t5, $t5, 244
 # CHECK64-ASM: encoding: [0x31,0xf6,0x00,0x23]
 sc.d $t5, $t5, 244
 
 .endif
 

llvm/test/MC/LoongArch/ISA/Basic/Integer/barrier.s

 # Test valid barrier instructions.
 
 # RUN: llvm-mc %s -triple=loongarch32 -show-encoding \
-# RUN:     | FileCheck -check-prefixes=CHECK-ASM %s
+# RUN:     | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s
 # RUN: llvm-mc %s -triple=loongarch64 -show-encoding \
-# RUN:     | FileCheck -check-prefixes=CHECK-ASM %s
+# RUN:     | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s
+# RUN: llvm-mc -filetype=obj -triple=loongarch32 < %s \
+# RUN:     | llvm-objdump -d - \
+# RUN:     | FileCheck -check-prefixes=CHECK-ASM-AND-OBJ %s
+# RUN: llvm-mc -filetype=obj -triple=loongarch64 < %s \
+# RUN:     | llvm-objdump -d - \
+# RUN:     | FileCheck -check-prefixes=CHECK-ASM-AND-OBJ %s
 
-# CHECK-ASM: dbar 0
+# CHECK-ASM-AND-OBJ: dbar 0
 # CHECK-ASM: encoding: [0x00,0x00,0x72,0x38]
 dbar 0
 
-# CHECK-ASM: ibar 0
+# CHECK-ASM-AND-OBJ: ibar 0
 # CHECK-ASM: encoding: [0x00,0x80,0x72,0x38]
 ibar 0
-

llvm/test/MC/LoongArch/ISA/Basic/Integer/bit-manipu.s

 # Test valid bit manipulation instructions.
 
 # RUN: llvm-mc %s -triple=loongarch32 -show-encoding \
-# RUN:     | FileCheck -check-prefixes=CHECK32-ASM %s
+# RUN:     | FileCheck -check-prefixes=CHECK32-ASM,CHECK32-ASM-AND-OBJ %s
 # RUN: llvm-mc %s -triple=loongarch64 -show-encoding --defsym=LA64=1 \
-# RUN:     | FileCheck -check-prefixes=CHECK32-ASM,CHECK64-ASM %s
+# RUN:     | FileCheck -check-prefixes=CHECK32-ASM,CHECK32-ASM-AND-OBJ,CHECK64-ASM,CHECK64-ASM-AND-OBJ %s
+# RUN: llvm-mc -filetype=obj -triple=loongarch32 < %s \
+# RUN:     | llvm-objdump -d - \
+# RUN:     | FileCheck -check-prefixes=CHECK32-ASM-AND-OBJ %s
+# RUN: llvm-mc -filetype=obj -triple=loongarch64 < %s --defsym=LA64=1 \
+# RUN:     | llvm-objdump -d - \
+# RUN:     | FileCheck -check-prefixes=CHECK32-ASM-AND-OBJ,CHECK64-ASM-AND-OBJ %s
 
 #############################################################
 # Instructions for both loongarch32 and loongarch64
 #############################################################
 
 # CHECK32-ASM: ext.w.b $t8, $t6
 # CHECK32-ASM: encoding: [0x54,0x5e,0x00,0x00]
 ext.w.b $t8, $t6
 
 # CHECK32-ASM: ext.w.h $s0, $s0
 # CHECK32-ASM: encoding: [0xf7,0x5a,0x00,0x00]
 ext.w.h $s0, $s0
 
-# CHECK32-ASM: clo.w $ra, $sp
+# CHECK32-ASM-AND-OBJ: clo.w $ra, $sp
 # CHECK32-ASM: encoding: [0x61,0x10,0x00,0x00]
 clo.w $ra, $sp
 
-# CHECK32-ASM: clz.w $a3, $a6
+# CHECK32-ASM-AND-OBJ: clz.w $a3, $a6
 # CHECK32-ASM: encoding: [0x47,0x15,0x00,0x00]
 clz.w $a3, $a6
 
-# CHECK32-ASM: cto.w $tp, $a2
+# CHECK32-ASM-AND-OBJ: cto.w $tp, $a2
 # CHECK32-ASM: encoding: [0xc2,0x18,0x00,0x00]
 cto.w $tp, $a2
 
-# CHECK32-ASM: ctz.w $a1, $fp
+# CHECK32-ASM-AND-OBJ: ctz.w $a1, $fp
 # CHECK32-ASM: encoding: [0xc5,0x1e,0x00,0x00]
 ctz.w $a1, $fp
 
-# CHECK32-ASM: bytepick.w $s6, $zero, $t4, 0
+# CHECK32-ASM-AND-OBJ: bytepick.w $s6, $zero, $t4, 0
 # CHECK32-ASM: encoding: [0x1d,0x40,0x08,0x00]
 bytepick.w $s6, $zero, $t4, 0
 
-# CHECK32-ASM: revb.2h $t8, $a7
+# CHECK32-ASM-AND-OBJ: revb.2h $t8, $a7
 # CHECK32-ASM: encoding: [0x74,0x31,0x00,0x00]
 revb.2h $t8, $a7
 
-# CHECK32-ASM: bitrev.4b $r21, $s4
+# CHECK32-ASM-AND-OBJ: bitrev.4b $r21, $s4
 # CHECK32-ASM: encoding: [0x75,0x4b,0x00,0x00]
 bitrev.4b $r21, $s4
 
-# CHECK32-ASM: bitrev.w $s2, $a1
+# CHECK32-ASM-AND-OBJ: bitrev.w $s2, $a1
 # CHECK32-ASM: encoding: [0xb9,0x50,0x00,0x00]
 bitrev.w $s2, $a1
 
-# CHECK32-ASM: bstrins.w $a4, $a7, 7, 2
+# CHECK32-ASM-AND-OBJ: bstrins.w $a4, $a7, 7, 2
 # CHECK32-ASM: encoding: [0x68,0x09,0x67,0x00]
 bstrins.w $a4, $a7, 7, 2
 
-# CHECK32-ASM: bstrpick.w $ra, $a5, 10, 4
+# CHECK32-ASM-AND-OBJ: bstrpick.w $ra, $a5, 10, 4
 # CHECK32-ASM: encoding: [0x21,0x91,0x6a,0x00]
 bstrpick.w $ra, $a5, 10, 4
 
-# CHECK32-ASM: maskeqz $t8, $a7, $t6
+# CHECK32-ASM-AND-OBJ: maskeqz $t8, $a7, $t6
 # CHECK32-ASM: encoding: [0x74,0x49,0x13,0x00]
 maskeqz $t8, $a7, $t6
 
-# CHECK32-ASM: masknez $t8, $t1, $s3
+# CHECK32-ASM-AND-OBJ: masknez $t8, $t1, $s3
 # CHECK32-ASM: encoding: [0xb4,0xe9,0x13,0x00]
 masknez $t8, $t1, $s3
 
 
 #############################################################
 # Instructions only for loongarch64
 #############################################################
 
 .ifdef LA64
 
-# CHECK64-ASM: clo.d $s6, $ra
+# CHECK64-ASM-AND-OBJ: clo.d $s6, $ra
 # CHECK64-ASM: encoding: [0x3d,0x20,0x00,0x00]
 clo.d $s6, $ra
 
-# CHECK64-ASM: clz.d $s3, $s3
+# CHECK64-ASM-AND-OBJ: clz.d $s3, $s3
 # CHECK64-ASM: encoding: [0x5a,0x27,0x00,0x00]
 clz.d $s3, $s3
 
-# CHECK64-ASM: cto.d $t6, $t8
+# CHECK64-ASM-AND-OBJ: cto.d $t6, $t8
 # CHECK64-ASM: encoding: [0x92,0x2a,0x00,0x00]
 cto.d $t6, $t8
 
-# CHECK64-ASM: ctz.d $t5, $a6
+# CHECK64-ASM-AND-OBJ: ctz.d $t5, $a6
 # CHECK64-ASM: encoding: [0x51,0x2d,0x00,0x00]
 ctz.d $t5, $a6
 
-# CHECK64-ASM: bytepick.d $t3, $t5, $t8, 4
+# CHECK64-ASM-AND-OBJ: bytepick.d $t3, $t5, $t8, 4
 # CHECK64-ASM: encoding: [0x2f,0x52,0x0e,0x00]
 bytepick.d $t3, $t5, $t8, 4
 
-# CHECK64-ASM: revb.4h $t1, $t7
+# CHECK64-ASM-AND-OBJ: revb.4h $t1, $t7
 # CHECK64-ASM: encoding: [0x6d,0x36,0x00,0x00]
 revb.4h $t1, $t7
 
-# CHECK64-ASM: revb.2w $s5, $s4
+# CHECK64-ASM-AND-OBJ: revb.2w $s5, $s4
 # CHECK64-ASM: encoding: [0x7c,0x3b,0x00,0x00]
 revb.2w $s5, $s4
 
-# CHECK64-ASM: revb.d $zero, $s0
+# CHECK64-ASM-AND-OBJ: revb.d $zero, $s0
 # CHECK64-ASM: encoding: [0xe0,0x3e,0x00,0x00]
 revb.d $zero, $s0
 
-# CHECK64-ASM: revh.2w $s5, $a6
+# CHECK64-ASM-AND-OBJ: revh.2w $s5, $a6
 # CHECK64-ASM: encoding: [0x5c,0x41,0x00,0x00]
 revh.2w $s5, $a6
 
-# CHECK64-ASM: revh.d $a5, $a3
+# CHECK64-ASM-AND-OBJ: revh.d $a5, $a3
 # CHECK64-ASM: encoding: [0xe9,0x44,0x00,0x00]
 revh.d $a5, $a3
 
-# CHECK64-ASM: bitrev.8b $t1, $s2
+# CHECK64-ASM-AND-OBJ: bitrev.8b $t1, $s2
 # CHECK64-ASM: encoding: [0x2d,0x4f,0x00,0x00]
 bitrev.8b $t1, $s2
 
-# CHECK64-ASM: bitrev.d $t7, $s0
+# CHECK64-ASM-AND-OBJ: bitrev.d $t7, $s0
 # CHECK64-ASM: encoding: [0xf3,0x56,0x00,0x00]
 bitrev.d $t7, $s0
 
-# CHECK64-ASM: bstrins.d $a4, $a7, 7, 2
+# CHECK64-ASM-AND-OBJ: bstrins.d $a4, $a7, 7, 2
 # CHECK64-ASM: encoding: [0x68,0x09,0x87,0x00]
 bstrins.d $a4, $a7, 7, 2
 
-# CHECK64-ASM: bstrpick.d $s8, $s4, 39, 22
+# CHECK64-ASM-AND-OBJ: bstrpick.d $s8, $s4, 39, 22
 # CHECK64-ASM: encoding: [0x7f,0x5b,0xe7,0x00]
 bstrpick.d $s8, $s4, 39, 22
 
 .endif
 

llvm/test/MC/LoongArch/ISA/Basic/Integer/bit-shift.s

 # Test valid bit shift instructions.
 
 # RUN: llvm-mc %s -triple=loongarch32 -show-encoding \
-# RUN:     | FileCheck -check-prefixes=CHECK32-ASM %s
+# RUN:     | FileCheck -check-prefixes=CHECK32-ASM,CHECK32-ASM-AND-OBJ %s
 # RUN: llvm-mc %s -triple=loongarch64 -show-encoding --defsym=LA64=1 \
-# RUN:     | FileCheck -check-prefixes=CHECK32-ASM,CHECK64-ASM %s
+# RUN:     | FileCheck -check-prefixes=CHECK32-ASM,CHECK32-ASM-AND-OBJ,CHECK64-ASM,CHECK64-ASM-AND-OBJ %s
+# RUN: llvm-mc -filetype=obj -triple=loongarch32 < %s \
+# RUN:     | llvm-objdump -d - \
+# RUN:     | FileCheck -check-prefixes=CHECK32-ASM-AND-OBJ %s
+# RUN: llvm-mc -filetype=obj -triple=loongarch64 < %s --defsym=LA64=1 \
+# RUN:     | llvm-objdump -d - \
+# RUN:     | FileCheck -check-prefixes=CHECK32-ASM-AND-OBJ,CHECK64-ASM-AND-OBJ %s
+
 
 #############################################################
 # Instructions for both loongarch32 and loongarch64
 #############################################################
 
-# CHECK32-ASM: sll.w $s1, $s4, $s0
+# CHECK32-ASM-AND-OBJ: sll.w $s1, $s4, $s0
 # CHECK32-ASM: encoding: [0x78,0x5f,0x17,0x00]
 sll.w $s1, $s4, $s0
 
-# CHECK32-ASM: srl.w $s8, $t5, $a3
+# CHECK32-ASM-AND-OBJ: srl.w $s8, $t5, $a3
 # CHECK32-ASM: encoding: [0x3f,0x9e,0x17,0x00]
 srl.w $s8, $t5, $a3
 
-# CHECK32-ASM: sra.w $t0, $s5, $a6
+# CHECK32-ASM-AND-OBJ: sra.w $t0, $s5, $a6
 # CHECK32-ASM: encoding: [0x8c,0x2b,0x18,0x00]
 sra.w $t0, $s5, $a6
 
-# CHECK32-ASM: rotr.w $ra, $s3, $t6
+# CHECK32-ASM-AND-OBJ: rotr.w $ra, $s3, $t6
 # CHECK32-ASM: encoding: [0x41,0x4b,0x1b,0x00]
 rotr.w $ra, $s3, $t6
 
-# CHECK32-ASM: slli.w $s3, $t6, 0
+# CHECK32-ASM-AND-OBJ: slli.w $s3, $t6, 0
 # CHECK32-ASM: encoding: [0x5a,0x82,0x40,0x00]
 slli.w $s3, $t6, 0
 
-# CHECK32-ASM: srli.w $a6, $t2, 30
+# CHECK32-ASM-AND-OBJ: srli.w $a6, $t2, 30
 # CHECK32-ASM: encoding: [0xca,0xf9,0x44,0x00]
 srli.w $a6, $t2, 30
 
-# CHECK32-ASM: srai.w $a4, $t5, 24
+# CHECK32-ASM-AND-OBJ: srai.w $a4, $t5, 24
 # CHECK32-ASM: encoding: [0x28,0xe2,0x48,0x00]
 srai.w $a4, $t5, 24
 
-# CHECK32-ASM: rotri.w $s0, $t8, 23
+# CHECK32-ASM-AND-OBJ: rotri.w $s0, $t8, 23
 # CHECK32-ASM: encoding: [0x97,0xde,0x4c,0x00]
 rotri.w $s0, $t8, 23
 
 
 #############################################################
 # Instructions only for loongarch64
 #############################################################
 
 .ifdef LA64
 
-# CHECK64-ASM: sll.d $t8, $t3, $sp
+# CHECK64-ASM-AND-OBJ: sll.d $t8, $t3, $sp
 # CHECK64-ASM: encoding: [0xf4,0x8d,0x18,0x00]
 sll.d $t8, $t3, $sp
 
-# CHECK64-ASM: srl.d $t2, $s2, $zero
+# CHECK64-ASM-AND-OBJ: srl.d $t2, $s2, $zero
 # CHECK64-ASM: encoding: [0x2e,0x03,0x19,0x00]
 srl.d $t2, $s2, $zero
 
-# CHECK64-ASM: sra.d $a3, $fp, $s8
+# CHECK64-ASM-AND-OBJ: sra.d $a3, $fp, $s8
 # CHECK64-ASM: encoding: [0xc7,0xfe,0x19,0x00]
 sra.d $a3, $fp, $s8
 
-# CHECK64-ASM: rotr.d $s8, $sp, $ra
+# CHECK64-ASM-AND-OBJ: rotr.d $s8, $sp, $ra
 # CHECK64-ASM: encoding: [0x7f,0x84,0x1b,0x00]
 rotr.d $s8, $sp, $ra
 
-# CHECK64-ASM: slli.d $a6, $s8, 39
+# CHECK64-ASM-AND-OBJ: slli.d $a6, $s8, 39
 # CHECK64-ASM: encoding: [0xea,0x9f,0x41,0x00]
 slli.d $a6, $s8, 39
 
-# CHECK64-ASM: srli.d $s8, $fp, 38
+# CHECK64-ASM-AND-OBJ: srli.d $s8, $fp, 38
 # CHECK64-ASM: encoding: [0xdf,0x9a,0x45,0x00]
 srli.d $s8, $fp, 38
 
-# CHECK64-ASM: srai.d $a5, $r21, 27
+# CHECK64-ASM-AND-OBJ: srai.d $a5, $r21, 27
 # CHECK64-ASM: encoding: [0xa9,0x6e,0x49,0x00]
 srai.d $a5, $r21, 27
 
-# CHECK64-ASM: rotri.d $s6, $zero, 7
+# CHECK64-ASM-AND-OBJ: rotri.d $s6, $zero, 7
 # CHECK64-ASM: encoding: [0x1d,0x1c,0x4d,0x00]
 rotri.d $s6, $zero, 7
 
 .endif
 

llvm/test/MC/LoongArch/ISA/Basic/Integer/bound-check.s

 # Test valid boundary check memory access instructions.
 
 # RUN: llvm-mc %s -triple=loongarch64 -show-encoding \
-# RUN:     | FileCheck -check-prefixes=CHECK-ASM %s
+# RUN:     | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s
+# RUN: llvm-mc -filetype=obj -triple=loongarch64 %s \
+# RUN:     | llvm-objdump -d - \
+# RUN:     | FileCheck -check-prefixes=CHECK-ASM-AND-OBJ %s
 
-# CHECK-ASM: ldgt.b $a2, $a2, $s6
+# CHECK-ASM-AND-OBJ: ldgt.b $a2, $a2, $s6
 # CHECK-ASM: encoding: [0xc6,0x74,0x78,0x38]
 ldgt.b $a2, $a2, $s6
 
-# CHECK-ASM: ldgt.h $a1, $s8, $ra
+# CHECK-ASM-AND-OBJ: ldgt.h $a1, $s8, $ra
 # CHECK-ASM: encoding: [0xe5,0x87,0x78,0x38]
 ldgt.h $a1, $s8, $ra
 
-# CHECK-ASM: ldgt.w $t3, $s3, $a4
+# CHECK-ASM-AND-OBJ: ldgt.w $t3, $s3, $a4
 # CHECK-ASM: encoding: [0x4f,0x23,0x79,0x38]
 ldgt.w $t3, $s3, $a4
 
-# CHECK-ASM: ldgt.d $s0, $s2, $s8
+# CHECK-ASM-AND-OBJ: ldgt.d $s0, $s2, $s8
 # CHECK-ASM: encoding: [0x37,0xff,0x79,0x38]
 ldgt.d $s0, $s2, $s8
 
-# CHECK-ASM: ldle.b $a5, $t0, $t3
+# CHECK-ASM-AND-OBJ: ldle.b $a5, $t0, $t3
 # CHECK-ASM: encoding: [0x89,0x3d,0x7a,0x38]
 ldle.b $a5, $t0, $t3
 
-# CHECK-ASM: ldle.h $a7, $a7, $s0
+# CHECK-ASM-AND-OBJ: ldle.h $a7, $a7, $s0
 # CHECK-ASM: encoding: [0x6b,0xdd,0x7a,0x38]
 ldle.h $a7, $a7, $s0
 
-# CHECK-ASM: ldle.w $s1, $tp, $tp
+# CHECK-ASM-AND-OBJ: ldle.w $s1, $tp, $tp
 # CHECK-ASM: encoding: [0x58,0x08,0x7b,0x38]
 ldle.w $s1, $tp, $tp
 
-# CHECK-ASM: ldle.d $t8, $t3, $t4
+# CHECK-ASM-AND-OBJ: ldle.d $t8, $t3, $t4
 # CHECK-ASM: encoding: [0xf4,0xc1,0x7b,0x38]
 ldle.d $t8, $t3, $t4
 
-# CHECK-ASM: stgt.b $s4, $t7, $t8
+# CHECK-ASM-AND-OBJ: stgt.b $s4, $t7, $t8
 # CHECK-ASM: encoding: [0x7b,0x52,0x7c,0x38]
 stgt.b $s4, $t7, $t8
 
-# CHECK-ASM: stgt.h $t4, $a0, $a2
+# CHECK-ASM-AND-OBJ: stgt.h $t4, $a0, $a2
 # CHECK-ASM: encoding: [0x90,0x98,0x7c,0x38]
 stgt.h $t4, $a0, $a2
 
-# CHECK-ASM: stgt.w $s8, $s5, $t2
+# CHECK-ASM-AND-OBJ: stgt.w $s8, $s5, $t2
 # CHECK-ASM: encoding: [0x9f,0x3b,0x7d,0x38]
 stgt.w $s8, $s5, $t2
 
-# CHECK-ASM: stgt.d $s7, $r21, $s1
+# CHECK-ASM-AND-OBJ: stgt.d $s7, $r21, $s1
 # CHECK-ASM: encoding: [0xbe,0xe2,0x7d,0x38]
 stgt.d $s7, $r21, $s1
 
-# CHECK-ASM: stle.b $a6, $a0, $t4
+# CHECK-ASM-AND-OBJ: stle.b $a6, $a0, $t4
 # CHECK-ASM: encoding: [0x8a,0x40,0x7e,0x38]
 stle.b $a6, $a0, $t4
 
-# CHECK-ASM: stle.h $t5, $t5, $r21
+# CHECK-ASM-AND-OBJ: stle.h $t5, $t5, $r21
 # CHECK-ASM: encoding: [0x31,0xd6,0x7e,0x38]
 stle.h $t5, $t5, $r21
 
-# CHECK-ASM: stle.w $s0, $s5, $s6
+# CHECK-ASM-AND-OBJ: stle.w $s0, $s5, $s6
 # CHECK-ASM: encoding: [0x97,0x77,0x7f,0x38]
 stle.w $s0, $s5, $s6
 
-# CHECK-ASM: stle.d $s2, $s1, $s6
+# CHECK-ASM-AND-OBJ: stle.d $s2, $s1, $s6
 # CHECK-ASM: encoding: [0x19,0xf7,0x7f,0x38]
 stle.d $s2, $s1, $s6
 

llvm/test/MC/LoongArch/ISA/Basic/Integer/branch.s

 # Test valid branch instructions.
 
 # RUN: llvm-mc %s -triple=loongarch32 -show-encoding \
-# RUN:     | FileCheck -check-prefixes=CHECK-ASM %s
+# RUN:     | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s
 # RUN: llvm-mc %s -triple=loongarch64 -show-encoding \
-# RUN:     | FileCheck -check-prefixes=CHECK-ASM %s
+# RUN:     | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s
+# RUN: llvm-mc -filetype=obj -triple=loongarch32 < %s \
+# RUN:     | llvm-objdump -d - \
+# RUN:     | FileCheck -check-prefixes=CHECK-ASM-AND-OBJ %s
+# RUN: llvm-mc -filetype=obj -triple=loongarch64 < %s \
+# RUN:     | llvm-objdump -d - \
+# RUN:     | FileCheck -check-prefixes=CHECK-ASM-AND-OBJ %s
 
-# CHECK-ASM: beq $a6, $a3, 176
+# CHECK-ASM-AND-OBJ: beq $a6, $a3, 176
 # CHECK-ASM: encoding: [0x47,0xb1,0x00,0x58]
 beq $a6, $a3, 176
 
-# CHECK-ASM: bne $s2, $ra, 136
+# CHECK-ASM-AND-OBJ: bne $s2, $ra, 136
 # CHECK-ASM: encoding: [0x21,0x8b,0x00,0x5c]
 bne $s2, $ra, 136
 
-# CHECK-ASM: blt $t3, $s7, 168
+# CHECK-ASM-AND-OBJ: blt $t3, $s7, 168
 # CHECK-ASM: encoding: [0xfe,0xa9,0x00,0x60]
 blt $t3, $s7, 168
 
-# CHECK-ASM: bge $t0, $t3, 148
+# CHECK-ASM-AND-OBJ: bge $t0, $t3, 148
 # CHECK-ASM: encoding: [0x8f,0x95,0x00,0x64]
 bge $t0, $t3, 148
 
-# CHECK-ASM: bltu $t5, $a1, 4
+# CHECK-ASM-AND-OBJ: bltu $t5, $a1, 4
 # CHECK-ASM: encoding: [0x25,0x06,0x00,0x68]
 bltu $t5, $a1, 4
 
-# CHECK-ASM: bgeu $a2, $s0, 140
+# CHECK-ASM-AND-OBJ: bgeu $a2, $s0, 140
 # CHECK-ASM: encoding: [0xd7,0x8c,0x00,0x6c]
 bgeu $a2, $s0, 140
 
-# CHECK-ASM: beqz $a5, 96
+# CHECK-ASM-AND-OBJ: beqz $a5, 96
 # CHECK-ASM: encoding: [0x20,0x61,0x00,0x40]
 beqz $a5, 96
 
-# CHECK-ASM: bnez $sp, 212
+# CHECK-ASM-AND-OBJ: bnez $sp, 212
 # CHECK-ASM: encoding: [0x60,0xd4,0x00,0x44]
 bnez $sp, 212
 
-# CHECK-ASM: b 248
+# CHECK-ASM-AND-OBJ: b 248
 # CHECK-ASM: encoding: [0x00,0xf8,0x00,0x50]
 b 248
 
-# CHECK-ASM: bl 236
+# CHECK-ASM-AND-OBJ: bl 236
 # CHECK-ASM: encoding: [0x00,0xec,0x00,0x54]
 bl 236
 
-# CHECK-ASM: jirl $ra, $a0, 4
+# CHECK-ASM-AND-OBJ: jirl $ra, $a0, 4
 # CHECK-ASM: encoding: [0x81,0x04,0x00,0x4c]
 jirl $ra, $a0, 4
 

llvm/test/MC/LoongArch/ISA/Basic/Integer/crc.s

 # Test valid CRC check instructions.
 
 # RUN: llvm-mc %s -triple=loongarch64 -show-encoding \
-# RUN:     | FileCheck -check-prefixes=CHECK-ASM %s
+# RUN:     | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s
+# RUN: llvm-mc -filetype=obj -triple=loongarch64 < %s \
+# RUN:     | llvm-objdump -d - \
+# RUN:     | FileCheck -check-prefixes=CHECK-ASM-AND-OBJ %s
 
-# CHECK-ASM: crc.w.b.w $s1, $a3, $tp
+# CHECK-ASM-AND-OBJ: crc.w.b.w $s1, $a3, $tp
 # CHECK-ASM: encoding: [0xf8,0x08,0x24,0x00]
 crc.w.b.w $s1, $a3, $tp
 
-# CHECK-ASM: crc.w.h.w $s8, $a6, $t6
+# CHECK-ASM-AND-OBJ: crc.w.h.w $s8, $a6, $t6
 # CHECK-ASM: encoding: [0x5f,0xc9,0x24,0x00]
 crc.w.h.w $s8, $a6, $t6
 
-# CHECK-ASM: crc.w.w.w $s5, $a2, $a6
+# CHECK-ASM-AND-OBJ: crc.w.w.w $s5, $a2, $a6
 # CHECK-ASM: encoding: [0xdc,0x28,0x25,0x00]
 crc.w.w.w $s5, $a2, $a6
 
-# CHECK-ASM: crc.w.d.w $s5, $a7, $s8
+# CHECK-ASM-AND-OBJ: crc.w.d.w $s5, $a7, $s8
 # CHECK-ASM: encoding: [0x7c,0xfd,0x25,0x00]
 crc.w.d.w $s5, $a7, $s8
 
-# CHECK-ASM: crcc.w.b.w $t3, $t6, $sp
+# CHECK-ASM-AND-OBJ: crcc.w.b.w $t3, $t6, $sp
 # CHECK-ASM: encoding: [0x4f,0x0e,0x26,0x00]
 crcc.w.b.w $t3, $t6, $sp
 
-# CHECK-ASM: crcc.w.h.w $r21, $s6, $t6
+# CHECK-ASM-AND-OBJ: crcc.w.h.w $r21, $s6, $t6
 # CHECK-ASM: encoding: [0xb5,0xcb,0x26,0x00]
 crcc.w.h.w $r21, $s6, $t6
 
-# CHECK-ASM: crcc.w.w.w $t5, $t2, $t1
+# CHECK-ASM-AND-OBJ: crcc.w.w.w $t5, $t2, $t1
 # CHECK-ASM: encoding: [0xd1,0x35,0x27,0x00]
 crcc.w.w.w $t5, $t2, $t1
 
-# CHECK-ASM: crcc.w.d.w $s7, $r21, $s4
+# CHECK-ASM-AND-OBJ: crcc.w.d.w $s7, $r21, $s4
 # CHECK-ASM: encoding: [0xbe,0xee,0x27,0x00]
 crcc.w.d.w $s7, $r21, $s4
 

llvm/test/MC/LoongArch/ISA/Basic/Integer/invalid-dis.s

+# Test that disassembler rejects smaller data than 4 bytes.
+
+# RUN: llvm-mc -filetype=obj -triple=loongarch32 < %s \
+# RUN:     | llvm-objdump -d - | FileCheck %s
+# RUN: llvm-mc -filetype=obj -triple=loongarch64 < %s \
+# RUN:     | llvm-objdump -d - | FileCheck %s
+
+# CHECK: 11 <unknown>
+# CHECK: 22 <unknown>
+.2byte 0x2211

llvm/test/MC/LoongArch/ISA/Basic/Integer/memory.s

 # Test valid memory access instructions.
 
 # RUN: llvm-mc %s -triple=loongarch32 -show-encoding \
-# RUN:     | FileCheck -check-prefixes=CHECK32-ASM %s
+# RUN:     | FileCheck -check-prefixes=CHECK32-ASM,CHECK32-ASM-AND-OBJ %s
 # RUN: llvm-mc %s -triple=loongarch64 -show-encoding --defsym=LA64=1 \
-# RUN:     | FileCheck -check-prefixes=CHECK32-ASM,CHECK64-ASM %s
+# RUN:     | FileCheck -check-prefixes=CHECK32-ASM,CHECK32-ASM-AND-OBJ,CHECK64-ASM,CHECK64-ASM-AND-OBJ %s
+# RUN: llvm-mc -filetype=obj -triple=loongarch32 < %s \
+# RUN:     | llvm-objdump -d - \
+# RUN:     | FileCheck -check-prefixes=CHECK32-ASM-AND-OBJ %s
+# RUN: llvm-mc -filetype=obj -triple=loongarch64 < %s --defsym=LA64=1 \
+# RUN:     | llvm-objdump -d - \
+# RUN:     | FileCheck -check-prefixes=CHECK32-ASM-AND-OBJ,CHECK64-ASM-AND-OBJ %s
 
 #############################################################
 # Instructions for both loongarch32 and loongarch64
 #############################################################
 
-# CHECK32-ASM: ld.b $s1, $a4, 21
+# CHECK32-ASM-AND-OBJ: ld.b $s1, $a4, 21
 # CHECK32-ASM: encoding: [0x18,0x55,0x00,0x28]
 ld.b $s1, $a4, 21
 
-# CHECK32-ASM: ld.h $a3, $t6, 80
+# CHECK32-ASM-AND-OBJ: ld.h $a3, $t6, 80
 # CHECK32-ASM: encoding: [0x47,0x42,0x41,0x28]
 ld.h $a3, $t6, 80
 
-# CHECK32-ASM: ld.w $t6, $s3, 92
+# CHECK32-ASM-AND-OBJ: ld.w $t6, $s3, 92
 # CHECK32-ASM: encoding: [0x52,0x73,0x81,0x28]
 ld.w $t6, $s3, 92
 
-# CHECK32-ASM: ld.bu $t1, $t1, 150
+# CHECK32-ASM-AND-OBJ: ld.bu $t1, $t1, 150
 # CHECK32-ASM: encoding: [0xad,0x59,0x02,0x2a]
 ld.bu $t1, $t1, 150
 
-# CHECK32-ASM: ld.hu $t6, $s6, 198
+# CHECK32-ASM-AND-OBJ: ld.hu $t6, $s6, 198
 # CHECK32-ASM: encoding: [0xb2,0x1b,0x43,0x2a]
 ld.hu $t6, $s6, 198
 
-# CHECK32-ASM: st.b $sp, $a3, 95
+# CHECK32-ASM-AND-OBJ: st.b $sp, $a3, 95
 # CHECK32-ASM: encoding: [0xe3,0x7c,0x01,0x29]
 st.b $sp, $a3, 95
 
-# CHECK32-ASM: st.h $s2, $t4, 122
+# CHECK32-ASM-AND-OBJ: st.h $s2, $t4, 122
 # CHECK32-ASM: encoding: [0x19,0xea,0x41,0x29]
 st.h $s2, $t4, 122
 
-# CHECK32-ASM: st.w $t1, $t1, 175
+# CHECK32-ASM-AND-OBJ: st.w $t1, $t1, 175
 # CHECK32-ASM: encoding: [0xad,0xbd,0x82,0x29]
 st.w $t1, $t1, 175
 
-# CHECK32-ASM: preld 10, $zero, 23
+# CHECK32-ASM-AND-OBJ: preld 10, $zero, 23
 # CHECK32-ASM: encoding: [0x0a,0x5c,0xc0,0x2a]
 preld 10, $zero, 23
 
 
 #############################################################
 # Instructions only for loongarch64
 #############################################################
 
 .ifdef LA64
 
-# CHECK64-ASM: ld.wu $t2, $t7, 31
+# CHECK64-ASM-AND-OBJ: ld.wu $t2, $t7, 31
 # CHECK64-ASM: encoding: [0x6e,0x7e,0x80,0x2a]
 ld.wu $t2, $t7, 31
 
-# CHECK64-ASM: st.d $s7, $s7, 60
+# CHECK64-ASM-AND-OBJ: st.d $s7, $s7, 60
 # CHECK64-ASM: encoding: [0xde,0xf3,0xc0,0x29]
 st.d $s7, $s7, 60
 
-# CHECK64-ASM: ldx.b $s1, $ra, $tp
+# CHECK64-ASM-AND-OBJ: ldx.b $s1, $ra, $tp
 # CHECK64-ASM: encoding: [0x38,0x08,0x00,0x38]
 ldx.b $s1, $ra, $tp
 
-# CHECK64-ASM: ldx.h $fp, $fp, $t5
+# CHECK64-ASM-AND-OBJ: ldx.h $fp, $fp, $t5
 # CHECK64-ASM: encoding: [0xd6,0x46,0x04,0x38]
 ldx.h $fp, $fp, $t5
 
-# CHECK64-ASM: ldx.w $s2, $a7, $s0
+# CHECK64-ASM-AND-OBJ: ldx.w $s2, $a7, $s0
 # CHECK64-ASM: encoding: [0x79,0x5d,0x08,0x38]
 ldx.w $s2, $a7, $s0
 
-# CHECK64-ASM: ldx.d $t6, $s0, $t8
+# CHECK64-ASM-AND-OBJ: ldx.d $t6, $s0, $t8
 # CHECK64-ASM: encoding: [0xf2,0x52,0x0c,0x38]
 ldx.d $t6, $s0, $t8
 
-# CHECK64-ASM: ldx.bu $a7, $a5, $a5
+# CHECK64-ASM-AND-OBJ: ldx.bu $a7, $a5, $a5
 # CHECK64-ASM: encoding: [0x2b,0x25,0x20,0x38]
 ldx.bu $a7, $a5, $a5
 
-# CHECK64-ASM: ldx.hu $fp, $s0, $s4
+# CHECK64-ASM-AND-OBJ: ldx.hu $fp, $s0, $s4
 # CHECK64-ASM: encoding: [0xf6,0x6e,0x24,0x38]
 ldx.hu $fp, $s0, $s4
 
-# CHECK64-ASM: ldx.wu $a4, $s1, $s5
+# CHECK64-ASM-AND-OBJ: ldx.wu $a4, $s1, $s5
 # CHECK64-ASM: encoding: [0x08,0x73,0x28,0x38]
 ldx.wu $a4, $s1, $s5
 
-# CHECK64-ASM: stx.b $t7, $ra, $sp
+# CHECK64-ASM-AND-OBJ: stx.b $t7, $ra, $sp
 # CHECK64-ASM: encoding: [0x33,0x0c,0x10,0x38]
 stx.b $t7, $ra, $sp
 
-# CHECK64-ASM: stx.h $zero, $s5, $s3
+# CHECK64-ASM-AND-OBJ: stx.h $zero, $s5, $s3
 # CHECK64-ASM: encoding: [0x80,0x6b,0x14,0x38]
 stx.h $zero, $s5, $s3
 
-# CHECK64-ASM: stx.w $a3, $a0, $s8
+# CHECK64-ASM-AND-OBJ: stx.w $a3, $a0, $s8
 # CHECK64-ASM: encoding: [0x87,0x7c,0x18,0x38]
 stx.w $a3, $a0, $s8
 
-# CHECK64-ASM: stx.d $a3, $s8, $a6
+# CHECK64-ASM-AND-OBJ: stx.d $a3, $s8, $a6
 # CHECK64-ASM: encoding: [0xe7,0x2b,0x1c,0x38]
 stx.d $a3, $s8, $a6
 
-# CHECK64-ASM: ldptr.w $s3, $a2, 60
+# CHECK64-ASM-AND-OBJ: ldptr.w $s3, $a2, 60
 # CHECK64-ASM: encoding: [0xda,0x3c,0x00,0x24]
 ldptr.w $s3, $a2, 60
 
-# CHECK64-ASM: ldptr.d $a1, $s6, 244
+# CHECK64-ASM-AND-OBJ: ldptr.d $a1, $s6, 244
 # CHECK64-ASM: encoding: [0xa5,0xf7,0x00,0x26]
 ldptr.d $a1, $s6, 244
 
-# CHECK64-ASM: stptr.w $s5, $a1, 216
+# CHECK64-ASM-AND-OBJ: stptr.w $s5, $a1, 216
 # CHECK64-ASM: encoding: [0xbc,0xd8,0x00,0x25]
 stptr.w $s5, $a1, 216
 
-# CHECK64-ASM: stptr.d $t2, $s1, 196
+# CHECK64-ASM-AND-OBJ: stptr.d $t2, $s1, 196
 # CHECK64-ASM: encoding: [0x0e,0xc7,0x00,0x27]
 stptr.d $t2, $s1, 196
 
 .endif
 

llvm/test/MC/LoongArch/ISA/Basic/Integer/misc.s

 # Test valid misc instructions.
 
 # RUN: llvm-mc %s -triple=loongarch32 -show-encoding \
-# RUN:     | FileCheck -check-prefixes=CHECK32-ASM %s
+# RUN:     | FileCheck -check-prefixes=CHECK32-ASM,CHECK32-ASM-AND-OBJ %s
 # RUN: llvm-mc %s -triple=loongarch64 -show-encoding --defsym=LA64=1 \
-# RUN:     | FileCheck -check-prefixes=CHECK32-ASM,CHECK64-ASM %s
+# RUN:     | FileCheck -check-prefixes=CHECK32-ASM,CHECK32-ASM-AND-OBJ,CHECK64-ASM,CHECK64-ASM-AND-OBJ %s
+# RUN: llvm-mc -filetype=obj -triple=loongarch32 < %s \
+# RUN:     | llvm-objdump -d - \
+# RUN:     | FileCheck -check-prefixes=CHECK32-ASM-AND-OBJ %s
+# RUN: llvm-mc -filetype=obj -triple=loongarch64 < %s --defsym=LA64=1 \
+# RUN:     | llvm-objdump -d - \
+# RUN:     | FileCheck -check-prefixes=CHECK32-ASM-AND-OBJ,CHECK64-ASM-AND-OBJ %s
 
 #############################################################
 # Instructions for both loongarch32 and loongarch64
 #############################################################
 
-# CHECK32-ASM: syscall 100
+# CHECK32-ASM-AND-OBJ: syscall 100
 # CHECK32-ASM: encoding: [0x64,0x00,0x2b,0x00]
 syscall 100
 
-# CHECK32-ASM: break 199
+# CHECK32-ASM-AND-OBJ: break 199
 # CHECK32-ASM: encoding: [0xc7,0x00,0x2a,0x00]
 break 199
 
-# CHECK32-ASM: rdtimel.w $s1, $a0
+# CHECK32-ASM-AND-OBJ: rdtimel.w $s1, $a0
 # CHECK32-ASM: encoding: [0x98,0x60,0x00,0x00]
 rdtimel.w $s1, $a0
 
-# CHECK32-ASM: rdtimeh.w $a7, $a1
+# CHECK32-ASM-AND-OBJ: rdtimeh.w $a7, $a1
 # CHECK32-ASM: encoding: [0xab,0x64,0x00,0x00]
 rdtimeh.w $a7, $a1
 
-# CHECK32-ASM: cpucfg $sp, $a4
+# CHECK32-ASM-AND-OBJ: cpucfg $sp, $a4
 # CHECK32-ASM: encoding: [0x03,0x6d,0x00,0x00]
 cpucfg $sp, $a4
 
 
 #############################################################
 # Instructions only for loongarch64
 #############################################################
 
 .ifdef LA64
 
-# CHECK64-ASM: asrtle.d $t0, $t5
+# CHECK64-ASM-AND-OBJ: asrtle.d $t0, $t5
 # CHECK64-ASM: encoding: [0x80,0x45,0x01,0x00]
 asrtle.d $t0, $t5
 
-# CHECK64-ASM: asrtgt.d $t8, $t8
+# CHECK64-ASM-AND-OBJ: asrtgt.d $t8, $t8
 # CHECK64-ASM: encoding: [0x80,0xd2,0x01,0x00]
 asrtgt.d $t8, $t8
 
-# CHECK64-ASM: rdtime.d $tp, $t3
+# CHECK64-ASM-AND-OBJ: rdtime.d $tp, $t3
 # CHECK64-ASM: encoding: [0xe2,0x69,0x00,0x00]
 rdtime.d $tp, $t3
 
 .endif
 

llvm/test/MC/LoongArch/ISA/Basic/Integer/pseudos.s

 # Test valid pseudo instructions
 
 # RUN: llvm-mc %s -triple=loongarch32 -show-encoding \
-# RUN:     | FileCheck -check-prefixes=CHECK-ASM %s
+# RUN:     | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s
 # RUN: llvm-mc %s -triple=loongarch64 -show-encoding \
-# RUN:     | FileCheck -check-prefixes=CHECK-ASM %s
+# RUN:     | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s
+# RUN: llvm-mc -filetype=obj -triple=loongarch32 < %s \
+# RUN:     | llvm-objdump -d - \
+# RUN:     | FileCheck -check-prefixes=CHECK-ASM-AND-OBJ %s
+# RUN: llvm-mc -filetype=obj -triple=loongarch64 < %s \
+# RUN:     | llvm-objdump -d - \
+# RUN:     | FileCheck -check-prefixes=CHECK-ASM-AND-OBJ %s
 
-# CHECK-ASM: nop
+# CHECK-ASM-AND-OBJ: nop
 # CHECK-ASM: encoding: [0x00,0x00,0x40,0x03]
 nop
 
-# CHECK-ASM: move $a4, $a5
+# CHECK-ASM-AND-OBJ: move $a4, $a5
 # CHECK-ASM: encoding: [0x28,0x01,0x15,0x00]
 move $a4, $a5

llvm/test/MC/LoongArch/Misc/aligned-nops.s

+# RUN: llvm-mc -filetype=obj -triple loongarch64 < %s \
+# RUN:     | llvm-objdump -d - | FileCheck -check-prefix=CHECK-INST %s
+
+# alpha and main are 8 byte alignment
+# but the alpha function's size is 4
+# So assembler will insert a nop to make sure 8 byte alignment.
+
+        .text
+       .p2align        3
+       .type   alpha,@function
+alpha:
+# BB#0:
+       addi.d  $sp, $sp, -16
+# CHECK-INST: nop
+.Lfunc_end0:
+       .size   alpha, .Lfunc_end0-alpha
+                                        # -- End function
+       .globl  main
+       .p2align        3
+       .type   main,@function
+main:                                   # @main
+# BB#0:
+.Lfunc_end1:
+       .size   main, .Lfunc_end1-main
+                                        # -- End function

llvm/test/MC/LoongArch/Misc/unaligned-nops.s

+# RUN: not --crash llvm-mc -filetype=obj  -triple=loongarch64 %s -o %t
+.byte 1
+# CHECK: LLVM ERROR: unable to write nop sequence of 3 bytes
+.p2align 2
+foo: