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[AMDGPU] Pre-commit test for wait between agpr & vgpr
ClosedPublic

Authored by Joe_Nash on Feb 14 2022, 11:26 AM.

Details

Summary

Due to a typo of 256 to 226, the SIInsertWaitcnt pass thinks
several registers are aliased from a waitcnt PoV including vgpr226
and agpr0, vgpr227 and agpr1...

This is a test of the behavior.
NFC.

Diff Detail

Event Timeline

Joe_Nash created this revision.Feb 14 2022, 11:26 AM
Joe_Nash requested review of this revision.Feb 14 2022, 11:26 AM
Herald added a project: Restricted Project. · View Herald TranscriptFeb 14 2022, 11:26 AM
rampitec accepted this revision.Feb 14 2022, 11:28 AM

Thank you. Good catch!

This revision is now accepted and ready to land.Feb 14 2022, 11:28 AM
Joe_Nash added inline comments.Feb 14 2022, 11:28 AM
llvm/test/CodeGen/AMDGPU/waitcnt-agpr.mir
65

Why are these {{ $}} lines showing up? Is that a problem?

Joe_Nash added inline comments.Feb 14 2022, 11:46 AM
llvm/test/CodeGen/AMDGPU/waitcnt-agpr.mir
65

This is the result from running the utils/update_mir_test_checks.py script. The pattern is now CHECK-NEXT, and these are whitespace lines to exactly match whitespace lines in the output. @rampitec please let me know if its ok.

rampitec added inline comments.Feb 14 2022, 11:54 AM
llvm/test/CodeGen/AMDGPU/waitcnt-agpr.mir
65

This is OK, go ahead.

This revision was landed with ongoing or failed builds.Feb 14 2022, 12:07 PM
This revision was automatically updated to reflect the committed changes.
foad added inline comments.Feb 15 2022, 2:54 AM
llvm/test/CodeGen/AMDGPU/waitcnt-agpr.mir
65

In future maybe re-run update_mir_test_checks first and commit it as NFC (no review required) before changing any tests.