[Sparc] Implement BFD_RELOC_NONE

[ro]

Summary

instrprof-icall-promo.test FAILs on Solaris/sparcv9:

Profile-sparc :: instrprof-icall-promo.test
Profile-sparcv9 :: instrprof-icall-promo.test

when compiling compiler-rt/test/profile/Inputs/instrprof-icall-promo_2.cpp with

fatal error: error in backend: Relocation for CG Profile could not be created: unknown relocation name

This happens because the Sparc backend doesn't implement BFD_RELOC_NONE. This patch fixes that, following what X86 does.

Tested on sparcv9-sun-solaris2.11.

[MaskRay]

The changes look good. adjustFixupValue may or may not need FK_NONE, depending on how it is called in various targets.

Can you add a test like test/MC/RISCV/reloc-directive.s ?

[ro]

In D118136#3270096, @MaskRay wrote:

The changes look good. adjustFixupValue may or may not need FK_NONE, depending on how it is called in various targets.

I've removed the handling and found no ill effect.

Can you add a test like test/MC/RISCV/reloc-directive.s ?

Done now: I'd initially been lazy, following several other targets that didn't have testcases either.

llvm/lib/Target/Sparc/MCTargetDesc/SparcELFObjectWriter.cpp

74

I didn't: while clang-format-diff.py does make that change,
it causes that single case to diverge from all others.

[ro]

• • Incorporate review comments.
• Add testcase.

[MaskRay]

Thanks!

[MaskRay]

Done now: I'd initially been lazy, following several other targets that didn't have testcases either.

Not the targets that I have added the functionality for. Tests prevent regression.

[ro]

In D118136#3277002, @MaskRay wrote:

Done now: I'd initially been lazy, following several other targets that didn't have testcases either.

Not the targets that I have added the functionality for. Tests prevent regression.

Indeed: investigating the objects resulting from the testcase found a couple of issues with LLVM Sparc reloc handling (unrelated to this patch)
that I mean to address separately.

llvm/lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp

 //===-- SparcAsmBackend.cpp - Sparc Assembler Backend ---------------------===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
 
 #include "MCTargetDesc/SparcFixupKinds.h"
 #include "MCTargetDesc/SparcMCTargetDesc.h"
+#include "llvm/ADT/StringSwitch.h"
 #include "llvm/MC/MCAsmBackend.h"
 #include "llvm/MC/MCELFObjectWriter.h"
 #include "llvm/MC/MCExpr.h"
 #include "llvm/MC/MCFixupKindInfo.h"
 #include "llvm/MC/MCObjectWriter.h"
 #include "llvm/MC/MCSubtargetInfo.h"
 #include "llvm/MC/MCValue.h"
 #include "llvm/MC/TargetRegistry.h"
SparcAsmBackend(const Target &T)
         : MCAsmBackend(StringRef(T.getName()) == "sparcel" ? support::little
                                                            : support::big),
           TheTarget(T), Is64Bit(StringRef(TheTarget.getName()) == "sparcv9") {}
 
     unsigned getNumFixupKinds() const override {
       return Sparc::NumTargetFixupKinds;
     }
 
+    Optional<MCFixupKind> getFixupKind(StringRef Name) const override {
+      unsigned Type;
+      Type = llvm::StringSwitch<unsigned>(Name)
+#define ELF_RELOC(X, Y) .Case(#X, Y)
+#include "llvm/BinaryFormat/ELFRelocs/Sparc.def"
+#undef ELF_RELOC
+                 .Case("BFD_RELOC_NONE", ELF::R_SPARC_NONE)
+                 .Case("BFD_RELOC_8", ELF::R_SPARC_8)
+                 .Case("BFD_RELOC_16", ELF::R_SPARC_16)
+                 .Case("BFD_RELOC_32", ELF::R_SPARC_32)
+                 .Case("BFD_RELOC_64", ELF::R_SPARC_64)
+                 .Default(-1u);
+      if (Type == -1u)
+        return None;
+      return static_cast<MCFixupKind>(FirstLiteralRelocationKind + Type);
+    }
+
     const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const override {
       const static MCFixupKindInfo InfosBE[Sparc::NumTargetFixupKinds] = {
         // name                    offset bits  flags
         { "fixup_sparc_call30",     2,     30,  MCFixupKindInfo::FKF_IsPCRel },
         { "fixup_sparc_br22",      10,     22,  MCFixupKindInfo::FKF_IsPCRel },
         { "fixup_sparc_br19",      13,     19,  MCFixupKindInfo::FKF_IsPCRel },
         { "fixup_sparc_br16_2",    10,      2,  MCFixupKindInfo::FKF_IsPCRel },
         { "fixup_sparc_br16_14",   18,     14,  MCFixupKindInfo::FKF_IsPCRel },
const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const override {
         { "fixup_sparc_tls_ie_lo10",    0, 10,  0 },
         { "fixup_sparc_tls_ie_ld",      0,  0,  0 },
         { "fixup_sparc_tls_ie_ldx",     0,  0,  0 },
         { "fixup_sparc_tls_ie_add",     0,  0,  0 },
         { "fixup_sparc_tls_le_hix22",   0,  0,  0 },
         { "fixup_sparc_tls_le_lox10",   0,  0,  0 }
       };
 
+      // Fixup kinds from .reloc directive are like R_SPARC_NONE. They do
+      // not require any extra processing.
+      if (Kind >= FirstLiteralRelocationKind)
+        return MCAsmBackend::getFixupKindInfo(FK_NONE);
+
       if (Kind < FirstTargetFixupKind)
         return MCAsmBackend::getFixupKindInfo(Kind);
 
       assert(unsigned(Kind - FirstTargetFixupKind) < getNumFixupKinds() &&
              "Invalid kind!");
       if (Endian == support::little)
         return InfosLE[Kind - FirstTargetFixupKind];
 
       return InfosBE[Kind - FirstTargetFixupKind];
     }
 
     bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup,
                                const MCValue &Target) override {
+      if (Fixup.getKind() >= FirstLiteralRelocationKind)
+        return true;
       switch ((Sparc::Fixups)Fixup.getKind()) {
       default:
         return false;
       case Sparc::fixup_sparc_wplt30:
         if (Target.getSymA()->getSymbol().isTemporary())
           return false;
         LLVM_FALLTHROUGH;
       case Sparc::fixup_sparc_tls_gd_hi22:
public:
     ELFSparcAsmBackend(const Target &T, Triple::OSType OSType) :
       SparcAsmBackend(T), OSType(OSType) { }
 
     void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
                     const MCValue &Target, MutableArrayRef<char> Data,
                     uint64_t Value, bool IsResolved,
                     const MCSubtargetInfo *STI) const override {
 
+      if (Fixup.getKind() >= FirstLiteralRelocationKind)
+        return;
       Value = adjustFixupValue(Fixup.getKind(), Value);
       if (!Value) return;           // Doesn't change encoding.
 
       unsigned NumBytes = getFixupKindNumBytes(Fixup.getKind());
       unsigned Offset = Fixup.getOffset();
       // For each byte of the fragment that the fixup touches, mask in the bits
       // from the fixup value. The Value has been "split up" into the
       // appropriate bitfields above.

llvm/lib/Target/Sparc/MCTargetDesc/SparcELFObjectWriter.cpp

namespace {
 
   };
 }
 
 unsigned SparcELFObjectWriter::getRelocType(MCContext &Ctx,
                                             const MCValue &Target,
                                             const MCFixup &Fixup,
                                             bool IsPCRel) const {
+  MCFixupKind Kind = Fixup.getKind();
+  if (Kind >= FirstLiteralRelocationKind)
+    return Kind - FirstLiteralRelocationKind;
 
   if (const SparcMCExpr *SExpr = dyn_cast<SparcMCExpr>(Fixup.getValue())) {
     if (SExpr->getKind() == SparcMCExpr::VK_Sparc_R_DISP32)
       return ELF::R_SPARC_DISP32;
   }
 
   if (IsPCRel) {
     switch(Fixup.getTargetKind()) {
if (IsPCRel) {
     case Sparc::fixup_sparc_pc10:    return ELF::R_SPARC_PC10;
     case Sparc::fixup_sparc_wplt30:  return ELF::R_SPARC_WPLT30;
     }
   }
 
   switch(Fixup.getTargetKind()) {
   default:
     llvm_unreachable("Unimplemented fixup -> relocation");
+  case FK_NONE:                  return ELF::R_SPARC_NONE;
   case FK_Data_1:                return ELF::R_SPARC_8;
   case FK_Data_2:                return ((Fixup.getOffset() % 2)
                                          ? ELF::R_SPARC_UA16
                                          : ELF::R_SPARC_16);
   case FK_Data_4:                return ((Fixup.getOffset() % 4)
                                          ? ELF::R_SPARC_UA32
                                          : ELF::R_SPARC_32);
   case FK_Data_8:                return ((Fixup.getOffset() % 8)

llvm/test/MC/Sparc/reloc-directive.s

+# RUN: llvm-mc -triple=sparc %s | FileCheck --check-prefix=PRINT %s
+# RUN: llvm-mc -triple=sparcv9 %s | FileCheck --check-prefix=PRINT %s
+# RUN: llvm-mc -filetype=obj -triple=sparc %s | llvm-readobj -r - | FileCheck %s
+# RUN: llvm-mc -filetype=obj -triple=sparcv9 %s | llvm-readobj -r - | FileCheck %s
+
+# PRINT: .reloc 8, R_SPARC_NONE, .data
+# PRINT: .reloc 4, R_SPARC_NONE, foo+4
+# PRINT: .reloc 0, R_SPARC_NONE, 8
+# PRINT: .reloc 0, R_SPARC_32, .data+2
+# PRINT: .reloc 0, R_SPARC_UA16, foo+3
+# PRINT: .reloc 0, R_SPARC_DISP32, foo+5
+# PRINT:      .reloc 0, BFD_RELOC_NONE, 9
+# PRINT-NEXT: .reloc 0, BFD_RELOC_32, foo+2
+# PRINT-NEXT: .reloc 0, BFD_RELOC_64, foo+3
+
+# CHECK:      0x8 R_SPARC_NONE .data 0x0
+# CHECK-NEXT: 0x4 R_SPARC_NONE foo 0x4
+# CHECK-NEXT: 0x0 R_SPARC_NONE - 0x8
+# CHECK-NEXT: 0x0 R_SPARC_32 .data 0x2
+# CHECK-NEXT: 0x0 R_SPARC_UA16 foo 0x3
+# CHECK-NEXT: 0x0 R_SPARC_DISP32 foo 0x5
+# CHECK-NEXT: 0x0 R_SPARC_NONE - 0x9
+# CHECK-NEXT: 0x0 R_SPARC_32 foo 0x2
+# CHECK-NEXT: 0x0 R_SPARC_64 foo 0x3
+.text
+  ret
+  nop
+  nop
+  .reloc 8, R_SPARC_NONE, .data
+  .reloc 4, R_SPARC_NONE, foo+4
+  .reloc 0, R_SPARC_NONE, 8
+
+  .reloc 0, R_SPARC_32, .data+2
+  .reloc 0, R_SPARC_UA16, foo+3
+  .reloc 0, R_SPARC_DISP32, foo+5
+
+  .reloc 0, BFD_RELOC_NONE, 9
+  .reloc 0, BFD_RELOC_32, foo+2
+  .reloc 0, BFD_RELOC_64, foo+3
+
+.data
+.globl foo
+foo:
+  .word 0
+  .word 0
+  .word 0