Corrected fragment size for tf32 LD B matrix.

[JackAKirk]

Summary

Signed-off-by: JackAKirk <[e-mail]>

[JackAKirk]

Note that the test, llvm/test/CodeGen/NVPTX/wmma.py line 210, had the correct value already but didn't seem to cover the mistake.

[tra]

LGTM. Should I commit the patch on your behalf?

In D118023#3265601, @JackAKirk wrote:

Note that the test, llvm/test/CodeGen/NVPTX/wmma.py line 210, had the correct value already but didn't seem to cover the mistake.

It appears that we do not actually test for the correct number of registers used in an instruction argument, only for the correct instruction variant itself.
It should've been caught if we were to attempt assembling generated PTX with ptxas.

[JackAKirk]

In D118023#3266877, @tra wrote:

LGTM. Should I commit the patch on your behalf?

In D118023#3265601, @JackAKirk wrote:

Note that the test, llvm/test/CodeGen/NVPTX/wmma.py line 210, had the correct value already but didn't seem to cover the mistake.

It appears that we do not actually test for the correct number of registers used in an instruction argument, only for the correct instruction variant itself.
It should've been caught if we were to attempt assembling generated PTX with ptxas.

Thanks I can try to land it myself. I executed arc land and it is asking me to "Land these changes". I am not sure that I have the permissions for this to succeed, but I can try. I have not done this before: is it safe to enter simply "y" with the existing commit message (name/email in the commit are correct)?

[tra]

If you are not sure if you have commit access, you probably do not. It must be explicitly granted:
https://llvm.org/docs/DeveloperPolicy.html#obtaining-commit-access

As for landing the patch, I do it manually with git. Never tried it with arc, so I can't say much, except that it will not work until you have commit access.

[JackAKirk]

In D118023#3266987, @tra wrote:

If you are not sure if you have commit access, you probably do not. It must be explicitly granted:
https://llvm.org/docs/DeveloperPolicy.html#obtaining-commit-access

As for landing the patch, I do it manually with git. Never tried it with arc, so I can't say much, except that it will not work until you have commit access.

Ah OK. In that case then yes please can you land it for me?

[tra]

The patch uses a @gmail.com email. Should I change it to JackAKirk <[e-mail]> to match the sign-off email?

[JackAKirk]

In D118023#3267271, @tra wrote:

The patch uses a @gmail.com email. Should I change it to JackAKirk <[e-mail]> to match the sign-off email?

Ah yes thanks for catching that. Please use JackAKirk <[e-mail]>.

clang/lib/CodeGen/CGBuiltin.cpp

case NVPTX::BI__mma_bf16_m8n32k16_ld_b:
     return MMA_LDST(8, m8n32k16_load_b_bf16);
   case NVPTX::BI__mma_bf16_m32n8k16_ld_a:
     return MMA_LDST(8, m32n8k16_load_a_bf16);
   case NVPTX::BI__mma_bf16_m32n8k16_ld_b:
     return MMA_LDST(2, m32n8k16_load_b_bf16);
   case NVPTX::BI__mma_tf32_m16n16k8_ld_a:
     return MMA_LDST(4, m16n16k8_load_a_tf32);
   case NVPTX::BI__mma_tf32_m16n16k8_ld_b:
-    return MMA_LDST(2, m16n16k8_load_b_tf32);
+    return MMA_LDST(4, m16n16k8_load_b_tf32);
   case NVPTX::BI__mma_tf32_m16n16k8_ld_c:
     return MMA_LDST(8, m16n16k8_load_c_f32);
 
   // NOTE: We need to follow inconsitent naming scheme used by NVCC.  Unlike
   // PTX and LLVM IR where stores always use fragment D, NVCC builtins always
   // use fragment C for both loads and stores.
   // FP MMA stores.
   case NVPTX::BI__hmma_m16n16k16_st_c_f16: