[InstCombine] Fold ashr-exact into a icmp-ugt.

[nadav]

Summary

This commit optimizes the code sequence icmp-XXX (ashr-exact (X, C_1), C_2). Instcombine already implements this optimization for sgt, and this patch adds support to additional predicates. The transformation is legal for all predicates if the 'exact' flag is set, and to SGE, UGE, SLT, ULT when the exact flag is not present.

This pattern is found in the std::vector bounds checks code of the at() method.

Alive2 proof:
https://alive2.llvm.org/ce/z/JT_WL8

[craig.topper]

Upload with full context please.

[lebedev.ri]

Given exact ashr, this is a valid fold regardless of the predicate.
Non-exact is valid for ult/uge / slt/sge predicates.

[nadav]

@lebedev.ri Good catch. Thank you. I verified that when 'exact' is present the transformation is valid for all predicates.

@craig.topper I added context to the patch. Thank you.

[craig.topper]

lib/Transforms/InstCombine/InstCombineCompares.cpp

2242

Can ICMP_SGE and ICMP_UGE get here? We're starting from a shift by constant that should be canonicalized to SGT and UGT right?

2242

Oops we're starting with a compare with constant that should be canonicalized to SGT to UGT if it was SGE or UGE.

[craig.topper]

lib/Transforms/InstCombine/InstCombineCompares.cpp

2250

Does this transform work for ICMP_UGT?

[craig.topper]

test/Transforms/InstCombine/icmp-shr-lt-gt.ll

2219

Top of the test context is missing. Should this test be generated by update_test_checks.py?

[nadav]

@craig.topper thank you for the review. I removed the two predicated that are canonicalized before this method is called (ICMP_SGE and ICMP_UGE). I also used the script update_test_checks.py to update the check lines. I also verified with alive2 that the transformation is correct for ICMP_UGT, but only when the exact flag is present (link: https://alive2.llvm.org/ce/z/qBhxAM).

[craig.topper]

In D117252#3242535, @nadav wrote:

@craig.topper thank you for the review. I removed the two predicated that are canonicalized before this method is called (ICMP_SGE and ICMP_UGE). I also used the script update_test_checks.py to update the check lines. I also verified with alive2 that the transformation is correct for ICMP_UGT, but only when the exact flag is present (link: https://alive2.llvm.org/ce/z/qBhxAM).

Thanks Nadav. My UGT question was directed at the transform immediately below. Where it’s looking for SGT and a constant that is 1 less. That would be the form that UGE would canonicalize to I think. Something like this https://alive2.llvm.org/ce/z/6EXVFs

[nadav]

@craig.topper Ah. I think that the ICMP_UGT transformation is correct, but if you don't mind I prefer to land the two changes separately. I can start a second review for the ICMP_UGT change. Is that okay with you?

[craig.topper]

In D117252#3242665, @nadav wrote:

@craig.topper Ah. I think that the ICMP_UGT transformation is correct, but if you don't mind I prefer to land the two changes separately. I can start a second review for the ICMP_UGT change. Is that okay with you?

That's ok with me.

[spatel]

Logic looks good.
Please pre-commit the new tests with baseline CHECK lines.
It would be nice to have at least one test with a vector type and splat constants, so we have coverage for that possibility. I'd also add at least one test with an extra use of the ashr, so we know that doesn't impede the transform.

lib/Transforms/InstCombine/InstCombineCompares.cpp

2243–2244

This comment should be updated to be more general. Author's pref for notation/formatting, but it's something like this:

// When ShAmtC can be shifted losslessly:
// (X s>> ShAmtC) < C --> X < (C << ShAmtC)  (either signed/unsigned)
// (X s_exact>> ShAmtC) [AnyPred] C --> X [AnyPred] (C << ShAmtC)

test/Transforms/InstCombine/icmp-shr.ll

716

Here and below: remove stale test comments to avoid confusion.

[nadav]

@spatel Thank you for the review. I added the pre-commit tests in a new diff (https://reviews.llvm.org/D117338). I've also made the changes to the comment as you suggested. Are you willing to approve the diff or do you want to see the comment and do another round of review?

[spatel]

In D117252#3244304, @nadav wrote:

@spatel Thank you for the review. I added the pre-commit tests in a new diff (https://reviews.llvm.org/D117338). I've also made the changes to the comment as you suggested. Are you willing to approve the diff or do you want to see the comment and do another round of review?

I don't have anything other than the minor feedback, so no, I don't need another round of review. LGTM.

[lebedev.ri]

lib/Transforms/InstCombine/InstCombineCompares.cpp

2242

This should be

if (IsExact || Pred == CmpInst::ICMP_SLT || Pred == CmpInst::ICMP_ULT) {

test/Transforms/InstCombine/icmp-shr-lt-gt.ll

2219

Could you please ensure that there is a test for *every* comparison prediocate? (x2 because with/without exact)

[nadav]

@lebedev.ri Okay. I'll add the extra tests, but I'll do it in a separate diff because I've already landed the pre-commit diff that added the extra tests. I also need to look at the optimization that craig pointed out.

[goncharov]

FYI we see internal test became flaky after this change under MSAN. It was resolved later by https://reviews.llvm.org/D117110 (@spatel). Unfortunately I don't have any additional information.

lib/Transforms/InstCombine/InstCombineCompares.cpp

   Constant *C = dyn_cast<Constant>(Op1);
   if (!C || C->canTrap())
     return nullptr;
 
   if (auto *Phi = dyn_cast<PHINode>(Op0))
     if (all_of(Phi->operands(), [](Value *V) { return isa<Constant>(V); })) {
       Type *Ty = Cmp.getType();
       Builder.SetInsertPoint(Phi);
       PHINode *NewPhi =
           Builder.CreatePHI(Ty, Phi->getNumOperands());
       for (BasicBlock *Predecessor : predecessors(Phi->getParent())) {
         auto *Input =
             cast<Constant>(Phi->getIncomingValueForBlock(Predecessor));
         auto *BoolInput = ConstantExpr::getCompare(Pred, Input, C);
         NewPhi->addIncoming(BoolInput, Predecessor);
       }
       NewPhi->takeName(&Cmp);

       // true or false now.
       if (Cmp.getPredicate() == ICmpInst::ICMP_EQ)
         return replaceInstUsesWith(Cmp, ConstantInt::getFalse(Cmp.getType()));
       if (Cmp.getPredicate() == ICmpInst::ICMP_NE)
         return replaceInstUsesWith(Cmp, ConstantInt::getTrue(Cmp.getType()));
     } else {
       Value *NewAnd = Builder.CreateAnd(
           Shift->getOperand(0), ConstantInt::get(And->getType(), NewAndCst));
       return new ICmpInst(Cmp.getPredicate(),
           NewAnd, ConstantInt::get(And->getType(), NewCmpCst));
     }
   }
 
   // Turn ((X >> Y) & C2) == 0  into  (X & (C2 << Y)) == 0.  The latter is
   // preferable because it allows the C2 << Y expression to be hoisted out of a
   // loop if Y is invariant and X is not.
   if (Shift->hasOneUse() && C1.isZero() && Cmp.isEquality() &&

   bool IsAShr = Shr->getOpcode() == Instruction::AShr;
   bool IsExact = Shr->isExact();
   Type *ShrTy = Shr->getType();
   // TODO: If we could guarantee that InstSimplify would handle all of the
   // constant-value-based preconditions in the folds below, then we could assert
   // those conditions rather than checking them. This is difficult because of
   // undef/poison (PR34838).
   if (IsAShr) {
-    if (Pred == CmpInst::ICMP_SLT || (Pred == CmpInst::ICMP_SGT && IsExact)) {
+    if (Pred == CmpInst::ICMP_SLT || Pred == CmpInst::ICMP_ULT || IsExact) {
       // icmp slt (ashr X, ShAmtC), C --> icmp slt X, (C << ShAmtC)
       // icmp sgt (ashr exact X, ShAmtC), C --> icmp sgt X, (C << ShAmtC)
       APInt ShiftedC = C.shl(ShAmtVal);
       if (ShiftedC.ashr(ShAmtVal) == C)
         return new ICmpInst(Pred, X, ConstantInt::get(ShrTy, ShiftedC));
     }
     if (Pred == CmpInst::ICMP_SGT) {
       // icmp sgt (ashr X, ShAmtC), C --> icmp sgt X, ((C + 1) << ShAmtC) - 1
       APInt ShiftedC = (C + 1).shl(ShAmtVal) - 1;
       if (!C.isMaxSignedValue() && !(C + 1).shl(ShAmtVal).isMinSignedValue() &&
           (ShiftedC + 1).ashr(ShAmtVal) == (C + 1))
         return new ICmpInst(Pred, X, ConstantInt::get(ShrTy, ShiftedC));
     }
 
     // If the compare constant has significant bits above the lowest sign-bit,
     // then convert an unsigned cmp to a test of the sign-bit:

   // Compute this interval based on the constants involved and the signedness of
   // the compare/divide.  This computes a half-open interval, keeping track of
   // whether either value in the interval overflows.  After analysis each
   // overflow variable is set to 0 if it's corresponding bound variable is valid
   // -1 if overflowed off the bottom end, or +1 if overflowed off the top end.
   int LoOverflow = 0, HiOverflow = 0;
   APInt LoBound, HiBound;
 
   if (!DivIsSigned) {  // udiv
     // e.g. X/5 op 3  --> [15, 20)
     LoBound = Prod;
     HiOverflow = LoOverflow = ProdOV;
     if (!HiOverflow) {
       // If this is not an exact divide, then many values in the range collapse
       // to the same result value.
       HiOverflow = addWithOverflow(HiBound, LoBound, RangeSize, false);
     }
   } else if (C2->isStrictlyPositive()) { // Divisor is > 0.
     if (C.isZero()) {                    // (X / pos) op 0
       // Can't overflow.  e.g.  X/2 op 0 --> [-1, 2)
       LoBound = -(RangeSize - 1);
       HiBound = RangeSize;
     } else if (C.isStrictlyPositive()) { // (X / pos) op pos
       LoBound = Prod;     // e.g.   X/5 op 3 --> [15, 20)
       HiOverflow = LoOverflow = ProdOV;
       if (!HiOverflow)
         HiOverflow = addWithOverflow(HiBound, Prod, RangeSize, true);
     } else { // (X / pos) op neg
       // e.g. X/5 op -3  --> [-15-4, -15+1) --> [-19, -14)
       HiBound = Prod + 1;
       LoOverflow = HiOverflow = ProdOV ? -1 : 0;
       if (!LoOverflow) {
         APInt DivNeg = -RangeSize;
         LoOverflow = addWithOverflow(LoBound, HiBound, DivNeg, true) ? -1 : 0;
       }
     }
   } else if (C2->isNegative()) { // Divisor is < 0.
     if (Div->isExact())
       RangeSize.negate();
     if (C.isZero()) { // (X / neg) op 0
       // e.g. X/-5 op 0  --> [-4, 5)
       LoBound = RangeSize + 1;
       HiBound = -RangeSize;
       if (HiBound == *C2) {        // -INTMIN = INTMIN
         HiOverflow = 1;            // [INTMIN+1, overflow)
         HiBound = APInt();         // e.g. X/INTMIN = 0 --> X > INTMIN
       }
     } else if (C.isStrictlyPositive()) { // (X / neg) op pos
       // e.g. X/-5 op 3  --> [-19, -14)
       HiBound = Prod + 1;
       HiOverflow = LoOverflow = ProdOV ? -1 : 0;
       if (!LoOverflow)
         LoOverflow = addWithOverflow(LoBound, HiBound, RangeSize, true) ? -1:0;
     } else {                // (X / neg) op neg
       LoBound = Prod;       // e.g. X/-5 op -3  --> [15, 20)
       LoOverflow = HiOverflow = ProdOV;
       if (!HiOverflow)
         HiOverflow = subWithOverflow(HiBound, Prod, RangeSize, true);
     }
 
     // Dividing by a negative swaps the condition.  LT <-> GT
     Pred = ICmpInst::getSwappedPredicate(Pred);
   }
 
   Value *X = Div->getOperand(0);
   switch (Pred) {
     default: llvm_unreachable("Unhandled icmp opcode!");
     case ICmpInst::ICMP_EQ:
       if (LoOverflow && HiOverflow)
         return replaceInstUsesWith(Cmp, Builder.getFalse());
       if (HiOverflow)
         return new ICmpInst(DivIsSigned ? ICmpInst::ICMP_SGE :
                             ICmpInst::ICMP_UGE, X,
                             ConstantInt::get(Div->getType(), LoBound));
       if (LoOverflow)

       if (HiOverflow == +1)       // High bound greater than input range.
         return replaceInstUsesWith(Cmp, Builder.getFalse());
       if (HiOverflow == -1)       // High bound less than input range.
         return replaceInstUsesWith(Cmp, Builder.getTrue());
       if (Pred == ICmpInst::ICMP_UGT)
         return new ICmpInst(ICmpInst::ICMP_UGE, X,
                             ConstantInt::get(Div->getType(), HiBound));
       return new ICmpInst(ICmpInst::ICMP_SGE, X,
                           ConstantInt::get(Div->getType(), HiBound));
   }
 
   return nullptr;
 }
 
 /// Fold icmp (sub X, Y), C.
 Instruction *InstCombinerImpl::foldICmpSubConstant(ICmpInst &Cmp,
                                                    BinaryOperator *Sub,

     // TrueWhenLessThan, TrueWhenEqual and TrueWhenGreaterThan are true versus
     // false, we rely on chaining of ORs and future passes of InstCombine to
     // simplify the OR further (i.e. a s< b || a == b becomes a s<= b).
 
     // When none of the three constants satisfy the predicate for the RHS (C),
     // the entire original Cmp can be simplified to a false.
     Value *Cond = Builder.getFalse();
     if (TrueWhenLessThan)
       Cond = Builder.CreateOr(Cond, Builder.CreateICmp(ICmpInst::ICMP_SLT,
                                                        OrigLHS, OrigRHS));
     if (TrueWhenEqual)
       Cond = Builder.CreateOr(Cond, Builder.CreateICmp(ICmpInst::ICMP_EQ,
                                                        OrigLHS, OrigRHS));
     if (TrueWhenGreaterThan)
       Cond = Builder.CreateOr(Cond, Builder.CreateICmp(ICmpInst::ICMP_SGT,
                                                        OrigLHS, OrigRHS));
 
     return replaceInstUsesWith(Cmp, Cond);
   }
   return nullptr;
 }
 
 Instruction *InstCombinerImpl::foldICmpBitCast(ICmpInst &Cmp) {
   auto *Bitcast = dyn_cast<BitCastInst>(Cmp.getOperand(0));
   if (!Bitcast)
     return nullptr;
 
   ICmpInst::Predicate Pred = Cmp.getPredicate();
   Value *Op1 = Cmp.getOperand(1);
   Value *BCSrcOp = Bitcast->getOperand(0);
 
   // Make sure the bitcast doesn't change the number of vector elements.
   if (Bitcast->getSrcTy()->getScalarSizeInBits() ==
           Bitcast->getDestTy()->getScalarSizeInBits()) {
     // Zero-equality and sign-bit checks are preserved through sitofp + bitcast.
     Value *X;
     if (match(BCSrcOp, m_SIToFP(m_Value(X)))) {
       // icmp  eq (bitcast (sitofp X)), 0 --> icmp  eq X, 0
       // icmp  ne (bitcast (sitofp X)), 0 --> icmp  ne X, 0
       // icmp slt (bitcast (sitofp X)), 0 --> icmp slt X, 0
       // icmp sgt (bitcast (sitofp X)), 0 --> icmp sgt X, 0
       if ((Pred == ICmpInst::ICMP_EQ || Pred == ICmpInst::ICMP_SLT ||

     // and Mask1 has bits 0..C+1 set. Similar for ctl, but for high bits.
     // Limit to one use to ensure we don't increase instruction count.
     unsigned Num = C.getLimitedValue(BitWidth);
     if (Num != BitWidth && II->hasOneUse()) {
       bool IsTrailing = II->getIntrinsicID() == Intrinsic::cttz;
       APInt Mask1 = IsTrailing ? APInt::getLowBitsSet(BitWidth, Num + 1)
                                : APInt::getHighBitsSet(BitWidth, Num + 1);
       APInt Mask2 = IsTrailing
         ? APInt::getOneBitSet(BitWidth, Num)
         : APInt::getOneBitSet(BitWidth, BitWidth - Num - 1);
       return new ICmpInst(Pred, Builder.CreateAnd(II->getArgOperand(0), Mask1),
                           ConstantInt::get(Ty, Mask2));
     }
     break;
   }
 
   case Intrinsic::ctpop: {

 
       const APInt *RotAmtC;
       // ror(X, RotAmtC) == C --> X == rol(C, RotAmtC)
       // rol(X, RotAmtC) == C --> X == ror(C, RotAmtC)
       if (match(II->getArgOperand(2), m_APInt(RotAmtC)))
         return new ICmpInst(Pred, II->getArgOperand(0),
                             II->getIntrinsicID() == Intrinsic::fshl
                                 ? ConstantInt::get(Ty, C.rotr(*RotAmtC))
                                 : ConstantInt::get(Ty, C.rotl(*RotAmtC)));

test/Transforms/InstCombine/icmp-shr-lt-gt.ll

 ; CHECK-LABEL: @lshrugt_03_15_exact(
 ; CHECK-NEXT:    ret i1 false
 ;
   %s = lshr exact i4 %x, 3
   %c = icmp ugt i4 %s, 15
   ret i1 %c
 }
 
+define i1 @lashr_00_00_noexact(i8 %x) {
+; CHECK-LABEL: @lashr_00_00_noexact(
+; CHECK-NEXT:    [[C:%.*]] = icmp sgt i8 [[X:%.*]], 79
+; CHECK-NEXT:    ret i1 [[C]]
+;
+  %s = ashr i8 %x, 3
+  %c = icmp sge i8 %s, 10
+  ret i1 %c
+}
+
+define i1 @lashr_00_01_noexact(i8 %x) {
+; CHECK-LABEL: @lashr_00_01_noexact(
+; CHECK-NEXT:    [[C:%.*]] = icmp slt i8 [[X:%.*]], 80
+; CHECK-NEXT:    ret i1 [[C]]
+;
+  %s = ashr i8 %x, 3
+  %c = icmp slt i8 %s, 10
+  ret i1 %c
+}
+
+define i1 @lashr_00_03_noexact(i8 %x) {
+; CHECK-LABEL: @lashr_00_03_noexact(
+; CHECK-NEXT:    [[C:%.*]] = icmp ult i8 [[X:%.*]], 80
+; CHECK-NEXT:    ret i1 [[C]]
+;
+  %s = ashr i8 %x, 3
+  %c = icmp ult i8 %s, 10
+  ret i1 %c
+}
+
+define i1 @lashr_00_00_exact(i8 %x) {
+; CHECK-LABEL: @lashr_00_00_exact(
+; CHECK-NEXT:    [[C:%.*]] = icmp ne i8 [[X:%.*]], 80
+; CHECK-NEXT:    ret i1 [[C]]
+;
+  %s = ashr exact i8 %x, 3
+  %c = icmp ne i8 %s, 10
+  ret i1 %c
+}
+
+define i1 @lashr_00_01_exact(i8 %x) {
+; CHECK-LABEL: @lashr_00_01_exact(
+; CHECK-NEXT:    [[C:%.*]] = icmp eq i8 [[X:%.*]], 80
+; CHECK-NEXT:    ret i1 [[C]]
+;
+  %s = ashr exact i8 %x, 3
+  %c = icmp eq i8 %s, 10
+  ret i1 %c
+}
+
+define i1 @lashr_00_02_exact(i8 %x) {
+; CHECK-LABEL: @lashr_00_02_exact(
+; CHECK-NEXT:    [[C:%.*]] = icmp sgt i8 [[X:%.*]], 80
+; CHECK-NEXT:    ret i1 [[C]]
+;
+  %s = ashr exact i8 %x, 3
+  %c = icmp sgt i8 %s, 10
+  ret i1 %c
+}
+
+define i1 @lashr_00_03_exact(i8 %x) {
+; CHECK-LABEL: @lashr_00_03_exact(
+; CHECK-NEXT:    [[C:%.*]] = icmp slt i8 [[X:%.*]], 88
+; CHECK-NEXT:    ret i1 [[C]]
+;
+  %s = ashr exact i8 %x, 3
+  %c = icmp sle i8 %s, 10
+  ret i1 %c
+}
+
+define i1 @lashr_00_04_exact(i8 %x) {
+; CHECK-LABEL: @lashr_00_04_exact(
+; CHECK-NEXT:    [[C:%.*]] = icmp ugt i8 [[X:%.*]], 80
+; CHECK-NEXT:    ret i1 [[C]]
+;
+  %s = ashr exact i8 %x, 3
+  %c = icmp ugt i8 %s, 10
+  ret i1 %c
+}
+
+define i1 @lashr_00_05_exact(i8 %x) {
+; CHECK-LABEL: @lashr_00_05_exact(
+; CHECK-NEXT:    [[C:%.*]] = icmp ult i8 [[X:%.*]], 88
+; CHECK-NEXT:    ret i1 [[C]]
+;
+  %s = ashr exact i8 %x, 3
+  %c = icmp ule i8 %s, 10
+  ret i1 %c
+}
+
 define i1 @lshrult_01_00_exact(i4 %x) {
 ; CHECK-LABEL: @lshrult_01_00_exact(
 ; CHECK-NEXT:    ret i1 false
 ;
   %s = lshr exact i4 %x, 1
   %c = icmp ult i4 %s, 0
   ret i1 %c
 }

test/Transforms/InstCombine/icmp-shr.ll

 ; CHECK-NEXT:    [[R:%.*]] = icmp ult i4 [[X:%.*]], 2
 ; CHECK-NEXT:    ret i1 [[R]]
 ;
   %s = ashr i4 %x, 1
   %r = icmp ult i4 %s, 1 ; 0b0001
   ret i1 %r
 }
 
 ; negative test
 
 define i1 @ashr_ult_2(i4 %x) {
 ; CHECK-LABEL: @ashr_ult_2(
-; CHECK-NEXT:    [[S:%.*]] = ashr i4 [[X:%.*]], 1
-; CHECK-NEXT:    [[R:%.*]] = icmp ult i4 [[S]], 2
+; CHECK-NEXT:    [[R:%.*]] = icmp ult i4 [[X:%.*]], 4
 ; CHECK-NEXT:    ret i1 [[R]]
 ;
   %s = ashr i4 %x, 1
   %r = icmp ult i4 %s, 2 ; 0b0010
   ret i1 %r
 }
 
 ; negative test
 
 define i1 @ashr_ult_3(i4 %x) {
 ; CHECK-LABEL: @ashr_ult_3(
-; CHECK-NEXT:    [[S:%.*]] = ashr i4 [[X:%.*]], 1
-; CHECK-NEXT:    [[R:%.*]] = icmp ult i4 [[S]], 3
+; CHECK-NEXT:    [[R:%.*]] = icmp ult i4 [[X:%.*]], 6
 ; CHECK-NEXT:    ret i1 [[R]]
 ;
   %s = ashr i4 %x, 1
   %r = icmp ult i4 %s, 3 ; 0b0011
   ret i1 %r
 }
 
 define i1 @ashr_ult_4(i4 %x) {
;
   ret i1 %r
 }
 
 ; negative test
 ; TODO: This is a sign-bit test, but we don't recognize the pattern.
 
 define i1 @ashr_ult_12(i4 %x) {
 ; CHECK-LABEL: @ashr_ult_12(
-; CHECK-NEXT:    [[S:%.*]] = ashr i4 [[X:%.*]], 1
-; CHECK-NEXT:    [[R:%.*]] = icmp ult i4 [[S]], -4
+; CHECK-NEXT:    [[R:%.*]] = icmp sgt i4 [[X:%.*]], -1
 ; CHECK-NEXT:    ret i1 [[R]]
 ;
   %s = ashr i4 %x, 1
   %r = icmp ult i4 %s, 12 ; 0b1100
   ret i1 %r
 }
 
 ; negative test
 
 define i1 @ashr_ult_13(i4 %x) {
 ; CHECK-LABEL: @ashr_ult_13(
-; CHECK-NEXT:    [[S:%.*]] = ashr i4 [[X:%.*]], 1
-; CHECK-NEXT:    [[R:%.*]] = icmp ult i4 [[S]], -3
+; CHECK-NEXT:    [[R:%.*]] = icmp ult i4 [[X:%.*]], -6
 ; CHECK-NEXT:    ret i1 [[R]]
 ;
   %s = ashr i4 %x, 1
   %r = icmp ult i4 %s, 13 ; 0b1101
   ret i1 %r
 }
 
 ; negative test
 
 define i1 @ashr_ult_14(i4 %x) {
 ; CHECK-LABEL: @ashr_ult_14(
-; CHECK-NEXT:    [[S:%.*]] = ashr i4 [[X:%.*]], 1
-; CHECK-NEXT:    [[R:%.*]] = icmp ult i4 [[S]], -2
+; CHECK-NEXT:    [[R:%.*]] = icmp ult i4 [[X:%.*]], -4
 ; CHECK-NEXT:    ret i1 [[R]]
 ;
   %s = ashr i4 %x, 1
   %r = icmp ult i4 %s, 14 ; 0b1110
   ret i1 %r
 }
 
 ; negative test, but different transform possible