[libunwind] [sparc] Add SPARCv9 support

[koakuma]

Summary

Adds libunwind support for SPARCv9 (aka sparc64). This is a rebase of @kettenis' patch D32450, which I created (with his permission) because the original review has become inactive.
The changes are of a cosmetic nature to make it fit better with the new code style, and to reuse the existing SPARCv8 code, whenever possible.

Please let me know if I posted this on the wrong place. Also, the summary of the original review is reproduced below:

This adds unwinder support for 64-bit SPARC (aka SPARCv9). The implementation was done on OpenBSD/sparc64, so it takes StackGhost into account:

https://www.usenix.org/legacy/publications/library/proceedings/sec01/full_papers/frantzen/frantzen_html/index.html

Since StackGhost xor's return addresses with a random cookie before storing them on the stack, the unwinder has to do some extra work to recover those. This is done by introducing a new kRegisterInCFADecrypt "location" type that is used to implement the DW_CFA_GNU_window_save opcode. That implementation is SPARC-specific, but should work for 32-bit SPARC as well. DW_CFA_GNU_window_save is only ever generated on SPARC as far as I know.

[koakuma]

I have a question about the code formatting suggestions. I worked on this following the original code's style (indentation, C-style casts, etc) but it looks like clang-format doesn't like it.
Should I revise it following clang-format's suggestion, or is there a more proper way to go with it?

[MaskRay]

In D116857#3231382, @koakuma wrote:

I have a question about the code formatting suggestions. I worked on this following the original code's style (indentation, C-style casts, etc) but it looks like clang-format doesn't like it.
Should I revise it following clang-format's suggestion, or is there a more proper way to go with it?

Just ignore it. The clang-format diagnostic is more useful for files conforming to the style or new files. For existing files violating it, it is sometimes better to leave it.

libunwind/src/libunwind.cpp

70

__sparc64__ or __sparcv9__?

[koakuma]

In D116857#3238505, @MaskRay wrote:

Just ignore it. The clang-format diagnostic is more useful for files conforming to the style or new files. For existing files violating it, it is sometimes better to leave it.

I see, thanks.

libunwind/src/libunwind.cpp

70

__sparc64__ and __sparcv9__ are clang-only, it seems. GCC doesn't define any of it.

[koakuma]

This fixes the wrong #endif placement in DwarfParser.hpp that causes AArch64 build to fail.

[kettenis]

libunwind/src/libunwind.cpp

70

Correct. IIRC defined(sparc) && defined(arch64) is what was used by Sun when their own compiler was still a thing and as far as I know all open source compilers that support 64-bit SPARC define those symbols.

[kettenis]

libunwind/src/libunwind.cpp

70

And to be clear, I meant

defined(__sparc__) && defined(__arch64__)

there.

[koakuma]

Ping. Is there anything else that needs to be done?

[thesamesam]

Thanks for doing the work on this and @kettenis for working on it originally too. I'd love to see this landed.

I've tested this on sparc64 on Gentoo and it doesn't seem to build for me right now at commit bddc814b442ae9f30d62e2f881274d6255411225.

I've attached the build log:

build.log34 KBDownload

The failure looks like:

FAILED: src/CMakeFiles/unwind_shared.dir/UnwindRegistersSave.S.o
/usr/bin/sparc64-unknown-linux-gnu-gcc -Dunwind_shared_EXPORTS -I/var/tmp/portage/sys-libs/llvm-libunwind-14.0.0.9999/work/libunwind/include  -O2 -mcpu=ultrasparc -pipe -fPIC -Werror=return-type -W -Wall -W
char-subscripts -Wconversion -Wmismatched-tags -Wmissing-braces -Wno-unused-function -Wshadow -Wsign-compare -Wsign-conversion -Wstrict-aliasing=2 -Wstrict-overflow=4 -Wunused-parameter -Wunused-variable -W
write-strings -Wundef -Wno-suggest-override -Wno-error -pedantic -funwind-tables -nostdinc++ -DNDEBUG -fno-rtti -MD -MT src/CMakeFiles/unwind_shared.dir/UnwindRegistersSave.S.o -MF src/CMakeFiles/unwind_sha
red.dir/UnwindRegistersSave.S.o.d -o src/CMakeFiles/unwind_shared.dir/UnwindRegistersSave.S.o -c /var/tmp/portage/sys-libs/llvm-libunwind-14.0.0.9999/work/libunwind/src/UnwindRegistersSave.S
/var/tmp/portage/sys-libs/llvm-libunwind-14.0.0.9999/work/libunwind/src/UnwindRegistersSave.S:1010:43: warning: invoking macro GLUE2 argument 1: empty macro arguments are undefined in ISO C90 [-Wpedantic]
 1010 | DEFINE_LIBUNWIND_FUNCTION(__unw_getcontext)
      |                                           ^
/var/tmp/portage/sys-libs/llvm-libunwind-14.0.0.9999/work/libunwind/src/UnwindRegistersSave.S:1010:43: warning: invoking macro GLUE2 argument 1: empty macro arguments are undefined in ISO C90 [-Wpedantic]
/var/tmp/portage/sys-libs/llvm-libunwind-14.0.0.9999/work/libunwind/src/UnwindRegistersSave.S:1010:43: warning: invoking macro GLUE2 argument 1: empty macro arguments are undefined in ISO C90 [-Wpedantic]
/var/tmp/portage/sys-libs/llvm-libunwind-14.0.0.9999/work/libunwind/src/UnwindRegistersSave.S:1010:43: warning: invoking macro GLUE2 argument 1: empty macro arguments are undefined in ISO C90 [-Wpedantic]
/var/tmp/portage/sys-libs/llvm-libunwind-14.0.0.9999/work/libunwind/src/UnwindRegistersSave.S:1167:46: warning: invoking macro GLUE2 argument 1: empty macro arguments are undefined in ISO C90 [-Wpedantic]
 1167 |   WEAK_ALIAS(__unw_getcontext, unw_getcontext)
      |                                              ^
/var/tmp/portage/sys-libs/llvm-libunwind-14.0.0.9999/work/libunwind/src/UnwindRegistersSave.S:1167:46: warning: invoking macro GLUE2 argument 1: empty macro arguments are undefined in ISO C90 [-Wpedantic]
/var/tmp/portage/sys-libs/llvm-libunwind-14.0.0.9999/work/libunwind/src/UnwindRegistersSave.S:1167:46: warning: invoking macro GLUE2 argument 1: empty macro arguments are undefined in ISO C90 [-Wpedantic]
/var/tmp/portage/sys-libs/llvm-libunwind-14.0.0.9999/work/libunwind/src/UnwindRegistersSave.S: Assembler messages:
/var/tmp/portage/sys-libs/llvm-libunwind-14.0.0.9999/work/libunwind/src/UnwindRegistersSave.S:1012: Error: detected global register use not covered by .register pseudo-op
/var/tmp/portage/sys-libs/llvm-libunwind-14.0.0.9999/work/libunwind/src/UnwindRegistersSave.S:1012: Error: detected global register use not covered by .register pseudo-op
/var/tmp/portage/sys-libs/llvm-libunwind-14.0.0.9999/work/libunwind/src/UnwindRegistersSave.S:1012: Error: detected global register use not covered by .register pseudo-op
/var/tmp/portage/sys-libs/llvm-libunwind-14.0.0.9999/work/libunwind/src/UnwindRegistersSave.S:1013: Error: detected global register use not covered by .register pseudo-op
/var/tmp/portage/sys-libs/llvm-libunwind-14.0.0.9999/work/libunwind/src/UnwindRegistersSave.S:1013: Error: detected global register use not covered by .register pseudo-op
/var/tmp/portage/sys-libs/llvm-libunwind-14.0.0.9999/work/libunwind/src/UnwindRegistersSave.S:1013: Error: detected global register use not covered by .register pseudo-op

(I did try on 13.0.0 too but that was just out of interest and it applied with a bunch of fuzz and ended up getting a dodgy double-case error).

Let me know if I can give any other information.

[koakuma]

Add .register directive for %g2, %g3, %g6, and %g7 as required by the assembly language.

Ref: SPARC Assembly Language Reference Manual, section 3.3
(https://docs.oracle.com/cd/E37838_01/html/E61063/pseudoops-1.html)

[koakuma]

In D116857#3277968, @thesamesam wrote:

Thanks for doing the work on this and @kettenis for working on it originally too. I'd love to see this landed.

I've tested this on sparc64 on Gentoo and it doesn't seem to build for me right now at commit bddc814b442ae9f30d62e2f881274d6255411225.

Seems like this is because I forgot to add the .register directives before saving %g2, %g3, %g6, and %g7, and GCC doesn't like it.
I've added the directives, can you please check if it builds there too? Thanks a lot!

[thesamesam]

In D116857#3279111, @koakuma wrote:

In D116857#3277968, @thesamesam wrote:

Thanks for doing the work on this and @kettenis for working on it originally too. I'd love to see this landed.

I've tested this on sparc64 on Gentoo and it doesn't seem to build for me right now at commit bddc814b442ae9f30d62e2f881274d6255411225.

Seems like this is because I forgot to add the .register directives before saving %g2, %g3, %g6, and %g7, and GCC doesn't like it.
I've added the directives, can you please check if it builds there too? Thanks a lot!

Wow, thanks for the quick reply!

I think this is progress, only two errors:

/var/tmp/portage/sys-libs/llvm-libunwind-14.0.0.9999/work/libunwind/src/UnwindCursor.hpp:1927:6:   required from here
/var/tmp/portage/sys-libs/llvm-libunwind-14.0.0.9999/work/libunwind/src/DwarfParser.hpp:774:9: error: duplicate case value
  774 |         case REGISTERS_SPARC:
      |         ^~~~
/var/tmp/portage/sys-libs/llvm-libunwind-14.0.0.9999/work/libunwind/src/DwarfParser.hpp:756:9: note: previously used here
  756 |         case REGISTERS_SPARC:
      |         ^~~~

I've attached the full log again:

build.log31 KBDownload

.

Apparently I have both _LIBUNWIND_TARGET_SPARC and _LIBUNWIND_TARGET_SPARC64 set?

[Arfrever]

In D116857#3281390, @thesamesam wrote:

Apparently I have both _LIBUNWIND_TARGET_SPARC and _LIBUNWIND_TARGET_SPARC64 set?

This happens when libunwind is configured with -DLIBUNWIND_ENABLE_CROSS_UNWINDING=ON passed to cmake.
Then https://github.com/llvm/llvm-project/blob/8faf2a0638d3e8d9411d55c3e5dfb7b452f35ca2/libunwind/CMakeLists.txt#L325-L328 does NOT enable _LIBUNWIND_IS_NATIVE_ONLY.
Then #else // !_LIBUNWIND_IS_NATIVE_ONLY block in libunwind/include/__libunwind_config.h is enabled and it contains (with changes from this patchset):

# define _LIBUNWIND_TARGET_SPARC 1
# define _LIBUNWIND_TARGET_SPARC64 1

[koakuma]

Distinguish REGISTERS_SPARC from REGISTERS_SPARC64 to make building with -DLIBUNWIND_ENABLE_CROSS_UNWINDING=ON possible.

[thesamesam]

Thank you for your work and responsiveness!

• Builds on Gentoo's SPARC64 at commit 0ee7a2c3046d465b199375bfe212d3d209967b03.
• Tests pass too!

-- Testing: 11 tests, 11 workers --
UNSUPPORTED: llvm-libunwind-shared.cfg.in :: floatregister.pass.cpp (1 of 11)
UNSUPPORTED: llvm-libunwind-shared.cfg.in :: signal_unwind.pass.cpp (2 of 11)
UNSUPPORTED: llvm-libunwind-shared.cfg.in :: remember_state_leak.pass.sh.s (3 of 11)
UNSUPPORTED: llvm-libunwind-shared.cfg.in :: unwind_leaffunction.pass.cpp (4 of 11)
PASS: llvm-libunwind-shared.cfg.in :: alignment.compile.pass.cpp (5 of 11)
PASS: llvm-libunwind-shared.cfg.in :: frameheadercache_test.pass.cpp (6 of 11)
PASS: llvm-libunwind-shared.cfg.in :: libunwind_02.pass.cpp (7 of 11)
PASS: llvm-libunwind-shared.cfg.in :: unw_getcontext.pass.cpp (8 of 11)
PASS: llvm-libunwind-shared.cfg.in :: signal_frame.pass.cpp (9 of 11)
PASS: llvm-libunwind-shared.cfg.in :: libunwind_01.pass.cpp (10 of 11)
PASS: llvm-libunwind-shared.cfg.in :: forceunwind.pass.cpp (11 of 11)

Testing Time: 0.35s
  Unsupported: 4
  Passed     : 7
>>> Completed testing sys-libs/llvm-libunwind-14.0.0.9999

[MaskRay]

In D116857#3281535, @Arfrever wrote:

In D116857#3281390, @thesamesam wrote:

Apparently I have both _LIBUNWIND_TARGET_SPARC and _LIBUNWIND_TARGET_SPARC64 set?

This happens when libunwind is configured with -DLIBUNWIND_ENABLE_CROSS_UNWINDING=ON passed to cmake.
Then https://github.com/llvm/llvm-project/blob/8faf2a0638d3e8d9411d55c3e5dfb7b452f35ca2/libunwind/CMakeLists.txt#L325-L328 does NOT enable _LIBUNWIND_IS_NATIVE_ONLY.
Then #else // !_LIBUNWIND_IS_NATIVE_ONLY block in libunwind/include/__libunwind_config.h is enabled and it contains (with changes from this patchset):

# define _LIBUNWIND_TARGET_SPARC 1
# define _LIBUNWIND_TARGET_SPARC64 1

Would it be clearer to have _LIBUNWIND_TARGET_SPARC32 and _LIBUNWIND_TARGET_SPARC64 to indicate 32-bit and 64-bit variants?

You can define _LIBUNWIND_TARGET_SPARC to mean either variant.

libunwind/src/DwarfInstructions.hpp

283

https://llvm.org/docs/CodingStandards.html#don-t-use-braces-on-simple-single-statement-bodies-of-if-else-loop-statements you can move the comment before if and remove braces.

libunwind/src/DwarfParser.hpp

74

[MaskRay]

libunwind/src/DwarfInstructions.hpp

93

// Sparc-specific.

libunwind/src/Registers.hpp

91

// The Sparc-specific kRegisterInCFADecrypt uses getCookie. We define getWCookie to a dummy value for other targets.

3623

3624

3637

Remove

3654

https://llvm.org/docs/CodingStandards.html#don-t-use-braces-on-simple-single-statement-bodies-of-if-else-loop-statements

2-space indentation

3668

https://llvm.org/docs/CodingStandards.html#don-t-use-braces-on-simple-single-statement-bodies-of-if-else-loop-statements

[koakuma]

Some formatting changes as per @MaskRay and clang-format suggestions.

[MaskRay]

Would it be possible to simplify defined(_LIBUNWIND_TARGET_SPARC) || defined(_LIBUNWIND_TARGET_SPARC64) with defined(_LIBUNWIND_TARGET_SPARC) and let _LIBUNWIND_TARGET_SPARC mean either the 32-bit or 64-bit variant.

libunwind/src/DwarfInstructions.hpp

94

Perhaps guard the getWCookie() usage with the sparc macro here so that other targets don't have to define getWCookie. The comment can then be moved here.

Then you may remove // sparc64 specific.

libunwind/src/Registers.hpp

3636

Delete the ctor. _wcookie has been initialized.

[koakuma]

In D116857#3285773, @MaskRay wrote:

Would it be clearer to have _LIBUNWIND_TARGET_SPARC32 and _LIBUNWIND_TARGET_SPARC64 to indicate 32-bit and 64-bit variants?

You can define _LIBUNWIND_TARGET_SPARC to mean either variant.

From what I see in other parts of LLVM, SPARC is also generally taken to mean the 32-bit variant of the architecture. Would it be okay to change it here?
In any case, though, I feel like it's better to be done in another changeset if it's really needed to be changed.

libunwind/src/Registers.hpp

3668

This one's also doing an early return in addition to setting the value, so I don't think I can remove the braces here.

[koakuma]

libunwind/src/DwarfInstructions.hpp

94

From my understanding, it wouldn't work when building with -DLIBUNWIND_ENABLE_CROSS_UNWINDING=ON.
In that case, the sparc64 target (which has getWCookie) and other targets (which doesn't have it) will be built together, and the build will fail because this line tries to call getWCookie on other targets' objects.

[koakuma]

Use default constructor for Registers_sparc64.

[MaskRay]

LGTM.

[Arfrever]

libunwind/src/Registers.hpp

3612

Formatting of this getSP() method is not aligned with formatting of other methods in this class.

3633

This line should be sizeof(_wcookie));

[koakuma]

libunwind/src/Registers.hpp

3612

I think getSP() until getWCookie() has been aligned properly.

Or do you mean that I should align those with getArch() and the methods above it? Currently I'm just following the formatting of other register classes where getSP() onwards have different alignment than previous methods.

[koakuma]

Follow @Arfrever & clang-format's suggestions.

[Arfrever]

libunwind/src/Registers.hpp

3612

OK. The long "Lint: Pre-merge checks" comment made it so that I did not see that this line is aligned with lines below.
I withdraw this one suggestion.

[koakuma]

Um... I don't have commit access, so can someone please help committing it for me? My email is [e-mail].
Thanks a lot for the help.

EDIT: Oh, and since this patch was originally made by @kettenis, I think he should be credited too?
In any case, thanks a lot, everyone (especially Mr. @kettenis for originally writing this patchset).

[MaskRay]

In D116857#3293554, @koakuma wrote:

Um... I don't have commit access, so can someone please help committing it for me? My email is [e-mail].
Thanks a lot for the help.

EDIT: Oh, and since this patch was originally made by @kettenis, I think he should be credited too?
In any case, thanks a lot, everyone (especially Mr. @kettenis for originally writing this patchset).

Co-authored-by: Mark Kettenis

git commit --amend --author='Koakuma <[e-mail]>'

Will this be fine?

[koakuma]

In D116857#3294158, @MaskRay wrote:

Co-authored-by: Mark Kettenis

git commit --amend --author='Koakuma <[e-mail]>'

Will this be fine?

Yeah, that should be okay, I think.

[MaskRay]

I still think there should be a better way handling registers.getWCookie(). Can getWCookie be defined only for Sparc?

[MaskRay]

• clang-format
• use sfinae to avoid defining getWCookie
• fix sign conversion warnings

[MaskRay]

• properly format lines
• remove unneeded cast for memcpy

libunwind/include/__libunwind_config.h

 #define _LIBUNWIND_HIGHEST_DWARF_REGISTER_X86_64    32
 #define _LIBUNWIND_HIGHEST_DWARF_REGISTER_PPC       112
 #define _LIBUNWIND_HIGHEST_DWARF_REGISTER_PPC64     116
 #define _LIBUNWIND_HIGHEST_DWARF_REGISTER_ARM64     95
 #define _LIBUNWIND_HIGHEST_DWARF_REGISTER_ARM       287
 #define _LIBUNWIND_HIGHEST_DWARF_REGISTER_OR1K      32
 #define _LIBUNWIND_HIGHEST_DWARF_REGISTER_MIPS      65
 #define _LIBUNWIND_HIGHEST_DWARF_REGISTER_SPARC     31
+#define _LIBUNWIND_HIGHEST_DWARF_REGISTER_SPARC64   31
 #define _LIBUNWIND_HIGHEST_DWARF_REGISTER_HEXAGON   34
 #define _LIBUNWIND_HIGHEST_DWARF_REGISTER_RISCV     64
 #define _LIBUNWIND_HIGHEST_DWARF_REGISTER_VE        143
 
 #if defined(_LIBUNWIND_IS_NATIVE_ONLY)
 # if defined(__linux__)
 #  define _LIBUNWIND_TARGET_LINUX 1
 # endif

 #    else
 #      define _LIBUNWIND_CONTEXT_SIZE 35
 #      define _LIBUNWIND_CURSOR_SIZE 47
 #    endif
 #  else
 #    error "Unsupported MIPS ABI and/or environment"
 #  endif
 #  define _LIBUNWIND_HIGHEST_DWARF_REGISTER _LIBUNWIND_HIGHEST_DWARF_REGISTER_MIPS
+#elif defined(__sparc__) && defined(__arch64__)
+#define _LIBUNWIND_TARGET_SPARC64 1
+#define _LIBUNWIND_HIGHEST_DWARF_REGISTER                                      \
+  _LIBUNWIND_HIGHEST_DWARF_REGISTER_SPARC64
+#define _LIBUNWIND_CONTEXT_SIZE 33
+#define _LIBUNWIND_CURSOR_SIZE 45
 # elif defined(__sparc__)
   #define _LIBUNWIND_TARGET_SPARC 1
   #define _LIBUNWIND_HIGHEST_DWARF_REGISTER _LIBUNWIND_HIGHEST_DWARF_REGISTER_SPARC
   #define _LIBUNWIND_CONTEXT_SIZE 16
   #define _LIBUNWIND_CURSOR_SIZE 23
 # elif defined(__riscv)
 #  define _LIBUNWIND_TARGET_RISCV 1
 #  if defined(__riscv_flen)

 # define _LIBUNWIND_TARGET_PPC 1
 # define _LIBUNWIND_TARGET_PPC64 1
 # define _LIBUNWIND_TARGET_AARCH64 1
 # define _LIBUNWIND_TARGET_ARM 1
 # define _LIBUNWIND_TARGET_OR1K 1
 # define _LIBUNWIND_TARGET_MIPS_O32 1
 # define _LIBUNWIND_TARGET_MIPS_NEWABI 1
 # define _LIBUNWIND_TARGET_SPARC 1
+# define _LIBUNWIND_TARGET_SPARC64 1
 # define _LIBUNWIND_TARGET_HEXAGON 1
 # define _LIBUNWIND_TARGET_RISCV 1
 # define _LIBUNWIND_TARGET_VE 1
 # define _LIBUNWIND_CONTEXT_SIZE 167
 # define _LIBUNWIND_CURSOR_SIZE 179
 # define _LIBUNWIND_HIGHEST_DWARF_REGISTER 287
 #endif // _LIBUNWIND_IS_NATIVE_ONLY
 
 #endif // ____LIBUNWIND_CONFIG_H__

libunwind/src/DwarfInstructions.hpp

static pint_t getCFA(A &addressSpace, const PrologInfo &prolog,
     if (prolog.cfaExpression != 0)
       return evaluateExpression((pint_t)prolog.cfaExpression, addressSpace, 
                                 registers, 0);
     assert(0 && "getCFA(): unknown location");
     __builtin_unreachable();
   }
 };
 
+template <typename R>
+auto getSparcWCookie(const R &r, int) -> decltype(r.getWCookie()) {
+  return r.getWCookie();
+}
+template <typename R> uint64_t getSparcWCookie(const R &, long) {
+  return 0;
+}
 
 template <typename A, typename R>
 typename A::pint_t DwarfInstructions<A, R>::getSavedRegister(
     A &addressSpace, const R &registers, pint_t cfa,
     const RegisterLocation &savedReg) {
   switch (savedReg.location) {
   case CFI_Parser<A>::kRegisterInCFA:
     return (pint_t)addressSpace.getRegister(cfa + (pint_t)savedReg.value);
 
+  case CFI_Parser<A>::kRegisterInCFADecrypt: // sparc64 specific
+    return addressSpace.getP(cfa + (pint_t)savedReg.value) ^
+           getSparcWCookie(registers, 0);
+
   case CFI_Parser<A>::kRegisterAtExpression:
     return (pint_t)addressSpace.getRegister(evaluateExpression(
         (pint_t)savedReg.value, addressSpace, registers, cfa));
 
   case CFI_Parser<A>::kRegisterIsExpression:
     return evaluateExpression((pint_t)savedReg.value, addressSpace,
                               registers, cfa);
 
case CFI_Parser<A>::kRegisterUndefined:
     return 0.0;
   case CFI_Parser<A>::kRegisterInRegister:
 #ifndef _LIBUNWIND_TARGET_ARM
     return registers.getFloatRegister((int)savedReg.value);
 #endif
   case CFI_Parser<A>::kRegisterIsExpression:
   case CFI_Parser<A>::kRegisterUnused:
   case CFI_Parser<A>::kRegisterOffsetFromCFA:
+  case CFI_Parser<A>::kRegisterInCFADecrypt:
     // FIX ME
     break;
   }
   _LIBUNWIND_ABORT("unsupported restore location for float register");
 }
 
 template <typename A, typename R>
 v128 DwarfInstructions<A, R>::getSavedVectorRegister(
     A &addressSpace, const R &registers, pint_t cfa,
     const RegisterLocation &savedReg) {
   switch (savedReg.location) {
   case CFI_Parser<A>::kRegisterInCFA:
     return addressSpace.getVector(cfa + (pint_t)savedReg.value);
 
   case CFI_Parser<A>::kRegisterAtExpression:
     return addressSpace.getVector(
         evaluateExpression((pint_t)savedReg.value, addressSpace,
                             registers, cfa));
 
   case CFI_Parser<A>::kRegisterIsExpression:
   case CFI_Parser<A>::kRegisterUnused:
   case CFI_Parser<A>::kRegisterUndefined:
   case CFI_Parser<A>::kRegisterOffsetFromCFA:
   case CFI_Parser<A>::kRegisterInRegister:
+  case CFI_Parser<A>::kRegisterInCFADecrypt:
     // FIX ME
     break;
   }
   _LIBUNWIND_ABORT("unsupported restore location for vector register");
 }
 
 template <typename A, typename R>
 int DwarfInstructions<A, R>::stepWithDwarf(A &addressSpace, pint_t pc,
#if defined(_LIBUNWIND_TARGET_SPARC)
         // Skip call site instruction and delay slot
         returnAddress += 8;
         // Skip unimp instruction if function returns a struct
         if ((addressSpace.get32(returnAddress) & 0xC1C00000) == 0)
           returnAddress += 4;
       }
 #endif
 
+#if defined(_LIBUNWIND_TARGET_SPARC64)
+      // Skip call site instruction and delay slot.
+      if (R::getArch() == REGISTERS_SPARC64)
+        returnAddress += 8;
+#endif
+
 #if defined(_LIBUNWIND_TARGET_PPC64)
 #define PPC64_ELFV1_R2_LOAD_INST_ENCODING 0xe8410028u // ld r2,40(r1)
 #define PPC64_ELFV1_R2_OFFSET 40
 #define PPC64_ELFV2_R2_LOAD_INST_ENCODING 0xe8410018u // ld r2,24(r1)
 #define PPC64_ELFV2_R2_OFFSET 24
       // If the instruction at return address is a TOC (r2) restore,
       // then r2 was saved and needs to be restored.
       // ELFv2 ABI specifies that the TOC Pointer must be saved at SP + 24,

libunwind/src/DwarfParser.hpp

#endif
 
   enum {
     kMaxRegisterNumber = _LIBUNWIND_HIGHEST_DWARF_REGISTER
   };
   enum RegisterSavedWhere {
     kRegisterUnused,
     kRegisterUndefined,
     kRegisterInCFA,
+    kRegisterInCFADecrypt, // sparc64 specific
     kRegisterOffsetFromCFA,
     kRegisterInRegister,
     kRegisterAtExpression,
     kRegisterIsExpression
   };
   struct RegisterLocation {
     RegisterSavedWhere location;
     bool initialStateSaved;
while ((p < instructionsEnd) && (codeOffset < pcoffset)) {
         }
         offset = (int64_t)addressSpace.getULEB128(p, instructionsEnd) *
                  cieInfo.dataAlignFactor;
         results->setRegister(reg, kRegisterInCFA, -offset, initialState);
         _LIBUNWIND_TRACE_DWARF(
             "DW_CFA_GNU_negative_offset_extended(%" PRId64 ")\n", offset);
         break;
 
-#if defined(_LIBUNWIND_TARGET_AARCH64) || defined(_LIBUNWIND_TARGET_SPARC)
+#if defined(_LIBUNWIND_TARGET_AARCH64) || defined(_LIBUNWIND_TARGET_SPARC) || \
+    defined(_LIBUNWIND_TARGET_SPARC64)
         // The same constant is used to represent different instructions on
         // AArch64 (negate_ra_state) and SPARC (window_save).
         static_assert(DW_CFA_AARCH64_negate_ra_state == DW_CFA_GNU_window_save,
                       "uses the same constant");
       case DW_CFA_AARCH64_negate_ra_state:
         switch (arch) {
 #if defined(_LIBUNWIND_TARGET_AARCH64)
         case REGISTERS_ARM64: {
#if defined(_LIBUNWIND_TARGET_SPARC)
 
           for (reg = UNW_SPARC_L0; reg <= UNW_SPARC_I7; reg++) {
             results->setRegister(reg, kRegisterInCFA,
                                  ((int64_t)reg - UNW_SPARC_L0) * 4,
                                  initialState);
           }
           break;
 #endif
+
+#if defined(_LIBUNWIND_TARGET_SPARC64)
+        // case DW_CFA_GNU_window_save:
+        case REGISTERS_SPARC64:
+          // Don't save %o0-%o7 on sparc64.
+          // https://reviews.llvm.org/D32450#736405
+
+          for (reg = UNW_SPARC_L0; reg <= UNW_SPARC_I7; reg++) {
+            if (reg == UNW_SPARC_I7)
+              results->setRegister(
+                  reg, kRegisterInCFADecrypt,
+                  static_cast<int64_t>((reg - UNW_SPARC_L0) * sizeof(pint_t)),
+                  initialState);
+            else
+              results->setRegister(
+                  reg, kRegisterInCFA,
+                  static_cast<int64_t>((reg - UNW_SPARC_L0) * sizeof(pint_t)),
+                  initialState);
           }
+          _LIBUNWIND_TRACE_DWARF("DW_CFA_GNU_window_save\n");
           break;
+#endif
+        }
+        break;
+
 #else
         (void)arch;
 #endif
 
       default:
         operand = opcode & 0x3F;
         switch (opcode & 0xC0) {
         case DW_CFA_offset:

libunwind/src/Registers.hpp

enum {
   REGISTERS_PPC,
   REGISTERS_PPC64,
   REGISTERS_ARM64,
   REGISTERS_ARM,
   REGISTERS_OR1K,
   REGISTERS_MIPS_O32,
   REGISTERS_MIPS_NEWABI,
   REGISTERS_SPARC,
+  REGISTERS_SPARC64,
   REGISTERS_HEXAGON,
   REGISTERS_RISCV,
   REGISTERS_VE,
 };
 
 #if defined(_LIBUNWIND_TARGET_I386)
 class _LIBUNWIND_HIDDEN Registers_x86;
 extern "C" void __libunwind_Registers_x86_jumpto(Registers_x86 *);
public:
   uint32_t  getECX() const         { return _registers.__ecx; }
   void      setECX(uint32_t value) { _registers.__ecx = value; }
   uint32_t  getEDX() const         { return _registers.__edx; }
   void      setEDX(uint32_t value) { _registers.__edx = value; }
   uint32_t  getESI() const         { return _registers.__esi; }
   void      setESI(uint32_t value) { _registers.__esi = value; }
   uint32_t  getEDI() const         { return _registers.__edi; }
   void      setEDI(uint32_t value) { _registers.__edi = value; }
 
 private:
   struct GPRs {
     unsigned int __eax;
     unsigned int __ebx;
     unsigned int __ecx;
     unsigned int __edx;
     unsigned int __edi;
     unsigned int __esi;
inline const char *Registers_sparc::getRegisterName(int regNum) {
   case UNW_SPARC_I7:
     return "i7";
   default:
     return "unknown register";
   }
 }
 #endif // _LIBUNWIND_TARGET_SPARC
 
+#if defined(_LIBUNWIND_TARGET_SPARC64)
+/// Registers_sparc64 holds the register state of a thread in a 64-bit
+/// sparc process.
+class _LIBUNWIND_HIDDEN Registers_sparc64 {
+public:
+  Registers_sparc64() = default;
+  Registers_sparc64(const void *registers);
+
+  bool validRegister(int num) const;
+  uint64_t getRegister(int num) const;
+  void setRegister(int num, uint64_t value);
+  bool validFloatRegister(int num) const;
+  double getFloatRegister(int num) const;
+  void setFloatRegister(int num, double value);
+  bool validVectorRegister(int num) const;
+  v128 getVectorRegister(int num) const;
+  void setVectorRegister(int num, v128 value);
+  const char *getRegisterName(int num);
+  void jumpto();
+  static int lastDwarfRegNum() {
+    return _LIBUNWIND_HIGHEST_DWARF_REGISTER_SPARC64;
+  }
+  static int getArch() { return REGISTERS_SPARC64; }
+
+  uint64_t getSP() const { return _registers.__regs[UNW_SPARC_O6] + 2047; }
+  void setSP(uint64_t value) { _registers.__regs[UNW_SPARC_O6] = value - 2047; }
+  uint64_t getIP() const { return _registers.__regs[UNW_SPARC_O7]; }
+  void setIP(uint64_t value) { _registers.__regs[UNW_SPARC_O7] = value; }
+  uint64_t getWCookie() const { return _wcookie; }
+
+private:
+  struct sparc64_thread_state_t {
+    uint64_t __regs[32];
+  };
+
+  sparc64_thread_state_t _registers{};
+  uint64_t _wcookie = 0;
+};
+
+inline Registers_sparc64::Registers_sparc64(const void *registers) {
+  static_assert((check_fit<Registers_sparc64, unw_context_t>::does_fit),
+                "sparc64 registers do not fit into unw_context_t");
+  memcpy(&_registers, registers, sizeof(_registers));
+  memcpy(&_wcookie,
+         static_cast<const uint8_t *>(registers) + sizeof(_registers),
+         sizeof(_wcookie));
+}
+
+inline bool Registers_sparc64::validRegister(int regNum) const {
+  if (regNum == UNW_REG_IP)
+    return true;
+  if (regNum == UNW_REG_SP)
+    return true;
+  if (regNum < 0)
+    return false;
+  if (regNum <= UNW_SPARC_I7)
+    return true;
+  return false;
+}
+
+inline uint64_t Registers_sparc64::getRegister(int regNum) const {
+  if (regNum >= UNW_SPARC_G0 && regNum <= UNW_SPARC_I7)
+    return _registers.__regs[regNum];
+
+  switch (regNum) {
+  case UNW_REG_IP:
+    return _registers.__regs[UNW_SPARC_O7];
+  case UNW_REG_SP:
+    return _registers.__regs[UNW_SPARC_O6] + 2047;
+  }
+  _LIBUNWIND_ABORT("unsupported sparc64 register");
+}
+
+inline void Registers_sparc64::setRegister(int regNum, uint64_t value) {
+  if (regNum >= UNW_SPARC_G0 && regNum <= UNW_SPARC_I7) {
+    _registers.__regs[regNum] = value;
+    return;
+  }
+
+  switch (regNum) {
+  case UNW_REG_IP:
+    _registers.__regs[UNW_SPARC_O7] = value;
+    return;
+  case UNW_REG_SP:
+    _registers.__regs[UNW_SPARC_O6] = value - 2047;
+    return;
+  }
+  _LIBUNWIND_ABORT("unsupported sparc64 register");
+}
+
+inline bool Registers_sparc64::validFloatRegister(int) const { return false; }
+
+inline double Registers_sparc64::getFloatRegister(int) const {
+  _LIBUNWIND_ABORT("no sparc64 float registers");
+}
+
+inline void Registers_sparc64::setFloatRegister(int, double) {
+  _LIBUNWIND_ABORT("no sparc64 float registers");
+}
+
+inline bool Registers_sparc64::validVectorRegister(int) const { return false; }
+
+inline v128 Registers_sparc64::getVectorRegister(int) const {
+  _LIBUNWIND_ABORT("no sparc64 vector registers");
+}
+
+inline void Registers_sparc64::setVectorRegister(int, v128) {
+  _LIBUNWIND_ABORT("no sparc64 vector registers");
+}
+
+inline const char *Registers_sparc64::getRegisterName(int regNum) {
+  switch (regNum) {
+  case UNW_REG_IP:
+    return "pc";
+  case UNW_SPARC_G0:
+    return "g0";
+  case UNW_SPARC_G1:
+    return "g1";
+  case UNW_SPARC_G2:
+    return "g2";
+  case UNW_SPARC_G3:
+    return "g3";
+  case UNW_SPARC_G4:
+    return "g4";
+  case UNW_SPARC_G5:
+    return "g5";
+  case UNW_SPARC_G6:
+    return "g6";
+  case UNW_SPARC_G7:
+    return "g7";
+  case UNW_SPARC_O0:
+    return "o0";
+  case UNW_SPARC_O1:
+    return "o1";
+  case UNW_SPARC_O2:
+    return "o2";
+  case UNW_SPARC_O3:
+    return "o3";
+  case UNW_SPARC_O4:
+    return "o4";
+  case UNW_SPARC_O5:
+    return "o5";
+  case UNW_REG_SP:
+  case UNW_SPARC_O6:
+    return "o6";
+  case UNW_SPARC_O7:
+    return "o7";
+  case UNW_SPARC_L0:
+    return "l0";
+  case UNW_SPARC_L1:
+    return "l1";
+  case UNW_SPARC_L2:
+    return "l2";
+  case UNW_SPARC_L3:
+    return "l3";
+  case UNW_SPARC_L4:
+    return "l4";
+  case UNW_SPARC_L5:
+    return "l5";
+  case UNW_SPARC_L6:
+    return "l6";
+  case UNW_SPARC_L7:
+    return "l7";
+  case UNW_SPARC_I0:
+    return "i0";
+  case UNW_SPARC_I1:
+    return "i1";
+  case UNW_SPARC_I2:
+    return "i2";
+  case UNW_SPARC_I3:
+    return "i3";
+  case UNW_SPARC_I4:
+    return "i4";
+  case UNW_SPARC_I5:
+    return "i5";
+  case UNW_SPARC_I6:
+    return "i6";
+  case UNW_SPARC_I7:
+    return "i7";
+  default:
+    return "unknown register";
+  }
+}
+#endif // _LIBUNWIND_TARGET_SPARC64
+
 #if defined(_LIBUNWIND_TARGET_HEXAGON)
 /// Registers_hexagon holds the register state of a thread in a Hexagon QDSP6
 /// process.
 class _LIBUNWIND_HIDDEN Registers_hexagon {
 public:
   Registers_hexagon();
   Registers_hexagon(const void *registers);
 

libunwind/src/UnwindCursor.hpp

int stepWithCompactEncoding(Registers_mips_newabi &) {
     return UNW_EINVAL;
   }
 #endif
 
 #if defined(_LIBUNWIND_TARGET_SPARC)
   int stepWithCompactEncoding(Registers_sparc &) { return UNW_EINVAL; }
 #endif
 
+#if defined(_LIBUNWIND_TARGET_SPARC64)
+  int stepWithCompactEncoding(Registers_sparc64 &) { return UNW_EINVAL; }
+#endif
+
 #if defined (_LIBUNWIND_TARGET_RISCV)
   int stepWithCompactEncoding(Registers_riscv &) {
     return UNW_EINVAL;
   }
 #endif
 
   bool compactSaysUseDwarf(uint32_t *offset=NULL) const {
     R dummy;
bool compactSaysUseDwarf(Registers_mips_newabi &, uint32_t *) const {
     return true;
   }
 #endif
 
 #if defined(_LIBUNWIND_TARGET_SPARC)
   bool compactSaysUseDwarf(Registers_sparc &, uint32_t *) const { return true; }
 #endif
 
+#if defined(_LIBUNWIND_TARGET_SPARC64)
+  bool compactSaysUseDwarf(Registers_sparc64 &, uint32_t *) const {
+    return true;
+  }
+#endif
+
 #if defined (_LIBUNWIND_TARGET_RISCV)
   bool compactSaysUseDwarf(Registers_riscv &, uint32_t *) const {
     return true;
   }
 #endif
 
 #endif // defined(_LIBUNWIND_SUPPORT_COMPACT_UNWIND)
 
compact_unwind_encoding_t dwarfEncoding(Registers_mips_newabi &) const {
     return 0;
   }
 #endif
 
 #if defined(_LIBUNWIND_TARGET_SPARC)
   compact_unwind_encoding_t dwarfEncoding(Registers_sparc &) const { return 0; }
 #endif
 
+#if defined(_LIBUNWIND_TARGET_SPARC64)
+  compact_unwind_encoding_t dwarfEncoding(Registers_sparc64 &) const {
+    return 0;
+  }
+#endif
+
 #if defined (_LIBUNWIND_TARGET_RISCV)
   compact_unwind_encoding_t dwarfEncoding(Registers_riscv &) const {
     return 0;
   }
 #endif
 
 #endif // defined(_LIBUNWIND_SUPPORT_DWARF_UNWIND)
 

libunwind/src/UnwindRegistersRestore.S

#endif
   ld    $30, (8 * 30)($4)
   // load new pc into ra
   ld    $31, (8 * 32)($4)
   // jump to ra, load a0 in the delay slot
   jr    $31
   ld    $4, (8 * 4)($4)
   .set pop
 
+#elif defined(__sparc__) && defined(__arch64__)
+
+DEFINE_LIBUNWIND_FUNCTION(_ZN9libunwind17Registers_sparc646jumptoEv)
+//
+// void libunwind::Registers_sparc64::jumpto()
+//
+// On entry:
+//  thread_state pointer is in %o0
+//
+  .register %g2, #scratch
+  .register %g3, #scratch
+  .register %g6, #scratch
+  .register %g7, #scratch
+  flushw
+  ldx  [%o0 + 0x08], %g1
+  ldx  [%o0 + 0x10], %g2
+  ldx  [%o0 + 0x18], %g3
+  ldx  [%o0 + 0x20], %g4
+  ldx  [%o0 + 0x28], %g5
+  ldx  [%o0 + 0x30], %g6
+  ldx  [%o0 + 0x38], %g7
+  ldx  [%o0 + 0x48], %o1
+  ldx  [%o0 + 0x50], %o2
+  ldx  [%o0 + 0x58], %o3
+  ldx  [%o0 + 0x60], %o4
+  ldx  [%o0 + 0x68], %o5
+  ldx  [%o0 + 0x70], %o6
+  ldx  [%o0 + 0x78], %o7
+  ldx  [%o0 + 0x80], %l0
+  ldx  [%o0 + 0x88], %l1
+  ldx  [%o0 + 0x90], %l2
+  ldx  [%o0 + 0x98], %l3
+  ldx  [%o0 + 0xa0], %l4
+  ldx  [%o0 + 0xa8], %l5
+  ldx  [%o0 + 0xb0], %l6
+  ldx  [%o0 + 0xb8], %l7
+  ldx  [%o0 + 0xc0], %i0
+  ldx  [%o0 + 0xc8], %i1
+  ldx  [%o0 + 0xd0], %i2
+  ldx  [%o0 + 0xd8], %i3
+  ldx  [%o0 + 0xe0], %i4
+  ldx  [%o0 + 0xe8], %i5
+  ldx  [%o0 + 0xf0], %i6
+  ldx  [%o0 + 0xf8], %i7
+  jmp  %o7
+   ldx [%o0 + 0x40], %o0
+
 #elif defined(__sparc__)
 
 //
 // void libunwind::Registers_sparc_o32::jumpto()
 //
 // On entry:
 //  thread_state pointer is in o0
 //

libunwind/src/UnwindRegistersSave.S

DEFINE_LIBUNWIND_FUNCTION(__unw_getcontext)
   r1 = c4   // Predicate register
   memw(r0+#128) = r1
   r1 = memw(r30)           // *FP == Saved FP
   r1 = r31
   memw(r0+#132) = r1
 
   jumpr r31
 
+#elif defined(__sparc__) && defined(__arch64__)
+
+#
+# extern int __unw_getcontext(unw_context_t* thread_state)
+#
+# On entry:
+#  thread_state pointer is in %o0
+#
+DEFINE_LIBUNWIND_FUNCTION(__unw_getcontext)
+  .register %g2, #scratch
+  .register %g3, #scratch
+  .register %g6, #scratch
+  .register %g7, #scratch
+  stx  %g1, [%o0 + 0x08]
+  stx  %g2, [%o0 + 0x10]
+  stx  %g3, [%o0 + 0x18]
+  stx  %g4, [%o0 + 0x20]
+  stx  %g5, [%o0 + 0x28]
+  stx  %g6, [%o0 + 0x30]
+  stx  %g7, [%o0 + 0x38]
+  stx  %o0, [%o0 + 0x40]
+  stx  %o1, [%o0 + 0x48]
+  stx  %o2, [%o0 + 0x50]
+  stx  %o3, [%o0 + 0x58]
+  stx  %o4, [%o0 + 0x60]
+  stx  %o5, [%o0 + 0x68]
+  stx  %o6, [%o0 + 0x70]
+  stx  %o7, [%o0 + 0x78]
+  stx  %l0, [%o0 + 0x80]
+  stx  %l1, [%o0 + 0x88]
+  stx  %l2, [%o0 + 0x90]
+  stx  %l3, [%o0 + 0x98]
+  stx  %l4, [%o0 + 0xa0]
+  stx  %l5, [%o0 + 0xa8]
+  stx  %l6, [%o0 + 0xb0]
+  stx  %l7, [%o0 + 0xb8]
+  stx  %i0, [%o0 + 0xc0]
+  stx  %i1, [%o0 + 0xc8]
+  stx  %i2, [%o0 + 0xd0]
+  stx  %i3, [%o0 + 0xd8]
+  stx  %i4, [%o0 + 0xe0]
+  stx  %i5, [%o0 + 0xe8]
+  stx  %i6, [%o0 + 0xf0]
+  stx  %i7, [%o0 + 0xf8]
+
+  # save StackGhost cookie
+  mov  %i7, %g4
+  save %sp, -176, %sp
+  # register window flush necessary even without StackGhost
+  flushw
+  restore
+  ldx  [%sp + 2047 + 0x78], %g5
+  xor  %g4, %g5, %g4
+  stx  %g4, [%o0 + 0x100]
+  retl
+  # return UNW_ESUCCESS
+   clr %o0
+
 #elif defined(__sparc__)
 
 #
 # extern int __unw_getcontext(unw_context_t* thread_state)
 #
 # On entry:
 #  thread_state pointer is in o0
 #

libunwind/src/libunwind.cpp

 #elif defined(__hexagon__)
 # define REGISTER_KIND Registers_hexagon
 #elif defined(__mips__) && defined(_ABIO32) && _MIPS_SIM == _ABIO32
 # define REGISTER_KIND Registers_mips_o32
 #elif defined(__mips64)
 # define REGISTER_KIND Registers_mips_newabi
 #elif defined(__mips__)
 # warning The MIPS architecture is not supported with this ABI and environment!
+#elif defined(__sparc__) && defined(__arch64__)
+#define REGISTER_KIND Registers_sparc64
 #elif defined(__sparc__)
 # define REGISTER_KIND Registers_sparc
 #elif defined(__riscv)
 # define REGISTER_KIND Registers_riscv
 #elif defined(__ve__)
 # define REGISTER_KIND Registers_ve
 #else
 # error Architecture not supported