BTST missed ARIPI and ARIPD addressing modes support.
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Style is fine, tests run clean for me.
llvm/test/MC/M68k/Bits/Classes/MxBTST_MI.s | ||
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15 | I'm not sure whether this is defined behaviour. The spec I have says that BTST with a register for the bit number wraps, but doesn't specify that behaviour for the immediate mode, so it probably works. Additionally, I don't think it would be signed, but again, I suspect it'll still work (-1 will be interpreted as 31). |
llvm/test/MC/M68k/Bits/Classes/MxBTST_MI.s | ||
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15 | The spec for BTST mentioned When a data register is the destination, any of the 32 bits can be specified by a modulo 32- bit number. When a memory location is the destination, the operation is a byte operation, and the bit number is modulo 8. Maybe have another revision to forbid signed number as immediate operand in the future. The reference spec: https://www.nxp.com/files-static/archives/doc/ref_manual/M68000PRM.pdf |
Sorry I missed this comment. LGTM now
llvm/test/MC/M68k/Bits/Classes/MxBTST_MI.s | ||
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15 |
GNU AS currently supports negative immediate so I'm incline not to remove this feature. |
I'm not sure whether this is defined behaviour. The spec I have says that BTST with a register for the bit number wraps, but doesn't specify that behaviour for the immediate mode, so it probably works. Additionally, I don't think it would be signed, but again, I suspect it'll still work (-1 will be interpreted as 31).