[ARM] reject -mtp=cp15 if target subarch does not support it

[ardb]

Summary

Currently, we permit -mtp=cp15 even for targets that don't implement the TLS register. When building for ARMv6 or earlier, this means we emit instructions that will UNDEF at runtime. For Thumb1, passing -mtp=cp15 will trigger an assert in the backend.

So let's add some diagnostics to ensure that -mtp=cp15 is only accepted for ARMv6T2 or newer.

[nickdesaulniers]

Thanks for the patch! Don't forget to run git-clang-format HEAD~.

clang/lib/Driver/ToolChains/Arch/ARM.cpp

160–161

The last two checks seems redundant (getARMSubArchVersionNumber(Triple) < 7 && llvm::ARM::parseArch(Triple.getArchName()) != llvm::ARM::ArchKind::ARMV6T2). If the ArchKind was ARMV6T2 then getARMSubArchVersionNumber should return 6.

Or do we want to support ARMv6T2, in which case the patch description should be edited:

ensure that -mtp=cp15 is rejected for ARMv6T2 or earlier.

s/ARMv6T2 or earlier/ARMv6 (except ARMv6T2) or earlier/

clang/test/Driver/clang-translation.c

118–119

The -check-prefix should probably s/ARMv7/ARMv5T/.

It might be interesting to additionally test armv6 vs armv6t, depending on the answer to my question above.

[ardb]

Fix test issue and add more test cases

[ardb]

clang/lib/Driver/ToolChains/Arch/ARM.cpp

160–161

The last two checks seems redundant (getARMSubArchVersionNumber(Triple) < 7 && llvm::ARM::parseArch(Triple.getArchName()) != llvm::ARM::ArchKind::ARMV6T2). If the ArchKind was ARMV6T2 then getARMSubArchVersionNumber should return 6.

Or do we want to support ARMv6T2, in which case the patch description should be edited:

ensure that -mtp=cp15 is rejected for ARMv6T2 or earlier.

s/ARMv6T2 or earlier/ARMv6 (except ARMv6T2) or earlier/

Yeah, the latter. ARMv6T2 is the first core that implements Thumb2,

clang/lib/Driver/ToolChains/Arch/ARM.h

 };
 
 FloatABI getDefaultFloatABI(const llvm::Triple &Triple);
 FloatABI getARMFloatABI(const ToolChain &TC, const llvm::opt::ArgList &Args);
 FloatABI getARMFloatABI(const Driver &D, const llvm::Triple &Triple,
                         const llvm::opt::ArgList &Args);
 void setFloatABIInTriple(const Driver &D, const llvm::opt::ArgList &Args,
                          llvm::Triple &triple);
-ReadTPMode getReadTPMode(const Driver &D, const llvm::opt::ArgList &Args);
+ReadTPMode getReadTPMode(const Driver &D, const llvm::opt::ArgList &Args,
+                         const llvm::Triple &Triple);
 void setArchNameInTriple(const Driver &D, const llvm::opt::ArgList &Args,
                          types::ID InputType, llvm::Triple &Triple);
 
 bool useAAPCSForMachO(const llvm::Triple &T);
 void getARMArchCPUFromArgs(const llvm::opt::ArgList &Args,
                            llvm::StringRef &Arch, llvm::StringRef &CPU,
                            bool FromAs = false);
 void getARMTargetFeatures(const Driver &D, const llvm::Triple &Triple,

clang/lib/Driver/ToolChains/Arch/ARM.cpp

bool arm::useAAPCSForMachO(const llvm::Triple &T) {
   // The backend is hardwired to assume AAPCS for M-class processors, ensure
   // the frontend matches that.
   return T.getEnvironment() == llvm::Triple::EABI ||
          T.getEnvironment() == llvm::Triple::EABIHF ||
          T.getOS() == llvm::Triple::UnknownOS || isARMMProfile(T);
 }
 
 // Select mode for reading thread pointer (-mtp=soft/cp15).
-arm::ReadTPMode arm::getReadTPMode(const Driver &D, const ArgList &Args) {
+arm::ReadTPMode arm::getReadTPMode(const Driver &D, const ArgList &Args,
+                                   const llvm::Triple &Triple) {
   if (Arg *A = Args.getLastArg(options::OPT_mtp_mode_EQ)) {
     arm::ReadTPMode ThreadPointer =
         llvm::StringSwitch<arm::ReadTPMode>(A->getValue())
             .Case("cp15", ReadTPMode::Cp15)
             .Case("soft", ReadTPMode::Soft)
             .Default(ReadTPMode::Invalid);
+    if (ThreadPointer == ReadTPMode::Cp15 &&
+        getARMSubArchVersionNumber(Triple) < 7 &&
+        llvm::ARM::parseArch(Triple.getArchName()) !=
+            llvm::ARM::ArchKind::ARMV6T2) {
+      D.Diag(diag::err_target_unsupported_tp_hard) << Triple.getArchName();
+      return ReadTPMode::Invalid;
+    }
     if (ThreadPointer != ReadTPMode::Invalid)
       return ThreadPointer;
     if (StringRef(A->getValue()).empty())
       D.Diag(diag::err_drv_missing_arg_mtp) << A->getAsString(Args);
     else
       D.Diag(diag::err_drv_invalid_mtp) << A->getAsString(Args);
     return ReadTPMode::Invalid;
   }

 }
 
 void arm::getARMTargetFeatures(const Driver &D, const llvm::Triple &Triple,
                                const ArgList &Args, ArgStringList &CmdArgs,
                                std::vector<StringRef> &Features, bool ForAS) {
   bool KernelOrKext =
       Args.hasArg(options::OPT_mkernel, options::OPT_fapple_kext);
   arm::FloatABI ABI = arm::getARMFloatABI(D, Triple, Args);
-  arm::ReadTPMode ThreadPointer = arm::getReadTPMode(D, Args);
+  arm::ReadTPMode ThreadPointer = arm::getReadTPMode(D, Args, Triple);
   llvm::Optional<std::pair<const Arg *, StringRef>> WaCPU, WaFPU, WaHDiv,
       WaArch;
 
   // This vector will accumulate features from the architecture
   // extension suffixes on -mcpu and -march (e.g. the 'bar' in
   // -mcpu=foo+bar). We want to apply those after the features derived
   // from the FPU, in case -mfpu generates a negative feature which
   // the +bar is supposed to override.

clang/test/Driver/clang-translation.c

 // ARMV7K-APPLE: -funwind-tables
 
 // RUN: %clang -target arm-linux -### -S %s -march=armv5e 2>&1 | \
 // RUN: FileCheck -check-prefix=ARMV5E %s
 // ARMV5E: clang
 // ARMV5E: "-cc1"
 // ARMV5E: "-target-cpu" "arm1022e"
 
-// RUN: %clang -target arm-linux -mtp=cp15 -### -S %s -arch armv7 2>&1 | \
+// RUN: %clang -target armv7-linux -mtp=cp15 -### -S %s 2>&1 | \
 // RUN: FileCheck -check-prefix=ARMv7_THREAD_POINTER-HARD %s
 // ARMv7_THREAD_POINTER-HARD: "-target-feature" "+read-tp-hard"
 
-// RUN: %clang -target arm-linux -mtp=soft -### -S %s -arch armv7 2>&1 | \
+// RUN: %clang -target armv6t2-linux -mtp=cp15 -### -S %s 2>&1 | \
+// RUN: FileCheck -check-prefix=ARMv6T2_THREAD_POINTER-HARD %s
+// ARMv6T2_THREAD_POINTER-HARD: "-target-feature" "+read-tp-hard"
+
+// RUN: %clang -target armv5t-linux -mtp=cp15 -### -S %s 2>&1 | \
+// RUN: FileCheck -check-prefix=ARMv5_THREAD_POINTER_UNSUPP %s
+// ARMv5_THREAD_POINTER_UNSUPP: hardware TLS register is not supported for the armv5 sub-architecture
+
+// RUN: %clang -target thumbv6-linux -mtp=cp15 -### -S %s 2>&1 | \
+// RUN: FileCheck -check-prefix=ARMv6_THREAD_POINTER_UNSUPP %s
+// ARMv6_THREAD_POINTER_UNSUPP: hardware TLS register is not supported for the armv6 sub-architecture
+
+// RUN: %clang -target armv7-linux -mtp=soft -### -S %s 2>&1 | \
 // RUN: FileCheck -check-prefix=ARMv7_THREAD_POINTER_SOFT %s
 // ARMv7_THREAD_POINTER_SOFT-NOT: "-target-feature" "+read-tp-hard"
 
-// RUN: %clang -target arm-linux -### -S %s -arch armv7 2>&1 | \
+// RUN: %clang -target armv7-linux -### -S %s 2>&1 | \
 // RUN: FileCheck -check-prefix=ARMv7_THREAD_POINTER_NON %s
 // ARMv7_THREAD_POINTER_NON-NOT: "-target-feature" "+read-tp-hard"
 
 // RUN: %clang -target aarch64-linux -### -S %s -arch armv8a 2>&1 | \
 // RUN: FileCheck -check-prefix=ARMv8_THREAD_POINTER_NON %s
 // ARMv8_THREAD_POINTER_NON-NOT: "-target-feature" "+tpidr-el1"
 // ARMv8_THREAD_POINTER_NON-NOT: "-target-feature" "+tpidr-el2"
 // ARMv8_THREAD_POINTER_NON-NOT: "-target-feature" "+tpidr-el3"