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Differential D110802

[GlobalISel] Extend CombinerHelper::matchConstantOp() to match constant splat vectors
ClosedPublic

Authored by aemerson on Sep 30 2021, 12:31 AM.

Details

Reviewers
paquette
foad
arsenm
Commits
rGca8316b7048d: [GlobalISel] Extend CombinerHelper::matchConstantOp() to match constant splat…
Summary

This allows the "x op 0 -> x" fold to optimize vector constant RHSs.

Diff Detail

Event Timeline

aemerson created this revision.Sep 30 2021, 12:31 AM
Herald added subscribers: hiraditya, rovka. · View Herald TranscriptSep 30 2021, 12:31 AM
aemerson requested review of this revision.Sep 30 2021, 12:31 AM
Herald added a subscriber: wdng. · View Herald TranscriptSep 30 2021, 12:31 AM
aemerson added a parent revision: D110786: [GlobalISel] Extend G_SELECT of known condition combine to vectors..Sep 30 2021, 12:31 AM
foad added inline comments.Sep 30 2021, 12:57 AM
llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-trivial-arith.mir
33

Could you regenerate the checks and commit before this patch, to avoid all the CHECK-NEXT churn?

Harbormaster completed remote builds in B126501: Diff 376118.Sep 30 2021, 1:13 AM
aemerson mentioned this in rG2e7deee376aa: [AArch64][GlobalISel] Re-generate some tests for D110802..Sep 30 2021, 4:16 AM
aemerson updated this revision to Diff 376157.Sep 30 2021, 4:18 AM

Rebase after test re-gen.

Harbormaster completed remote builds in B126523: Diff 376157.Sep 30 2021, 5:08 AM
foad accepted this revision.Sep 30 2021, 5:11 AM
This revision is now accepted and ready to land.Sep 30 2021, 5:11 AM
Closed by commit rGca8316b7048d: [GlobalISel] Extend CombinerHelper::matchConstantOp() to match constant splat… (authored by aemerson). · Explain WhySep 30 2021, 2:31 PM
This revision was automatically updated to reflect the committed changes.
aemerson added a commit: rGca8316b7048d: [GlobalISel] Extend CombinerHelper::matchConstantOp() to match constant splat….

Revision Contents

PathSize
llvm/
lib/
CodeGen/
GlobalISel/
6 lines
test/
CodeGen/
AArch64/
GlobalISel/
50 lines
161 lines

Diff 376118

llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp

Show First 20 Lines • Show All 2,334 Lines • ▼ Show 20 Lines return I1->findRegisterDefOperandIdx(InstAndDef1->Reg) ==
I2->findRegisterDefOperandIdx(InstAndDef2->Reg); I2->findRegisterDefOperandIdx(InstAndDef2->Reg);
} }
return false; return false;
} }
bool CombinerHelper::matchConstantOp(const MachineOperand &MOP, int64_t C) { bool CombinerHelper::matchConstantOp(const MachineOperand &MOP, int64_t C) {
if (!MOP.isReg()) if (!MOP.isReg())
return false; return false;
// MIPatternMatch doesn't let us look through G_ZEXT etc. auto *MI = MRI.getVRegDef(MOP.getReg());
auto ValAndVReg = getIConstantVRegValWithLookThrough(MOP.getReg(), MRI); auto MaybeCst = isConstantOrConstantSplatVector(*MI, MRI);
return ValAndVReg && ValAndVReg->Value == C; return MaybeCst.hasValue() && *MaybeCst == C;
} }
bool CombinerHelper::replaceSingleDefInstWithOperand(MachineInstr &MI, bool CombinerHelper::replaceSingleDefInstWithOperand(MachineInstr &MI,
unsigned OpIdx) { unsigned OpIdx) {
assert(MI.getNumExplicitDefs() == 1 && "Expected one explicit def?"); assert(MI.getNumExplicitDefs() == 1 && "Expected one explicit def?");
Register OldReg = MI.getOperand(0).getReg(); Register OldReg = MI.getOperand(0).getReg();
Register Replacement = MI.getOperand(OpIdx).getReg(); Register Replacement = MI.getOperand(OpIdx).getReg();
assert(canReplaceReg(OldReg, Replacement, MRI) && "Cannot replace register?"); assert(canReplaceReg(OldReg, Replacement, MRI) && "Cannot replace register?");
▲ Show 20 Lines • Show All 2,063 Lines • Show Last 20 Lines

llvm/test/CodeGen/AArch64/GlobalISel/combine-mul.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -run-pass=aarch64-prelegalizer-combiner -verify-machineinstrs -mtriple aarch64-unknown-unknown %s -o - | FileCheck %s # RUN: llc -run-pass=aarch64-prelegalizer-combiner -verify-machineinstrs -mtriple aarch64-unknown-unknown %s -o - | FileCheck %s
--- ---
name: mul_by_zero name: mul_by_zero
alignment: 4 alignment: 4
tracksRegLiveness: true tracksRegLiveness: true
frameInfo: frameInfo:
maxAlignment: 1 maxAlignment: 1
machineFunctionInfo: {} machineFunctionInfo: {}
body: | body: |
bb.0: bb.0:
liveins: $x0 liveins: $x0
; CHECK-LABEL: name: mul_by_zero ; CHECK-LABEL: name: mul_by_zero
; CHECK: liveins: $x0 ; CHECK: liveins: $x0
; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 ; CHECK-NEXT: {{ $}}
; CHECK: $x0 = COPY [[C]](s64) ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
; CHECK-NEXT: $x0 = COPY [[C]](s64)
%0:_(s64) = COPY $x0 %0:_(s64) = COPY $x0
%1:_(s64) = G_CONSTANT i64 0 %1:_(s64) = G_CONSTANT i64 0
%2:_(s64) = G_MUL %0, %1(s64) %2:_(s64) = G_MUL %0, %1(s64)
$x0 = COPY %2(s64) $x0 = COPY %2(s64)
... ...
--- ---
name: mul_vector_by_zero name: mul_vector_by_zero
alignment: 4 alignment: 4
tracksRegLiveness: true tracksRegLiveness: true
frameInfo: frameInfo:
maxAlignment: 1 maxAlignment: 1
machineFunctionInfo: {} machineFunctionInfo: {}
body: | body: |
bb.0: bb.0:
liveins: $q0 liveins: $q0
; Currently not implemented.
; CHECK-LABEL: name: mul_vector_by_zero ; CHECK-LABEL: name: mul_vector_by_zero
; CHECK: liveins: $q0 ; CHECK: liveins: $q0
; CHECK: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $q0 ; CHECK-NEXT: {{ $}}
; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32) ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32)
; CHECK: [[MUL:%[0-9]+]]:_(<4 x s32>) = G_MUL [[COPY]], [[BUILD_VECTOR]] ; CHECK-NEXT: $q0 = COPY [[BUILD_VECTOR]](<4 x s32>)
; CHECK: $q0 = COPY [[MUL]](<4 x s32>)
%0:_(<4 x s32>) = COPY $q0 %0:_(<4 x s32>) = COPY $q0
%1:_(s32) = G_CONSTANT i32 0 %1:_(s32) = G_CONSTANT i32 0
%2:_(<4 x s32>) = G_BUILD_VECTOR %1(s32), %1(s32), %1(s32), %1(s32) %2:_(<4 x s32>) = G_BUILD_VECTOR %1(s32), %1(s32), %1(s32), %1(s32)
%3:_(<4 x s32>) = G_MUL %0, %2(<4 x s32>) %3:_(<4 x s32>) = G_MUL %0, %2(<4 x s32>)
$q0 = COPY %3(<4 x s32>) $q0 = COPY %3(<4 x s32>)
... ...
--- ---
name: mul_by_one name: mul_by_one
alignment: 4 alignment: 4
tracksRegLiveness: true tracksRegLiveness: true
frameInfo: frameInfo:
maxAlignment: 1 maxAlignment: 1
machineFunctionInfo: {} machineFunctionInfo: {}
body: | body: |
bb.0: bb.0:
liveins: $x0 liveins: $x0
; CHECK-LABEL: name: mul_by_one ; CHECK-LABEL: name: mul_by_one
; CHECK: liveins: $x0 ; CHECK: liveins: $x0
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x0 ; CHECK-NEXT: {{ $}}
; CHECK: $x0 = COPY [[COPY]](s64) ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x0
; CHECK-NEXT: $x0 = COPY [[COPY]](s64)
%0:_(s64) = COPY $x0 %0:_(s64) = COPY $x0
%1:_(s64) = G_CONSTANT i64 1 %1:_(s64) = G_CONSTANT i64 1
%2:_(s64) = G_MUL %0, %1(s64) %2:_(s64) = G_MUL %0, %1(s64)
$x0 = COPY %2(s64) $x0 = COPY %2(s64)
... ...
--- ---
name: mul_vector_by_one name: mul_vector_by_one
alignment: 4 alignment: 4
tracksRegLiveness: true tracksRegLiveness: true
frameInfo: frameInfo:
maxAlignment: 1 maxAlignment: 1
machineFunctionInfo: {} machineFunctionInfo: {}
body: | body: |
bb.0: bb.0:
liveins: $q0 liveins: $q0
; Currently not implemented.
; CHECK-LABEL: name: mul_vector_by_one ; CHECK-LABEL: name: mul_vector_by_one
; CHECK: liveins: $q0 ; CHECK: liveins: $q0
; CHECK: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $q0 ; CHECK-NEXT: {{ $}}
; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $q0
; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32) ; CHECK-NEXT: $q0 = COPY [[COPY]](<4 x s32>)
; CHECK: [[MUL:%[0-9]+]]:_(<4 x s32>) = G_MUL [[COPY]], [[BUILD_VECTOR]]
; CHECK: $q0 = COPY [[MUL]](<4 x s32>)
%0:_(<4 x s32>) = COPY $q0 %0:_(<4 x s32>) = COPY $q0
%1:_(s32) = G_CONSTANT i32 1 %1:_(s32) = G_CONSTANT i32 1
%2:_(<4 x s32>) = G_BUILD_VECTOR %1(s32), %1(s32), %1(s32), %1(s32) %2:_(<4 x s32>) = G_BUILD_VECTOR %1(s32), %1(s32), %1(s32), %1(s32)
%3:_(<4 x s32>) = G_MUL %0, %2(<4 x s32>) %3:_(<4 x s32>) = G_MUL %0, %2(<4 x s32>)
$q0 = COPY %3(<4 x s32>) $q0 = COPY %3(<4 x s32>)
... ...
--- ---
name: mul_by_neg_one name: mul_by_neg_one
alignment: 4 alignment: 4
tracksRegLiveness: true tracksRegLiveness: true
frameInfo: frameInfo:
maxAlignment: 1 maxAlignment: 1
machineFunctionInfo: {} machineFunctionInfo: {}
body: | body: |
bb.0: bb.0:
liveins: $x0 liveins: $x0
; CHECK-LABEL: name: mul_by_neg_one ; CHECK-LABEL: name: mul_by_neg_one
; CHECK: liveins: $x0 ; CHECK: liveins: $x0
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x0 ; CHECK-NEXT: {{ $}}
; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x0
; CHECK: [[SUB:%[0-9]+]]:_(s64) = G_SUB [[C]], [[COPY]] ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
; CHECK: $x0 = COPY [[SUB]](s64) ; CHECK-NEXT: [[SUB:%[0-9]+]]:_(s64) = G_SUB [[C]], [[COPY]]
; CHECK-NEXT: $x0 = COPY [[SUB]](s64)
%0:_(s64) = COPY $x0 %0:_(s64) = COPY $x0
%1:_(s64) = G_CONSTANT i64 -1 %1:_(s64) = G_CONSTANT i64 -1
%2:_(s64) = G_MUL %0, %1(s64) %2:_(s64) = G_MUL %0, %1(s64)
$x0 = COPY %2(s64) $x0 = COPY %2(s64)
... ...
--- ---
name: mul_vector_by_neg_one name: mul_vector_by_neg_one
alignment: 4 alignment: 4
tracksRegLiveness: true tracksRegLiveness: true
frameInfo: frameInfo:
maxAlignment: 1 maxAlignment: 1
machineFunctionInfo: {} machineFunctionInfo: {}
body: | body: |
bb.0: bb.0:
liveins: $q0 liveins: $q0
; Currently not implemented.
; CHECK-LABEL: name: mul_vector_by_neg_one ; CHECK-LABEL: name: mul_vector_by_neg_one
; CHECK: liveins: $q0 ; CHECK: liveins: $q0
; CHECK: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $q0 ; CHECK-NEXT: {{ $}}
; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -1 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $q0
; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32) ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
; CHECK: [[MUL:%[0-9]+]]:_(<4 x s32>) = G_MUL [[COPY]], [[BUILD_VECTOR]] ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32)
; CHECK: $q0 = COPY [[MUL]](<4 x s32>) ; CHECK-NEXT: [[SUB:%[0-9]+]]:_(<4 x s32>) = G_SUB [[BUILD_VECTOR]], [[COPY]]
; CHECK-NEXT: $q0 = COPY [[SUB]](<4 x s32>)
%0:_(<4 x s32>) = COPY $q0 %0:_(<4 x s32>) = COPY $q0
%1:_(s32) = G_CONSTANT i32 -1 %1:_(s32) = G_CONSTANT i32 -1
%2:_(<4 x s32>) = G_BUILD_VECTOR %1(s32), %1(s32), %1(s32), %1(s32) %2:_(<4 x s32>) = G_BUILD_VECTOR %1(s32), %1(s32), %1(s32), %1(s32)
%3:_(<4 x s32>) = G_MUL %0, %2(<4 x s32>) %3:_(<4 x s32>) = G_MUL %0, %2(<4 x s32>)
$q0 = COPY %3(<4 x s32>) $q0 = COPY %3(<4 x s32>)
... ...

llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-trivial-arith.mir

Show All 24 Lines
tracksRegLiveness: true tracksRegLiveness: true
body: | body: |
bb.1.entry: bb.1.entry:
liveins: $w0 liveins: $w0
; Fold (x + 0) -> x ; Fold (x + 0) -> x
; ;
; CHECK-LABEL: name: right_ident_add ; CHECK-LABEL: name: right_ident_add
; CHECK: liveins: $w0 ; CHECK: liveins: $w0
; CHECK: %x:_(s32) = COPY $w0 ; CHECK-NEXT: {{ $}}
foadUnsubmitted
Not Done
ReplyInline Actions

Could you regenerate the checks and commit before this patch, to avoid all the CHECK-NEXT churn?

foad: Could you regenerate the checks and commit before this patch, to avoid all the CHECK-NEXT churn?
; CHECK: $w0 = COPY %x(s32) ; CHECK-NEXT: %x:_(s32) = COPY $w0
; CHECK: RET_ReallyLR implicit $w0 ; CHECK-NEXT: $w0 = COPY %x(s32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
%x:_(s32) = COPY $w0 %x:_(s32) = COPY $w0
%cst:_(s32) = G_CONSTANT i32 0 %cst:_(s32) = G_CONSTANT i32 0
%op:_(s32) = G_ADD %x(s32), %cst %op:_(s32) = G_ADD %x(s32), %cst
$w0 = COPY %op(s32) $w0 = COPY %op(s32)
RET_ReallyLR implicit $w0 RET_ReallyLR implicit $w0
... ...
--- ---
name: mul_0 name: mul_0
tracksRegLiveness: true tracksRegLiveness: true
body: | body: |
bb.1.entry: bb.1.entry:
liveins: $w0 liveins: $w0
; Fold (x * 0) -> 0 ; Fold (x * 0) -> 0
; ;
; CHECK-LABEL: name: mul_0 ; CHECK-LABEL: name: mul_0
; CHECK: liveins: $w0 ; CHECK: liveins: $w0
; CHECK: %cst:_(s32) = G_CONSTANT i32 0 ; CHECK-NEXT: {{ $}}
; CHECK: $w0 = COPY %cst(s32) ; CHECK-NEXT: %cst:_(s32) = G_CONSTANT i32 0
; CHECK: RET_ReallyLR implicit $w0 ; CHECK-NEXT: $w0 = COPY %cst(s32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
%x:_(s32) = COPY $w0 %x:_(s32) = COPY $w0
%cst:_(s32) = G_CONSTANT i32 0 %cst:_(s32) = G_CONSTANT i32 0
%op:_(s32) = G_MUL %x(s32), %cst %op:_(s32) = G_MUL %x(s32), %cst
$w0 = COPY %op(s32) $w0 = COPY %op(s32)
RET_ReallyLR implicit $w0 RET_ReallyLR implicit $w0
... ...
# FIXME: Probably should be able to replace this. # FIXME: Probably should be able to replace this.
--- ---
name: mul_0_cant_replace name: mul_0_cant_replace
tracksRegLiveness: true tracksRegLiveness: true
body: | body: |
bb.1.entry: bb.1.entry:
liveins: $w0 liveins: $w0
; Fold (x * 0) -> 0 ; Fold (x * 0) -> 0
; ;
; CHECK-LABEL: name: mul_0_cant_replace ; CHECK-LABEL: name: mul_0_cant_replace
; CHECK: liveins: $w0 ; CHECK: liveins: $w0
; CHECK: %x:_(s32) = COPY $w0 ; CHECK-NEXT: {{ $}}
; CHECK: %cst:_(s32) = G_CONSTANT i32 0 ; CHECK-NEXT: %x:_(s32) = COPY $w0
; CHECK: %op:gpr(s32) = G_MUL %x, %cst ; CHECK-NEXT: %cst:_(s32) = G_CONSTANT i32 0
; CHECK: $w0 = COPY %op(s32) ; CHECK-NEXT: %op:gpr(s32) = G_MUL %x, %cst
; CHECK: RET_ReallyLR implicit $w0 ; CHECK-NEXT: $w0 = COPY %op(s32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
%x:_(s32) = COPY $w0 %x:_(s32) = COPY $w0
%cst:_(s32) = G_CONSTANT i32 0 %cst:_(s32) = G_CONSTANT i32 0
%op:gpr(s32) = G_MUL %x(s32), %cst %op:gpr(s32) = G_MUL %x(s32), %cst
$w0 = COPY %op(s32) $w0 = COPY %op(s32)
RET_ReallyLR implicit $w0 RET_ReallyLR implicit $w0
... ...
--- ---
name: sdiv_0 name: sdiv_0
tracksRegLiveness: true tracksRegLiveness: true
body: | body: |
bb.1.entry: bb.1.entry:
liveins: $w0 liveins: $w0
; Fold (0 / x) -> 0 ; Fold (0 / x) -> 0
; ;
; CHECK-LABEL: name: sdiv_0 ; CHECK-LABEL: name: sdiv_0
; CHECK: liveins: $w0 ; CHECK: liveins: $w0
; CHECK: %cst:_(s32) = G_CONSTANT i32 0 ; CHECK-NEXT: {{ $}}
; CHECK: $w0 = COPY %cst(s32) ; CHECK-NEXT: %cst:_(s32) = G_CONSTANT i32 0
; CHECK: RET_ReallyLR implicit $w0 ; CHECK-NEXT: $w0 = COPY %cst(s32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
%x:_(s32) = COPY $w0 %x:_(s32) = COPY $w0
%cst:_(s32) = G_CONSTANT i32 0 %cst:_(s32) = G_CONSTANT i32 0
%op:_(s32) = G_SDIV %cst, %x %op:_(s32) = G_SDIV %cst, %x
$w0 = COPY %op(s32) $w0 = COPY %op(s32)
RET_ReallyLR implicit $w0 RET_ReallyLR implicit $w0
... ...
--- ---
name: udiv_0 name: udiv_0
tracksRegLiveness: true tracksRegLiveness: true
body: | body: |
bb.1.entry: bb.1.entry:
liveins: $w0 liveins: $w0
; Fold (0 / x) -> 0 ; Fold (0 / x) -> 0
; ;
; CHECK-LABEL: name: udiv_0 ; CHECK-LABEL: name: udiv_0
; CHECK: liveins: $w0 ; CHECK: liveins: $w0
; CHECK: %cst:_(s32) = G_CONSTANT i32 0 ; CHECK-NEXT: {{ $}}
; CHECK: $w0 = COPY %cst(s32) ; CHECK-NEXT: %cst:_(s32) = G_CONSTANT i32 0
; CHECK: RET_ReallyLR implicit $w0 ; CHECK-NEXT: $w0 = COPY %cst(s32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
%x:_(s32) = COPY $w0 %x:_(s32) = COPY $w0
%cst:_(s32) = G_CONSTANT i32 0 %cst:_(s32) = G_CONSTANT i32 0
%op:_(s32) = G_UDIV %cst, %x %op:_(s32) = G_UDIV %cst, %x
$w0 = COPY %op(s32) $w0 = COPY %op(s32)
RET_ReallyLR implicit $w0 RET_ReallyLR implicit $w0
... ...
--- ---
name: srem_0 name: srem_0
tracksRegLiveness: true tracksRegLiveness: true
body: | body: |
bb.1.entry: bb.1.entry:
liveins: $w0 liveins: $w0
; Fold (0 % x) -> 0 ; Fold (0 % x) -> 0
; ;
; CHECK-LABEL: name: srem_0 ; CHECK-LABEL: name: srem_0
; CHECK: liveins: $w0 ; CHECK: liveins: $w0
; CHECK: %cst:_(s32) = G_CONSTANT i32 0 ; CHECK-NEXT: {{ $}}
; CHECK: $w0 = COPY %cst(s32) ; CHECK-NEXT: %cst:_(s32) = G_CONSTANT i32 0
; CHECK: RET_ReallyLR implicit $w0 ; CHECK-NEXT: $w0 = COPY %cst(s32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
%x:_(s32) = COPY $w0 %x:_(s32) = COPY $w0
%cst:_(s32) = G_CONSTANT i32 0 %cst:_(s32) = G_CONSTANT i32 0
%op:_(s32) = G_SREM %cst, %x %op:_(s32) = G_SREM %cst, %x
$w0 = COPY %op(s32) $w0 = COPY %op(s32)
RET_ReallyLR implicit $w0 RET_ReallyLR implicit $w0
... ...
--- ---
name: urem_0 name: urem_0
tracksRegLiveness: true tracksRegLiveness: true
body: | body: |
bb.1.entry: bb.1.entry:
liveins: $w0 liveins: $w0
; Fold (0 % x) -> 0 ; Fold (0 % x) -> 0
; ;
; CHECK-LABEL: name: urem_0 ; CHECK-LABEL: name: urem_0
; CHECK: liveins: $w0 ; CHECK: liveins: $w0
; CHECK: %cst:_(s32) = G_CONSTANT i32 0 ; CHECK-NEXT: {{ $}}
; CHECK: $w0 = COPY %cst(s32) ; CHECK-NEXT: %cst:_(s32) = G_CONSTANT i32 0
; CHECK: RET_ReallyLR implicit $w0 ; CHECK-NEXT: $w0 = COPY %cst(s32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
%x:_(s32) = COPY $w0 %x:_(s32) = COPY $w0
%cst:_(s32) = G_CONSTANT i32 0 %cst:_(s32) = G_CONSTANT i32 0
%op:_(s32) = G_UREM %cst, %x %op:_(s32) = G_UREM %cst, %x
$w0 = COPY %op(s32) $w0 = COPY %op(s32)
RET_ReallyLR implicit $w0 RET_ReallyLR implicit $w0
... ...
--- ---
name: right_ident_or name: right_ident_or
tracksRegLiveness: true tracksRegLiveness: true
body: | body: |
bb.1.entry: bb.1.entry:
liveins: $w0 liveins: $w0
; Fold (x || 0) -> x ; Fold (x || 0) -> x
; ;
; CHECK-LABEL: name: right_ident_or ; CHECK-LABEL: name: right_ident_or
; CHECK: liveins: $w0 ; CHECK: liveins: $w0
; CHECK: %x:_(s32) = COPY $w0 ; CHECK-NEXT: {{ $}}
; CHECK: $w0 = COPY %x(s32) ; CHECK-NEXT: %x:_(s32) = COPY $w0
; CHECK: RET_ReallyLR implicit $w0 ; CHECK-NEXT: $w0 = COPY %x(s32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
%x:_(s32) = COPY $w0 %x:_(s32) = COPY $w0
%cst:_(s32) = G_CONSTANT i32 0 %cst:_(s32) = G_CONSTANT i32 0
%op:_(s32) = G_OR %x(s32), %cst %op:_(s32) = G_OR %x(s32), %cst
$w0 = COPY %op(s32) $w0 = COPY %op(s32)
RET_ReallyLR implicit $w0 RET_ReallyLR implicit $w0
... ...
--- ---
name: right_ident_xor name: right_ident_xor
tracksRegLiveness: true tracksRegLiveness: true
body: | body: |
bb.1.entry: bb.1.entry:
liveins: $w0 liveins: $w0
; Fold (x | 0) -> x ; Fold (x | 0) -> x
; ;
; CHECK-LABEL: name: right_ident_xor ; CHECK-LABEL: name: right_ident_xor
; CHECK: liveins: $w0 ; CHECK: liveins: $w0
; CHECK: %x:_(s32) = COPY $w0 ; CHECK-NEXT: {{ $}}
; CHECK: $w0 = COPY %x(s32) ; CHECK-NEXT: %x:_(s32) = COPY $w0
; CHECK: RET_ReallyLR implicit $w0 ; CHECK-NEXT: $w0 = COPY %x(s32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
%x:_(s32) = COPY $w0 %x:_(s32) = COPY $w0
%cst:_(s32) = G_CONSTANT i32 0 %cst:_(s32) = G_CONSTANT i32 0
%op:_(s32) = G_XOR %x(s32), %cst %op:_(s32) = G_XOR %x(s32), %cst
$w0 = COPY %op(s32) $w0 = COPY %op(s32)
RET_ReallyLR implicit $w0 RET_ReallyLR implicit $w0
... ...
--- ---
name: right_ident_shl name: right_ident_shl
tracksRegLiveness: true tracksRegLiveness: true
body: | body: |
bb.1.entry: bb.1.entry:
liveins: $w0 liveins: $w0
; Fold (x << 0) -> x ; Fold (x << 0) -> x
; ;
; CHECK-LABEL: name: right_ident_shl ; CHECK-LABEL: name: right_ident_shl
; CHECK: liveins: $w0 ; CHECK: liveins: $w0
; CHECK: %x:_(s32) = COPY $w0 ; CHECK-NEXT: {{ $}}
; CHECK: $w0 = COPY %x(s32) ; CHECK-NEXT: %x:_(s32) = COPY $w0
; CHECK: RET_ReallyLR implicit $w0 ; CHECK-NEXT: $w0 = COPY %x(s32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
%x:_(s32) = COPY $w0 %x:_(s32) = COPY $w0
%cst:_(s32) = G_CONSTANT i32 0 %cst:_(s32) = G_CONSTANT i32 0
%op:_(s32) = G_SHL %x(s32), %cst %op:_(s32) = G_SHL %x(s32), %cst
$w0 = COPY %op(s32) $w0 = COPY %op(s32)
RET_ReallyLR implicit $w0 RET_ReallyLR implicit $w0
... ...
--- ---
name: right_ident_ashr name: right_ident_ashr
tracksRegLiveness: true tracksRegLiveness: true
body: | body: |
bb.1.entry: bb.1.entry:
liveins: $w0 liveins: $w0
; Fold (x ashr 0) -> x ; Fold (x ashr 0) -> x
; ;
; CHECK-LABEL: name: right_ident_ashr ; CHECK-LABEL: name: right_ident_ashr
; CHECK: liveins: $w0 ; CHECK: liveins: $w0
; CHECK: %x:_(s32) = COPY $w0 ; CHECK-NEXT: {{ $}}
; CHECK: $w0 = COPY %x(s32) ; CHECK-NEXT: %x:_(s32) = COPY $w0
; CHECK: RET_ReallyLR implicit $w0 ; CHECK-NEXT: $w0 = COPY %x(s32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
%x:_(s32) = COPY $w0 %x:_(s32) = COPY $w0
%cst:_(s32) = G_CONSTANT i32 0 %cst:_(s32) = G_CONSTANT i32 0
%op:_(s32) = G_ASHR %x(s32), %cst %op:_(s32) = G_ASHR %x(s32), %cst
$w0 = COPY %op(s32) $w0 = COPY %op(s32)
RET_ReallyLR implicit $w0 RET_ReallyLR implicit $w0
... ...
--- ---
name: right_ident_lshr name: right_ident_lshr
tracksRegLiveness: true tracksRegLiveness: true
body: | body: |
bb.1.entry: bb.1.entry:
liveins: $w0 liveins: $w0
; Fold (x lshr 0) -> x ; Fold (x lshr 0) -> x
; ;
; CHECK-LABEL: name: right_ident_lshr ; CHECK-LABEL: name: right_ident_lshr
; CHECK: liveins: $w0 ; CHECK: liveins: $w0
; CHECK: %x:_(s32) = COPY $w0 ; CHECK-NEXT: {{ $}}
; CHECK: $w0 = COPY %x(s32) ; CHECK-NEXT: %x:_(s32) = COPY $w0
; CHECK: RET_ReallyLR implicit $w0 ; CHECK-NEXT: $w0 = COPY %x(s32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
%x:_(s32) = COPY $w0 %x:_(s32) = COPY $w0
%cst:_(s32) = G_CONSTANT i32 0 %cst:_(s32) = G_CONSTANT i32 0
%op:_(s32) = G_LSHR %x(s32), %cst %op:_(s32) = G_LSHR %x(s32), %cst
$w0 = COPY %op(s32) $w0 = COPY %op(s32)
RET_ReallyLR implicit $w0 RET_ReallyLR implicit $w0
... ...
--- ---
name: dont_fold_sub name: dont_fold_sub
tracksRegLiveness: true tracksRegLiveness: true
body: | body: |
bb.1.entry: bb.1.entry:
liveins: $w0 liveins: $w0
; Not an identity, no folding. ; Not an identity, no folding.
; ;
; CHECK-LABEL: name: dont_fold_sub ; CHECK-LABEL: name: dont_fold_sub
; CHECK: liveins: $w0 ; CHECK: liveins: $w0
; CHECK: %x:_(s32) = COPY $w0 ; CHECK-NEXT: {{ $}}
; CHECK: %cst:_(s32) = G_CONSTANT i32 1 ; CHECK-NEXT: %x:_(s32) = COPY $w0
; CHECK: %op:_(s32) = G_SUB %x, %cst ; CHECK-NEXT: %cst:_(s32) = G_CONSTANT i32 1
; CHECK: $w0 = COPY %op(s32) ; CHECK-NEXT: %op:_(s32) = G_SUB %x, %cst
; CHECK: RET_ReallyLR implicit $w0 ; CHECK-NEXT: $w0 = COPY %op(s32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
%x:_(s32) = COPY $w0 %x:_(s32) = COPY $w0
%cst:_(s32) = G_CONSTANT i32 1 %cst:_(s32) = G_CONSTANT i32 1
%op:_(s32) = G_SUB %x(s32), %cst %op:_(s32) = G_SUB %x(s32), %cst
$w0 = COPY %op(s32) $w0 = COPY %op(s32)
RET_ReallyLR implicit $w0 RET_ReallyLR implicit $w0
... ...
--- ---
name: look_through_zext name: look_through_zext
tracksRegLiveness: true tracksRegLiveness: true
body: | body: |
bb.0: bb.0:
liveins: $x0 liveins: $x0
; CHECK-LABEL: name: look_through_zext ; CHECK-LABEL: name: look_through_zext
; CHECK: liveins: $x0 ; CHECK: liveins: $x0
; CHECK: %zero:_(s8) = G_CONSTANT i8 0 ; CHECK-NEXT: {{ $}}
; CHECK: %zext_zero:_(s64) = G_ZEXT %zero(s8) ; CHECK-NEXT: %zero:_(s8) = G_CONSTANT i8 0
; CHECK: $x0 = COPY %zext_zero(s64) ; CHECK-NEXT: %zext_zero:_(s64) = G_ZEXT %zero(s8)
; CHECK: RET_ReallyLR implicit $x0 ; CHECK-NEXT: $x0 = COPY %zext_zero(s64)
; CHECK-NEXT: RET_ReallyLR implicit $x0
%zero:_(s8) = G_CONSTANT i8 0 %zero:_(s8) = G_CONSTANT i8 0
%zext_zero:_(s64) = G_ZEXT %zero(s8) %zext_zero:_(s64) = G_ZEXT %zero(s8)
%c:_(s64) = G_CONSTANT i64 72340172838076673 %c:_(s64) = G_CONSTANT i64 72340172838076673
%mul:_(s64) = G_MUL %c, %zext_zero %mul:_(s64) = G_MUL %c, %zext_zero
$x0 = COPY %mul(s64) $x0 = COPY %mul(s64)
RET_ReallyLR implicit $x0 RET_ReallyLR implicit $x0
... ...
--- ---
name: right_ident_ptr_add name: right_ident_ptr_add
tracksRegLiveness: true tracksRegLiveness: true
body: | body: |
bb.1.entry: bb.1.entry:
liveins: $x0 liveins: $x0
; Fold (x + 0) -> x ; Fold (x + 0) -> x
; ;
; CHECK-LABEL: name: right_ident_ptr_add ; CHECK-LABEL: name: right_ident_ptr_add
; CHECK: liveins: $x0 ; CHECK: liveins: $x0
; CHECK: %x:_(p0) = COPY $x0 ; CHECK-NEXT: {{ $}}
; CHECK: $x0 = COPY %x(p0) ; CHECK-NEXT: %x:_(p0) = COPY $x0
; CHECK: RET_ReallyLR implicit $x0 ; CHECK-NEXT: $x0 = COPY %x(p0)
; CHECK-NEXT: RET_ReallyLR implicit $x0
%x:_(p0) = COPY $x0 %x:_(p0) = COPY $x0
%cst:_(s64) = G_CONSTANT i64 0 %cst:_(s64) = G_CONSTANT i64 0
%op:_(p0) = G_PTR_ADD %x(p0), %cst %op:_(p0) = G_PTR_ADD %x(p0), %cst
$x0 = COPY %op(p0) $x0 = COPY %op(p0)
RET_ReallyLR implicit $x0 RET_ReallyLR implicit $x0
... ...
--- ---
name: right_identity_rotl name: right_identity_rotl
tracksRegLiveness: true tracksRegLiveness: true
body: | body: |
bb.0: bb.0:
liveins: $w0, $w1 liveins: $w0, $w1
; CHECK-LABEL: name: right_identity_rotl ; CHECK-LABEL: name: right_identity_rotl
; CHECK: liveins: $w0, $w1 ; CHECK: liveins: $w0, $w1
; CHECK: %copy:_(s32) = COPY $w0 ; CHECK-NEXT: {{ $}}
; CHECK: $w0 = COPY %copy(s32) ; CHECK-NEXT: %copy:_(s32) = COPY $w0
; CHECK: RET_ReallyLR implicit $w0 ; CHECK-NEXT: $w0 = COPY %copy(s32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
%copy:_(s32) = COPY $w0 %copy:_(s32) = COPY $w0
%zero:_(s32) = G_CONSTANT i32 0 %zero:_(s32) = G_CONSTANT i32 0
%rot:_(s32) = G_ROTL %copy(s32), %zero(s32) %rot:_(s32) = G_ROTL %copy(s32), %zero(s32)
$w0 = COPY %rot(s32) $w0 = COPY %rot(s32)
RET_ReallyLR implicit $w0 RET_ReallyLR implicit $w0
... ...
... ...
--- ---
name: right_identity_rotr name: right_identity_rotr
tracksRegLiveness: true tracksRegLiveness: true
body: | body: |
bb.0: bb.0:
liveins: $w0, $w1 liveins: $w0, $w1
; CHECK-LABEL: name: right_identity_rotr ; CHECK-LABEL: name: right_identity_rotr
; CHECK: liveins: $w0, $w1 ; CHECK: liveins: $w0, $w1
; CHECK: %copy:_(s32) = COPY $w0 ; CHECK-NEXT: {{ $}}
; CHECK: $w0 = COPY %copy(s32) ; CHECK-NEXT: %copy:_(s32) = COPY $w0
; CHECK: RET_ReallyLR implicit $w0 ; CHECK-NEXT: $w0 = COPY %copy(s32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
%copy:_(s32) = COPY $w0 %copy:_(s32) = COPY $w0
%zero:_(s32) = G_CONSTANT i32 0 %zero:_(s32) = G_CONSTANT i32 0
%rot:_(s32) = G_ROTR %copy(s32), %zero(s32) %rot:_(s32) = G_ROTR %copy(s32), %zero(s32)
$w0 = COPY %rot(s32) $w0 = COPY %rot(s32)
RET_ReallyLR implicit $w0 RET_ReallyLR implicit $w0
... ...
---
name: lshr_of_vec_zero
body: |
bb.1:
liveins: $q0
; CHECK-LABEL: name: lshr_of_vec_zero
; CHECK: [[COPY:%[0-9]+]]:_(<8 x s16>) = COPY $q0
; CHECK-NEXT: $q0 = COPY [[COPY]](<8 x s16>)
; CHECK-NEXT: RET_ReallyLR implicit $q0
%0:_(<8 x s16>) = COPY $q0
%5:_(s16) = G_CONSTANT i16 0
%zero_vec:_(<8 x s16>) = G_BUILD_VECTOR %5(s16), %5(s16), %5(s16), %5(s16), %5(s16), %5(s16), %5(s16), %5(s16)
%shift:_(<8 x s16>) = G_LSHR %0, %zero_vec(<8 x s16>)
$q0 = COPY %shift(<8 x s16>)
RET_ReallyLR implicit $q0
...
---
name: ptradd_of_vec_zero
body: |
bb.1:
liveins: $q0
; CHECK-LABEL: name: ptradd_of_vec_zero
; CHECK: [[COPY:%[0-9]+]]:_(<2 x p0>) = COPY $q0
; CHECK-NEXT: $q0 = COPY [[COPY]](<2 x p0>)
; CHECK-NEXT: RET_ReallyLR implicit $q0
%0:_(<2 x p0>) = COPY $q0
%5:_(s64) = G_CONSTANT i64 0
%zero_vec:_(<2 x s64>) = G_BUILD_VECTOR %5(s64), %5(s64)
%ptr:_(<2 x p0>) = G_PTR_ADD %0, %zero_vec(<2 x s64>)
$q0 = COPY %ptr(<2 x p0>)
RET_ReallyLR implicit $q0
...