This is an archive of the discontinued LLVM Phabricator instance.

Differential D110099

[Attributor] Use AAFunctionReachability to determine AANoRecurse
ClosedPublic

Authored by jdoerfert on Sep 20 2021, 12:40 PM.

Details

Reviewers
kuter
uenoku
homerdin
sstefan1
baziotis
jhuber6
Commits
rGac3ec22df906: [Attributor] Use AAFunctionReachability to determine AANoRecurse
Summary

We missed out on AANoRecurse in the module pass because we had no call
graph. With AAFunctionReachability we can simply ask if the function may
reach itself.

Diff Detail

Event Timeline

jdoerfert created this revision.Sep 20 2021, 12:40 PM
Herald added a reviewer: uenoku. · View Herald TranscriptSep 20 2021, 12:40 PM
Herald added a reviewer: homerdin. · View Herald Transcript
Herald added subscribers: ormris, okura, uenoku and 3 others. · View Herald Transcript
jdoerfert requested review of this revision.Sep 20 2021, 12:40 PM
Herald added a reviewer: sstefan1. · View Herald TranscriptSep 20 2021, 12:40 PM
Herald added a reviewer: baziotis. · View Herald Transcript
Herald added a project: Restricted Project. · View Herald Transcript
Harbormaster completed remote builds in B124739: Diff 373693.Sep 20 2021, 12:41 PM
jdoerfert updated this revision to Diff 373694.Sep 20 2021, 12:42 PM

Remove accidentally included files

Harbormaster completed remote builds in B124740: Diff 373694.Sep 20 2021, 12:43 PM
ormris removed a subscriber: ormris.Jan 24 2022, 11:44 AM
jhuber6 accepted this revision.Jan 31 2022, 12:33 PM
jhuber6 added a subscriber: jhuber6.

LGTM

This revision is now accepted and ready to land.Jan 31 2022, 12:33 PM
jdoerfert mentioned this in D118669: [Attributor] Introduce the concept of query AAs.Jan 31 2022, 5:26 PM
This revision was landed with ongoing or failed builds.Jan 31 2022, 11:42 PM
Closed by commit rGac3ec22df906: [Attributor] Use AAFunctionReachability to determine AANoRecurse (authored by jdoerfert). · Explain Why
This revision was automatically updated to reflect the committed changes.
jdoerfert added a commit: rGac3ec22df906: [Attributor] Use AAFunctionReachability to determine AANoRecurse.

Revision Contents

PathSize
llvm/
include/
llvm/
Transforms/
IPO/
14 lines
lib/
Transforms/
IPO/
35 lines
test/
Transforms/
Attributor/
ArgumentPromotion/
56 lines
41 lines
20 lines
32 lines
X86/
10 lines
20 lines
24 lines
45 lines
24 lines
39 lines
56 lines
20 lines
52 lines
20 lines
40 lines
18 lines
85 lines
6 lines
83 lines
103 lines
144 lines
9 lines
29 lines
23 lines
65 lines
8 lines
IPConstantProp/
5 lines
152 lines
74 lines
65 lines
39 lines
85 lines
26 lines
22 lines
4 lines
17 lines
86 lines
48 lines
111 lines
3 lines
14 lines
25 lines
17 lines
18 lines
81 lines
73 lines
101 lines
21 lines
32 lines
950 lines
9 lines
54 lines
2 lines
2 lines
37 lines
79 lines
6 lines
688 lines
658 lines
658 lines
2 lines
4 lines
64 lines
21 lines
557 lines
20 lines
237 lines
123 lines
178 lines
21 lines
24 lines
215 lines
437 lines
178 lines
8 lines
214 lines
1179 lines
316 lines
176 lines
434 lines
56 lines
14 lines
638 lines
1176 lines
169 lines
322 lines
1334 lines
959 lines
313 lines
1331 lines
549 lines
2303 lines
3 lines
OpenMP/
96 lines
62 lines
4 lines
316 lines
35 lines

Diff 404827

llvm/include/llvm/Transforms/IPO/Attributor.h

Show First 20 Lines • Show All 898 Lines • ▼ Show 20 Lines InformationCache(const Module &M, AnalysisGetter &AG,
/* DTGetter */ /* DTGetter */
[&](const Function &F) { [&](const Function &F) {
return AG.getAnalysis<DominatorTreeAnalysis>(F); return AG.getAnalysis<DominatorTreeAnalysis>(F);
}, },
/* PDTGetter */ /* PDTGetter */
[&](const Function &F) { [&](const Function &F) {
return AG.getAnalysis<PostDominatorTreeAnalysis>(F); return AG.getAnalysis<PostDominatorTreeAnalysis>(F);
}), }),
AG(AG), CGSCC(CGSCC), TargetTriple(M.getTargetTriple()) { AG(AG), TargetTriple(M.getTargetTriple()) {
if (CGSCC) if (CGSCC)
initializeModuleSlice(*CGSCC); initializeModuleSlice(*CGSCC);
} }
~InformationCache() { ~InformationCache() {
// The FunctionInfo objects are allocated via a BumpPtrAllocator, we call // The FunctionInfo objects are allocated via a BumpPtrAllocator, we call
// the destructor manually. // the destructor manually.
for (auto &It : FuncInfoMap) for (auto &It : FuncInfoMap)
▲ Show 20 Lines • Show All 100 Lines • ▼ Show 20 Linesstruct InformationCache {
} }
/// Return the analysis result from a pass \p AP for function \p F. /// Return the analysis result from a pass \p AP for function \p F.
template <typename AP> template <typename AP>
typename AP::Result *getAnalysisResultForFunction(const Function &F) { typename AP::Result *getAnalysisResultForFunction(const Function &F) {
return AG.getAnalysis<AP>(F); return AG.getAnalysis<AP>(F);
} }
/// Return SCC size on call graph for function \p F or 0 if unknown.
unsigned getSccSize(const Function &F) {
if (CGSCC && CGSCC->count(const_cast<Function *>(&F)))
return CGSCC->size();
return 0;
}
/// Return datalayout used in the module. /// Return datalayout used in the module.
const DataLayout &getDL() { return DL; } const DataLayout &getDL() { return DL; }
/// Return the map conaining all the knowledge we have from `llvm.assume`s. /// Return the map conaining all the knowledge we have from `llvm.assume`s.
const RetainedKnowledgeMap &getKnowledgeMap() const { return KnowledgeMap; } const RetainedKnowledgeMap &getKnowledgeMap() const { return KnowledgeMap; }
/// Return if \p To is potentially reachable form \p From or not /// Return if \p To is potentially reachable form \p From or not
/// If the same query was answered, return cached result /// If the same query was answered, return cached result
▲ Show 20 Lines • Show All 73 Lines • ▼ Show 20 Linesprivate:
MustBeExecutedContextExplorer Explorer; MustBeExecutedContextExplorer Explorer;
/// A map with knowledge retained in `llvm.assume` instructions. /// A map with knowledge retained in `llvm.assume` instructions.
RetainedKnowledgeMap KnowledgeMap; RetainedKnowledgeMap KnowledgeMap;
/// Getters for analysis. /// Getters for analysis.
AnalysisGetter &AG; AnalysisGetter &AG;
/// The underlying CGSCC, or null if not available.
SetVector<Function *> *CGSCC;
/// Set of inlineable functions /// Set of inlineable functions
SmallPtrSet<const Function *, 8> InlineableFunctions; SmallPtrSet<const Function *, 8> InlineableFunctions;
/// A map for caching results of queries for isPotentiallyReachable /// A map for caching results of queries for isPotentiallyReachable
DenseMap<std::pair<const Instruction *, const Instruction *>, bool> DenseMap<std::pair<const Instruction *, const Instruction *>, bool>
PotentiallyReachableMap; PotentiallyReachableMap;
/// The triple describing the target machine. /// The triple describing the target machine.
▲ Show 20 Lines • Show All 3,500 Lines • ▼ Show 20 Linesstruct AAFunctionReachability
/// Can \p CB reach \p Fn /// Can \p CB reach \p Fn
virtual bool canReach(Attributor &A, CallBase &CB, Function *Fn) const = 0; virtual bool canReach(Attributor &A, CallBase &CB, Function *Fn) const = 0;
/// Create an abstract attribute view for the position \p IRP. /// Create an abstract attribute view for the position \p IRP.
static AAFunctionReachability &createForPosition(const IRPosition &IRP, static AAFunctionReachability &createForPosition(const IRPosition &IRP,
Attributor &A); Attributor &A);
/// See AbstractAttribute::getName() /// See AbstractAttribute::getName()
const std::string getName() const override { return "AAFuncitonReacability"; } const std::string getName() const override { return "AAFunctionReachability"; }
/// See AbstractAttribute::getIdAddr() /// See AbstractAttribute::getIdAddr()
const char *getIdAddr() const override { return &ID; } const char *getIdAddr() const override { return &ID; }
/// This function should return true if the type of the \p AA is AACallEdges. /// This function should return true if the type of the \p AA is AACallEdges.
static bool classof(const AbstractAttribute *AA) { static bool classof(const AbstractAttribute *AA) {
return (AA->getIdAddr() == &ID); return (AA->getIdAddr() == &ID);
} }
▲ Show 20 Lines • Show All 185 Lines • Show Last 20 Lines

llvm/lib/Transforms/IPO/AttributorAttributes.cpp

  • This file is larger than 256 KB, so syntax highlighting is disabled by default.
Show First 20 Lines • Show All 2,437 Lines • ▼ Show 20 Lines const std::string getAsStr() const override {
return getAssumed() ? "norecurse" : "may-recurse"; return getAssumed() ? "norecurse" : "may-recurse";
} }
}; };
struct AANoRecurseFunction final : AANoRecurseImpl { struct AANoRecurseFunction final : AANoRecurseImpl {
AANoRecurseFunction(const IRPosition &IRP, Attributor &A) AANoRecurseFunction(const IRPosition &IRP, Attributor &A)
: AANoRecurseImpl(IRP, A) {} : AANoRecurseImpl(IRP, A) {}
/// See AbstractAttribute::initialize(...).
void initialize(Attributor &A) override {
AANoRecurseImpl::initialize(A);
// TODO: We should build a call graph ourselves to enable this in the module
// pass as well.
if (const Function *F = getAnchorScope())
if (A.getInfoCache().getSccSize(*F) != 1)
indicatePessimisticFixpoint();
}
/// See AbstractAttribute::updateImpl(...). /// See AbstractAttribute::updateImpl(...).
ChangeStatus updateImpl(Attributor &A) override { ChangeStatus updateImpl(Attributor &A) override {
// If all live call sites are known to be no-recurse, we are as well. // If all live call sites are known to be no-recurse, we are as well.
auto CallSitePred = [&](AbstractCallSite ACS) { auto CallSitePred = [&](AbstractCallSite ACS) {
const auto &NoRecurseAA = A.getAAFor<AANoRecurse>( const auto &NoRecurseAA = A.getAAFor<AANoRecurse>(
*this, IRPosition::function(*ACS.getInstruction()->getFunction()), *this, IRPosition::function(*ACS.getInstruction()->getFunction()),
DepClassTy::NONE); DepClassTy::NONE);
return NoRecurseAA.isKnownNoRecurse(); return NoRecurseAA.isKnownNoRecurse();
}; };
bool AllCallSitesKnown; bool AllCallSitesKnown;
if (A.checkForAllCallSites(CallSitePred, *this, true, AllCallSitesKnown)) { if (A.checkForAllCallSites(CallSitePred, *this, true, AllCallSitesKnown)) {
// If we know all call sites and all are known no-recurse, we are done. // If we know all call sites and all are known no-recurse, we are done.
// If all known call sites, which might not be all that exist, are known // If all known call sites, which might not be all that exist, are known
// to be no-recurse, we are not done but we can continue to assume // to be no-recurse, we are not done but we can continue to assume
// no-recurse. If one of the call sites we have not visited will become // no-recurse. If one of the call sites we have not visited will become
// live, another update is triggered. // live, another update is triggered.
if (AllCallSitesKnown) if (AllCallSitesKnown)
indicateOptimisticFixpoint(); indicateOptimisticFixpoint();
return ChangeStatus::UNCHANGED; return ChangeStatus::UNCHANGED;
} }
// If the above check does not hold anymore we look at the calls. const AAFunctionReachability &EdgeReachability =
auto CheckForNoRecurse = [&](Instruction &I) { A.getAAFor<AAFunctionReachability>(*this, getIRPosition(),
const auto &CB = cast<CallBase>(I); DepClassTy::REQUIRED);
if (CB.hasFnAttr(Attribute::NoRecurse)) if (EdgeReachability.canReach(A, getAnchorScope()))
return true;
const auto &NoRecurseAA = A.getAAFor<AANoRecurse>(
*this, IRPosition::callsite_function(CB), DepClassTy::REQUIRED);
if (!NoRecurseAA.isAssumedNoRecurse())
return false;
// Recursion to the same function
if (CB.getCalledFunction() == getAnchorScope())
return false;
return true;
};
bool UsedAssumedInformation = false;
if (!A.checkForAllCallLikeInstructions(CheckForNoRecurse, *this,
UsedAssumedInformation))
return indicatePessimisticFixpoint(); return indicatePessimisticFixpoint();
return ChangeStatus::UNCHANGED; return ChangeStatus::UNCHANGED;
} }
void trackStatistics() const override { STATS_DECLTRACK_FN_ATTR(norecurse) } void trackStatistics() const override { STATS_DECLTRACK_FN_ATTR(norecurse) }
}; };
/// NoRecurse attribute deduction for a call sites. /// NoRecurse attribute deduction for a call sites.
▲ Show 20 Lines • Show All 7,551 Lines • Show Last 20 Lines

llvm/test/Transforms/Attributor/ArgumentPromotion/2008-02-01-ReturnAttrs.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals
; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=4 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM ; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=5 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=4 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=5 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM
; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM ; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM
define internal i32 @deref(i32* %x) nounwind { define internal i32 @deref(i32* %x) nounwind {
; IS__TUNIT_OPM: Function Attrs: argmemonly nofree nosync nounwind readonly willreturn ; IS________OPM: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@deref ; IS________OPM-LABEL: define {{[^@]+}}@deref
; IS__TUNIT_OPM-SAME: (i32* noalias nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[X:%.*]]) #[[ATTR0:[0-9]+]] { ; IS________OPM-SAME: (i32* noalias nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[X:%.*]]) #[[ATTR0:[0-9]+]] {
; IS__TUNIT_OPM-NEXT: entry: ; IS________OPM-NEXT: entry:
; IS__TUNIT_OPM-NEXT: [[TMP2:%.*]] = load i32, i32* [[X]], align 4 ; IS________OPM-NEXT: [[TMP2:%.*]] = load i32, i32* [[X]], align 4
; IS__TUNIT_OPM-NEXT: ret i32 [[TMP2]] ; IS________OPM-NEXT: ret i32 [[TMP2]]
; ;
; IS__TUNIT_NPM: Function Attrs: argmemonly nofree nosync nounwind readonly willreturn ; IS__TUNIT_NPM: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@deref ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@deref
; IS__TUNIT_NPM-SAME: (i32 [[TMP0:%.*]]) #[[ATTR0:[0-9]+]] { ; IS__TUNIT_NPM-SAME: (i32 [[TMP0:%.*]]) #[[ATTR0:[0-9]+]] {
; IS__TUNIT_NPM-NEXT: entry: ; IS__TUNIT_NPM-NEXT: entry:
; IS__TUNIT_NPM-NEXT: [[X_PRIV:%.*]] = alloca i32, align 4 ; IS__TUNIT_NPM-NEXT: [[X_PRIV:%.*]] = alloca i32, align 4
; IS__TUNIT_NPM-NEXT: store i32 [[TMP0]], i32* [[X_PRIV]], align 4 ; IS__TUNIT_NPM-NEXT: store i32 [[TMP0]], i32* [[X_PRIV]], align 4
; IS__TUNIT_NPM-NEXT: [[TMP2:%.*]] = load i32, i32* [[X_PRIV]], align 4 ; IS__TUNIT_NPM-NEXT: [[TMP2:%.*]] = load i32, i32* [[X_PRIV]], align 4
; IS__TUNIT_NPM-NEXT: ret i32 [[TMP2]] ; IS__TUNIT_NPM-NEXT: ret i32 [[TMP2]]
; ;
; IS__CGSCC_OPM: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@deref
; IS__CGSCC_OPM-SAME: (i32* noalias nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[X:%.*]]) #[[ATTR0:[0-9]+]] {
; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: [[TMP2:%.*]] = load i32, i32* [[X]], align 4
; IS__CGSCC_OPM-NEXT: ret i32 [[TMP2]]
;
; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@deref ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@deref
; IS__CGSCC_NPM-SAME: (i32 returned [[TMP0:%.*]]) #[[ATTR0:[0-9]+]] { ; IS__CGSCC_NPM-SAME: (i32 returned [[TMP0:%.*]]) #[[ATTR0:[0-9]+]] {
; IS__CGSCC_NPM-NEXT: entry: ; IS__CGSCC_NPM-NEXT: entry:
; IS__CGSCC_NPM-NEXT: [[X_PRIV:%.*]] = alloca i32, align 4 ; IS__CGSCC_NPM-NEXT: [[X_PRIV:%.*]] = alloca i32, align 4
; IS__CGSCC_NPM-NEXT: store i32 [[TMP0]], i32* [[X_PRIV]], align 4 ; IS__CGSCC_NPM-NEXT: store i32 [[TMP0]], i32* [[X_PRIV]], align 4
; IS__CGSCC_NPM-NEXT: [[TMP2:%.*]] = load i32, i32* [[X_PRIV]], align 4 ; IS__CGSCC_NPM-NEXT: [[TMP2:%.*]] = load i32, i32* [[X_PRIV]], align 4
; IS__CGSCC_NPM-NEXT: ret i32 [[TMP0]] ; IS__CGSCC_NPM-NEXT: ret i32 [[TMP0]]
; ;
entry: entry:
%tmp2 = load i32, i32* %x, align 4 %tmp2 = load i32, i32* %x, align 4
ret i32 %tmp2 ret i32 %tmp2
} }
define i32 @f(i32 %x) { define i32 @f(i32 %x) {
; IS__TUNIT_OPM: Function Attrs: nofree nosync nounwind readnone willreturn ; IS________OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@f ; IS________OPM-LABEL: define {{[^@]+}}@f
; IS__TUNIT_OPM-SAME: (i32 [[X:%.*]]) #[[ATTR1:[0-9]+]] { ; IS________OPM-SAME: (i32 [[X:%.*]]) #[[ATTR1:[0-9]+]] {
; IS__TUNIT_OPM-NEXT: entry: ; IS________OPM-NEXT: entry:
; IS__TUNIT_OPM-NEXT: [[X_ADDR:%.*]] = alloca i32, align 4 ; IS________OPM-NEXT: [[X_ADDR:%.*]] = alloca i32, align 4
; IS__TUNIT_OPM-NEXT: store i32 [[X]], i32* [[X_ADDR]], align 4 ; IS________OPM-NEXT: store i32 [[X]], i32* [[X_ADDR]], align 4
; IS__TUNIT_OPM-NEXT: [[TMP1:%.*]] = call i32 @deref(i32* noalias nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[X_ADDR]]) #[[ATTR2:[0-9]+]] ; IS________OPM-NEXT: [[TMP1:%.*]] = call i32 @deref(i32* noalias nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[X_ADDR]]) #[[ATTR2:[0-9]+]]
; IS__TUNIT_OPM-NEXT: ret i32 [[TMP1]] ; IS________OPM-NEXT: ret i32 [[TMP1]]
; ;
; IS__TUNIT_NPM: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__TUNIT_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@f ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@f
; IS__TUNIT_NPM-SAME: (i32 [[X:%.*]]) #[[ATTR1:[0-9]+]] { ; IS__TUNIT_NPM-SAME: (i32 [[X:%.*]]) #[[ATTR1:[0-9]+]] {
; IS__TUNIT_NPM-NEXT: entry: ; IS__TUNIT_NPM-NEXT: entry:
; IS__TUNIT_NPM-NEXT: [[X_ADDR:%.*]] = alloca i32, align 4 ; IS__TUNIT_NPM-NEXT: [[X_ADDR:%.*]] = alloca i32, align 4
; IS__TUNIT_NPM-NEXT: store i32 [[X]], i32* [[X_ADDR]], align 4 ; IS__TUNIT_NPM-NEXT: store i32 [[X]], i32* [[X_ADDR]], align 4
; IS__TUNIT_NPM-NEXT: [[TMP0:%.*]] = load i32, i32* [[X_ADDR]], align 4 ; IS__TUNIT_NPM-NEXT: [[TMP0:%.*]] = load i32, i32* [[X_ADDR]], align 4
; IS__TUNIT_NPM-NEXT: [[TMP1:%.*]] = call i32 @deref(i32 [[TMP0]]) #[[ATTR2:[0-9]+]] ; IS__TUNIT_NPM-NEXT: [[TMP1:%.*]] = call i32 @deref(i32 [[TMP0]]) #[[ATTR2:[0-9]+]]
; IS__TUNIT_NPM-NEXT: ret i32 [[TMP1]] ; IS__TUNIT_NPM-NEXT: ret i32 [[TMP1]]
; ;
; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@f
; IS__CGSCC_OPM-SAME: (i32 [[X:%.*]]) #[[ATTR1:[0-9]+]] {
; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: [[X_ADDR:%.*]] = alloca i32, align 4
; IS__CGSCC_OPM-NEXT: store i32 [[X]], i32* [[X_ADDR]], align 4
; IS__CGSCC_OPM-NEXT: [[TMP1:%.*]] = call i32 @deref(i32* noalias nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[X_ADDR]]) #[[ATTR2:[0-9]+]]
; IS__CGSCC_OPM-NEXT: ret i32 [[TMP1]]
;
; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@f ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@f
; IS__CGSCC_NPM-SAME: (i32 returned [[X:%.*]]) #[[ATTR0]] { ; IS__CGSCC_NPM-SAME: (i32 returned [[X:%.*]]) #[[ATTR0]] {
; IS__CGSCC_NPM-NEXT: entry: ; IS__CGSCC_NPM-NEXT: entry:
; IS__CGSCC_NPM-NEXT: [[X_ADDR:%.*]] = alloca i32, align 4 ; IS__CGSCC_NPM-NEXT: [[X_ADDR:%.*]] = alloca i32, align 4
; IS__CGSCC_NPM-NEXT: store i32 [[X]], i32* [[X_ADDR]], align 4 ; IS__CGSCC_NPM-NEXT: store i32 [[X]], i32* [[X_ADDR]], align 4
; IS__CGSCC_NPM-NEXT: ret i32 [[X]] ; IS__CGSCC_NPM-NEXT: ret i32 [[X]]
; ;
entry: entry:
%x_addr = alloca i32 %x_addr = alloca i32
store i32 %x, i32* %x_addr, align 4 store i32 %x, i32* %x_addr, align 4
%tmp1 = call i32 @deref( i32* %x_addr ) nounwind %tmp1 = call i32 @deref( i32* %x_addr ) nounwind
ret i32 %tmp1 ret i32 %tmp1
} }
;. ;.
; IS__TUNIT____: attributes #[[ATTR0:[0-9]+]] = { argmemonly nofree nosync nounwind readonly willreturn } ; IS__TUNIT____: attributes #[[ATTR0:[0-9]+]] = { argmemonly nofree norecurse nosync nounwind readonly willreturn }
; IS__TUNIT____: attributes #[[ATTR1:[0-9]+]] = { nofree nosync nounwind readnone willreturn } ; IS__TUNIT____: attributes #[[ATTR1:[0-9]+]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__TUNIT____: attributes #[[ATTR2:[0-9]+]] = { nofree nosync nounwind readonly willreturn } ; IS__TUNIT____: attributes #[[ATTR2:[0-9]+]] = { nofree nosync nounwind readonly willreturn }
;. ;.
; IS__CGSCC_OPM: attributes #[[ATTR0]] = { argmemonly nofree norecurse nosync nounwind readonly willreturn } ; IS__CGSCC_OPM: attributes #[[ATTR0]] = { argmemonly nofree norecurse nosync nounwind readonly willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR1]] = { nofree norecurse nosync nounwind readnone willreturn } ; IS__CGSCC_OPM: attributes #[[ATTR1]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR2]] = { nounwind readonly willreturn } ; IS__CGSCC_OPM: attributes #[[ATTR2]] = { nounwind readonly willreturn }
;. ;.
; IS__CGSCC_NPM: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn } ; IS__CGSCC_NPM: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn }
;. ;.

llvm/test/Transforms/Attributor/ArgumentPromotion/2008-07-02-array-indexing.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals
; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM ; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM
; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM ; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM
; PR2498 ; PR2498
; This test tries to convince CHECK about promoting the load from %A + 2, ; This test tries to convince CHECK about promoting the load from %A + 2,
; because there is a load of %A in the entry block ; because there is a load of %A in the entry block
define internal i32 @callee(i1 %C, i32* %A) { define internal i32 @callee(i1 %C, i32* %A) {
; ;
; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind readonly willreturn ; CHECK: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@callee ; CHECK-LABEL: define {{[^@]+}}@callee
; IS__TUNIT____-SAME: (i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR0:[0-9]+]] { ; CHECK-SAME: (i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR0:[0-9]+]] {
; IS__TUNIT____-NEXT: entry: ; CHECK-NEXT: entry:
; IS__TUNIT____-NEXT: [[A_0:%.*]] = load i32, i32* [[A]], align 4 ; CHECK-NEXT: [[A_0:%.*]] = load i32, i32* [[A]], align 4
; IS__TUNIT____-NEXT: br label [[F:%.*]] ; CHECK-NEXT: br label [[F:%.*]]
; IS__TUNIT____: T: ; CHECK: T:
; IS__TUNIT____-NEXT: unreachable ; CHECK-NEXT: unreachable
; IS__TUNIT____: F: ; CHECK: F:
; IS__TUNIT____-NEXT: [[A_2:%.*]] = getelementptr i32, i32* [[A]], i32 2 ; CHECK-NEXT: [[A_2:%.*]] = getelementptr i32, i32* [[A]], i32 2
; IS__TUNIT____-NEXT: [[R:%.*]] = load i32, i32* [[A_2]], align 4 ; CHECK-NEXT: [[R:%.*]] = load i32, i32* [[A_2]], align 4
; IS__TUNIT____-NEXT: ret i32 [[R]] ; CHECK-NEXT: ret i32 [[R]]
;
; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@callee
; IS__CGSCC____-SAME: (i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR0:[0-9]+]] {
; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: [[A_0:%.*]] = load i32, i32* [[A]], align 4
; IS__CGSCC____-NEXT: br label [[F:%.*]]
; IS__CGSCC____: T:
; IS__CGSCC____-NEXT: unreachable
; IS__CGSCC____: F:
; IS__CGSCC____-NEXT: [[A_2:%.*]] = getelementptr i32, i32* [[A]], i32 2
; IS__CGSCC____-NEXT: [[R:%.*]] = load i32, i32* [[A_2]], align 4
; IS__CGSCC____-NEXT: ret i32 [[R]]
; ;
entry: entry:
; Unconditonally load the element at %A ; Unconditonally load the element at %A
%A.0 = load i32, i32* %A %A.0 = load i32, i32* %A
br i1 %C, label %T, label %F br i1 %C, label %T, label %F
T: T:
ret i32 %A.0 ret i32 %A.0
F: F:
; Load the element at offset two from %A. This should not be promoted! ; Load the element at offset two from %A. This should not be promoted!
%A.2 = getelementptr i32, i32* %A, i32 2 %A.2 = getelementptr i32, i32* %A, i32 2
%R = load i32, i32* %A.2 %R = load i32, i32* %A.2
ret i32 %R ret i32 %R
} }
define i32 @foo(i32* %A) { define i32 @foo(i32* %A) {
; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind readonly willreturn ; IS__TUNIT____: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@foo ; IS__TUNIT____-LABEL: define {{[^@]+}}@foo
; IS__TUNIT____-SAME: (i32* nocapture nofree readonly [[A:%.*]]) #[[ATTR0]] { ; IS__TUNIT____-SAME: (i32* nocapture nofree readonly [[A:%.*]]) #[[ATTR0]] {
; IS__TUNIT____-NEXT: [[X:%.*]] = call i32 @callee(i32* nocapture nofree readonly align 4 [[A]]) #[[ATTR1:[0-9]+]] ; IS__TUNIT____-NEXT: [[X:%.*]] = call i32 @callee(i32* nocapture nofree readonly align 4 [[A]]) #[[ATTR1:[0-9]+]]
; IS__TUNIT____-NEXT: ret i32 [[X]] ; IS__TUNIT____-NEXT: ret i32 [[X]]
; ;
; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn ; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@foo ; IS__CGSCC____-LABEL: define {{[^@]+}}@foo
; IS__CGSCC____-SAME: (i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR0]] { ; IS__CGSCC____-SAME: (i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR0]] {
; IS__CGSCC____-NEXT: [[X:%.*]] = call i32 @callee(i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[A]]) #[[ATTR1:[0-9]+]] ; IS__CGSCC____-NEXT: [[X:%.*]] = call i32 @callee(i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[A]]) #[[ATTR1:[0-9]+]]
; IS__CGSCC____-NEXT: ret i32 [[X]] ; IS__CGSCC____-NEXT: ret i32 [[X]]
; ;
%X = call i32 @callee(i1 false, i32* %A) ; <i32> [#uses=1] %X = call i32 @callee(i1 false, i32* %A) ; <i32> [#uses=1]
ret i32 %X ret i32 %X
} }
;. ;.
; IS__TUNIT____: attributes #[[ATTR0]] = { argmemonly nofree nosync nounwind readonly willreturn } ; IS__TUNIT____: attributes #[[ATTR0]] = { argmemonly nofree norecurse nosync nounwind readonly willreturn }
; IS__TUNIT____: attributes #[[ATTR1]] = { nofree nosync nounwind readonly willreturn } ; IS__TUNIT____: attributes #[[ATTR1]] = { nofree nosync nounwind readonly willreturn }
;. ;.
; IS__CGSCC____: attributes #[[ATTR0]] = { argmemonly nofree norecurse nosync nounwind readonly willreturn } ; IS__CGSCC____: attributes #[[ATTR0]] = { argmemonly nofree norecurse nosync nounwind readonly willreturn }
; IS__CGSCC____: attributes #[[ATTR1]] = { nosync nounwind readonly willreturn } ; IS__CGSCC____: attributes #[[ATTR1]] = { nosync nounwind readonly willreturn }
;. ;.

llvm/test/Transforms/Attributor/ArgumentPromotion/2008-09-07-CGUpdate.ll

Show All 10 Lines
; IS__CGSCC____-NEXT: entry: ; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: unreachable ; IS__CGSCC____-NEXT: unreachable
; ;
entry: entry:
unreachable unreachable
} }
define void @encode(i32* %m, i32* %ts, i32* %new) nounwind { define void @encode(i32* %m, i32* %ts, i32* %new) nounwind {
; IS__TUNIT____: Function Attrs: nofree noreturn nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse noreturn nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@encode ; CHECK-LABEL: define {{[^@]+}}@encode
; IS__TUNIT____-SAME: (i32* nocapture nofree readnone [[M:%.*]], i32* nocapture nofree readnone [[TS:%.*]], i32* nocapture nofree readnone [[NEW:%.*]]) #[[ATTR0:[0-9]+]] { ; CHECK-SAME: (i32* nocapture nofree readnone [[M:%.*]], i32* nocapture nofree readnone [[TS:%.*]], i32* nocapture nofree readnone [[NEW:%.*]]) #[[ATTR0:[0-9]+]] {
; IS__TUNIT____-NEXT: entry: ; CHECK-NEXT: entry:
; IS__TUNIT____-NEXT: unreachable ; CHECK-NEXT: unreachable
;
; IS__CGSCC____: Function Attrs: nofree norecurse noreturn nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@encode
; IS__CGSCC____-SAME: (i32* nocapture nofree readnone [[M:%.*]], i32* nocapture nofree readnone [[TS:%.*]], i32* nocapture nofree readnone [[NEW:%.*]]) #[[ATTR0]] {
; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: unreachable
; ;
entry: entry:
%0 = call fastcc i32 @hash( i32* %ts, i32 0 ) nounwind ; <i32> [#uses=0] %0 = call fastcc i32 @hash( i32* %ts, i32 0 ) nounwind ; <i32> [#uses=0]
unreachable unreachable
} }
;. ;.
; IS__TUNIT____: attributes #[[ATTR0]] = { nofree noreturn nosync nounwind readnone willreturn } ; CHECK: attributes #[[ATTR0]] = { nofree norecurse noreturn nosync nounwind readnone willreturn }
;.
; IS__CGSCC____: attributes #[[ATTR0]] = { nofree norecurse noreturn nosync nounwind readnone willreturn }
;. ;.

llvm/test/Transforms/Attributor/ArgumentPromotion/2008-09-08-CGUpdateSelfEdge.ll

Show All 21 Linesbb: ; preds = %entry
%0 = call fastcc i32 @term_SharingList( i32* null, i32* %List ) nounwind ; <i32> [#uses=0] %0 = call fastcc i32 @term_SharingList( i32* null, i32* %List ) nounwind ; <i32> [#uses=0]
unreachable unreachable
bb5: ; preds = %entry bb5: ; preds = %entry
ret i32 0 ret i32 0
} }
define i32 @term_Sharing(i32* %Term) nounwind { define i32 @term_Sharing(i32* %Term) nounwind {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@term_Sharing ; CHECK-LABEL: define {{[^@]+}}@term_Sharing
; IS__TUNIT____-SAME: (i32* nocapture nofree readnone [[TERM:%.*]]) #[[ATTR0:[0-9]+]] { ; CHECK-SAME: (i32* nocapture nofree readnone [[TERM:%.*]]) #[[ATTR0:[0-9]+]] {
; IS__TUNIT____-NEXT: entry: ; CHECK-NEXT: entry:
; IS__TUNIT____-NEXT: br i1 false, label [[BB_I:%.*]], label [[BB14:%.*]] ; CHECK-NEXT: br i1 false, label [[BB_I:%.*]], label [[BB14:%.*]]
; IS__TUNIT____: bb.i: ; CHECK: bb.i:
; IS__TUNIT____-NEXT: unreachable ; CHECK-NEXT: unreachable
; IS__TUNIT____: bb14: ; CHECK: bb14:
; IS__TUNIT____-NEXT: ret i32 0 ; CHECK-NEXT: ret i32 0
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@term_Sharing
; IS__CGSCC____-SAME: (i32* nocapture nofree readnone [[TERM:%.*]]) #[[ATTR0]] {
; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: br i1 false, label [[BB_I:%.*]], label [[BB14:%.*]]
; IS__CGSCC____: bb.i:
; IS__CGSCC____-NEXT: unreachable
; IS__CGSCC____: bb14:
; IS__CGSCC____-NEXT: ret i32 0
; ;
entry: entry:
br i1 false, label %bb.i, label %bb14 br i1 false, label %bb.i, label %bb14
bb.i: ; preds = %entry bb.i: ; preds = %entry
%0 = call fastcc i32 @term_SharingList( i32* null, i32* null ) nounwind ; <i32> [#uses=0] %0 = call fastcc i32 @term_SharingList( i32* null, i32* null ) nounwind ; <i32> [#uses=0]
ret i32 1 ret i32 1
bb14: ; preds = %entry bb14: ; preds = %entry
ret i32 0 ret i32 0
} }
;. ;.
; IS__TUNIT____: attributes #[[ATTR0]] = { nofree nosync nounwind readnone willreturn } ; CHECK: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn }
;.
; IS__CGSCC____: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn }
;. ;.

llvm/test/Transforms/Attributor/ArgumentPromotion/X86/attributes.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals
; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=3 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM ; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=7 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=3 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=7 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM
; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM ; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM
; Test that we only promote arguments when the caller/callee have compatible ; Test that we only promote arguments when the caller/callee have compatible
; function attrubtes. ; function attrubtes.
target triple = "x86_64-unknown-linux-gnu" target triple = "x86_64-unknown-linux-gnu"
define internal fastcc void @no_promote_avx2(<4 x i64>* %arg, <4 x i64>* readonly %arg1) #0 { define internal fastcc void @no_promote_avx2(<4 x i64>* %arg, <4 x i64>* readonly %arg1) #0 {
▲ Show 20 Lines • Show All 41 Lines • ▼ Show 20 Lines
; IS__TUNIT_NPM-NEXT: [[TMP2:%.*]] = alloca <4 x i64>, align 32 ; IS__TUNIT_NPM-NEXT: [[TMP2:%.*]] = alloca <4 x i64>, align 32
; IS__TUNIT_NPM-NEXT: [[TMP3:%.*]] = bitcast <4 x i64>* [[TMP]] to i8* ; IS__TUNIT_NPM-NEXT: [[TMP3:%.*]] = bitcast <4 x i64>* [[TMP]] to i8*
; IS__TUNIT_NPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture nofree noundef nonnull writeonly align 32 dereferenceable(32) [[TMP3]], i8 noundef 0, i64 noundef 32, i1 noundef false) #[[ATTR3:[0-9]+]] ; IS__TUNIT_NPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture nofree noundef nonnull writeonly align 32 dereferenceable(32) [[TMP3]], i8 noundef 0, i64 noundef 32, i1 noundef false) #[[ATTR3:[0-9]+]]
; IS__TUNIT_NPM-NEXT: call fastcc void @no_promote_avx2(<4 x i64>* noalias nocapture nofree noundef nonnull writeonly align 32 dereferenceable(32) [[TMP2]], <4 x i64>* noalias nocapture nofree noundef nonnull readonly align 32 dereferenceable(32) [[TMP]]) #[[ATTR4:[0-9]+]] ; IS__TUNIT_NPM-NEXT: call fastcc void @no_promote_avx2(<4 x i64>* noalias nocapture nofree noundef nonnull writeonly align 32 dereferenceable(32) [[TMP2]], <4 x i64>* noalias nocapture nofree noundef nonnull readonly align 32 dereferenceable(32) [[TMP]]) #[[ATTR4:[0-9]+]]
; IS__TUNIT_NPM-NEXT: [[TMP4:%.*]] = load <4 x i64>, <4 x i64>* [[TMP2]], align 32 ; IS__TUNIT_NPM-NEXT: [[TMP4:%.*]] = load <4 x i64>, <4 x i64>* [[TMP2]], align 32
; IS__TUNIT_NPM-NEXT: store <4 x i64> [[TMP4]], <4 x i64>* [[ARG]], align 2 ; IS__TUNIT_NPM-NEXT: store <4 x i64> [[TMP4]], <4 x i64>* [[ARG]], align 2
; IS__TUNIT_NPM-NEXT: ret void ; IS__TUNIT_NPM-NEXT: ret void
; ;
; IS__CGSCC_OPM: Function Attrs: argmemonly nofree nosync nounwind uwtable willreturn ; IS__CGSCC_OPM: Function Attrs: argmemonly nofree norecurse nosync nounwind uwtable willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@no_promote ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@no_promote
; IS__CGSCC_OPM-SAME: (<4 x i64>* nocapture nofree noundef nonnull writeonly align 2 dereferenceable(32) [[ARG:%.*]]) #[[ATTR1:[0-9]+]] { ; IS__CGSCC_OPM-SAME: (<4 x i64>* nocapture nofree noundef nonnull writeonly align 2 dereferenceable(32) [[ARG:%.*]]) #[[ATTR1:[0-9]+]] {
; IS__CGSCC_OPM-NEXT: bb: ; IS__CGSCC_OPM-NEXT: bb:
; IS__CGSCC_OPM-NEXT: [[TMP:%.*]] = alloca <4 x i64>, align 32 ; IS__CGSCC_OPM-NEXT: [[TMP:%.*]] = alloca <4 x i64>, align 32
; IS__CGSCC_OPM-NEXT: [[TMP2:%.*]] = alloca <4 x i64>, align 32 ; IS__CGSCC_OPM-NEXT: [[TMP2:%.*]] = alloca <4 x i64>, align 32
; IS__CGSCC_OPM-NEXT: [[TMP3:%.*]] = bitcast <4 x i64>* [[TMP]] to i8* ; IS__CGSCC_OPM-NEXT: [[TMP3:%.*]] = bitcast <4 x i64>* [[TMP]] to i8*
; IS__CGSCC_OPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture nofree noundef nonnull writeonly align 32 dereferenceable(32) [[TMP3]], i8 noundef 0, i64 noundef 32, i1 noundef false) #[[ATTR3:[0-9]+]] ; IS__CGSCC_OPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture nofree noundef nonnull writeonly align 32 dereferenceable(32) [[TMP3]], i8 noundef 0, i64 noundef 32, i1 noundef false) #[[ATTR3:[0-9]+]]
; IS__CGSCC_OPM-NEXT: call fastcc void @no_promote_avx2(<4 x i64>* nocapture nofree noundef nonnull writeonly align 32 dereferenceable(32) [[TMP2]], <4 x i64>* nocapture nofree noundef nonnull readonly align 32 dereferenceable(32) [[TMP]]) #[[ATTR4:[0-9]+]] ; IS__CGSCC_OPM-NEXT: call fastcc void @no_promote_avx2(<4 x i64>* nocapture nofree noundef nonnull writeonly align 32 dereferenceable(32) [[TMP2]], <4 x i64>* nocapture nofree noundef nonnull readonly align 32 dereferenceable(32) [[TMP]]) #[[ATTR4:[0-9]+]]
; IS__CGSCC_OPM-NEXT: [[TMP4:%.*]] = load <4 x i64>, <4 x i64>* [[TMP2]], align 32 ; IS__CGSCC_OPM-NEXT: [[TMP4:%.*]] = load <4 x i64>, <4 x i64>* [[TMP2]], align 32
; IS__CGSCC_OPM-NEXT: store <4 x i64> [[TMP4]], <4 x i64>* [[ARG]], align 2 ; IS__CGSCC_OPM-NEXT: store <4 x i64> [[TMP4]], <4 x i64>* [[ARG]], align 2
; IS__CGSCC_OPM-NEXT: ret void ; IS__CGSCC_OPM-NEXT: ret void
; ;
; IS__CGSCC_NPM: Function Attrs: argmemonly nofree nosync nounwind uwtable willreturn ; IS__CGSCC_NPM: Function Attrs: argmemonly nofree norecurse nosync nounwind uwtable willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@no_promote ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@no_promote
; IS__CGSCC_NPM-SAME: (<4 x i64>* nocapture nofree noundef nonnull writeonly align 2 dereferenceable(32) [[ARG:%.*]]) #[[ATTR1:[0-9]+]] { ; IS__CGSCC_NPM-SAME: (<4 x i64>* nocapture nofree noundef nonnull writeonly align 2 dereferenceable(32) [[ARG:%.*]]) #[[ATTR1:[0-9]+]] {
; IS__CGSCC_NPM-NEXT: bb: ; IS__CGSCC_NPM-NEXT: bb:
; IS__CGSCC_NPM-NEXT: [[TMP:%.*]] = alloca <4 x i64>, align 32 ; IS__CGSCC_NPM-NEXT: [[TMP:%.*]] = alloca <4 x i64>, align 32
; IS__CGSCC_NPM-NEXT: [[TMP2:%.*]] = alloca <4 x i64>, align 32 ; IS__CGSCC_NPM-NEXT: [[TMP2:%.*]] = alloca <4 x i64>, align 32
; IS__CGSCC_NPM-NEXT: [[TMP3:%.*]] = bitcast <4 x i64>* [[TMP]] to i8* ; IS__CGSCC_NPM-NEXT: [[TMP3:%.*]] = bitcast <4 x i64>* [[TMP]] to i8*
; IS__CGSCC_NPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture nofree noundef nonnull writeonly align 32 dereferenceable(32) [[TMP3]], i8 noundef 0, i64 noundef 32, i1 noundef false) #[[ATTR3:[0-9]+]] ; IS__CGSCC_NPM-NEXT: call void @llvm.memset.p0i8.i64(i8* nocapture nofree noundef nonnull writeonly align 32 dereferenceable(32) [[TMP3]], i8 noundef 0, i64 noundef 32, i1 noundef false) #[[ATTR3:[0-9]+]]
; IS__CGSCC_NPM-NEXT: call fastcc void @no_promote_avx2(<4 x i64>* noalias nocapture nofree noundef nonnull writeonly align 32 dereferenceable(32) [[TMP2]], <4 x i64>* noalias nocapture nofree noundef nonnull readonly align 32 dereferenceable(32) [[TMP]]) #[[ATTR4:[0-9]+]] ; IS__CGSCC_NPM-NEXT: call fastcc void @no_promote_avx2(<4 x i64>* noalias nocapture nofree noundef nonnull writeonly align 32 dereferenceable(32) [[TMP2]], <4 x i64>* noalias nocapture nofree noundef nonnull readonly align 32 dereferenceable(32) [[TMP]]) #[[ATTR4:[0-9]+]]
▲ Show 20 Lines • Show All 122 Lines • ▼ Show 20 Lines
;. ;.
; IS__TUNIT____: attributes #[[ATTR0:[0-9]+]] = { argmemonly inlinehint nofree norecurse nosync nounwind uwtable willreturn "target-features"="+avx2" } ; IS__TUNIT____: attributes #[[ATTR0:[0-9]+]] = { argmemonly inlinehint nofree norecurse nosync nounwind uwtable willreturn "target-features"="+avx2" }
; IS__TUNIT____: attributes #[[ATTR1:[0-9]+]] = { argmemonly nofree nosync nounwind uwtable willreturn } ; IS__TUNIT____: attributes #[[ATTR1:[0-9]+]] = { argmemonly nofree nosync nounwind uwtable willreturn }
; IS__TUNIT____: attributes #[[ATTR2:[0-9]+]] = { argmemonly nofree nounwind willreturn writeonly } ; IS__TUNIT____: attributes #[[ATTR2:[0-9]+]] = { argmemonly nofree nounwind willreturn writeonly }
; IS__TUNIT____: attributes #[[ATTR3:[0-9]+]] = { willreturn writeonly } ; IS__TUNIT____: attributes #[[ATTR3:[0-9]+]] = { willreturn writeonly }
; IS__TUNIT____: attributes #[[ATTR4:[0-9]+]] = { nofree nosync nounwind willreturn } ; IS__TUNIT____: attributes #[[ATTR4:[0-9]+]] = { nofree nosync nounwind willreturn }
;. ;.
; IS__CGSCC____: attributes #[[ATTR0:[0-9]+]] = { argmemonly inlinehint nofree norecurse nosync nounwind uwtable willreturn "target-features"="+avx2" } ; IS__CGSCC____: attributes #[[ATTR0:[0-9]+]] = { argmemonly inlinehint nofree norecurse nosync nounwind uwtable willreturn "target-features"="+avx2" }
; IS__CGSCC____: attributes #[[ATTR1:[0-9]+]] = { argmemonly nofree nosync nounwind uwtable willreturn } ; IS__CGSCC____: attributes #[[ATTR1:[0-9]+]] = { argmemonly nofree norecurse nosync nounwind uwtable willreturn }
; IS__CGSCC____: attributes #[[ATTR2:[0-9]+]] = { argmemonly nofree nounwind willreturn writeonly } ; IS__CGSCC____: attributes #[[ATTR2:[0-9]+]] = { argmemonly nofree nounwind willreturn writeonly }
; IS__CGSCC____: attributes #[[ATTR3:[0-9]+]] = { willreturn writeonly } ; IS__CGSCC____: attributes #[[ATTR3:[0-9]+]] = { willreturn writeonly }
; IS__CGSCC____: attributes #[[ATTR4:[0-9]+]] = { nosync nounwind willreturn } ; IS__CGSCC____: attributes #[[ATTR4:[0-9]+]] = { nosync nounwind willreturn }
;. ;.

llvm/test/Transforms/Attributor/ArgumentPromotion/aggregate-promote.ll

Show All 21 Linesentry:
%b.gep = getelementptr %T, %T* %p, i64 0, i32 2 %b.gep = getelementptr %T, %T* %p, i64 0, i32 2
%a = load i32, i32* %a.gep %a = load i32, i32* %a.gep
%b = load i32, i32* %b.gep %b = load i32, i32* %b.gep
%v = add i32 %a, %b %v = add i32 %a, %b
ret i32 %v ret i32 %v
} }
define i32 @caller() { define i32 @caller() {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@caller ; CHECK-LABEL: define {{[^@]+}}@caller
; IS__TUNIT____-SAME: () #[[ATTR0:[0-9]+]] { ; CHECK-SAME: () #[[ATTR0:[0-9]+]] {
; IS__TUNIT____-NEXT: entry: ; CHECK-NEXT: entry:
; IS__TUNIT____-NEXT: ret i32 42 ; CHECK-NEXT: ret i32 42
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@caller
; IS__CGSCC____-SAME: () #[[ATTR0]] {
; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: ret i32 42
; ;
entry: entry:
%v = call i32 @test(%T* @G) %v = call i32 @test(%T* @G)
ret i32 %v ret i32 %v
} }
;. ;.
; IS__TUNIT____: attributes #[[ATTR0]] = { nofree nosync nounwind readnone willreturn } ; CHECK: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn }
;.
; IS__CGSCC____: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn }
;. ;.

llvm/test/Transforms/Attributor/ArgumentPromotion/alignment.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals
; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=2 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM ; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=7 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=2 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=7 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM
; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM ; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM
define void @f() { define void @f() {
; IS__TUNIT____-LABEL: define {{[^@]+}}@f() { ; IS__TUNIT____-LABEL: define {{[^@]+}}@f() {
; IS__TUNIT____-NEXT: entry: ; IS__TUNIT____-NEXT: entry:
; IS__TUNIT____-NEXT: call void @g() ; IS__TUNIT____-NEXT: call void @g()
; IS__TUNIT____-NEXT: ret void ; IS__TUNIT____-NEXT: ret void
▲ Show 20 Lines • Show All 55 Lines • ▼ Show 20 Lines
; ;
%B = alloca i64 %B = alloca i64
store i64 1, i64* %B store i64 1, i64* %B
%C = call i32 @test(i32* %A, i64* %B) %C = call i32 @test(i32* %A, i64* %B)
ret i32 %C ret i32 %C
} }
define i32 @callercaller() { define i32 @callercaller() {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@callercaller ; CHECK-LABEL: define {{[^@]+}}@callercaller
; IS__TUNIT____-SAME: () #[[ATTR0:[0-9]+]] { ; CHECK-SAME: () #[[ATTR0:[0-9]+]] {
; IS__TUNIT____-NEXT: [[B:%.*]] = alloca i32, align 4 ; CHECK-NEXT: [[B:%.*]] = alloca i32, align 4
; IS__TUNIT____-NEXT: ret i32 3 ; CHECK-NEXT: ret i32 3
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@callercaller
; IS__CGSCC____-SAME: () #[[ATTR0]] {
; IS__CGSCC____-NEXT: [[B:%.*]] = alloca i32, align 4
; IS__CGSCC____-NEXT: ret i32 3
; ;
%B = alloca i32 %B = alloca i32
store i32 2, i32* %B store i32 2, i32* %B
%X = call i32 @caller(i32* %B) %X = call i32 @caller(i32* %B)
ret i32 %X ret i32 %X
} }
;. ;.
; IS__TUNIT____: attributes #[[ATTR0]] = { nofree nosync nounwind readnone willreturn } ; CHECK: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn }
;.
; IS__CGSCC____: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn }
;. ;.

llvm/test/Transforms/Attributor/ArgumentPromotion/attrs.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals
; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM ; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM
; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM ; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM
%struct.ss = type { i32, i64 } %struct.ss = type { i32, i64 }
; Don't drop 'byval' on %X here. ; Don't drop 'byval' on %X here.
define internal i32 @f(%struct.ss* byval(%struct.ss) %b, i32* byval(i32) %X, i32 %i) nounwind { define internal i32 @f(%struct.ss* byval(%struct.ss) %b, i32* byval(i32) %X, i32 %i) nounwind {
; ;
; IS__TUNIT_OPM: Function Attrs: argmemonly nofree nosync nounwind willreturn ; IS________OPM: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@f ; IS________OPM-LABEL: define {{[^@]+}}@f
; IS__TUNIT_OPM-SAME: (%struct.ss* noalias nocapture nofree noundef nonnull byval([[STRUCT_SS:%.*]]) align 8 dereferenceable(12) [[B:%.*]], i32* noalias nocapture nofree noundef nonnull byval(i32) align 4 dereferenceable(4) [[X:%.*]]) #[[ATTR0:[0-9]+]] { ; IS________OPM-SAME: (%struct.ss* noalias nocapture nofree noundef nonnull byval([[STRUCT_SS:%.*]]) align 8 dereferenceable(12) [[B:%.*]], i32* noalias nocapture nofree noundef nonnull byval(i32) align 4 dereferenceable(4) [[X:%.*]]) #[[ATTR0:[0-9]+]] {
; IS__TUNIT_OPM-NEXT: entry: ; IS________OPM-NEXT: entry:
; IS__TUNIT_OPM-NEXT: [[TMP:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[B]], i32 0, i32 0 ; IS________OPM-NEXT: [[TMP:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[B]], i32 0, i32 0
; IS__TUNIT_OPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP]], align 8 ; IS________OPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP]], align 8
; IS__TUNIT_OPM-NEXT: [[TMP2:%.*]] = add i32 [[TMP1]], 1 ; IS________OPM-NEXT: [[TMP2:%.*]] = add i32 [[TMP1]], 1
; IS__TUNIT_OPM-NEXT: store i32 [[TMP2]], i32* [[TMP]], align 8 ; IS________OPM-NEXT: store i32 [[TMP2]], i32* [[TMP]], align 8
; IS__TUNIT_OPM-NEXT: store i32 0, i32* [[X]], align 4 ; IS________OPM-NEXT: store i32 0, i32* [[X]], align 4
; IS__TUNIT_OPM-NEXT: [[L:%.*]] = load i32, i32* [[X]], align 4 ; IS________OPM-NEXT: [[L:%.*]] = load i32, i32* [[X]], align 4
; IS__TUNIT_OPM-NEXT: [[A:%.*]] = add i32 [[L]], [[TMP2]] ; IS________OPM-NEXT: [[A:%.*]] = add i32 [[L]], [[TMP2]]
; IS__TUNIT_OPM-NEXT: ret i32 [[A]] ; IS________OPM-NEXT: ret i32 [[A]]
; ;
; IS__TUNIT_NPM: Function Attrs: argmemonly nofree nosync nounwind willreturn ; IS__TUNIT_NPM: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@f ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@f
; IS__TUNIT_NPM-SAME: (i32 [[TMP0:%.*]], i64 [[TMP1:%.*]], i32 [[TMP2:%.*]]) #[[ATTR0:[0-9]+]] { ; IS__TUNIT_NPM-SAME: (i32 [[TMP0:%.*]], i64 [[TMP1:%.*]], i32 [[TMP2:%.*]]) #[[ATTR0:[0-9]+]] {
; IS__TUNIT_NPM-NEXT: entry: ; IS__TUNIT_NPM-NEXT: entry:
; IS__TUNIT_NPM-NEXT: [[X_PRIV:%.*]] = alloca i32, align 4 ; IS__TUNIT_NPM-NEXT: [[X_PRIV:%.*]] = alloca i32, align 4
; IS__TUNIT_NPM-NEXT: store i32 [[TMP2]], i32* [[X_PRIV]], align 4 ; IS__TUNIT_NPM-NEXT: store i32 [[TMP2]], i32* [[X_PRIV]], align 4
; IS__TUNIT_NPM-NEXT: [[B_PRIV:%.*]] = alloca [[STRUCT_SS:%.*]], align 8 ; IS__TUNIT_NPM-NEXT: [[B_PRIV:%.*]] = alloca [[STRUCT_SS:%.*]], align 8
; IS__TUNIT_NPM-NEXT: [[B_PRIV_CAST:%.*]] = bitcast %struct.ss* [[B_PRIV]] to i32* ; IS__TUNIT_NPM-NEXT: [[B_PRIV_CAST:%.*]] = bitcast %struct.ss* [[B_PRIV]] to i32*
; IS__TUNIT_NPM-NEXT: store i32 [[TMP0]], i32* [[B_PRIV_CAST]], align 4 ; IS__TUNIT_NPM-NEXT: store i32 [[TMP0]], i32* [[B_PRIV_CAST]], align 4
; IS__TUNIT_NPM-NEXT: [[B_PRIV_0_1:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[B_PRIV]], i64 0, i32 1 ; IS__TUNIT_NPM-NEXT: [[B_PRIV_0_1:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[B_PRIV]], i64 0, i32 1
; IS__TUNIT_NPM-NEXT: store i64 [[TMP1]], i64* [[B_PRIV_0_1]], align 4 ; IS__TUNIT_NPM-NEXT: store i64 [[TMP1]], i64* [[B_PRIV_0_1]], align 4
; IS__TUNIT_NPM-NEXT: [[TMP:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[B_PRIV]], i32 0, i32 0 ; IS__TUNIT_NPM-NEXT: [[TMP:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[B_PRIV]], i32 0, i32 0
; IS__TUNIT_NPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP]], align 8 ; IS__TUNIT_NPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP]], align 8
; IS__TUNIT_NPM-NEXT: [[TMP2:%.*]] = add i32 [[TMP1]], 1 ; IS__TUNIT_NPM-NEXT: [[TMP2:%.*]] = add i32 [[TMP1]], 1
; IS__TUNIT_NPM-NEXT: store i32 [[TMP2]], i32* [[TMP]], align 8 ; IS__TUNIT_NPM-NEXT: store i32 [[TMP2]], i32* [[TMP]], align 8
; IS__TUNIT_NPM-NEXT: store i32 0, i32* [[X_PRIV]], align 4 ; IS__TUNIT_NPM-NEXT: store i32 0, i32* [[X_PRIV]], align 4
; IS__TUNIT_NPM-NEXT: [[L:%.*]] = load i32, i32* [[X_PRIV]], align 4 ; IS__TUNIT_NPM-NEXT: [[L:%.*]] = load i32, i32* [[X_PRIV]], align 4
; IS__TUNIT_NPM-NEXT: [[A:%.*]] = add i32 [[L]], [[TMP2]] ; IS__TUNIT_NPM-NEXT: [[A:%.*]] = add i32 [[L]], [[TMP2]]
; IS__TUNIT_NPM-NEXT: ret i32 [[A]] ; IS__TUNIT_NPM-NEXT: ret i32 [[A]]
; ;
; IS__CGSCC_OPM: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@f
; IS__CGSCC_OPM-SAME: (%struct.ss* noalias nocapture nofree noundef nonnull byval([[STRUCT_SS:%.*]]) align 8 dereferenceable(12) [[B:%.*]], i32* noalias nocapture nofree noundef nonnull byval(i32) align 4 dereferenceable(4) [[X:%.*]]) #[[ATTR0:[0-9]+]] {
; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: [[TMP:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[B]], i32 0, i32 0
; IS__CGSCC_OPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP]], align 8
; IS__CGSCC_OPM-NEXT: [[TMP2:%.*]] = add i32 [[TMP1]], 1
; IS__CGSCC_OPM-NEXT: store i32 [[TMP2]], i32* [[TMP]], align 8
; IS__CGSCC_OPM-NEXT: store i32 0, i32* [[X]], align 4
; IS__CGSCC_OPM-NEXT: [[L:%.*]] = load i32, i32* [[X]], align 4
; IS__CGSCC_OPM-NEXT: [[A:%.*]] = add i32 [[L]], [[TMP2]]
; IS__CGSCC_OPM-NEXT: ret i32 [[A]]
;
; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@f ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@f
; IS__CGSCC_NPM-SAME: (i32 [[TMP0:%.*]], i64 [[TMP1:%.*]], i32 [[TMP2:%.*]]) #[[ATTR0:[0-9]+]] { ; IS__CGSCC_NPM-SAME: (i32 [[TMP0:%.*]], i64 [[TMP1:%.*]], i32 [[TMP2:%.*]]) #[[ATTR0:[0-9]+]] {
; IS__CGSCC_NPM-NEXT: entry: ; IS__CGSCC_NPM-NEXT: entry:
; IS__CGSCC_NPM-NEXT: [[X_PRIV:%.*]] = alloca i32, align 4 ; IS__CGSCC_NPM-NEXT: [[X_PRIV:%.*]] = alloca i32, align 4
; IS__CGSCC_NPM-NEXT: [[B_PRIV:%.*]] = alloca [[STRUCT_SS:%.*]], align 8 ; IS__CGSCC_NPM-NEXT: [[B_PRIV:%.*]] = alloca [[STRUCT_SS:%.*]], align 8
; IS__CGSCC_NPM-NEXT: [[B_PRIV_CAST:%.*]] = bitcast %struct.ss* [[B_PRIV]] to i32* ; IS__CGSCC_NPM-NEXT: [[B_PRIV_CAST:%.*]] = bitcast %struct.ss* [[B_PRIV]] to i32*
; IS__CGSCC_NPM-NEXT: [[B_PRIV_0_1:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[B_PRIV]], i64 0, i32 1 ; IS__CGSCC_NPM-NEXT: [[B_PRIV_0_1:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[B_PRIV]], i64 0, i32 1
Show All 15 Linesentry:
%l = load i32, i32* %X %l = load i32, i32* %X
%a = add i32 %l, %tmp2 %a = add i32 %l, %tmp2
ret i32 %a ret i32 %a
} }
; Also make sure we don't drop the call zeroext attribute. ; Also make sure we don't drop the call zeroext attribute.
define i32 @test(i32* %X) { define i32 @test(i32* %X) {
; ;
; IS__TUNIT_OPM: Function Attrs: argmemonly nofree nosync nounwind willreturn ; IS__TUNIT_OPM: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@test ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@test
; IS__TUNIT_OPM-SAME: (i32* nocapture nofree readonly [[X:%.*]]) #[[ATTR0]] { ; IS__TUNIT_OPM-SAME: (i32* nocapture nofree readonly [[X:%.*]]) #[[ATTR0]] {
; IS__TUNIT_OPM-NEXT: entry: ; IS__TUNIT_OPM-NEXT: entry:
; IS__TUNIT_OPM-NEXT: [[S:%.*]] = alloca [[STRUCT_SS:%.*]], align 8 ; IS__TUNIT_OPM-NEXT: [[S:%.*]] = alloca [[STRUCT_SS:%.*]], align 8
; IS__TUNIT_OPM-NEXT: [[TMP1:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 0 ; IS__TUNIT_OPM-NEXT: [[TMP1:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 0
; IS__TUNIT_OPM-NEXT: store i32 1, i32* [[TMP1]], align 8 ; IS__TUNIT_OPM-NEXT: store i32 1, i32* [[TMP1]], align 8
; IS__TUNIT_OPM-NEXT: [[TMP4:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 1 ; IS__TUNIT_OPM-NEXT: [[TMP4:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 1
; IS__TUNIT_OPM-NEXT: [[C:%.*]] = call i32 @f(%struct.ss* noalias nocapture nofree noundef nonnull readonly byval([[STRUCT_SS]]) align 8 dereferenceable(12) [[S]], i32* nocapture nofree readonly byval(i32) align 4 [[X]]) #[[ATTR1:[0-9]+]] ; IS__TUNIT_OPM-NEXT: [[C:%.*]] = call i32 @f(%struct.ss* noalias nocapture nofree noundef nonnull readonly byval([[STRUCT_SS]]) align 8 dereferenceable(12) [[S]], i32* nocapture nofree readonly byval(i32) align 4 [[X]]) #[[ATTR1:[0-9]+]]
; IS__TUNIT_OPM-NEXT: ret i32 [[C]] ; IS__TUNIT_OPM-NEXT: ret i32 [[C]]
; ;
; IS__TUNIT_NPM: Function Attrs: argmemonly nofree nosync nounwind willreturn ; IS__TUNIT_NPM: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@test ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@test
; IS__TUNIT_NPM-SAME: (i32* nocapture nofree readonly [[X:%.*]]) #[[ATTR0]] { ; IS__TUNIT_NPM-SAME: (i32* nocapture nofree readonly [[X:%.*]]) #[[ATTR0]] {
; IS__TUNIT_NPM-NEXT: entry: ; IS__TUNIT_NPM-NEXT: entry:
; IS__TUNIT_NPM-NEXT: [[S:%.*]] = alloca [[STRUCT_SS:%.*]], align 8 ; IS__TUNIT_NPM-NEXT: [[S:%.*]] = alloca [[STRUCT_SS:%.*]], align 8
; IS__TUNIT_NPM-NEXT: [[TMP1:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 0 ; IS__TUNIT_NPM-NEXT: [[TMP1:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 0
; IS__TUNIT_NPM-NEXT: store i32 1, i32* [[TMP1]], align 8 ; IS__TUNIT_NPM-NEXT: store i32 1, i32* [[TMP1]], align 8
; IS__TUNIT_NPM-NEXT: [[TMP4:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 1 ; IS__TUNIT_NPM-NEXT: [[TMP4:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 1
; IS__TUNIT_NPM-NEXT: [[S_CAST:%.*]] = bitcast %struct.ss* [[S]] to i32* ; IS__TUNIT_NPM-NEXT: [[S_CAST:%.*]] = bitcast %struct.ss* [[S]] to i32*
Show All 31 Linesentry:
%tmp4 = getelementptr %struct.ss, %struct.ss* %S, i32 0, i32 1 %tmp4 = getelementptr %struct.ss, %struct.ss* %S, i32 0, i32 1
store i64 2, i64* %tmp4, align 4 store i64 2, i64* %tmp4, align 4
%c = call i32 @f(%struct.ss* byval(%struct.ss) %S, i32* byval(i32) %X, i32 zeroext 0) %c = call i32 @f(%struct.ss* byval(%struct.ss) %S, i32* byval(i32) %X, i32 zeroext 0)
ret i32 %c ret i32 %c
} }
;. ;.
; IS__TUNIT____: attributes #[[ATTR0:[0-9]+]] = { argmemonly nofree nosync nounwind willreturn } ; IS__TUNIT____: attributes #[[ATTR0:[0-9]+]] = { argmemonly nofree norecurse nosync nounwind willreturn }
; IS__TUNIT____: attributes #[[ATTR1:[0-9]+]] = { nofree nosync nounwind willreturn } ; IS__TUNIT____: attributes #[[ATTR1:[0-9]+]] = { nofree nosync nounwind willreturn }
;. ;.
; IS__CGSCC_OPM: attributes #[[ATTR0]] = { argmemonly nofree norecurse nosync nounwind willreturn } ; IS__CGSCC_OPM: attributes #[[ATTR0]] = { argmemonly nofree norecurse nosync nounwind willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR1]] = { nounwind willreturn } ; IS__CGSCC_OPM: attributes #[[ATTR1]] = { nounwind willreturn }
;. ;.
; IS__CGSCC_NPM: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn } ; IS__CGSCC_NPM: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn }
;. ;.

llvm/test/Transforms/Attributor/ArgumentPromotion/basictest.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals
; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=2 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM ; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=5 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=2 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=5 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM
; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM ; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM
target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128" target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128"
define internal i32 @test(i32* %X, i32* %Y) { define internal i32 @test(i32* %X, i32* %Y) {
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@test ; IS__CGSCC____-LABEL: define {{[^@]+}}@test
; IS__CGSCC____-SAME: () #[[ATTR0:[0-9]+]] { ; IS__CGSCC____-SAME: () #[[ATTR0:[0-9]+]] {
Show All 14 Lines
; ;
%A = alloca i32 %A = alloca i32
store i32 1, i32* %A store i32 1, i32* %A
%C = call i32 @test(i32* %A, i32* %B) %C = call i32 @test(i32* %A, i32* %B)
ret i32 %C ret i32 %C
} }
define i32 @callercaller() { define i32 @callercaller() {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@callercaller ; CHECK-LABEL: define {{[^@]+}}@callercaller
; IS__TUNIT____-SAME: () #[[ATTR0:[0-9]+]] { ; CHECK-SAME: () #[[ATTR0:[0-9]+]] {
; IS__TUNIT____-NEXT: [[B:%.*]] = alloca i32, align 4 ; CHECK-NEXT: [[B:%.*]] = alloca i32, align 4
; IS__TUNIT____-NEXT: ret i32 3 ; CHECK-NEXT: ret i32 3
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@callercaller
; IS__CGSCC____-SAME: () #[[ATTR0]] {
; IS__CGSCC____-NEXT: [[B:%.*]] = alloca i32, align 4
; IS__CGSCC____-NEXT: ret i32 3
; ;
%B = alloca i32 %B = alloca i32
store i32 2, i32* %B store i32 2, i32* %B
%X = call i32 @caller(i32* %B) %X = call i32 @caller(i32* %B)
ret i32 %X ret i32 %X
} }
;. ;.
; IS__TUNIT____: attributes #[[ATTR0]] = { nofree nosync nounwind readnone willreturn } ; CHECK: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn }
;.
; IS__CGSCC____: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn }
;. ;.

llvm/test/Transforms/Attributor/ArgumentPromotion/byval-2.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals
; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM ; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM
; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM ; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM
%struct.ss = type { i32, i64 } %struct.ss = type { i32, i64 }
define internal void @f(%struct.ss* byval(%struct.ss) %b, i32* byval(i32) %X) nounwind { define internal void @f(%struct.ss* byval(%struct.ss) %b, i32* byval(i32) %X) nounwind {
; IS__TUNIT_OPM: Function Attrs: argmemonly nofree nosync nounwind willreturn ; IS________OPM: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@f ; IS________OPM-LABEL: define {{[^@]+}}@f
; IS__TUNIT_OPM-SAME: (%struct.ss* noalias nocapture nofree noundef nonnull byval([[STRUCT_SS:%.*]]) align 8 dereferenceable(12) [[B:%.*]], i32* noalias nocapture nofree noundef nonnull writeonly byval(i32) align 4 dereferenceable(4) [[X:%.*]]) #[[ATTR0:[0-9]+]] { ; IS________OPM-SAME: (%struct.ss* noalias nocapture nofree noundef nonnull byval([[STRUCT_SS:%.*]]) align 8 dereferenceable(12) [[B:%.*]], i32* noalias nocapture nofree noundef nonnull writeonly byval(i32) align 4 dereferenceable(4) [[X:%.*]]) #[[ATTR0:[0-9]+]] {
; IS__TUNIT_OPM-NEXT: entry: ; IS________OPM-NEXT: entry:
; IS__TUNIT_OPM-NEXT: [[TMP:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[B]], i32 0, i32 0 ; IS________OPM-NEXT: [[TMP:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[B]], i32 0, i32 0
; IS__TUNIT_OPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP]], align 8 ; IS________OPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP]], align 8
; IS__TUNIT_OPM-NEXT: [[TMP2:%.*]] = add i32 [[TMP1]], 1 ; IS________OPM-NEXT: [[TMP2:%.*]] = add i32 [[TMP1]], 1
; IS__TUNIT_OPM-NEXT: store i32 [[TMP2]], i32* [[TMP]], align 8 ; IS________OPM-NEXT: store i32 [[TMP2]], i32* [[TMP]], align 8
; IS__TUNIT_OPM-NEXT: store i32 0, i32* [[X]], align 4 ; IS________OPM-NEXT: store i32 0, i32* [[X]], align 4
; IS__TUNIT_OPM-NEXT: ret void ; IS________OPM-NEXT: ret void
; ;
; IS__TUNIT_NPM: Function Attrs: argmemonly nofree nosync nounwind willreturn ; IS__TUNIT_NPM: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@f ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@f
; IS__TUNIT_NPM-SAME: (i32 [[TMP0:%.*]], i64 [[TMP1:%.*]], i32 [[TMP2:%.*]]) #[[ATTR0:[0-9]+]] { ; IS__TUNIT_NPM-SAME: (i32 [[TMP0:%.*]], i64 [[TMP1:%.*]], i32 [[TMP2:%.*]]) #[[ATTR0:[0-9]+]] {
; IS__TUNIT_NPM-NEXT: entry: ; IS__TUNIT_NPM-NEXT: entry:
; IS__TUNIT_NPM-NEXT: [[X_PRIV:%.*]] = alloca i32, align 4 ; IS__TUNIT_NPM-NEXT: [[X_PRIV:%.*]] = alloca i32, align 4
; IS__TUNIT_NPM-NEXT: store i32 [[TMP2]], i32* [[X_PRIV]], align 4 ; IS__TUNIT_NPM-NEXT: store i32 [[TMP2]], i32* [[X_PRIV]], align 4
; IS__TUNIT_NPM-NEXT: [[B_PRIV:%.*]] = alloca [[STRUCT_SS:%.*]], align 8 ; IS__TUNIT_NPM-NEXT: [[B_PRIV:%.*]] = alloca [[STRUCT_SS:%.*]], align 8
; IS__TUNIT_NPM-NEXT: [[B_PRIV_CAST:%.*]] = bitcast %struct.ss* [[B_PRIV]] to i32* ; IS__TUNIT_NPM-NEXT: [[B_PRIV_CAST:%.*]] = bitcast %struct.ss* [[B_PRIV]] to i32*
; IS__TUNIT_NPM-NEXT: store i32 [[TMP0]], i32* [[B_PRIV_CAST]], align 4 ; IS__TUNIT_NPM-NEXT: store i32 [[TMP0]], i32* [[B_PRIV_CAST]], align 4
; IS__TUNIT_NPM-NEXT: [[B_PRIV_0_1:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[B_PRIV]], i64 0, i32 1 ; IS__TUNIT_NPM-NEXT: [[B_PRIV_0_1:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[B_PRIV]], i64 0, i32 1
; IS__TUNIT_NPM-NEXT: store i64 [[TMP1]], i64* [[B_PRIV_0_1]], align 4 ; IS__TUNIT_NPM-NEXT: store i64 [[TMP1]], i64* [[B_PRIV_0_1]], align 4
; IS__TUNIT_NPM-NEXT: [[TMP:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[B_PRIV]], i32 0, i32 0 ; IS__TUNIT_NPM-NEXT: [[TMP:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[B_PRIV]], i32 0, i32 0
; IS__TUNIT_NPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP]], align 8 ; IS__TUNIT_NPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP]], align 8
; IS__TUNIT_NPM-NEXT: [[TMP2:%.*]] = add i32 [[TMP1]], 1 ; IS__TUNIT_NPM-NEXT: [[TMP2:%.*]] = add i32 [[TMP1]], 1
; IS__TUNIT_NPM-NEXT: store i32 [[TMP2]], i32* [[TMP]], align 8 ; IS__TUNIT_NPM-NEXT: store i32 [[TMP2]], i32* [[TMP]], align 8
; IS__TUNIT_NPM-NEXT: store i32 0, i32* [[X_PRIV]], align 4 ; IS__TUNIT_NPM-NEXT: store i32 0, i32* [[X_PRIV]], align 4
; IS__TUNIT_NPM-NEXT: ret void ; IS__TUNIT_NPM-NEXT: ret void
; ;
; IS__CGSCC_OPM: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@f
; IS__CGSCC_OPM-SAME: (%struct.ss* noalias nocapture nofree noundef nonnull byval([[STRUCT_SS:%.*]]) align 8 dereferenceable(12) [[B:%.*]], i32* noalias nocapture nofree noundef nonnull writeonly byval(i32) align 4 dereferenceable(4) [[X:%.*]]) #[[ATTR0:[0-9]+]] {
; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: [[TMP:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[B]], i32 0, i32 0
; IS__CGSCC_OPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP]], align 8
; IS__CGSCC_OPM-NEXT: [[TMP2:%.*]] = add i32 [[TMP1]], 1
; IS__CGSCC_OPM-NEXT: store i32 [[TMP2]], i32* [[TMP]], align 8
; IS__CGSCC_OPM-NEXT: store i32 0, i32* [[X]], align 4
; IS__CGSCC_OPM-NEXT: ret void
;
; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@f ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@f
; IS__CGSCC_NPM-SAME: (i32 [[TMP0:%.*]], i64 [[TMP1:%.*]], i32 [[TMP2:%.*]]) #[[ATTR0:[0-9]+]] { ; IS__CGSCC_NPM-SAME: (i32 [[TMP0:%.*]], i64 [[TMP1:%.*]], i32 [[TMP2:%.*]]) #[[ATTR0:[0-9]+]] {
; IS__CGSCC_NPM-NEXT: entry: ; IS__CGSCC_NPM-NEXT: entry:
; IS__CGSCC_NPM-NEXT: [[X_PRIV:%.*]] = alloca i32, align 4 ; IS__CGSCC_NPM-NEXT: [[X_PRIV:%.*]] = alloca i32, align 4
; IS__CGSCC_NPM-NEXT: [[B_PRIV:%.*]] = alloca [[STRUCT_SS:%.*]], align 8 ; IS__CGSCC_NPM-NEXT: [[B_PRIV:%.*]] = alloca [[STRUCT_SS:%.*]], align 8
; IS__CGSCC_NPM-NEXT: [[B_PRIV_CAST:%.*]] = bitcast %struct.ss* [[B_PRIV]] to i32* ; IS__CGSCC_NPM-NEXT: [[B_PRIV_CAST:%.*]] = bitcast %struct.ss* [[B_PRIV]] to i32*
; IS__CGSCC_NPM-NEXT: [[B_PRIV_0_1:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[B_PRIV]], i64 0, i32 1 ; IS__CGSCC_NPM-NEXT: [[B_PRIV_0_1:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[B_PRIV]], i64 0, i32 1
Show All 9 Linesentry:
store i32 %tmp2, i32* %tmp, align 4 store i32 %tmp2, i32* %tmp, align 4
store i32 0, i32* %X store i32 0, i32* %X
ret void ret void
} }
define i32 @test(i32* %X) { define i32 @test(i32* %X) {
; ;
; IS__TUNIT_OPM: Function Attrs: argmemonly nofree nosync nounwind willreturn ; IS__TUNIT_OPM: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@test ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@test
; IS__TUNIT_OPM-SAME: (i32* nocapture nofree readonly [[X:%.*]]) #[[ATTR0]] { ; IS__TUNIT_OPM-SAME: (i32* nocapture nofree readonly [[X:%.*]]) #[[ATTR0]] {
; IS__TUNIT_OPM-NEXT: entry: ; IS__TUNIT_OPM-NEXT: entry:
; IS__TUNIT_OPM-NEXT: [[S:%.*]] = alloca [[STRUCT_SS:%.*]], align 8 ; IS__TUNIT_OPM-NEXT: [[S:%.*]] = alloca [[STRUCT_SS:%.*]], align 8
; IS__TUNIT_OPM-NEXT: [[TMP1:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 0 ; IS__TUNIT_OPM-NEXT: [[TMP1:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 0
; IS__TUNIT_OPM-NEXT: store i32 1, i32* [[TMP1]], align 8 ; IS__TUNIT_OPM-NEXT: store i32 1, i32* [[TMP1]], align 8
; IS__TUNIT_OPM-NEXT: [[TMP4:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 1 ; IS__TUNIT_OPM-NEXT: [[TMP4:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 1
; IS__TUNIT_OPM-NEXT: call void @f(%struct.ss* noalias nocapture nofree noundef nonnull readonly byval([[STRUCT_SS]]) align 8 dereferenceable(12) [[S]], i32* nocapture nofree readonly byval(i32) align 4 [[X]]) #[[ATTR1:[0-9]+]] ; IS__TUNIT_OPM-NEXT: call void @f(%struct.ss* noalias nocapture nofree noundef nonnull readonly byval([[STRUCT_SS]]) align 8 dereferenceable(12) [[S]], i32* nocapture nofree readonly byval(i32) align 4 [[X]]) #[[ATTR1:[0-9]+]]
; IS__TUNIT_OPM-NEXT: ret i32 0 ; IS__TUNIT_OPM-NEXT: ret i32 0
; ;
; IS__TUNIT_NPM: Function Attrs: argmemonly nofree nosync nounwind willreturn ; IS__TUNIT_NPM: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@test ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@test
; IS__TUNIT_NPM-SAME: (i32* nocapture nofree readonly [[X:%.*]]) #[[ATTR0]] { ; IS__TUNIT_NPM-SAME: (i32* nocapture nofree readonly [[X:%.*]]) #[[ATTR0]] {
; IS__TUNIT_NPM-NEXT: entry: ; IS__TUNIT_NPM-NEXT: entry:
; IS__TUNIT_NPM-NEXT: [[S:%.*]] = alloca [[STRUCT_SS:%.*]], align 8 ; IS__TUNIT_NPM-NEXT: [[S:%.*]] = alloca [[STRUCT_SS:%.*]], align 8
; IS__TUNIT_NPM-NEXT: [[TMP1:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 0 ; IS__TUNIT_NPM-NEXT: [[TMP1:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 0
; IS__TUNIT_NPM-NEXT: store i32 1, i32* [[TMP1]], align 8 ; IS__TUNIT_NPM-NEXT: store i32 1, i32* [[TMP1]], align 8
; IS__TUNIT_NPM-NEXT: [[TMP4:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 1 ; IS__TUNIT_NPM-NEXT: [[TMP4:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 1
; IS__TUNIT_NPM-NEXT: [[S_CAST:%.*]] = bitcast %struct.ss* [[S]] to i32* ; IS__TUNIT_NPM-NEXT: [[S_CAST:%.*]] = bitcast %struct.ss* [[S]] to i32*
Show All 29 Linesentry:
%tmp1 = getelementptr %struct.ss, %struct.ss* %S, i32 0, i32 0 %tmp1 = getelementptr %struct.ss, %struct.ss* %S, i32 0, i32 0
store i32 1, i32* %tmp1, align 8 store i32 1, i32* %tmp1, align 8
%tmp4 = getelementptr %struct.ss, %struct.ss* %S, i32 0, i32 1 %tmp4 = getelementptr %struct.ss, %struct.ss* %S, i32 0, i32 1
store i64 2, i64* %tmp4, align 4 store i64 2, i64* %tmp4, align 4
call void @f(%struct.ss* byval(%struct.ss) %S, i32* byval(i32) %X) call void @f(%struct.ss* byval(%struct.ss) %S, i32* byval(i32) %X)
ret i32 0 ret i32 0
} }
;. ;.
; IS__TUNIT____: attributes #[[ATTR0:[0-9]+]] = { argmemonly nofree nosync nounwind willreturn } ; IS__TUNIT____: attributes #[[ATTR0:[0-9]+]] = { argmemonly nofree norecurse nosync nounwind willreturn }
; IS__TUNIT____: attributes #[[ATTR1:[0-9]+]] = { nofree nosync nounwind willreturn } ; IS__TUNIT____: attributes #[[ATTR1:[0-9]+]] = { nofree nosync nounwind willreturn }
;. ;.
; IS__CGSCC_OPM: attributes #[[ATTR0]] = { argmemonly nofree norecurse nosync nounwind willreturn } ; IS__CGSCC_OPM: attributes #[[ATTR0]] = { argmemonly nofree norecurse nosync nounwind willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR1]] = { nounwind willreturn } ; IS__CGSCC_OPM: attributes #[[ATTR1]] = { nounwind willreturn }
;. ;.
; IS__CGSCC_NPM: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn } ; IS__CGSCC_NPM: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn }
;. ;.

llvm/test/Transforms/Attributor/ArgumentPromotion/byval.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals
; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM ; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM
; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM ; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM
target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128" target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128"
%struct.ss = type { i32, i64 } %struct.ss = type { i32, i64 }
define internal i32 @f(%struct.ss* byval(%struct.ss) %b) nounwind { define internal i32 @f(%struct.ss* byval(%struct.ss) %b) nounwind {
; IS__TUNIT_OPM: Function Attrs: argmemonly nofree nosync nounwind willreturn ; IS__TUNIT_OPM: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@f ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@f
; IS__TUNIT_OPM-SAME: (%struct.ss* noalias nocapture nofree noundef nonnull byval([[STRUCT_SS:%.*]]) align 8 dereferenceable(12) [[B:%.*]]) #[[ATTR0:[0-9]+]] { ; IS__TUNIT_OPM-SAME: (%struct.ss* noalias nocapture nofree noundef nonnull byval([[STRUCT_SS:%.*]]) align 8 dereferenceable(12) [[B:%.*]]) #[[ATTR0:[0-9]+]] {
; IS__TUNIT_OPM-NEXT: entry: ; IS__TUNIT_OPM-NEXT: entry:
; IS__TUNIT_OPM-NEXT: [[TMP:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[B]], i32 0, i32 0 ; IS__TUNIT_OPM-NEXT: [[TMP:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[B]], i32 0, i32 0
; IS__TUNIT_OPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP]], align 8 ; IS__TUNIT_OPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP]], align 8
; IS__TUNIT_OPM-NEXT: [[TMP2:%.*]] = add i32 [[TMP1]], 1 ; IS__TUNIT_OPM-NEXT: [[TMP2:%.*]] = add i32 [[TMP1]], 1
; IS__TUNIT_OPM-NEXT: store i32 [[TMP2]], i32* [[TMP]], align 8 ; IS__TUNIT_OPM-NEXT: store i32 [[TMP2]], i32* [[TMP]], align 8
; IS__TUNIT_OPM-NEXT: ret i32 [[TMP1]] ; IS__TUNIT_OPM-NEXT: ret i32 [[TMP1]]
; ;
; IS__TUNIT_NPM: Function Attrs: argmemonly nofree nosync nounwind willreturn ; IS__TUNIT_NPM: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@f ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@f
; IS__TUNIT_NPM-SAME: (i32 [[TMP0:%.*]], i64 [[TMP1:%.*]]) #[[ATTR0:[0-9]+]] { ; IS__TUNIT_NPM-SAME: (i32 [[TMP0:%.*]], i64 [[TMP1:%.*]]) #[[ATTR0:[0-9]+]] {
; IS__TUNIT_NPM-NEXT: entry: ; IS__TUNIT_NPM-NEXT: entry:
; IS__TUNIT_NPM-NEXT: [[B_PRIV:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 ; IS__TUNIT_NPM-NEXT: [[B_PRIV:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
; IS__TUNIT_NPM-NEXT: [[B_PRIV_CAST:%.*]] = bitcast %struct.ss* [[B_PRIV]] to i32* ; IS__TUNIT_NPM-NEXT: [[B_PRIV_CAST:%.*]] = bitcast %struct.ss* [[B_PRIV]] to i32*
; IS__TUNIT_NPM-NEXT: store i32 [[TMP0]], i32* [[B_PRIV_CAST]], align 4 ; IS__TUNIT_NPM-NEXT: store i32 [[TMP0]], i32* [[B_PRIV_CAST]], align 4
; IS__TUNIT_NPM-NEXT: [[B_PRIV_0_1:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[B_PRIV]], i64 0, i32 1 ; IS__TUNIT_NPM-NEXT: [[B_PRIV_0_1:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[B_PRIV]], i64 0, i32 1
; IS__TUNIT_NPM-NEXT: store i64 [[TMP1]], i64* [[B_PRIV_0_1]], align 4 ; IS__TUNIT_NPM-NEXT: store i64 [[TMP1]], i64* [[B_PRIV_0_1]], align 4
Show All 30 Linesentry:
%tmp1 = load i32, i32* %tmp, align 4 %tmp1 = load i32, i32* %tmp, align 4
%tmp2 = add i32 %tmp1, 1 %tmp2 = add i32 %tmp1, 1
store i32 %tmp2, i32* %tmp, align 4 store i32 %tmp2, i32* %tmp, align 4
ret i32 %tmp1 ret i32 %tmp1
} }
define internal i32 @g(%struct.ss* byval(%struct.ss) align 32 %b) nounwind { define internal i32 @g(%struct.ss* byval(%struct.ss) align 32 %b) nounwind {
; IS__TUNIT_OPM: Function Attrs: argmemonly nofree nosync nounwind willreturn ; IS________OPM: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@g ; IS________OPM-LABEL: define {{[^@]+}}@g
; IS__TUNIT_OPM-SAME: (%struct.ss* noalias nocapture nofree noundef nonnull byval([[STRUCT_SS:%.*]]) align 32 dereferenceable(12) [[B:%.*]]) #[[ATTR0]] { ; IS________OPM-SAME: (%struct.ss* noalias nocapture nofree noundef nonnull byval([[STRUCT_SS:%.*]]) align 32 dereferenceable(12) [[B:%.*]]) #[[ATTR0:[0-9]+]] {
; IS__TUNIT_OPM-NEXT: entry: ; IS________OPM-NEXT: entry:
; IS__TUNIT_OPM-NEXT: [[TMP:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[B]], i32 0, i32 0 ; IS________OPM-NEXT: [[TMP:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[B]], i32 0, i32 0
; IS__TUNIT_OPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP]], align 32 ; IS________OPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP]], align 32
; IS__TUNIT_OPM-NEXT: [[TMP2:%.*]] = add i32 [[TMP1]], 1 ; IS________OPM-NEXT: [[TMP2:%.*]] = add i32 [[TMP1]], 1
; IS__TUNIT_OPM-NEXT: store i32 [[TMP2]], i32* [[TMP]], align 32 ; IS________OPM-NEXT: store i32 [[TMP2]], i32* [[TMP]], align 32
; IS__TUNIT_OPM-NEXT: ret i32 [[TMP2]] ; IS________OPM-NEXT: ret i32 [[TMP2]]
; ;
; IS__TUNIT_NPM: Function Attrs: argmemonly nofree nosync nounwind willreturn ; IS__TUNIT_NPM: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@g ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@g
; IS__TUNIT_NPM-SAME: (i32 [[TMP0:%.*]], i64 [[TMP1:%.*]]) #[[ATTR0]] { ; IS__TUNIT_NPM-SAME: (i32 [[TMP0:%.*]], i64 [[TMP1:%.*]]) #[[ATTR0]] {
; IS__TUNIT_NPM-NEXT: entry: ; IS__TUNIT_NPM-NEXT: entry:
; IS__TUNIT_NPM-NEXT: [[B_PRIV:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 ; IS__TUNIT_NPM-NEXT: [[B_PRIV:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
; IS__TUNIT_NPM-NEXT: [[B_PRIV_CAST:%.*]] = bitcast %struct.ss* [[B_PRIV]] to i32* ; IS__TUNIT_NPM-NEXT: [[B_PRIV_CAST:%.*]] = bitcast %struct.ss* [[B_PRIV]] to i32*
; IS__TUNIT_NPM-NEXT: store i32 [[TMP0]], i32* [[B_PRIV_CAST]], align 4 ; IS__TUNIT_NPM-NEXT: store i32 [[TMP0]], i32* [[B_PRIV_CAST]], align 4
; IS__TUNIT_NPM-NEXT: [[B_PRIV_0_1:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[B_PRIV]], i64 0, i32 1 ; IS__TUNIT_NPM-NEXT: [[B_PRIV_0_1:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[B_PRIV]], i64 0, i32 1
; IS__TUNIT_NPM-NEXT: store i64 [[TMP1]], i64* [[B_PRIV_0_1]], align 4 ; IS__TUNIT_NPM-NEXT: store i64 [[TMP1]], i64* [[B_PRIV_0_1]], align 4
; IS__TUNIT_NPM-NEXT: [[TMP:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[B_PRIV]], i32 0, i32 0 ; IS__TUNIT_NPM-NEXT: [[TMP:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[B_PRIV]], i32 0, i32 0
; IS__TUNIT_NPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP]], align 32 ; IS__TUNIT_NPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP]], align 32
; IS__TUNIT_NPM-NEXT: [[TMP2:%.*]] = add i32 [[TMP1]], 1 ; IS__TUNIT_NPM-NEXT: [[TMP2:%.*]] = add i32 [[TMP1]], 1
; IS__TUNIT_NPM-NEXT: store i32 [[TMP2]], i32* [[TMP]], align 32 ; IS__TUNIT_NPM-NEXT: store i32 [[TMP2]], i32* [[TMP]], align 32
; IS__TUNIT_NPM-NEXT: ret i32 [[TMP2]] ; IS__TUNIT_NPM-NEXT: ret i32 [[TMP2]]
; ;
; IS__CGSCC_OPM: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@g
; IS__CGSCC_OPM-SAME: (%struct.ss* noalias nocapture nofree noundef nonnull byval([[STRUCT_SS:%.*]]) align 32 dereferenceable(12) [[B:%.*]]) #[[ATTR0]] {
; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: [[TMP:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[B]], i32 0, i32 0
; IS__CGSCC_OPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP]], align 32
; IS__CGSCC_OPM-NEXT: [[TMP2:%.*]] = add i32 [[TMP1]], 1
; IS__CGSCC_OPM-NEXT: store i32 [[TMP2]], i32* [[TMP]], align 32
; IS__CGSCC_OPM-NEXT: ret i32 [[TMP2]]
;
; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@g ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@g
; IS__CGSCC_NPM-SAME: (i32 [[TMP0:%.*]], i64 [[TMP1:%.*]]) #[[ATTR0]] { ; IS__CGSCC_NPM-SAME: (i32 [[TMP0:%.*]], i64 [[TMP1:%.*]]) #[[ATTR0]] {
; IS__CGSCC_NPM-NEXT: entry: ; IS__CGSCC_NPM-NEXT: entry:
; IS__CGSCC_NPM-NEXT: [[B_PRIV:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 ; IS__CGSCC_NPM-NEXT: [[B_PRIV:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
; IS__CGSCC_NPM-NEXT: [[B_PRIV_CAST:%.*]] = bitcast %struct.ss* [[B_PRIV]] to i32* ; IS__CGSCC_NPM-NEXT: [[B_PRIV_CAST:%.*]] = bitcast %struct.ss* [[B_PRIV]] to i32*
; IS__CGSCC_NPM-NEXT: [[B_PRIV_0_1:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[B_PRIV]], i64 0, i32 1 ; IS__CGSCC_NPM-NEXT: [[B_PRIV_0_1:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[B_PRIV]], i64 0, i32 1
; IS__CGSCC_NPM-NEXT: [[TMP:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[B_PRIV]], i32 0, i32 0 ; IS__CGSCC_NPM-NEXT: [[TMP:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[B_PRIV]], i32 0, i32 0
; IS__CGSCC_NPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP]], align 32 ; IS__CGSCC_NPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP]], align 32
; IS__CGSCC_NPM-NEXT: [[TMP2:%.*]] = add i32 1, 1 ; IS__CGSCC_NPM-NEXT: [[TMP2:%.*]] = add i32 1, 1
; IS__CGSCC_NPM-NEXT: ret i32 undef ; IS__CGSCC_NPM-NEXT: ret i32 undef
; ;
entry: entry:
%tmp = getelementptr %struct.ss, %struct.ss* %b, i32 0, i32 0 %tmp = getelementptr %struct.ss, %struct.ss* %b, i32 0, i32 0
%tmp1 = load i32, i32* %tmp, align 4 %tmp1 = load i32, i32* %tmp, align 4
%tmp2 = add i32 %tmp1, 1 %tmp2 = add i32 %tmp1, 1
store i32 %tmp2, i32* %tmp, align 4 store i32 %tmp2, i32* %tmp, align 4
ret i32 %tmp2 ret i32 %tmp2
} }
define i32 @main() nounwind { define i32 @main() nounwind {
; IS__TUNIT_OPM: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@main ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@main
; IS__TUNIT_OPM-SAME: () #[[ATTR1:[0-9]+]] { ; IS__TUNIT_OPM-SAME: () #[[ATTR1:[0-9]+]] {
; IS__TUNIT_OPM-NEXT: entry: ; IS__TUNIT_OPM-NEXT: entry:
; IS__TUNIT_OPM-NEXT: [[S:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 ; IS__TUNIT_OPM-NEXT: [[S:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
; IS__TUNIT_OPM-NEXT: [[TMP1:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 0 ; IS__TUNIT_OPM-NEXT: [[TMP1:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 0
; IS__TUNIT_OPM-NEXT: store i32 1, i32* [[TMP1]], align 8 ; IS__TUNIT_OPM-NEXT: store i32 1, i32* [[TMP1]], align 8
; IS__TUNIT_OPM-NEXT: [[TMP4:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 1 ; IS__TUNIT_OPM-NEXT: [[TMP4:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 1
; IS__TUNIT_OPM-NEXT: [[C0:%.*]] = call i32 @f(%struct.ss* noalias nocapture nofree noundef nonnull readonly byval([[STRUCT_SS]]) align 8 dereferenceable(12) [[S]]) #[[ATTR2:[0-9]+]] ; IS__TUNIT_OPM-NEXT: [[C0:%.*]] = call i32 @f(%struct.ss* noalias nocapture nofree noundef nonnull readonly byval([[STRUCT_SS]]) align 8 dereferenceable(12) [[S]]) #[[ATTR2:[0-9]+]]
; IS__TUNIT_OPM-NEXT: [[C1:%.*]] = call i32 @g(%struct.ss* noalias nocapture nofree noundef nonnull readonly byval([[STRUCT_SS]]) align 32 dereferenceable(12) [[S]]) #[[ATTR2]] ; IS__TUNIT_OPM-NEXT: [[C1:%.*]] = call i32 @g(%struct.ss* noalias nocapture nofree noundef nonnull readonly byval([[STRUCT_SS]]) align 32 dereferenceable(12) [[S]]) #[[ATTR2]]
; IS__TUNIT_OPM-NEXT: [[A:%.*]] = add i32 [[C0]], [[C1]] ; IS__TUNIT_OPM-NEXT: [[A:%.*]] = add i32 [[C0]], [[C1]]
; IS__TUNIT_OPM-NEXT: ret i32 [[A]] ; IS__TUNIT_OPM-NEXT: ret i32 [[A]]
; ;
; IS__TUNIT_NPM: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__TUNIT_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@main ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@main
; IS__TUNIT_NPM-SAME: () #[[ATTR1:[0-9]+]] { ; IS__TUNIT_NPM-SAME: () #[[ATTR1:[0-9]+]] {
; IS__TUNIT_NPM-NEXT: entry: ; IS__TUNIT_NPM-NEXT: entry:
; IS__TUNIT_NPM-NEXT: [[S:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 ; IS__TUNIT_NPM-NEXT: [[S:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
; IS__TUNIT_NPM-NEXT: [[TMP1:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 0 ; IS__TUNIT_NPM-NEXT: [[TMP1:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 0
; IS__TUNIT_NPM-NEXT: store i32 1, i32* [[TMP1]], align 8 ; IS__TUNIT_NPM-NEXT: store i32 1, i32* [[TMP1]], align 8
; IS__TUNIT_NPM-NEXT: [[TMP4:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 1 ; IS__TUNIT_NPM-NEXT: [[TMP4:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 1
; IS__TUNIT_NPM-NEXT: [[S_CAST:%.*]] = bitcast %struct.ss* [[S]] to i32*
; IS__TUNIT_NPM-NEXT: [[TMP0:%.*]] = load i32, i32* [[S_CAST]], align 8
; IS__TUNIT_NPM-NEXT: [[S_0_1:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i64 0, i32 1
; IS__TUNIT_NPM-NEXT: [[TMP1:%.*]] = load i64, i64* [[S_0_1]], align 8
; IS__TUNIT_NPM-NEXT: [[C0:%.*]] = call i32 @f(i32 [[TMP0]], i64 [[TMP1]]) #[[ATTR2:[0-9]+]]
; IS__TUNIT_NPM-NEXT: [[S_CAST1:%.*]] = bitcast %struct.ss* [[S]] to i32* ; IS__TUNIT_NPM-NEXT: [[S_CAST1:%.*]] = bitcast %struct.ss* [[S]] to i32*
; IS__TUNIT_NPM-NEXT: [[TMP2:%.*]] = load i32, i32* [[S_CAST1]], align 32 ; IS__TUNIT_NPM-NEXT: [[TMP0:%.*]] = load i32, i32* [[S_CAST1]], align 8
; IS__TUNIT_NPM-NEXT: [[S_0_12:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i64 0, i32 1 ; IS__TUNIT_NPM-NEXT: [[S_0_12:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i64 0, i32 1
; IS__TUNIT_NPM-NEXT: [[TMP3:%.*]] = load i64, i64* [[S_0_12]], align 32 ; IS__TUNIT_NPM-NEXT: [[TMP1:%.*]] = load i64, i64* [[S_0_12]], align 8
; IS__TUNIT_NPM-NEXT: [[C0:%.*]] = call i32 @f(i32 [[TMP0]], i64 [[TMP1]]) #[[ATTR2:[0-9]+]]
; IS__TUNIT_NPM-NEXT: [[S_CAST:%.*]] = bitcast %struct.ss* [[S]] to i32*
; IS__TUNIT_NPM-NEXT: [[TMP2:%.*]] = load i32, i32* [[S_CAST]], align 32
; IS__TUNIT_NPM-NEXT: [[S_0_1:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i64 0, i32 1
; IS__TUNIT_NPM-NEXT: [[TMP3:%.*]] = load i64, i64* [[S_0_1]], align 32
; IS__TUNIT_NPM-NEXT: [[C1:%.*]] = call i32 @g(i32 [[TMP2]], i64 [[TMP3]]) #[[ATTR2]] ; IS__TUNIT_NPM-NEXT: [[C1:%.*]] = call i32 @g(i32 [[TMP2]], i64 [[TMP3]]) #[[ATTR2]]
; IS__TUNIT_NPM-NEXT: [[A:%.*]] = add i32 [[C0]], [[C1]] ; IS__TUNIT_NPM-NEXT: [[A:%.*]] = add i32 [[C0]], [[C1]]
; IS__TUNIT_NPM-NEXT: ret i32 [[A]] ; IS__TUNIT_NPM-NEXT: ret i32 [[A]]
; ;
; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@main ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@main
; IS__CGSCC_OPM-SAME: () #[[ATTR1:[0-9]+]] { ; IS__CGSCC_OPM-SAME: () #[[ATTR1:[0-9]+]] {
; IS__CGSCC_OPM-NEXT: entry: ; IS__CGSCC_OPM-NEXT: entry:
Show All 24 Linesentry:
%c0 = call i32 @f(%struct.ss* byval(%struct.ss) %S) nounwind %c0 = call i32 @f(%struct.ss* byval(%struct.ss) %S) nounwind
%c1 = call i32 @g(%struct.ss* byval(%struct.ss) %S) nounwind %c1 = call i32 @g(%struct.ss* byval(%struct.ss) %S) nounwind
%a = add i32 %c0, %c1 %a = add i32 %c0, %c1
ret i32 %a ret i32 %a
} }
;. ;.
; IS__TUNIT____: attributes #[[ATTR0:[0-9]+]] = { argmemonly nofree nosync nounwind willreturn } ; IS__TUNIT____: attributes #[[ATTR0:[0-9]+]] = { argmemonly nofree norecurse nosync nounwind willreturn }
; IS__TUNIT____: attributes #[[ATTR1:[0-9]+]] = { nofree nosync nounwind readnone willreturn } ; IS__TUNIT____: attributes #[[ATTR1:[0-9]+]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__TUNIT____: attributes #[[ATTR2:[0-9]+]] = { nofree nosync nounwind willreturn } ; IS__TUNIT____: attributes #[[ATTR2:[0-9]+]] = { nofree nosync nounwind willreturn }
;. ;.
; IS__CGSCC_OPM: attributes #[[ATTR0]] = { argmemonly nofree norecurse nosync nounwind willreturn } ; IS__CGSCC_OPM: attributes #[[ATTR0]] = { argmemonly nofree norecurse nosync nounwind willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR1]] = { nofree norecurse nosync nounwind readnone willreturn } ; IS__CGSCC_OPM: attributes #[[ATTR1]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR2]] = { nounwind willreturn } ; IS__CGSCC_OPM: attributes #[[ATTR2]] = { nounwind willreturn }
;. ;.
; IS__CGSCC_NPM: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn } ; IS__CGSCC_NPM: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn }
;. ;.

llvm/test/Transforms/Attributor/ArgumentPromotion/chained.ll

Show All 20 Lines
; ;
entry: entry:
%y = load i32*, i32** %x %y = load i32*, i32** %x
%z = load i32, i32* %y %z = load i32, i32* %y
ret i32 %z ret i32 %z
} }
define i32 @caller() { define i32 @caller() {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@caller ; CHECK-LABEL: define {{[^@]+}}@caller
; IS__TUNIT____-SAME: () #[[ATTR0:[0-9]+]] { ; CHECK-SAME: () #[[ATTR0:[0-9]+]] {
; IS__TUNIT____-NEXT: entry: ; CHECK-NEXT: entry:
; IS__TUNIT____-NEXT: ret i32 0 ; CHECK-NEXT: ret i32 0
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@caller
; IS__CGSCC____-SAME: () #[[ATTR0]] {
; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: ret i32 0
; ;
entry: entry:
%x = call i32 @test(i32** @G2) %x = call i32 @test(i32** @G2)
ret i32 %x ret i32 %x
} }
;. ;.
; IS__TUNIT____: attributes #[[ATTR0]] = { nofree nosync nounwind readnone willreturn } ; CHECK: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn }
;.
; IS__CGSCC____: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn }
;. ;.

llvm/test/Transforms/Attributor/ArgumentPromotion/control-flow.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals
; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM ; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM
; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM ; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM
; Don't promote around control flow. ; Don't promote around control flow.
define internal i32 @callee(i1 %C, i32* %P) { define internal i32 @callee(i1 %C, i32* %P) {
; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind readonly willreturn ; CHECK: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@callee ; CHECK-LABEL: define {{[^@]+}}@callee
; IS__TUNIT____-SAME: (i1 [[C:%.*]], i32* nocapture nofree readonly [[P:%.*]]) #[[ATTR0:[0-9]+]] { ; CHECK-SAME: (i1 [[C:%.*]], i32* nocapture nofree readonly [[P:%.*]]) #[[ATTR0:[0-9]+]] {
; IS__TUNIT____-NEXT: entry: ; CHECK-NEXT: entry:
; IS__TUNIT____-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]] ; CHECK-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]]
; IS__TUNIT____: T: ; CHECK: T:
; IS__TUNIT____-NEXT: ret i32 17 ; CHECK-NEXT: ret i32 17
; IS__TUNIT____: F: ; CHECK: F:
; IS__TUNIT____-NEXT: [[X:%.*]] = load i32, i32* [[P]], align 4 ; CHECK-NEXT: [[X:%.*]] = load i32, i32* [[P]], align 4
; IS__TUNIT____-NEXT: ret i32 [[X]] ; CHECK-NEXT: ret i32 [[X]]
;
; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@callee
; IS__CGSCC____-SAME: (i1 [[C:%.*]], i32* nocapture nofree readonly [[P:%.*]]) #[[ATTR0:[0-9]+]] {
; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]]
; IS__CGSCC____: T:
; IS__CGSCC____-NEXT: ret i32 17
; IS__CGSCC____: F:
; IS__CGSCC____-NEXT: [[X:%.*]] = load i32, i32* [[P]], align 4
; IS__CGSCC____-NEXT: ret i32 [[X]]
; ;
entry: entry:
br i1 %C, label %T, label %F br i1 %C, label %T, label %F
T: T:
ret i32 17 ret i32 17
F: F:
%X = load i32, i32* %P %X = load i32, i32* %P
ret i32 %X ret i32 %X
} }
define i32 @foo(i1 %C, i32* %P) { define i32 @foo(i1 %C, i32* %P) {
; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind readonly willreturn ; CHECK: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@foo ; CHECK-LABEL: define {{[^@]+}}@foo
; IS__TUNIT____-SAME: (i1 [[C:%.*]], i32* nocapture nofree readonly [[P:%.*]]) #[[ATTR0]] { ; CHECK-SAME: (i1 [[C:%.*]], i32* nocapture nofree readonly [[P:%.*]]) #[[ATTR0]] {
; IS__TUNIT____-NEXT: entry: ; CHECK-NEXT: entry:
; IS__TUNIT____-NEXT: [[X:%.*]] = call i32 @callee(i1 [[C]], i32* nocapture nofree readonly [[P]]) #[[ATTR1:[0-9]+]] ; CHECK-NEXT: [[X:%.*]] = call i32 @callee(i1 [[C]], i32* nocapture nofree readonly [[P]]) #[[ATTR1:[0-9]+]]
; IS__TUNIT____-NEXT: ret i32 [[X]] ; CHECK-NEXT: ret i32 [[X]]
;
; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@foo
; IS__CGSCC____-SAME: (i1 [[C:%.*]], i32* nocapture nofree readonly [[P:%.*]]) #[[ATTR0]] {
; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: [[X:%.*]] = call i32 @callee(i1 [[C]], i32* nocapture nofree readonly [[P]]) #[[ATTR1:[0-9]+]]
; IS__CGSCC____-NEXT: ret i32 [[X]]
; ;
entry: entry:
%X = call i32 @callee(i1 %C, i32* %P) %X = call i32 @callee(i1 %C, i32* %P)
ret i32 %X ret i32 %X
} }
;. ;.
; IS__TUNIT____: attributes #[[ATTR0]] = { argmemonly nofree nosync nounwind readonly willreturn } ; IS__TUNIT____: attributes #[[ATTR0]] = { argmemonly nofree norecurse nosync nounwind readonly willreturn }
; IS__TUNIT____: attributes #[[ATTR1]] = { nofree nosync nounwind readonly willreturn } ; IS__TUNIT____: attributes #[[ATTR1]] = { nofree nosync nounwind readonly willreturn }
;. ;.
; IS__CGSCC____: attributes #[[ATTR0]] = { argmemonly nofree norecurse nosync nounwind readonly willreturn } ; IS__CGSCC____: attributes #[[ATTR0]] = { argmemonly nofree norecurse nosync nounwind readonly willreturn }
; IS__CGSCC____: attributes #[[ATTR1]] = { nosync nounwind readonly willreturn } ; IS__CGSCC____: attributes #[[ATTR1]] = { nosync nounwind readonly willreturn }
;. ;.

llvm/test/Transforms/Attributor/ArgumentPromotion/control-flow2.ll

Show All 21 LinesT: ; preds = %0
ret i32 17 ret i32 17
F: ; preds = %0 F: ; preds = %0
%X = load i32, i32* %P ; <i32> [#uses=1] %X = load i32, i32* %P ; <i32> [#uses=1]
ret i32 %X ret i32 %X
} }
define i32 @foo() { define i32 @foo() {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@foo ; CHECK-LABEL: define {{[^@]+}}@foo
; IS__TUNIT____-SAME: () #[[ATTR0:[0-9]+]] { ; CHECK-SAME: () #[[ATTR0:[0-9]+]] {
; IS__TUNIT____-NEXT: [[A:%.*]] = alloca i32, align 4 ; CHECK-NEXT: [[A:%.*]] = alloca i32, align 4
; IS__TUNIT____-NEXT: ret i32 17 ; CHECK-NEXT: ret i32 17
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@foo
; IS__CGSCC____-SAME: () #[[ATTR0]] {
; IS__CGSCC____-NEXT: [[A:%.*]] = alloca i32, align 4
; IS__CGSCC____-NEXT: ret i32 17
; ;
%A = alloca i32 ; <i32*> [#uses=2] %A = alloca i32 ; <i32*> [#uses=2]
store i32 17, i32* %A store i32 17, i32* %A
%X = call i32 @callee( i1 false, i32* %A ) ; <i32> [#uses=1] %X = call i32 @callee( i1 false, i32* %A ) ; <i32> [#uses=1]
ret i32 %X ret i32 %X
} }
;. ;.
; IS__TUNIT____: attributes #[[ATTR0]] = { nofree nosync nounwind readnone willreturn } ; CHECK: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn }
;.
; IS__CGSCC____: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn }
;. ;.

llvm/test/Transforms/Attributor/ArgumentPromotion/crash.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals
; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=2 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM ; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=2 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=2 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=2 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM
; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM ; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM
%S = type { %S* } %S = type { %S* }
; Inlining should nuke the invoke (and any inlined calls) here even with ; Inlining should nuke the invoke (and any inlined calls) here even with
; argument promotion running along with it. ; argument promotion running along with it.
define void @zot() personality i32 (...)* @wibble { define void @zot() personality i32 (...)* @wibble {
; IS__TUNIT____: Function Attrs: nofree noreturn nosync nounwind readnone willreturn ; IS__TUNIT____: Function Attrs: nofree norecurse noreturn nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@zot ; IS__TUNIT____-LABEL: define {{[^@]+}}@zot
; IS__TUNIT____-SAME: () #[[ATTR0:[0-9]+]] personality i32 (...)* @wibble { ; IS__TUNIT____-SAME: () #[[ATTR0:[0-9]+]] personality i32 (...)* @wibble {
; IS__TUNIT____-NEXT: bb: ; IS__TUNIT____-NEXT: bb:
; IS__TUNIT____-NEXT: call void @hoge() #[[ATTR2:[0-9]+]] ; IS__TUNIT____-NEXT: call void @hoge() #[[ATTR2:[0-9]+]]
; IS__TUNIT____-NEXT: unreachable ; IS__TUNIT____-NEXT: unreachable
; IS__TUNIT____: bb1: ; IS__TUNIT____: bb1:
; IS__TUNIT____-NEXT: unreachable ; IS__TUNIT____-NEXT: unreachable
; IS__TUNIT____: bb2: ; IS__TUNIT____: bb2:
; IS__TUNIT____-NEXT: unreachable ; IS__TUNIT____-NEXT: unreachable
; ;
; IS__CGSCC____: Function Attrs: nofree norecurse noreturn nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse noreturn nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@zot ; IS__CGSCC____-LABEL: define {{[^@]+}}@zot
; IS__CGSCC____-SAME: () #[[ATTR0:[0-9]+]] personality i32 (...)* @wibble { ; IS__CGSCC____-SAME: () #[[ATTR0:[0-9]+]] personality i32 (...)* @wibble {
; IS__CGSCC____-NEXT: bb: ; IS__CGSCC____-NEXT: bb:
; IS__CGSCC____-NEXT: call void @hoge() #[[ATTR2:[0-9]+]] ; IS__CGSCC____-NEXT: call void @hoge() #[[ATTR3:[0-9]+]]
; IS__CGSCC____-NEXT: unreachable ; IS__CGSCC____-NEXT: unreachable
; IS__CGSCC____: bb1: ; IS__CGSCC____: bb1:
; IS__CGSCC____-NEXT: unreachable ; IS__CGSCC____-NEXT: unreachable
; IS__CGSCC____: bb2: ; IS__CGSCC____: bb2:
; IS__CGSCC____-NEXT: unreachable ; IS__CGSCC____-NEXT: unreachable
; ;
bb: bb:
invoke void @hoge() invoke void @hoge()
to label %bb1 unwind label %bb2 to label %bb1 unwind label %bb2
bb1: bb1:
unreachable unreachable
bb2: bb2:
%tmp = landingpad { i8*, i32 } %tmp = landingpad { i8*, i32 }
cleanup cleanup
unreachable unreachable
} }
define internal void @hoge() { define internal void @hoge() {
; IS__TUNIT____: Function Attrs: nofree noreturn nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse noreturn nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@hoge ; CHECK-LABEL: define {{[^@]+}}@hoge
; IS__TUNIT____-SAME: () #[[ATTR0]] { ; CHECK-SAME: () #[[ATTR0:[0-9]+]] {
; IS__TUNIT____-NEXT: bb: ; CHECK-NEXT: bb:
; IS__TUNIT____-NEXT: unreachable ; CHECK-NEXT: unreachable
;
; IS__CGSCC____: Function Attrs: nofree norecurse noreturn nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@hoge
; IS__CGSCC____-SAME: () #[[ATTR0]] {
; IS__CGSCC____-NEXT: bb:
; IS__CGSCC____-NEXT: unreachable
; ;
bb: bb:
%tmp = call fastcc i8* @spam(i1 (i8*)* @eggs) %tmp = call fastcc i8* @spam(i1 (i8*)* @eggs)
%tmp1 = call fastcc i8* @spam(i1 (i8*)* @barney) %tmp1 = call fastcc i8* @spam(i1 (i8*)* @barney)
unreachable unreachable
} }
define internal fastcc i8* @spam(i1 (i8*)* %arg) { define internal fastcc i8* @spam(i1 (i8*)* %arg) {
; IS__CGSCC____: Function Attrs: nofree norecurse noreturn nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse noreturn nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@spam ; IS__CGSCC____-LABEL: define {{[^@]+}}@spam
; IS__CGSCC____-SAME: () #[[ATTR0]] { ; IS__CGSCC____-SAME: () #[[ATTR0]] {
; IS__CGSCC____-NEXT: bb: ; IS__CGSCC____-NEXT: bb:
; IS__CGSCC____-NEXT: unreachable ; IS__CGSCC____-NEXT: unreachable
; ;
bb: bb:
unreachable unreachable
} }
define internal i1 @eggs(i8* %arg) { define internal i1 @eggs(i8* %arg) {
; IS__CGSCC____: Function Attrs: norecurse
; IS__CGSCC____-LABEL: define {{[^@]+}}@eggs ; IS__CGSCC____-LABEL: define {{[^@]+}}@eggs
; IS__CGSCC____-SAME: (i8* [[ARG:%.*]]) { ; IS__CGSCC____-SAME: (i8* [[ARG:%.*]]) #[[ATTR1:[0-9]+]] {
; IS__CGSCC____-NEXT: bb: ; IS__CGSCC____-NEXT: bb:
; IS__CGSCC____-NEXT: [[TMP:%.*]] = call zeroext i1 @barney() ; IS__CGSCC____-NEXT: [[TMP:%.*]] = call zeroext i1 @barney()
; IS__CGSCC____-NEXT: unreachable ; IS__CGSCC____-NEXT: unreachable
; ;
bb: bb:
%tmp = call zeroext i1 @barney(i8* %arg) %tmp = call zeroext i1 @barney(i8* %arg)
unreachable unreachable
} }
define internal i1 @barney(i8* %arg) { define internal i1 @barney(i8* %arg) {
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@barney ; IS__CGSCC____-LABEL: define {{[^@]+}}@barney
; IS__CGSCC____-SAME: () #[[ATTR1:[0-9]+]] { ; IS__CGSCC____-SAME: () #[[ATTR2:[0-9]+]] {
; IS__CGSCC____-NEXT: bb: ; IS__CGSCC____-NEXT: bb:
; IS__CGSCC____-NEXT: ret i1 undef ; IS__CGSCC____-NEXT: ret i1 undef
; ;
bb: bb:
ret i1 undef ret i1 undef
} }
define i32 @test_inf_promote_caller(i32 %arg) { define i32 @test_inf_promote_caller(i32 %arg) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__TUNIT____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@test_inf_promote_caller ; IS__TUNIT____-LABEL: define {{[^@]+}}@test_inf_promote_caller
; IS__TUNIT____-SAME: (i32 [[ARG:%.*]]) #[[ATTR1:[0-9]+]] { ; IS__TUNIT____-SAME: (i32 [[ARG:%.*]]) #[[ATTR1:[0-9]+]] {
; IS__TUNIT____-NEXT: bb: ; IS__TUNIT____-NEXT: bb:
; IS__TUNIT____-NEXT: ret i32 0 ; IS__TUNIT____-NEXT: ret i32 0
; ;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@test_inf_promote_caller ; IS__CGSCC____-LABEL: define {{[^@]+}}@test_inf_promote_caller
; IS__CGSCC____-SAME: (i32 [[ARG:%.*]]) #[[ATTR1]] { ; IS__CGSCC____-SAME: (i32 [[ARG:%.*]]) #[[ATTR2]] {
; IS__CGSCC____-NEXT: bb: ; IS__CGSCC____-NEXT: bb:
; IS__CGSCC____-NEXT: [[TMP:%.*]] = alloca [[S:%.*]], align 8 ; IS__CGSCC____-NEXT: [[TMP:%.*]] = alloca [[S:%.*]], align 8
; IS__CGSCC____-NEXT: [[TMP1:%.*]] = alloca [[S]], align 8 ; IS__CGSCC____-NEXT: [[TMP1:%.*]] = alloca [[S]], align 8
; IS__CGSCC____-NEXT: ret i32 0 ; IS__CGSCC____-NEXT: ret i32 0
; ;
bb: bb:
%tmp = alloca %S %tmp = alloca %S
%tmp1 = alloca %S %tmp1 = alloca %S
%tmp2 = call i32 @test_inf_promote_callee(%S* %tmp, %S* %tmp1) %tmp2 = call i32 @test_inf_promote_callee(%S* %tmp, %S* %tmp1)
ret i32 0 ret i32 0
} }
define internal i32 @test_inf_promote_callee(%S* %arg, %S* %arg1) { define internal i32 @test_inf_promote_callee(%S* %arg, %S* %arg1) {
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@test_inf_promote_callee ; IS__CGSCC____-LABEL: define {{[^@]+}}@test_inf_promote_callee
; IS__CGSCC____-SAME: () #[[ATTR1]] { ; IS__CGSCC____-SAME: () #[[ATTR2]] {
; IS__CGSCC____-NEXT: bb: ; IS__CGSCC____-NEXT: bb:
; IS__CGSCC____-NEXT: ret i32 undef ; IS__CGSCC____-NEXT: ret i32 undef
; ;
bb: bb:
%tmp = getelementptr %S, %S* %arg1, i32 0, i32 0 %tmp = getelementptr %S, %S* %arg1, i32 0, i32 0
%tmp2 = load %S*, %S** %tmp %tmp2 = load %S*, %S** %tmp
%tmp3 = getelementptr %S, %S* %arg, i32 0, i32 0 %tmp3 = getelementptr %S, %S* %arg, i32 0, i32 0
%tmp4 = load %S*, %S** %tmp3 %tmp4 = load %S*, %S** %tmp3
%tmp5 = call i32 @test_inf_promote_callee(%S* %tmp4, %S* %tmp2) %tmp5 = call i32 @test_inf_promote_callee(%S* %tmp4, %S* %tmp2)
ret i32 0 ret i32 0
} }
declare i32 @wibble(...) declare i32 @wibble(...)
;. ;.
; IS__TUNIT____: attributes #[[ATTR0]] = { nofree noreturn nosync nounwind readnone willreturn } ; IS__TUNIT____: attributes #[[ATTR0]] = { nofree norecurse noreturn nosync nounwind readnone willreturn }
; IS__TUNIT____: attributes #[[ATTR1]] = { nofree nosync nounwind readnone willreturn } ; IS__TUNIT____: attributes #[[ATTR1]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__TUNIT____: attributes #[[ATTR2]] = { noreturn nounwind readnone } ; IS__TUNIT____: attributes #[[ATTR2]] = { noreturn nounwind readnone }
;. ;.
; IS__CGSCC____: attributes #[[ATTR0]] = { nofree norecurse noreturn nosync nounwind readnone willreturn } ; IS__CGSCC____: attributes #[[ATTR0]] = { nofree norecurse noreturn nosync nounwind readnone willreturn }
; IS__CGSCC____: attributes #[[ATTR1]] = { nofree norecurse nosync nounwind readnone willreturn } ; IS__CGSCC____: attributes #[[ATTR1]] = { norecurse }
; IS__CGSCC____: attributes #[[ATTR2]] = { noreturn nounwind readnone } ; IS__CGSCC____: attributes #[[ATTR2]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__CGSCC____: attributes #[[ATTR3]] = { noreturn nounwind readnone }
;. ;.

llvm/test/Transforms/Attributor/ArgumentPromotion/fp80.ll

Show All 16 Lines
@a = internal global %struct.Foo { i32 1, i64 2 }, align 8 @a = internal global %struct.Foo { i32 1, i64 2 }, align 8
;. ;.
; CHECK: @[[B:[a-zA-Z0-9_$"\\.-]+]] = internal global [[STRUCT_S:%.*]] { double 3.140000e+00, i16 9439, i8 25, [5 x i8] undef }, align 16 ; CHECK: @[[B:[a-zA-Z0-9_$"\\.-]+]] = internal global [[STRUCT_S:%.*]] { double 3.140000e+00, i16 9439, i8 25, [5 x i8] undef }, align 16
; CHECK: @[[A:[a-zA-Z0-9_$"\\.-]+]] = internal global [[STRUCT_FOO:%.*]] { i32 1, i64 2 }, align 8 ; CHECK: @[[A:[a-zA-Z0-9_$"\\.-]+]] = internal global [[STRUCT_FOO:%.*]] { i32 1, i64 2 }, align 8
;. ;.
define void @run() { define void @run() {
; ;
; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@run ; CHECK-LABEL: define {{[^@]+}}@run
; NOT_CGSCC_NPM-SAME: () #[[ATTR0:[0-9]+]] { ; CHECK-SAME: () #[[ATTR0:[0-9]+]] {
; NOT_CGSCC_NPM-NEXT: entry: ; CHECK-NEXT: entry:
; NOT_CGSCC_NPM-NEXT: unreachable ; CHECK-NEXT: unreachable
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@run
; IS__CGSCC____-SAME: () #[[ATTR0:[0-9]+]] {
; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: unreachable
; ;
entry: entry:
tail call i8 @UseLongDoubleUnsafely(%union.u* byval(%union.u) align 16 bitcast (%struct.s* @b to %union.u*)) tail call i8 @UseLongDoubleUnsafely(%union.u* byval(%union.u) align 16 bitcast (%struct.s* @b to %union.u*))
tail call x86_fp80 @UseLongDoubleSafely(%union.u* byval(%union.u) align 16 bitcast (%struct.s* @b to %union.u*)) tail call x86_fp80 @UseLongDoubleSafely(%union.u* byval(%union.u) align 16 bitcast (%struct.s* @b to %union.u*))
call i64 @AccessPaddingOfStruct(%struct.Foo* byval(%struct.Foo) @a) call i64 @AccessPaddingOfStruct(%struct.Foo* byval(%struct.Foo) @a)
call i64 @CaptureAStruct(%struct.Foo* byval(%struct.Foo) @a) call i64 @CaptureAStruct(%struct.Foo* byval(%struct.Foo) @a)
ret void ret void
} }
▲ Show 20 Lines • Show All 68 Lines • ▼ Show 20 Lines
loop: loop:
%phi = phi %struct.Foo* [ null, %entry ], [ %gep, %loop ] %phi = phi %struct.Foo* [ null, %entry ], [ %gep, %loop ]
%0 = phi %struct.Foo* [ %a, %entry ], [ %0, %loop ] %0 = phi %struct.Foo* [ %a, %entry ], [ %0, %loop ]
store %struct.Foo* %phi, %struct.Foo** %a_ptr store %struct.Foo* %phi, %struct.Foo** %a_ptr
%gep = getelementptr %struct.Foo, %struct.Foo* %a, i64 0 %gep = getelementptr %struct.Foo, %struct.Foo* %a, i64 0
br label %loop br label %loop
} }
;. ;.
; NOT_CGSCC_NPM: attributes #[[ATTR0]] = { nofree nosync nounwind readnone willreturn } ; NOT_CGSCC_NPM: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn }
;. ;.
; IS__CGSCC____: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn } ; IS__CGSCC____: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__CGSCC____: attributes #[[ATTR1]] = { nofree norecurse noreturn nosync nounwind readnone } ; IS__CGSCC____: attributes #[[ATTR1]] = { nofree norecurse noreturn nosync nounwind readnone }
;. ;.

llvm/test/Transforms/Attributor/ArgumentPromotion/inalloca.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals
; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM ; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM
; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM ; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM
target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128" target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128"
%struct.ss = type { i32, i32 } %struct.ss = type { i32, i32 }
; Argpromote + sroa should change this to passing the two integers by value. ; Argpromote + sroa should change this to passing the two integers by value.
define internal i32 @f(%struct.ss* inalloca(%struct.ss) %s) { define internal i32 @f(%struct.ss* inalloca(%struct.ss) %s) {
; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind readonly willreturn ; CHECK: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@f ; CHECK-LABEL: define {{[^@]+}}@f
; IS__TUNIT____-SAME: (%struct.ss* noalias nocapture nofree noundef nonnull inalloca([[STRUCT_SS:%.*]]) align 4 dereferenceable(8) [[S:%.*]]) #[[ATTR0:[0-9]+]] { ; CHECK-SAME: (%struct.ss* noalias nocapture nofree noundef nonnull inalloca([[STRUCT_SS:%.*]]) align 4 dereferenceable(8) [[S:%.*]]) #[[ATTR0:[0-9]+]] {
; IS__TUNIT____-NEXT: entry: ; CHECK-NEXT: entry:
; IS__TUNIT____-NEXT: [[F0:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 0 ; CHECK-NEXT: [[F0:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 0
; IS__TUNIT____-NEXT: [[F1:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 1 ; CHECK-NEXT: [[F1:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 1
; IS__TUNIT____-NEXT: [[A:%.*]] = load i32, i32* [[F0]], align 4 ; CHECK-NEXT: [[A:%.*]] = load i32, i32* [[F0]], align 4
; IS__TUNIT____-NEXT: [[B:%.*]] = load i32, i32* [[F1]], align 4 ; CHECK-NEXT: [[B:%.*]] = load i32, i32* [[F1]], align 4
; IS__TUNIT____-NEXT: [[R:%.*]] = add i32 [[A]], [[B]] ; CHECK-NEXT: [[R:%.*]] = add i32 [[A]], [[B]]
; IS__TUNIT____-NEXT: ret i32 [[R]] ; CHECK-NEXT: ret i32 [[R]]
;
; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@f
; IS__CGSCC____-SAME: (%struct.ss* noalias nocapture nofree noundef nonnull inalloca([[STRUCT_SS:%.*]]) align 4 dereferenceable(8) [[S:%.*]]) #[[ATTR0:[0-9]+]] {
; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: [[F0:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 0
; IS__CGSCC____-NEXT: [[F1:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 1
; IS__CGSCC____-NEXT: [[A:%.*]] = load i32, i32* [[F0]], align 4
; IS__CGSCC____-NEXT: [[B:%.*]] = load i32, i32* [[F1]], align 4
; IS__CGSCC____-NEXT: [[R:%.*]] = add i32 [[A]], [[B]]
; IS__CGSCC____-NEXT: ret i32 [[R]]
; ;
entry: entry:
%f0 = getelementptr %struct.ss, %struct.ss* %s, i32 0, i32 0 %f0 = getelementptr %struct.ss, %struct.ss* %s, i32 0, i32 0
%f1 = getelementptr %struct.ss, %struct.ss* %s, i32 0, i32 1 %f1 = getelementptr %struct.ss, %struct.ss* %s, i32 0, i32 1
%a = load i32, i32* %f0, align 4 %a = load i32, i32* %f0, align 4
%b = load i32, i32* %f1, align 4 %b = load i32, i32* %f1, align 4
%r = add i32 %a, %b %r = add i32 %a, %b
ret i32 %r ret i32 %r
} }
define i32 @main() { define i32 @main() {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@main ; CHECK-LABEL: define {{[^@]+}}@main
; IS__TUNIT____-SAME: () #[[ATTR1:[0-9]+]] { ; CHECK-SAME: () #[[ATTR1:[0-9]+]] {
; IS__TUNIT____-NEXT: entry: ; CHECK-NEXT: entry:
; IS__TUNIT____-NEXT: [[S:%.*]] = alloca inalloca [[STRUCT_SS:%.*]], align 4 ; CHECK-NEXT: [[S:%.*]] = alloca inalloca [[STRUCT_SS:%.*]], align 4
; IS__TUNIT____-NEXT: [[F0:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 0 ; CHECK-NEXT: [[F0:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 0
; IS__TUNIT____-NEXT: [[F1:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 1 ; CHECK-NEXT: [[F1:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 1
; IS__TUNIT____-NEXT: store i32 1, i32* [[F0]], align 4 ; CHECK-NEXT: store i32 1, i32* [[F0]], align 4
; IS__TUNIT____-NEXT: store i32 2, i32* [[F1]], align 4 ; CHECK-NEXT: store i32 2, i32* [[F1]], align 4
; IS__TUNIT____-NEXT: [[R:%.*]] = call i32 @f(%struct.ss* noalias nocapture nofree noundef nonnull inalloca([[STRUCT_SS]]) align 4 dereferenceable(8) [[S]]) #[[ATTR2:[0-9]+]] ; CHECK-NEXT: [[R:%.*]] = call i32 @f(%struct.ss* noalias nocapture nofree noundef nonnull inalloca([[STRUCT_SS]]) align 4 dereferenceable(8) [[S]]) #[[ATTR2:[0-9]+]]
; IS__TUNIT____-NEXT: ret i32 [[R]] ; CHECK-NEXT: ret i32 [[R]]
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@main
; IS__CGSCC____-SAME: () #[[ATTR1:[0-9]+]] {
; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: [[S:%.*]] = alloca inalloca [[STRUCT_SS:%.*]], align 4
; IS__CGSCC____-NEXT: [[F0:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 0
; IS__CGSCC____-NEXT: [[F1:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 1
; IS__CGSCC____-NEXT: store i32 1, i32* [[F0]], align 4
; IS__CGSCC____-NEXT: store i32 2, i32* [[F1]], align 4
; IS__CGSCC____-NEXT: [[R:%.*]] = call i32 @f(%struct.ss* noalias nocapture nofree noundef nonnull inalloca([[STRUCT_SS]]) align 4 dereferenceable(8) [[S]]) #[[ATTR2:[0-9]+]]
; IS__CGSCC____-NEXT: ret i32 [[R]]
; ;
entry: entry:
%S = alloca inalloca %struct.ss %S = alloca inalloca %struct.ss
%f0 = getelementptr %struct.ss, %struct.ss* %S, i32 0, i32 0 %f0 = getelementptr %struct.ss, %struct.ss* %S, i32 0, i32 0
%f1 = getelementptr %struct.ss, %struct.ss* %S, i32 0, i32 1 %f1 = getelementptr %struct.ss, %struct.ss* %S, i32 0, i32 1
store i32 1, i32* %f0, align 4 store i32 1, i32* %f0, align 4
store i32 2, i32* %f1, align 4 store i32 2, i32* %f1, align 4
%r = call i32 @f(%struct.ss* inalloca(%struct.ss) %S) %r = call i32 @f(%struct.ss* inalloca(%struct.ss) %S)
Show All 9 Lines
; IS__CGSCC____-NEXT: ret i1 undef ; IS__CGSCC____-NEXT: ret i1 undef
; ;
entry: entry:
%c = icmp eq %struct.ss* %a, %b %c = icmp eq %struct.ss* %a, %b
ret i1 %c ret i1 %c
} }
define i32 @test() { define i32 @test() {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@test ; CHECK-LABEL: define {{[^@]+}}@test
; IS__TUNIT____-SAME: () #[[ATTR1]] { ; CHECK-SAME: () #[[ATTR1]] {
; IS__TUNIT____-NEXT: entry: ; CHECK-NEXT: entry:
; IS__TUNIT____-NEXT: ret i32 0 ; CHECK-NEXT: ret i32 0
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@test
; IS__CGSCC____-SAME: () #[[ATTR1]] {
; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: ret i32 0
; ;
entry: entry:
%S = alloca inalloca %struct.ss %S = alloca inalloca %struct.ss
%c = call i1 @g(%struct.ss* %S, %struct.ss* inalloca(%struct.ss) %S) %c = call i1 @g(%struct.ss* %S, %struct.ss* inalloca(%struct.ss) %S)
ret i32 0 ret i32 0
} }
;. ;.
; IS__TUNIT____: attributes #[[ATTR0]] = { argmemonly nofree nosync nounwind readonly willreturn } ; IS__TUNIT____: attributes #[[ATTR0]] = { argmemonly nofree norecurse nosync nounwind readonly willreturn }
; IS__TUNIT____: attributes #[[ATTR1]] = { nofree nosync nounwind readnone willreturn } ; IS__TUNIT____: attributes #[[ATTR1]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__TUNIT____: attributes #[[ATTR2]] = { nofree nosync nounwind readonly willreturn } ; IS__TUNIT____: attributes #[[ATTR2]] = { nofree nosync nounwind readonly willreturn }
;. ;.
; IS__CGSCC____: attributes #[[ATTR0]] = { argmemonly nofree norecurse nosync nounwind readonly willreturn } ; IS__CGSCC____: attributes #[[ATTR0]] = { argmemonly nofree norecurse nosync nounwind readonly willreturn }
; IS__CGSCC____: attributes #[[ATTR1]] = { nofree norecurse nosync nounwind readnone willreturn } ; IS__CGSCC____: attributes #[[ATTR1]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__CGSCC____: attributes #[[ATTR2]] = { nounwind readonly willreturn } ; IS__CGSCC____: attributes #[[ATTR2]] = { nounwind readonly willreturn }
;. ;.

llvm/test/Transforms/Attributor/ArgumentPromotion/invalidation.ll

Show All 15 Lines
;. ;.
define internal i32 @a(i32* %x) { define internal i32 @a(i32* %x) {
entry: entry:
%v = load i32, i32* %x %v = load i32, i32* %x
ret i32 %v ret i32 %v
} }
define i32 @b() { define i32 @b() {
; CHECK: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; CHECK-LABEL: define {{[^@]+}}@b ; CHECK-LABEL: define {{[^@]+}}@b
; CHECK-SAME: () #[[ATTR0:[0-9]+]] { ; CHECK-SAME: () #[[ATTR0:[0-9]+]] {
; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: ret i32 0 ; CHECK-NEXT: ret i32 0
; ;
entry: entry:
%v = call i32 @a(i32* @G) %v = call i32 @a(i32* @G)
ret i32 %v ret i32 %v
} }
define i32 @c() { define i32 @c() {
; CHECK: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; CHECK-LABEL: define {{[^@]+}}@c ; CHECK-LABEL: define {{[^@]+}}@c
; CHECK-SAME: () #[[ATTR0]] { ; CHECK-SAME: () #[[ATTR0]] {
; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: ret i32 0 ; CHECK-NEXT: ret i32 0
; ;
entry: entry:
%v1 = call i32 @a(i32* @G) %v1 = call i32 @a(i32* @G)
%v2 = call i32 @b() %v2 = call i32 @b()
%result = add i32 %v1, %v2 %result = add i32 %v1, %v2
ret i32 %result ret i32 %result
} }
;. ;.
; CHECK: attributes #[[ATTR0]] = { nofree nosync nounwind readnone willreturn } ; CHECK: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn }
;. ;.

llvm/test/Transforms/Attributor/ArgumentPromotion/live_called_from_dead.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals
; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=2 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM ; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=2 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=2 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=2 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM
; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM ; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM
define internal void @dead() { define internal void @dead() {
; IS__CGSCC____-LABEL: define {{[^@]+}}@dead() { ; IS__CGSCC____: Function Attrs: norecurse
; IS__CGSCC____-LABEL: define {{[^@]+}}@dead
; IS__CGSCC____-SAME: () #[[ATTR0:[0-9]+]] {
; IS__CGSCC____-NEXT: [[TMP1:%.*]] = call i32 @test(i32* noalias noundef align 4294967296 null) ; IS__CGSCC____-NEXT: [[TMP1:%.*]] = call i32 @test(i32* noalias noundef align 4294967296 null)
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
call i32 @test(i32* null, i32* null) call i32 @test(i32* null, i32* null)
ret void ret void
} }
define internal i32 @test(i32* %X, i32* %Y) { define internal i32 @test(i32* %X, i32* %Y) {
; IS__CGSCC_OPM: Function Attrs: argmemonly nofree nosync nounwind willreturn writeonly ; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@test ; IS__CGSCC____-LABEL: define {{[^@]+}}@test
; IS__CGSCC_OPM-SAME: (i32* noalias nocapture nofree noundef writeonly align 4 [[X:%.*]]) #[[ATTR0:[0-9]+]] { ; IS__CGSCC____-SAME: (i32* noalias nocapture nofree noundef writeonly align 4 [[X:%.*]]) #[[ATTR1:[0-9]+]] {
; IS__CGSCC_OPM-NEXT: br i1 true, label [[LIVE:%.*]], label [[DEAD:%.*]] ; IS__CGSCC____-NEXT: br i1 true, label [[LIVE:%.*]], label [[DEAD:%.*]]
; IS__CGSCC_OPM: live: ; IS__CGSCC____: live:
; IS__CGSCC_OPM-NEXT: store i32 0, i32* [[X]], align 4 ; IS__CGSCC____-NEXT: store i32 0, i32* [[X]], align 4
; IS__CGSCC_OPM-NEXT: ret i32 undef ; IS__CGSCC____-NEXT: ret i32 undef
; IS__CGSCC_OPM: dead: ; IS__CGSCC____: dead:
; IS__CGSCC_OPM-NEXT: unreachable ; IS__CGSCC____-NEXT: unreachable
;
; IS__CGSCC_NPM: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@test
; IS__CGSCC_NPM-SAME: (i32* noalias nocapture nofree noundef writeonly align 4 [[X:%.*]]) #[[ATTR0:[0-9]+]] {
; IS__CGSCC_NPM-NEXT: br i1 true, label [[LIVE:%.*]], label [[DEAD:%.*]]
; IS__CGSCC_NPM: live:
; IS__CGSCC_NPM-NEXT: store i32 0, i32* [[X]], align 4
; IS__CGSCC_NPM-NEXT: ret i32 undef
; IS__CGSCC_NPM: dead:
; IS__CGSCC_NPM-NEXT: unreachable
; ;
br i1 true, label %live, label %dead br i1 true, label %live, label %dead
live: live:
store i32 0, i32* %X store i32 0, i32* %X
ret i32 0 ret i32 0
dead: dead:
call i32 @caller(i32* null) call i32 @caller(i32* null)
call void @dead() call void @dead()
ret i32 1 ret i32 1
} }
define internal i32 @caller(i32* %B) { define internal i32 @caller(i32* %B) {
; IS__CGSCC_OPM: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@caller ; IS__CGSCC____-LABEL: define {{[^@]+}}@caller
; IS__CGSCC_OPM-SAME: () #[[ATTR1:[0-9]+]] { ; IS__CGSCC____-SAME: () #[[ATTR2:[0-9]+]] {
; IS__CGSCC_OPM-NEXT: [[A:%.*]] = alloca i32, align 4 ; IS__CGSCC____-NEXT: [[A:%.*]] = alloca i32, align 4
; IS__CGSCC_OPM-NEXT: [[C:%.*]] = call i32 @test(i32* noalias nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[A]]) #[[ATTR3:[0-9]+]] ; IS__CGSCC____-NEXT: [[C:%.*]] = call i32 @test(i32* noalias nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[A]]) #[[ATTR3:[0-9]+]]
; IS__CGSCC_OPM-NEXT: ret i32 undef ; IS__CGSCC____-NEXT: ret i32 undef
;
; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@caller
; IS__CGSCC_NPM-SAME: () #[[ATTR1:[0-9]+]] {
; IS__CGSCC_NPM-NEXT: [[A:%.*]] = alloca i32, align 4
; IS__CGSCC_NPM-NEXT: [[C:%.*]] = call i32 @test(i32* noalias nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[A]]) #[[ATTR2:[0-9]+]]
; IS__CGSCC_NPM-NEXT: ret i32 undef
; ;
%A = alloca i32 %A = alloca i32
store i32 1, i32* %A store i32 1, i32* %A
%C = call i32 @test(i32* %A, i32* %B) %C = call i32 @test(i32* %A, i32* %B)
ret i32 %C ret i32 %C
} }
define i32 @callercaller() { define i32 @callercaller() {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__TUNIT____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@callercaller ; IS__TUNIT____-LABEL: define {{[^@]+}}@callercaller
; IS__TUNIT____-SAME: () #[[ATTR0:[0-9]+]] { ; IS__TUNIT____-SAME: () #[[ATTR0:[0-9]+]] {
; IS__TUNIT____-NEXT: [[B:%.*]] = alloca i32, align 4 ; IS__TUNIT____-NEXT: [[B:%.*]] = alloca i32, align 4
; IS__TUNIT____-NEXT: ret i32 0 ; IS__TUNIT____-NEXT: ret i32 0
; ;
; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@callercaller ; IS__CGSCC____-LABEL: define {{[^@]+}}@callercaller
; IS__CGSCC_OPM-SAME: () #[[ATTR2:[0-9]+]] { ; IS__CGSCC____-SAME: () #[[ATTR2]] {
; IS__CGSCC_OPM-NEXT: [[B:%.*]] = alloca i32, align 4 ; IS__CGSCC____-NEXT: [[B:%.*]] = alloca i32, align 4
; IS__CGSCC_OPM-NEXT: ret i32 0 ; IS__CGSCC____-NEXT: ret i32 0
;
; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@callercaller
; IS__CGSCC_NPM-SAME: () #[[ATTR1]] {
; IS__CGSCC_NPM-NEXT: [[B:%.*]] = alloca i32, align 4
; IS__CGSCC_NPM-NEXT: ret i32 0
; ;
%B = alloca i32 %B = alloca i32
store i32 2, i32* %B store i32 2, i32* %B
%X = call i32 @caller(i32* %B) %X = call i32 @caller(i32* %B)
ret i32 %X ret i32 %X
} }
;. ;.
; IS__TUNIT____: attributes #[[ATTR0]] = { nofree nosync nounwind readnone willreturn } ; IS__TUNIT____: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn }
;.
; IS__CGSCC_OPM: attributes #[[ATTR0]] = { argmemonly nofree nosync nounwind willreturn writeonly }
; IS__CGSCC_OPM: attributes #[[ATTR1]] = { nofree nosync nounwind readnone willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR2]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR3]] = { nofree nosync nounwind willreturn writeonly }
;. ;.
; IS__CGSCC_NPM: attributes #[[ATTR0]] = { argmemonly nofree norecurse nosync nounwind willreturn writeonly } ; IS__CGSCC____: attributes #[[ATTR0]] = { norecurse }
; IS__CGSCC_NPM: attributes #[[ATTR1]] = { nofree norecurse nosync nounwind readnone willreturn } ; IS__CGSCC____: attributes #[[ATTR1]] = { argmemonly nofree norecurse nosync nounwind willreturn writeonly }
; IS__CGSCC_NPM: attributes #[[ATTR2]] = { nofree nosync nounwind willreturn writeonly } ; IS__CGSCC____: attributes #[[ATTR2]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__CGSCC____: attributes #[[ATTR3]] = { nofree nosync nounwind willreturn writeonly }
;. ;.

llvm/test/Transforms/Attributor/ArgumentPromotion/live_called_from_dead_2.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals
; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=2 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM ; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=2 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=2 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=2 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM
; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM ; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM
define internal void @dead() { define internal void @dead() {
; IS__CGSCC____-LABEL: define {{[^@]+}}@dead() { ; IS__CGSCC____: Function Attrs: norecurse
; IS__CGSCC____-LABEL: define {{[^@]+}}@dead
; IS__CGSCC____-SAME: () #[[ATTR0:[0-9]+]] {
; IS__CGSCC____-NEXT: [[TMP1:%.*]] = call i32 @test(i32* noalias noundef align 4294967296 null) ; IS__CGSCC____-NEXT: [[TMP1:%.*]] = call i32 @test(i32* noalias noundef align 4294967296 null)
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
call i32 @test(i32* null, i32* null) call i32 @test(i32* null, i32* null)
ret void ret void
} }
define internal i32 @test(i32* %X, i32* %Y) { define internal i32 @test(i32* %X, i32* %Y) {
; NOT_CGSCC_NPM: Function Attrs: argmemonly nofree nosync nounwind willreturn writeonly ; IS__TUNIT____: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@test ; IS__TUNIT____-LABEL: define {{[^@]+}}@test
; NOT_CGSCC_NPM-SAME: (i32* noalias nocapture nofree noundef writeonly align 4 [[X:%.*]]) #[[ATTR0:[0-9]+]] { ; IS__TUNIT____-SAME: (i32* noalias nocapture nofree noundef writeonly align 4 [[X:%.*]]) #[[ATTR0:[0-9]+]] {
; NOT_CGSCC_NPM-NEXT: br i1 true, label [[LIVE:%.*]], label [[DEAD:%.*]] ; IS__TUNIT____-NEXT: br i1 true, label [[LIVE:%.*]], label [[DEAD:%.*]]
; NOT_CGSCC_NPM: live: ; IS__TUNIT____: live:
; NOT_CGSCC_NPM-NEXT: store i32 0, i32* [[X]], align 4 ; IS__TUNIT____-NEXT: store i32 0, i32* [[X]], align 4
; NOT_CGSCC_NPM-NEXT: ret i32 undef ; IS__TUNIT____-NEXT: ret i32 undef
; NOT_CGSCC_NPM: dead: ; IS__TUNIT____: dead:
; NOT_CGSCC_NPM-NEXT: unreachable ; IS__TUNIT____-NEXT: unreachable
; ;
; IS__CGSCC_NPM: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly ; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@test ; IS__CGSCC____-LABEL: define {{[^@]+}}@test
; IS__CGSCC_NPM-SAME: (i32* noalias nocapture nofree noundef writeonly align 4 [[X:%.*]]) #[[ATTR0:[0-9]+]] { ; IS__CGSCC____-SAME: (i32* noalias nocapture nofree noundef writeonly align 4 [[X:%.*]]) #[[ATTR1:[0-9]+]] {
; IS__CGSCC_NPM-NEXT: br i1 true, label [[LIVE:%.*]], label [[DEAD:%.*]] ; IS__CGSCC____-NEXT: br i1 true, label [[LIVE:%.*]], label [[DEAD:%.*]]
; IS__CGSCC_NPM: live: ; IS__CGSCC____: live:
; IS__CGSCC_NPM-NEXT: store i32 0, i32* [[X]], align 4 ; IS__CGSCC____-NEXT: store i32 0, i32* [[X]], align 4
; IS__CGSCC_NPM-NEXT: ret i32 undef ; IS__CGSCC____-NEXT: ret i32 undef
; IS__CGSCC_NPM: dead: ; IS__CGSCC____: dead:
; IS__CGSCC_NPM-NEXT: unreachable ; IS__CGSCC____-NEXT: unreachable
; ;
br i1 true, label %live, label %dead br i1 true, label %live, label %dead
live: live:
store i32 0, i32* %X store i32 0, i32* %X
ret i32 0 ret i32 0
dead: dead:
call i32 @caller(i32* null) call i32 @caller(i32* null)
call void @dead() call void @dead()
ret i32 1 ret i32 1
} }
define internal i32 @caller(i32* %B) { define internal i32 @caller(i32* %B) {
; NOT_CGSCC_NPM: Function Attrs: argmemonly nofree nosync nounwind willreturn writeonly ; IS__TUNIT____: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@caller ; IS__TUNIT____-LABEL: define {{[^@]+}}@caller
; NOT_CGSCC_NPM-SAME: (i32* noalias nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[B:%.*]]) #[[ATTR0]] { ; IS__TUNIT____-SAME: (i32* noalias nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[B:%.*]]) #[[ATTR0]] {
; NOT_CGSCC_NPM-NEXT: [[A:%.*]] = alloca i32, align 4 ; IS__TUNIT____-NEXT: [[A:%.*]] = alloca i32, align 4
; NOT_CGSCC_NPM-NEXT: [[C:%.*]] = call i32 @test(i32* noalias nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[B]]) #[[ATTR2:[0-9]+]] ; IS__TUNIT____-NEXT: [[C:%.*]] = call i32 @test(i32* noalias nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[B]]) #[[ATTR2:[0-9]+]]
; NOT_CGSCC_NPM-NEXT: ret i32 undef ; IS__TUNIT____-NEXT: ret i32 undef
; ;
; IS__CGSCC_NPM: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly ; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@caller ; IS__CGSCC____-LABEL: define {{[^@]+}}@caller
; IS__CGSCC_NPM-SAME: (i32* noalias nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[B:%.*]]) #[[ATTR0]] { ; IS__CGSCC____-SAME: (i32* noalias nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[B:%.*]]) #[[ATTR1]] {
; IS__CGSCC_NPM-NEXT: [[A:%.*]] = alloca i32, align 4 ; IS__CGSCC____-NEXT: [[A:%.*]] = alloca i32, align 4
; IS__CGSCC_NPM-NEXT: [[C:%.*]] = call i32 @test(i32* noalias nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[B]]) #[[ATTR2:[0-9]+]] ; IS__CGSCC____-NEXT: [[C:%.*]] = call i32 @test(i32* noalias nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[B]]) #[[ATTR3:[0-9]+]]
; IS__CGSCC_NPM-NEXT: ret i32 undef ; IS__CGSCC____-NEXT: ret i32 undef
; ;
%A = alloca i32 %A = alloca i32
store i32 1, i32* %A store i32 1, i32* %A
%C = call i32 @test(i32* %B, i32* %A) %C = call i32 @test(i32* %B, i32* %A)
ret i32 %C ret i32 %C
} }
define i32 @callercaller() { define i32 @callercaller() {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__TUNIT____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@callercaller ; IS__TUNIT____-LABEL: define {{[^@]+}}@callercaller
; IS__TUNIT____-SAME: () #[[ATTR1:[0-9]+]] { ; IS__TUNIT____-SAME: () #[[ATTR1:[0-9]+]] {
; IS__TUNIT____-NEXT: [[B:%.*]] = alloca i32, align 4 ; IS__TUNIT____-NEXT: [[B:%.*]] = alloca i32, align 4
; IS__TUNIT____-NEXT: [[X:%.*]] = call i32 @caller(i32* noalias nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[B]]) #[[ATTR2]] ; IS__TUNIT____-NEXT: [[X:%.*]] = call i32 @caller(i32* noalias nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[B]]) #[[ATTR2]]
; IS__TUNIT____-NEXT: ret i32 0 ; IS__TUNIT____-NEXT: ret i32 0
; ;
; IS__CGSCC_OPM: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@callercaller ; IS__CGSCC____-LABEL: define {{[^@]+}}@callercaller
; IS__CGSCC_OPM-SAME: () #[[ATTR1:[0-9]+]] { ; IS__CGSCC____-SAME: () #[[ATTR2:[0-9]+]] {
; IS__CGSCC_OPM-NEXT: [[B:%.*]] = alloca i32, align 4 ; IS__CGSCC____-NEXT: [[B:%.*]] = alloca i32, align 4
; IS__CGSCC_OPM-NEXT: [[X:%.*]] = call i32 @caller(i32* noalias nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[B]]) #[[ATTR3:[0-9]+]] ; IS__CGSCC____-NEXT: [[X:%.*]] = call i32 @caller(i32* noalias nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[B]]) #[[ATTR4:[0-9]+]]
; IS__CGSCC_OPM-NEXT: ret i32 0 ; IS__CGSCC____-NEXT: ret i32 0
;
; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@callercaller
; IS__CGSCC_NPM-SAME: () #[[ATTR1:[0-9]+]] {
; IS__CGSCC_NPM-NEXT: [[B:%.*]] = alloca i32, align 4
; IS__CGSCC_NPM-NEXT: [[X:%.*]] = call i32 @caller(i32* noalias nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[B]]) #[[ATTR3:[0-9]+]]
; IS__CGSCC_NPM-NEXT: ret i32 0
; ;
%B = alloca i32 %B = alloca i32
store i32 2, i32* %B store i32 2, i32* %B
%X = call i32 @caller(i32* %B) %X = call i32 @caller(i32* %B)
ret i32 %X ret i32 %X
} }
;. ;.
; IS__TUNIT____: attributes #[[ATTR0]] = { argmemonly nofree nosync nounwind willreturn writeonly } ; IS__TUNIT____: attributes #[[ATTR0]] = { argmemonly nofree norecurse nosync nounwind willreturn writeonly }
; IS__TUNIT____: attributes #[[ATTR1]] = { nofree nosync nounwind readnone willreturn } ; IS__TUNIT____: attributes #[[ATTR1]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__TUNIT____: attributes #[[ATTR2]] = { nofree nosync nounwind willreturn writeonly } ; IS__TUNIT____: attributes #[[ATTR2]] = { nofree nosync nounwind willreturn writeonly }
;. ;.
; IS__CGSCC_OPM: attributes #[[ATTR0]] = { argmemonly nofree nosync nounwind willreturn writeonly } ; IS__CGSCC____: attributes #[[ATTR0]] = { norecurse }
; IS__CGSCC_OPM: attributes #[[ATTR1]] = { nofree nosync nounwind readnone willreturn } ; IS__CGSCC____: attributes #[[ATTR1]] = { argmemonly nofree norecurse nosync nounwind willreturn writeonly }
; IS__CGSCC_OPM: attributes #[[ATTR2]] = { nofree nosync nounwind willreturn writeonly } ; IS__CGSCC____: attributes #[[ATTR2]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR3]] = { nounwind willreturn writeonly } ; IS__CGSCC____: attributes #[[ATTR3]] = { nofree nosync nounwind willreturn writeonly }
;. ; IS__CGSCC____: attributes #[[ATTR4]] = { nounwind willreturn writeonly }
; IS__CGSCC_NPM: attributes #[[ATTR0]] = { argmemonly nofree norecurse nosync nounwind willreturn writeonly }
; IS__CGSCC_NPM: attributes #[[ATTR1]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__CGSCC_NPM: attributes #[[ATTR2]] = { nofree nosync nounwind willreturn writeonly }
; IS__CGSCC_NPM: attributes #[[ATTR3]] = { nounwind willreturn writeonly }
;. ;.

llvm/test/Transforms/Attributor/ArgumentPromotion/musttail.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals
; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM ; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM
; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM ; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM
; PR36543 ; PR36543
; Don't promote arguments of musttail callee ; Don't promote arguments of musttail callee
%T = type { i32, i32, i32, i32 } %T = type { i32, i32, i32, i32 }
define internal i32 @test(%T* %p) { define internal i32 @test(%T* %p) {
; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind readonly willreturn ; CHECK: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@test ; CHECK-LABEL: define {{[^@]+}}@test
; IS__TUNIT____-SAME: (%T* nocapture nofree readonly [[P:%.*]]) #[[ATTR0:[0-9]+]] { ; CHECK-SAME: (%T* nocapture nofree readonly [[P:%.*]]) #[[ATTR0:[0-9]+]] {
; IS__TUNIT____-NEXT: [[A_GEP:%.*]] = getelementptr [[T:%.*]], %T* [[P]], i64 0, i32 3 ; CHECK-NEXT: [[A_GEP:%.*]] = getelementptr [[T:%.*]], %T* [[P]], i64 0, i32 3
; IS__TUNIT____-NEXT: [[B_GEP:%.*]] = getelementptr [[T]], %T* [[P]], i64 0, i32 2 ; CHECK-NEXT: [[B_GEP:%.*]] = getelementptr [[T]], %T* [[P]], i64 0, i32 2
; IS__TUNIT____-NEXT: [[A:%.*]] = load i32, i32* [[A_GEP]], align 4 ; CHECK-NEXT: [[A:%.*]] = load i32, i32* [[A_GEP]], align 4
; IS__TUNIT____-NEXT: [[B:%.*]] = load i32, i32* [[B_GEP]], align 4 ; CHECK-NEXT: [[B:%.*]] = load i32, i32* [[B_GEP]], align 4
; IS__TUNIT____-NEXT: [[V:%.*]] = add i32 [[A]], [[B]] ; CHECK-NEXT: [[V:%.*]] = add i32 [[A]], [[B]]
; IS__TUNIT____-NEXT: ret i32 [[V]] ; CHECK-NEXT: ret i32 [[V]]
;
; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@test
; IS__CGSCC____-SAME: (%T* nocapture nofree readonly [[P:%.*]]) #[[ATTR0:[0-9]+]] {
; IS__CGSCC____-NEXT: [[A_GEP:%.*]] = getelementptr [[T:%.*]], %T* [[P]], i64 0, i32 3
; IS__CGSCC____-NEXT: [[B_GEP:%.*]] = getelementptr [[T]], %T* [[P]], i64 0, i32 2
; IS__CGSCC____-NEXT: [[A:%.*]] = load i32, i32* [[A_GEP]], align 4
; IS__CGSCC____-NEXT: [[B:%.*]] = load i32, i32* [[B_GEP]], align 4
; IS__CGSCC____-NEXT: [[V:%.*]] = add i32 [[A]], [[B]]
; IS__CGSCC____-NEXT: ret i32 [[V]]
; ;
%a.gep = getelementptr %T, %T* %p, i64 0, i32 3 %a.gep = getelementptr %T, %T* %p, i64 0, i32 3
%b.gep = getelementptr %T, %T* %p, i64 0, i32 2 %b.gep = getelementptr %T, %T* %p, i64 0, i32 2
%a = load i32, i32* %a.gep %a = load i32, i32* %a.gep
%b = load i32, i32* %b.gep %b = load i32, i32* %b.gep
%v = add i32 %a, %b %v = add i32 %a, %b
ret i32 %v ret i32 %v
} }
define i32 @caller(%T* %p) { define i32 @caller(%T* %p) {
; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind readonly willreturn ; CHECK: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@caller ; CHECK-LABEL: define {{[^@]+}}@caller
; IS__TUNIT____-SAME: (%T* nocapture nofree readonly [[P:%.*]]) #[[ATTR0]] { ; CHECK-SAME: (%T* nocapture nofree readonly [[P:%.*]]) #[[ATTR0]] {
; IS__TUNIT____-NEXT: [[V:%.*]] = musttail call i32 @test(%T* nocapture nofree readonly [[P]]) #[[ATTR4:[0-9]+]] ; CHECK-NEXT: [[V:%.*]] = musttail call i32 @test(%T* nocapture nofree readonly [[P]]) #[[ATTR4:[0-9]+]]
; IS__TUNIT____-NEXT: ret i32 [[V]] ; CHECK-NEXT: ret i32 [[V]]
;
; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@caller
; IS__CGSCC____-SAME: (%T* nocapture nofree readonly [[P:%.*]]) #[[ATTR0]] {
; IS__CGSCC____-NEXT: [[V:%.*]] = musttail call i32 @test(%T* nocapture nofree readonly [[P]]) #[[ATTR4:[0-9]+]]
; IS__CGSCC____-NEXT: ret i32 [[V]]
; ;
%v = musttail call i32 @test(%T* %p) %v = musttail call i32 @test(%T* %p)
ret i32 %v ret i32 %v
} }
; Don't promote arguments of musttail caller ; Don't promote arguments of musttail caller
define i32 @foo(%T* %p, i32 %v) { define i32 @foo(%T* %p, i32 %v) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@foo ; CHECK-LABEL: define {{[^@]+}}@foo
; IS__TUNIT____-SAME: (%T* nocapture nofree readnone [[P:%.*]], i32 [[V:%.*]]) #[[ATTR1:[0-9]+]] { ; CHECK-SAME: (%T* nocapture nofree readnone [[P:%.*]], i32 [[V:%.*]]) #[[ATTR1:[0-9]+]] {
; IS__TUNIT____-NEXT: ret i32 0 ; CHECK-NEXT: ret i32 0
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@foo
; IS__CGSCC____-SAME: (%T* nocapture nofree readnone [[P:%.*]], i32 [[V:%.*]]) #[[ATTR1:[0-9]+]] {
; IS__CGSCC____-NEXT: ret i32 0
; ;
ret i32 0 ret i32 0
} }
define internal i32 @test2(%T* %p, i32 %p2) { define internal i32 @test2(%T* %p, i32 %p2) {
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@test2 ; IS__CGSCC____-LABEL: define {{[^@]+}}@test2
; IS__CGSCC____-SAME: (%T* noalias nocapture nofree readnone [[P:%.*]], i32 [[P2:%.*]]) #[[ATTR1]] { ; IS__CGSCC____-SAME: (%T* noalias nocapture nofree readnone [[P:%.*]], i32 [[P2:%.*]]) #[[ATTR1]] {
; IS__CGSCC____-NEXT: ret i32 undef ; IS__CGSCC____-NEXT: ret i32 undef
; ;
%a.gep = getelementptr %T, %T* %p, i64 0, i32 3 %a.gep = getelementptr %T, %T* %p, i64 0, i32 3
%b.gep = getelementptr %T, %T* %p, i64 0, i32 2 %b.gep = getelementptr %T, %T* %p, i64 0, i32 2
%a = load i32, i32* %a.gep %a = load i32, i32* %a.gep
%b = load i32, i32* %b.gep %b = load i32, i32* %b.gep
%v = add i32 %a, %b %v = add i32 %a, %b
%ca = musttail call i32 @foo(%T* undef, i32 %v) %ca = musttail call i32 @foo(%T* undef, i32 %v)
ret i32 %ca ret i32 %ca
} }
define i32 @caller2(%T* %g) { define i32 @caller2(%T* %g) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@caller2 ; CHECK-LABEL: define {{[^@]+}}@caller2
; IS__TUNIT____-SAME: (%T* nocapture nofree readnone [[G:%.*]]) #[[ATTR1]] { ; CHECK-SAME: (%T* nocapture nofree readnone [[G:%.*]]) #[[ATTR1]] {
; IS__TUNIT____-NEXT: ret i32 0 ; CHECK-NEXT: ret i32 0
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@caller2
; IS__CGSCC____-SAME: (%T* nocapture nofree readnone [[G:%.*]]) #[[ATTR1]] {
; IS__CGSCC____-NEXT: ret i32 0
; ;
%v = call i32 @test2(%T* %g, i32 0) %v = call i32 @test2(%T* %g, i32 0)
ret i32 %v ret i32 %v
} }
; In the version above we can remove the call to foo completely. ; In the version above we can remove the call to foo completely.
; In the version below we keep the call and verify the return value ; In the version below we keep the call and verify the return value
; is kept as well. ; is kept as well.
define i32 @bar(%T* %p, i32 %v) { define i32 @bar(%T* %p, i32 %v) {
; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind willreturn writeonly ; CHECK: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__TUNIT____-LABEL: define {{[^@]+}}@bar ; CHECK-LABEL: define {{[^@]+}}@bar
; IS__TUNIT____-SAME: (%T* nocapture nofree nonnull writeonly dereferenceable(4) [[P:%.*]], i32 [[V:%.*]]) #[[ATTR2:[0-9]+]] { ; CHECK-SAME: (%T* nocapture nofree nonnull writeonly dereferenceable(4) [[P:%.*]], i32 [[V:%.*]]) #[[ATTR2:[0-9]+]] {
; IS__TUNIT____-NEXT: [[I32PTR:%.*]] = getelementptr [[T:%.*]], %T* [[P]], i64 0, i32 0 ; CHECK-NEXT: [[I32PTR:%.*]] = getelementptr [[T:%.*]], %T* [[P]], i64 0, i32 0
; IS__TUNIT____-NEXT: store i32 [[V]], i32* [[I32PTR]], align 4 ; CHECK-NEXT: store i32 [[V]], i32* [[I32PTR]], align 4
; IS__TUNIT____-NEXT: ret i32 0 ; CHECK-NEXT: ret i32 0
;
; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC____-LABEL: define {{[^@]+}}@bar
; IS__CGSCC____-SAME: (%T* nocapture nofree nonnull writeonly dereferenceable(4) [[P:%.*]], i32 [[V:%.*]]) #[[ATTR2:[0-9]+]] {
; IS__CGSCC____-NEXT: [[I32PTR:%.*]] = getelementptr [[T:%.*]], %T* [[P]], i64 0, i32 0
; IS__CGSCC____-NEXT: store i32 [[V]], i32* [[I32PTR]], align 4
; IS__CGSCC____-NEXT: ret i32 0
; ;
%i32ptr = getelementptr %T, %T* %p, i64 0, i32 0 %i32ptr = getelementptr %T, %T* %p, i64 0, i32 0
store i32 %v, i32* %i32ptr store i32 %v, i32* %i32ptr
ret i32 0 ret i32 0
} }
define internal i32 @test2b(%T* %p, i32 %p2) { define internal i32 @test2b(%T* %p, i32 %p2) {
; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind willreturn ; CHECK: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@test2b ; CHECK-LABEL: define {{[^@]+}}@test2b
; IS__TUNIT____-SAME: (%T* nocapture nofree readonly [[P:%.*]], i32 [[P2:%.*]]) #[[ATTR3:[0-9]+]] { ; CHECK-SAME: (%T* nocapture nofree readonly [[P:%.*]], i32 [[P2:%.*]]) #[[ATTR3:[0-9]+]] {
; IS__TUNIT____-NEXT: [[A_GEP:%.*]] = getelementptr [[T:%.*]], %T* [[P]], i64 0, i32 3 ; CHECK-NEXT: [[A_GEP:%.*]] = getelementptr [[T:%.*]], %T* [[P]], i64 0, i32 3
; IS__TUNIT____-NEXT: [[B_GEP:%.*]] = getelementptr [[T]], %T* [[P]], i64 0, i32 2 ; CHECK-NEXT: [[B_GEP:%.*]] = getelementptr [[T]], %T* [[P]], i64 0, i32 2
; IS__TUNIT____-NEXT: [[A:%.*]] = load i32, i32* [[A_GEP]], align 4 ; CHECK-NEXT: [[A:%.*]] = load i32, i32* [[A_GEP]], align 4
; IS__TUNIT____-NEXT: [[B:%.*]] = load i32, i32* [[B_GEP]], align 4 ; CHECK-NEXT: [[B:%.*]] = load i32, i32* [[B_GEP]], align 4
; IS__TUNIT____-NEXT: [[V:%.*]] = add i32 [[A]], [[B]] ; CHECK-NEXT: [[V:%.*]] = add i32 [[A]], [[B]]
; IS__TUNIT____-NEXT: [[CA:%.*]] = musttail call i32 @bar(%T* undef, i32 [[V]]) #[[ATTR5:[0-9]+]] ; CHECK-NEXT: [[CA:%.*]] = musttail call i32 @bar(%T* undef, i32 [[V]]) #[[ATTR5:[0-9]+]]
; IS__TUNIT____-NEXT: ret i32 [[CA]] ; CHECK-NEXT: ret i32 [[CA]]
;
; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@test2b
; IS__CGSCC____-SAME: (%T* nocapture nofree readonly [[P:%.*]], i32 [[P2:%.*]]) #[[ATTR3:[0-9]+]] {
; IS__CGSCC____-NEXT: [[A_GEP:%.*]] = getelementptr [[T:%.*]], %T* [[P]], i64 0, i32 3
; IS__CGSCC____-NEXT: [[B_GEP:%.*]] = getelementptr [[T]], %T* [[P]], i64 0, i32 2
; IS__CGSCC____-NEXT: [[A:%.*]] = load i32, i32* [[A_GEP]], align 4
; IS__CGSCC____-NEXT: [[B:%.*]] = load i32, i32* [[B_GEP]], align 4
; IS__CGSCC____-NEXT: [[V:%.*]] = add i32 [[A]], [[B]]
; IS__CGSCC____-NEXT: [[CA:%.*]] = musttail call i32 @bar(%T* undef, i32 [[V]]) #[[ATTR5:[0-9]+]]
; IS__CGSCC____-NEXT: ret i32 [[CA]]
; ;
%a.gep = getelementptr %T, %T* %p, i64 0, i32 3 %a.gep = getelementptr %T, %T* %p, i64 0, i32 3
%b.gep = getelementptr %T, %T* %p, i64 0, i32 2 %b.gep = getelementptr %T, %T* %p, i64 0, i32 2
%a = load i32, i32* %a.gep %a = load i32, i32* %a.gep
%b = load i32, i32* %b.gep %b = load i32, i32* %b.gep
%v = add i32 %a, %b %v = add i32 %a, %b
%ca = musttail call i32 @bar(%T* undef, i32 %v) %ca = musttail call i32 @bar(%T* undef, i32 %v)
ret i32 %ca ret i32 %ca
} }
define i32 @caller2b(%T* %g) { define i32 @caller2b(%T* %g) {
; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind willreturn ; CHECK: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@caller2b ; CHECK-LABEL: define {{[^@]+}}@caller2b
; IS__TUNIT____-SAME: (%T* nocapture nofree readonly [[G:%.*]]) #[[ATTR3]] { ; CHECK-SAME: (%T* nocapture nofree readonly [[G:%.*]]) #[[ATTR3]] {
; IS__TUNIT____-NEXT: [[V:%.*]] = call i32 @test2b(%T* nocapture nofree readonly [[G]], i32 undef) #[[ATTR6:[0-9]+]] ; CHECK-NEXT: [[V:%.*]] = call i32 @test2b(%T* nocapture nofree readonly [[G]], i32 undef) #[[ATTR6:[0-9]+]]
; IS__TUNIT____-NEXT: ret i32 0 ; CHECK-NEXT: ret i32 0
;
; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@caller2b
; IS__CGSCC____-SAME: (%T* nocapture nofree readonly [[G:%.*]]) #[[ATTR3]] {
; IS__CGSCC____-NEXT: [[V:%.*]] = call i32 @test2b(%T* nocapture nofree readonly [[G]], i32 undef) #[[ATTR6:[0-9]+]]
; IS__CGSCC____-NEXT: ret i32 0
; ;
%v = call i32 @test2b(%T* %g, i32 0) %v = call i32 @test2b(%T* %g, i32 0)
ret i32 %v ret i32 %v
} }
;. ;.
; IS__TUNIT____: attributes #[[ATTR0]] = { argmemonly nofree nosync nounwind readonly willreturn } ; IS__TUNIT____: attributes #[[ATTR0]] = { argmemonly nofree norecurse nosync nounwind readonly willreturn }
; IS__TUNIT____: attributes #[[ATTR1]] = { nofree nosync nounwind readnone willreturn } ; IS__TUNIT____: attributes #[[ATTR1]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__TUNIT____: attributes #[[ATTR2]] = { argmemonly nofree nosync nounwind willreturn writeonly } ; IS__TUNIT____: attributes #[[ATTR2]] = { argmemonly nofree norecurse nosync nounwind willreturn writeonly }
; IS__TUNIT____: attributes #[[ATTR3]] = { argmemonly nofree nosync nounwind willreturn } ; IS__TUNIT____: attributes #[[ATTR3]] = { argmemonly nofree norecurse nosync nounwind willreturn }
; IS__TUNIT____: attributes #[[ATTR4]] = { nofree nosync nounwind readonly willreturn } ; IS__TUNIT____: attributes #[[ATTR4]] = { nofree nosync nounwind readonly willreturn }
; IS__TUNIT____: attributes #[[ATTR5]] = { nofree nosync nounwind willreturn writeonly } ; IS__TUNIT____: attributes #[[ATTR5]] = { nofree nosync nounwind willreturn writeonly }
; IS__TUNIT____: attributes #[[ATTR6]] = { nofree nosync nounwind willreturn } ; IS__TUNIT____: attributes #[[ATTR6]] = { nofree nosync nounwind willreturn }
;. ;.
; IS__CGSCC____: attributes #[[ATTR0]] = { argmemonly nofree norecurse nosync nounwind readonly willreturn } ; IS__CGSCC____: attributes #[[ATTR0]] = { argmemonly nofree norecurse nosync nounwind readonly willreturn }
; IS__CGSCC____: attributes #[[ATTR1]] = { nofree norecurse nosync nounwind readnone willreturn } ; IS__CGSCC____: attributes #[[ATTR1]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__CGSCC____: attributes #[[ATTR2]] = { argmemonly nofree norecurse nosync nounwind willreturn writeonly } ; IS__CGSCC____: attributes #[[ATTR2]] = { argmemonly nofree norecurse nosync nounwind willreturn writeonly }
; IS__CGSCC____: attributes #[[ATTR3]] = { argmemonly nofree norecurse nosync nounwind willreturn } ; IS__CGSCC____: attributes #[[ATTR3]] = { argmemonly nofree norecurse nosync nounwind willreturn }
; IS__CGSCC____: attributes #[[ATTR4]] = { nosync nounwind readonly willreturn } ; IS__CGSCC____: attributes #[[ATTR4]] = { nosync nounwind readonly willreturn }
; IS__CGSCC____: attributes #[[ATTR5]] = { nounwind willreturn writeonly } ; IS__CGSCC____: attributes #[[ATTR5]] = { nounwind willreturn writeonly }
; IS__CGSCC____: attributes #[[ATTR6]] = { nosync nounwind willreturn } ; IS__CGSCC____: attributes #[[ATTR6]] = { nosync nounwind willreturn }
;. ;.

llvm/test/Transforms/Attributor/ArgumentPromotion/naked_functions.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals
; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM ; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM
; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM ; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM
; Don't promote paramaters of/arguments to naked functions ; Don't promote paramaters of/arguments to naked functions
@g = common global i32 0, align 4 @g = common global i32 0, align 4
;. ;.
; CHECK: @[[G:[a-zA-Z0-9_$"\\.-]+]] = common global i32 0, align 4 ; CHECK: @[[G:[a-zA-Z0-9_$"\\.-]+]] = common global i32 0, align 4
;. ;.
define i32 @bar() { define i32 @bar() {
; CHECK-LABEL: define {{[^@]+}}@bar() { ; CHECK: Function Attrs: norecurse
; CHECK-LABEL: define {{[^@]+}}@bar
; CHECK-SAME: () #[[ATTR0:[0-9]+]] {
; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: [[CALL:%.*]] = call i32 @foo(i32* noundef nonnull align 4 dereferenceable(4) @g) ; CHECK-NEXT: [[CALL:%.*]] = call i32 @foo(i32* noundef nonnull align 4 dereferenceable(4) @g)
; CHECK-NEXT: ret i32 [[CALL]] ; CHECK-NEXT: ret i32 [[CALL]]
; ;
entry: entry:
%call = call i32 @foo(i32* @g) %call = call i32 @foo(i32* @g)
ret i32 %call ret i32 %call
} }
define internal i32 @foo(i32*) #0 { define internal i32 @foo(i32*) #0 {
; CHECK: Function Attrs: naked ; CHECK: Function Attrs: naked
; CHECK-LABEL: define {{[^@]+}}@foo ; CHECK-LABEL: define {{[^@]+}}@foo
; CHECK-SAME: (i32* [[TMP0:%.*]]) #[[ATTR0:[0-9]+]] { ; CHECK-SAME: (i32* [[TMP0:%.*]]) #[[ATTR1:[0-9]+]] {
; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 ; CHECK-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
; CHECK-NEXT: call void asm sideeffect "ldr r0, [r0] \0Abx lr \0A", ""() ; CHECK-NEXT: call void asm sideeffect "ldr r0, [r0] \0Abx lr \0A", ""()
; CHECK-NEXT: unreachable ; CHECK-NEXT: unreachable
; ;
entry: entry:
%retval = alloca i32, align 4 %retval = alloca i32, align 4
call void asm sideeffect "ldr r0, [r0] \0Abx lr \0A", ""() call void asm sideeffect "ldr r0, [r0] \0Abx lr \0A", ""()
unreachable unreachable
} }
attributes #0 = { naked } attributes #0 = { naked }
;. ;.
; CHECK: attributes #[[ATTR0]] = { naked } ; CHECK: attributes #[[ATTR0]] = { norecurse }
; CHECK: attributes #[[ATTR1]] = { naked }
;. ;.

llvm/test/Transforms/Attributor/ArgumentPromotion/pr32917.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals
; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM ; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM
; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM ; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM
; PR 32917 ; PR 32917
@b = common local_unnamed_addr global i32 0, align 4 @b = common local_unnamed_addr global i32 0, align 4
@a = common local_unnamed_addr global i32 0, align 4 @a = common local_unnamed_addr global i32 0, align 4
;. ;.
; CHECK: @[[B:[a-zA-Z0-9_$"\\.-]+]] = common local_unnamed_addr global i32 0, align 4 ; CHECK: @[[B:[a-zA-Z0-9_$"\\.-]+]] = common local_unnamed_addr global i32 0, align 4
; CHECK: @[[A:[a-zA-Z0-9_$"\\.-]+]] = common local_unnamed_addr global i32 0, align 4 ; CHECK: @[[A:[a-zA-Z0-9_$"\\.-]+]] = common local_unnamed_addr global i32 0, align 4
;. ;.
define i32 @fn2() local_unnamed_addr { define i32 @fn2() local_unnamed_addr {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind willreturn ; IS__TUNIT____: Function Attrs: nofree norecurse nosync nounwind willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@fn2 ; IS__TUNIT____-LABEL: define {{[^@]+}}@fn2
; IS__TUNIT____-SAME: () local_unnamed_addr #[[ATTR0:[0-9]+]] { ; IS__TUNIT____-SAME: () local_unnamed_addr #[[ATTR0:[0-9]+]] {
; IS__TUNIT____-NEXT: [[TMP1:%.*]] = load i32, i32* @b, align 4 ; IS__TUNIT____-NEXT: [[TMP1:%.*]] = load i32, i32* @b, align 4
; IS__TUNIT____-NEXT: [[TMP2:%.*]] = sext i32 [[TMP1]] to i64 ; IS__TUNIT____-NEXT: [[TMP2:%.*]] = sext i32 [[TMP1]] to i64
; IS__TUNIT____-NEXT: [[TMP3:%.*]] = inttoptr i64 [[TMP2]] to i32* ; IS__TUNIT____-NEXT: [[TMP3:%.*]] = inttoptr i64 [[TMP2]] to i32*
; IS__TUNIT____-NEXT: call fastcc void @fn1(i32* nocapture nofree readonly align 4 [[TMP3]]) #[[ATTR0]] ; IS__TUNIT____-NEXT: call fastcc void @fn1(i32* nocapture nofree readonly align 4 [[TMP3]]) #[[ATTR1:[0-9]+]]
; IS__TUNIT____-NEXT: ret i32 undef ; IS__TUNIT____-NEXT: ret i32 undef
; ;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@fn2 ; IS__CGSCC____-LABEL: define {{[^@]+}}@fn2
; IS__CGSCC____-SAME: () local_unnamed_addr #[[ATTR0:[0-9]+]] { ; IS__CGSCC____-SAME: () local_unnamed_addr #[[ATTR0:[0-9]+]] {
; IS__CGSCC____-NEXT: [[TMP1:%.*]] = load i32, i32* @b, align 4 ; IS__CGSCC____-NEXT: [[TMP1:%.*]] = load i32, i32* @b, align 4
; IS__CGSCC____-NEXT: [[TMP2:%.*]] = sext i32 [[TMP1]] to i64 ; IS__CGSCC____-NEXT: [[TMP2:%.*]] = sext i32 [[TMP1]] to i64
; IS__CGSCC____-NEXT: [[TMP3:%.*]] = inttoptr i64 [[TMP2]] to i32* ; IS__CGSCC____-NEXT: [[TMP3:%.*]] = inttoptr i64 [[TMP2]] to i32*
; IS__CGSCC____-NEXT: call fastcc void @fn1(i32* nocapture nofree nonnull readonly align 4 [[TMP3]]) #[[ATTR1:[0-9]+]] ; IS__CGSCC____-NEXT: call fastcc void @fn1(i32* nocapture nofree nonnull readonly align 4 [[TMP3]]) #[[ATTR1:[0-9]+]]
; IS__CGSCC____-NEXT: ret i32 undef ; IS__CGSCC____-NEXT: ret i32 undef
; ;
%1 = load i32, i32* @b, align 4 %1 = load i32, i32* @b, align 4
%2 = sext i32 %1 to i64 %2 = sext i32 %1 to i64
%3 = inttoptr i64 %2 to i32* %3 = inttoptr i64 %2 to i32*
call fastcc void @fn1(i32* %3) call fastcc void @fn1(i32* %3)
ret i32 undef ret i32 undef
} }
define internal fastcc void @fn1(i32* nocapture readonly) unnamed_addr { define internal fastcc void @fn1(i32* nocapture readonly) unnamed_addr {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@fn1 ; CHECK-LABEL: define {{[^@]+}}@fn1
; IS__TUNIT____-SAME: (i32* nocapture nofree nonnull readonly align 4 [[TMP0:%.*]]) unnamed_addr #[[ATTR0]] { ; CHECK-SAME: (i32* nocapture nofree nonnull readonly align 4 [[TMP0:%.*]]) unnamed_addr #[[ATTR0:[0-9]+]] {
; IS__TUNIT____-NEXT: [[TMP2:%.*]] = getelementptr inbounds i32, i32* [[TMP0]], i64 -1 ; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds i32, i32* [[TMP0]], i64 -1
; IS__TUNIT____-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 ; CHECK-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
; IS__TUNIT____-NEXT: store i32 [[TMP3]], i32* @a, align 4 ; CHECK-NEXT: store i32 [[TMP3]], i32* @a, align 4
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@fn1
; IS__CGSCC____-SAME: (i32* nocapture nofree nonnull readonly align 4 [[TMP0:%.*]]) unnamed_addr #[[ATTR0]] {
; IS__CGSCC____-NEXT: [[TMP2:%.*]] = getelementptr inbounds i32, i32* [[TMP0]], i64 -1
; IS__CGSCC____-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
; IS__CGSCC____-NEXT: store i32 [[TMP3]], i32* @a, align 4
; IS__CGSCC____-NEXT: ret void
; ;
%2 = getelementptr inbounds i32, i32* %0, i64 -1 %2 = getelementptr inbounds i32, i32* %0, i64 -1
%3 = load i32, i32* %2, align 4 %3 = load i32, i32* %2, align 4
store i32 %3, i32* @a, align 4 store i32 %3, i32* @a, align 4
ret void ret void
} }
;. ;.
; IS__TUNIT____: attributes #[[ATTR0]] = { nofree nosync nounwind willreturn } ; IS__TUNIT____: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind willreturn }
; IS__TUNIT____: attributes #[[ATTR1]] = { nofree nosync nounwind willreturn }
;. ;.
; IS__CGSCC____: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind willreturn } ; IS__CGSCC____: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind willreturn }
; IS__CGSCC____: attributes #[[ATTR1]] = { nounwind willreturn } ; IS__CGSCC____: attributes #[[ATTR1]] = { nounwind willreturn }
;. ;.

llvm/test/Transforms/Attributor/ArgumentPromotion/pr33641_remove_arg_dbgvalue.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals
; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM ; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM
; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM ; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM
; Fix for PR33641. ArgumentPromotion removed the argument to bar but left the call to ; Fix for PR33641. ArgumentPromotion removed the argument to bar but left the call to
; dbg.value which still used the removed argument. ; dbg.value which still used the removed argument.
; The %p argument should be removed, and the use of it in dbg.value should be ; The %p argument should be removed, and the use of it in dbg.value should be
; changed to undef. ; changed to undef.
%p_t = type i16* %p_t = type i16*
%fun_t = type void (%p_t)* %fun_t = type void (%p_t)*
define void @foo() { define void @foo() {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@foo ; CHECK-LABEL: define {{[^@]+}}@foo
; IS__TUNIT____-SAME: () #[[ATTR0:[0-9]+]] { ; CHECK-SAME: () #[[ATTR0:[0-9]+]] {
; IS__TUNIT____-NEXT: [[TMP:%.*]] = alloca void (i16*)*, align 8 ; CHECK-NEXT: [[TMP:%.*]] = alloca void (i16*)*, align 8
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@foo
; IS__CGSCC____-SAME: () #[[ATTR0:[0-9]+]] {
; IS__CGSCC____-NEXT: [[TMP:%.*]] = alloca void (i16*)*, align 8
; IS__CGSCC____-NEXT: ret void
; ;
%tmp = alloca %fun_t %tmp = alloca %fun_t
store %fun_t @bar, %fun_t* %tmp store %fun_t @bar, %fun_t* %tmp
ret void ret void
} }
define internal void @bar(%p_t %p) { define internal void @bar(%p_t %p) {
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@bar ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@bar
Show All 19 Lines
!0 = distinct !DICompileUnit(language: DW_LANG_C, file: !1) !0 = distinct !DICompileUnit(language: DW_LANG_C, file: !1)
!1 = !DIFile(filename: "test.c", directory: "") !1 = !DIFile(filename: "test.c", directory: "")
!2 = !{i32 2, !"Debug Info Version", i32 3} !2 = !{i32 2, !"Debug Info Version", i32 3}
!3 = distinct !DISubprogram(name: "bar", unit: !0) !3 = distinct !DISubprogram(name: "bar", unit: !0)
!4 = !DILocalVariable(name: "p", scope: !3) !4 = !DILocalVariable(name: "p", scope: !3)
!5 = !DIExpression() !5 = !DIExpression()
!6 = !DILocation(line: 1, column: 1, scope: !3) !6 = !DILocation(line: 1, column: 1, scope: !3)
;. ;.
; IS__TUNIT____: attributes #[[ATTR0]] = { nofree nosync nounwind readnone willreturn } ; NOT_CGSCC_NPM: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__TUNIT____: attributes #[[ATTR1:[0-9]+]] = { nofree nosync nounwind readnone speculatable willreturn } ; NOT_CGSCC_NPM: attributes #[[ATTR1:[0-9]+]] = { nofree nosync nounwind readnone speculatable willreturn }
;.
; IS__CGSCC_OPM: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR1:[0-9]+]] = { nofree nosync nounwind readnone speculatable willreturn }
;. ;.
; IS__CGSCC_NPM: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn } ; IS__CGSCC_NPM: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__CGSCC_NPM: attributes #[[ATTR1]] = { nofree nosync nounwind readnone willreturn } ; IS__CGSCC_NPM: attributes #[[ATTR1]] = { nofree nosync nounwind readnone willreturn }
; IS__CGSCC_NPM: attributes #[[ATTR2:[0-9]+]] = { nofree nosync nounwind readnone speculatable willreturn } ; IS__CGSCC_NPM: attributes #[[ATTR2:[0-9]+]] = { nofree nosync nounwind readnone speculatable willreturn }
; IS__CGSCC_NPM: attributes #[[ATTR3]] = { readnone willreturn } ; IS__CGSCC_NPM: attributes #[[ATTR3]] = { readnone willreturn }
;. ;.
; IS__TUNIT____: [[META0:![0-9]+]] = distinct !DICompileUnit(language: DW_LANG_C, file: !1, isOptimized: false, runtimeVersion: 0, emissionKind: NoDebug) ; IS__TUNIT____: [[META0:![0-9]+]] = distinct !DICompileUnit(language: DW_LANG_C, file: !1, isOptimized: false, runtimeVersion: 0, emissionKind: NoDebug)
; IS__TUNIT____: [[META1:![0-9]+]] = !DIFile(filename: "test.c", directory: "") ; IS__TUNIT____: [[META1:![0-9]+]] = !DIFile(filename: "test.c", directory: "")
Show All 9 Lines

llvm/test/Transforms/Attributor/ArgumentPromotion/reserve-tbaa.ll

Show All 18 Lines
;. ;.
; CHECK: @[[A:[a-zA-Z0-9_$"\\.-]+]] = global i32* null, align 8 ; CHECK: @[[A:[a-zA-Z0-9_$"\\.-]+]] = global i32* null, align 8
; CHECK: @[[E:[a-zA-Z0-9_$"\\.-]+]] = global i32** @a, align 8 ; CHECK: @[[E:[a-zA-Z0-9_$"\\.-]+]] = global i32** @a, align 8
; CHECK: @[[G:[a-zA-Z0-9_$"\\.-]+]] = global i32 0, align 4 ; CHECK: @[[G:[a-zA-Z0-9_$"\\.-]+]] = global i32 0, align 4
; CHECK: @[[C:[a-zA-Z0-9_$"\\.-]+]] = global i64 0, align 8 ; CHECK: @[[C:[a-zA-Z0-9_$"\\.-]+]] = global i64 0, align 8
; CHECK: @[[D:[a-zA-Z0-9_$"\\.-]+]] = global i8 0, align 1 ; CHECK: @[[D:[a-zA-Z0-9_$"\\.-]+]] = global i8 0, align 1
;. ;.
define internal fastcc void @fn(i32* nocapture readonly %p1, i64* nocapture readonly %p2) { define internal fastcc void @fn(i32* nocapture readonly %p1, i64* nocapture readonly %p2) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@fn ; CHECK-LABEL: define {{[^@]+}}@fn
; IS__TUNIT____-SAME: () #[[ATTR0:[0-9]+]] { ; CHECK-SAME: () #[[ATTR0:[0-9]+]] {
; IS__TUNIT____-NEXT: entry: ; CHECK-NEXT: entry:
; IS__TUNIT____-NEXT: [[TMP0:%.*]] = load i32, i32* @g, align 4, !tbaa [[TBAA0:![0-9]+]] ; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @g, align 4, !tbaa [[TBAA0:![0-9]+]]
; IS__TUNIT____-NEXT: [[CONV1:%.*]] = trunc i32 [[TMP0]] to i8 ; CHECK-NEXT: [[CONV1:%.*]] = trunc i32 [[TMP0]] to i8
; IS__TUNIT____-NEXT: store i8 [[CONV1]], i8* @d, align 1, !tbaa [[TBAA4:![0-9]+]] ; CHECK-NEXT: store i8 [[CONV1]], i8* @d, align 1, !tbaa [[TBAA4:![0-9]+]]
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@fn
; IS__CGSCC____-SAME: () #[[ATTR0:[0-9]+]] {
; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: [[TMP0:%.*]] = load i32, i32* @g, align 4, !tbaa [[TBAA0:![0-9]+]]
; IS__CGSCC____-NEXT: [[CONV1:%.*]] = trunc i32 [[TMP0]] to i8
; IS__CGSCC____-NEXT: store i8 [[CONV1]], i8* @d, align 1, !tbaa [[TBAA4:![0-9]+]]
; IS__CGSCC____-NEXT: ret void
; ;
entry: entry:
%0 = load i64, i64* %p2, align 8, !tbaa !1 %0 = load i64, i64* %p2, align 8, !tbaa !1
%conv = trunc i64 %0 to i32 %conv = trunc i64 %0 to i32
%1 = load i32, i32* %p1, align 4, !tbaa !5 %1 = load i32, i32* %p1, align 4, !tbaa !5
%conv1 = trunc i32 %1 to i8 %conv1 = trunc i32 %1 to i8
store i8 %conv1, i8* @d, align 1, !tbaa !7 store i8 %conv1, i8* @d, align 1, !tbaa !7
ret void ret void
} }
define i32 @main() { define i32 @main() {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@main ; CHECK-LABEL: define {{[^@]+}}@main
; IS__TUNIT____-SAME: () #[[ATTR0]] { ; CHECK-SAME: () #[[ATTR0]] {
; IS__TUNIT____-NEXT: entry: ; CHECK-NEXT: entry:
; IS__TUNIT____-NEXT: [[TMP0:%.*]] = load i32**, i32*** @e, align 8, !tbaa [[TBAA5:![0-9]+]] ; CHECK-NEXT: [[TMP0:%.*]] = load i32**, i32*** @e, align 8, !tbaa [[TBAA5:![0-9]+]]
; IS__TUNIT____-NEXT: store i32* @g, i32** [[TMP0]], align 8, !tbaa [[TBAA5]] ; CHECK-NEXT: store i32* @g, i32** [[TMP0]], align 8, !tbaa [[TBAA5]]
; IS__TUNIT____-NEXT: [[TMP1:%.*]] = load i32*, i32** @a, align 8, !tbaa [[TBAA5]] ; CHECK-NEXT: [[TMP1:%.*]] = load i32*, i32** @a, align 8, !tbaa [[TBAA5]]
; IS__TUNIT____-NEXT: store i32 1, i32* [[TMP1]], align 4, !tbaa [[TBAA0]] ; CHECK-NEXT: store i32 1, i32* [[TMP1]], align 4, !tbaa [[TBAA0]]
; IS__TUNIT____-NEXT: call fastcc void @fn() #[[ATTR0]] ; CHECK-NEXT: call fastcc void @fn() #[[ATTR1:[0-9]+]]
; IS__TUNIT____-NEXT: ret i32 0 ; CHECK-NEXT: ret i32 0
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@main
; IS__CGSCC____-SAME: () #[[ATTR0]] {
; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: [[TMP0:%.*]] = load i32**, i32*** @e, align 8, !tbaa [[TBAA5:![0-9]+]]
; IS__CGSCC____-NEXT: store i32* @g, i32** [[TMP0]], align 8, !tbaa [[TBAA5]]
; IS__CGSCC____-NEXT: [[TMP1:%.*]] = load i32*, i32** @a, align 8, !tbaa [[TBAA5]]
; IS__CGSCC____-NEXT: store i32 1, i32* [[TMP1]], align 4, !tbaa [[TBAA0]]
; IS__CGSCC____-NEXT: call fastcc void @fn() #[[ATTR1:[0-9]+]]
; IS__CGSCC____-NEXT: ret i32 0
; ;
entry: entry:
%0 = load i32**, i32*** @e, align 8, !tbaa !8 %0 = load i32**, i32*** @e, align 8, !tbaa !8
store i32* @g, i32** %0, align 8, !tbaa !8 store i32* @g, i32** %0, align 8, !tbaa !8
%1 = load i32*, i32** @a, align 8, !tbaa !8 %1 = load i32*, i32** @a, align 8, !tbaa !8
store i32 1, i32* %1, align 4, !tbaa !5 store i32 1, i32* %1, align 4, !tbaa !5
call fastcc void @fn(i32* @g, i64* @c) call fastcc void @fn(i32* @g, i64* @c)
ret i32 0 ret i32 0
} }
!1 = !{!2, !2, i64 0} !1 = !{!2, !2, i64 0}
!2 = !{!"long", !3, i64 0} !2 = !{!"long", !3, i64 0}
!3 = !{!"omnipotent char", !4, i64 0} !3 = !{!"omnipotent char", !4, i64 0}
!4 = !{!"Simple C/C++ TBAA"} !4 = !{!"Simple C/C++ TBAA"}
!5 = !{!6, !6, i64 0} !5 = !{!6, !6, i64 0}
!6 = !{!"int", !3, i64 0} !6 = !{!"int", !3, i64 0}
!7 = !{!3, !3, i64 0} !7 = !{!3, !3, i64 0}
!8 = !{!9, !9, i64 0} !8 = !{!9, !9, i64 0}
!9 = !{!"any pointer", !3, i64 0} !9 = !{!"any pointer", !3, i64 0}
;. ;.
; IS__TUNIT____: attributes #[[ATTR0]] = { nofree nosync nounwind willreturn } ; IS__TUNIT____: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind willreturn }
; IS__TUNIT____: attributes #[[ATTR1]] = { nofree nosync nounwind willreturn }
;. ;.
; IS__CGSCC____: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind willreturn } ; IS__CGSCC____: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind willreturn }
; IS__CGSCC____: attributes #[[ATTR1]] = { nounwind willreturn } ; IS__CGSCC____: attributes #[[ATTR1]] = { nounwind willreturn }
;. ;.
; CHECK: [[META0:![0-9]+]] = !{!1, !1, i64 0} ; CHECK: [[TBAA0]] = !{!1, !1, i64 0}
; CHECK: [[META1:![0-9]+]] = !{!"int", !2, i64 0} ; CHECK: [[META1:![0-9]+]] = !{!"int", !2, i64 0}
; CHECK: [[META2:![0-9]+]] = !{!"omnipotent char", !3, i64 0} ; CHECK: [[META2:![0-9]+]] = !{!"omnipotent char", !3, i64 0}
; CHECK: [[META3:![0-9]+]] = !{!"Simple C/C++ TBAA"} ; CHECK: [[META3:![0-9]+]] = !{!"Simple C/C++ TBAA"}
; CHECK: [[META4:![0-9]+]] = !{!2, !2, i64 0} ; CHECK: [[TBAA4]] = !{!2, !2, i64 0}
; CHECK: [[META5:![0-9]+]] = !{!6, !6, i64 0} ; CHECK: [[TBAA5]] = !{!6, !6, i64 0}
; CHECK: [[META6:![0-9]+]] = !{!"any pointer", !2, i64 0} ; CHECK: [[META6:![0-9]+]] = !{!"any pointer", !2, i64 0}
;. ;.

llvm/test/Transforms/Attributor/ArgumentPromotion/sret.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals
; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM ; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM
; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM ; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM
target datalayout = "e-m:w-i64:64-f80:128-n8:16:32:64-S128" target datalayout = "e-m:w-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-pc-windows-msvc" target triple = "x86_64-pc-windows-msvc"
define internal void @add({i32, i32}* %this, i32* sret(i32) %r) { define internal void @add({i32, i32}* %this, i32* sret(i32) %r) {
; ;
; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind willreturn writeonly ; IS__TUNIT____: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__TUNIT____-LABEL: define {{[^@]+}}@add ; IS__TUNIT____-LABEL: define {{[^@]+}}@add
; IS__TUNIT____-SAME: ({ i32, i32 }* noalias nocapture nofree nonnull readnone align 8 dereferenceable(8) [[THIS:%.*]], i32* noalias nocapture nofree noundef nonnull writeonly sret(i32) align 4 dereferenceable(4) [[R:%.*]]) #[[ATTR0:[0-9]+]] { ; IS__TUNIT____-SAME: ({ i32, i32 }* noalias nocapture nofree nonnull readnone align 8 dereferenceable(8) [[THIS:%.*]], i32* noalias nocapture nofree noundef nonnull writeonly sret(i32) align 4 dereferenceable(4) [[R:%.*]]) #[[ATTR0:[0-9]+]] {
; IS__TUNIT____-NEXT: ret void ; IS__TUNIT____-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@add ; IS__CGSCC____-LABEL: define {{[^@]+}}@add
; IS__CGSCC____-SAME: ({ i32, i32 }* noalias nocapture nofree nonnull readnone align 8 dereferenceable(8) [[THIS:%.*]], i32* noalias nocapture nofree nonnull readnone sret(i32) align 4 dereferenceable(4) [[R:%.*]]) #[[ATTR0:[0-9]+]] { ; IS__CGSCC____-SAME: ({ i32, i32 }* noalias nocapture nofree nonnull readnone align 8 dereferenceable(8) [[THIS:%.*]], i32* noalias nocapture nofree nonnull readnone sret(i32) align 4 dereferenceable(4) [[R:%.*]]) #[[ATTR0:[0-9]+]] {
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
%ap = getelementptr {i32, i32}, {i32, i32}* %this, i32 0, i32 0 %ap = getelementptr {i32, i32}, {i32, i32}* %this, i32 0, i32 0
%bp = getelementptr {i32, i32}, {i32, i32}* %this, i32 0, i32 1 %bp = getelementptr {i32, i32}, {i32, i32}* %this, i32 0, i32 1
%a = load i32, i32* %ap %a = load i32, i32* %ap
%b = load i32, i32* %bp %b = load i32, i32* %bp
%ab = add i32 %a, %b %ab = add i32 %a, %b
store i32 %ab, i32* %r store i32 %ab, i32* %r
ret void ret void
} }
define void @f() { define void @f() {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__TUNIT____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@f ; IS__TUNIT____-LABEL: define {{[^@]+}}@f
; IS__TUNIT____-SAME: () #[[ATTR1:[0-9]+]] { ; IS__TUNIT____-SAME: () #[[ATTR1:[0-9]+]] {
; IS__TUNIT____-NEXT: [[R:%.*]] = alloca i32, align 4 ; IS__TUNIT____-NEXT: [[R:%.*]] = alloca i32, align 4
; IS__TUNIT____-NEXT: call void @add({ i32, i32 }* noalias nocapture nofree nonnull readnone align 8 dereferenceable(8) undef, i32* noalias nocapture nofree noundef nonnull writeonly sret(i32) align 4 dereferenceable(4) [[R]]) #[[ATTR2:[0-9]+]] ; IS__TUNIT____-NEXT: call void @add({ i32, i32 }* noalias nocapture nofree nonnull readnone align 8 dereferenceable(8) undef, i32* noalias nocapture nofree noundef nonnull writeonly sret(i32) align 4 dereferenceable(4) [[R]]) #[[ATTR2:[0-9]+]]
; IS__TUNIT____-NEXT: ret void ; IS__TUNIT____-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@f ; IS__CGSCC____-LABEL: define {{[^@]+}}@f
; IS__CGSCC____-SAME: () #[[ATTR0]] { ; IS__CGSCC____-SAME: () #[[ATTR0]] {
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
%r = alloca i32 %r = alloca i32
%pair = alloca {i32, i32} %pair = alloca {i32, i32}
call void @add({i32, i32}* %pair, i32* sret(i32) %r) call void @add({i32, i32}* %pair, i32* sret(i32) %r)
ret void ret void
} }
;. ;.
; IS__TUNIT____: attributes #[[ATTR0]] = { argmemonly nofree nosync nounwind willreturn writeonly } ; IS__TUNIT____: attributes #[[ATTR0]] = { argmemonly nofree norecurse nosync nounwind willreturn writeonly }
; IS__TUNIT____: attributes #[[ATTR1]] = { nofree nosync nounwind readnone willreturn } ; IS__TUNIT____: attributes #[[ATTR1]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__TUNIT____: attributes #[[ATTR2]] = { nofree nosync nounwind willreturn writeonly } ; IS__TUNIT____: attributes #[[ATTR2]] = { nofree nosync nounwind willreturn writeonly }
;. ;.
; IS__CGSCC____: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn } ; IS__CGSCC____: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn }
;. ;.

llvm/test/Transforms/Attributor/IPConstantProp/2008-06-09-WeakProp.ll

Show All 13 Lines
; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: ret i32 1 ; CHECK-NEXT: ret i32 1
; ;
entry: entry:
ret i32 1 ret i32 1
} }
define i32 @main() nounwind { define i32 @main() nounwind {
; CHECK: Function Attrs: nounwind ; CHECK: Function Attrs: norecurse nounwind
; CHECK-LABEL: define {{[^@]+}}@main ; CHECK-LABEL: define {{[^@]+}}@main
; CHECK-SAME: () #[[ATTR0]] { ; CHECK-SAME: () #[[ATTR1:[0-9]+]] {
; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: [[R:%.*]] = call i32 @foo() #[[ATTR0]] ; CHECK-NEXT: [[R:%.*]] = call i32 @foo() #[[ATTR0]]
; CHECK-NEXT: ret i32 [[R]] ; CHECK-NEXT: ret i32 [[R]]
; ;
entry: entry:
%r = call i32 @foo( ) nounwind %r = call i32 @foo( ) nounwind
ret i32 %r ret i32 %r
} }
;. ;.
; CHECK: attributes #[[ATTR0]] = { nounwind } ; CHECK: attributes #[[ATTR0]] = { nounwind }
; CHECK: attributes #[[ATTR1]] = { norecurse nounwind }
;. ;.

llvm/test/Transforms/Attributor/IPConstantProp/2009-09-24-byval-ptr.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals
; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM ; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM
; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM ; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM
; Don't constant-propagate byval pointers, since they are not pointers! ; Don't constant-propagate byval pointers, since they are not pointers!
; PR5038 ; PR5038
%struct.MYstr = type { i8, i32 } %struct.MYstr = type { i8, i32 }
@mystr = internal global %struct.MYstr zeroinitializer ; <%struct.MYstr*> [#uses=3] @mystr = internal global %struct.MYstr zeroinitializer ; <%struct.MYstr*> [#uses=3]
declare void @use(i8) declare void @use(i8)
;. ;.
; CHECK: @[[MYSTR:[a-zA-Z0-9_$"\\.-]+]] = internal global [[STRUCT_MYSTR:%.*]] zeroinitializer ; CHECK: @[[MYSTR:[a-zA-Z0-9_$"\\.-]+]] = internal global [[STRUCT_MYSTR:%.*]] zeroinitializer
;. ;.
define internal void @vfu1(%struct.MYstr* byval(%struct.MYstr) align 4 %u) nounwind { define internal void @vfu1(%struct.MYstr* byval(%struct.MYstr) align 4 %u) nounwind {
; IS________OPM: Function Attrs: nounwind ; IS__TUNIT_OPM: Function Attrs: nounwind
; IS________OPM-LABEL: define {{[^@]+}}@vfu1 ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@vfu1
; IS________OPM-SAME: (%struct.MYstr* noalias nocapture nofree noundef nonnull byval([[STRUCT_MYSTR:%.*]]) align 8 dereferenceable(8) [[U:%.*]]) #[[ATTR0:[0-9]+]] { ; IS__TUNIT_OPM-SAME: (%struct.MYstr* noalias nocapture nofree noundef nonnull byval([[STRUCT_MYSTR:%.*]]) align 8 dereferenceable(8) [[U:%.*]]) #[[ATTR0:[0-9]+]] {
; IS________OPM-NEXT: entry: ; IS__TUNIT_OPM-NEXT: entry:
; IS________OPM-NEXT: [[TMP0:%.*]] = getelementptr [[STRUCT_MYSTR]], %struct.MYstr* [[U]], i32 0, i32 1 ; IS__TUNIT_OPM-NEXT: [[TMP0:%.*]] = getelementptr [[STRUCT_MYSTR]], %struct.MYstr* [[U]], i32 0, i32 1
; IS________OPM-NEXT: store i32 99, i32* [[TMP0]], align 4 ; IS__TUNIT_OPM-NEXT: store i32 99, i32* [[TMP0]], align 4
; IS________OPM-NEXT: [[TMP1:%.*]] = getelementptr [[STRUCT_MYSTR]], %struct.MYstr* [[U]], i32 0, i32 0 ; IS__TUNIT_OPM-NEXT: [[TMP1:%.*]] = getelementptr [[STRUCT_MYSTR]], %struct.MYstr* [[U]], i32 0, i32 0
; IS________OPM-NEXT: store i8 97, i8* [[TMP1]], align 8 ; IS__TUNIT_OPM-NEXT: store i8 97, i8* [[TMP1]], align 8
; IS________OPM-NEXT: [[L:%.*]] = load i8, i8* [[TMP1]], align 8 ; IS__TUNIT_OPM-NEXT: [[L:%.*]] = load i8, i8* [[TMP1]], align 8
; IS________OPM-NEXT: call void @use(i8 [[L]]) ; IS__TUNIT_OPM-NEXT: call void @use(i8 [[L]])
; IS________OPM-NEXT: br label [[RETURN:%.*]] ; IS__TUNIT_OPM-NEXT: br label [[RETURN:%.*]]
; IS________OPM: return: ; IS__TUNIT_OPM: return:
; IS________OPM-NEXT: ret void ; IS__TUNIT_OPM-NEXT: ret void
; ;
; IS__TUNIT_NPM: Function Attrs: nounwind ; IS__TUNIT_NPM: Function Attrs: nounwind
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@vfu1 ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@vfu1
; IS__TUNIT_NPM-SAME: (i8 [[TMP0:%.*]], i32 [[TMP1:%.*]]) #[[ATTR0:[0-9]+]] { ; IS__TUNIT_NPM-SAME: (i8 [[TMP0:%.*]], i32 [[TMP1:%.*]]) #[[ATTR0:[0-9]+]] {
; IS__TUNIT_NPM-NEXT: entry: ; IS__TUNIT_NPM-NEXT: entry:
; IS__TUNIT_NPM-NEXT: [[U_PRIV:%.*]] = alloca [[STRUCT_MYSTR:%.*]], align 8 ; IS__TUNIT_NPM-NEXT: [[U_PRIV:%.*]] = alloca [[STRUCT_MYSTR:%.*]], align 8
; IS__TUNIT_NPM-NEXT: [[U_PRIV_CAST:%.*]] = bitcast %struct.MYstr* [[U_PRIV]] to i8* ; IS__TUNIT_NPM-NEXT: [[U_PRIV_CAST:%.*]] = bitcast %struct.MYstr* [[U_PRIV]] to i8*
; IS__TUNIT_NPM-NEXT: store i8 [[TMP0]], i8* [[U_PRIV_CAST]], align 1 ; IS__TUNIT_NPM-NEXT: store i8 [[TMP0]], i8* [[U_PRIV_CAST]], align 1
; IS__TUNIT_NPM-NEXT: [[U_PRIV_0_1:%.*]] = getelementptr [[STRUCT_MYSTR]], %struct.MYstr* [[U_PRIV]], i64 0, i32 1 ; IS__TUNIT_NPM-NEXT: [[U_PRIV_0_1:%.*]] = getelementptr [[STRUCT_MYSTR]], %struct.MYstr* [[U_PRIV]], i64 0, i32 1
; IS__TUNIT_NPM-NEXT: store i32 [[TMP1]], i32* [[U_PRIV_0_1]], align 4 ; IS__TUNIT_NPM-NEXT: store i32 [[TMP1]], i32* [[U_PRIV_0_1]], align 4
; IS__TUNIT_NPM-NEXT: [[TMP2:%.*]] = getelementptr [[STRUCT_MYSTR]], %struct.MYstr* [[U_PRIV]], i32 0, i32 1 ; IS__TUNIT_NPM-NEXT: [[TMP2:%.*]] = getelementptr [[STRUCT_MYSTR]], %struct.MYstr* [[U_PRIV]], i32 0, i32 1
; IS__TUNIT_NPM-NEXT: store i32 99, i32* [[TMP2]], align 4 ; IS__TUNIT_NPM-NEXT: store i32 99, i32* [[TMP2]], align 4
; IS__TUNIT_NPM-NEXT: [[TMP3:%.*]] = getelementptr [[STRUCT_MYSTR]], %struct.MYstr* [[U_PRIV]], i32 0, i32 0 ; IS__TUNIT_NPM-NEXT: [[TMP3:%.*]] = getelementptr [[STRUCT_MYSTR]], %struct.MYstr* [[U_PRIV]], i32 0, i32 0
; IS__TUNIT_NPM-NEXT: store i8 97, i8* [[TMP3]], align 8 ; IS__TUNIT_NPM-NEXT: store i8 97, i8* [[TMP3]], align 8
; IS__TUNIT_NPM-NEXT: [[L:%.*]] = load i8, i8* [[TMP3]], align 8 ; IS__TUNIT_NPM-NEXT: [[L:%.*]] = load i8, i8* [[TMP3]], align 8
; IS__TUNIT_NPM-NEXT: call void @use(i8 [[L]]) ; IS__TUNIT_NPM-NEXT: call void @use(i8 [[L]])
; IS__TUNIT_NPM-NEXT: br label [[RETURN:%.*]] ; IS__TUNIT_NPM-NEXT: br label [[RETURN:%.*]]
; IS__TUNIT_NPM: return: ; IS__TUNIT_NPM: return:
; IS__TUNIT_NPM-NEXT: ret void ; IS__TUNIT_NPM-NEXT: ret void
; ;
; IS__CGSCC_NPM: Function Attrs: nounwind ; IS__CGSCC_OPM: Function Attrs: norecurse nounwind
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@vfu1
; IS__CGSCC_OPM-SAME: (%struct.MYstr* noalias nocapture nofree noundef nonnull byval([[STRUCT_MYSTR:%.*]]) align 8 dereferenceable(8) [[U:%.*]]) #[[ATTR0:[0-9]+]] {
; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: [[TMP0:%.*]] = getelementptr [[STRUCT_MYSTR]], %struct.MYstr* [[U]], i32 0, i32 1
; IS__CGSCC_OPM-NEXT: store i32 99, i32* [[TMP0]], align 4
; IS__CGSCC_OPM-NEXT: [[TMP1:%.*]] = getelementptr [[STRUCT_MYSTR]], %struct.MYstr* [[U]], i32 0, i32 0
; IS__CGSCC_OPM-NEXT: store i8 97, i8* [[TMP1]], align 8
; IS__CGSCC_OPM-NEXT: [[L:%.*]] = load i8, i8* [[TMP1]], align 8
; IS__CGSCC_OPM-NEXT: call void @use(i8 [[L]])
; IS__CGSCC_OPM-NEXT: br label [[RETURN:%.*]]
; IS__CGSCC_OPM: return:
; IS__CGSCC_OPM-NEXT: ret void
;
; IS__CGSCC_NPM: Function Attrs: norecurse nounwind
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@vfu1 ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@vfu1
; IS__CGSCC_NPM-SAME: (i8 [[TMP0:%.*]], i32 [[TMP1:%.*]]) #[[ATTR0:[0-9]+]] { ; IS__CGSCC_NPM-SAME: (i8 [[TMP0:%.*]], i32 [[TMP1:%.*]]) #[[ATTR0:[0-9]+]] {
; IS__CGSCC_NPM-NEXT: entry: ; IS__CGSCC_NPM-NEXT: entry:
; IS__CGSCC_NPM-NEXT: [[U_PRIV:%.*]] = alloca [[STRUCT_MYSTR:%.*]], align 8 ; IS__CGSCC_NPM-NEXT: [[U_PRIV:%.*]] = alloca [[STRUCT_MYSTR:%.*]], align 8
; IS__CGSCC_NPM-NEXT: [[U_PRIV_CAST:%.*]] = bitcast %struct.MYstr* [[U_PRIV]] to i8* ; IS__CGSCC_NPM-NEXT: [[U_PRIV_CAST:%.*]] = bitcast %struct.MYstr* [[U_PRIV]] to i8*
; IS__CGSCC_NPM-NEXT: store i8 [[TMP0]], i8* [[U_PRIV_CAST]], align 8 ; IS__CGSCC_NPM-NEXT: store i8 [[TMP0]], i8* [[U_PRIV_CAST]], align 8
; IS__CGSCC_NPM-NEXT: [[U_PRIV_0_1:%.*]] = getelementptr [[STRUCT_MYSTR]], %struct.MYstr* [[U_PRIV]], i64 0, i32 1 ; IS__CGSCC_NPM-NEXT: [[U_PRIV_0_1:%.*]] = getelementptr [[STRUCT_MYSTR]], %struct.MYstr* [[U_PRIV]], i64 0, i32 1
; IS__CGSCC_NPM-NEXT: [[TMP2:%.*]] = getelementptr [[STRUCT_MYSTR]], %struct.MYstr* [[U_PRIV]], i32 0, i32 1 ; IS__CGSCC_NPM-NEXT: [[TMP2:%.*]] = getelementptr [[STRUCT_MYSTR]], %struct.MYstr* [[U_PRIV]], i32 0, i32 1
Show All 14 Linesentry:
call void @use(i8 %l) call void @use(i8 %l)
br label %return br label %return
return: ; preds = %entry return: ; preds = %entry
ret void ret void
} }
define internal i32 @vfu2(%struct.MYstr* byval(%struct.MYstr) align 4 %u) nounwind readonly { define internal i32 @vfu2(%struct.MYstr* byval(%struct.MYstr) align 4 %u) nounwind readonly {
; IS__TUNIT_OPM: Function Attrs: argmemonly nofree nosync nounwind readonly willreturn ; IS________OPM: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@vfu2 ; IS________OPM-LABEL: define {{[^@]+}}@vfu2
; IS__TUNIT_OPM-SAME: (%struct.MYstr* noalias nocapture nofree noundef nonnull readonly byval([[STRUCT_MYSTR:%.*]]) align 8 dereferenceable(8) [[U:%.*]]) #[[ATTR1:[0-9]+]] { ; IS________OPM-SAME: (%struct.MYstr* noalias nocapture nofree noundef nonnull readonly byval([[STRUCT_MYSTR:%.*]]) align 8 dereferenceable(8) [[U:%.*]]) #[[ATTR1:[0-9]+]] {
; IS__TUNIT_OPM-NEXT: entry: ; IS________OPM-NEXT: entry:
; IS__TUNIT_OPM-NEXT: [[TMP0:%.*]] = getelementptr [[STRUCT_MYSTR]], %struct.MYstr* [[U]], i32 0, i32 1 ; IS________OPM-NEXT: [[TMP0:%.*]] = getelementptr [[STRUCT_MYSTR]], %struct.MYstr* [[U]], i32 0, i32 1
; IS__TUNIT_OPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 ; IS________OPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
; IS__TUNIT_OPM-NEXT: [[TMP2:%.*]] = getelementptr [[STRUCT_MYSTR]], %struct.MYstr* [[U]], i32 0, i32 0 ; IS________OPM-NEXT: [[TMP2:%.*]] = getelementptr [[STRUCT_MYSTR]], %struct.MYstr* [[U]], i32 0, i32 0
; IS__TUNIT_OPM-NEXT: [[TMP3:%.*]] = load i8, i8* [[TMP2]], align 8 ; IS________OPM-NEXT: [[TMP3:%.*]] = load i8, i8* [[TMP2]], align 8
; IS__TUNIT_OPM-NEXT: [[TMP4:%.*]] = zext i8 [[TMP3]] to i32 ; IS________OPM-NEXT: [[TMP4:%.*]] = zext i8 [[TMP3]] to i32
; IS__TUNIT_OPM-NEXT: [[TMP5:%.*]] = add i32 [[TMP4]], [[TMP1]] ; IS________OPM-NEXT: [[TMP5:%.*]] = add i32 [[TMP4]], [[TMP1]]
; IS__TUNIT_OPM-NEXT: ret i32 [[TMP5]] ; IS________OPM-NEXT: ret i32 [[TMP5]]
; ;
; IS__TUNIT_NPM: Function Attrs: argmemonly nofree nosync nounwind readonly willreturn ; IS__TUNIT_NPM: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@vfu2 ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@vfu2
; IS__TUNIT_NPM-SAME: (i8 [[TMP0:%.*]], i32 [[TMP1:%.*]]) #[[ATTR1:[0-9]+]] { ; IS__TUNIT_NPM-SAME: (i8 [[TMP0:%.*]], i32 [[TMP1:%.*]]) #[[ATTR1:[0-9]+]] {
; IS__TUNIT_NPM-NEXT: entry: ; IS__TUNIT_NPM-NEXT: entry:
; IS__TUNIT_NPM-NEXT: [[U_PRIV:%.*]] = alloca [[STRUCT_MYSTR:%.*]], align 8 ; IS__TUNIT_NPM-NEXT: [[U_PRIV:%.*]] = alloca [[STRUCT_MYSTR:%.*]], align 8
; IS__TUNIT_NPM-NEXT: [[U_PRIV_CAST:%.*]] = bitcast %struct.MYstr* [[U_PRIV]] to i8* ; IS__TUNIT_NPM-NEXT: [[U_PRIV_CAST:%.*]] = bitcast %struct.MYstr* [[U_PRIV]] to i8*
; IS__TUNIT_NPM-NEXT: store i8 [[TMP0]], i8* [[U_PRIV_CAST]], align 1 ; IS__TUNIT_NPM-NEXT: store i8 [[TMP0]], i8* [[U_PRIV_CAST]], align 1
; IS__TUNIT_NPM-NEXT: [[U_PRIV_0_1:%.*]] = getelementptr [[STRUCT_MYSTR]], %struct.MYstr* [[U_PRIV]], i64 0, i32 1 ; IS__TUNIT_NPM-NEXT: [[U_PRIV_0_1:%.*]] = getelementptr [[STRUCT_MYSTR]], %struct.MYstr* [[U_PRIV]], i64 0, i32 1
; IS__TUNIT_NPM-NEXT: store i32 [[TMP1]], i32* [[U_PRIV_0_1]], align 4 ; IS__TUNIT_NPM-NEXT: store i32 [[TMP1]], i32* [[U_PRIV_0_1]], align 4
; IS__TUNIT_NPM-NEXT: [[TMP2:%.*]] = getelementptr [[STRUCT_MYSTR]], %struct.MYstr* [[U_PRIV]], i32 0, i32 1 ; IS__TUNIT_NPM-NEXT: [[TMP2:%.*]] = getelementptr [[STRUCT_MYSTR]], %struct.MYstr* [[U_PRIV]], i32 0, i32 1
; IS__TUNIT_NPM-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 ; IS__TUNIT_NPM-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
; IS__TUNIT_NPM-NEXT: [[TMP4:%.*]] = getelementptr [[STRUCT_MYSTR]], %struct.MYstr* [[U_PRIV]], i32 0, i32 0 ; IS__TUNIT_NPM-NEXT: [[TMP4:%.*]] = getelementptr [[STRUCT_MYSTR]], %struct.MYstr* [[U_PRIV]], i32 0, i32 0
; IS__TUNIT_NPM-NEXT: [[TMP5:%.*]] = load i8, i8* [[TMP4]], align 8 ; IS__TUNIT_NPM-NEXT: [[TMP5:%.*]] = load i8, i8* [[TMP4]], align 8
; IS__TUNIT_NPM-NEXT: [[TMP6:%.*]] = zext i8 [[TMP5]] to i32 ; IS__TUNIT_NPM-NEXT: [[TMP6:%.*]] = zext i8 [[TMP5]] to i32
; IS__TUNIT_NPM-NEXT: [[TMP7:%.*]] = add i32 [[TMP6]], [[TMP3]] ; IS__TUNIT_NPM-NEXT: [[TMP7:%.*]] = add i32 [[TMP6]], [[TMP3]]
; IS__TUNIT_NPM-NEXT: ret i32 [[TMP7]] ; IS__TUNIT_NPM-NEXT: ret i32 [[TMP7]]
; ;
; IS__CGSCC_OPM: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@vfu2
; IS__CGSCC_OPM-SAME: (%struct.MYstr* noalias nocapture nofree noundef nonnull readonly byval([[STRUCT_MYSTR:%.*]]) align 8 dereferenceable(8) [[U:%.*]]) #[[ATTR1:[0-9]+]] {
; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: [[TMP0:%.*]] = getelementptr [[STRUCT_MYSTR]], %struct.MYstr* [[U]], i32 0, i32 1
; IS__CGSCC_OPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
; IS__CGSCC_OPM-NEXT: [[TMP2:%.*]] = getelementptr [[STRUCT_MYSTR]], %struct.MYstr* [[U]], i32 0, i32 0
; IS__CGSCC_OPM-NEXT: [[TMP3:%.*]] = load i8, i8* [[TMP2]], align 8
; IS__CGSCC_OPM-NEXT: [[TMP4:%.*]] = zext i8 [[TMP3]] to i32
; IS__CGSCC_OPM-NEXT: [[TMP5:%.*]] = add i32 [[TMP4]], [[TMP1]]
; IS__CGSCC_OPM-NEXT: ret i32 [[TMP5]]
;
; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@vfu2 ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@vfu2
; IS__CGSCC_NPM-SAME: (i8 [[TMP0:%.*]], i32 [[TMP1:%.*]]) #[[ATTR1:[0-9]+]] { ; IS__CGSCC_NPM-SAME: (i8 [[TMP0:%.*]], i32 [[TMP1:%.*]]) #[[ATTR1:[0-9]+]] {
; IS__CGSCC_NPM-NEXT: entry: ; IS__CGSCC_NPM-NEXT: entry:
; IS__CGSCC_NPM-NEXT: [[U_PRIV:%.*]] = alloca [[STRUCT_MYSTR:%.*]], align 8 ; IS__CGSCC_NPM-NEXT: [[U_PRIV:%.*]] = alloca [[STRUCT_MYSTR:%.*]], align 8
; IS__CGSCC_NPM-NEXT: [[U_PRIV_CAST:%.*]] = bitcast %struct.MYstr* [[U_PRIV]] to i8* ; IS__CGSCC_NPM-NEXT: [[U_PRIV_CAST:%.*]] = bitcast %struct.MYstr* [[U_PRIV]] to i8*
; IS__CGSCC_NPM-NEXT: store i8 [[TMP0]], i8* [[U_PRIV_CAST]], align 8 ; IS__CGSCC_NPM-NEXT: store i8 [[TMP0]], i8* [[U_PRIV_CAST]], align 8
; IS__CGSCC_NPM-NEXT: [[U_PRIV_0_1:%.*]] = getelementptr [[STRUCT_MYSTR]], %struct.MYstr* [[U_PRIV]], i64 0, i32 1 ; IS__CGSCC_NPM-NEXT: [[U_PRIV_0_1:%.*]] = getelementptr [[STRUCT_MYSTR]], %struct.MYstr* [[U_PRIV]], i64 0, i32 1
Show All 36 Lines
; IS__TUNIT_NPM-NEXT: call void @vfu1(i8 [[TMP0]], i32 [[TMP1]]) #[[ATTR0]] ; IS__TUNIT_NPM-NEXT: call void @vfu1(i8 [[TMP0]], i32 [[TMP1]]) #[[ATTR0]]
; IS__TUNIT_NPM-NEXT: [[MYSTR_CAST1:%.*]] = bitcast %struct.MYstr* @mystr to i8* ; IS__TUNIT_NPM-NEXT: [[MYSTR_CAST1:%.*]] = bitcast %struct.MYstr* @mystr to i8*
; IS__TUNIT_NPM-NEXT: [[TMP2:%.*]] = load i8, i8* [[MYSTR_CAST1]], align 8 ; IS__TUNIT_NPM-NEXT: [[TMP2:%.*]] = load i8, i8* [[MYSTR_CAST1]], align 8
; IS__TUNIT_NPM-NEXT: [[MYSTR_0_12:%.*]] = getelementptr [[STRUCT_MYSTR]], %struct.MYstr* @mystr, i64 0, i32 1 ; IS__TUNIT_NPM-NEXT: [[MYSTR_0_12:%.*]] = getelementptr [[STRUCT_MYSTR]], %struct.MYstr* @mystr, i64 0, i32 1
; IS__TUNIT_NPM-NEXT: [[TMP3:%.*]] = load i32, i32* [[MYSTR_0_12]], align 8 ; IS__TUNIT_NPM-NEXT: [[TMP3:%.*]] = load i32, i32* [[MYSTR_0_12]], align 8
; IS__TUNIT_NPM-NEXT: [[RESULT:%.*]] = call i32 @vfu2(i8 [[TMP2]], i32 [[TMP3]]) #[[ATTR2:[0-9]+]] ; IS__TUNIT_NPM-NEXT: [[RESULT:%.*]] = call i32 @vfu2(i8 [[TMP2]], i32 [[TMP3]]) #[[ATTR2:[0-9]+]]
; IS__TUNIT_NPM-NEXT: ret i32 [[RESULT]] ; IS__TUNIT_NPM-NEXT: ret i32 [[RESULT]]
; ;
; IS__CGSCC_OPM: Function Attrs: nounwind ; IS__CGSCC_OPM: Function Attrs: norecurse nounwind
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@unions ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@unions
; IS__CGSCC_OPM-SAME: () #[[ATTR0]] { ; IS__CGSCC_OPM-SAME: () #[[ATTR0]] {
; IS__CGSCC_OPM-NEXT: entry: ; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: call void @vfu1(%struct.MYstr* noalias nocapture nofree noundef nonnull readonly byval([[STRUCT_MYSTR:%.*]]) align 8 dereferenceable(8) @mystr) #[[ATTR0]] ; IS__CGSCC_OPM-NEXT: call void @vfu1(%struct.MYstr* noalias nocapture nofree noundef nonnull readonly byval([[STRUCT_MYSTR:%.*]]) align 8 dereferenceable(8) @mystr) #[[ATTR2:[0-9]+]]
; IS__CGSCC_OPM-NEXT: [[RESULT:%.*]] = call i32 @vfu2(%struct.MYstr* noalias nocapture nofree noundef nonnull readonly byval([[STRUCT_MYSTR]]) align 8 dereferenceable(8) @mystr) #[[ATTR0]] ; IS__CGSCC_OPM-NEXT: [[RESULT:%.*]] = call i32 @vfu2(%struct.MYstr* noalias nocapture nofree noundef nonnull readonly byval([[STRUCT_MYSTR]]) align 8 dereferenceable(8) @mystr) #[[ATTR3:[0-9]+]]
; IS__CGSCC_OPM-NEXT: ret i32 [[RESULT]] ; IS__CGSCC_OPM-NEXT: ret i32 [[RESULT]]
; ;
; IS__CGSCC_NPM: Function Attrs: nounwind ; IS__CGSCC_NPM: Function Attrs: norecurse nounwind
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@unions ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@unions
; IS__CGSCC_NPM-SAME: () #[[ATTR0]] { ; IS__CGSCC_NPM-SAME: () #[[ATTR0]] {
; IS__CGSCC_NPM-NEXT: entry: ; IS__CGSCC_NPM-NEXT: entry:
; IS__CGSCC_NPM-NEXT: [[TMP0:%.*]] = load i8, i8* getelementptr inbounds ([[STRUCT_MYSTR:%.*]], %struct.MYstr* @mystr, i32 0, i32 0), align 8 ; IS__CGSCC_NPM-NEXT: [[TMP0:%.*]] = load i8, i8* getelementptr inbounds ([[STRUCT_MYSTR:%.*]], %struct.MYstr* @mystr, i32 0, i32 0), align 8
; IS__CGSCC_NPM-NEXT: call void @vfu1(i8 [[TMP0]], i32 undef) #[[ATTR0]] ; IS__CGSCC_NPM-NEXT: call void @vfu1(i8 [[TMP0]], i32 undef) #[[ATTR2:[0-9]+]]
; IS__CGSCC_NPM-NEXT: [[TMP1:%.*]] = load i8, i8* getelementptr inbounds ([[STRUCT_MYSTR]], %struct.MYstr* @mystr, i32 0, i32 0), align 8 ; IS__CGSCC_NPM-NEXT: [[TMP1:%.*]] = load i8, i8* getelementptr inbounds ([[STRUCT_MYSTR]], %struct.MYstr* @mystr, i32 0, i32 0), align 8
; IS__CGSCC_NPM-NEXT: [[MYSTR_0_12:%.*]] = getelementptr [[STRUCT_MYSTR]], %struct.MYstr* @mystr, i64 0, i32 1 ; IS__CGSCC_NPM-NEXT: [[MYSTR_0_12:%.*]] = getelementptr [[STRUCT_MYSTR]], %struct.MYstr* @mystr, i64 0, i32 1
; IS__CGSCC_NPM-NEXT: [[TMP2:%.*]] = load i32, i32* [[MYSTR_0_12]], align 8 ; IS__CGSCC_NPM-NEXT: [[TMP2:%.*]] = load i32, i32* [[MYSTR_0_12]], align 8
; IS__CGSCC_NPM-NEXT: [[RESULT:%.*]] = call i32 @vfu2(i8 [[TMP1]], i32 [[TMP2]]) #[[ATTR0]] ; IS__CGSCC_NPM-NEXT: [[RESULT:%.*]] = call i32 @vfu2(i8 [[TMP1]], i32 [[TMP2]]) #[[ATTR3:[0-9]+]]
; IS__CGSCC_NPM-NEXT: ret i32 [[RESULT]] ; IS__CGSCC_NPM-NEXT: ret i32 [[RESULT]]
; ;
entry: entry:
call void @vfu1(%struct.MYstr* byval(%struct.MYstr) align 4 @mystr) nounwind call void @vfu1(%struct.MYstr* byval(%struct.MYstr) align 4 @mystr) nounwind
%result = call i32 @vfu2(%struct.MYstr* byval(%struct.MYstr) align 4 @mystr) nounwind %result = call i32 @vfu2(%struct.MYstr* byval(%struct.MYstr) align 4 @mystr) nounwind
ret i32 %result ret i32 %result
} }
define internal i32 @vfu2_v2(%struct.MYstr* byval(%struct.MYstr) align 4 %u) nounwind readonly { define internal i32 @vfu2_v2(%struct.MYstr* byval(%struct.MYstr) align 4 %u) nounwind readonly {
; IS__TUNIT_OPM: Function Attrs: argmemonly nofree nosync nounwind readonly willreturn ; IS________OPM: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@vfu2_v2 ; IS________OPM-LABEL: define {{[^@]+}}@vfu2_v2
; IS__TUNIT_OPM-SAME: (%struct.MYstr* noalias nocapture nofree noundef nonnull byval([[STRUCT_MYSTR:%.*]]) align 8 dereferenceable(8) [[U:%.*]]) #[[ATTR1]] { ; IS________OPM-SAME: (%struct.MYstr* noalias nocapture nofree noundef nonnull byval([[STRUCT_MYSTR:%.*]]) align 8 dereferenceable(8) [[U:%.*]]) #[[ATTR1]] {
; IS__TUNIT_OPM-NEXT: entry: ; IS________OPM-NEXT: entry:
; IS__TUNIT_OPM-NEXT: [[Z:%.*]] = getelementptr [[STRUCT_MYSTR]], %struct.MYstr* [[U]], i32 0, i32 1 ; IS________OPM-NEXT: [[Z:%.*]] = getelementptr [[STRUCT_MYSTR]], %struct.MYstr* [[U]], i32 0, i32 1
; IS__TUNIT_OPM-NEXT: store i32 99, i32* [[Z]], align 4 ; IS________OPM-NEXT: store i32 99, i32* [[Z]], align 4
; IS__TUNIT_OPM-NEXT: [[TMP0:%.*]] = getelementptr [[STRUCT_MYSTR]], %struct.MYstr* [[U]], i32 0, i32 1 ; IS________OPM-NEXT: [[TMP0:%.*]] = getelementptr [[STRUCT_MYSTR]], %struct.MYstr* [[U]], i32 0, i32 1
; IS__TUNIT_OPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 ; IS________OPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
; IS__TUNIT_OPM-NEXT: [[TMP2:%.*]] = getelementptr [[STRUCT_MYSTR]], %struct.MYstr* [[U]], i32 0, i32 0 ; IS________OPM-NEXT: [[TMP2:%.*]] = getelementptr [[STRUCT_MYSTR]], %struct.MYstr* [[U]], i32 0, i32 0
; IS__TUNIT_OPM-NEXT: [[TMP3:%.*]] = load i8, i8* [[TMP2]], align 8 ; IS________OPM-NEXT: [[TMP3:%.*]] = load i8, i8* [[TMP2]], align 8
; IS__TUNIT_OPM-NEXT: [[TMP4:%.*]] = zext i8 [[TMP3]] to i32 ; IS________OPM-NEXT: [[TMP4:%.*]] = zext i8 [[TMP3]] to i32
; IS__TUNIT_OPM-NEXT: [[TMP5:%.*]] = add i32 [[TMP4]], [[TMP1]] ; IS________OPM-NEXT: [[TMP5:%.*]] = add i32 [[TMP4]], [[TMP1]]
; IS__TUNIT_OPM-NEXT: ret i32 [[TMP5]] ; IS________OPM-NEXT: ret i32 [[TMP5]]
; ;
; IS__TUNIT_NPM: Function Attrs: argmemonly nofree nosync nounwind readonly willreturn ; IS__TUNIT_NPM: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@vfu2_v2 ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@vfu2_v2
; IS__TUNIT_NPM-SAME: (i8 [[TMP0:%.*]], i32 [[TMP1:%.*]]) #[[ATTR1]] { ; IS__TUNIT_NPM-SAME: (i8 [[TMP0:%.*]], i32 [[TMP1:%.*]]) #[[ATTR1]] {
; IS__TUNIT_NPM-NEXT: entry: ; IS__TUNIT_NPM-NEXT: entry:
; IS__TUNIT_NPM-NEXT: [[U_PRIV:%.*]] = alloca [[STRUCT_MYSTR:%.*]], align 8 ; IS__TUNIT_NPM-NEXT: [[U_PRIV:%.*]] = alloca [[STRUCT_MYSTR:%.*]], align 8
; IS__TUNIT_NPM-NEXT: [[U_PRIV_CAST:%.*]] = bitcast %struct.MYstr* [[U_PRIV]] to i8* ; IS__TUNIT_NPM-NEXT: [[U_PRIV_CAST:%.*]] = bitcast %struct.MYstr* [[U_PRIV]] to i8*
; IS__TUNIT_NPM-NEXT: store i8 [[TMP0]], i8* [[U_PRIV_CAST]], align 1 ; IS__TUNIT_NPM-NEXT: store i8 [[TMP0]], i8* [[U_PRIV_CAST]], align 1
; IS__TUNIT_NPM-NEXT: [[U_PRIV_0_1:%.*]] = getelementptr [[STRUCT_MYSTR]], %struct.MYstr* [[U_PRIV]], i64 0, i32 1 ; IS__TUNIT_NPM-NEXT: [[U_PRIV_0_1:%.*]] = getelementptr [[STRUCT_MYSTR]], %struct.MYstr* [[U_PRIV]], i64 0, i32 1
; IS__TUNIT_NPM-NEXT: store i32 [[TMP1]], i32* [[U_PRIV_0_1]], align 4 ; IS__TUNIT_NPM-NEXT: store i32 [[TMP1]], i32* [[U_PRIV_0_1]], align 4
; IS__TUNIT_NPM-NEXT: [[Z:%.*]] = getelementptr [[STRUCT_MYSTR]], %struct.MYstr* [[U_PRIV]], i32 0, i32 1 ; IS__TUNIT_NPM-NEXT: [[Z:%.*]] = getelementptr [[STRUCT_MYSTR]], %struct.MYstr* [[U_PRIV]], i32 0, i32 1
; IS__TUNIT_NPM-NEXT: store i32 99, i32* [[Z]], align 4 ; IS__TUNIT_NPM-NEXT: store i32 99, i32* [[Z]], align 4
; IS__TUNIT_NPM-NEXT: [[TMP2:%.*]] = getelementptr [[STRUCT_MYSTR]], %struct.MYstr* [[U_PRIV]], i32 0, i32 1 ; IS__TUNIT_NPM-NEXT: [[TMP2:%.*]] = getelementptr [[STRUCT_MYSTR]], %struct.MYstr* [[U_PRIV]], i32 0, i32 1
; IS__TUNIT_NPM-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 ; IS__TUNIT_NPM-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
; IS__TUNIT_NPM-NEXT: [[TMP4:%.*]] = getelementptr [[STRUCT_MYSTR]], %struct.MYstr* [[U_PRIV]], i32 0, i32 0 ; IS__TUNIT_NPM-NEXT: [[TMP4:%.*]] = getelementptr [[STRUCT_MYSTR]], %struct.MYstr* [[U_PRIV]], i32 0, i32 0
; IS__TUNIT_NPM-NEXT: [[TMP5:%.*]] = load i8, i8* [[TMP4]], align 8 ; IS__TUNIT_NPM-NEXT: [[TMP5:%.*]] = load i8, i8* [[TMP4]], align 8
; IS__TUNIT_NPM-NEXT: [[TMP6:%.*]] = zext i8 [[TMP5]] to i32 ; IS__TUNIT_NPM-NEXT: [[TMP6:%.*]] = zext i8 [[TMP5]] to i32
; IS__TUNIT_NPM-NEXT: [[TMP7:%.*]] = add i32 [[TMP6]], [[TMP3]] ; IS__TUNIT_NPM-NEXT: [[TMP7:%.*]] = add i32 [[TMP6]], [[TMP3]]
; IS__TUNIT_NPM-NEXT: ret i32 [[TMP7]] ; IS__TUNIT_NPM-NEXT: ret i32 [[TMP7]]
; ;
; IS__CGSCC_OPM: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@vfu2_v2
; IS__CGSCC_OPM-SAME: (%struct.MYstr* noalias nocapture nofree noundef nonnull byval([[STRUCT_MYSTR:%.*]]) align 8 dereferenceable(8) [[U:%.*]]) #[[ATTR1]] {
; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: [[Z:%.*]] = getelementptr [[STRUCT_MYSTR]], %struct.MYstr* [[U]], i32 0, i32 1
; IS__CGSCC_OPM-NEXT: store i32 99, i32* [[Z]], align 4
; IS__CGSCC_OPM-NEXT: [[TMP0:%.*]] = getelementptr [[STRUCT_MYSTR]], %struct.MYstr* [[U]], i32 0, i32 1
; IS__CGSCC_OPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
; IS__CGSCC_OPM-NEXT: [[TMP2:%.*]] = getelementptr [[STRUCT_MYSTR]], %struct.MYstr* [[U]], i32 0, i32 0
; IS__CGSCC_OPM-NEXT: [[TMP3:%.*]] = load i8, i8* [[TMP2]], align 8
; IS__CGSCC_OPM-NEXT: [[TMP4:%.*]] = zext i8 [[TMP3]] to i32
; IS__CGSCC_OPM-NEXT: [[TMP5:%.*]] = add i32 [[TMP4]], [[TMP1]]
; IS__CGSCC_OPM-NEXT: ret i32 [[TMP5]]
;
; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@vfu2_v2 ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@vfu2_v2
; IS__CGSCC_NPM-SAME: (i8 [[TMP0:%.*]], i32 [[TMP1:%.*]]) #[[ATTR1]] { ; IS__CGSCC_NPM-SAME: (i8 [[TMP0:%.*]], i32 [[TMP1:%.*]]) #[[ATTR1]] {
; IS__CGSCC_NPM-NEXT: entry: ; IS__CGSCC_NPM-NEXT: entry:
; IS__CGSCC_NPM-NEXT: [[U_PRIV:%.*]] = alloca [[STRUCT_MYSTR:%.*]], align 8 ; IS__CGSCC_NPM-NEXT: [[U_PRIV:%.*]] = alloca [[STRUCT_MYSTR:%.*]], align 8
; IS__CGSCC_NPM-NEXT: [[U_PRIV_CAST:%.*]] = bitcast %struct.MYstr* [[U_PRIV]] to i8* ; IS__CGSCC_NPM-NEXT: [[U_PRIV_CAST:%.*]] = bitcast %struct.MYstr* [[U_PRIV]] to i8*
; IS__CGSCC_NPM-NEXT: [[U_PRIV_0_1:%.*]] = getelementptr [[STRUCT_MYSTR]], %struct.MYstr* [[U_PRIV]], i64 0, i32 1 ; IS__CGSCC_NPM-NEXT: [[U_PRIV_0_1:%.*]] = getelementptr [[STRUCT_MYSTR]], %struct.MYstr* [[U_PRIV]], i64 0, i32 1
; IS__CGSCC_NPM-NEXT: [[Z:%.*]] = getelementptr [[STRUCT_MYSTR]], %struct.MYstr* [[U_PRIV]], i32 0, i32 1 ; IS__CGSCC_NPM-NEXT: [[Z:%.*]] = getelementptr [[STRUCT_MYSTR]], %struct.MYstr* [[U_PRIV]], i32 0, i32 1
Show All 37 Lines
; IS__TUNIT_NPM-NEXT: call void @vfu1(i8 [[TMP0]], i32 [[TMP1]]) #[[ATTR0]] ; IS__TUNIT_NPM-NEXT: call void @vfu1(i8 [[TMP0]], i32 [[TMP1]]) #[[ATTR0]]
; IS__TUNIT_NPM-NEXT: [[MYSTR_CAST1:%.*]] = bitcast %struct.MYstr* @mystr to i8* ; IS__TUNIT_NPM-NEXT: [[MYSTR_CAST1:%.*]] = bitcast %struct.MYstr* @mystr to i8*
; IS__TUNIT_NPM-NEXT: [[TMP2:%.*]] = load i8, i8* [[MYSTR_CAST1]], align 8 ; IS__TUNIT_NPM-NEXT: [[TMP2:%.*]] = load i8, i8* [[MYSTR_CAST1]], align 8
; IS__TUNIT_NPM-NEXT: [[MYSTR_0_12:%.*]] = getelementptr [[STRUCT_MYSTR]], %struct.MYstr* @mystr, i64 0, i32 1 ; IS__TUNIT_NPM-NEXT: [[MYSTR_0_12:%.*]] = getelementptr [[STRUCT_MYSTR]], %struct.MYstr* @mystr, i64 0, i32 1
; IS__TUNIT_NPM-NEXT: [[TMP3:%.*]] = load i32, i32* [[MYSTR_0_12]], align 8 ; IS__TUNIT_NPM-NEXT: [[TMP3:%.*]] = load i32, i32* [[MYSTR_0_12]], align 8
; IS__TUNIT_NPM-NEXT: [[RESULT:%.*]] = call i32 @vfu2_v2(i8 [[TMP2]], i32 [[TMP3]]) #[[ATTR2]] ; IS__TUNIT_NPM-NEXT: [[RESULT:%.*]] = call i32 @vfu2_v2(i8 [[TMP2]], i32 [[TMP3]]) #[[ATTR2]]
; IS__TUNIT_NPM-NEXT: ret i32 [[RESULT]] ; IS__TUNIT_NPM-NEXT: ret i32 [[RESULT]]
; ;
; IS__CGSCC_OPM: Function Attrs: nounwind ; IS__CGSCC_OPM: Function Attrs: norecurse nounwind
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@unions_v2 ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@unions_v2
; IS__CGSCC_OPM-SAME: () #[[ATTR0]] { ; IS__CGSCC_OPM-SAME: () #[[ATTR0]] {
; IS__CGSCC_OPM-NEXT: entry: ; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: call void @vfu1(%struct.MYstr* noalias nocapture nofree noundef nonnull readonly byval([[STRUCT_MYSTR:%.*]]) align 8 dereferenceable(8) @mystr) #[[ATTR0]] ; IS__CGSCC_OPM-NEXT: call void @vfu1(%struct.MYstr* noalias nocapture nofree noundef nonnull readonly byval([[STRUCT_MYSTR:%.*]]) align 8 dereferenceable(8) @mystr) #[[ATTR2]]
; IS__CGSCC_OPM-NEXT: [[RESULT:%.*]] = call i32 @vfu2_v2(%struct.MYstr* noalias nocapture nofree noundef nonnull readonly byval([[STRUCT_MYSTR]]) align 8 dereferenceable(8) @mystr) #[[ATTR0]] ; IS__CGSCC_OPM-NEXT: [[RESULT:%.*]] = call i32 @vfu2_v2(%struct.MYstr* noalias nocapture nofree noundef nonnull readonly byval([[STRUCT_MYSTR]]) align 8 dereferenceable(8) @mystr) #[[ATTR3]]
; IS__CGSCC_OPM-NEXT: ret i32 [[RESULT]] ; IS__CGSCC_OPM-NEXT: ret i32 [[RESULT]]
; ;
; IS__CGSCC_NPM: Function Attrs: nounwind ; IS__CGSCC_NPM: Function Attrs: norecurse nounwind
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@unions_v2 ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@unions_v2
; IS__CGSCC_NPM-SAME: () #[[ATTR0]] { ; IS__CGSCC_NPM-SAME: () #[[ATTR0]] {
; IS__CGSCC_NPM-NEXT: entry: ; IS__CGSCC_NPM-NEXT: entry:
; IS__CGSCC_NPM-NEXT: call void @vfu1(i8 noundef 0, i32 undef) #[[ATTR0]] ; IS__CGSCC_NPM-NEXT: call void @vfu1(i8 noundef 0, i32 undef) #[[ATTR2]]
; IS__CGSCC_NPM-NEXT: ret i32 99 ; IS__CGSCC_NPM-NEXT: ret i32 99
; ;
entry: entry:
call void @vfu1(%struct.MYstr* byval(%struct.MYstr) align 4 @mystr) nounwind call void @vfu1(%struct.MYstr* byval(%struct.MYstr) align 4 @mystr) nounwind
%result = call i32 @vfu2_v2(%struct.MYstr* byval(%struct.MYstr) align 4 @mystr) nounwind %result = call i32 @vfu2_v2(%struct.MYstr* byval(%struct.MYstr) align 4 @mystr) nounwind
ret i32 %result ret i32 %result
} }
;. ;.
; IS__TUNIT____: attributes #[[ATTR0:[0-9]+]] = { nounwind } ; IS__TUNIT____: attributes #[[ATTR0:[0-9]+]] = { nounwind }
; IS__TUNIT____: attributes #[[ATTR1:[0-9]+]] = { argmemonly nofree nosync nounwind readonly willreturn } ; IS__TUNIT____: attributes #[[ATTR1:[0-9]+]] = { argmemonly nofree norecurse nosync nounwind readonly willreturn }
; IS__TUNIT____: attributes #[[ATTR2:[0-9]+]] = { nounwind readonly } ; IS__TUNIT____: attributes #[[ATTR2:[0-9]+]] = { nounwind readonly }
;. ;.
; IS__CGSCC_OPM: attributes #[[ATTR0]] = { nounwind } ; IS__CGSCC_OPM: attributes #[[ATTR0]] = { norecurse nounwind }
; IS__CGSCC_OPM: attributes #[[ATTR1]] = { argmemonly nofree norecurse nosync nounwind readonly willreturn } ; IS__CGSCC_OPM: attributes #[[ATTR1]] = { argmemonly nofree norecurse nosync nounwind readonly willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR2]] = { nounwind }
; IS__CGSCC_OPM: attributes #[[ATTR3]] = { nounwind readonly }
;. ;.
; IS__CGSCC_NPM: attributes #[[ATTR0]] = { nounwind } ; IS__CGSCC_NPM: attributes #[[ATTR0]] = { norecurse nounwind }
; IS__CGSCC_NPM: attributes #[[ATTR1]] = { nofree norecurse nosync nounwind readnone willreturn } ; IS__CGSCC_NPM: attributes #[[ATTR1]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__CGSCC_NPM: attributes #[[ATTR2]] = { nounwind }
; IS__CGSCC_NPM: attributes #[[ATTR3]] = { nounwind readonly }
;. ;.

llvm/test/Transforms/Attributor/IPConstantProp/PR16052.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals
; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM ; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM
; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM ; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu" target triple = "x86_64-unknown-linux-gnu"
define i64 @fn2() { define i64 @fn2() {
; ;
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__TUNIT____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@fn2 ; IS__TUNIT____-LABEL: define {{[^@]+}}@fn2
; IS__TUNIT____-SAME: () #[[ATTR0:[0-9]+]] { ; IS__TUNIT____-SAME: () #[[ATTR0:[0-9]+]] {
; IS__TUNIT____-NEXT: entry: ; IS__TUNIT____-NEXT: entry:
; IS__TUNIT____-NEXT: ret i64 poison ; IS__TUNIT____-NEXT: ret i64 poison
; ;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@fn2 ; IS__CGSCC____-LABEL: define {{[^@]+}}@fn2
; IS__CGSCC____-SAME: () #[[ATTR0:[0-9]+]] { ; IS__CGSCC____-SAME: () #[[ATTR0:[0-9]+]] {
; IS__CGSCC____-NEXT: entry: ; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: [[CONV:%.*]] = sext i32 undef to i64 ; IS__CGSCC____-NEXT: [[CONV:%.*]] = sext i32 undef to i64
; IS__CGSCC____-NEXT: [[DIV:%.*]] = sdiv i64 8, 0 ; IS__CGSCC____-NEXT: [[DIV:%.*]] = sdiv i64 8, 0
; IS__CGSCC____-NEXT: ret i64 poison ; IS__CGSCC____-NEXT: ret i64 poison
; ;
entry: entry:
%conv = sext i32 undef to i64 %conv = sext i32 undef to i64
%div = sdiv i64 8, %conv %div = sdiv i64 8, %conv
%call2 = call i64 @fn1(i64 %div) %call2 = call i64 @fn1(i64 %div)
ret i64 %call2 ret i64 %call2
} }
define i64 @fn2b(i32 %arg) { define i64 @fn2b(i32 %arg) {
; ;
; IS__TUNIT_OPM: Function Attrs: nofree nosync nounwind readnone willreturn ; IS________OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@fn2b ; IS________OPM-LABEL: define {{[^@]+}}@fn2b
; IS__TUNIT_OPM-SAME: (i32 [[ARG:%.*]]) #[[ATTR0]] { ; IS________OPM-SAME: (i32 [[ARG:%.*]]) #[[ATTR0]] {
; IS__TUNIT_OPM-NEXT: entry: ; IS________OPM-NEXT: entry:
; IS__TUNIT_OPM-NEXT: [[CONV:%.*]] = sext i32 [[ARG]] to i64 ; IS________OPM-NEXT: [[CONV:%.*]] = sext i32 [[ARG]] to i64
; IS__TUNIT_OPM-NEXT: [[DIV:%.*]] = sdiv i64 8, [[CONV]] ; IS________OPM-NEXT: [[DIV:%.*]] = sdiv i64 8, [[CONV]]
; IS__TUNIT_OPM-NEXT: [[CALL2:%.*]] = call i64 @fn1(i64 [[DIV]]) #[[ATTR0]] ; IS________OPM-NEXT: [[CALL2:%.*]] = call i64 @fn1(i64 [[DIV]]) #[[ATTR1:[0-9]+]]
; IS__TUNIT_OPM-NEXT: ret i64 [[CALL2]] ; IS________OPM-NEXT: ret i64 [[CALL2]]
; ;
; IS__TUNIT_NPM: Function Attrs: nofree nosync nounwind readnone willreturn ; IS________NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@fn2b ; IS________NPM-LABEL: define {{[^@]+}}@fn2b
; IS__TUNIT_NPM-SAME: (i32 [[ARG:%.*]]) #[[ATTR0]] { ; IS________NPM-SAME: (i32 [[ARG:%.*]]) #[[ATTR0]] {
; IS__TUNIT_NPM-NEXT: entry: ; IS________NPM-NEXT: entry:
; IS__TUNIT_NPM-NEXT: [[CONV:%.*]] = sext i32 [[ARG]] to i64 ; IS________NPM-NEXT: [[CONV:%.*]] = sext i32 [[ARG]] to i64
; IS__TUNIT_NPM-NEXT: [[DIV:%.*]] = sdiv i64 8, [[CONV]] ; IS________NPM-NEXT: [[DIV:%.*]] = sdiv i64 8, [[CONV]]
; IS__TUNIT_NPM-NEXT: ret i64 [[DIV]] ; IS________NPM-NEXT: ret i64 [[DIV]]
;
; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@fn2b
; IS__CGSCC_OPM-SAME: (i32 [[ARG:%.*]]) #[[ATTR0]] {
; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: [[CONV:%.*]] = sext i32 [[ARG]] to i64
; IS__CGSCC_OPM-NEXT: [[DIV:%.*]] = sdiv i64 8, [[CONV]]
; IS__CGSCC_OPM-NEXT: [[CALL2:%.*]] = call i64 @fn1(i64 [[DIV]]) #[[ATTR1:[0-9]+]]
; IS__CGSCC_OPM-NEXT: ret i64 [[CALL2]]
;
; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@fn2b
; IS__CGSCC_NPM-SAME: (i32 [[ARG:%.*]]) #[[ATTR0]] {
; IS__CGSCC_NPM-NEXT: entry:
; IS__CGSCC_NPM-NEXT: [[CONV:%.*]] = sext i32 [[ARG]] to i64
; IS__CGSCC_NPM-NEXT: [[DIV:%.*]] = sdiv i64 8, [[CONV]]
; IS__CGSCC_NPM-NEXT: ret i64 [[DIV]]
; ;
entry: entry:
%conv = sext i32 %arg to i64 %conv = sext i32 %arg to i64
%div = sdiv i64 8, %conv %div = sdiv i64 8, %conv
%call2 = call i64 @fn1(i64 %div) %call2 = call i64 @fn1(i64 %div)
ret i64 %call2 ret i64 %call2
} }
define i64 @fn2c() { define i64 @fn2c() {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__TUNIT____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@fn2c ; IS__TUNIT____-LABEL: define {{[^@]+}}@fn2c
; IS__TUNIT____-SAME: () #[[ATTR0]] { ; IS__TUNIT____-SAME: () #[[ATTR0]] {
; IS__TUNIT____-NEXT: entry: ; IS__TUNIT____-NEXT: entry:
; IS__TUNIT____-NEXT: ret i64 42 ; IS__TUNIT____-NEXT: ret i64 42
; ;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@fn2c ; IS__CGSCC____-LABEL: define {{[^@]+}}@fn2c
; IS__CGSCC____-SAME: () #[[ATTR0]] { ; IS__CGSCC____-SAME: () #[[ATTR0]] {
; IS__CGSCC____-NEXT: entry: ; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: [[CONV:%.*]] = sext i32 undef to i64 ; IS__CGSCC____-NEXT: [[CONV:%.*]] = sext i32 undef to i64
; IS__CGSCC____-NEXT: [[ADD:%.*]] = add i64 42, 0 ; IS__CGSCC____-NEXT: [[ADD:%.*]] = add i64 42, 0
; IS__CGSCC____-NEXT: ret i64 42 ; IS__CGSCC____-NEXT: ret i64 42
; ;
entry: entry:
%conv = sext i32 undef to i64 %conv = sext i32 undef to i64
%add = add i64 42, %conv %add = add i64 42, %conv
%call2 = call i64 @fn1(i64 %add) %call2 = call i64 @fn1(i64 %add)
ret i64 %call2 ret i64 %call2
} }
define internal i64 @fn1(i64 %p1) { define internal i64 @fn1(i64 %p1) {
; IS__TUNIT_OPM: Function Attrs: nofree nosync nounwind readnone willreturn ; IS________OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@fn1 ; IS________OPM-LABEL: define {{[^@]+}}@fn1
; IS__TUNIT_OPM-SAME: (i64 returned [[P1:%.*]]) #[[ATTR0]] { ; IS________OPM-SAME: (i64 returned [[P1:%.*]]) #[[ATTR0]] {
; IS__TUNIT_OPM-NEXT: entry: ; IS________OPM-NEXT: entry:
; IS__TUNIT_OPM-NEXT: ret i64 [[P1]] ; IS________OPM-NEXT: ret i64 [[P1]]
;
; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@fn1
; IS__CGSCC_OPM-SAME: (i64 returned [[P1:%.*]]) #[[ATTR0]] {
; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: ret i64 [[P1]]
; ;
; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@fn1 ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@fn1
; IS__CGSCC_NPM-SAME: (i64 [[P1:%.*]]) #[[ATTR0]] { ; IS__CGSCC_NPM-SAME: (i64 [[P1:%.*]]) #[[ATTR0]] {
; IS__CGSCC_NPM-NEXT: entry: ; IS__CGSCC_NPM-NEXT: entry:
; IS__CGSCC_NPM-NEXT: ret i64 undef ; IS__CGSCC_NPM-NEXT: ret i64 undef
; ;
entry: entry:
%tobool = icmp ne i64 %p1, 0 %tobool = icmp ne i64 %p1, 0
%cond = select i1 %tobool, i64 %p1, i64 %p1 %cond = select i1 %tobool, i64 %p1, i64 %p1
ret i64 %cond ret i64 %cond
} }
;. ;.
; IS__TUNIT____: attributes #[[ATTR0]] = { nofree nosync nounwind readnone willreturn } ; IS__TUNIT_OPM: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__TUNIT_OPM: attributes #[[ATTR1]] = { nofree nosync nounwind readnone willreturn }
;.
; IS________NPM: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn }
;. ;.
; IS__CGSCC_OPM: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn } ; IS__CGSCC_OPM: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR1]] = { readnone willreturn } ; IS__CGSCC_OPM: attributes #[[ATTR1]] = { readnone willreturn }
;. ;.
; IS__CGSCC_NPM: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn }
;.

llvm/test/Transforms/Attributor/IPConstantProp/PR26044.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals
; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=8 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM ; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=8 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=8 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=8 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM
; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM ; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu" target triple = "x86_64-unknown-linux-gnu"
define void @fn2(i32* %P, i1 %C) { define void @fn2(i32* %P, i1 %C) {
; ;
; IS__TUNIT_OPM: Function Attrs: argmemonly nofree nosync nounwind ; IS__TUNIT_OPM: Function Attrs: argmemonly nofree norecurse nosync nounwind
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@fn2 ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@fn2
; IS__TUNIT_OPM-SAME: (i32* nocapture nofree [[P:%.*]], i1 [[C:%.*]]) #[[ATTR0:[0-9]+]] { ; IS__TUNIT_OPM-SAME: (i32* nocapture nofree [[P:%.*]], i1 [[C:%.*]]) #[[ATTR0:[0-9]+]] {
; IS__TUNIT_OPM-NEXT: entry: ; IS__TUNIT_OPM-NEXT: entry:
; IS__TUNIT_OPM-NEXT: br label [[IF_END:%.*]] ; IS__TUNIT_OPM-NEXT: br label [[IF_END:%.*]]
; IS__TUNIT_OPM: for.cond1: ; IS__TUNIT_OPM: for.cond1:
; IS__TUNIT_OPM-NEXT: br i1 [[C]], label [[IF_END]], label [[EXIT:%.*]] ; IS__TUNIT_OPM-NEXT: br i1 [[C]], label [[IF_END]], label [[EXIT:%.*]]
; IS__TUNIT_OPM: if.end: ; IS__TUNIT_OPM: if.end:
; IS__TUNIT_OPM-NEXT: [[E_2:%.*]] = phi i32* [ [[P]], [[ENTRY:%.*]] ], [ null, [[FOR_COND1:%.*]] ] ; IS__TUNIT_OPM-NEXT: [[E_2:%.*]] = phi i32* [ [[P]], [[ENTRY:%.*]] ], [ null, [[FOR_COND1:%.*]] ]
; IS__TUNIT_OPM-NEXT: [[TMP0:%.*]] = load i32, i32* [[E_2]], align 4 ; IS__TUNIT_OPM-NEXT: [[TMP0:%.*]] = load i32, i32* [[E_2]], align 4
; IS__TUNIT_OPM-NEXT: [[CALL:%.*]] = call i32 @fn1(i32 [[TMP0]]) #[[ATTR3:[0-9]+]] ; IS__TUNIT_OPM-NEXT: [[CALL:%.*]] = call i32 @fn1(i32 [[TMP0]]) #[[ATTR3:[0-9]+]]
; IS__TUNIT_OPM-NEXT: store i32 [[CALL]], i32* [[P]], align 4 ; IS__TUNIT_OPM-NEXT: store i32 [[CALL]], i32* [[P]], align 4
; IS__TUNIT_OPM-NEXT: br label [[FOR_COND1]] ; IS__TUNIT_OPM-NEXT: br label [[FOR_COND1]]
; IS__TUNIT_OPM: exit: ; IS__TUNIT_OPM: exit:
; IS__TUNIT_OPM-NEXT: ret void ; IS__TUNIT_OPM-NEXT: ret void
; ;
; IS__TUNIT_NPM: Function Attrs: argmemonly nofree nosync nounwind ; IS__TUNIT_NPM: Function Attrs: argmemonly nofree norecurse nosync nounwind
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@fn2 ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@fn2
; IS__TUNIT_NPM-SAME: (i32* nocapture nofree [[P:%.*]], i1 [[C:%.*]]) #[[ATTR0:[0-9]+]] { ; IS__TUNIT_NPM-SAME: (i32* nocapture nofree [[P:%.*]], i1 [[C:%.*]]) #[[ATTR0:[0-9]+]] {
; IS__TUNIT_NPM-NEXT: entry: ; IS__TUNIT_NPM-NEXT: entry:
; IS__TUNIT_NPM-NEXT: br label [[IF_END:%.*]] ; IS__TUNIT_NPM-NEXT: br label [[IF_END:%.*]]
; IS__TUNIT_NPM: for.cond1: ; IS__TUNIT_NPM: for.cond1:
; IS__TUNIT_NPM-NEXT: br i1 [[C]], label [[IF_END]], label [[EXIT:%.*]] ; IS__TUNIT_NPM-NEXT: br i1 [[C]], label [[IF_END]], label [[EXIT:%.*]]
; IS__TUNIT_NPM: if.end: ; IS__TUNIT_NPM: if.end:
; IS__TUNIT_NPM-NEXT: [[E_2:%.*]] = phi i32* [ [[P]], [[ENTRY:%.*]] ], [ null, [[FOR_COND1:%.*]] ] ; IS__TUNIT_NPM-NEXT: [[E_2:%.*]] = phi i32* [ [[P]], [[ENTRY:%.*]] ], [ null, [[FOR_COND1:%.*]] ]
; IS__TUNIT_NPM-NEXT: [[TMP0:%.*]] = load i32, i32* [[E_2]], align 4 ; IS__TUNIT_NPM-NEXT: [[TMP0:%.*]] = load i32, i32* [[E_2]], align 4
; IS__TUNIT_NPM-NEXT: store i32 [[TMP0]], i32* [[P]], align 4 ; IS__TUNIT_NPM-NEXT: store i32 [[TMP0]], i32* [[P]], align 4
; IS__TUNIT_NPM-NEXT: br label [[FOR_COND1]] ; IS__TUNIT_NPM-NEXT: br label [[FOR_COND1]]
; IS__TUNIT_NPM: exit: ; IS__TUNIT_NPM: exit:
; IS__TUNIT_NPM-NEXT: ret void ; IS__TUNIT_NPM-NEXT: ret void
; ;
; IS__CGSCC_OPM: Function Attrs: argmemonly nofree norecurse nosync nounwind ; IS__CGSCC_OPM: Function Attrs: argmemonly nofree norecurse nosync nounwind
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@fn2 ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@fn2
; IS__CGSCC_OPM-SAME: (i32* nocapture nofree nonnull align 4 dereferenceable(4) [[P:%.*]], i1 [[C:%.*]]) #[[ATTR0:[0-9]+]] { ; IS__CGSCC_OPM-SAME: (i32* nocapture nofree nonnull align 4 dereferenceable(4) [[P:%.*]], i1 [[C:%.*]]) #[[ATTR0:[0-9]+]] {
; IS__CGSCC_OPM-NEXT: entry: ; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: br label [[IF_END:%.*]] ; IS__CGSCC_OPM-NEXT: br label [[IF_END:%.*]]
; IS__CGSCC_OPM: for.cond1: ; IS__CGSCC_OPM: for.cond1:
; IS__CGSCC_OPM-NEXT: br i1 [[C]], label [[IF_END]], label [[EXIT:%.*]] ; IS__CGSCC_OPM-NEXT: br i1 [[C]], label [[IF_END]], label [[EXIT:%.*]]
; IS__CGSCC_OPM: if.end: ; IS__CGSCC_OPM: if.end:
; IS__CGSCC_OPM-NEXT: [[E_2:%.*]] = phi i32* [ [[P]], [[ENTRY:%.*]] ], [ null, [[FOR_COND1:%.*]] ] ; IS__CGSCC_OPM-NEXT: [[E_2:%.*]] = phi i32* [ [[P]], [[ENTRY:%.*]] ], [ null, [[FOR_COND1:%.*]] ]
; IS__CGSCC_OPM-NEXT: [[TMP0:%.*]] = load i32, i32* [[E_2]], align 4 ; IS__CGSCC_OPM-NEXT: [[TMP0:%.*]] = load i32, i32* [[E_2]], align 4
; IS__CGSCC_OPM-NEXT: [[CALL:%.*]] = call i32 @fn1(i32 [[TMP0]]) ; IS__CGSCC_OPM-NEXT: [[CALL:%.*]] = call i32 @fn1(i32 [[TMP0]]) #[[ATTR3:[0-9]+]]
; IS__CGSCC_OPM-NEXT: store i32 [[CALL]], i32* [[P]], align 4 ; IS__CGSCC_OPM-NEXT: store i32 [[CALL]], i32* [[P]], align 4
; IS__CGSCC_OPM-NEXT: br label [[FOR_COND1]] ; IS__CGSCC_OPM-NEXT: br label [[FOR_COND1]]
; IS__CGSCC_OPM: exit: ; IS__CGSCC_OPM: exit:
; IS__CGSCC_OPM-NEXT: ret void ; IS__CGSCC_OPM-NEXT: ret void
; ;
; IS__CGSCC_NPM: Function Attrs: argmemonly nofree norecurse nosync nounwind ; IS__CGSCC_NPM: Function Attrs: argmemonly nofree norecurse nosync nounwind
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@fn2 ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@fn2
; IS__CGSCC_NPM-SAME: (i32* nocapture nofree nonnull align 4 dereferenceable(4) [[P:%.*]], i1 [[C:%.*]]) #[[ATTR0:[0-9]+]] { ; IS__CGSCC_NPM-SAME: (i32* nocapture nofree nonnull align 4 dereferenceable(4) [[P:%.*]], i1 [[C:%.*]]) #[[ATTR0:[0-9]+]] {
Show All 21 Linesif.end: ; preds = %entry, %for.cond1
%call = call i32 @fn1(i32 %0) %call = call i32 @fn1(i32 %0)
store i32 %call, i32* %P store i32 %call, i32* %P
br label %for.cond1 br label %for.cond1
exit: exit:
ret void ret void
} }
define internal i32 @fn1(i32 %p1) { define internal i32 @fn1(i32 %p1) {
; IS__TUNIT_OPM: Function Attrs: nofree nosync nounwind readnone willreturn ; IS________OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@fn1 ; IS________OPM-LABEL: define {{[^@]+}}@fn1
; IS__TUNIT_OPM-SAME: (i32 returned [[P1:%.*]]) #[[ATTR1:[0-9]+]] { ; IS________OPM-SAME: (i32 returned [[P1:%.*]]) #[[ATTR1:[0-9]+]] {
; IS__TUNIT_OPM-NEXT: entry: ; IS________OPM-NEXT: entry:
; IS__TUNIT_OPM-NEXT: ret i32 [[P1]] ; IS________OPM-NEXT: ret i32 [[P1]]
;
; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@fn1
; IS__CGSCC_OPM-SAME: (i32 returned [[P1:%.*]]) #[[ATTR1:[0-9]+]] {
; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: ret i32 [[P1]]
; ;
; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@fn1 ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@fn1
; IS__CGSCC_NPM-SAME: (i32 [[P1:%.*]]) #[[ATTR1:[0-9]+]] { ; IS__CGSCC_NPM-SAME: (i32 [[P1:%.*]]) #[[ATTR1:[0-9]+]] {
; IS__CGSCC_NPM-NEXT: entry: ; IS__CGSCC_NPM-NEXT: entry:
; IS__CGSCC_NPM-NEXT: ret i32 undef ; IS__CGSCC_NPM-NEXT: ret i32 undef
; ;
entry: entry:
%tobool = icmp ne i32 %p1, 0 %tobool = icmp ne i32 %p1, 0
%cond = select i1 %tobool, i32 %p1, i32 %p1 %cond = select i1 %tobool, i32 %p1, i32 %p1
ret i32 %cond ret i32 %cond
} }
define void @fn_no_null_opt(i32* %P, i1 %C) null_pointer_is_valid { define void @fn_no_null_opt(i32* %P, i1 %C) null_pointer_is_valid {
; ;
; IS__TUNIT_OPM: Function Attrs: nofree nosync nounwind null_pointer_is_valid ; IS__TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind null_pointer_is_valid
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@fn_no_null_opt ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@fn_no_null_opt
; IS__TUNIT_OPM-SAME: (i32* nocapture nofree writeonly [[P:%.*]], i1 [[C:%.*]]) #[[ATTR2:[0-9]+]] { ; IS__TUNIT_OPM-SAME: (i32* nocapture nofree writeonly [[P:%.*]], i1 [[C:%.*]]) #[[ATTR2:[0-9]+]] {
; IS__TUNIT_OPM-NEXT: entry: ; IS__TUNIT_OPM-NEXT: entry:
; IS__TUNIT_OPM-NEXT: br label [[IF_END:%.*]] ; IS__TUNIT_OPM-NEXT: br label [[IF_END:%.*]]
; IS__TUNIT_OPM: for.cond1: ; IS__TUNIT_OPM: for.cond1:
; IS__TUNIT_OPM-NEXT: br i1 [[C]], label [[IF_END]], label [[EXIT:%.*]] ; IS__TUNIT_OPM-NEXT: br i1 [[C]], label [[IF_END]], label [[EXIT:%.*]]
; IS__TUNIT_OPM: if.end: ; IS__TUNIT_OPM: if.end:
; IS__TUNIT_OPM-NEXT: [[E_2:%.*]] = phi i32* [ undef, [[ENTRY:%.*]] ], [ null, [[FOR_COND1:%.*]] ] ; IS__TUNIT_OPM-NEXT: [[E_2:%.*]] = phi i32* [ undef, [[ENTRY:%.*]] ], [ null, [[FOR_COND1:%.*]] ]
; IS__TUNIT_OPM-NEXT: [[TMP0:%.*]] = load i32, i32* null, align 4 ; IS__TUNIT_OPM-NEXT: [[TMP0:%.*]] = load i32, i32* null, align 4
; IS__TUNIT_OPM-NEXT: [[CALL:%.*]] = call i32 @fn0(i32 [[TMP0]]) #[[ATTR3]] ; IS__TUNIT_OPM-NEXT: [[CALL:%.*]] = call i32 @fn0(i32 [[TMP0]]) #[[ATTR3]]
; IS__TUNIT_OPM-NEXT: store i32 [[CALL]], i32* [[P]], align 4 ; IS__TUNIT_OPM-NEXT: store i32 [[CALL]], i32* [[P]], align 4
; IS__TUNIT_OPM-NEXT: br label [[FOR_COND1]] ; IS__TUNIT_OPM-NEXT: br label [[FOR_COND1]]
; IS__TUNIT_OPM: exit: ; IS__TUNIT_OPM: exit:
; IS__TUNIT_OPM-NEXT: ret void ; IS__TUNIT_OPM-NEXT: ret void
; ;
; IS__TUNIT_NPM: Function Attrs: nofree nosync nounwind null_pointer_is_valid ; IS__TUNIT_NPM: Function Attrs: nofree norecurse nosync nounwind null_pointer_is_valid
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@fn_no_null_opt ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@fn_no_null_opt
; IS__TUNIT_NPM-SAME: (i32* nocapture nofree writeonly [[P:%.*]], i1 [[C:%.*]]) #[[ATTR1:[0-9]+]] { ; IS__TUNIT_NPM-SAME: (i32* nocapture nofree writeonly [[P:%.*]], i1 [[C:%.*]]) #[[ATTR1:[0-9]+]] {
; IS__TUNIT_NPM-NEXT: entry: ; IS__TUNIT_NPM-NEXT: entry:
; IS__TUNIT_NPM-NEXT: br label [[IF_END:%.*]] ; IS__TUNIT_NPM-NEXT: br label [[IF_END:%.*]]
; IS__TUNIT_NPM: for.cond1: ; IS__TUNIT_NPM: for.cond1:
; IS__TUNIT_NPM-NEXT: br i1 [[C]], label [[IF_END]], label [[EXIT:%.*]] ; IS__TUNIT_NPM-NEXT: br i1 [[C]], label [[IF_END]], label [[EXIT:%.*]]
; IS__TUNIT_NPM: if.end: ; IS__TUNIT_NPM: if.end:
; IS__TUNIT_NPM-NEXT: [[E_2:%.*]] = phi i32* [ undef, [[ENTRY:%.*]] ], [ null, [[FOR_COND1:%.*]] ] ; IS__TUNIT_NPM-NEXT: [[E_2:%.*]] = phi i32* [ undef, [[ENTRY:%.*]] ], [ null, [[FOR_COND1:%.*]] ]
; IS__TUNIT_NPM-NEXT: [[TMP0:%.*]] = load i32, i32* null, align 4 ; IS__TUNIT_NPM-NEXT: [[TMP0:%.*]] = load i32, i32* null, align 4
; IS__TUNIT_NPM-NEXT: store i32 [[TMP0]], i32* [[P]], align 4 ; IS__TUNIT_NPM-NEXT: store i32 [[TMP0]], i32* [[P]], align 4
; IS__TUNIT_NPM-NEXT: br label [[FOR_COND1]] ; IS__TUNIT_NPM-NEXT: br label [[FOR_COND1]]
; IS__TUNIT_NPM: exit: ; IS__TUNIT_NPM: exit:
; IS__TUNIT_NPM-NEXT: ret void ; IS__TUNIT_NPM-NEXT: ret void
; ;
; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind null_pointer_is_valid ; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind null_pointer_is_valid
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@fn_no_null_opt ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@fn_no_null_opt
; IS__CGSCC_OPM-SAME: (i32* nocapture nofree writeonly align 4 dereferenceable_or_null(4) [[P:%.*]], i1 [[C:%.*]]) #[[ATTR2:[0-9]+]] { ; IS__CGSCC_OPM-SAME: (i32* nocapture nofree writeonly align 4 dereferenceable_or_null(4) [[P:%.*]], i1 [[C:%.*]]) #[[ATTR2:[0-9]+]] {
; IS__CGSCC_OPM-NEXT: entry: ; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: br label [[IF_END:%.*]] ; IS__CGSCC_OPM-NEXT: br label [[IF_END:%.*]]
; IS__CGSCC_OPM: for.cond1: ; IS__CGSCC_OPM: for.cond1:
; IS__CGSCC_OPM-NEXT: br i1 [[C]], label [[IF_END]], label [[EXIT:%.*]] ; IS__CGSCC_OPM-NEXT: br i1 [[C]], label [[IF_END]], label [[EXIT:%.*]]
; IS__CGSCC_OPM: if.end: ; IS__CGSCC_OPM: if.end:
; IS__CGSCC_OPM-NEXT: [[E_2:%.*]] = phi i32* [ undef, [[ENTRY:%.*]] ], [ null, [[FOR_COND1:%.*]] ] ; IS__CGSCC_OPM-NEXT: [[E_2:%.*]] = phi i32* [ undef, [[ENTRY:%.*]] ], [ null, [[FOR_COND1:%.*]] ]
; IS__CGSCC_OPM-NEXT: [[TMP0:%.*]] = load i32, i32* null, align 4294967296 ; IS__CGSCC_OPM-NEXT: [[TMP0:%.*]] = load i32, i32* null, align 4294967296
; IS__CGSCC_OPM-NEXT: [[CALL:%.*]] = call i32 @fn0(i32 [[TMP0]]) ; IS__CGSCC_OPM-NEXT: [[CALL:%.*]] = call i32 @fn0(i32 [[TMP0]]) #[[ATTR3]]
; IS__CGSCC_OPM-NEXT: store i32 [[CALL]], i32* [[P]], align 4 ; IS__CGSCC_OPM-NEXT: store i32 [[CALL]], i32* [[P]], align 4
; IS__CGSCC_OPM-NEXT: br label [[FOR_COND1]] ; IS__CGSCC_OPM-NEXT: br label [[FOR_COND1]]
; IS__CGSCC_OPM: exit: ; IS__CGSCC_OPM: exit:
; IS__CGSCC_OPM-NEXT: ret void ; IS__CGSCC_OPM-NEXT: ret void
; ;
; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind null_pointer_is_valid ; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind null_pointer_is_valid
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@fn_no_null_opt ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@fn_no_null_opt
; IS__CGSCC_NPM-SAME: (i32* nocapture nofree writeonly align 4 dereferenceable_or_null(4) [[P:%.*]], i1 [[C:%.*]]) #[[ATTR2:[0-9]+]] { ; IS__CGSCC_NPM-SAME: (i32* nocapture nofree writeonly align 4 dereferenceable_or_null(4) [[P:%.*]], i1 [[C:%.*]]) #[[ATTR2:[0-9]+]] {
Show All 21 Linesif.end: ; preds = %entry, %for.cond1
%call = call i32 @fn0(i32 %0) %call = call i32 @fn0(i32 %0)
store i32 %call, i32* %P store i32 %call, i32* %P
br label %for.cond1 br label %for.cond1
exit: exit:
ret void ret void
} }
define internal i32 @fn0(i32 %p1) { define internal i32 @fn0(i32 %p1) {
; IS__TUNIT_OPM: Function Attrs: nofree nosync nounwind readnone willreturn ; IS________OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@fn0 ; IS________OPM-LABEL: define {{[^@]+}}@fn0
; IS__TUNIT_OPM-SAME: (i32 returned [[P1:%.*]]) #[[ATTR1]] { ; IS________OPM-SAME: (i32 returned [[P1:%.*]]) #[[ATTR1]] {
; IS__TUNIT_OPM-NEXT: entry: ; IS________OPM-NEXT: entry:
; IS__TUNIT_OPM-NEXT: ret i32 [[P1]] ; IS________OPM-NEXT: ret i32 [[P1]]
;
; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@fn0
; IS__CGSCC_OPM-SAME: (i32 returned [[P1:%.*]]) #[[ATTR1]] {
; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: ret i32 [[P1]]
; ;
; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@fn0 ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@fn0
; IS__CGSCC_NPM-SAME: (i32 [[P1:%.*]]) #[[ATTR1]] { ; IS__CGSCC_NPM-SAME: (i32 [[P1:%.*]]) #[[ATTR1]] {
; IS__CGSCC_NPM-NEXT: entry: ; IS__CGSCC_NPM-NEXT: entry:
; IS__CGSCC_NPM-NEXT: ret i32 undef ; IS__CGSCC_NPM-NEXT: ret i32 undef
; ;
entry: entry:
%tobool = icmp ne i32 %p1, 0 %tobool = icmp ne i32 %p1, 0
%cond = select i1 %tobool, i32 %p1, i32 %p1 %cond = select i1 %tobool, i32 %p1, i32 %p1
ret i32 %cond ret i32 %cond
} }
;. ;.
; IS__TUNIT_OPM: attributes #[[ATTR0]] = { argmemonly nofree nosync nounwind } ; IS__TUNIT_OPM: attributes #[[ATTR0]] = { argmemonly nofree norecurse nosync nounwind }
; IS__TUNIT_OPM: attributes #[[ATTR1]] = { nofree nosync nounwind readnone willreturn } ; IS__TUNIT_OPM: attributes #[[ATTR1]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__TUNIT_OPM: attributes #[[ATTR2]] = { nofree nosync nounwind null_pointer_is_valid } ; IS__TUNIT_OPM: attributes #[[ATTR2]] = { nofree norecurse nosync nounwind null_pointer_is_valid }
; IS__TUNIT_OPM: attributes #[[ATTR3]] = { nofree nosync nounwind readnone } ; IS__TUNIT_OPM: attributes #[[ATTR3]] = { nofree nosync nounwind readnone }
;. ;.
; IS__TUNIT_NPM: attributes #[[ATTR0]] = { argmemonly nofree nosync nounwind } ; IS__TUNIT_NPM: attributes #[[ATTR0]] = { argmemonly nofree norecurse nosync nounwind }
; IS__TUNIT_NPM: attributes #[[ATTR1]] = { nofree nosync nounwind null_pointer_is_valid } ; IS__TUNIT_NPM: attributes #[[ATTR1]] = { nofree norecurse nosync nounwind null_pointer_is_valid }
;.
; IS__CGSCC_OPM: attributes #[[ATTR0]] = { argmemonly nofree norecurse nosync nounwind }
; IS__CGSCC_OPM: attributes #[[ATTR1]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR2]] = { nofree norecurse nosync nounwind null_pointer_is_valid }
; IS__CGSCC_OPM: attributes #[[ATTR3]] = { nounwind readnone }
;. ;.
; IS__CGSCC____: attributes #[[ATTR0:[0-9]+]] = { argmemonly nofree norecurse nosync nounwind } ; IS__CGSCC_NPM: attributes #[[ATTR0]] = { argmemonly nofree norecurse nosync nounwind }
; IS__CGSCC____: attributes #[[ATTR1:[0-9]+]] = { nofree norecurse nosync nounwind readnone willreturn } ; IS__CGSCC_NPM: attributes #[[ATTR1]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__CGSCC____: attributes #[[ATTR2:[0-9]+]] = { nofree norecurse nosync nounwind null_pointer_is_valid } ; IS__CGSCC_NPM: attributes #[[ATTR2]] = { nofree norecurse nosync nounwind null_pointer_is_valid }
;. ;.

llvm/test/Transforms/Attributor/IPConstantProp/PR43857.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals
; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM ; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM
; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM ; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM
%struct.wobble = type { i32 } %struct.wobble = type { i32 }
%struct.zot = type { %struct.wobble, %struct.wobble, %struct.wobble } %struct.zot = type { %struct.wobble, %struct.wobble, %struct.wobble }
declare dso_local fastcc float @bar(%struct.wobble* noalias, <8 x i32>) unnamed_addr declare dso_local fastcc float @bar(%struct.wobble* noalias, <8 x i32>) unnamed_addr
define %struct.zot @widget(<8 x i32> %arg) local_unnamed_addr { define %struct.zot @widget(<8 x i32> %arg) local_unnamed_addr {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@widget ; CHECK-LABEL: define {{[^@]+}}@widget
; IS__TUNIT____-SAME: (<8 x i32> [[ARG:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] { ; CHECK-SAME: (<8 x i32> [[ARG:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] {
; IS__TUNIT____-NEXT: bb: ; CHECK-NEXT: bb:
; IS__TUNIT____-NEXT: ret [[STRUCT_ZOT:%.*]] undef ; CHECK-NEXT: ret [[STRUCT_ZOT:%.*]] undef
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@widget
; IS__CGSCC____-SAME: (<8 x i32> [[ARG:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] {
; IS__CGSCC____-NEXT: bb:
; IS__CGSCC____-NEXT: ret [[STRUCT_ZOT:%.*]] undef
; ;
bb: bb:
ret %struct.zot undef ret %struct.zot undef
} }
define void @baz(<8 x i32> %arg) local_unnamed_addr { define void @baz(<8 x i32> %arg) local_unnamed_addr {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@baz ; CHECK-LABEL: define {{[^@]+}}@baz
; IS__TUNIT____-SAME: (<8 x i32> [[ARG:%.*]]) local_unnamed_addr #[[ATTR0]] { ; CHECK-SAME: (<8 x i32> [[ARG:%.*]]) local_unnamed_addr #[[ATTR0]] {
; IS__TUNIT____-NEXT: bb: ; CHECK-NEXT: bb:
; IS__TUNIT____-NEXT: [[TMP1:%.*]] = extractvalue [[STRUCT_ZOT:%.*]] undef, 0, 0 ; CHECK-NEXT: [[TMP1:%.*]] = extractvalue [[STRUCT_ZOT:%.*]] undef, 0, 0
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@baz
; IS__CGSCC____-SAME: (<8 x i32> [[ARG:%.*]]) local_unnamed_addr #[[ATTR0]] {
; IS__CGSCC____-NEXT: bb:
; IS__CGSCC____-NEXT: [[TMP1:%.*]] = extractvalue [[STRUCT_ZOT:%.*]] undef, 0, 0
; IS__CGSCC____-NEXT: ret void
; ;
bb: bb:
%tmp = call %struct.zot @widget(<8 x i32> %arg) %tmp = call %struct.zot @widget(<8 x i32> %arg)
%tmp1 = extractvalue %struct.zot %tmp, 0, 0 %tmp1 = extractvalue %struct.zot %tmp, 0, 0
ret void ret void
} }
;. ;.
; IS__TUNIT____: attributes #[[ATTR0]] = { nofree nosync nounwind readnone willreturn } ; CHECK: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn }
;.
; IS__CGSCC____: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn }
;. ;.

llvm/test/Transforms/Attributor/IPConstantProp/arg-count-mismatch.ll

Show All 30 Lines
; Note that -lint will report this as UB, but it passes -verify. ; Note that -lint will report this as UB, but it passes -verify.
; This test is just to verify that we do not crash/assert due to mismatch in ; This test is just to verify that we do not crash/assert due to mismatch in
; argument count between the caller and callee. ; argument count between the caller and callee.
; FIXME we should recognize this as UB and make it an unreachable. ; FIXME we should recognize this as UB and make it an unreachable.
define dso_local i16 @foo(i16 %a) { define dso_local i16 @foo(i16 %a) {
; NOT_CGSCC_NPM: Function Attrs: norecurse
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@foo ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@foo
; NOT_CGSCC_NPM-SAME: (i16 [[A:%.*]]) { ; NOT_CGSCC_NPM-SAME: (i16 [[A:%.*]]) #[[ATTR0:[0-9]+]] {
; NOT_CGSCC_NPM-NEXT: [[CALL:%.*]] = call i16 bitcast (i16 (i16, i16)* @bar to i16 (i16)*)(i16 [[A]]) ; NOT_CGSCC_NPM-NEXT: [[CALL:%.*]] = call i16 bitcast (i16 (i16, i16)* @bar to i16 (i16)*)(i16 [[A]])
; NOT_CGSCC_NPM-NEXT: ret i16 [[CALL]] ; NOT_CGSCC_NPM-NEXT: ret i16 [[CALL]]
; ;
; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone ; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@foo ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@foo
; IS__CGSCC_NPM-SAME: (i16 [[A:%.*]]) #[[ATTR0:[0-9]+]] { ; IS__CGSCC_NPM-SAME: (i16 [[A:%.*]]) #[[ATTR0:[0-9]+]] {
; IS__CGSCC_NPM-NEXT: [[CALL:%.*]] = call i16 bitcast (i16 (i16, i16)* @bar to i16 (i16)*)(i16 [[A]]) ; IS__CGSCC_NPM-NEXT: [[CALL:%.*]] = call i16 bitcast (i16 (i16, i16)* @bar to i16 (i16)*)(i16 [[A]])
; IS__CGSCC_NPM-NEXT: ret i16 [[CALL]] ; IS__CGSCC_NPM-NEXT: ret i16 [[CALL]]
; ;
%call = call i16 bitcast (i16 (i16, i16) * @bar to i16 (i16) *)(i16 %a) %call = call i16 bitcast (i16 (i16, i16) * @bar to i16 (i16) *)(i16 %a)
ret i16 %call ret i16 %call
} }
define internal i16 @bar(i16 %p1, i16 %p2) { define internal i16 @bar(i16 %p1, i16 %p2) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@bar ; CHECK-LABEL: define {{[^@]+}}@bar
; IS__TUNIT____-SAME: (i16 [[P1:%.*]], i16 [[P2:%.*]]) #[[ATTR0:[0-9]+]] { ; CHECK-SAME: (i16 [[P1:%.*]], i16 [[P2:%.*]]) #[[ATTR1:[0-9]+]] {
; IS__TUNIT____-NEXT: ret i16 0 ; CHECK-NEXT: ret i16 0
;
; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@bar
; IS__CGSCC_OPM-SAME: (i16 [[P1:%.*]], i16 [[P2:%.*]]) #[[ATTR0:[0-9]+]] {
; IS__CGSCC_OPM-NEXT: ret i16 0
;
; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@bar
; IS__CGSCC_NPM-SAME: (i16 [[P1:%.*]], i16 [[P2:%.*]]) #[[ATTR1:[0-9]+]] {
; IS__CGSCC_NPM-NEXT: ret i16 0
; ;
ret i16 0 ret i16 0
} }
define dso_local i16 @foo2(i16 %a) { define dso_local i16 @foo2(i16 %a) {
; NOT_CGSCC_NPM: Function Attrs: norecurse
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@foo2 ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@foo2
; NOT_CGSCC_NPM-SAME: (i16 [[A:%.*]]) { ; NOT_CGSCC_NPM-SAME: (i16 [[A:%.*]]) #[[ATTR0]] {
; NOT_CGSCC_NPM-NEXT: [[CALL:%.*]] = call i16 bitcast (i16 (i16, i16)* @bar2 to i16 (i16)*)(i16 [[A]]) ; NOT_CGSCC_NPM-NEXT: [[CALL:%.*]] = call i16 bitcast (i16 (i16, i16)* @bar2 to i16 (i16)*)(i16 [[A]])
; NOT_CGSCC_NPM-NEXT: ret i16 [[CALL]] ; NOT_CGSCC_NPM-NEXT: ret i16 [[CALL]]
; ;
; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone ; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@foo2 ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@foo2
; IS__CGSCC_NPM-SAME: (i16 [[A:%.*]]) #[[ATTR0]] { ; IS__CGSCC_NPM-SAME: (i16 [[A:%.*]]) #[[ATTR0]] {
; IS__CGSCC_NPM-NEXT: [[CALL:%.*]] = call i16 bitcast (i16 (i16, i16)* @bar2 to i16 (i16)*)(i16 [[A]]) ; IS__CGSCC_NPM-NEXT: [[CALL:%.*]] = call i16 bitcast (i16 (i16, i16)* @bar2 to i16 (i16)*)(i16 [[A]])
; IS__CGSCC_NPM-NEXT: ret i16 [[CALL]] ; IS__CGSCC_NPM-NEXT: ret i16 [[CALL]]
; ;
%call = call i16 bitcast (i16 (i16, i16) * @bar2 to i16 (i16) *)(i16 %a) %call = call i16 bitcast (i16 (i16, i16) * @bar2 to i16 (i16) *)(i16 %a)
ret i16 %call ret i16 %call
} }
define internal i16 @bar2(i16 %p1, i16 %p2) { define internal i16 @bar2(i16 %p1, i16 %p2) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@bar2 ; CHECK-LABEL: define {{[^@]+}}@bar2
; IS__TUNIT____-SAME: (i16 [[P1:%.*]], i16 [[P2:%.*]]) #[[ATTR0]] { ; CHECK-SAME: (i16 [[P1:%.*]], i16 [[P2:%.*]]) #[[ATTR1]] {
; IS__TUNIT____-NEXT: [[A:%.*]] = add i16 [[P1]], [[P2]] ; CHECK-NEXT: [[A:%.*]] = add i16 [[P1]], [[P2]]
; IS__TUNIT____-NEXT: ret i16 [[A]] ; CHECK-NEXT: ret i16 [[A]]
;
; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@bar2
; IS__CGSCC_OPM-SAME: (i16 [[P1:%.*]], i16 [[P2:%.*]]) #[[ATTR0]] {
; IS__CGSCC_OPM-NEXT: [[A:%.*]] = add i16 [[P1]], [[P2]]
; IS__CGSCC_OPM-NEXT: ret i16 [[A]]
;
; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@bar2
; IS__CGSCC_NPM-SAME: (i16 [[P1:%.*]], i16 [[P2:%.*]]) #[[ATTR1]] {
; IS__CGSCC_NPM-NEXT: [[A:%.*]] = add i16 [[P1]], [[P2]]
; IS__CGSCC_NPM-NEXT: ret i16 [[A]]
; ;
%a = add i16 %p1, %p2 %a = add i16 %p1, %p2
ret i16 %a ret i16 %a
} }
;------------------------------------------------------------------------------- ;-------------------------------------------------------------------------------
; Additional tests to verify that we still optimize when having a mismatch ; Additional tests to verify that we still optimize when having a mismatch
; in argument count due to varargs (as long as all non-variadic arguments have ; in argument count due to varargs (as long as all non-variadic arguments have
; been provided), ; been provided),
define dso_local i16 @vararg_tests(i16 %a) { define dso_local i16 @vararg_tests(i16 %a) {
; NOT_CGSCC_NPM: Function Attrs: norecurse
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@vararg_tests ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@vararg_tests
; NOT_CGSCC_NPM-SAME: (i16 [[A:%.*]]) { ; NOT_CGSCC_NPM-SAME: (i16 [[A:%.*]]) #[[ATTR0]] {
; NOT_CGSCC_NPM-NEXT: [[CALL2:%.*]] = call i16 bitcast (i16 (i16, i16, ...)* @vararg_no_prop to i16 (i16)*)(i16 noundef 7) ; NOT_CGSCC_NPM-NEXT: [[CALL2:%.*]] = call i16 bitcast (i16 (i16, i16, ...)* @vararg_no_prop to i16 (i16)*)(i16 noundef 7)
; NOT_CGSCC_NPM-NEXT: [[ADD:%.*]] = add i16 7, [[CALL2]] ; NOT_CGSCC_NPM-NEXT: [[ADD:%.*]] = add i16 7, [[CALL2]]
; NOT_CGSCC_NPM-NEXT: ret i16 [[ADD]] ; NOT_CGSCC_NPM-NEXT: ret i16 [[ADD]]
; ;
; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone ; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@vararg_tests ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@vararg_tests
; IS__CGSCC_NPM-SAME: (i16 [[A:%.*]]) #[[ATTR0]] { ; IS__CGSCC_NPM-SAME: (i16 [[A:%.*]]) #[[ATTR0]] {
; IS__CGSCC_NPM-NEXT: [[CALL2:%.*]] = call i16 bitcast (i16 (i16, i16, ...)* @vararg_no_prop to i16 (i16)*)(i16 noundef 7) ; IS__CGSCC_NPM-NEXT: [[CALL2:%.*]] = call i16 bitcast (i16 (i16, i16, ...)* @vararg_no_prop to i16 (i16)*)(i16 noundef 7)
; IS__CGSCC_NPM-NEXT: [[ADD:%.*]] = add i16 7, [[CALL2]] ; IS__CGSCC_NPM-NEXT: [[ADD:%.*]] = add i16 7, [[CALL2]]
; IS__CGSCC_NPM-NEXT: ret i16 [[ADD]] ; IS__CGSCC_NPM-NEXT: ret i16 [[ADD]]
; ;
%call1 = call i16 (i16, ...) @vararg_prop(i16 7, i16 8, i16 %a) %call1 = call i16 (i16, ...) @vararg_prop(i16 7, i16 8, i16 %a)
%call2 = call i16 bitcast (i16 (i16, i16, ...) * @vararg_no_prop to i16 (i16) *) (i16 7) %call2 = call i16 bitcast (i16 (i16, i16, ...) * @vararg_no_prop to i16 (i16) *) (i16 7)
%add = add i16 %call1, %call2 %add = add i16 %call1, %call2
ret i16 %add ret i16 %add
} }
define internal i16 @vararg_prop(i16 %p1, ...) { define internal i16 @vararg_prop(i16 %p1, ...) {
; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@vararg_prop ; IS__CGSCC____-LABEL: define {{[^@]+}}@vararg_prop
; IS__CGSCC_OPM-SAME: (i16 [[P1:%.*]], ...) #[[ATTR0]] { ; IS__CGSCC____-SAME: (i16 [[P1:%.*]], ...) #[[ATTR1]] {
; IS__CGSCC_OPM-NEXT: ret i16 undef ; IS__CGSCC____-NEXT: ret i16 undef
;
; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@vararg_prop
; IS__CGSCC_NPM-SAME: (i16 [[P1:%.*]], ...) #[[ATTR1]] {
; IS__CGSCC_NPM-NEXT: ret i16 undef
; ;
ret i16 %p1 ret i16 %p1
} }
define internal i16 @vararg_no_prop(i16 %p1, i16 %p2, ...) { define internal i16 @vararg_no_prop(i16 %p1, i16 %p2, ...) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@vararg_no_prop ; CHECK-LABEL: define {{[^@]+}}@vararg_no_prop
; IS__TUNIT____-SAME: (i16 [[P1:%.*]], i16 [[P2:%.*]], ...) #[[ATTR0]] { ; CHECK-SAME: (i16 [[P1:%.*]], i16 [[P2:%.*]], ...) #[[ATTR1]] {
; IS__TUNIT____-NEXT: ret i16 7 ; CHECK-NEXT: ret i16 7
;
; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@vararg_no_prop
; IS__CGSCC_OPM-SAME: (i16 [[P1:%.*]], i16 [[P2:%.*]], ...) #[[ATTR0]] {
; IS__CGSCC_OPM-NEXT: ret i16 7
;
; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@vararg_no_prop
; IS__CGSCC_NPM-SAME: (i16 [[P1:%.*]], i16 [[P2:%.*]], ...) #[[ATTR1]] {
; IS__CGSCC_NPM-NEXT: ret i16 7
; ;
ret i16 %p1 ret i16 %p1
} }
;. ;.
; IS__TUNIT____: attributes #[[ATTR0]] = { nofree nosync nounwind readnone willreturn } ; NOT_CGSCC_NPM: attributes #[[ATTR0]] = { norecurse }
;. ; NOT_CGSCC_NPM: attributes #[[ATTR1]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn }
;. ;.
; IS__CGSCC_NPM: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone } ; IS__CGSCC_NPM: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone }
; IS__CGSCC_NPM: attributes #[[ATTR1]] = { nofree norecurse nosync nounwind readnone willreturn } ; IS__CGSCC_NPM: attributes #[[ATTR1]] = { nofree norecurse nosync nounwind readnone willreturn }
;. ;.

llvm/test/Transforms/Attributor/IPConstantProp/arg-type-mismatch.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals
; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM ; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM
; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM ; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM
; This test is just to verify that we do not crash/assert due to mismatch in ; This test is just to verify that we do not crash/assert due to mismatch in
; argument type between the caller and callee. ; argument type between the caller and callee.
define dso_local i16 @foo(i16 %a) { define dso_local i16 @foo(i16 %a) {
; NOT_CGSCC_NPM: Function Attrs: norecurse
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@foo ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@foo
; NOT_CGSCC_NPM-SAME: (i16 [[A:%.*]]) { ; NOT_CGSCC_NPM-SAME: (i16 [[A:%.*]]) #[[ATTR0:[0-9]+]] {
; NOT_CGSCC_NPM-NEXT: [[CALL:%.*]] = call i16 bitcast (i16 (i16, i16)* @bar to i16 (i16, i32)*)(i16 [[A]], i32 7) ; NOT_CGSCC_NPM-NEXT: [[CALL:%.*]] = call i16 bitcast (i16 (i16, i16)* @bar to i16 (i16, i32)*)(i16 [[A]], i32 7)
; NOT_CGSCC_NPM-NEXT: ret i16 [[CALL]] ; NOT_CGSCC_NPM-NEXT: ret i16 [[CALL]]
; ;
; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone ; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@foo ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@foo
; IS__CGSCC_NPM-SAME: (i16 [[A:%.*]]) #[[ATTR0:[0-9]+]] { ; IS__CGSCC_NPM-SAME: (i16 [[A:%.*]]) #[[ATTR0:[0-9]+]] {
; IS__CGSCC_NPM-NEXT: [[CALL:%.*]] = call i16 bitcast (i16 (i16, i16)* @bar to i16 (i16, i32)*)(i16 [[A]], i32 7) ; IS__CGSCC_NPM-NEXT: [[CALL:%.*]] = call i16 bitcast (i16 (i16, i16)* @bar to i16 (i16, i32)*)(i16 [[A]], i32 7)
; IS__CGSCC_NPM-NEXT: ret i16 [[CALL]] ; IS__CGSCC_NPM-NEXT: ret i16 [[CALL]]
; ;
%call = call i16 bitcast (i16 (i16, i16) * @bar to i16 (i16, i32) *)(i16 %a, i32 7) %call = call i16 bitcast (i16 (i16, i16) * @bar to i16 (i16, i32) *)(i16 %a, i32 7)
ret i16 %call ret i16 %call
} }
define internal i16 @bar(i16 %p1, i16 %p2) { define internal i16 @bar(i16 %p1, i16 %p2) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@bar ; CHECK-LABEL: define {{[^@]+}}@bar
; IS__TUNIT____-SAME: (i16 [[P1:%.*]], i16 returned [[P2:%.*]]) #[[ATTR0:[0-9]+]] { ; CHECK-SAME: (i16 [[P1:%.*]], i16 returned [[P2:%.*]]) #[[ATTR1:[0-9]+]] {
; IS__TUNIT____-NEXT: ret i16 [[P2]] ; CHECK-NEXT: ret i16 [[P2]]
;
; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@bar
; IS__CGSCC_OPM-SAME: (i16 [[P1:%.*]], i16 returned [[P2:%.*]]) #[[ATTR0:[0-9]+]] {
; IS__CGSCC_OPM-NEXT: ret i16 [[P2]]
;
; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@bar
; IS__CGSCC_NPM-SAME: (i16 [[P1:%.*]], i16 returned [[P2:%.*]]) #[[ATTR1:[0-9]+]] {
; IS__CGSCC_NPM-NEXT: ret i16 [[P2]]
; ;
ret i16 %p2 ret i16 %p2
} }
;. ;.
; IS__TUNIT____: attributes #[[ATTR0]] = { nofree nosync nounwind readnone willreturn } ; NOT_CGSCC_NPM: attributes #[[ATTR0]] = { norecurse }
;. ; NOT_CGSCC_NPM: attributes #[[ATTR1]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn }
;. ;.
; IS__CGSCC_NPM: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone } ; IS__CGSCC_NPM: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone }
; IS__CGSCC_NPM: attributes #[[ATTR1]] = { nofree norecurse nosync nounwind readnone willreturn } ; IS__CGSCC_NPM: attributes #[[ATTR1]] = { nofree norecurse nosync nounwind readnone willreturn }
;. ;.

llvm/test/Transforms/Attributor/IPConstantProp/comdat-ipo.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals
; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM ; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM
; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM ; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM
; See PR26774 ; See PR26774
define i32 @baz() { define i32 @baz() {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@baz ; CHECK-LABEL: define {{[^@]+}}@baz
; IS__TUNIT____-SAME: () #[[ATTR0:[0-9]+]] { ; CHECK-SAME: () #[[ATTR0:[0-9]+]] {
; IS__TUNIT____-NEXT: ret i32 10 ; CHECK-NEXT: ret i32 10
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@baz
; IS__CGSCC____-SAME: () #[[ATTR0:[0-9]+]] {
; IS__CGSCC____-NEXT: ret i32 10
; ;
ret i32 10 ret i32 10
} }
; We can const-prop @baz's return value *into* @foo, but cannot ; We can const-prop @baz's return value *into* @foo, but cannot
; constprop @foo's return value into bar. ; constprop @foo's return value into bar.
define linkonce_odr i32 @foo() { define linkonce_odr i32 @foo() {
; CHECK-LABEL: define {{[^@]+}}@foo() { ; CHECK-LABEL: define {{[^@]+}}@foo() {
; CHECK-NEXT: ret i32 10 ; CHECK-NEXT: ret i32 10
; ;
%val = call i32 @baz() %val = call i32 @baz()
ret i32 %val ret i32 %val
} }
define i32 @bar() { define i32 @bar() {
; CHECK-LABEL: define {{[^@]+}}@bar() { ; CHECK: Function Attrs: norecurse
; CHECK-LABEL: define {{[^@]+}}@bar
; CHECK-SAME: () #[[ATTR1:[0-9]+]] {
; CHECK-NEXT: [[VAL:%.*]] = call i32 @foo() ; CHECK-NEXT: [[VAL:%.*]] = call i32 @foo()
; CHECK-NEXT: ret i32 [[VAL]] ; CHECK-NEXT: ret i32 [[VAL]]
; ;
%val = call i32 @foo() %val = call i32 @foo()
ret i32 %val ret i32 %val
} }
;. ;.
; IS__TUNIT____: attributes #[[ATTR0]] = { nofree nosync nounwind readnone willreturn } ; CHECK: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn }
;. ; CHECK: attributes #[[ATTR1]] = { norecurse }
; IS__CGSCC____: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn }
;. ;.

llvm/test/Transforms/Attributor/IPConstantProp/dangling-block-address.ll

Show First 20 Lines • Show All 66 Lines • ▼ Show 20 Linesindirectgoto: ; preds = %lab0, %entry
%pc.addr.0 = getelementptr i32, i32* %pc, i32 %indvar ; <i32*> [#uses=1] %pc.addr.0 = getelementptr i32, i32* %pc, i32 %indvar ; <i32*> [#uses=1]
%tmp1.pn = load i32, i32* %pc.addr.0 ; <i32> [#uses=1] %tmp1.pn = load i32, i32* %pc.addr.0 ; <i32> [#uses=1]
%indirect.goto.dest.in = getelementptr inbounds [2 x i8*], [2 x i8*]* @bar.l, i32 0, i32 %tmp1.pn ; <i8**> [#uses=1] %indirect.goto.dest.in = getelementptr inbounds [2 x i8*], [2 x i8*]* @bar.l, i32 0, i32 %tmp1.pn ; <i8**> [#uses=1]
%indirect.goto.dest = load i8*, i8** %indirect.goto.dest.in ; <i8*> [#uses=1] %indirect.goto.dest = load i8*, i8** %indirect.goto.dest.in ; <i8*> [#uses=1]
indirectbr i8* %indirect.goto.dest, [label %lab0, label %end] indirectbr i8* %indirect.goto.dest, [label %lab0, label %end]
} }
define i32 @main() nounwind readnone { define i32 @main() nounwind readnone {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__TUNIT____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@main ; IS__TUNIT____-LABEL: define {{[^@]+}}@main
; IS__TUNIT____-SAME: () #[[ATTR0:[0-9]+]] { ; IS__TUNIT____-SAME: () #[[ATTR0:[0-9]+]] {
; IS__TUNIT____-NEXT: entry: ; IS__TUNIT____-NEXT: entry:
; IS__TUNIT____-NEXT: ret i32 0 ; IS__TUNIT____-NEXT: ret i32 0
; ;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@main ; IS__CGSCC____-LABEL: define {{[^@]+}}@main
; IS__CGSCC____-SAME: () #[[ATTR2:[0-9]+]] { ; IS__CGSCC____-SAME: () #[[ATTR2:[0-9]+]] {
; IS__CGSCC____-NEXT: entry: ; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: ret i32 0 ; IS__CGSCC____-NEXT: ret i32 0
; ;
entry: entry:
ret i32 0 ret i32 0
} }
;. ;.
; IS__TUNIT____: attributes #[[ATTR0]] = { nofree nosync nounwind readnone willreturn } ; IS__TUNIT____: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn }
;. ;.
; IS__CGSCC____: attributes #[[ATTR0]] = { nounwind readnone } ; IS__CGSCC____: attributes #[[ATTR0]] = { nounwind readnone }
; IS__CGSCC____: attributes #[[ATTR1]] = { nounwind readonly } ; IS__CGSCC____: attributes #[[ATTR1]] = { nounwind readonly }
; IS__CGSCC____: attributes #[[ATTR2]] = { nofree norecurse nosync nounwind readnone willreturn } ; IS__CGSCC____: attributes #[[ATTR2]] = { nofree norecurse nosync nounwind readnone willreturn }
;. ;.

llvm/test/Transforms/Attributor/IPConstantProp/deadarg.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals
; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM ; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM
; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM ; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM
define internal void @foo(i32 %X) { define internal void @foo(i32 %X) {
; IS__CGSCC____-LABEL: define {{[^@]+}}@foo ; IS__CGSCC____-LABEL: define {{[^@]+}}@foo
; IS__CGSCC____-SAME: (i32 [[X:%.*]]) { ; IS__CGSCC____-SAME: (i32 [[X:%.*]]) {
; IS__CGSCC____-NEXT: call void @foo(i32 [[X]]) ; IS__CGSCC____-NEXT: call void @foo(i32 [[X]])
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
call void @foo( i32 %X ) call void @foo( i32 %X )
ret void ret void
} }
define void @bar() { define void @bar() {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@bar ; CHECK-LABEL: define {{[^@]+}}@bar
; IS__TUNIT____-SAME: () #[[ATTR0:[0-9]+]] { ; CHECK-SAME: () #[[ATTR0:[0-9]+]] {
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@bar
; IS__CGSCC____-SAME: () #[[ATTR0:[0-9]+]] {
; IS__CGSCC____-NEXT: ret void
; ;
ret void ret void
} }
;. ;.
; IS__TUNIT____: attributes #[[ATTR0]] = { nofree nosync nounwind readnone willreturn } ; CHECK: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn }
;.
; IS__CGSCC____: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn }
;. ;.

llvm/test/Transforms/Attributor/IPConstantProp/fp-bc-icmp-const-fold.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals
; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM ; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM
; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM ; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM
target datalayout = "E-m:e-i64:64-n32:64" target datalayout = "E-m:e-i64:64-n32:64"
target triple = "powerpc64le-unknown-linux" target triple = "powerpc64le-unknown-linux"
define void @test(i32 signext %n) { define void @test(i32 signext %n) {
; IS__TUNIT____: Function Attrs: nofree noreturn nosync nounwind readnone ; CHECK: Function Attrs: nofree norecurse noreturn nosync nounwind readnone
; IS__TUNIT____-LABEL: define {{[^@]+}}@test ; CHECK-LABEL: define {{[^@]+}}@test
; IS__TUNIT____-SAME: (i32 signext [[N:%.*]]) #[[ATTR0:[0-9]+]] { ; CHECK-SAME: (i32 signext [[N:%.*]]) #[[ATTR0:[0-9]+]] {
; IS__TUNIT____-NEXT: entry: ; CHECK-NEXT: entry:
; IS__TUNIT____-NEXT: unreachable ; CHECK-NEXT: unreachable
; IS__TUNIT____: if.then: ; CHECK: if.then:
; IS__TUNIT____-NEXT: unreachable ; CHECK-NEXT: unreachable
; IS__TUNIT____: if.end: ; CHECK: if.end:
; IS__TUNIT____-NEXT: unreachable ; CHECK-NEXT: unreachable
; IS__TUNIT____: if.then2: ; CHECK: if.then2:
; IS__TUNIT____-NEXT: unreachable ; CHECK-NEXT: unreachable
; IS__TUNIT____: if.end4: ; CHECK: if.end4:
; IS__TUNIT____-NEXT: unreachable ; CHECK-NEXT: unreachable
; IS__TUNIT____: if.then9: ; CHECK: if.then9:
; IS__TUNIT____-NEXT: unreachable ; CHECK-NEXT: unreachable
; IS__TUNIT____: if.then12: ; CHECK: if.then12:
; IS__TUNIT____-NEXT: unreachable ; CHECK-NEXT: unreachable
; IS__TUNIT____: if.else14: ; CHECK: if.else14:
; IS__TUNIT____-NEXT: unreachable ; CHECK-NEXT: unreachable
; IS__TUNIT____: do.body: ; CHECK: do.body:
; IS__TUNIT____-NEXT: unreachable ; CHECK-NEXT: unreachable
; IS__TUNIT____: if.then33: ; CHECK: if.then33:
; IS__TUNIT____-NEXT: unreachable ; CHECK-NEXT: unreachable
; IS__TUNIT____: cond.false.i28: ; CHECK: cond.false.i28:
; IS__TUNIT____-NEXT: unreachable ; CHECK-NEXT: unreachable
; IS__TUNIT____: _ZN5boost4math4signIgEEiRKT_.exit30: ; CHECK: _ZN5boost4math4signIgEEiRKT_.exit30:
; IS__TUNIT____-NEXT: unreachable ; CHECK-NEXT: unreachable
;
; IS__CGSCC____: Function Attrs: nofree norecurse noreturn nosync nounwind readnone
; IS__CGSCC____-LABEL: define {{[^@]+}}@test
; IS__CGSCC____-SAME: (i32 signext [[N:%.*]]) #[[ATTR0:[0-9]+]] {
; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: unreachable
; IS__CGSCC____: if.then:
; IS__CGSCC____-NEXT: unreachable
; IS__CGSCC____: if.end:
; IS__CGSCC____-NEXT: unreachable
; IS__CGSCC____: if.then2:
; IS__CGSCC____-NEXT: unreachable
; IS__CGSCC____: if.end4:
; IS__CGSCC____-NEXT: unreachable
; IS__CGSCC____: if.then9:
; IS__CGSCC____-NEXT: unreachable
; IS__CGSCC____: if.then12:
; IS__CGSCC____-NEXT: unreachable
; IS__CGSCC____: if.else14:
; IS__CGSCC____-NEXT: unreachable
; IS__CGSCC____: do.body:
; IS__CGSCC____-NEXT: unreachable
; IS__CGSCC____: if.then33:
; IS__CGSCC____-NEXT: unreachable
; IS__CGSCC____: cond.false.i28:
; IS__CGSCC____-NEXT: unreachable
; IS__CGSCC____: _ZN5boost4math4signIgEEiRKT_.exit30:
; IS__CGSCC____-NEXT: unreachable
; ;
entry: entry:
br i1 undef, label %if.then, label %if.end br i1 undef, label %if.then, label %if.end
if.then: ; preds = %entry if.then: ; preds = %entry
ret void ret void
Show All 31 Linescond.false.i28: ; preds = %if.then33
%tobool.i26 = icmp slt i128 %0, 0 %tobool.i26 = icmp slt i128 %0, 0
br label %_ZN5boost4math4signIgEEiRKT_.exit30 br label %_ZN5boost4math4signIgEEiRKT_.exit30
_ZN5boost4math4signIgEEiRKT_.exit30: ; preds = %cond.false.i28, %if.then33 _ZN5boost4math4signIgEEiRKT_.exit30: ; preds = %cond.false.i28, %if.then33
unreachable unreachable
} }
;. ;.
; IS__TUNIT____: attributes #[[ATTR0]] = { nofree noreturn nosync nounwind readnone } ; CHECK: attributes #[[ATTR0]] = { nofree norecurse noreturn nosync nounwind readnone }
;.
; IS__CGSCC____: attributes #[[ATTR0]] = { nofree norecurse noreturn nosync nounwind readnone }
;. ;.

llvm/test/Transforms/Attributor/IPConstantProp/global.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals
; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM ; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM
; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM ; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM
@_ZL6test1g = internal global i32 42, align 4 @_ZL6test1g = internal global i32 42, align 4
;. ;.
; CHECK: @[[_ZL6TEST1G:[a-zA-Z0-9_$"\\.-]+]] = internal global i32 42, align 4 ; CHECK: @[[_ZL6TEST1G:[a-zA-Z0-9_$"\\.-]+]] = internal global i32 42, align 4
;. ;.
define void @_Z7test1f1v() nounwind { define void @_Z7test1f1v() nounwind {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@_Z7test1f1v ; CHECK-LABEL: define {{[^@]+}}@_Z7test1f1v
; IS__TUNIT____-SAME: () #[[ATTR0:[0-9]+]] { ; CHECK-SAME: () #[[ATTR0:[0-9]+]] {
; IS__TUNIT____-NEXT: entry: ; CHECK-NEXT: entry:
; IS__TUNIT____-NEXT: br label [[IF_END:%.*]] ; CHECK-NEXT: br label [[IF_END:%.*]]
; IS__TUNIT____: if.then: ; CHECK: if.then:
; IS__TUNIT____-NEXT: unreachable ; CHECK-NEXT: unreachable
; IS__TUNIT____: if.end: ; CHECK: if.end:
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@_Z7test1f1v
; IS__CGSCC____-SAME: () #[[ATTR0:[0-9]+]] {
; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: br label [[IF_END:%.*]]
; IS__CGSCC____: if.then:
; IS__CGSCC____-NEXT: unreachable
; IS__CGSCC____: if.end:
; IS__CGSCC____-NEXT: ret void
; ;
entry: entry:
%tmp = load i32, i32* @_ZL6test1g, align 4 %tmp = load i32, i32* @_ZL6test1g, align 4
%cmp = icmp eq i32 %tmp, 0 %cmp = icmp eq i32 %tmp, 0
br i1 %cmp, label %if.then, label %if.end br i1 %cmp, label %if.then, label %if.end
if.then: ; preds = %entry if.then: ; preds = %entry
store i32 0, i32* @_ZL6test1g, align 4 store i32 0, i32* @_ZL6test1g, align 4
br label %if.end br label %if.end
if.end: ; preds = %if.then, %entry if.end: ; preds = %if.then, %entry
ret void ret void
} }
define i32 @_Z7test1f2v() nounwind { define i32 @_Z7test1f2v() nounwind {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@_Z7test1f2v ; CHECK-LABEL: define {{[^@]+}}@_Z7test1f2v
; IS__TUNIT____-SAME: () #[[ATTR0]] { ; CHECK-SAME: () #[[ATTR0]] {
; IS__TUNIT____-NEXT: entry: ; CHECK-NEXT: entry:
; IS__TUNIT____-NEXT: ret i32 42 ; CHECK-NEXT: ret i32 42
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@_Z7test1f2v
; IS__CGSCC____-SAME: () #[[ATTR0]] {
; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: ret i32 42
; ;
entry: entry:
%tmp = load i32, i32* @_ZL6test1g, align 4 %tmp = load i32, i32* @_ZL6test1g, align 4
ret i32 %tmp ret i32 %tmp
} }
;. ;.
; IS__TUNIT____: attributes #[[ATTR0]] = { nofree nosync nounwind readnone willreturn } ; CHECK: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn }
;.
; IS__CGSCC____: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn }
;. ;.

llvm/test/Transforms/Attributor/IPConstantProp/multiple_callbacks.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals
; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM ; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=2 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=2 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM
; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM ; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM
; ;
; ;
; /---------------------------------------| ; /---------------------------------------|
; | /----------------------|----| ; | /----------------------|----|
; | | /-----| | ; | | /-----| |
; V V V | | ; V V V | |
Show All 23 Lines
; broker(cb1, cb2, cb2, 0, 1); ; broker(cb1, cb2, cb2, 0, 1);
; broker(cb3, cb2, cb3, 0, 1); ; broker(cb3, cb2, cb3, 0, 1);
; broker(cb4, cb4, cb4, 0, 1); ; broker(cb4, cb4, cb4, 0, 1);
; } ; }
; ;
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
define internal i32 @cb0(i32 %zero) { define internal i32 @cb0(i32 %zero) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@cb0 ; CHECK-LABEL: define {{[^@]+}}@cb0
; IS__TUNIT____-SAME: (i32 [[ZERO:%.*]]) #[[ATTR0:[0-9]+]] { ; CHECK-SAME: (i32 [[ZERO:%.*]]) #[[ATTR0:[0-9]+]] {
; IS__TUNIT____-NEXT: entry: ; CHECK-NEXT: entry:
; IS__TUNIT____-NEXT: ret i32 0 ; CHECK-NEXT: ret i32 0
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@cb0
; IS__CGSCC____-SAME: (i32 [[ZERO:%.*]]) #[[ATTR0:[0-9]+]] {
; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: ret i32 0
; ;
entry: entry:
ret i32 %zero ret i32 %zero
} }
define internal i32 @cb1(i32 %unknown) { define internal i32 @cb1(i32 %unknown) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@cb1 ; CHECK-LABEL: define {{[^@]+}}@cb1
; IS__TUNIT____-SAME: (i32 noundef returned [[UNKNOWN:%.*]]) #[[ATTR0]] { ; CHECK-SAME: (i32 noundef returned [[UNKNOWN:%.*]]) #[[ATTR0]] {
; IS__TUNIT____-NEXT: entry: ; CHECK-NEXT: entry:
; IS__TUNIT____-NEXT: ret i32 [[UNKNOWN]] ; CHECK-NEXT: ret i32 [[UNKNOWN]]
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@cb1
; IS__CGSCC____-SAME: (i32 noundef returned [[UNKNOWN:%.*]]) #[[ATTR0]] {
; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: ret i32 [[UNKNOWN]]
; ;
entry: entry:
ret i32 %unknown ret i32 %unknown
} }
define internal i32 @cb2(i32 %unknown) { define internal i32 @cb2(i32 %unknown) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@cb2 ; CHECK-LABEL: define {{[^@]+}}@cb2
; IS__TUNIT____-SAME: (i32 noundef returned [[UNKNOWN:%.*]]) #[[ATTR0]] { ; CHECK-SAME: (i32 noundef returned [[UNKNOWN:%.*]]) #[[ATTR0]] {
; IS__TUNIT____-NEXT: entry: ; CHECK-NEXT: entry:
; IS__TUNIT____-NEXT: ret i32 [[UNKNOWN]] ; CHECK-NEXT: ret i32 [[UNKNOWN]]
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@cb2
; IS__CGSCC____-SAME: (i32 noundef returned [[UNKNOWN:%.*]]) #[[ATTR0]] {
; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: ret i32 [[UNKNOWN]]
; ;
entry: entry:
%call = call i32 @cb0(i32 0) %call = call i32 @cb0(i32 0)
ret i32 %unknown ret i32 %unknown
} }
define internal i32 @cb3(i32 %unknown) { define internal i32 @cb3(i32 %unknown) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@cb3 ; CHECK-LABEL: define {{[^@]+}}@cb3
; IS__TUNIT____-SAME: (i32 noundef returned [[UNKNOWN:%.*]]) #[[ATTR0]] { ; CHECK-SAME: (i32 noundef returned [[UNKNOWN:%.*]]) #[[ATTR0]] {
; IS__TUNIT____-NEXT: entry: ; CHECK-NEXT: entry:
; IS__TUNIT____-NEXT: ret i32 [[UNKNOWN]] ; CHECK-NEXT: ret i32 [[UNKNOWN]]
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@cb3
; IS__CGSCC____-SAME: (i32 noundef returned [[UNKNOWN:%.*]]) #[[ATTR0]] {
; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: ret i32 [[UNKNOWN]]
; ;
entry: entry:
ret i32 %unknown ret i32 %unknown
} }
define internal i32 @cb4(i32 %unknown) { define internal i32 @cb4(i32 %unknown) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@cb4 ; CHECK-LABEL: define {{[^@]+}}@cb4
; IS__TUNIT____-SAME: (i32 noundef returned [[UNKNOWN:%.*]]) #[[ATTR0]] { ; CHECK-SAME: (i32 noundef returned [[UNKNOWN:%.*]]) #[[ATTR0]] {
; IS__TUNIT____-NEXT: entry: ; CHECK-NEXT: entry:
; IS__TUNIT____-NEXT: ret i32 [[UNKNOWN]] ; CHECK-NEXT: ret i32 [[UNKNOWN]]
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@cb4
; IS__CGSCC____-SAME: (i32 noundef returned [[UNKNOWN:%.*]]) #[[ATTR0]] {
; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: ret i32 [[UNKNOWN]]
; ;
entry: entry:
ret i32 %unknown ret i32 %unknown
} }
define void @foo() { define void @foo() {
; CHECK-LABEL: define {{[^@]+}}@foo() { ; IS__TUNIT____-LABEL: define {{[^@]+}}@foo() {
; CHECK-NEXT: entry: ; IS__TUNIT____-NEXT: entry:
; CHECK-NEXT: call void @broker(i32 (i32)* noundef nonnull @cb0, i32 (i32)* noundef nonnull @cb1, i32 (i32)* noundef nonnull @cb0, i32 noundef 0, i32 noundef 1) ; IS__TUNIT____-NEXT: call void @broker(i32 (i32)* noundef nonnull @cb0, i32 (i32)* noundef nonnull @cb1, i32 (i32)* noundef nonnull @cb0, i32 noundef 0, i32 noundef 1)
; CHECK-NEXT: call void @broker(i32 (i32)* noundef nonnull @cb1, i32 (i32)* noundef nonnull @cb2, i32 (i32)* noundef nonnull @cb2, i32 noundef 0, i32 noundef 1) ; IS__TUNIT____-NEXT: call void @broker(i32 (i32)* noundef nonnull @cb1, i32 (i32)* noundef nonnull @cb2, i32 (i32)* noundef nonnull @cb2, i32 noundef 0, i32 noundef 1)
; CHECK-NEXT: call void @broker(i32 (i32)* noundef nonnull @cb3, i32 (i32)* noundef nonnull @cb2, i32 (i32)* noundef nonnull @cb3, i32 noundef 0, i32 noundef 1) ; IS__TUNIT____-NEXT: call void @broker(i32 (i32)* noundef nonnull @cb3, i32 (i32)* noundef nonnull @cb2, i32 (i32)* noundef nonnull @cb3, i32 noundef 0, i32 noundef 1)
; CHECK-NEXT: call void @broker(i32 (i32)* noundef nonnull @cb4, i32 (i32)* noundef nonnull @cb4, i32 (i32)* noundef nonnull @cb4, i32 noundef 0, i32 noundef 1) ; IS__TUNIT____-NEXT: call void @broker(i32 (i32)* noundef nonnull @cb4, i32 (i32)* noundef nonnull @cb4, i32 (i32)* noundef nonnull @cb4, i32 noundef 0, i32 noundef 1)
; CHECK-NEXT: ret void ; IS__TUNIT____-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: norecurse
; IS__CGSCC____-LABEL: define {{[^@]+}}@foo
; IS__CGSCC____-SAME: () #[[ATTR1:[0-9]+]] {
; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: call void @broker(i32 (i32)* noundef nonnull @cb0, i32 (i32)* noundef nonnull @cb1, i32 (i32)* noundef nonnull @cb0, i32 noundef 0, i32 noundef 1)
; IS__CGSCC____-NEXT: call void @broker(i32 (i32)* noundef nonnull @cb1, i32 (i32)* noundef nonnull @cb2, i32 (i32)* noundef nonnull @cb2, i32 noundef 0, i32 noundef 1)
; IS__CGSCC____-NEXT: call void @broker(i32 (i32)* noundef nonnull @cb3, i32 (i32)* noundef nonnull @cb2, i32 (i32)* noundef nonnull @cb3, i32 noundef 0, i32 noundef 1)
; IS__CGSCC____-NEXT: call void @broker(i32 (i32)* noundef nonnull @cb4, i32 (i32)* noundef nonnull @cb4, i32 (i32)* noundef nonnull @cb4, i32 noundef 0, i32 noundef 1)
; IS__CGSCC____-NEXT: ret void
; ;
entry: entry:
%call = call i32 @cb0(i32 0) %call = call i32 @cb0(i32 0)
%call1 = call i32 @cb3(i32 1) %call1 = call i32 @cb3(i32 1)
call void @broker(i32 (i32)* nonnull @cb0, i32 (i32)* nonnull @cb1, i32 (i32)* nonnull @cb0, i32 0, i32 1) call void @broker(i32 (i32)* nonnull @cb0, i32 (i32)* nonnull @cb1, i32 (i32)* nonnull @cb0, i32 0, i32 1)
call void @broker(i32 (i32)* nonnull @cb1, i32 (i32)* nonnull @cb2, i32 (i32)* nonnull @cb2, i32 0, i32 1) call void @broker(i32 (i32)* nonnull @cb1, i32 (i32)* nonnull @cb2, i32 (i32)* nonnull @cb2, i32 0, i32 1)
call void @broker(i32 (i32)* nonnull @cb3, i32 (i32)* nonnull @cb2, i32 (i32)* nonnull @cb3, i32 0, i32 1) call void @broker(i32 (i32)* nonnull @cb3, i32 (i32)* nonnull @cb2, i32 (i32)* nonnull @cb3, i32 0, i32 1)
call void @broker(i32 (i32)* nonnull @cb4, i32 (i32)* nonnull @cb4, i32 (i32)* nonnull @cb4, i32 0, i32 1) call void @broker(i32 (i32)* nonnull @cb4, i32 (i32)* nonnull @cb4, i32 (i32)* nonnull @cb4, i32 0, i32 1)
ret void ret void
} }
declare !callback !3 void @broker(i32 (i32)*, i32 (i32)*, i32 (i32)*, i32, i32) declare !callback !3 void @broker(i32 (i32)*, i32 (i32)*, i32 (i32)*, i32, i32)
!0 = !{i64 0, i64 3, i1 false} !0 = !{i64 0, i64 3, i1 false}
!1 = !{i64 1, i64 4, i1 false} !1 = !{i64 1, i64 4, i1 false}
!2 = !{i64 2, i64 3, i1 false} !2 = !{i64 2, i64 3, i1 false}
!3 = !{!0, !2, !1} !3 = !{!0, !2, !1}
;. ;.
; IS__TUNIT____: attributes #[[ATTR0]] = { nofree nosync nounwind readnone willreturn } ; IS__TUNIT____: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn }
;. ;.
; IS__CGSCC____: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn } ; IS__CGSCC____: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__CGSCC____: attributes #[[ATTR1]] = { norecurse }
;. ;.
; CHECK: [[META0:![0-9]+]] = !{!1, !2, !3} ; CHECK: [[META0:![0-9]+]] = !{!1, !2, !3}
; CHECK: [[META1:![0-9]+]] = !{i64 0, i64 3, i1 false} ; CHECK: [[META1:![0-9]+]] = !{i64 0, i64 3, i1 false}
; CHECK: [[META2:![0-9]+]] = !{i64 2, i64 3, i1 false} ; CHECK: [[META2:![0-9]+]] = !{i64 2, i64 3, i1 false}
; CHECK: [[META3:![0-9]+]] = !{i64 1, i64 4, i1 false} ; CHECK: [[META3:![0-9]+]] = !{i64 1, i64 4, i1 false}
;. ;.

llvm/test/Transforms/Attributor/IPConstantProp/naked-return.ll

Show All 28 Lines
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
BasicBlock1: BasicBlock1:
call void asm "\0D\0A movl 12(%esp), %ebp\0D\0A movl 4(%esp), %eax\0D\0A movl 8(%esp), %esp\0D\0A jmpl *%eax\0D\0A", ""() call void asm "\0D\0A movl 12(%esp), %ebp\0D\0A movl 4(%esp), %eax\0D\0A movl 8(%esp), %esp\0D\0A jmpl *%eax\0D\0A", ""()
ret void ret void
} }
define void @patatino(i32, i32, i32) local_unnamed_addr #1 { define void @patatino(i32, i32, i32) local_unnamed_addr #1 {
; CHECK: Function Attrs: norecurse
; CHECK-LABEL: define {{[^@]+}}@patatino ; CHECK-LABEL: define {{[^@]+}}@patatino
; CHECK-SAME: (i32 [[TMP0:%.*]], i32 [[TMP1:%.*]], i32 [[TMP2:%.*]]) local_unnamed_addr #[[ATTR1:[0-9]+]] { ; CHECK-SAME: (i32 [[TMP0:%.*]], i32 [[TMP1:%.*]], i32 [[TMP2:%.*]]) local_unnamed_addr #[[ATTR1:[0-9]+]] {
; CHECK-NEXT: bb: ; CHECK-NEXT: bb:
; CHECK-NEXT: [[TMP3:%.*]] = tail call i32 @dipsy(i32 [[TMP0]], i32 [[TMP1]]) #[[ATTR0]] ; CHECK-NEXT: [[TMP3:%.*]] = tail call i32 @dipsy(i32 [[TMP0]], i32 [[TMP1]]) #[[ATTR0]]
; CHECK-NEXT: tail call void @tinkywinky(i32 [[TMP3]], i32 [[TMP2]], i32 [[TMP1]]) #[[ATTR0]] ; CHECK-NEXT: tail call void @tinkywinky(i32 [[TMP3]], i32 [[TMP2]], i32 [[TMP1]]) #[[ATTR0]]
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
bb: bb:
%3 = tail call i32 @dipsy(i32 %0, i32 %1) #0 %3 = tail call i32 @dipsy(i32 %0, i32 %1) #0
; Check that we don't accidentally propagate zero. ; Check that we don't accidentally propagate zero.
tail call void @tinkywinky(i32 %3, i32 %2, i32 %1) #0 tail call void @tinkywinky(i32 %3, i32 %2, i32 %1) #0
ret void ret void
} }
attributes #0 = { naked } attributes #0 = { naked }
attributes #1 = { "frame-pointer"="all" } attributes #1 = { "frame-pointer"="all" }
;. ;.
; CHECK: attributes #[[ATTR0]] = { naked } ; CHECK: attributes #[[ATTR0]] = { naked }
; CHECK: attributes #[[ATTR1]] = { "frame-pointer"="all" } ; CHECK: attributes #[[ATTR1]] = { norecurse "frame-pointer"="all" }
;. ;.

llvm/test/Transforms/Attributor/IPConstantProp/openmp_parallel_for.ll

Show First 20 Lines • Show All 47 Lines • ▼ Show 20 Lines
; IS__TUNIT_NPM-NEXT: entry: ; IS__TUNIT_NPM-NEXT: entry:
; IS__TUNIT_NPM-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 ; IS__TUNIT_NPM-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
; IS__TUNIT_NPM-NEXT: [[P:%.*]] = alloca float, align 4 ; IS__TUNIT_NPM-NEXT: [[P:%.*]] = alloca float, align 4
; IS__TUNIT_NPM-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 ; IS__TUNIT_NPM-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
; IS__TUNIT_NPM-NEXT: store i32 7, i32* [[N_ADDR]], align 4 ; IS__TUNIT_NPM-NEXT: store i32 7, i32* [[N_ADDR]], align 4
; IS__TUNIT_NPM-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* noundef nonnull align 8 dereferenceable(24) @[[GLOB1]], i32 noundef 3, void (i32*, i32*, ...)* noundef bitcast (void (i32*, i32*, i32*, float*, i64)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* noalias nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[N_ADDR]], float* noalias nocapture nofree nonnull readnone align 4 dereferenceable(4) undef, i64 undef) ; IS__TUNIT_NPM-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* noundef nonnull align 8 dereferenceable(24) @[[GLOB1]], i32 noundef 3, void (i32*, i32*, ...)* noundef bitcast (void (i32*, i32*, i32*, float*, i64)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* noalias nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[N_ADDR]], float* noalias nocapture nofree nonnull readnone align 4 dereferenceable(4) undef, i64 undef)
; IS__TUNIT_NPM-NEXT: ret void ; IS__TUNIT_NPM-NEXT: ret void
; ;
; IS__CGSCC_OPM: Function Attrs: norecurse
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@foo ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@foo
; IS__CGSCC_OPM-SAME: (i32 [[N:%.*]]) { ; IS__CGSCC_OPM-SAME: (i32 [[N:%.*]]) #[[ATTR0:[0-9]+]] {
; IS__CGSCC_OPM-NEXT: entry: ; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 ; IS__CGSCC_OPM-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
; IS__CGSCC_OPM-NEXT: [[P:%.*]] = alloca float, align 4 ; IS__CGSCC_OPM-NEXT: [[P:%.*]] = alloca float, align 4
; IS__CGSCC_OPM-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 ; IS__CGSCC_OPM-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
; IS__CGSCC_OPM-NEXT: store i32 7, i32* [[N_ADDR]], align 4 ; IS__CGSCC_OPM-NEXT: store i32 7, i32* [[N_ADDR]], align 4
; IS__CGSCC_OPM-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* noundef nonnull align 8 dereferenceable(24) @[[GLOB1]], i32 noundef 3, void (i32*, i32*, ...)* noundef bitcast (void (i32*, i32*, i32*, float*, i64)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[N_ADDR]], float* noalias nocapture nofree noundef nonnull readnone align 4 dereferenceable(4) [[P]], i64 noundef 4617315517961601024) ; IS__CGSCC_OPM-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* noundef nonnull align 8 dereferenceable(24) @[[GLOB1]], i32 noundef 3, void (i32*, i32*, ...)* noundef bitcast (void (i32*, i32*, i32*, float*, i64)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[N_ADDR]], float* noalias nocapture nofree noundef nonnull readnone align 4 dereferenceable(4) [[P]], i64 noundef 4617315517961601024)
; IS__CGSCC_OPM-NEXT: ret void ; IS__CGSCC_OPM-NEXT: ret void
; ;
; IS__CGSCC_NPM: Function Attrs: norecurse
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@foo ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@foo
; IS__CGSCC_NPM-SAME: (i32 [[N:%.*]]) { ; IS__CGSCC_NPM-SAME: (i32 [[N:%.*]]) #[[ATTR0:[0-9]+]] {
; IS__CGSCC_NPM-NEXT: entry: ; IS__CGSCC_NPM-NEXT: entry:
; IS__CGSCC_NPM-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 ; IS__CGSCC_NPM-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
; IS__CGSCC_NPM-NEXT: [[P:%.*]] = alloca float, align 4 ; IS__CGSCC_NPM-NEXT: [[P:%.*]] = alloca float, align 4
; IS__CGSCC_NPM-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 ; IS__CGSCC_NPM-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
; IS__CGSCC_NPM-NEXT: store i32 7, i32* [[N_ADDR]], align 4 ; IS__CGSCC_NPM-NEXT: store i32 7, i32* [[N_ADDR]], align 4
; IS__CGSCC_NPM-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* noundef nonnull align 8 dereferenceable(24) @[[GLOB1]], i32 noundef 3, void (i32*, i32*, ...)* noundef bitcast (void (i32*, i32*, i32*, float*, i64)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* noalias nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[N_ADDR]], float* noalias nocapture nofree noundef nonnull readnone align 4 dereferenceable(4) [[P]], i64 noundef 4617315517961601024) ; IS__CGSCC_NPM-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* noundef nonnull align 8 dereferenceable(24) @[[GLOB1]], i32 noundef 3, void (i32*, i32*, ...)* noundef bitcast (void (i32*, i32*, i32*, float*, i64)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* noalias nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[N_ADDR]], float* noalias nocapture nofree noundef nonnull readnone align 4 dereferenceable(4) [[P]], i64 noundef 4617315517961601024)
; IS__CGSCC_NPM-NEXT: ret void ; IS__CGSCC_NPM-NEXT: ret void
; ;
▲ Show 20 Lines • Show All 123 Lines • ▼ Show 20 Lines
; IS__TUNIT_NPM-NEXT: br label [[OMP_LOOP_EXIT:%.*]] ; IS__TUNIT_NPM-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
; IS__TUNIT_NPM: omp.loop.exit: ; IS__TUNIT_NPM: omp.loop.exit:
; IS__TUNIT_NPM-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTGLOBAL_TID_]], align 4 ; IS__TUNIT_NPM-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTGLOBAL_TID_]], align 4
; IS__TUNIT_NPM-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* noundef nonnull align 8 dereferenceable(24) @[[GLOB0]], i32 [[TMP12]]) ; IS__TUNIT_NPM-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* noundef nonnull align 8 dereferenceable(24) @[[GLOB0]], i32 [[TMP12]])
; IS__TUNIT_NPM-NEXT: br label [[OMP_PRECOND_END]] ; IS__TUNIT_NPM-NEXT: br label [[OMP_PRECOND_END]]
; IS__TUNIT_NPM: omp.precond.end: ; IS__TUNIT_NPM: omp.precond.end:
; IS__TUNIT_NPM-NEXT: ret void ; IS__TUNIT_NPM-NEXT: ret void
; ;
; IS__CGSCC_OPM: Function Attrs: norecurse
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@.omp_outlined. ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@.omp_outlined.
; IS__CGSCC_OPM-SAME: (i32* noalias nocapture nofree readonly [[DOTGLOBAL_TID_:%.*]], i32* noalias nocapture nofree readnone [[DOTBOUND_TID_:%.*]], i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[N:%.*]], float* noalias nocapture nofree nonnull readnone align 4 dereferenceable(4) [[P:%.*]], i64 [[Q:%.*]]) { ; IS__CGSCC_OPM-SAME: (i32* noalias nocapture nofree readonly [[DOTGLOBAL_TID_:%.*]], i32* noalias nocapture nofree readnone [[DOTBOUND_TID_:%.*]], i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[N:%.*]], float* noalias nocapture nofree nonnull readnone align 4 dereferenceable(4) [[P:%.*]], i64 [[Q:%.*]]) #[[ATTR0]] {
; IS__CGSCC_OPM-NEXT: entry: ; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: [[Q_ADDR:%.*]] = alloca i64, align 8 ; IS__CGSCC_OPM-NEXT: [[Q_ADDR:%.*]] = alloca i64, align 8
; IS__CGSCC_OPM-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 ; IS__CGSCC_OPM-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
; IS__CGSCC_OPM-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 ; IS__CGSCC_OPM-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
; IS__CGSCC_OPM-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 ; IS__CGSCC_OPM-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
; IS__CGSCC_OPM-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 ; IS__CGSCC_OPM-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
; IS__CGSCC_OPM-NEXT: store i64 4617315517961601024, i64* [[Q_ADDR]], align 8 ; IS__CGSCC_OPM-NEXT: store i64 4617315517961601024, i64* [[Q_ADDR]], align 8
; IS__CGSCC_OPM-NEXT: [[CONV:%.*]] = bitcast i64* [[Q_ADDR]] to double* ; IS__CGSCC_OPM-NEXT: [[CONV:%.*]] = bitcast i64* [[Q_ADDR]] to double*
▲ Show 20 Lines • Show All 42 Lines • ▼ Show 20 Lines
; IS__CGSCC_OPM-NEXT: br label [[OMP_LOOP_EXIT:%.*]] ; IS__CGSCC_OPM-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
; IS__CGSCC_OPM: omp.loop.exit: ; IS__CGSCC_OPM: omp.loop.exit:
; IS__CGSCC_OPM-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTGLOBAL_TID_]], align 4 ; IS__CGSCC_OPM-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTGLOBAL_TID_]], align 4
; IS__CGSCC_OPM-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* noundef nonnull align 8 dereferenceable(24) @[[GLOB0]], i32 [[TMP12]]) ; IS__CGSCC_OPM-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* noundef nonnull align 8 dereferenceable(24) @[[GLOB0]], i32 [[TMP12]])
; IS__CGSCC_OPM-NEXT: br label [[OMP_PRECOND_END]] ; IS__CGSCC_OPM-NEXT: br label [[OMP_PRECOND_END]]
; IS__CGSCC_OPM: omp.precond.end: ; IS__CGSCC_OPM: omp.precond.end:
; IS__CGSCC_OPM-NEXT: ret void ; IS__CGSCC_OPM-NEXT: ret void
; ;
; IS__CGSCC_NPM: Function Attrs: norecurse
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@.omp_outlined. ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@.omp_outlined.
; IS__CGSCC_NPM-SAME: (i32* noalias nocapture nofree readonly [[DOTGLOBAL_TID_:%.*]], i32* noalias nocapture nofree readnone [[DOTBOUND_TID_:%.*]], i32* noalias nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[N:%.*]], float* noalias nocapture nofree nonnull readnone align 4 dereferenceable(4) [[P:%.*]], i64 [[Q:%.*]]) { ; IS__CGSCC_NPM-SAME: (i32* noalias nocapture nofree readonly [[DOTGLOBAL_TID_:%.*]], i32* noalias nocapture nofree readnone [[DOTBOUND_TID_:%.*]], i32* noalias nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[N:%.*]], float* noalias nocapture nofree nonnull readnone align 4 dereferenceable(4) [[P:%.*]], i64 [[Q:%.*]]) #[[ATTR0]] {
; IS__CGSCC_NPM-NEXT: entry: ; IS__CGSCC_NPM-NEXT: entry:
; IS__CGSCC_NPM-NEXT: [[Q_ADDR:%.*]] = alloca i64, align 8 ; IS__CGSCC_NPM-NEXT: [[Q_ADDR:%.*]] = alloca i64, align 8
; IS__CGSCC_NPM-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 ; IS__CGSCC_NPM-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
; IS__CGSCC_NPM-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 ; IS__CGSCC_NPM-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
; IS__CGSCC_NPM-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 ; IS__CGSCC_NPM-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
; IS__CGSCC_NPM-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 ; IS__CGSCC_NPM-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
; IS__CGSCC_NPM-NEXT: store i64 4617315517961601024, i64* [[Q_ADDR]], align 8 ; IS__CGSCC_NPM-NEXT: store i64 4617315517961601024, i64* [[Q_ADDR]], align 8
; IS__CGSCC_NPM-NEXT: [[CONV:%.*]] = bitcast i64* [[Q_ADDR]] to double* ; IS__CGSCC_NPM-NEXT: [[CONV:%.*]] = bitcast i64* [[Q_ADDR]] to double*
▲ Show 20 Lines • Show All 125 Lines • ▼ Show 20 Lines
declare dso_local void @__kmpc_for_static_fini(%struct.ident_t*, i32) declare dso_local void @__kmpc_for_static_fini(%struct.ident_t*, i32)
declare !callback !0 dso_local void @__kmpc_fork_call(%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) declare !callback !0 dso_local void @__kmpc_fork_call(%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...)
!1 = !{i64 2, i64 -1, i64 -1, i1 true} !1 = !{i64 2, i64 -1, i64 -1, i1 true}
!0 = !{!1} !0 = !{!1}
;. ;.
; IS__CGSCC____: attributes #[[ATTR0:[0-9]+]] = { norecurse }
;.
; CHECK: [[META0:![0-9]+]] = !{!1} ; CHECK: [[META0:![0-9]+]] = !{!1}
; CHECK: [[META1:![0-9]+]] = !{i64 2, i64 -1, i64 -1, i1 true} ; CHECK: [[META1:![0-9]+]] = !{i64 2, i64 -1, i64 -1, i1 true}
;. ;.

llvm/test/Transforms/Attributor/IPConstantProp/pthreads.ll

Show All 39 Lines
; IS__TUNIT____-NEXT: [[ALLOC2:%.*]] = alloca i8, align 8 ; IS__TUNIT____-NEXT: [[ALLOC2:%.*]] = alloca i8, align 8
; IS__TUNIT____-NEXT: [[THREAD:%.*]] = alloca i64, align 8 ; IS__TUNIT____-NEXT: [[THREAD:%.*]] = alloca i64, align 8
; IS__TUNIT____-NEXT: [[CALL:%.*]] = call i32 @pthread_create(i64* noundef nonnull align 8 dereferenceable(8) [[THREAD]], %union.pthread_attr_t* noalias nocapture noundef align 4294967296 null, i8* (i8*)* noundef nonnull @foo, i8* noalias nocapture nofree readnone align 4294967296 undef) ; IS__TUNIT____-NEXT: [[CALL:%.*]] = call i32 @pthread_create(i64* noundef nonnull align 8 dereferenceable(8) [[THREAD]], %union.pthread_attr_t* noalias nocapture noundef align 4294967296 null, i8* (i8*)* noundef nonnull @foo, i8* noalias nocapture nofree readnone align 4294967296 undef)
; IS__TUNIT____-NEXT: [[CALL1:%.*]] = call i32 @pthread_create(i64* noundef nonnull align 8 dereferenceable(8) [[THREAD]], %union.pthread_attr_t* noalias nocapture noundef align 4294967296 null, i8* (i8*)* noundef nonnull @bar, i8* noalias nocapture nofree nonnull readnone align 8 dereferenceable(8) undef) ; IS__TUNIT____-NEXT: [[CALL1:%.*]] = call i32 @pthread_create(i64* noundef nonnull align 8 dereferenceable(8) [[THREAD]], %union.pthread_attr_t* noalias nocapture noundef align 4294967296 null, i8* (i8*)* noundef nonnull @bar, i8* noalias nocapture nofree nonnull readnone align 8 dereferenceable(8) undef)
; IS__TUNIT____-NEXT: [[CALL2:%.*]] = call i32 @pthread_create(i64* noundef nonnull align 8 dereferenceable(8) [[THREAD]], %union.pthread_attr_t* noalias nocapture noundef align 4294967296 null, i8* (i8*)* noundef nonnull @baz, i8* noalias nocapture nofree noundef nonnull readnone align 8 dereferenceable(1) [[ALLOC1]]) ; IS__TUNIT____-NEXT: [[CALL2:%.*]] = call i32 @pthread_create(i64* noundef nonnull align 8 dereferenceable(8) [[THREAD]], %union.pthread_attr_t* noalias nocapture noundef align 4294967296 null, i8* (i8*)* noundef nonnull @baz, i8* noalias nocapture nofree noundef nonnull readnone align 8 dereferenceable(1) [[ALLOC1]])
; IS__TUNIT____-NEXT: [[CALL3:%.*]] = call i32 @pthread_create(i64* noundef nonnull align 8 dereferenceable(8) [[THREAD]], %union.pthread_attr_t* noalias nocapture noundef align 4294967296 null, i8* (i8*)* noundef nonnull @buz, i8* noalias nofree noundef nonnull readnone align 8 dereferenceable(1) "no-capture-maybe-returned" [[ALLOC2]]) ; IS__TUNIT____-NEXT: [[CALL3:%.*]] = call i32 @pthread_create(i64* noundef nonnull align 8 dereferenceable(8) [[THREAD]], %union.pthread_attr_t* noalias nocapture noundef align 4294967296 null, i8* (i8*)* noundef nonnull @buz, i8* noalias nofree noundef nonnull readnone align 8 dereferenceable(1) "no-capture-maybe-returned" [[ALLOC2]])
; IS__TUNIT____-NEXT: ret i32 0 ; IS__TUNIT____-NEXT: ret i32 0
; ;
; IS__CGSCC____-LABEL: define {{[^@]+}}@main() { ; IS__CGSCC____: Function Attrs: norecurse
; IS__CGSCC____-LABEL: define {{[^@]+}}@main
; IS__CGSCC____-SAME: () #[[ATTR0:[0-9]+]] {
; IS__CGSCC____-NEXT: entry: ; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: [[ALLOC1:%.*]] = alloca i8, align 8 ; IS__CGSCC____-NEXT: [[ALLOC1:%.*]] = alloca i8, align 8
; IS__CGSCC____-NEXT: [[ALLOC2:%.*]] = alloca i8, align 8 ; IS__CGSCC____-NEXT: [[ALLOC2:%.*]] = alloca i8, align 8
; IS__CGSCC____-NEXT: [[THREAD:%.*]] = alloca i64, align 8 ; IS__CGSCC____-NEXT: [[THREAD:%.*]] = alloca i64, align 8
; IS__CGSCC____-NEXT: [[CALL:%.*]] = call i32 @pthread_create(i64* noundef nonnull align 8 dereferenceable(8) [[THREAD]], %union.pthread_attr_t* noalias nocapture noundef align 4294967296 null, i8* (i8*)* noundef nonnull @foo, i8* noalias nocapture nofree noundef readnone align 4294967296 null) ; IS__CGSCC____-NEXT: [[CALL:%.*]] = call i32 @pthread_create(i64* noundef nonnull align 8 dereferenceable(8) [[THREAD]], %union.pthread_attr_t* noalias nocapture noundef align 4294967296 null, i8* (i8*)* noundef nonnull @foo, i8* noalias nocapture nofree noundef readnone align 4294967296 null)
; IS__CGSCC____-NEXT: [[CALL1:%.*]] = call i32 @pthread_create(i64* noundef nonnull align 8 dereferenceable(8) [[THREAD]], %union.pthread_attr_t* noalias nocapture noundef align 4294967296 null, i8* (i8*)* noundef nonnull @bar, i8* noalias nocapture nofree noundef nonnull readnone align 8 dereferenceable(8) bitcast (i8** @GlobalVPtr to i8*)) ; IS__CGSCC____-NEXT: [[CALL1:%.*]] = call i32 @pthread_create(i64* noundef nonnull align 8 dereferenceable(8) [[THREAD]], %union.pthread_attr_t* noalias nocapture noundef align 4294967296 null, i8* (i8*)* noundef nonnull @bar, i8* noalias nocapture nofree noundef nonnull readnone align 8 dereferenceable(8) bitcast (i8** @GlobalVPtr to i8*))
; IS__CGSCC____-NEXT: [[CALL2:%.*]] = call i32 @pthread_create(i64* noundef nonnull align 8 dereferenceable(8) [[THREAD]], %union.pthread_attr_t* noalias nocapture noundef align 4294967296 null, i8* (i8*)* noundef nonnull @baz, i8* noalias nocapture nofree noundef nonnull readnone align 8 dereferenceable(1) [[ALLOC1]]) ; IS__CGSCC____-NEXT: [[CALL2:%.*]] = call i32 @pthread_create(i64* noundef nonnull align 8 dereferenceable(8) [[THREAD]], %union.pthread_attr_t* noalias nocapture noundef align 4294967296 null, i8* (i8*)* noundef nonnull @baz, i8* noalias nocapture nofree noundef nonnull readnone align 8 dereferenceable(1) [[ALLOC1]])
; IS__CGSCC____-NEXT: [[CALL3:%.*]] = call i32 @pthread_create(i64* noundef nonnull align 8 dereferenceable(8) [[THREAD]], %union.pthread_attr_t* noalias nocapture noundef align 4294967296 null, i8* (i8*)* noundef nonnull @buz, i8* noalias nofree noundef nonnull readnone align 8 dereferenceable(1) "no-capture-maybe-returned" [[ALLOC2]]) ; IS__CGSCC____-NEXT: [[CALL3:%.*]] = call i32 @pthread_create(i64* noundef nonnull align 8 dereferenceable(8) [[THREAD]], %union.pthread_attr_t* noalias nocapture noundef align 4294967296 null, i8* (i8*)* noundef nonnull @buz, i8* noalias nofree noundef nonnull readnone align 8 dereferenceable(1) "no-capture-maybe-returned" [[ALLOC2]])
; IS__CGSCC____-NEXT: ret i32 0 ; IS__CGSCC____-NEXT: ret i32 0
; ;
entry: entry:
%alloc1 = alloca i8, align 8 %alloc1 = alloca i8, align 8
%alloc2 = alloca i8, align 8 %alloc2 = alloca i8, align 8
%thread = alloca i64, align 8 %thread = alloca i64, align 8
%call = call i32 @pthread_create(i64* nonnull %thread, %union.pthread_attr_t* null, i8* (i8*)* nonnull @foo, i8* null) %call = call i32 @pthread_create(i64* nonnull %thread, %union.pthread_attr_t* null, i8* (i8*)* nonnull @foo, i8* null)
%call1 = call i32 @pthread_create(i64* nonnull %thread, %union.pthread_attr_t* null, i8* (i8*)* nonnull @bar, i8* bitcast (i8** @GlobalVPtr to i8*)) %call1 = call i32 @pthread_create(i64* nonnull %thread, %union.pthread_attr_t* null, i8* (i8*)* nonnull @bar, i8* bitcast (i8** @GlobalVPtr to i8*))
%call2 = call i32 @pthread_create(i64* nonnull %thread, %union.pthread_attr_t* null, i8* (i8*)* nonnull @baz, i8* nocapture %alloc1) %call2 = call i32 @pthread_create(i64* nonnull %thread, %union.pthread_attr_t* null, i8* (i8*)* nonnull @baz, i8* nocapture %alloc1)
%call3 = call i32 @pthread_create(i64* nonnull %thread, %union.pthread_attr_t* null, i8* (i8*)* nonnull @buz, i8* %alloc2) %call3 = call i32 @pthread_create(i64* nonnull %thread, %union.pthread_attr_t* null, i8* (i8*)* nonnull @buz, i8* %alloc2)
ret i32 0 ret i32 0
} }
declare !callback !0 dso_local i32 @pthread_create(i64*, %union.pthread_attr_t*, i8* (i8*)*, i8*) declare !callback !0 dso_local i32 @pthread_create(i64*, %union.pthread_attr_t*, i8* (i8*)*, i8*)
define internal i8* @foo(i8* %arg) { define internal i8* @foo(i8* %arg) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__TUNIT____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@foo ; IS__TUNIT____-LABEL: define {{[^@]+}}@foo
; IS__TUNIT____-SAME: (i8* noalias nocapture nofree readnone align 4294967296 [[ARG:%.*]]) #[[ATTR0:[0-9]+]] { ; IS__TUNIT____-SAME: (i8* noalias nocapture nofree readnone align 4294967296 [[ARG:%.*]]) #[[ATTR0:[0-9]+]] {
; IS__TUNIT____-NEXT: entry: ; IS__TUNIT____-NEXT: entry:
; IS__TUNIT____-NEXT: ret i8* null ; IS__TUNIT____-NEXT: ret i8* null
; ;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@foo ; IS__CGSCC____-LABEL: define {{[^@]+}}@foo
; IS__CGSCC____-SAME: (i8* noalias nocapture nofree readnone align 4294967296 [[ARG:%.*]]) #[[ATTR0:[0-9]+]] { ; IS__CGSCC____-SAME: (i8* noalias nocapture nofree readnone align 4294967296 [[ARG:%.*]]) #[[ATTR1:[0-9]+]] {
; IS__CGSCC____-NEXT: entry: ; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: ret i8* null ; IS__CGSCC____-NEXT: ret i8* null
; ;
entry: entry:
ret i8* %arg ret i8* %arg
} }
define internal i8* @bar(i8* %arg) { define internal i8* @bar(i8* %arg) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__TUNIT____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@bar ; IS__TUNIT____-LABEL: define {{[^@]+}}@bar
; IS__TUNIT____-SAME: (i8* noalias nocapture nofree nonnull readnone align 8 dereferenceable(8) [[ARG:%.*]]) #[[ATTR0]] { ; IS__TUNIT____-SAME: (i8* noalias nocapture nofree nonnull readnone align 8 dereferenceable(8) [[ARG:%.*]]) #[[ATTR0]] {
; IS__TUNIT____-NEXT: entry: ; IS__TUNIT____-NEXT: entry:
; IS__TUNIT____-NEXT: ret i8* bitcast (i8** @GlobalVPtr to i8*) ; IS__TUNIT____-NEXT: ret i8* bitcast (i8** @GlobalVPtr to i8*)
; ;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@bar ; IS__CGSCC____-LABEL: define {{[^@]+}}@bar
; IS__CGSCC____-SAME: (i8* noalias nocapture nofree nonnull readnone align 8 dereferenceable(8) [[ARG:%.*]]) #[[ATTR0]] { ; IS__CGSCC____-SAME: (i8* noalias nocapture nofree nonnull readnone align 8 dereferenceable(8) [[ARG:%.*]]) #[[ATTR1]] {
; IS__CGSCC____-NEXT: entry: ; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: ret i8* bitcast (i8** @GlobalVPtr to i8*) ; IS__CGSCC____-NEXT: ret i8* bitcast (i8** @GlobalVPtr to i8*)
; ;
entry: entry:
ret i8* %arg ret i8* %arg
} }
define internal i8* @baz(i8* %arg) { define internal i8* @baz(i8* %arg) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__TUNIT____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@baz ; IS__TUNIT____-LABEL: define {{[^@]+}}@baz
; IS__TUNIT____-SAME: (i8* noalias nofree noundef nonnull readnone returned align 8 dereferenceable(1) "no-capture-maybe-returned" [[ARG:%.*]]) #[[ATTR0]] { ; IS__TUNIT____-SAME: (i8* noalias nofree noundef nonnull readnone returned align 8 dereferenceable(1) "no-capture-maybe-returned" [[ARG:%.*]]) #[[ATTR0]] {
; IS__TUNIT____-NEXT: entry: ; IS__TUNIT____-NEXT: entry:
; IS__TUNIT____-NEXT: ret i8* [[ARG]] ; IS__TUNIT____-NEXT: ret i8* [[ARG]]
; ;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@baz ; IS__CGSCC____-LABEL: define {{[^@]+}}@baz
; IS__CGSCC____-SAME: (i8* noalias nofree noundef nonnull readnone returned align 8 dereferenceable(1) "no-capture-maybe-returned" [[ARG:%.*]]) #[[ATTR0]] { ; IS__CGSCC____-SAME: (i8* noalias nofree noundef nonnull readnone returned align 8 dereferenceable(1) "no-capture-maybe-returned" [[ARG:%.*]]) #[[ATTR1]] {
; IS__CGSCC____-NEXT: entry: ; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: ret i8* [[ARG]] ; IS__CGSCC____-NEXT: ret i8* [[ARG]]
; ;
entry: entry:
ret i8* %arg ret i8* %arg
} }
define internal i8* @buz(i8* %arg) { define internal i8* @buz(i8* %arg) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__TUNIT____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@buz ; IS__TUNIT____-LABEL: define {{[^@]+}}@buz
; IS__TUNIT____-SAME: (i8* noalias nofree noundef nonnull readnone returned align 8 dereferenceable(1) "no-capture-maybe-returned" [[ARG:%.*]]) #[[ATTR0]] { ; IS__TUNIT____-SAME: (i8* noalias nofree noundef nonnull readnone returned align 8 dereferenceable(1) "no-capture-maybe-returned" [[ARG:%.*]]) #[[ATTR0]] {
; IS__TUNIT____-NEXT: entry: ; IS__TUNIT____-NEXT: entry:
; IS__TUNIT____-NEXT: ret i8* [[ARG]] ; IS__TUNIT____-NEXT: ret i8* [[ARG]]
; ;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@buz ; IS__CGSCC____-LABEL: define {{[^@]+}}@buz
; IS__CGSCC____-SAME: (i8* noalias nofree noundef nonnull readnone returned align 8 dereferenceable(1) "no-capture-maybe-returned" [[ARG:%.*]]) #[[ATTR0]] { ; IS__CGSCC____-SAME: (i8* noalias nofree noundef nonnull readnone returned align 8 dereferenceable(1) "no-capture-maybe-returned" [[ARG:%.*]]) #[[ATTR1]] {
; IS__CGSCC____-NEXT: entry: ; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: ret i8* [[ARG]] ; IS__CGSCC____-NEXT: ret i8* [[ARG]]
; ;
entry: entry:
ret i8* %arg ret i8* %arg
} }
!1 = !{i64 2, i64 3, i1 false} !1 = !{i64 2, i64 3, i1 false}
!0 = !{!1} !0 = !{!1}
;. ;.
; IS__TUNIT____: attributes #[[ATTR0]] = { nofree nosync nounwind readnone willreturn } ; IS__TUNIT____: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn }
;. ;.
; IS__CGSCC____: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn } ; IS__CGSCC____: attributes #[[ATTR0]] = { norecurse }
; IS__CGSCC____: attributes #[[ATTR1]] = { nofree norecurse nosync nounwind readnone willreturn }
;. ;.
; CHECK: [[META0:![0-9]+]] = !{!1} ; CHECK: [[META0:![0-9]+]] = !{!1}
; CHECK: [[META1:![0-9]+]] = !{i64 2, i64 3, i1 false} ; CHECK: [[META1:![0-9]+]] = !{i64 2, i64 3, i1 false}
;. ;.

llvm/test/Transforms/Attributor/IPConstantProp/recursion.ll

Show All 12 Lines
; IS__CGSCC____-NEXT: ret i32 undef ; IS__CGSCC____-NEXT: ret i32 undef
; ;
%Y = call i32 @foo( i32 %X ) ; <i32> [#uses=1] %Y = call i32 @foo( i32 %X ) ; <i32> [#uses=1]
%Z = add i32 %Y, 1 ; <i32> [#uses=1] %Z = add i32 %Y, 1 ; <i32> [#uses=1]
ret i32 %Z ret i32 %Z
} }
define void @bar() { define void @bar() {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@bar ; CHECK-LABEL: define {{[^@]+}}@bar
; IS__TUNIT____-SAME: () #[[ATTR0:[0-9]+]] { ; CHECK-SAME: () #[[ATTR0:[0-9]+]] {
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@bar
; IS__CGSCC____-SAME: () #[[ATTR0]] {
; IS__CGSCC____-NEXT: ret void
; ;
call i32 @foo( i32 17 ) ; <i32>:1 [#uses=0] call i32 @foo( i32 17 ) ; <i32>:1 [#uses=0]
ret void ret void
} }
;. ;.
; IS__TUNIT____: attributes #[[ATTR0]] = { nofree nosync nounwind readnone willreturn } ; CHECK: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn }
;.
; IS__CGSCC____: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn }
;. ;.

llvm/test/Transforms/Attributor/IPConstantProp/remove-call-inst.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals
; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM ; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM
; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM ; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM
; PR5596 ; PR5596
; IPSCCP should propagate the 0 argument, eliminate the switch, and propagate ; IPSCCP should propagate the 0 argument, eliminate the switch, and propagate
; the result. ; the result.
; FIXME: Remove obsolete calls/instructions ; FIXME: Remove obsolete calls/instructions
define i32 @main() noreturn nounwind { define i32 @main() noreturn nounwind {
; IS__TUNIT____: Function Attrs: nofree noreturn nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse noreturn nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@main ; CHECK-LABEL: define {{[^@]+}}@main
; IS__TUNIT____-SAME: () #[[ATTR0:[0-9]+]] { ; CHECK-SAME: () #[[ATTR0:[0-9]+]] {
; IS__TUNIT____-NEXT: entry: ; CHECK-NEXT: entry:
; IS__TUNIT____-NEXT: ret i32 123 ; CHECK-NEXT: ret i32 123
;
; IS__CGSCC____: Function Attrs: nofree norecurse noreturn nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@main
; IS__CGSCC____-SAME: () #[[ATTR0:[0-9]+]] {
; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: ret i32 123
; ;
entry: entry:
%call2 = tail call i32 @wwrite(i64 0) nounwind %call2 = tail call i32 @wwrite(i64 0) nounwind
ret i32 %call2 ret i32 %call2
} }
define internal i32 @wwrite(i64 %i) nounwind readnone { define internal i32 @wwrite(i64 %i) nounwind readnone {
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
Show All 17 Lines
sw.default: sw.default:
ret i32 123 ret i32 123
return: return:
ret i32 0 ret i32 0
} }
;. ;.
; IS__TUNIT____: attributes #[[ATTR0]] = { nofree noreturn nosync nounwind readnone willreturn } ; IS__TUNIT____: attributes #[[ATTR0]] = { nofree norecurse noreturn nosync nounwind readnone willreturn }
;. ;.
; IS__CGSCC____: attributes #[[ATTR0]] = { nofree norecurse noreturn nosync nounwind readnone willreturn } ; IS__CGSCC____: attributes #[[ATTR0]] = { nofree norecurse noreturn nosync nounwind readnone willreturn }
; IS__CGSCC____: attributes #[[ATTR1]] = { nofree norecurse nosync nounwind readnone willreturn } ; IS__CGSCC____: attributes #[[ATTR1]] = { nofree norecurse nosync nounwind readnone willreturn }
;. ;.

llvm/test/Transforms/Attributor/IPConstantProp/return-argument.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals
; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=3 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM ; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=3 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=3 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=3 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM
; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM ; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM
;; This function returns its second argument on all return statements ;; This function returns its second argument on all return statements
define internal i32* @incdec(i1 %C, i32* %V) { define internal i32* @incdec(i1 %C, i32* %V) {
; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind willreturn ; NOT_CGSCC_NPM: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@incdec ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@incdec
; IS__TUNIT____-SAME: (i1 [[C:%.*]], i32* noalias nofree noundef nonnull returned align 4 dereferenceable(4) "no-capture-maybe-returned" [[V:%.*]]) #[[ATTR0:[0-9]+]] { ; NOT_CGSCC_NPM-SAME: (i1 [[C:%.*]], i32* noalias nofree noundef nonnull returned align 4 dereferenceable(4) "no-capture-maybe-returned" [[V:%.*]]) #[[ATTR0:[0-9]+]] {
; IS__TUNIT____-NEXT: [[X:%.*]] = load i32, i32* [[V]], align 4 ; NOT_CGSCC_NPM-NEXT: [[X:%.*]] = load i32, i32* [[V]], align 4
; IS__TUNIT____-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]] ; NOT_CGSCC_NPM-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]]
; IS__TUNIT____: T: ; NOT_CGSCC_NPM: T:
; IS__TUNIT____-NEXT: [[X1:%.*]] = add i32 [[X]], 1 ; NOT_CGSCC_NPM-NEXT: [[X1:%.*]] = add i32 [[X]], 1
; IS__TUNIT____-NEXT: store i32 [[X1]], i32* [[V]], align 4 ; NOT_CGSCC_NPM-NEXT: store i32 [[X1]], i32* [[V]], align 4
; IS__TUNIT____-NEXT: ret i32* [[V]] ; NOT_CGSCC_NPM-NEXT: ret i32* [[V]]
; IS__TUNIT____: F: ; NOT_CGSCC_NPM: F:
; IS__TUNIT____-NEXT: [[X2:%.*]] = sub i32 [[X]], 1 ; NOT_CGSCC_NPM-NEXT: [[X2:%.*]] = sub i32 [[X]], 1
; IS__TUNIT____-NEXT: store i32 [[X2]], i32* [[V]], align 4 ; NOT_CGSCC_NPM-NEXT: store i32 [[X2]], i32* [[V]], align 4
; IS__TUNIT____-NEXT: ret i32* [[V]] ; NOT_CGSCC_NPM-NEXT: ret i32* [[V]]
;
; IS__CGSCC_OPM: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@incdec
; IS__CGSCC_OPM-SAME: (i1 [[C:%.*]], i32* noalias nofree noundef nonnull returned align 4 dereferenceable(4) "no-capture-maybe-returned" [[V:%.*]]) #[[ATTR0:[0-9]+]] {
; IS__CGSCC_OPM-NEXT: [[X:%.*]] = load i32, i32* [[V]], align 4
; IS__CGSCC_OPM-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]]
; IS__CGSCC_OPM: T:
; IS__CGSCC_OPM-NEXT: [[X1:%.*]] = add i32 [[X]], 1
; IS__CGSCC_OPM-NEXT: store i32 [[X1]], i32* [[V]], align 4
; IS__CGSCC_OPM-NEXT: ret i32* [[V]]
; IS__CGSCC_OPM: F:
; IS__CGSCC_OPM-NEXT: [[X2:%.*]] = sub i32 [[X]], 1
; IS__CGSCC_OPM-NEXT: store i32 [[X2]], i32* [[V]], align 4
; IS__CGSCC_OPM-NEXT: ret i32* [[V]]
; ;
; IS__CGSCC_NPM: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn ; IS__CGSCC_NPM: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@incdec ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@incdec
; IS__CGSCC_NPM-SAME: (i1 [[C:%.*]], i32* noalias nofree noundef nonnull align 4 dereferenceable(4) "no-capture-maybe-returned" [[V:%.*]]) #[[ATTR0:[0-9]+]] { ; IS__CGSCC_NPM-SAME: (i1 [[C:%.*]], i32* noalias nofree noundef nonnull align 4 dereferenceable(4) "no-capture-maybe-returned" [[V:%.*]]) #[[ATTR0:[0-9]+]] {
; IS__CGSCC_NPM-NEXT: [[X:%.*]] = load i32, i32* [[V]], align 4 ; IS__CGSCC_NPM-NEXT: [[X:%.*]] = load i32, i32* [[V]], align 4
; IS__CGSCC_NPM-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]] ; IS__CGSCC_NPM-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]]
; IS__CGSCC_NPM: T: ; IS__CGSCC_NPM: T:
; IS__CGSCC_NPM-NEXT: [[X1:%.*]] = add i32 [[X]], 1 ; IS__CGSCC_NPM-NEXT: [[X1:%.*]] = add i32 [[X]], 1
Show All 16 LinesF: ; preds = %0
%X2 = sub i32 %X, 1 %X2 = sub i32 %X, 1
store i32 %X2, i32* %V store i32 %X2, i32* %V
ret i32* %V ret i32* %V
} }
;; This function returns its first argument as a part of a multiple return ;; This function returns its first argument as a part of a multiple return
;; value ;; value
define internal { i32, i32 } @foo(i32 %A, i32 %B) { define internal { i32, i32 } @foo(i32 %A, i32 %B) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@foo ; CHECK-LABEL: define {{[^@]+}}@foo
; IS__TUNIT____-SAME: (i32 noundef [[A:%.*]], i32 noundef [[B:%.*]]) #[[ATTR1:[0-9]+]] { ; CHECK-SAME: (i32 noundef [[A:%.*]], i32 noundef [[B:%.*]]) #[[ATTR1:[0-9]+]] {
; IS__TUNIT____-NEXT: [[X:%.*]] = add i32 [[A]], [[B]] ; CHECK-NEXT: [[X:%.*]] = add i32 [[A]], [[B]]
; IS__TUNIT____-NEXT: [[Y:%.*]] = insertvalue { i32, i32 } undef, i32 [[A]], 0 ; CHECK-NEXT: [[Y:%.*]] = insertvalue { i32, i32 } undef, i32 [[A]], 0
; IS__TUNIT____-NEXT: [[Z:%.*]] = insertvalue { i32, i32 } [[Y]], i32 [[X]], 1 ; CHECK-NEXT: [[Z:%.*]] = insertvalue { i32, i32 } [[Y]], i32 [[X]], 1
; IS__TUNIT____-NEXT: ret { i32, i32 } [[Z]] ; CHECK-NEXT: ret { i32, i32 } [[Z]]
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@foo
; IS__CGSCC____-SAME: (i32 noundef [[A:%.*]], i32 noundef [[B:%.*]]) #[[ATTR1:[0-9]+]] {
; IS__CGSCC____-NEXT: [[X:%.*]] = add i32 [[A]], [[B]]
; IS__CGSCC____-NEXT: [[Y:%.*]] = insertvalue { i32, i32 } undef, i32 [[A]], 0
; IS__CGSCC____-NEXT: [[Z:%.*]] = insertvalue { i32, i32 } [[Y]], i32 [[X]], 1
; IS__CGSCC____-NEXT: ret { i32, i32 } [[Z]]
; ;
%X = add i32 %A, %B %X = add i32 %A, %B
%Y = insertvalue { i32, i32 } undef, i32 %A, 0 %Y = insertvalue { i32, i32 } undef, i32 %A, 0
%Z = insertvalue { i32, i32 } %Y, i32 %X, 1 %Z = insertvalue { i32, i32 } %Y, i32 %X, 1
ret { i32, i32 } %Z ret { i32, i32 } %Z
} }
define void @caller(i1 %C) personality i32 (...)* @__gxx_personality_v0 { define void @caller(i1 %C) personality i32 (...)* @__gxx_personality_v0 {
; IS__TUNIT_OPM: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@caller ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@caller
; IS__TUNIT_OPM-SAME: (i1 [[C:%.*]]) #[[ATTR1]] personality i32 (...)* @__gxx_personality_v0 { ; IS__TUNIT_OPM-SAME: (i1 [[C:%.*]]) #[[ATTR1]] personality i32 (...)* @__gxx_personality_v0 {
; IS__TUNIT_OPM-NEXT: [[Q:%.*]] = alloca i32, align 4 ; IS__TUNIT_OPM-NEXT: [[Q:%.*]] = alloca i32, align 4
; IS__TUNIT_OPM-NEXT: [[W:%.*]] = call align 4 i32* @incdec(i1 [[C]], i32* noalias nofree noundef nonnull align 4 dereferenceable(4) "no-capture-maybe-returned" [[Q]]) #[[ATTR2:[0-9]+]] ; IS__TUNIT_OPM-NEXT: [[W:%.*]] = call align 4 i32* @incdec(i1 [[C]], i32* noalias nofree noundef nonnull align 4 dereferenceable(4) "no-capture-maybe-returned" [[Q]]) #[[ATTR2:[0-9]+]]
; IS__TUNIT_OPM-NEXT: [[S1:%.*]] = call { i32, i32 } @foo(i32 noundef 1, i32 noundef 2) #[[ATTR1]] ; IS__TUNIT_OPM-NEXT: [[S1:%.*]] = call { i32, i32 } @foo(i32 noundef 1, i32 noundef 2) #[[ATTR3:[0-9]+]]
; IS__TUNIT_OPM-NEXT: [[X1:%.*]] = extractvalue { i32, i32 } [[S1]], 0 ; IS__TUNIT_OPM-NEXT: [[X1:%.*]] = extractvalue { i32, i32 } [[S1]], 0
; IS__TUNIT_OPM-NEXT: [[S2:%.*]] = call { i32, i32 } @foo(i32 noundef 3, i32 noundef 4) #[[ATTR1]] ; IS__TUNIT_OPM-NEXT: [[S2:%.*]] = call { i32, i32 } @foo(i32 noundef 3, i32 noundef 4) #[[ATTR3]]
; IS__TUNIT_OPM-NEXT: br label [[OK:%.*]] ; IS__TUNIT_OPM-NEXT: br label [[OK:%.*]]
; IS__TUNIT_OPM: OK: ; IS__TUNIT_OPM: OK:
; IS__TUNIT_OPM-NEXT: [[X2:%.*]] = extractvalue { i32, i32 } [[S2]], 0 ; IS__TUNIT_OPM-NEXT: [[X2:%.*]] = extractvalue { i32, i32 } [[S2]], 0
; IS__TUNIT_OPM-NEXT: [[Z:%.*]] = add i32 [[X1]], [[X2]] ; IS__TUNIT_OPM-NEXT: [[Z:%.*]] = add i32 [[X1]], [[X2]]
; IS__TUNIT_OPM-NEXT: store i32 [[Z]], i32* [[W]], align 4 ; IS__TUNIT_OPM-NEXT: store i32 [[Z]], i32* [[W]], align 4
; IS__TUNIT_OPM-NEXT: br label [[RET:%.*]] ; IS__TUNIT_OPM-NEXT: br label [[RET:%.*]]
; IS__TUNIT_OPM: LPAD: ; IS__TUNIT_OPM: LPAD:
; IS__TUNIT_OPM-NEXT: unreachable ; IS__TUNIT_OPM-NEXT: unreachable
; IS__TUNIT_OPM: RET: ; IS__TUNIT_OPM: RET:
; IS__TUNIT_OPM-NEXT: ret void ; IS__TUNIT_OPM-NEXT: ret void
; ;
; IS__TUNIT_NPM: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__TUNIT_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@caller ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@caller
; IS__TUNIT_NPM-SAME: (i1 [[C:%.*]]) #[[ATTR1]] personality i32 (...)* @__gxx_personality_v0 { ; IS__TUNIT_NPM-SAME: (i1 [[C:%.*]]) #[[ATTR1]] personality i32 (...)* @__gxx_personality_v0 {
; IS__TUNIT_NPM-NEXT: [[Q:%.*]] = alloca i32, align 4 ; IS__TUNIT_NPM-NEXT: [[Q:%.*]] = alloca i32, align 4
; IS__TUNIT_NPM-NEXT: [[W:%.*]] = call align 4 i32* @incdec(i1 [[C]], i32* noalias nofree noundef nonnull align 4 dereferenceable(4) "no-capture-maybe-returned" [[Q]]) #[[ATTR2:[0-9]+]] ; IS__TUNIT_NPM-NEXT: [[W:%.*]] = call align 4 i32* @incdec(i1 [[C]], i32* noalias nofree noundef nonnull align 4 dereferenceable(4) "no-capture-maybe-returned" [[Q]]) #[[ATTR2:[0-9]+]]
; IS__TUNIT_NPM-NEXT: [[S1:%.*]] = call { i32, i32 } @foo(i32 noundef 1, i32 noundef 2) #[[ATTR1]] ; IS__TUNIT_NPM-NEXT: [[S1:%.*]] = call { i32, i32 } @foo(i32 noundef 1, i32 noundef 2) #[[ATTR3:[0-9]+]]
; IS__TUNIT_NPM-NEXT: [[X1:%.*]] = extractvalue { i32, i32 } [[S1]], 0 ; IS__TUNIT_NPM-NEXT: [[X1:%.*]] = extractvalue { i32, i32 } [[S1]], 0
; IS__TUNIT_NPM-NEXT: [[S2:%.*]] = call { i32, i32 } @foo(i32 noundef 3, i32 noundef 4) #[[ATTR1]] ; IS__TUNIT_NPM-NEXT: [[S2:%.*]] = call { i32, i32 } @foo(i32 noundef 3, i32 noundef 4) #[[ATTR3]]
; IS__TUNIT_NPM-NEXT: br label [[OK:%.*]] ; IS__TUNIT_NPM-NEXT: br label [[OK:%.*]]
; IS__TUNIT_NPM: OK: ; IS__TUNIT_NPM: OK:
; IS__TUNIT_NPM-NEXT: [[X2:%.*]] = extractvalue { i32, i32 } [[S2]], 0 ; IS__TUNIT_NPM-NEXT: [[X2:%.*]] = extractvalue { i32, i32 } [[S2]], 0
; IS__TUNIT_NPM-NEXT: [[Z:%.*]] = add i32 [[X1]], [[X2]] ; IS__TUNIT_NPM-NEXT: [[Z:%.*]] = add i32 [[X1]], [[X2]]
; IS__TUNIT_NPM-NEXT: store i32 [[Z]], i32* [[Q]], align 4 ; IS__TUNIT_NPM-NEXT: store i32 [[Z]], i32* [[Q]], align 4
; IS__TUNIT_NPM-NEXT: br label [[RET:%.*]] ; IS__TUNIT_NPM-NEXT: br label [[RET:%.*]]
; IS__TUNIT_NPM: LPAD: ; IS__TUNIT_NPM: LPAD:
; IS__TUNIT_NPM-NEXT: unreachable ; IS__TUNIT_NPM-NEXT: unreachable
▲ Show 20 Lines • Show All 61 Lines • ▼ Show 20 LinesLPAD:
br label %RET br label %RET
RET: RET:
ret void ret void
} }
declare i32 @__gxx_personality_v0(...) declare i32 @__gxx_personality_v0(...)
;. ;.
; IS__TUNIT____: attributes #[[ATTR0]] = { argmemonly nofree nosync nounwind willreturn } ; IS__TUNIT____: attributes #[[ATTR0]] = { argmemonly nofree norecurse nosync nounwind willreturn }
; IS__TUNIT____: attributes #[[ATTR1]] = { nofree nosync nounwind readnone willreturn } ; IS__TUNIT____: attributes #[[ATTR1]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__TUNIT____: attributes #[[ATTR2:[0-9]+]] = { nofree nosync nounwind willreturn } ; IS__TUNIT____: attributes #[[ATTR2:[0-9]+]] = { nofree nosync nounwind willreturn }
; IS__TUNIT____: attributes #[[ATTR3:[0-9]+]] = { nofree nosync nounwind readnone willreturn }
;. ;.
; IS__CGSCC____: attributes #[[ATTR0:[0-9]+]] = { argmemonly nofree norecurse nosync nounwind willreturn } ; IS__CGSCC____: attributes #[[ATTR0]] = { argmemonly nofree norecurse nosync nounwind willreturn }
; IS__CGSCC____: attributes #[[ATTR1]] = { nofree norecurse nosync nounwind readnone willreturn } ; IS__CGSCC____: attributes #[[ATTR1]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__CGSCC____: attributes #[[ATTR2:[0-9]+]] = { nounwind willreturn } ; IS__CGSCC____: attributes #[[ATTR2:[0-9]+]] = { nounwind willreturn }
; IS__CGSCC____: attributes #[[ATTR3:[0-9]+]] = { readnone willreturn } ; IS__CGSCC____: attributes #[[ATTR3:[0-9]+]] = { readnone willreturn }
; IS__CGSCC____: attributes #[[ATTR4:[0-9]+]] = { nounwind readnone willreturn } ; IS__CGSCC____: attributes #[[ATTR4:[0-9]+]] = { nounwind readnone willreturn }
;. ;.

llvm/test/Transforms/Attributor/IPConstantProp/return-constant.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals
; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=5 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM ; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=5 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=5 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=5 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM
; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM ; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM
; FIXME: icmp folding is missing ; FIXME: icmp folding is missing
define i1 @invokecaller(i1 %C) personality i32 (...)* @__gxx_personality_v0 { define i1 @invokecaller(i1 %C) personality i32 (...)* @__gxx_personality_v0 {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@invokecaller ; CHECK-LABEL: define {{[^@]+}}@invokecaller
; IS__TUNIT____-SAME: (i1 [[C:%.*]]) #[[ATTR0:[0-9]+]] personality i32 (...)* @__gxx_personality_v0 { ; CHECK-SAME: (i1 [[C:%.*]]) #[[ATTR0:[0-9]+]] personality i32 (...)* @__gxx_personality_v0 {
; IS__TUNIT____-NEXT: [[X:%.*]] = call i32 @foo(i1 [[C]]) #[[ATTR1:[0-9]+]] ; CHECK-NEXT: [[X:%.*]] = call i32 @foo(i1 [[C]]) #[[ATTR1:[0-9]+]]
; IS__TUNIT____-NEXT: br label [[OK:%.*]] ; CHECK-NEXT: br label [[OK:%.*]]
; IS__TUNIT____: OK: ; CHECK: OK:
; IS__TUNIT____-NEXT: ret i1 true ; CHECK-NEXT: ret i1 true
; IS__TUNIT____: FAIL: ; CHECK: FAIL:
; IS__TUNIT____-NEXT: unreachable ; CHECK-NEXT: unreachable
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@invokecaller
; IS__CGSCC____-SAME: (i1 [[C:%.*]]) #[[ATTR0:[0-9]+]] personality i32 (...)* @__gxx_personality_v0 {
; IS__CGSCC____-NEXT: [[X:%.*]] = call i32 @foo(i1 [[C]]) #[[ATTR1:[0-9]+]]
; IS__CGSCC____-NEXT: br label [[OK:%.*]]
; IS__CGSCC____: OK:
; IS__CGSCC____-NEXT: ret i1 true
; IS__CGSCC____: FAIL:
; IS__CGSCC____-NEXT: unreachable
; ;
%X = invoke i32 @foo( i1 %C ) to label %OK unwind label %FAIL ; <i32> [#uses=1] %X = invoke i32 @foo( i1 %C ) to label %OK unwind label %FAIL ; <i32> [#uses=1]
OK: OK:
%Y = icmp ne i32 %X, 0 ; <i1> [#uses=1] %Y = icmp ne i32 %X, 0 ; <i1> [#uses=1]
ret i1 %Y ret i1 %Y
FAIL: FAIL:
%exn = landingpad {i8*, i32} %exn = landingpad {i8*, i32}
cleanup cleanup
ret i1 false ret i1 false
} }
define internal i32 @foo(i1 %C) { define internal i32 @foo(i1 %C) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@foo ; CHECK-LABEL: define {{[^@]+}}@foo
; IS__TUNIT____-SAME: (i1 [[C:%.*]]) #[[ATTR0]] { ; CHECK-SAME: (i1 [[C:%.*]]) #[[ATTR0]] {
; IS__TUNIT____-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]] ; CHECK-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]]
; IS__TUNIT____: T: ; CHECK: T:
; IS__TUNIT____-NEXT: ret i32 undef ; CHECK-NEXT: ret i32 undef
; IS__TUNIT____: F: ; CHECK: F:
; IS__TUNIT____-NEXT: ret i32 undef ; CHECK-NEXT: ret i32 undef
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@foo
; IS__CGSCC____-SAME: (i1 [[C:%.*]]) #[[ATTR0]] {
; IS__CGSCC____-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]]
; IS__CGSCC____: T:
; IS__CGSCC____-NEXT: ret i32 undef
; IS__CGSCC____: F:
; IS__CGSCC____-NEXT: ret i32 undef
; ;
br i1 %C, label %T, label %F br i1 %C, label %T, label %F
T: ; preds = %0 T: ; preds = %0
ret i32 52 ret i32 52
F: ; preds = %0 F: ; preds = %0
ret i32 52 ret i32 52
} }
define i1 @caller(i1 %C) { define i1 @caller(i1 %C) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@caller ; CHECK-LABEL: define {{[^@]+}}@caller
; IS__TUNIT____-SAME: (i1 [[C:%.*]]) #[[ATTR0]] { ; CHECK-SAME: (i1 [[C:%.*]]) #[[ATTR0]] {
; IS__TUNIT____-NEXT: ret i1 true ; CHECK-NEXT: ret i1 true
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@caller
; IS__CGSCC____-SAME: (i1 [[C:%.*]]) #[[ATTR0]] {
; IS__CGSCC____-NEXT: ret i1 true
; ;
%X = call i32 @foo( i1 %C ) ; <i32> [#uses=1] %X = call i32 @foo( i1 %C ) ; <i32> [#uses=1]
%Y = icmp ne i32 %X, 0 ; <i1> [#uses=1] %Y = icmp ne i32 %X, 0 ; <i1> [#uses=1]
ret i1 %Y ret i1 %Y
} }
declare i32 @__gxx_personality_v0(...) declare i32 @__gxx_personality_v0(...)
;. ;.
; IS__TUNIT____: attributes #[[ATTR0]] = { nofree nosync nounwind readnone willreturn } ; CHECK: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__TUNIT____: attributes #[[ATTR1]] = { nounwind readnone } ; CHECK: attributes #[[ATTR1]] = { nounwind readnone }
;.
; IS__CGSCC____: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__CGSCC____: attributes #[[ATTR1]] = { nounwind readnone }
;. ;.

llvm/test/Transforms/Attributor/IPConstantProp/return-constants.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals
; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=8 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM ; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=8 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=8 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=8 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM
; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM ; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM
;; FIXME: support for extractvalue and insertvalue missing. ;; FIXME: support for extractvalue and insertvalue missing.
%0 = type { i32, i32 } %0 = type { i32, i32 }
define internal %0 @foo(i1 %Q) { define internal %0 @foo(i1 %Q) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@foo ; CHECK-LABEL: define {{[^@]+}}@foo
; IS__TUNIT____-SAME: (i1 [[Q:%.*]]) #[[ATTR0:[0-9]+]] { ; CHECK-SAME: (i1 [[Q:%.*]]) #[[ATTR0:[0-9]+]] {
; IS__TUNIT____-NEXT: br i1 [[Q]], label [[T:%.*]], label [[F:%.*]] ; CHECK-NEXT: br i1 [[Q]], label [[T:%.*]], label [[F:%.*]]
; IS__TUNIT____: T: ; CHECK: T:
; IS__TUNIT____-NEXT: [[MRV:%.*]] = insertvalue [[TMP0:%.*]] undef, i32 21, 0 ; CHECK-NEXT: [[MRV:%.*]] = insertvalue [[TMP0:%.*]] undef, i32 21, 0
; IS__TUNIT____-NEXT: [[MRV1:%.*]] = insertvalue [[TMP0]] [[MRV]], i32 22, 1 ; CHECK-NEXT: [[MRV1:%.*]] = insertvalue [[TMP0]] [[MRV]], i32 22, 1
; IS__TUNIT____-NEXT: ret [[TMP0]] [[MRV1]] ; CHECK-NEXT: ret [[TMP0]] [[MRV1]]
; IS__TUNIT____: F: ; CHECK: F:
; IS__TUNIT____-NEXT: [[MRV2:%.*]] = insertvalue [[TMP0]] undef, i32 21, 0 ; CHECK-NEXT: [[MRV2:%.*]] = insertvalue [[TMP0]] undef, i32 21, 0
; IS__TUNIT____-NEXT: [[MRV3:%.*]] = insertvalue [[TMP0]] [[MRV2]], i32 23, 1 ; CHECK-NEXT: [[MRV3:%.*]] = insertvalue [[TMP0]] [[MRV2]], i32 23, 1
; IS__TUNIT____-NEXT: ret [[TMP0]] [[MRV3]] ; CHECK-NEXT: ret [[TMP0]] [[MRV3]]
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@foo
; IS__CGSCC____-SAME: (i1 [[Q:%.*]]) #[[ATTR0:[0-9]+]] {
; IS__CGSCC____-NEXT: br i1 [[Q]], label [[T:%.*]], label [[F:%.*]]
; IS__CGSCC____: T:
; IS__CGSCC____-NEXT: [[MRV:%.*]] = insertvalue [[TMP0:%.*]] undef, i32 21, 0
; IS__CGSCC____-NEXT: [[MRV1:%.*]] = insertvalue [[TMP0]] [[MRV]], i32 22, 1
; IS__CGSCC____-NEXT: ret [[TMP0]] [[MRV1]]
; IS__CGSCC____: F:
; IS__CGSCC____-NEXT: [[MRV2:%.*]] = insertvalue [[TMP0]] undef, i32 21, 0
; IS__CGSCC____-NEXT: [[MRV3:%.*]] = insertvalue [[TMP0]] [[MRV2]], i32 23, 1
; IS__CGSCC____-NEXT: ret [[TMP0]] [[MRV3]]
; ;
br i1 %Q, label %T, label %F br i1 %Q, label %T, label %F
T: ; preds = %0 T: ; preds = %0
%mrv = insertvalue %0 undef, i32 21, 0 %mrv = insertvalue %0 undef, i32 21, 0
%mrv1 = insertvalue %0 %mrv, i32 22, 1 %mrv1 = insertvalue %0 %mrv, i32 22, 1
ret %0 %mrv1 ret %0 %mrv1
F: ; preds = %0 F: ; preds = %0
%mrv2 = insertvalue %0 undef, i32 21, 0 %mrv2 = insertvalue %0 undef, i32 21, 0
%mrv3 = insertvalue %0 %mrv2, i32 23, 1 %mrv3 = insertvalue %0 %mrv2, i32 23, 1
ret %0 %mrv3 ret %0 %mrv3
} }
define internal %0 @bar(i1 %Q) { define internal %0 @bar(i1 %Q) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@bar ; CHECK-LABEL: define {{[^@]+}}@bar
; IS__TUNIT____-SAME: (i1 [[Q:%.*]]) #[[ATTR0]] { ; CHECK-SAME: (i1 [[Q:%.*]]) #[[ATTR0]] {
; IS__TUNIT____-NEXT: [[A:%.*]] = insertvalue [[TMP0:%.*]] undef, i32 21, 0 ; CHECK-NEXT: [[A:%.*]] = insertvalue [[TMP0:%.*]] undef, i32 21, 0
; IS__TUNIT____-NEXT: br i1 [[Q]], label [[T:%.*]], label [[F:%.*]] ; CHECK-NEXT: br i1 [[Q]], label [[T:%.*]], label [[F:%.*]]
; IS__TUNIT____: T: ; CHECK: T:
; IS__TUNIT____-NEXT: [[B:%.*]] = insertvalue [[TMP0]] [[A]], i32 22, 1 ; CHECK-NEXT: [[B:%.*]] = insertvalue [[TMP0]] [[A]], i32 22, 1
; IS__TUNIT____-NEXT: ret [[TMP0]] [[B]] ; CHECK-NEXT: ret [[TMP0]] [[B]]
; IS__TUNIT____: F: ; CHECK: F:
; IS__TUNIT____-NEXT: [[C:%.*]] = insertvalue [[TMP0]] [[A]], i32 23, 1 ; CHECK-NEXT: [[C:%.*]] = insertvalue [[TMP0]] [[A]], i32 23, 1
; IS__TUNIT____-NEXT: ret [[TMP0]] [[C]] ; CHECK-NEXT: ret [[TMP0]] [[C]]
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@bar
; IS__CGSCC____-SAME: (i1 [[Q:%.*]]) #[[ATTR0]] {
; IS__CGSCC____-NEXT: [[A:%.*]] = insertvalue [[TMP0:%.*]] undef, i32 21, 0
; IS__CGSCC____-NEXT: br i1 [[Q]], label [[T:%.*]], label [[F:%.*]]
; IS__CGSCC____: T:
; IS__CGSCC____-NEXT: [[B:%.*]] = insertvalue [[TMP0]] [[A]], i32 22, 1
; IS__CGSCC____-NEXT: ret [[TMP0]] [[B]]
; IS__CGSCC____: F:
; IS__CGSCC____-NEXT: [[C:%.*]] = insertvalue [[TMP0]] [[A]], i32 23, 1
; IS__CGSCC____-NEXT: ret [[TMP0]] [[C]]
; ;
%A = insertvalue %0 undef, i32 21, 0 %A = insertvalue %0 undef, i32 21, 0
br i1 %Q, label %T, label %F br i1 %Q, label %T, label %F
T: ; preds = %0 T: ; preds = %0
%B = insertvalue %0 %A, i32 22, 1 %B = insertvalue %0 %A, i32 22, 1
ret %0 %B ret %0 %B
F: ; preds = %0 F: ; preds = %0
%C = insertvalue %0 %A, i32 23, 1 %C = insertvalue %0 %A, i32 23, 1
ret %0 %C ret %0 %C
} }
define %0 @caller(i1 %Q) { define %0 @caller(i1 %Q) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@caller ; CHECK-LABEL: define {{[^@]+}}@caller
; IS__TUNIT____-SAME: (i1 [[Q:%.*]]) #[[ATTR0]] { ; CHECK-SAME: (i1 [[Q:%.*]]) #[[ATTR0]] {
; IS__TUNIT____-NEXT: [[X:%.*]] = call [[TMP0:%.*]] @foo(i1 [[Q]]) #[[ATTR0]] ; CHECK-NEXT: [[X:%.*]] = call [[TMP0:%.*]] @foo(i1 [[Q]]) #[[ATTR1:[0-9]+]]
; IS__TUNIT____-NEXT: ret [[TMP0]] [[X]] ; CHECK-NEXT: ret [[TMP0]] [[X]]
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@caller
; IS__CGSCC____-SAME: (i1 [[Q:%.*]]) #[[ATTR0]] {
; IS__CGSCC____-NEXT: [[X:%.*]] = call [[TMP0:%.*]] @foo(i1 [[Q]]) #[[ATTR1:[0-9]+]]
; IS__CGSCC____-NEXT: ret [[TMP0]] [[X]]
; ;
%X = call %0 @foo(i1 %Q) %X = call %0 @foo(i1 %Q)
%A = extractvalue %0 %X, 0 %A = extractvalue %0 %X, 0
%B = extractvalue %0 %X, 1 %B = extractvalue %0 %X, 1
%Y = call %0 @bar(i1 %Q) %Y = call %0 @bar(i1 %Q)
%C = extractvalue %0 %Y, 0 %C = extractvalue %0 %Y, 0
%D = extractvalue %0 %Y, 1 %D = extractvalue %0 %Y, 1
%M = add i32 %A, %C %M = add i32 %A, %C
%N = add i32 %B, %D %N = add i32 %B, %D
ret %0 %X ret %0 %X
} }
; Similar to @caller but the result of both calls are actually used. ; Similar to @caller but the result of both calls are actually used.
define i32 @caller2(i1 %Q) { define i32 @caller2(i1 %Q) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__TUNIT____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@caller2 ; IS__TUNIT____-LABEL: define {{[^@]+}}@caller2
; IS__TUNIT____-SAME: (i1 [[Q:%.*]]) #[[ATTR0]] { ; IS__TUNIT____-SAME: (i1 [[Q:%.*]]) #[[ATTR0]] {
; IS__TUNIT____-NEXT: [[X:%.*]] = call [[TMP0:%.*]] @foo(i1 [[Q]]) #[[ATTR0]] ; IS__TUNIT____-NEXT: [[X:%.*]] = call [[TMP0:%.*]] @foo(i1 [[Q]]) #[[ATTR1]]
; IS__TUNIT____-NEXT: [[A:%.*]] = extractvalue [[TMP0]] [[X]], 0 ; IS__TUNIT____-NEXT: [[A:%.*]] = extractvalue [[TMP0]] [[X]], 0
; IS__TUNIT____-NEXT: [[B:%.*]] = extractvalue [[TMP0]] [[X]], 1 ; IS__TUNIT____-NEXT: [[B:%.*]] = extractvalue [[TMP0]] [[X]], 1
; IS__TUNIT____-NEXT: [[Y:%.*]] = call [[TMP0]] @bar(i1 [[Q]]) #[[ATTR0]] ; IS__TUNIT____-NEXT: [[Y:%.*]] = call [[TMP0]] @bar(i1 [[Q]]) #[[ATTR1]]
; IS__TUNIT____-NEXT: [[C:%.*]] = extractvalue [[TMP0]] [[Y]], 0 ; IS__TUNIT____-NEXT: [[C:%.*]] = extractvalue [[TMP0]] [[Y]], 0
; IS__TUNIT____-NEXT: [[D:%.*]] = extractvalue [[TMP0]] [[Y]], 1 ; IS__TUNIT____-NEXT: [[D:%.*]] = extractvalue [[TMP0]] [[Y]], 1
; IS__TUNIT____-NEXT: [[M:%.*]] = add i32 [[A]], [[C]] ; IS__TUNIT____-NEXT: [[M:%.*]] = add i32 [[A]], [[C]]
; IS__TUNIT____-NEXT: [[N:%.*]] = add i32 [[B]], [[D]] ; IS__TUNIT____-NEXT: [[N:%.*]] = add i32 [[B]], [[D]]
; IS__TUNIT____-NEXT: [[R:%.*]] = add i32 [[N]], [[M]] ; IS__TUNIT____-NEXT: [[R:%.*]] = add i32 [[N]], [[M]]
; IS__TUNIT____-NEXT: ret i32 [[R]] ; IS__TUNIT____-NEXT: ret i32 [[R]]
; ;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@caller2 ; IS__CGSCC____-LABEL: define {{[^@]+}}@caller2
; IS__CGSCC____-SAME: (i1 [[Q:%.*]]) #[[ATTR0]] { ; IS__CGSCC____-SAME: (i1 [[Q:%.*]]) #[[ATTR0]] {
; IS__CGSCC____-NEXT: [[X:%.*]] = call [[TMP0:%.*]] @foo(i1 [[Q]]) #[[ATTR1]] ; IS__CGSCC____-NEXT: [[X:%.*]] = call [[TMP0:%.*]] @foo(i1 [[Q]]) #[[ATTR1]]
; IS__CGSCC____-NEXT: [[A:%.*]] = extractvalue [[TMP0]] [[X]], 0 ; IS__CGSCC____-NEXT: [[A:%.*]] = extractvalue [[TMP0]] [[X]], 0
; IS__CGSCC____-NEXT: [[B:%.*]] = extractvalue [[TMP0]] [[X]], 1 ; IS__CGSCC____-NEXT: [[B:%.*]] = extractvalue [[TMP0]] [[X]], 1
; IS__CGSCC____-NEXT: [[Y:%.*]] = call [[TMP0]] @bar(i1 [[Q]]) #[[ATTR1]] ; IS__CGSCC____-NEXT: [[Y:%.*]] = call [[TMP0]] @bar(i1 [[Q]]) #[[ATTR2:[0-9]+]]
; IS__CGSCC____-NEXT: [[C:%.*]] = extractvalue [[TMP0]] [[Y]], 0 ; IS__CGSCC____-NEXT: [[C:%.*]] = extractvalue [[TMP0]] [[Y]], 0
; IS__CGSCC____-NEXT: [[D:%.*]] = extractvalue [[TMP0]] [[Y]], 1 ; IS__CGSCC____-NEXT: [[D:%.*]] = extractvalue [[TMP0]] [[Y]], 1
; IS__CGSCC____-NEXT: [[M:%.*]] = add i32 [[A]], [[C]] ; IS__CGSCC____-NEXT: [[M:%.*]] = add i32 [[A]], [[C]]
; IS__CGSCC____-NEXT: [[N:%.*]] = add i32 [[B]], [[D]] ; IS__CGSCC____-NEXT: [[N:%.*]] = add i32 [[B]], [[D]]
; IS__CGSCC____-NEXT: [[R:%.*]] = add i32 [[N]], [[M]] ; IS__CGSCC____-NEXT: [[R:%.*]] = add i32 [[N]], [[M]]
; IS__CGSCC____-NEXT: ret i32 [[R]] ; IS__CGSCC____-NEXT: ret i32 [[R]]
; ;
%X = call %0 @foo(i1 %Q) %X = call %0 @foo(i1 %Q)
%A = extractvalue %0 %X, 0 %A = extractvalue %0 %X, 0
%B = extractvalue %0 %X, 1 %B = extractvalue %0 %X, 1
%Y = call %0 @bar(i1 %Q) %Y = call %0 @bar(i1 %Q)
%C = extractvalue %0 %Y, 0 %C = extractvalue %0 %Y, 0
%D = extractvalue %0 %Y, 1 %D = extractvalue %0 %Y, 1
%M = add i32 %A, %C %M = add i32 %A, %C
;; Check that the second return values didn't get propagated ;; Check that the second return values didn't get propagated
%N = add i32 %B, %D %N = add i32 %B, %D
%R = add i32 %N, %M %R = add i32 %N, %M
ret i32 %R ret i32 %R
} }
;. ;.
; IS__TUNIT____: attributes #[[ATTR0]] = { nofree nosync nounwind readnone willreturn } ; IS__TUNIT____: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__TUNIT____: attributes #[[ATTR1]] = { nofree nosync nounwind readnone willreturn }
;. ;.
; IS__CGSCC____: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn } ; IS__CGSCC____: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__CGSCC____: attributes #[[ATTR1]] = { readnone willreturn } ; IS__CGSCC____: attributes #[[ATTR1]] = { nounwind readnone willreturn }
; IS__CGSCC____: attributes #[[ATTR2]] = { readnone willreturn }
;. ;.

llvm/test/Transforms/Attributor/IPConstantProp/solve-after-each-resolving-undefs-for-function.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals
; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM ; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=5 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=5 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM
; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM ; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM
define internal i32 @testf(i1 %c) { define internal i32 @testf(i1 %c) {
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@testf ; IS__CGSCC____-LABEL: define {{[^@]+}}@testf
; IS__CGSCC____-SAME: (i1 [[C:%.*]]) #[[ATTR0:[0-9]+]] { ; IS__CGSCC____-SAME: (i1 [[C:%.*]]) #[[ATTR0:[0-9]+]] {
; IS__CGSCC____-NEXT: entry: ; IS__CGSCC____-NEXT: entry:
▲ Show 20 Lines • Show All 42 Lines • ▼ Show 20 Lines
ret1: ; preds = %if.then, %entry ret1: ; preds = %if.then, %entry
ret i32 99 ret i32 99
ret2: ; preds = %if.then, %entry ret2: ; preds = %if.then, %entry
ret i32 0 ret i32 0
} }
define i32 @main(i1 %c) { define i32 @main(i1 %c) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@main ; CHECK-LABEL: define {{[^@]+}}@main
; IS__TUNIT____-SAME: (i1 [[C:%.*]]) #[[ATTR0:[0-9]+]] { ; CHECK-SAME: (i1 [[C:%.*]]) #[[ATTR0:[0-9]+]] {
; IS__TUNIT____-NEXT: ret i32 99 ; CHECK-NEXT: ret i32 99
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@main
; IS__CGSCC____-SAME: (i1 [[C:%.*]]) #[[ATTR0]] {
; IS__CGSCC____-NEXT: ret i32 99
; ;
%res = call i32 @test1(i1 %c) %res = call i32 @test1(i1 %c)
ret i32 %res ret i32 %res
} }
;. ;.
; IS__TUNIT____: attributes #[[ATTR0]] = { nofree nosync nounwind readnone willreturn } ; CHECK: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn }
;.
; IS__CGSCC____: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn }
;. ;.

llvm/test/Transforms/Attributor/IPConstantProp/thread_local_acs.ll

Show All 22 Lines
@gtl = dso_local thread_local global i32 0, align 4 @gtl = dso_local thread_local global i32 0, align 4
@gsh = dso_local global i32 0, align 4 @gsh = dso_local global i32 0, align 4
;. ;.
; CHECK: @[[GTL:[a-zA-Z0-9_$"\\.-]+]] = dso_local thread_local global i32 0, align 4 ; CHECK: @[[GTL:[a-zA-Z0-9_$"\\.-]+]] = dso_local thread_local global i32 0, align 4
; CHECK: @[[GSH:[a-zA-Z0-9_$"\\.-]+]] = dso_local global i32 0, align 4 ; CHECK: @[[GSH:[a-zA-Z0-9_$"\\.-]+]] = dso_local global i32 0, align 4
;. ;.
define internal i32 @callee(i32* %thread_local_ptr, i32* %shared_ptr) { define internal i32 @callee(i32* %thread_local_ptr, i32* %shared_ptr) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readonly willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readonly willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@callee ; CHECK-LABEL: define {{[^@]+}}@callee
; IS__TUNIT____-SAME: (i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[THREAD_LOCAL_PTR:%.*]], i32* nocapture nofree nonnull readonly align 4 dereferenceable(4) [[SHARED_PTR:%.*]]) #[[ATTR0:[0-9]+]] { ; CHECK-SAME: (i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[THREAD_LOCAL_PTR:%.*]], i32* nocapture nofree nonnull readonly align 4 dereferenceable(4) [[SHARED_PTR:%.*]]) #[[ATTR0:[0-9]+]] {
; IS__TUNIT____-NEXT: entry: ; CHECK-NEXT: entry:
; IS__TUNIT____-NEXT: [[TMP:%.*]] = load i32, i32* [[THREAD_LOCAL_PTR]], align 4 ; CHECK-NEXT: [[TMP:%.*]] = load i32, i32* [[THREAD_LOCAL_PTR]], align 4
; IS__TUNIT____-NEXT: [[TMP1:%.*]] = load i32, i32* @gsh, align 4 ; CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* @gsh, align 4
; IS__TUNIT____-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP]], [[TMP1]] ; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP]], [[TMP1]]
; IS__TUNIT____-NEXT: ret i32 [[ADD]] ; CHECK-NEXT: ret i32 [[ADD]]
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readonly willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@callee
; IS__CGSCC____-SAME: (i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[THREAD_LOCAL_PTR:%.*]], i32* nocapture nofree nonnull readonly align 4 dereferenceable(4) [[SHARED_PTR:%.*]]) #[[ATTR0:[0-9]+]] {
; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: [[TMP:%.*]] = load i32, i32* [[THREAD_LOCAL_PTR]], align 4
; IS__CGSCC____-NEXT: [[TMP1:%.*]] = load i32, i32* @gsh, align 4
; IS__CGSCC____-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP]], [[TMP1]]
; IS__CGSCC____-NEXT: ret i32 [[ADD]]
; ;
entry: entry:
%tmp = load i32, i32* %thread_local_ptr, align 4 %tmp = load i32, i32* %thread_local_ptr, align 4
%tmp1 = load i32, i32* %shared_ptr, align 4 %tmp1 = load i32, i32* %shared_ptr, align 4
%add = add nsw i32 %tmp, %tmp1 %add = add nsw i32 %tmp, %tmp1
ret i32 %add ret i32 %add
} }
define dso_local void @caller() { define dso_local void @caller() {
; IS__TUNIT____-LABEL: define {{[^@]+}}@caller() { ; IS__TUNIT____-LABEL: define {{[^@]+}}@caller() {
; IS__TUNIT____-NEXT: entry: ; IS__TUNIT____-NEXT: entry:
; IS__TUNIT____-NEXT: call void @broker(i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) @gtl, i32 (i32*, i32*)* noundef nonnull @callee, i32* nocapture nofree nonnull readonly align 4 dereferenceable(4) undef) ; IS__TUNIT____-NEXT: call void @broker(i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) @gtl, i32 (i32*, i32*)* noundef nonnull @callee, i32* nocapture nofree nonnull readonly align 4 dereferenceable(4) undef)
; IS__TUNIT____-NEXT: ret void ; IS__TUNIT____-NEXT: ret void
; ;
; IS__CGSCC____-LABEL: define {{[^@]+}}@caller() { ; IS__CGSCC____: Function Attrs: norecurse
; IS__CGSCC____-LABEL: define {{[^@]+}}@caller
; IS__CGSCC____-SAME: () #[[ATTR1:[0-9]+]] {
; IS__CGSCC____-NEXT: entry: ; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: call void @broker(i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) @gtl, i32 (i32*, i32*)* noundef nonnull @callee, i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) @gsh) ; IS__CGSCC____-NEXT: call void @broker(i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) @gtl, i32 (i32*, i32*)* noundef nonnull @callee, i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) @gsh)
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
entry: entry:
call void @broker(i32* nonnull @gtl, i32 (i32*, i32*)* nonnull @callee, i32* nonnull @gsh) call void @broker(i32* nonnull @gtl, i32 (i32*, i32*)* nonnull @callee, i32* nonnull @gsh)
ret void ret void
} }
declare !callback !0 dso_local void @broker(i32*, i32 (i32*, i32*)*, i32*) declare !callback !0 dso_local void @broker(i32*, i32 (i32*, i32*)*, i32*)
!1 = !{i64 1, i64 0, i64 2, i1 false} !1 = !{i64 1, i64 0, i64 2, i1 false}
!0 = !{!1} !0 = !{!1}
;. ;.
; IS__TUNIT____: attributes #[[ATTR0]] = { nofree nosync nounwind readonly willreturn } ; IS__TUNIT____: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readonly willreturn }
;. ;.
; IS__CGSCC____: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readonly willreturn } ; IS__CGSCC____: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readonly willreturn }
; IS__CGSCC____: attributes #[[ATTR1]] = { norecurse }
;. ;.
; CHECK: [[META0:![0-9]+]] = !{!1} ; CHECK: [[META0:![0-9]+]] = !{!1}
; CHECK: [[META1:![0-9]+]] = !{i64 1, i64 0, i64 2, i1 false} ; CHECK: [[META1:![0-9]+]] = !{i64 1, i64 0, i64 2, i1 false}
;. ;.

llvm/test/Transforms/Attributor/align.ll

Show All 12 Lines
; TEST 1 ; TEST 1
;; ;;
;. ;.
; CHECK: @[[A1:[a-zA-Z0-9_$"\\.-]+]] = common global i8 0, align 8 ; CHECK: @[[A1:[a-zA-Z0-9_$"\\.-]+]] = common global i8 0, align 8
; CHECK: @[[A2:[a-zA-Z0-9_$"\\.-]+]] = common global i8 0, align 16 ; CHECK: @[[A2:[a-zA-Z0-9_$"\\.-]+]] = common global i8 0, align 16
; CHECK: @[[CND:[a-zA-Z0-9_$"\\.-]+]] = external global i1 ; CHECK: @[[CND:[a-zA-Z0-9_$"\\.-]+]] = external global i1
;. ;.
define i32* @test1(i32* align 8 %0) #0 { define i32* @test1(i32* align 8 %0) #0 {
; IS__TUNIT____: Function Attrs: nofree noinline nosync nounwind readnone uwtable willreturn ; CHECK: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@test1 ; CHECK-LABEL: define {{[^@]+}}@test1
; IS__TUNIT____-SAME: (i32* nofree readnone returned align 8 "no-capture-maybe-returned" [[TMP0:%.*]]) #[[ATTR0:[0-9]+]] { ; CHECK-SAME: (i32* nofree readnone returned align 8 "no-capture-maybe-returned" [[TMP0:%.*]]) #[[ATTR0:[0-9]+]] {
; IS__TUNIT____-NEXT: ret i32* [[TMP0]] ; CHECK-NEXT: ret i32* [[TMP0]]
;
; IS__CGSCC____: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@test1
; IS__CGSCC____-SAME: (i32* nofree readnone returned align 8 "no-capture-maybe-returned" [[TMP0:%.*]]) #[[ATTR0:[0-9]+]] {
; IS__CGSCC____-NEXT: ret i32* [[TMP0]]
; ;
ret i32* %0 ret i32* %0
} }
; TEST 2 ; TEST 2
define i32* @test2(i32* %0) #0 { define i32* @test2(i32* %0) #0 {
; IS__TUNIT____: Function Attrs: nofree noinline nosync nounwind readnone uwtable willreturn ; CHECK: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@test2 ; CHECK-LABEL: define {{[^@]+}}@test2
; IS__TUNIT____-SAME: (i32* nofree readnone returned "no-capture-maybe-returned" [[TMP0:%.*]]) #[[ATTR0]] { ; CHECK-SAME: (i32* nofree readnone returned "no-capture-maybe-returned" [[TMP0:%.*]]) #[[ATTR0]] {
; IS__TUNIT____-NEXT: ret i32* [[TMP0]] ; CHECK-NEXT: ret i32* [[TMP0]]
;
; IS__CGSCC____: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@test2
; IS__CGSCC____-SAME: (i32* nofree readnone returned "no-capture-maybe-returned" [[TMP0:%.*]]) #[[ATTR0]] {
; IS__CGSCC____-NEXT: ret i32* [[TMP0]]
; ;
ret i32* %0 ret i32* %0
} }
; TEST 3 ; TEST 3
define i32* @test3(i32* align 8 %0, i32* align 4 %1, i1 %2) #0 { define i32* @test3(i32* align 8 %0, i32* align 4 %1, i1 %2) #0 {
; IS__TUNIT____: Function Attrs: nofree noinline nosync nounwind readnone uwtable willreturn ; CHECK: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@test3 ; CHECK-LABEL: define {{[^@]+}}@test3
; IS__TUNIT____-SAME: (i32* nofree readnone align 8 "no-capture-maybe-returned" [[TMP0:%.*]], i32* nofree readnone align 4 "no-capture-maybe-returned" [[TMP1:%.*]], i1 [[TMP2:%.*]]) #[[ATTR0]] { ; CHECK-SAME: (i32* nofree readnone align 8 "no-capture-maybe-returned" [[TMP0:%.*]], i32* nofree readnone align 4 "no-capture-maybe-returned" [[TMP1:%.*]], i1 [[TMP2:%.*]]) #[[ATTR0]] {
; IS__TUNIT____-NEXT: [[RET:%.*]] = select i1 [[TMP2]], i32* [[TMP0]], i32* [[TMP1]] ; CHECK-NEXT: [[RET:%.*]] = select i1 [[TMP2]], i32* [[TMP0]], i32* [[TMP1]]
; IS__TUNIT____-NEXT: ret i32* [[RET]] ; CHECK-NEXT: ret i32* [[RET]]
;
; IS__CGSCC____: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@test3
; IS__CGSCC____-SAME: (i32* nofree readnone align 8 "no-capture-maybe-returned" [[TMP0:%.*]], i32* nofree readnone align 4 "no-capture-maybe-returned" [[TMP1:%.*]], i1 [[TMP2:%.*]]) #[[ATTR0]] {
; IS__CGSCC____-NEXT: [[RET:%.*]] = select i1 [[TMP2]], i32* [[TMP0]], i32* [[TMP1]]
; IS__CGSCC____-NEXT: ret i32* [[RET]]
; ;
%ret = select i1 %2, i32* %0, i32* %1 %ret = select i1 %2, i32* %0, i32* %1
ret i32* %ret ret i32* %ret
} }
; TEST 4 ; TEST 4
define i32* @test4(i32* align 32 %0, i32* align 32 %1, i1 %2) #0 { define i32* @test4(i32* align 32 %0, i32* align 32 %1, i1 %2) #0 {
; IS__TUNIT____: Function Attrs: nofree noinline nosync nounwind readnone uwtable willreturn ; CHECK: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@test4 ; CHECK-LABEL: define {{[^@]+}}@test4
; IS__TUNIT____-SAME: (i32* nofree readnone align 32 "no-capture-maybe-returned" [[TMP0:%.*]], i32* nofree readnone align 32 "no-capture-maybe-returned" [[TMP1:%.*]], i1 [[TMP2:%.*]]) #[[ATTR0]] { ; CHECK-SAME: (i32* nofree readnone align 32 "no-capture-maybe-returned" [[TMP0:%.*]], i32* nofree readnone align 32 "no-capture-maybe-returned" [[TMP1:%.*]], i1 [[TMP2:%.*]]) #[[ATTR0]] {
; IS__TUNIT____-NEXT: [[RET:%.*]] = select i1 [[TMP2]], i32* [[TMP0]], i32* [[TMP1]] ; CHECK-NEXT: [[RET:%.*]] = select i1 [[TMP2]], i32* [[TMP0]], i32* [[TMP1]]
; IS__TUNIT____-NEXT: ret i32* [[RET]] ; CHECK-NEXT: ret i32* [[RET]]
;
; IS__CGSCC____: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@test4
; IS__CGSCC____-SAME: (i32* nofree readnone align 32 "no-capture-maybe-returned" [[TMP0:%.*]], i32* nofree readnone align 32 "no-capture-maybe-returned" [[TMP1:%.*]], i1 [[TMP2:%.*]]) #[[ATTR0]] {
; IS__CGSCC____-NEXT: [[RET:%.*]] = select i1 [[TMP2]], i32* [[TMP0]], i32* [[TMP1]]
; IS__CGSCC____-NEXT: ret i32* [[RET]]
; ;
%ret = select i1 %2, i32* %0, i32* %1 %ret = select i1 %2, i32* %0, i32* %1
ret i32* %ret ret i32* %ret
} }
; TEST 5 ; TEST 5
declare i32* @unknown() declare i32* @unknown()
declare align 8 i32* @align8() declare align 8 i32* @align8()
Show All 15 Lines
; ;
%ret = tail call i32* @align8() %ret = tail call i32* @align8()
ret i32* %ret ret i32* %ret
} }
; TEST 6 ; TEST 6
; SCC ; SCC
define i32* @test6_1() #0 { define i32* @test6_1() #0 {
; IS__TUNIT____: Function Attrs: nofree noinline nosync nounwind readnone uwtable willreturn ; CHECK: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@test6_1 ; CHECK-LABEL: define {{[^@]+}}@test6_1
; IS__TUNIT____-SAME: () #[[ATTR0]] { ; CHECK-SAME: () #[[ATTR0]] {
; IS__TUNIT____-NEXT: ret i32* undef ; CHECK-NEXT: ret i32* undef
;
; IS__CGSCC_OPM: Function Attrs: nofree noinline nosync nounwind readnone uwtable willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@test6_1
; IS__CGSCC_OPM-SAME: () #[[ATTR1:[0-9]+]] {
; IS__CGSCC_OPM-NEXT: ret i32* undef
;
; IS__CGSCC_NPM: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@test6_1
; IS__CGSCC_NPM-SAME: () #[[ATTR0]] {
; IS__CGSCC_NPM-NEXT: ret i32* undef
; ;
%ret = tail call i32* @test6_2() %ret = tail call i32* @test6_2()
ret i32* %ret ret i32* %ret
} }
define i32* @test6_2() #0 { define i32* @test6_2() #0 {
; IS__TUNIT____: Function Attrs: nofree noinline nosync nounwind readnone uwtable willreturn ; CHECK: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@test6_2 ; CHECK-LABEL: define {{[^@]+}}@test6_2
; IS__TUNIT____-SAME: () #[[ATTR0]] { ; CHECK-SAME: () #[[ATTR0]] {
; IS__TUNIT____-NEXT: ret i32* undef ; CHECK-NEXT: ret i32* undef
;
; IS__CGSCC_OPM: Function Attrs: nofree noinline nosync nounwind readnone uwtable willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@test6_2
; IS__CGSCC_OPM-SAME: () #[[ATTR1]] {
; IS__CGSCC_OPM-NEXT: ret i32* undef
;
; IS__CGSCC_NPM: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@test6_2
; IS__CGSCC_NPM-SAME: () #[[ATTR0]] {
; IS__CGSCC_NPM-NEXT: ret i32* undef
; ;
%ret = tail call i32* @test6_1() %ret = tail call i32* @test6_1()
ret i32* %ret ret i32* %ret
} }
; char a1 __attribute__((aligned(8))); ; char a1 __attribute__((aligned(8)));
; char a2 __attribute__((aligned(16))); ; char a2 __attribute__((aligned(16)));
Show All 9 Lines
; return a?&a1: f1(&a2); ; return a?&a1: f1(&a2);
; } ; }
@a1 = common global i8 0, align 8 @a1 = common global i8 0, align 8
@a2 = common global i8 0, align 16 @a2 = common global i8 0, align 16
; Function Attrs: nounwind readnone ssp uwtable ; Function Attrs: nounwind readnone ssp uwtable
define internal i8* @f1(i8* readnone %0) local_unnamed_addr #0 { define internal i8* @f1(i8* readnone %0) local_unnamed_addr #0 {
; IS__CGSCC_OPM: Function Attrs: nofree noinline nosync nounwind readnone uwtable willreturn ; IS__CGSCC_OPM: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@f1 ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@f1
; IS__CGSCC_OPM-SAME: (i8* noalias nocapture nofree nonnull readnone align 8 dereferenceable(1) [[TMP0:%.*]]) local_unnamed_addr #[[ATTR1]] { ; IS__CGSCC_OPM-SAME: (i8* noalias nocapture nofree nonnull readnone align 8 dereferenceable(1) [[TMP0:%.*]]) local_unnamed_addr #[[ATTR0]] {
; IS__CGSCC_OPM-NEXT: br label [[TMP3:%.*]] ; IS__CGSCC_OPM-NEXT: br label [[TMP3:%.*]]
; IS__CGSCC_OPM: 2: ; IS__CGSCC_OPM: 2:
; IS__CGSCC_OPM-NEXT: unreachable ; IS__CGSCC_OPM-NEXT: unreachable
; IS__CGSCC_OPM: 3: ; IS__CGSCC_OPM: 3:
; IS__CGSCC_OPM-NEXT: ret i8* undef ; IS__CGSCC_OPM-NEXT: ret i8* undef
; ;
; IS__CGSCC_NPM: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable willreturn ; IS__CGSCC_NPM: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@f1 ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@f1
Show All 14 Lines
; <label>:5: ; preds = %1, %3 ; <label>:5: ; preds = %1, %3
%6 = phi i8* [ %4, %3 ], [ %0, %1 ] %6 = phi i8* [ %4, %3 ], [ %0, %1 ]
ret i8* %6 ret i8* %6
} }
; Function Attrs: nounwind readnone ssp uwtable ; Function Attrs: nounwind readnone ssp uwtable
define internal i8* @f2(i8* readnone %0) local_unnamed_addr #0 { define internal i8* @f2(i8* readnone %0) local_unnamed_addr #0 {
; IS__CGSCC_OPM: Function Attrs: noinline nounwind uwtable ; IS__CGSCC____: Function Attrs: noinline nounwind uwtable
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@f2 ; IS__CGSCC____-LABEL: define {{[^@]+}}@f2
; IS__CGSCC_OPM-SAME: (i8* readnone [[TMP0:%.*]]) local_unnamed_addr #[[ATTR2:[0-9]+]] { ; IS__CGSCC____-SAME: (i8* readnone [[TMP0:%.*]]) local_unnamed_addr #[[ATTR1:[0-9]+]] {
; IS__CGSCC_OPM-NEXT: unreachable ; IS__CGSCC____-NEXT: unreachable
; IS__CGSCC_OPM: 2: ; IS__CGSCC____: 2:
; IS__CGSCC_OPM-NEXT: unreachable ; IS__CGSCC____-NEXT: unreachable
; IS__CGSCC_OPM: 3: ; IS__CGSCC____: 3:
; IS__CGSCC_OPM-NEXT: unreachable ; IS__CGSCC____-NEXT: unreachable
; IS__CGSCC_OPM: 4: ; IS__CGSCC____: 4:
; IS__CGSCC_OPM-NEXT: unreachable ; IS__CGSCC____-NEXT: unreachable
;
; IS__CGSCC_NPM: Function Attrs: noinline nounwind uwtable
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@f2
; IS__CGSCC_NPM-SAME: (i8* readnone [[TMP0:%.*]]) local_unnamed_addr #[[ATTR1:[0-9]+]] {
; IS__CGSCC_NPM-NEXT: unreachable
; IS__CGSCC_NPM: 2:
; IS__CGSCC_NPM-NEXT: unreachable
; IS__CGSCC_NPM: 3:
; IS__CGSCC_NPM-NEXT: unreachable
; IS__CGSCC_NPM: 4:
; IS__CGSCC_NPM-NEXT: unreachable
; ;
%2 = icmp eq i8* %0, null %2 = icmp eq i8* %0, null
br i1 %2, label %5, label %3 br i1 %2, label %5, label %3
; <label>:3: ; preds = %1 ; <label>:3: ; preds = %1
%4 = tail call i8* @f1(i8* nonnull %0) %4 = tail call i8* @f1(i8* nonnull %0)
br label %7 br label %7
; <label>:5: ; preds = %1 ; <label>:5: ; preds = %1
%6 = tail call i8* @f3(i8* nonnull @a2) %6 = tail call i8* @f3(i8* nonnull @a2)
br label %7 br label %7
; <label>:7: ; preds = %5, %3 ; <label>:7: ; preds = %5, %3
%8 = phi i8* [ %4, %3 ], [ %6, %5 ] %8 = phi i8* [ %4, %3 ], [ %6, %5 ]
ret i8* %8 ret i8* %8
} }
; Function Attrs: nounwind readnone ssp uwtable ; Function Attrs: nounwind readnone ssp uwtable
define internal i8* @f3(i8* readnone %0) local_unnamed_addr #0 { define internal i8* @f3(i8* readnone %0) local_unnamed_addr #0 {
; IS__CGSCC_OPM: Function Attrs: noinline nounwind uwtable ; IS__CGSCC____: Function Attrs: noinline nounwind uwtable
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@f3 ; IS__CGSCC____-LABEL: define {{[^@]+}}@f3
; IS__CGSCC_OPM-SAME: (i8* nonnull readnone [[TMP0:%.*]]) local_unnamed_addr #[[ATTR2]] { ; IS__CGSCC____-SAME: (i8* nonnull readnone [[TMP0:%.*]]) local_unnamed_addr #[[ATTR1]] {
; IS__CGSCC_OPM-NEXT: br label [[TMP3:%.*]] ; IS__CGSCC____-NEXT: br label [[TMP3:%.*]]
; IS__CGSCC_OPM: 2: ; IS__CGSCC____: 2:
; IS__CGSCC_OPM-NEXT: unreachable ; IS__CGSCC____-NEXT: unreachable
; IS__CGSCC_OPM: 3: ; IS__CGSCC____: 3:
; IS__CGSCC_OPM-NEXT: ret i8* @a1 ; IS__CGSCC____-NEXT: ret i8* @a1
;
; IS__CGSCC_NPM: Function Attrs: noinline nounwind uwtable
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@f3
; IS__CGSCC_NPM-SAME: (i8* nonnull readnone [[TMP0:%.*]]) local_unnamed_addr #[[ATTR1]] {
; IS__CGSCC_NPM-NEXT: br label [[TMP3:%.*]]
; IS__CGSCC_NPM: 2:
; IS__CGSCC_NPM-NEXT: unreachable
; IS__CGSCC_NPM: 3:
; IS__CGSCC_NPM-NEXT: ret i8* @a1
; ;
%2 = icmp eq i8* %0, null %2 = icmp eq i8* %0, null
br i1 %2, label %3, label %5 br i1 %2, label %3, label %5
; <label>:3: ; preds = %1 ; <label>:3: ; preds = %1
%4 = tail call i8* @f1(i8* nonnull @a2) %4 = tail call i8* @f1(i8* nonnull @a2)
br label %5 br label %5
; <label>:5: ; preds = %1, %3 ; <label>:5: ; preds = %1, %3
%6 = phi i8* [ %4, %3 ], [ @a1, %1 ] %6 = phi i8* [ %4, %3 ], [ @a1, %1 ]
ret i8* %6 ret i8* %6
} }
; TEST 7 ; TEST 7
; Better than IR information ; Better than IR information
define align 4 i8* @test7() #0 { define align 4 i8* @test7() #0 {
; IS__TUNIT____: Function Attrs: nofree noinline nosync nounwind readnone uwtable willreturn ; CHECK: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@test7 ; CHECK-LABEL: define {{[^@]+}}@test7
; IS__TUNIT____-SAME: () #[[ATTR0]] { ; CHECK-SAME: () #[[ATTR0]] {
; IS__TUNIT____-NEXT: ret i8* @a1 ; CHECK-NEXT: ret i8* @a1
;
; IS__CGSCC____: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@test7
; IS__CGSCC____-SAME: () #[[ATTR0]] {
; IS__CGSCC____-NEXT: ret i8* @a1
; ;
%c = tail call i8* @f1(i8* align 8 dereferenceable(1) @a1) %c = tail call i8* @f1(i8* align 8 dereferenceable(1) @a1)
ret i8* %c ret i8* %c
} }
; TEST 7b ; TEST 7b
; Function Attrs: nounwind readnone ssp uwtable ; Function Attrs: nounwind readnone ssp uwtable
define internal i8* @f1b(i8* readnone %0) local_unnamed_addr #0 { define internal i8* @f1b(i8* readnone %0) local_unnamed_addr #0 {
; IS__CGSCC_OPM: Function Attrs: nofree noinline nosync nounwind readnone uwtable willreturn ; IS__CGSCC_OPM: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@f1b ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@f1b
; IS__CGSCC_OPM-SAME: (i8* noalias nocapture nofree nonnull readnone align 8 dereferenceable(1) [[TMP0:%.*]]) local_unnamed_addr #[[ATTR1]] { ; IS__CGSCC_OPM-SAME: (i8* noalias nocapture nofree nonnull readnone align 8 dereferenceable(1) [[TMP0:%.*]]) local_unnamed_addr #[[ATTR0]] {
; IS__CGSCC_OPM-NEXT: br label [[TMP3:%.*]] ; IS__CGSCC_OPM-NEXT: br label [[TMP3:%.*]]
; IS__CGSCC_OPM: 2: ; IS__CGSCC_OPM: 2:
; IS__CGSCC_OPM-NEXT: unreachable ; IS__CGSCC_OPM-NEXT: unreachable
; IS__CGSCC_OPM: 3: ; IS__CGSCC_OPM: 3:
; IS__CGSCC_OPM-NEXT: ret i8* undef ; IS__CGSCC_OPM-NEXT: ret i8* undef
; ;
; IS__CGSCC_NPM: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable willreturn ; IS__CGSCC_NPM: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@f1b ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@f1b
Show All 16 Lines
; <label>:5: ; preds = %1, %3 ; <label>:5: ; preds = %1, %3
%6 = phi i8* [ %4, %3 ], [ %0, %1 ] %6 = phi i8* [ %4, %3 ], [ %0, %1 ]
ret i8* %6 ret i8* %6
} }
; Function Attrs: nounwind readnone ssp uwtable ; Function Attrs: nounwind readnone ssp uwtable
define internal i8* @f2b(i8* readnone %0) local_unnamed_addr #0 { define internal i8* @f2b(i8* readnone %0) local_unnamed_addr #0 {
; ;
; IS__CGSCC_OPM: Function Attrs: noinline nounwind uwtable ; IS__CGSCC____: Function Attrs: noinline nounwind uwtable
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@f2b ; IS__CGSCC____-LABEL: define {{[^@]+}}@f2b
; IS__CGSCC_OPM-SAME: (i8* readnone [[TMP0:%.*]]) local_unnamed_addr #[[ATTR2]] { ; IS__CGSCC____-SAME: (i8* readnone [[TMP0:%.*]]) local_unnamed_addr #[[ATTR1]] {
; IS__CGSCC_OPM-NEXT: unreachable ; IS__CGSCC____-NEXT: unreachable
; IS__CGSCC_OPM: 2: ; IS__CGSCC____: 2:
; IS__CGSCC_OPM-NEXT: unreachable ; IS__CGSCC____-NEXT: unreachable
; IS__CGSCC_OPM: 3: ; IS__CGSCC____: 3:
; IS__CGSCC_OPM-NEXT: unreachable ; IS__CGSCC____-NEXT: unreachable
; IS__CGSCC_OPM: 4: ; IS__CGSCC____: 4:
; IS__CGSCC_OPM-NEXT: unreachable ; IS__CGSCC____-NEXT: unreachable
;
; IS__CGSCC_NPM: Function Attrs: noinline nounwind uwtable
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@f2b
; IS__CGSCC_NPM-SAME: (i8* readnone [[TMP0:%.*]]) local_unnamed_addr #[[ATTR1]] {
; IS__CGSCC_NPM-NEXT: unreachable
; IS__CGSCC_NPM: 2:
; IS__CGSCC_NPM-NEXT: unreachable
; IS__CGSCC_NPM: 3:
; IS__CGSCC_NPM-NEXT: unreachable
; IS__CGSCC_NPM: 4:
; IS__CGSCC_NPM-NEXT: unreachable
; ;
%2 = icmp eq i8* %0, null %2 = icmp eq i8* %0, null
br i1 %2, label %5, label %3 br i1 %2, label %5, label %3
; <label>:3: ; preds = %1 ; <label>:3: ; preds = %1
%4 = tail call i8* @f1b(i8* nonnull %0) %4 = tail call i8* @f1b(i8* nonnull %0)
br label %7 br label %7
; <label>:5: ; preds = %1 ; <label>:5: ; preds = %1
%6 = tail call i8* @f3b(i8* nonnull @a2) %6 = tail call i8* @f3b(i8* nonnull @a2)
br label %7 br label %7
; <label>:7: ; preds = %5, %3 ; <label>:7: ; preds = %5, %3
%8 = phi i8* [ %4, %3 ], [ %6, %5 ] %8 = phi i8* [ %4, %3 ], [ %6, %5 ]
ret i8* %8 ret i8* %8
} }
; Function Attrs: nounwind readnone ssp uwtable ; Function Attrs: nounwind readnone ssp uwtable
define internal i8* @f3b(i8* readnone %0) local_unnamed_addr #0 { define internal i8* @f3b(i8* readnone %0) local_unnamed_addr #0 {
; ;
; IS__CGSCC_OPM: Function Attrs: noinline nounwind uwtable ; IS__CGSCC____: Function Attrs: noinline nounwind uwtable
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@f3b ; IS__CGSCC____-LABEL: define {{[^@]+}}@f3b
; IS__CGSCC_OPM-SAME: (i8* nonnull readnone [[TMP0:%.*]]) local_unnamed_addr #[[ATTR2]] { ; IS__CGSCC____-SAME: (i8* nonnull readnone [[TMP0:%.*]]) local_unnamed_addr #[[ATTR1]] {
; IS__CGSCC_OPM-NEXT: br label [[TMP3:%.*]] ; IS__CGSCC____-NEXT: br label [[TMP3:%.*]]
; IS__CGSCC_OPM: 2: ; IS__CGSCC____: 2:
; IS__CGSCC_OPM-NEXT: unreachable ; IS__CGSCC____-NEXT: unreachable
; IS__CGSCC_OPM: 3: ; IS__CGSCC____: 3:
; IS__CGSCC_OPM-NEXT: ret i8* @a1 ; IS__CGSCC____-NEXT: ret i8* @a1
;
; IS__CGSCC_NPM: Function Attrs: noinline nounwind uwtable
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@f3b
; IS__CGSCC_NPM-SAME: (i8* nonnull readnone [[TMP0:%.*]]) local_unnamed_addr #[[ATTR1]] {
; IS__CGSCC_NPM-NEXT: br label [[TMP3:%.*]]
; IS__CGSCC_NPM: 2:
; IS__CGSCC_NPM-NEXT: unreachable
; IS__CGSCC_NPM: 3:
; IS__CGSCC_NPM-NEXT: ret i8* @a1
; ;
%2 = icmp eq i8* %0, null %2 = icmp eq i8* %0, null
br i1 %2, label %3, label %5 br i1 %2, label %3, label %5
; <label>:3: ; preds = %1 ; <label>:3: ; preds = %1
%4 = tail call i8* @f1b(i8* nonnull @a2) %4 = tail call i8* @f1b(i8* nonnull @a2)
br label %5 br label %5
; <label>:5: ; preds = %1, %3 ; <label>:5: ; preds = %1, %3
%6 = phi i8* [ %4, %3 ], [ @a1, %1 ] %6 = phi i8* [ %4, %3 ], [ @a1, %1 ]
ret i8* %6 ret i8* %6
} }
define align 4 i32* @test7b(i32* align 32 %p) #0 { define align 4 i32* @test7b(i32* align 32 %p) #0 {
; IS__TUNIT____: Function Attrs: nofree noinline nosync nounwind readnone uwtable willreturn ; CHECK: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@test7b ; CHECK-LABEL: define {{[^@]+}}@test7b
; IS__TUNIT____-SAME: (i32* nofree readnone returned align 32 "no-capture-maybe-returned" [[P:%.*]]) #[[ATTR0]] { ; CHECK-SAME: (i32* nofree readnone returned align 32 "no-capture-maybe-returned" [[P:%.*]]) #[[ATTR0]] {
; IS__TUNIT____-NEXT: ret i32* [[P]] ; CHECK-NEXT: ret i32* [[P]]
;
; IS__CGSCC____: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@test7b
; IS__CGSCC____-SAME: (i32* nofree readnone returned align 32 "no-capture-maybe-returned" [[P:%.*]]) #[[ATTR0]] {
; IS__CGSCC____-NEXT: ret i32* [[P]]
; ;
tail call i8* @f1b(i8* align 8 dereferenceable(1) @a1) tail call i8* @f1b(i8* align 8 dereferenceable(1) @a1)
ret i32* %p ret i32* %p
} }
; TEST 8 ; TEST 8
define void @test8_helper() { define void @test8_helper() {
; IS__TUNIT____-LABEL: define {{[^@]+}}@test8_helper() { ; IS__TUNIT____-LABEL: define {{[^@]+}}@test8_helper() {
; IS__TUNIT____-NEXT: [[PTR0:%.*]] = tail call i32* @unknown() ; IS__TUNIT____-NEXT: [[PTR0:%.*]] = tail call i32* @unknown()
; IS__TUNIT____-NEXT: [[PTR1:%.*]] = tail call align 4 i32* @unknown() ; IS__TUNIT____-NEXT: [[PTR1:%.*]] = tail call align 4 i32* @unknown()
; IS__TUNIT____-NEXT: [[PTR2:%.*]] = tail call align 8 i32* @unknown() ; IS__TUNIT____-NEXT: [[PTR2:%.*]] = tail call align 8 i32* @unknown()
; IS__TUNIT____-NEXT: tail call void @test8(i32* noalias nocapture readnone align 4 [[PTR1]], i32* noalias nocapture readnone align 4 [[PTR1]], i32* noalias nocapture readnone [[PTR0]]) #[[ATTR1:[0-9]+]] ; IS__TUNIT____-NEXT: tail call void @test8(i32* noalias nocapture readnone align 4 [[PTR1]], i32* noalias nocapture readnone align 4 [[PTR1]], i32* noalias nocapture readnone [[PTR0]]) #[[ATTR1:[0-9]+]]
; IS__TUNIT____-NEXT: tail call void @test8(i32* noalias nocapture readnone align 8 [[PTR2]], i32* noalias nocapture readnone align 4 [[PTR1]], i32* noalias nocapture readnone align 4 [[PTR1]]) #[[ATTR1]] ; IS__TUNIT____-NEXT: tail call void @test8(i32* noalias nocapture readnone align 8 [[PTR2]], i32* noalias nocapture readnone align 4 [[PTR1]], i32* noalias nocapture readnone align 4 [[PTR1]]) #[[ATTR1]]
; IS__TUNIT____-NEXT: tail call void @test8(i32* noalias nocapture readnone align 8 [[PTR2]], i32* noalias nocapture readnone align 4 [[PTR1]], i32* noalias nocapture readnone align 4 [[PTR1]]) #[[ATTR1]] ; IS__TUNIT____-NEXT: tail call void @test8(i32* noalias nocapture readnone align 8 [[PTR2]], i32* noalias nocapture readnone align 4 [[PTR1]], i32* noalias nocapture readnone align 4 [[PTR1]]) #[[ATTR1]]
; IS__TUNIT____-NEXT: ret void ; IS__TUNIT____-NEXT: ret void
; ;
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@test8_helper() { ; IS__CGSCC____-LABEL: define {{[^@]+}}@test8_helper() {
; IS__CGSCC_OPM-NEXT: [[PTR0:%.*]] = tail call i32* @unknown() ; IS__CGSCC____-NEXT: [[PTR0:%.*]] = tail call i32* @unknown()
; IS__CGSCC_OPM-NEXT: [[PTR1:%.*]] = tail call align 4 i32* @unknown() ; IS__CGSCC____-NEXT: [[PTR1:%.*]] = tail call align 4 i32* @unknown()
; IS__CGSCC_OPM-NEXT: [[PTR2:%.*]] = tail call align 8 i32* @unknown() ; IS__CGSCC____-NEXT: [[PTR2:%.*]] = tail call align 8 i32* @unknown()
; IS__CGSCC_OPM-NEXT: tail call void @test8(i32* noalias nocapture readnone align 4 [[PTR1]], i32* noalias nocapture readnone align 4 [[PTR1]], i32* noalias nocapture readnone [[PTR0]]) #[[ATTR3:[0-9]+]] ; IS__CGSCC____-NEXT: tail call void @test8(i32* noalias nocapture readnone align 4 [[PTR1]], i32* noalias nocapture readnone align 4 [[PTR1]], i32* noalias nocapture readnone [[PTR0]]) #[[ATTR2:[0-9]+]]
; IS__CGSCC_OPM-NEXT: tail call void @test8(i32* noalias nocapture readnone align 8 [[PTR2]], i32* noalias nocapture readnone align 4 [[PTR1]], i32* noalias nocapture readnone align 4 [[PTR1]]) #[[ATTR3]] ; IS__CGSCC____-NEXT: tail call void @test8(i32* noalias nocapture readnone align 8 [[PTR2]], i32* noalias nocapture readnone align 4 [[PTR1]], i32* noalias nocapture readnone align 4 [[PTR1]]) #[[ATTR2]]
; IS__CGSCC_OPM-NEXT: tail call void @test8(i32* noalias nocapture readnone align 8 [[PTR2]], i32* noalias nocapture readnone align 4 [[PTR1]], i32* noalias nocapture readnone align 4 [[PTR1]]) #[[ATTR3]] ; IS__CGSCC____-NEXT: tail call void @test8(i32* noalias nocapture readnone align 8 [[PTR2]], i32* noalias nocapture readnone align 4 [[PTR1]], i32* noalias nocapture readnone align 4 [[PTR1]]) #[[ATTR2]]
; IS__CGSCC_OPM-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
;
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@test8_helper() {
; IS__CGSCC_NPM-NEXT: [[PTR0:%.*]] = tail call i32* @unknown()
; IS__CGSCC_NPM-NEXT: [[PTR1:%.*]] = tail call align 4 i32* @unknown()
; IS__CGSCC_NPM-NEXT: [[PTR2:%.*]] = tail call align 8 i32* @unknown()
; IS__CGSCC_NPM-NEXT: tail call void @test8(i32* noalias nocapture readnone align 4 [[PTR1]], i32* noalias nocapture readnone align 4 [[PTR1]], i32* noalias nocapture readnone [[PTR0]]) #[[ATTR2:[0-9]+]]
; IS__CGSCC_NPM-NEXT: tail call void @test8(i32* noalias nocapture readnone align 8 [[PTR2]], i32* noalias nocapture readnone align 4 [[PTR1]], i32* noalias nocapture readnone align 4 [[PTR1]]) #[[ATTR2]]
; IS__CGSCC_NPM-NEXT: tail call void @test8(i32* noalias nocapture readnone align 8 [[PTR2]], i32* noalias nocapture readnone align 4 [[PTR1]], i32* noalias nocapture readnone align 4 [[PTR1]]) #[[ATTR2]]
; IS__CGSCC_NPM-NEXT: ret void
; ;
%ptr0 = tail call i32* @unknown() %ptr0 = tail call i32* @unknown()
%ptr1 = tail call align 4 i32* @unknown() %ptr1 = tail call align 4 i32* @unknown()
%ptr2 = tail call align 8 i32* @unknown() %ptr2 = tail call align 8 i32* @unknown()
tail call void @test8(i32* %ptr1, i32* %ptr1, i32* %ptr0) tail call void @test8(i32* %ptr1, i32* %ptr1, i32* %ptr0)
tail call void @test8(i32* %ptr2, i32* %ptr1, i32* %ptr1) tail call void @test8(i32* %ptr2, i32* %ptr1, i32* %ptr1)
tail call void @test8(i32* %ptr2, i32* %ptr1, i32* %ptr1) tail call void @test8(i32* %ptr2, i32* %ptr1, i32* %ptr1)
ret void ret void
} }
declare void @user_i32_ptr(i32* nocapture readnone) nounwind declare void @user_i32_ptr(i32* nocapture readnone) nounwind
define internal void @test8(i32* %a, i32* %b, i32* %c) { define internal void @test8(i32* %a, i32* %b, i32* %c) {
; IS__TUNIT____: Function Attrs: nounwind ; IS__TUNIT____: Function Attrs: nounwind
; IS__TUNIT____-LABEL: define {{[^@]+}}@test8 ; IS__TUNIT____-LABEL: define {{[^@]+}}@test8
; IS__TUNIT____-SAME: (i32* noalias nocapture readnone align 4 [[A:%.*]], i32* noalias nocapture readnone align 4 [[B:%.*]], i32* noalias nocapture readnone [[C:%.*]]) #[[ATTR1]] { ; IS__TUNIT____-SAME: (i32* noalias nocapture readnone align 4 [[A:%.*]], i32* noalias nocapture readnone align 4 [[B:%.*]], i32* noalias nocapture readnone [[C:%.*]]) #[[ATTR1]] {
; IS__TUNIT____-NEXT: call void @user_i32_ptr(i32* noalias nocapture readnone align 4 [[A]]) #[[ATTR1]] ; IS__TUNIT____-NEXT: call void @user_i32_ptr(i32* noalias nocapture readnone align 4 [[A]]) #[[ATTR1]]
; IS__TUNIT____-NEXT: call void @user_i32_ptr(i32* noalias nocapture readnone align 4 [[B]]) #[[ATTR1]] ; IS__TUNIT____-NEXT: call void @user_i32_ptr(i32* noalias nocapture readnone align 4 [[B]]) #[[ATTR1]]
; IS__TUNIT____-NEXT: call void @user_i32_ptr(i32* noalias nocapture readnone [[C]]) #[[ATTR1]] ; IS__TUNIT____-NEXT: call void @user_i32_ptr(i32* noalias nocapture readnone [[C]]) #[[ATTR1]]
; IS__TUNIT____-NEXT: ret void ; IS__TUNIT____-NEXT: ret void
; ;
; IS__CGSCC_OPM: Function Attrs: nounwind ; IS__CGSCC____: Function Attrs: nounwind
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@test8 ; IS__CGSCC____-LABEL: define {{[^@]+}}@test8
; IS__CGSCC_OPM-SAME: (i32* noalias nocapture readnone align 4 [[A:%.*]], i32* noalias nocapture readnone align 4 [[B:%.*]], i32* noalias nocapture readnone [[C:%.*]]) #[[ATTR3]] { ; IS__CGSCC____-SAME: (i32* noalias nocapture readnone align 4 [[A:%.*]], i32* noalias nocapture readnone align 4 [[B:%.*]], i32* noalias nocapture readnone [[C:%.*]]) #[[ATTR2]] {
; IS__CGSCC_OPM-NEXT: call void @user_i32_ptr(i32* noalias nocapture readnone align 4 [[A]]) #[[ATTR3]] ; IS__CGSCC____-NEXT: call void @user_i32_ptr(i32* noalias nocapture readnone align 4 [[A]]) #[[ATTR2]]
; IS__CGSCC_OPM-NEXT: call void @user_i32_ptr(i32* noalias nocapture readnone align 4 [[B]]) #[[ATTR3]] ; IS__CGSCC____-NEXT: call void @user_i32_ptr(i32* noalias nocapture readnone align 4 [[B]]) #[[ATTR2]]
; IS__CGSCC_OPM-NEXT: call void @user_i32_ptr(i32* noalias nocapture readnone [[C]]) #[[ATTR3]] ; IS__CGSCC____-NEXT: call void @user_i32_ptr(i32* noalias nocapture readnone [[C]]) #[[ATTR2]]
; IS__CGSCC_OPM-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
;
; IS__CGSCC_NPM: Function Attrs: nounwind
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@test8
; IS__CGSCC_NPM-SAME: (i32* noalias nocapture readnone align 4 [[A:%.*]], i32* noalias nocapture readnone align 4 [[B:%.*]], i32* noalias nocapture readnone [[C:%.*]]) #[[ATTR2]] {
; IS__CGSCC_NPM-NEXT: call void @user_i32_ptr(i32* noalias nocapture readnone align 4 [[A]]) #[[ATTR2]]
; IS__CGSCC_NPM-NEXT: call void @user_i32_ptr(i32* noalias nocapture readnone align 4 [[B]]) #[[ATTR2]]
; IS__CGSCC_NPM-NEXT: call void @user_i32_ptr(i32* noalias nocapture readnone [[C]]) #[[ATTR2]]
; IS__CGSCC_NPM-NEXT: ret void
; ;
call void @user_i32_ptr(i32* %a) call void @user_i32_ptr(i32* %a)
call void @user_i32_ptr(i32* %b) call void @user_i32_ptr(i32* %b)
call void @user_i32_ptr(i32* %c) call void @user_i32_ptr(i32* %c)
ret void ret void
} }
declare void @test9_helper(i32* %A) declare void @test9_helper(i32* %A)
Show All 30 Lines
; IS__TUNIT____: f: ; IS__TUNIT____: f:
; IS__TUNIT____-NEXT: [[G1:%.*]] = getelementptr i32, i32* [[P]], i32 8 ; IS__TUNIT____-NEXT: [[G1:%.*]] = getelementptr i32, i32* [[P]], i32 8
; IS__TUNIT____-NEXT: store i32 -1, i32* [[G1]], align 32 ; IS__TUNIT____-NEXT: store i32 -1, i32* [[G1]], align 32
; IS__TUNIT____-NEXT: br label [[E]] ; IS__TUNIT____-NEXT: br label [[E]]
; IS__TUNIT____: e: ; IS__TUNIT____: e:
; IS__TUNIT____-NEXT: [[PHI:%.*]] = phi i32* [ [[G0]], [[T]] ], [ [[G1]], [[F]] ] ; IS__TUNIT____-NEXT: [[PHI:%.*]] = phi i32* [ [[G0]], [[T]] ], [ [[G1]], [[F]] ]
; IS__TUNIT____-NEXT: ret i32* [[PHI]] ; IS__TUNIT____-NEXT: ret i32* [[PHI]]
; ;
; IS__CGSCC_OPM: Function Attrs: nofree nosync nounwind ; IS__CGSCC____: Function Attrs: nofree nosync nounwind
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@test10a ; IS__CGSCC____-LABEL: define {{[^@]+}}@test10a
; IS__CGSCC_OPM-SAME: (i32* nofree noundef nonnull align 32 dereferenceable(4) "no-capture-maybe-returned" [[P:%.*]]) #[[ATTR4:[0-9]+]] { ; IS__CGSCC____-SAME: (i32* nofree noundef nonnull align 32 dereferenceable(4) "no-capture-maybe-returned" [[P:%.*]]) #[[ATTR3:[0-9]+]] {
; IS__CGSCC_OPM-NEXT: [[L:%.*]] = load i32, i32* [[P]], align 32 ; IS__CGSCC____-NEXT: [[L:%.*]] = load i32, i32* [[P]], align 32
; IS__CGSCC_OPM-NEXT: [[C:%.*]] = icmp eq i32 [[L]], 0 ; IS__CGSCC____-NEXT: [[C:%.*]] = icmp eq i32 [[L]], 0
; IS__CGSCC_OPM-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]] ; IS__CGSCC____-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]]
; IS__CGSCC_OPM: t: ; IS__CGSCC____: t:
; IS__CGSCC_OPM-NEXT: [[R:%.*]] = call align 32 i32* @test10a(i32* nofree noundef nonnull align 32 dereferenceable(4) "no-capture-maybe-returned" [[P]]) #[[ATTR4]] ; IS__CGSCC____-NEXT: [[R:%.*]] = call align 32 i32* @test10a(i32* nofree noundef nonnull align 32 dereferenceable(4) "no-capture-maybe-returned" [[P]]) #[[ATTR3]]
; IS__CGSCC_OPM-NEXT: store i32 1, i32* [[R]], align 32 ; IS__CGSCC____-NEXT: store i32 1, i32* [[R]], align 32
; IS__CGSCC_OPM-NEXT: [[G0:%.*]] = getelementptr i32, i32* [[P]], i32 8 ; IS__CGSCC____-NEXT: [[G0:%.*]] = getelementptr i32, i32* [[P]], i32 8
; IS__CGSCC_OPM-NEXT: br label [[E:%.*]] ; IS__CGSCC____-NEXT: br label [[E:%.*]]
; IS__CGSCC_OPM: f: ; IS__CGSCC____: f:
; IS__CGSCC_OPM-NEXT: [[G1:%.*]] = getelementptr i32, i32* [[P]], i32 8 ; IS__CGSCC____-NEXT: [[G1:%.*]] = getelementptr i32, i32* [[P]], i32 8
; IS__CGSCC_OPM-NEXT: store i32 -1, i32* [[G1]], align 32 ; IS__CGSCC____-NEXT: store i32 -1, i32* [[G1]], align 32
; IS__CGSCC_OPM-NEXT: br label [[E]] ; IS__CGSCC____-NEXT: br label [[E]]
; IS__CGSCC_OPM: e: ; IS__CGSCC____: e:
; IS__CGSCC_OPM-NEXT: [[PHI:%.*]] = phi i32* [ [[G0]], [[T]] ], [ [[G1]], [[F]] ] ; IS__CGSCC____-NEXT: [[PHI:%.*]] = phi i32* [ [[G0]], [[T]] ], [ [[G1]], [[F]] ]
; IS__CGSCC_OPM-NEXT: ret i32* [[PHI]] ; IS__CGSCC____-NEXT: ret i32* [[PHI]]
;
; IS__CGSCC_NPM: Function Attrs: nofree nosync nounwind
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@test10a
; IS__CGSCC_NPM-SAME: (i32* nofree noundef nonnull align 32 dereferenceable(4) "no-capture-maybe-returned" [[P:%.*]]) #[[ATTR3:[0-9]+]] {
; IS__CGSCC_NPM-NEXT: [[L:%.*]] = load i32, i32* [[P]], align 32
; IS__CGSCC_NPM-NEXT: [[C:%.*]] = icmp eq i32 [[L]], 0
; IS__CGSCC_NPM-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]]
; IS__CGSCC_NPM: t:
; IS__CGSCC_NPM-NEXT: [[R:%.*]] = call align 32 i32* @test10a(i32* nofree noundef nonnull align 32 dereferenceable(4) "no-capture-maybe-returned" [[P]]) #[[ATTR3]]
; IS__CGSCC_NPM-NEXT: store i32 1, i32* [[R]], align 32
; IS__CGSCC_NPM-NEXT: [[G0:%.*]] = getelementptr i32, i32* [[P]], i32 8
; IS__CGSCC_NPM-NEXT: br label [[E:%.*]]
; IS__CGSCC_NPM: f:
; IS__CGSCC_NPM-NEXT: [[G1:%.*]] = getelementptr i32, i32* [[P]], i32 8
; IS__CGSCC_NPM-NEXT: store i32 -1, i32* [[G1]], align 32
; IS__CGSCC_NPM-NEXT: br label [[E]]
; IS__CGSCC_NPM: e:
; IS__CGSCC_NPM-NEXT: [[PHI:%.*]] = phi i32* [ [[G0]], [[T]] ], [ [[G1]], [[F]] ]
; IS__CGSCC_NPM-NEXT: ret i32* [[PHI]]
; ;
%l = load i32, i32* %p %l = load i32, i32* %p
%c = icmp eq i32 %l, 0 %c = icmp eq i32 %l, 0
br i1 %c, label %t, label %f br i1 %c, label %t, label %f
t: t:
%r = call i32* @test10a(i32* %p) %r = call i32* @test10a(i32* %p)
store i32 1, i32* %r store i32 1, i32* %r
%g0 = getelementptr i32, i32* %p, i32 8 %g0 = getelementptr i32, i32* %p, i32 8
Show All 28 Lines
; IS__TUNIT____: f: ; IS__TUNIT____: f:
; IS__TUNIT____-NEXT: [[G1:%.*]] = getelementptr i32, i32* [[P]], i32 -8 ; IS__TUNIT____-NEXT: [[G1:%.*]] = getelementptr i32, i32* [[P]], i32 -8
; IS__TUNIT____-NEXT: store i32 -1, i32* [[G1]], align 32 ; IS__TUNIT____-NEXT: store i32 -1, i32* [[G1]], align 32
; IS__TUNIT____-NEXT: br label [[E]] ; IS__TUNIT____-NEXT: br label [[E]]
; IS__TUNIT____: e: ; IS__TUNIT____: e:
; IS__TUNIT____-NEXT: [[PHI:%.*]] = phi i32* [ [[G0]], [[T]] ], [ [[G1]], [[F]] ] ; IS__TUNIT____-NEXT: [[PHI:%.*]] = phi i32* [ [[G0]], [[T]] ], [ [[G1]], [[F]] ]
; IS__TUNIT____-NEXT: ret i32* [[PHI]] ; IS__TUNIT____-NEXT: ret i32* [[PHI]]
; ;
; IS__CGSCC_OPM: Function Attrs: nofree nosync nounwind ; IS__CGSCC____: Function Attrs: nofree nosync nounwind
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@test10b ; IS__CGSCC____-LABEL: define {{[^@]+}}@test10b
; IS__CGSCC_OPM-SAME: (i32* nofree noundef nonnull align 32 dereferenceable(4) "no-capture-maybe-returned" [[P:%.*]]) #[[ATTR4]] { ; IS__CGSCC____-SAME: (i32* nofree noundef nonnull align 32 dereferenceable(4) "no-capture-maybe-returned" [[P:%.*]]) #[[ATTR3]] {
; IS__CGSCC_OPM-NEXT: [[L:%.*]] = load i32, i32* [[P]], align 32 ; IS__CGSCC____-NEXT: [[L:%.*]] = load i32, i32* [[P]], align 32
; IS__CGSCC_OPM-NEXT: [[C:%.*]] = icmp eq i32 [[L]], 0 ; IS__CGSCC____-NEXT: [[C:%.*]] = icmp eq i32 [[L]], 0
; IS__CGSCC_OPM-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]] ; IS__CGSCC____-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]]
; IS__CGSCC_OPM: t: ; IS__CGSCC____: t:
; IS__CGSCC_OPM-NEXT: [[R:%.*]] = call align 32 i32* @test10b(i32* nofree noundef nonnull align 32 dereferenceable(4) "no-capture-maybe-returned" [[P]]) #[[ATTR4]] ; IS__CGSCC____-NEXT: [[R:%.*]] = call align 32 i32* @test10b(i32* nofree noundef nonnull align 32 dereferenceable(4) "no-capture-maybe-returned" [[P]]) #[[ATTR3]]
; IS__CGSCC_OPM-NEXT: store i32 1, i32* [[R]], align 32 ; IS__CGSCC____-NEXT: store i32 1, i32* [[R]], align 32
; IS__CGSCC_OPM-NEXT: [[G0:%.*]] = getelementptr i32, i32* [[P]], i32 8 ; IS__CGSCC____-NEXT: [[G0:%.*]] = getelementptr i32, i32* [[P]], i32 8
; IS__CGSCC_OPM-NEXT: br label [[E:%.*]] ; IS__CGSCC____-NEXT: br label [[E:%.*]]
; IS__CGSCC_OPM: f: ; IS__CGSCC____: f:
; IS__CGSCC_OPM-NEXT: [[G1:%.*]] = getelementptr i32, i32* [[P]], i32 -8 ; IS__CGSCC____-NEXT: [[G1:%.*]] = getelementptr i32, i32* [[P]], i32 -8
; IS__CGSCC_OPM-NEXT: store i32 -1, i32* [[G1]], align 32 ; IS__CGSCC____-NEXT: store i32 -1, i32* [[G1]], align 32
; IS__CGSCC_OPM-NEXT: br label [[E]] ; IS__CGSCC____-NEXT: br label [[E]]
; IS__CGSCC_OPM: e: ; IS__CGSCC____: e:
; IS__CGSCC_OPM-NEXT: [[PHI:%.*]] = phi i32* [ [[G0]], [[T]] ], [ [[G1]], [[F]] ] ; IS__CGSCC____-NEXT: [[PHI:%.*]] = phi i32* [ [[G0]], [[T]] ], [ [[G1]], [[F]] ]
; IS__CGSCC_OPM-NEXT: ret i32* [[PHI]] ; IS__CGSCC____-NEXT: ret i32* [[PHI]]
;
; IS__CGSCC_NPM: Function Attrs: nofree nosync nounwind
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@test10b
; IS__CGSCC_NPM-SAME: (i32* nofree noundef nonnull align 32 dereferenceable(4) "no-capture-maybe-returned" [[P:%.*]]) #[[ATTR3]] {
; IS__CGSCC_NPM-NEXT: [[L:%.*]] = load i32, i32* [[P]], align 32
; IS__CGSCC_NPM-NEXT: [[C:%.*]] = icmp eq i32 [[L]], 0
; IS__CGSCC_NPM-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]]
; IS__CGSCC_NPM: t:
; IS__CGSCC_NPM-NEXT: [[R:%.*]] = call align 32 i32* @test10b(i32* nofree noundef nonnull align 32 dereferenceable(4) "no-capture-maybe-returned" [[P]]) #[[ATTR3]]
; IS__CGSCC_NPM-NEXT: store i32 1, i32* [[R]], align 32
; IS__CGSCC_NPM-NEXT: [[G0:%.*]] = getelementptr i32, i32* [[P]], i32 8
; IS__CGSCC_NPM-NEXT: br label [[E:%.*]]
; IS__CGSCC_NPM: f:
; IS__CGSCC_NPM-NEXT: [[G1:%.*]] = getelementptr i32, i32* [[P]], i32 -8
; IS__CGSCC_NPM-NEXT: store i32 -1, i32* [[G1]], align 32
; IS__CGSCC_NPM-NEXT: br label [[E]]
; IS__CGSCC_NPM: e:
; IS__CGSCC_NPM-NEXT: [[PHI:%.*]] = phi i32* [ [[G0]], [[T]] ], [ [[G1]], [[F]] ]
; IS__CGSCC_NPM-NEXT: ret i32* [[PHI]]
; ;
%l = load i32, i32* %p %l = load i32, i32* %p
%c = icmp eq i32 %l, 0 %c = icmp eq i32 %l, 0
br i1 %c, label %t, label %f br i1 %c, label %t, label %f
t: t:
%r = call i32* @test10b(i32* %p) %r = call i32* @test10b(i32* %p)
store i32 1, i32* %r store i32 1, i32* %r
%g0 = getelementptr i32, i32* %p, i32 8 %g0 = getelementptr i32, i32* %p, i32 8
br label %e br label %e
f: f:
%g1 = getelementptr i32, i32* %p, i32 -8 %g1 = getelementptr i32, i32* %p, i32 -8
store i32 -1, i32* %g1 store i32 -1, i32* %g1
br label %e br label %e
e: e:
%phi = phi i32* [%g0, %t], [%g1, %f] %phi = phi i32* [%g0, %t], [%g1, %f]
ret i32* %phi ret i32* %phi
} }
define i64 @test11(i32* %p) { define i64 @test11(i32* %p) {
; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind readonly willreturn ; IS__TUNIT____: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@test11 ; IS__TUNIT____-LABEL: define {{[^@]+}}@test11
; IS__TUNIT____-SAME: (i32* nocapture nofree nonnull readonly align 8 dereferenceable(8) [[P:%.*]]) #[[ATTR3:[0-9]+]] { ; IS__TUNIT____-SAME: (i32* nocapture nofree nonnull readonly align 8 dereferenceable(8) [[P:%.*]]) #[[ATTR3:[0-9]+]] {
; IS__TUNIT____-NEXT: [[P_CAST:%.*]] = bitcast i32* [[P]] to i64* ; IS__TUNIT____-NEXT: [[P_CAST:%.*]] = bitcast i32* [[P]] to i64*
; IS__TUNIT____-NEXT: [[RET:%.*]] = load i64, i64* [[P_CAST]], align 8 ; IS__TUNIT____-NEXT: [[RET:%.*]] = load i64, i64* [[P_CAST]], align 8
; IS__TUNIT____-NEXT: ret i64 [[RET]] ; IS__TUNIT____-NEXT: ret i64 [[RET]]
; ;
; IS__CGSCC_OPM: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn ; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@test11 ; IS__CGSCC____-LABEL: define {{[^@]+}}@test11
; IS__CGSCC_OPM-SAME: (i32* nocapture nofree nonnull readonly align 8 dereferenceable(8) [[P:%.*]]) #[[ATTR5:[0-9]+]] { ; IS__CGSCC____-SAME: (i32* nocapture nofree nonnull readonly align 8 dereferenceable(8) [[P:%.*]]) #[[ATTR4:[0-9]+]] {
; IS__CGSCC_OPM-NEXT: [[P_CAST:%.*]] = bitcast i32* [[P]] to i64* ; IS__CGSCC____-NEXT: [[P_CAST:%.*]] = bitcast i32* [[P]] to i64*
; IS__CGSCC_OPM-NEXT: [[RET:%.*]] = load i64, i64* [[P_CAST]], align 8 ; IS__CGSCC____-NEXT: [[RET:%.*]] = load i64, i64* [[P_CAST]], align 8
; IS__CGSCC_OPM-NEXT: ret i64 [[RET]] ; IS__CGSCC____-NEXT: ret i64 [[RET]]
;
; IS__CGSCC_NPM: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@test11
; IS__CGSCC_NPM-SAME: (i32* nocapture nofree nonnull readonly align 8 dereferenceable(8) [[P:%.*]]) #[[ATTR4:[0-9]+]] {
; IS__CGSCC_NPM-NEXT: [[P_CAST:%.*]] = bitcast i32* [[P]] to i64*
; IS__CGSCC_NPM-NEXT: [[RET:%.*]] = load i64, i64* [[P_CAST]], align 8
; IS__CGSCC_NPM-NEXT: ret i64 [[RET]]
; ;
%p-cast = bitcast i32* %p to i64* %p-cast = bitcast i32* %p to i64*
%ret = load i64, i64* %p-cast, align 8 %ret = load i64, i64* %p-cast, align 8
ret i64 %ret ret i64 %ret
} }
; TEST 12 ; TEST 12
; Test for deduction using must-be-executed-context and GEP instruction ; Test for deduction using must-be-executed-context and GEP instruction
; FXIME: %p should have nonnull ; FXIME: %p should have nonnull
define i64 @test12-1(i32* align 4 %p) { define i64 @test12-1(i32* align 4 %p) {
; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind readonly willreturn ; IS__TUNIT____: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@test12-1 ; IS__TUNIT____-LABEL: define {{[^@]+}}@test12-1
; IS__TUNIT____-SAME: (i32* nocapture nofree readonly align 16 [[P:%.*]]) #[[ATTR3]] { ; IS__TUNIT____-SAME: (i32* nocapture nofree readonly align 16 [[P:%.*]]) #[[ATTR3]] {
; IS__TUNIT____-NEXT: [[P_CAST:%.*]] = bitcast i32* [[P]] to i64* ; IS__TUNIT____-NEXT: [[P_CAST:%.*]] = bitcast i32* [[P]] to i64*
; IS__TUNIT____-NEXT: [[ARRAYIDX0:%.*]] = getelementptr i64, i64* [[P_CAST]], i64 1 ; IS__TUNIT____-NEXT: [[ARRAYIDX0:%.*]] = getelementptr i64, i64* [[P_CAST]], i64 1
; IS__TUNIT____-NEXT: [[ARRAYIDX1:%.*]] = getelementptr i64, i64* [[ARRAYIDX0]], i64 3 ; IS__TUNIT____-NEXT: [[ARRAYIDX1:%.*]] = getelementptr i64, i64* [[ARRAYIDX0]], i64 3
; IS__TUNIT____-NEXT: [[RET:%.*]] = load i64, i64* [[ARRAYIDX1]], align 16 ; IS__TUNIT____-NEXT: [[RET:%.*]] = load i64, i64* [[ARRAYIDX1]], align 16
; IS__TUNIT____-NEXT: ret i64 [[RET]] ; IS__TUNIT____-NEXT: ret i64 [[RET]]
; ;
; IS__CGSCC_OPM: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn ; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@test12-1 ; IS__CGSCC____-LABEL: define {{[^@]+}}@test12-1
; IS__CGSCC_OPM-SAME: (i32* nocapture nofree readonly align 16 [[P:%.*]]) #[[ATTR5]] { ; IS__CGSCC____-SAME: (i32* nocapture nofree readonly align 16 [[P:%.*]]) #[[ATTR4]] {
; IS__CGSCC_OPM-NEXT: [[P_CAST:%.*]] = bitcast i32* [[P]] to i64* ; IS__CGSCC____-NEXT: [[P_CAST:%.*]] = bitcast i32* [[P]] to i64*
; IS__CGSCC_OPM-NEXT: [[ARRAYIDX0:%.*]] = getelementptr i64, i64* [[P_CAST]], i64 1 ; IS__CGSCC____-NEXT: [[ARRAYIDX0:%.*]] = getelementptr i64, i64* [[P_CAST]], i64 1
; IS__CGSCC_OPM-NEXT: [[ARRAYIDX1:%.*]] = getelementptr i64, i64* [[ARRAYIDX0]], i64 3 ; IS__CGSCC____-NEXT: [[ARRAYIDX1:%.*]] = getelementptr i64, i64* [[ARRAYIDX0]], i64 3
; IS__CGSCC_OPM-NEXT: [[RET:%.*]] = load i64, i64* [[ARRAYIDX1]], align 16 ; IS__CGSCC____-NEXT: [[RET:%.*]] = load i64, i64* [[ARRAYIDX1]], align 16
; IS__CGSCC_OPM-NEXT: ret i64 [[RET]] ; IS__CGSCC____-NEXT: ret i64 [[RET]]
;
; IS__CGSCC_NPM: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@test12-1
; IS__CGSCC_NPM-SAME: (i32* nocapture nofree readonly align 16 [[P:%.*]]) #[[ATTR4]] {
; IS__CGSCC_NPM-NEXT: [[P_CAST:%.*]] = bitcast i32* [[P]] to i64*
; IS__CGSCC_NPM-NEXT: [[ARRAYIDX0:%.*]] = getelementptr i64, i64* [[P_CAST]], i64 1
; IS__CGSCC_NPM-NEXT: [[ARRAYIDX1:%.*]] = getelementptr i64, i64* [[ARRAYIDX0]], i64 3
; IS__CGSCC_NPM-NEXT: [[RET:%.*]] = load i64, i64* [[ARRAYIDX1]], align 16
; IS__CGSCC_NPM-NEXT: ret i64 [[RET]]
; ;
%p-cast = bitcast i32* %p to i64* %p-cast = bitcast i32* %p to i64*
%arrayidx0 = getelementptr i64, i64* %p-cast, i64 1 %arrayidx0 = getelementptr i64, i64* %p-cast, i64 1
%arrayidx1 = getelementptr i64, i64* %arrayidx0, i64 3 %arrayidx1 = getelementptr i64, i64* %arrayidx0, i64 3
%ret = load i64, i64* %arrayidx1, align 16 %ret = load i64, i64* %arrayidx1, align 16
ret i64 %ret ret i64 %ret
} }
define i64 @test12-2(i32* align 4 %p) { define i64 @test12-2(i32* align 4 %p) {
; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind readonly willreturn ; IS__TUNIT____: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@test12-2 ; IS__TUNIT____-LABEL: define {{[^@]+}}@test12-2
; IS__TUNIT____-SAME: (i32* nocapture nofree nonnull readonly align 16 dereferenceable(8) [[P:%.*]]) #[[ATTR3]] { ; IS__TUNIT____-SAME: (i32* nocapture nofree nonnull readonly align 16 dereferenceable(8) [[P:%.*]]) #[[ATTR3]] {
; IS__TUNIT____-NEXT: [[P_CAST:%.*]] = bitcast i32* [[P]] to i64* ; IS__TUNIT____-NEXT: [[P_CAST:%.*]] = bitcast i32* [[P]] to i64*
; IS__TUNIT____-NEXT: [[ARRAYIDX0:%.*]] = getelementptr i64, i64* [[P_CAST]], i64 0 ; IS__TUNIT____-NEXT: [[ARRAYIDX0:%.*]] = getelementptr i64, i64* [[P_CAST]], i64 0
; IS__TUNIT____-NEXT: [[RET:%.*]] = load i64, i64* [[ARRAYIDX0]], align 16 ; IS__TUNIT____-NEXT: [[RET:%.*]] = load i64, i64* [[ARRAYIDX0]], align 16
; IS__TUNIT____-NEXT: ret i64 [[RET]] ; IS__TUNIT____-NEXT: ret i64 [[RET]]
; ;
; IS__CGSCC_OPM: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn ; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@test12-2 ; IS__CGSCC____-LABEL: define {{[^@]+}}@test12-2
; IS__CGSCC_OPM-SAME: (i32* nocapture nofree nonnull readonly align 16 dereferenceable(8) [[P:%.*]]) #[[ATTR5]] { ; IS__CGSCC____-SAME: (i32* nocapture nofree nonnull readonly align 16 dereferenceable(8) [[P:%.*]]) #[[ATTR4]] {
; IS__CGSCC_OPM-NEXT: [[P_CAST:%.*]] = bitcast i32* [[P]] to i64* ; IS__CGSCC____-NEXT: [[P_CAST:%.*]] = bitcast i32* [[P]] to i64*
; IS__CGSCC_OPM-NEXT: [[ARRAYIDX0:%.*]] = getelementptr i64, i64* [[P_CAST]], i64 0 ; IS__CGSCC____-NEXT: [[ARRAYIDX0:%.*]] = getelementptr i64, i64* [[P_CAST]], i64 0
; IS__CGSCC_OPM-NEXT: [[RET:%.*]] = load i64, i64* [[ARRAYIDX0]], align 16 ; IS__CGSCC____-NEXT: [[RET:%.*]] = load i64, i64* [[ARRAYIDX0]], align 16
; IS__CGSCC_OPM-NEXT: ret i64 [[RET]] ; IS__CGSCC____-NEXT: ret i64 [[RET]]
;
; IS__CGSCC_NPM: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@test12-2
; IS__CGSCC_NPM-SAME: (i32* nocapture nofree nonnull readonly align 16 dereferenceable(8) [[P:%.*]]) #[[ATTR4]] {
; IS__CGSCC_NPM-NEXT: [[P_CAST:%.*]] = bitcast i32* [[P]] to i64*
; IS__CGSCC_NPM-NEXT: [[ARRAYIDX0:%.*]] = getelementptr i64, i64* [[P_CAST]], i64 0
; IS__CGSCC_NPM-NEXT: [[RET:%.*]] = load i64, i64* [[ARRAYIDX0]], align 16
; IS__CGSCC_NPM-NEXT: ret i64 [[RET]]
; ;
%p-cast = bitcast i32* %p to i64* %p-cast = bitcast i32* %p to i64*
%arrayidx0 = getelementptr i64, i64* %p-cast, i64 0 %arrayidx0 = getelementptr i64, i64* %p-cast, i64 0
%ret = load i64, i64* %arrayidx0, align 16 %ret = load i64, i64* %arrayidx0, align 16
ret i64 %ret ret i64 %ret
} }
; FXIME: %p should have nonnull ; FXIME: %p should have nonnull
define void @test12-3(i32* align 4 %p) { define void @test12-3(i32* align 4 %p) {
; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind willreturn writeonly ; IS__TUNIT____: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__TUNIT____-LABEL: define {{[^@]+}}@test12-3 ; IS__TUNIT____-LABEL: define {{[^@]+}}@test12-3
; IS__TUNIT____-SAME: (i32* nocapture nofree writeonly align 16 [[P:%.*]]) #[[ATTR4:[0-9]+]] { ; IS__TUNIT____-SAME: (i32* nocapture nofree writeonly align 16 [[P:%.*]]) #[[ATTR4:[0-9]+]] {
; IS__TUNIT____-NEXT: [[P_CAST:%.*]] = bitcast i32* [[P]] to i64* ; IS__TUNIT____-NEXT: [[P_CAST:%.*]] = bitcast i32* [[P]] to i64*
; IS__TUNIT____-NEXT: [[ARRAYIDX0:%.*]] = getelementptr i64, i64* [[P_CAST]], i64 1 ; IS__TUNIT____-NEXT: [[ARRAYIDX0:%.*]] = getelementptr i64, i64* [[P_CAST]], i64 1
; IS__TUNIT____-NEXT: [[ARRAYIDX1:%.*]] = getelementptr i64, i64* [[ARRAYIDX0]], i64 3 ; IS__TUNIT____-NEXT: [[ARRAYIDX1:%.*]] = getelementptr i64, i64* [[ARRAYIDX0]], i64 3
; IS__TUNIT____-NEXT: store i64 0, i64* [[ARRAYIDX1]], align 16 ; IS__TUNIT____-NEXT: store i64 0, i64* [[ARRAYIDX1]], align 16
; IS__TUNIT____-NEXT: ret void ; IS__TUNIT____-NEXT: ret void
; ;
; IS__CGSCC_OPM: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly ; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@test12-3 ; IS__CGSCC____-LABEL: define {{[^@]+}}@test12-3
; IS__CGSCC_OPM-SAME: (i32* nocapture nofree writeonly align 16 [[P:%.*]]) #[[ATTR6:[0-9]+]] { ; IS__CGSCC____-SAME: (i32* nocapture nofree writeonly align 16 [[P:%.*]]) #[[ATTR5:[0-9]+]] {
; IS__CGSCC_OPM-NEXT: [[P_CAST:%.*]] = bitcast i32* [[P]] to i64* ; IS__CGSCC____-NEXT: [[P_CAST:%.*]] = bitcast i32* [[P]] to i64*
; IS__CGSCC_OPM-NEXT: [[ARRAYIDX0:%.*]] = getelementptr i64, i64* [[P_CAST]], i64 1 ; IS__CGSCC____-NEXT: [[ARRAYIDX0:%.*]] = getelementptr i64, i64* [[P_CAST]], i64 1
; IS__CGSCC_OPM-NEXT: [[ARRAYIDX1:%.*]] = getelementptr i64, i64* [[ARRAYIDX0]], i64 3 ; IS__CGSCC____-NEXT: [[ARRAYIDX1:%.*]] = getelementptr i64, i64* [[ARRAYIDX0]], i64 3
; IS__CGSCC_OPM-NEXT: store i64 0, i64* [[ARRAYIDX1]], align 16 ; IS__CGSCC____-NEXT: store i64 0, i64* [[ARRAYIDX1]], align 16
; IS__CGSCC_OPM-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
;
; IS__CGSCC_NPM: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@test12-3
; IS__CGSCC_NPM-SAME: (i32* nocapture nofree writeonly align 16 [[P:%.*]]) #[[ATTR5:[0-9]+]] {
; IS__CGSCC_NPM-NEXT: [[P_CAST:%.*]] = bitcast i32* [[P]] to i64*
; IS__CGSCC_NPM-NEXT: [[ARRAYIDX0:%.*]] = getelementptr i64, i64* [[P_CAST]], i64 1
; IS__CGSCC_NPM-NEXT: [[ARRAYIDX1:%.*]] = getelementptr i64, i64* [[ARRAYIDX0]], i64 3
; IS__CGSCC_NPM-NEXT: store i64 0, i64* [[ARRAYIDX1]], align 16
; IS__CGSCC_NPM-NEXT: ret void
; ;
%p-cast = bitcast i32* %p to i64* %p-cast = bitcast i32* %p to i64*
%arrayidx0 = getelementptr i64, i64* %p-cast, i64 1 %arrayidx0 = getelementptr i64, i64* %p-cast, i64 1
%arrayidx1 = getelementptr i64, i64* %arrayidx0, i64 3 %arrayidx1 = getelementptr i64, i64* %arrayidx0, i64 3
store i64 0, i64* %arrayidx1, align 16 store i64 0, i64* %arrayidx1, align 16
ret void ret void
} }
define void @test12-4(i32* align 4 %p) { define void @test12-4(i32* align 4 %p) {
; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind willreturn writeonly ; IS__TUNIT____: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__TUNIT____-LABEL: define {{[^@]+}}@test12-4 ; IS__TUNIT____-LABEL: define {{[^@]+}}@test12-4
; IS__TUNIT____-SAME: (i32* nocapture nofree nonnull writeonly align 16 dereferenceable(8) [[P:%.*]]) #[[ATTR4]] { ; IS__TUNIT____-SAME: (i32* nocapture nofree nonnull writeonly align 16 dereferenceable(8) [[P:%.*]]) #[[ATTR4]] {
; IS__TUNIT____-NEXT: [[P_CAST:%.*]] = bitcast i32* [[P]] to i64* ; IS__TUNIT____-NEXT: [[P_CAST:%.*]] = bitcast i32* [[P]] to i64*
; IS__TUNIT____-NEXT: [[ARRAYIDX0:%.*]] = getelementptr i64, i64* [[P_CAST]], i64 0 ; IS__TUNIT____-NEXT: [[ARRAYIDX0:%.*]] = getelementptr i64, i64* [[P_CAST]], i64 0
; IS__TUNIT____-NEXT: store i64 0, i64* [[ARRAYIDX0]], align 16 ; IS__TUNIT____-NEXT: store i64 0, i64* [[ARRAYIDX0]], align 16
; IS__TUNIT____-NEXT: ret void ; IS__TUNIT____-NEXT: ret void
; ;
; IS__CGSCC_OPM: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly ; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@test12-4 ; IS__CGSCC____-LABEL: define {{[^@]+}}@test12-4
; IS__CGSCC_OPM-SAME: (i32* nocapture nofree nonnull writeonly align 16 dereferenceable(8) [[P:%.*]]) #[[ATTR6]] { ; IS__CGSCC____-SAME: (i32* nocapture nofree nonnull writeonly align 16 dereferenceable(8) [[P:%.*]]) #[[ATTR5]] {
; IS__CGSCC_OPM-NEXT: [[P_CAST:%.*]] = bitcast i32* [[P]] to i64* ; IS__CGSCC____-NEXT: [[P_CAST:%.*]] = bitcast i32* [[P]] to i64*
; IS__CGSCC_OPM-NEXT: [[ARRAYIDX0:%.*]] = getelementptr i64, i64* [[P_CAST]], i64 0 ; IS__CGSCC____-NEXT: [[ARRAYIDX0:%.*]] = getelementptr i64, i64* [[P_CAST]], i64 0
; IS__CGSCC_OPM-NEXT: store i64 0, i64* [[ARRAYIDX0]], align 16 ; IS__CGSCC____-NEXT: store i64 0, i64* [[ARRAYIDX0]], align 16
; IS__CGSCC_OPM-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
;
; IS__CGSCC_NPM: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@test12-4
; IS__CGSCC_NPM-SAME: (i32* nocapture nofree nonnull writeonly align 16 dereferenceable(8) [[P:%.*]]) #[[ATTR5]] {
; IS__CGSCC_NPM-NEXT: [[P_CAST:%.*]] = bitcast i32* [[P]] to i64*
; IS__CGSCC_NPM-NEXT: [[ARRAYIDX0:%.*]] = getelementptr i64, i64* [[P_CAST]], i64 0
; IS__CGSCC_NPM-NEXT: store i64 0, i64* [[ARRAYIDX0]], align 16
; IS__CGSCC_NPM-NEXT: ret void
; ;
%p-cast = bitcast i32* %p to i64* %p-cast = bitcast i32* %p to i64*
%arrayidx0 = getelementptr i64, i64* %p-cast, i64 0 %arrayidx0 = getelementptr i64, i64* %p-cast, i64 0
store i64 0, i64* %arrayidx0, align 16 store i64 0, i64* %arrayidx0, align 16
ret void ret void
} }
declare void @use(i64*) willreturn nounwind declare void @use(i64*) willreturn nounwind
define void @test12-5(i32* align 4 %p) { define void @test12-5(i32* align 4 %p) {
; IS__TUNIT____: Function Attrs: nounwind willreturn ; IS__TUNIT____: Function Attrs: nounwind willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@test12-5 ; IS__TUNIT____-LABEL: define {{[^@]+}}@test12-5
; IS__TUNIT____-SAME: (i32* align 16 [[P:%.*]]) #[[ATTR5:[0-9]+]] { ; IS__TUNIT____-SAME: (i32* align 16 [[P:%.*]]) #[[ATTR5:[0-9]+]] {
; IS__TUNIT____-NEXT: [[P_CAST:%.*]] = bitcast i32* [[P]] to i64* ; IS__TUNIT____-NEXT: [[P_CAST:%.*]] = bitcast i32* [[P]] to i64*
; IS__TUNIT____-NEXT: [[ARRAYIDX0:%.*]] = getelementptr i64, i64* [[P_CAST]], i64 1 ; IS__TUNIT____-NEXT: [[ARRAYIDX0:%.*]] = getelementptr i64, i64* [[P_CAST]], i64 1
; IS__TUNIT____-NEXT: [[ARRAYIDX1:%.*]] = getelementptr i64, i64* [[ARRAYIDX0]], i64 3 ; IS__TUNIT____-NEXT: [[ARRAYIDX1:%.*]] = getelementptr i64, i64* [[ARRAYIDX0]], i64 3
; IS__TUNIT____-NEXT: tail call void @use(i64* align 16 [[ARRAYIDX1]]) #[[ATTR5]] ; IS__TUNIT____-NEXT: tail call void @use(i64* align 16 [[ARRAYIDX1]]) #[[ATTR5]]
; IS__TUNIT____-NEXT: ret void ; IS__TUNIT____-NEXT: ret void
; ;
; IS__CGSCC_OPM: Function Attrs: nounwind willreturn ; IS__CGSCC____: Function Attrs: nounwind willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@test12-5 ; IS__CGSCC____-LABEL: define {{[^@]+}}@test12-5
; IS__CGSCC_OPM-SAME: (i32* align 16 [[P:%.*]]) #[[ATTR7:[0-9]+]] { ; IS__CGSCC____-SAME: (i32* align 16 [[P:%.*]]) #[[ATTR6:[0-9]+]] {
; IS__CGSCC_OPM-NEXT: [[P_CAST:%.*]] = bitcast i32* [[P]] to i64* ; IS__CGSCC____-NEXT: [[P_CAST:%.*]] = bitcast i32* [[P]] to i64*
; IS__CGSCC_OPM-NEXT: [[ARRAYIDX0:%.*]] = getelementptr i64, i64* [[P_CAST]], i64 1 ; IS__CGSCC____-NEXT: [[ARRAYIDX0:%.*]] = getelementptr i64, i64* [[P_CAST]], i64 1
; IS__CGSCC_OPM-NEXT: [[ARRAYIDX1:%.*]] = getelementptr i64, i64* [[ARRAYIDX0]], i64 3 ; IS__CGSCC____-NEXT: [[ARRAYIDX1:%.*]] = getelementptr i64, i64* [[ARRAYIDX0]], i64 3
; IS__CGSCC_OPM-NEXT: tail call void @use(i64* align 16 [[ARRAYIDX1]]) #[[ATTR7]] ; IS__CGSCC____-NEXT: tail call void @use(i64* align 16 [[ARRAYIDX1]]) #[[ATTR6]]
; IS__CGSCC_OPM-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
;
; IS__CGSCC_NPM: Function Attrs: nounwind willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@test12-5
; IS__CGSCC_NPM-SAME: (i32* align 16 [[P:%.*]]) #[[ATTR6:[0-9]+]] {
; IS__CGSCC_NPM-NEXT: [[P_CAST:%.*]] = bitcast i32* [[P]] to i64*
; IS__CGSCC_NPM-NEXT: [[ARRAYIDX0:%.*]] = getelementptr i64, i64* [[P_CAST]], i64 1
; IS__CGSCC_NPM-NEXT: [[ARRAYIDX1:%.*]] = getelementptr i64, i64* [[ARRAYIDX0]], i64 3
; IS__CGSCC_NPM-NEXT: tail call void @use(i64* align 16 [[ARRAYIDX1]]) #[[ATTR6]]
; IS__CGSCC_NPM-NEXT: ret void
; ;
%p-cast = bitcast i32* %p to i64* %p-cast = bitcast i32* %p to i64*
%arrayidx0 = getelementptr i64, i64* %p-cast, i64 1 %arrayidx0 = getelementptr i64, i64* %p-cast, i64 1
%arrayidx1 = getelementptr i64, i64* %arrayidx0, i64 3 %arrayidx1 = getelementptr i64, i64* %arrayidx0, i64 3
tail call void @use(i64* align 16 %arrayidx1) tail call void @use(i64* align 16 %arrayidx1)
ret void ret void
} }
define void @test12-6(i32* align 4 %p) { define void @test12-6(i32* align 4 %p) {
; IS__TUNIT____: Function Attrs: nounwind willreturn ; IS__TUNIT____: Function Attrs: nounwind willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@test12-6 ; IS__TUNIT____-LABEL: define {{[^@]+}}@test12-6
; IS__TUNIT____-SAME: (i32* align 16 [[P:%.*]]) #[[ATTR5]] { ; IS__TUNIT____-SAME: (i32* align 16 [[P:%.*]]) #[[ATTR5]] {
; IS__TUNIT____-NEXT: [[P_CAST:%.*]] = bitcast i32* [[P]] to i64* ; IS__TUNIT____-NEXT: [[P_CAST:%.*]] = bitcast i32* [[P]] to i64*
; IS__TUNIT____-NEXT: [[ARRAYIDX0:%.*]] = getelementptr i64, i64* [[P_CAST]], i64 0 ; IS__TUNIT____-NEXT: [[ARRAYIDX0:%.*]] = getelementptr i64, i64* [[P_CAST]], i64 0
; IS__TUNIT____-NEXT: tail call void @use(i64* align 16 [[ARRAYIDX0]]) #[[ATTR5]] ; IS__TUNIT____-NEXT: tail call void @use(i64* align 16 [[ARRAYIDX0]]) #[[ATTR5]]
; IS__TUNIT____-NEXT: ret void ; IS__TUNIT____-NEXT: ret void
; ;
; IS__CGSCC_OPM: Function Attrs: nounwind willreturn ; IS__CGSCC____: Function Attrs: nounwind willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@test12-6 ; IS__CGSCC____-LABEL: define {{[^@]+}}@test12-6
; IS__CGSCC_OPM-SAME: (i32* align 16 [[P:%.*]]) #[[ATTR7]] { ; IS__CGSCC____-SAME: (i32* align 16 [[P:%.*]]) #[[ATTR6]] {
; IS__CGSCC_OPM-NEXT: [[P_CAST:%.*]] = bitcast i32* [[P]] to i64* ; IS__CGSCC____-NEXT: [[P_CAST:%.*]] = bitcast i32* [[P]] to i64*
; IS__CGSCC_OPM-NEXT: [[ARRAYIDX0:%.*]] = getelementptr i64, i64* [[P_CAST]], i64 0 ; IS__CGSCC____-NEXT: [[ARRAYIDX0:%.*]] = getelementptr i64, i64* [[P_CAST]], i64 0
; IS__CGSCC_OPM-NEXT: tail call void @use(i64* align 16 [[ARRAYIDX0]]) #[[ATTR7]] ; IS__CGSCC____-NEXT: tail call void @use(i64* align 16 [[ARRAYIDX0]]) #[[ATTR6]]
; IS__CGSCC_OPM-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
;
; IS__CGSCC_NPM: Function Attrs: nounwind willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@test12-6
; IS__CGSCC_NPM-SAME: (i32* align 16 [[P:%.*]]) #[[ATTR6]] {
; IS__CGSCC_NPM-NEXT: [[P_CAST:%.*]] = bitcast i32* [[P]] to i64*
; IS__CGSCC_NPM-NEXT: [[ARRAYIDX0:%.*]] = getelementptr i64, i64* [[P_CAST]], i64 0
; IS__CGSCC_NPM-NEXT: tail call void @use(i64* align 16 [[ARRAYIDX0]]) #[[ATTR6]]
; IS__CGSCC_NPM-NEXT: ret void
; ;
%p-cast = bitcast i32* %p to i64* %p-cast = bitcast i32* %p to i64*
%arrayidx0 = getelementptr i64, i64* %p-cast, i64 0 %arrayidx0 = getelementptr i64, i64* %p-cast, i64 0
tail call void @use(i64* align 16 %arrayidx0) tail call void @use(i64* align 16 %arrayidx0)
ret void ret void
} }
define void @test13(i1 %c, i32* align 32 %dst) #0 { define void @test13(i1 %c, i32* align 32 %dst) #0 {
; IS__TUNIT____: Function Attrs: argmemonly nofree noinline nosync nounwind uwtable willreturn writeonly ; IS__TUNIT____: Function Attrs: argmemonly nofree noinline norecurse nosync nounwind uwtable willreturn writeonly
; IS__TUNIT____-LABEL: define {{[^@]+}}@test13 ; IS__TUNIT____-LABEL: define {{[^@]+}}@test13
; IS__TUNIT____-SAME: (i1 [[C:%.*]], i32* nocapture nofree writeonly align 32 [[DST:%.*]]) #[[ATTR6:[0-9]+]] { ; IS__TUNIT____-SAME: (i1 [[C:%.*]], i32* nocapture nofree writeonly align 32 [[DST:%.*]]) #[[ATTR6:[0-9]+]] {
; IS__TUNIT____-NEXT: br i1 [[C]], label [[TRUEBB:%.*]], label [[FALSEBB:%.*]] ; IS__TUNIT____-NEXT: br i1 [[C]], label [[TRUEBB:%.*]], label [[FALSEBB:%.*]]
; IS__TUNIT____: truebb: ; IS__TUNIT____: truebb:
; IS__TUNIT____-NEXT: br label [[END:%.*]] ; IS__TUNIT____-NEXT: br label [[END:%.*]]
; IS__TUNIT____: falsebb: ; IS__TUNIT____: falsebb:
; IS__TUNIT____-NEXT: br label [[END]] ; IS__TUNIT____-NEXT: br label [[END]]
; IS__TUNIT____: end: ; IS__TUNIT____: end:
; IS__TUNIT____-NEXT: [[PTR:%.*]] = phi i32* [ [[DST]], [[TRUEBB]] ], [ null, [[FALSEBB]] ] ; IS__TUNIT____-NEXT: [[PTR:%.*]] = phi i32* [ [[DST]], [[TRUEBB]] ], [ null, [[FALSEBB]] ]
; IS__TUNIT____-NEXT: store i32 0, i32* [[PTR]], align 32 ; IS__TUNIT____-NEXT: store i32 0, i32* [[PTR]], align 32
; IS__TUNIT____-NEXT: ret void ; IS__TUNIT____-NEXT: ret void
; ;
; IS__CGSCC_OPM: Function Attrs: argmemonly nofree noinline norecurse nosync nounwind uwtable willreturn writeonly ; IS__CGSCC____: Function Attrs: argmemonly nofree noinline norecurse nosync nounwind uwtable willreturn writeonly
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@test13 ; IS__CGSCC____-LABEL: define {{[^@]+}}@test13
; IS__CGSCC_OPM-SAME: (i1 [[C:%.*]], i32* nocapture nofree writeonly align 32 [[DST:%.*]]) #[[ATTR8:[0-9]+]] { ; IS__CGSCC____-SAME: (i1 [[C:%.*]], i32* nocapture nofree writeonly align 32 [[DST:%.*]]) #[[ATTR7:[0-9]+]] {
; IS__CGSCC_OPM-NEXT: br i1 [[C]], label [[TRUEBB:%.*]], label [[FALSEBB:%.*]] ; IS__CGSCC____-NEXT: br i1 [[C]], label [[TRUEBB:%.*]], label [[FALSEBB:%.*]]
; IS__CGSCC_OPM: truebb: ; IS__CGSCC____: truebb:
; IS__CGSCC_OPM-NEXT: br label [[END:%.*]] ; IS__CGSCC____-NEXT: br label [[END:%.*]]
; IS__CGSCC_OPM: falsebb: ; IS__CGSCC____: falsebb:
; IS__CGSCC_OPM-NEXT: br label [[END]] ; IS__CGSCC____-NEXT: br label [[END]]
; IS__CGSCC_OPM: end: ; IS__CGSCC____: end:
; IS__CGSCC_OPM-NEXT: [[PTR:%.*]] = phi i32* [ [[DST]], [[TRUEBB]] ], [ null, [[FALSEBB]] ] ; IS__CGSCC____-NEXT: [[PTR:%.*]] = phi i32* [ [[DST]], [[TRUEBB]] ], [ null, [[FALSEBB]] ]
; IS__CGSCC_OPM-NEXT: store i32 0, i32* [[PTR]], align 32 ; IS__CGSCC____-NEXT: store i32 0, i32* [[PTR]], align 32
; IS__CGSCC_OPM-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
;
; IS__CGSCC_NPM: Function Attrs: argmemonly nofree noinline norecurse nosync nounwind uwtable willreturn writeonly
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@test13
; IS__CGSCC_NPM-SAME: (i1 [[C:%.*]], i32* nocapture nofree writeonly align 32 [[DST:%.*]]) #[[ATTR7:[0-9]+]] {
; IS__CGSCC_NPM-NEXT: br i1 [[C]], label [[TRUEBB:%.*]], label [[FALSEBB:%.*]]
; IS__CGSCC_NPM: truebb:
; IS__CGSCC_NPM-NEXT: br label [[END:%.*]]
; IS__CGSCC_NPM: falsebb:
; IS__CGSCC_NPM-NEXT: br label [[END]]
; IS__CGSCC_NPM: end:
; IS__CGSCC_NPM-NEXT: [[PTR:%.*]] = phi i32* [ [[DST]], [[TRUEBB]] ], [ null, [[FALSEBB]] ]
; IS__CGSCC_NPM-NEXT: store i32 0, i32* [[PTR]], align 32
; IS__CGSCC_NPM-NEXT: ret void
; ;
br i1 %c, label %truebb, label %falsebb br i1 %c, label %truebb, label %falsebb
truebb: truebb:
br label %end br label %end
falsebb: falsebb:
br label %end br label %end
end: end:
%ptr = phi i32* [ %dst, %truebb ], [ null, %falsebb ] %ptr = phi i32* [ %dst, %truebb ], [ null, %falsebb ]
store i32 0, i32* %ptr store i32 0, i32* %ptr
ret void ret void
} }
define void @test13-1(i1 %c, i32* align 32 %dst) { define void @test13-1(i1 %c, i32* align 32 %dst) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind willreturn writeonly ; IS__TUNIT____: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly
; IS__TUNIT____-LABEL: define {{[^@]+}}@test13-1 ; IS__TUNIT____-LABEL: define {{[^@]+}}@test13-1
; IS__TUNIT____-SAME: (i1 [[C:%.*]], i32* nocapture nofree writeonly align 32 [[DST:%.*]]) #[[ATTR7:[0-9]+]] { ; IS__TUNIT____-SAME: (i1 [[C:%.*]], i32* nocapture nofree writeonly align 32 [[DST:%.*]]) #[[ATTR7:[0-9]+]] {
; IS__TUNIT____-NEXT: br i1 [[C]], label [[TRUEBB:%.*]], label [[FALSEBB:%.*]] ; IS__TUNIT____-NEXT: br i1 [[C]], label [[TRUEBB:%.*]], label [[FALSEBB:%.*]]
; IS__TUNIT____: truebb: ; IS__TUNIT____: truebb:
; IS__TUNIT____-NEXT: br label [[END:%.*]] ; IS__TUNIT____-NEXT: br label [[END:%.*]]
; IS__TUNIT____: falsebb: ; IS__TUNIT____: falsebb:
; IS__TUNIT____-NEXT: br label [[END]] ; IS__TUNIT____-NEXT: br label [[END]]
; IS__TUNIT____: end: ; IS__TUNIT____: end:
; IS__TUNIT____-NEXT: [[PTR:%.*]] = phi i32* [ [[DST]], [[TRUEBB]] ], [ inttoptr (i64 48 to i32*), [[FALSEBB]] ] ; IS__TUNIT____-NEXT: [[PTR:%.*]] = phi i32* [ [[DST]], [[TRUEBB]] ], [ inttoptr (i64 48 to i32*), [[FALSEBB]] ]
; IS__TUNIT____-NEXT: store i32 0, i32* [[PTR]], align 16 ; IS__TUNIT____-NEXT: store i32 0, i32* [[PTR]], align 16
; IS__TUNIT____-NEXT: ret void ; IS__TUNIT____-NEXT: ret void
; ;
; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@test13-1 ; IS__CGSCC____-LABEL: define {{[^@]+}}@test13-1
; IS__CGSCC_OPM-SAME: (i1 [[C:%.*]], i32* nocapture nofree writeonly align 32 [[DST:%.*]]) #[[ATTR9:[0-9]+]] { ; IS__CGSCC____-SAME: (i1 [[C:%.*]], i32* nocapture nofree writeonly align 32 [[DST:%.*]]) #[[ATTR8:[0-9]+]] {
; IS__CGSCC_OPM-NEXT: br i1 [[C]], label [[TRUEBB:%.*]], label [[FALSEBB:%.*]] ; IS__CGSCC____-NEXT: br i1 [[C]], label [[TRUEBB:%.*]], label [[FALSEBB:%.*]]
; IS__CGSCC_OPM: truebb: ; IS__CGSCC____: truebb:
; IS__CGSCC_OPM-NEXT: br label [[END:%.*]] ; IS__CGSCC____-NEXT: br label [[END:%.*]]
; IS__CGSCC_OPM: falsebb: ; IS__CGSCC____: falsebb:
; IS__CGSCC_OPM-NEXT: br label [[END]] ; IS__CGSCC____-NEXT: br label [[END]]
; IS__CGSCC_OPM: end: ; IS__CGSCC____: end:
; IS__CGSCC_OPM-NEXT: [[PTR:%.*]] = phi i32* [ [[DST]], [[TRUEBB]] ], [ inttoptr (i64 48 to i32*), [[FALSEBB]] ] ; IS__CGSCC____-NEXT: [[PTR:%.*]] = phi i32* [ [[DST]], [[TRUEBB]] ], [ inttoptr (i64 48 to i32*), [[FALSEBB]] ]
; IS__CGSCC_OPM-NEXT: store i32 0, i32* [[PTR]], align 16 ; IS__CGSCC____-NEXT: store i32 0, i32* [[PTR]], align 16
; IS__CGSCC_OPM-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
;
; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@test13-1
; IS__CGSCC_NPM-SAME: (i1 [[C:%.*]], i32* nocapture nofree writeonly align 32 [[DST:%.*]]) #[[ATTR8:[0-9]+]] {
; IS__CGSCC_NPM-NEXT: br i1 [[C]], label [[TRUEBB:%.*]], label [[FALSEBB:%.*]]
; IS__CGSCC_NPM: truebb:
; IS__CGSCC_NPM-NEXT: br label [[END:%.*]]
; IS__CGSCC_NPM: falsebb:
; IS__CGSCC_NPM-NEXT: br label [[END]]
; IS__CGSCC_NPM: end:
; IS__CGSCC_NPM-NEXT: [[PTR:%.*]] = phi i32* [ [[DST]], [[TRUEBB]] ], [ inttoptr (i64 48 to i32*), [[FALSEBB]] ]
; IS__CGSCC_NPM-NEXT: store i32 0, i32* [[PTR]], align 16
; IS__CGSCC_NPM-NEXT: ret void
; ;
br i1 %c, label %truebb, label %falsebb br i1 %c, label %truebb, label %falsebb
truebb: truebb:
br label %end br label %end
falsebb: falsebb:
br label %end br label %end
end: end:
%ptr = phi i32* [ %dst, %truebb ], [ inttoptr (i64 48 to i32*), %falsebb ] %ptr = phi i32* [ %dst, %truebb ], [ inttoptr (i64 48 to i32*), %falsebb ]
store i32 0, i32* %ptr store i32 0, i32* %ptr
ret void ret void
} }
define void @test13-2(i1 %c, i32* align 32 %dst) { define void @test13-2(i1 %c, i32* align 32 %dst) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind willreturn writeonly ; IS__TUNIT____: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly
; IS__TUNIT____-LABEL: define {{[^@]+}}@test13-2 ; IS__TUNIT____-LABEL: define {{[^@]+}}@test13-2
; IS__TUNIT____-SAME: (i1 [[C:%.*]], i32* nocapture nofree writeonly align 32 [[DST:%.*]]) #[[ATTR7]] { ; IS__TUNIT____-SAME: (i1 [[C:%.*]], i32* nocapture nofree writeonly align 32 [[DST:%.*]]) #[[ATTR7]] {
; IS__TUNIT____-NEXT: br i1 [[C]], label [[TRUEBB:%.*]], label [[FALSEBB:%.*]] ; IS__TUNIT____-NEXT: br i1 [[C]], label [[TRUEBB:%.*]], label [[FALSEBB:%.*]]
; IS__TUNIT____: truebb: ; IS__TUNIT____: truebb:
; IS__TUNIT____-NEXT: br label [[END:%.*]] ; IS__TUNIT____-NEXT: br label [[END:%.*]]
; IS__TUNIT____: falsebb: ; IS__TUNIT____: falsebb:
; IS__TUNIT____-NEXT: br label [[END]] ; IS__TUNIT____-NEXT: br label [[END]]
; IS__TUNIT____: end: ; IS__TUNIT____: end:
; IS__TUNIT____-NEXT: [[PTR:%.*]] = phi i32* [ [[DST]], [[TRUEBB]] ], [ inttoptr (i64 160 to i32*), [[FALSEBB]] ] ; IS__TUNIT____-NEXT: [[PTR:%.*]] = phi i32* [ [[DST]], [[TRUEBB]] ], [ inttoptr (i64 160 to i32*), [[FALSEBB]] ]
; IS__TUNIT____-NEXT: store i32 0, i32* [[PTR]], align 32 ; IS__TUNIT____-NEXT: store i32 0, i32* [[PTR]], align 32
; IS__TUNIT____-NEXT: ret void ; IS__TUNIT____-NEXT: ret void
; ;
; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@test13-2 ; IS__CGSCC____-LABEL: define {{[^@]+}}@test13-2
; IS__CGSCC_OPM-SAME: (i1 [[C:%.*]], i32* nocapture nofree writeonly align 32 [[DST:%.*]]) #[[ATTR9]] { ; IS__CGSCC____-SAME: (i1 [[C:%.*]], i32* nocapture nofree writeonly align 32 [[DST:%.*]]) #[[ATTR8]] {
; IS__CGSCC_OPM-NEXT: br i1 [[C]], label [[TRUEBB:%.*]], label [[FALSEBB:%.*]] ; IS__CGSCC____-NEXT: br i1 [[C]], label [[TRUEBB:%.*]], label [[FALSEBB:%.*]]
; IS__CGSCC_OPM: truebb: ; IS__CGSCC____: truebb:
; IS__CGSCC_OPM-NEXT: br label [[END:%.*]] ; IS__CGSCC____-NEXT: br label [[END:%.*]]
; IS__CGSCC_OPM: falsebb: ; IS__CGSCC____: falsebb:
; IS__CGSCC_OPM-NEXT: br label [[END]] ; IS__CGSCC____-NEXT: br label [[END]]
; IS__CGSCC_OPM: end: ; IS__CGSCC____: end:
; IS__CGSCC_OPM-NEXT: [[PTR:%.*]] = phi i32* [ [[DST]], [[TRUEBB]] ], [ inttoptr (i64 160 to i32*), [[FALSEBB]] ] ; IS__CGSCC____-NEXT: [[PTR:%.*]] = phi i32* [ [[DST]], [[TRUEBB]] ], [ inttoptr (i64 160 to i32*), [[FALSEBB]] ]
; IS__CGSCC_OPM-NEXT: store i32 0, i32* [[PTR]], align 32 ; IS__CGSCC____-NEXT: store i32 0, i32* [[PTR]], align 32
; IS__CGSCC_OPM-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
;
; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@test13-2
; IS__CGSCC_NPM-SAME: (i1 [[C:%.*]], i32* nocapture nofree writeonly align 32 [[DST:%.*]]) #[[ATTR8]] {
; IS__CGSCC_NPM-NEXT: br i1 [[C]], label [[TRUEBB:%.*]], label [[FALSEBB:%.*]]
; IS__CGSCC_NPM: truebb:
; IS__CGSCC_NPM-NEXT: br label [[END:%.*]]
; IS__CGSCC_NPM: falsebb:
; IS__CGSCC_NPM-NEXT: br label [[END]]
; IS__CGSCC_NPM: end:
; IS__CGSCC_NPM-NEXT: [[PTR:%.*]] = phi i32* [ [[DST]], [[TRUEBB]] ], [ inttoptr (i64 160 to i32*), [[FALSEBB]] ]
; IS__CGSCC_NPM-NEXT: store i32 0, i32* [[PTR]], align 32
; IS__CGSCC_NPM-NEXT: ret void
; ;
br i1 %c, label %truebb, label %falsebb br i1 %c, label %truebb, label %falsebb
truebb: truebb:
br label %end br label %end
falsebb: falsebb:
br label %end br label %end
end: end:
%ptr = phi i32* [ %dst, %truebb ], [ inttoptr (i64 160 to i32*), %falsebb ] %ptr = phi i32* [ %dst, %truebb ], [ inttoptr (i64 160 to i32*), %falsebb ]
store i32 0, i32* %ptr store i32 0, i32* %ptr
ret void ret void
} }
define void @test13-3(i1 %c, i32* align 32 %dst) { define void @test13-3(i1 %c, i32* align 32 %dst) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind willreturn writeonly ; IS__TUNIT____: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly
; IS__TUNIT____-LABEL: define {{[^@]+}}@test13-3 ; IS__TUNIT____-LABEL: define {{[^@]+}}@test13-3
; IS__TUNIT____-SAME: (i1 [[C:%.*]], i32* nocapture nofree writeonly align 32 [[DST:%.*]]) #[[ATTR7]] { ; IS__TUNIT____-SAME: (i1 [[C:%.*]], i32* nocapture nofree writeonly align 32 [[DST:%.*]]) #[[ATTR7]] {
; IS__TUNIT____-NEXT: br i1 [[C]], label [[TRUEBB:%.*]], label [[FALSEBB:%.*]] ; IS__TUNIT____-NEXT: br i1 [[C]], label [[TRUEBB:%.*]], label [[FALSEBB:%.*]]
; IS__TUNIT____: truebb: ; IS__TUNIT____: truebb:
; IS__TUNIT____-NEXT: br label [[END:%.*]] ; IS__TUNIT____-NEXT: br label [[END:%.*]]
; IS__TUNIT____: falsebb: ; IS__TUNIT____: falsebb:
; IS__TUNIT____-NEXT: br label [[END]] ; IS__TUNIT____-NEXT: br label [[END]]
; IS__TUNIT____: end: ; IS__TUNIT____: end:
; IS__TUNIT____-NEXT: [[PTR:%.*]] = phi i32* [ [[DST]], [[TRUEBB]] ], [ inttoptr (i64 128 to i32*), [[FALSEBB]] ] ; IS__TUNIT____-NEXT: [[PTR:%.*]] = phi i32* [ [[DST]], [[TRUEBB]] ], [ inttoptr (i64 128 to i32*), [[FALSEBB]] ]
; IS__TUNIT____-NEXT: store i32 0, i32* [[PTR]], align 32 ; IS__TUNIT____-NEXT: store i32 0, i32* [[PTR]], align 32
; IS__TUNIT____-NEXT: ret void ; IS__TUNIT____-NEXT: ret void
; ;
; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@test13-3 ; IS__CGSCC____-LABEL: define {{[^@]+}}@test13-3
; IS__CGSCC_OPM-SAME: (i1 [[C:%.*]], i32* nocapture nofree writeonly align 32 [[DST:%.*]]) #[[ATTR9]] { ; IS__CGSCC____-SAME: (i1 [[C:%.*]], i32* nocapture nofree writeonly align 32 [[DST:%.*]]) #[[ATTR8]] {
; IS__CGSCC_OPM-NEXT: br i1 [[C]], label [[TRUEBB:%.*]], label [[FALSEBB:%.*]] ; IS__CGSCC____-NEXT: br i1 [[C]], label [[TRUEBB:%.*]], label [[FALSEBB:%.*]]
; IS__CGSCC_OPM: truebb: ; IS__CGSCC____: truebb:
; IS__CGSCC_OPM-NEXT: br label [[END:%.*]] ; IS__CGSCC____-NEXT: br label [[END:%.*]]
; IS__CGSCC_OPM: falsebb: ; IS__CGSCC____: falsebb:
; IS__CGSCC_OPM-NEXT: br label [[END]] ; IS__CGSCC____-NEXT: br label [[END]]
; IS__CGSCC_OPM: end: ; IS__CGSCC____: end:
; IS__CGSCC_OPM-NEXT: [[PTR:%.*]] = phi i32* [ [[DST]], [[TRUEBB]] ], [ inttoptr (i64 128 to i32*), [[FALSEBB]] ] ; IS__CGSCC____-NEXT: [[PTR:%.*]] = phi i32* [ [[DST]], [[TRUEBB]] ], [ inttoptr (i64 128 to i32*), [[FALSEBB]] ]
; IS__CGSCC_OPM-NEXT: store i32 0, i32* [[PTR]], align 32 ; IS__CGSCC____-NEXT: store i32 0, i32* [[PTR]], align 32
; IS__CGSCC_OPM-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
;
; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@test13-3
; IS__CGSCC_NPM-SAME: (i1 [[C:%.*]], i32* nocapture nofree writeonly align 32 [[DST:%.*]]) #[[ATTR8]] {
; IS__CGSCC_NPM-NEXT: br i1 [[C]], label [[TRUEBB:%.*]], label [[FALSEBB:%.*]]
; IS__CGSCC_NPM: truebb:
; IS__CGSCC_NPM-NEXT: br label [[END:%.*]]
; IS__CGSCC_NPM: falsebb:
; IS__CGSCC_NPM-NEXT: br label [[END]]
; IS__CGSCC_NPM: end:
; IS__CGSCC_NPM-NEXT: [[PTR:%.*]] = phi i32* [ [[DST]], [[TRUEBB]] ], [ inttoptr (i64 128 to i32*), [[FALSEBB]] ]
; IS__CGSCC_NPM-NEXT: store i32 0, i32* [[PTR]], align 32
; IS__CGSCC_NPM-NEXT: ret void
; ;
br i1 %c, label %truebb, label %falsebb br i1 %c, label %truebb, label %falsebb
truebb: truebb:
br label %end br label %end
falsebb: falsebb:
br label %end br label %end
end: end:
%ptr = phi i32* [ %dst, %truebb ], [ inttoptr (i64 128 to i32*), %falsebb ] %ptr = phi i32* [ %dst, %truebb ], [ inttoptr (i64 128 to i32*), %falsebb ]
store i32 0, i32* %ptr store i32 0, i32* %ptr
ret void ret void
} }
; Don't crash on ptr2int/int2ptr uses. ; Don't crash on ptr2int/int2ptr uses.
define i64 @ptr2int(i32* %p) { define i64 @ptr2int(i32* %p) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__TUNIT____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@ptr2int ; IS__TUNIT____-LABEL: define {{[^@]+}}@ptr2int
; IS__TUNIT____-SAME: (i32* nofree readnone [[P:%.*]]) #[[ATTR8:[0-9]+]] { ; IS__TUNIT____-SAME: (i32* nofree readnone [[P:%.*]]) #[[ATTR8:[0-9]+]] {
; IS__TUNIT____-NEXT: [[P2I:%.*]] = ptrtoint i32* [[P]] to i64 ; IS__TUNIT____-NEXT: [[P2I:%.*]] = ptrtoint i32* [[P]] to i64
; IS__TUNIT____-NEXT: ret i64 [[P2I]] ; IS__TUNIT____-NEXT: ret i64 [[P2I]]
; ;
; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@ptr2int ; IS__CGSCC____-LABEL: define {{[^@]+}}@ptr2int
; IS__CGSCC_OPM-SAME: (i32* nofree readnone [[P:%.*]]) #[[ATTR10:[0-9]+]] { ; IS__CGSCC____-SAME: (i32* nofree readnone [[P:%.*]]) #[[ATTR9:[0-9]+]] {
; IS__CGSCC_OPM-NEXT: [[P2I:%.*]] = ptrtoint i32* [[P]] to i64 ; IS__CGSCC____-NEXT: [[P2I:%.*]] = ptrtoint i32* [[P]] to i64
; IS__CGSCC_OPM-NEXT: ret i64 [[P2I]] ; IS__CGSCC____-NEXT: ret i64 [[P2I]]
;
; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@ptr2int
; IS__CGSCC_NPM-SAME: (i32* nofree readnone [[P:%.*]]) #[[ATTR9:[0-9]+]] {
; IS__CGSCC_NPM-NEXT: [[P2I:%.*]] = ptrtoint i32* [[P]] to i64
; IS__CGSCC_NPM-NEXT: ret i64 [[P2I]]
; ;
%p2i = ptrtoint i32* %p to i64 %p2i = ptrtoint i32* %p to i64
ret i64 %p2i ret i64 %p2i
} }
define i64* @int2ptr(i64 %i) { define i64* @int2ptr(i64 %i) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__TUNIT____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@int2ptr ; IS__TUNIT____-LABEL: define {{[^@]+}}@int2ptr
; IS__TUNIT____-SAME: (i64 [[I:%.*]]) #[[ATTR8]] { ; IS__TUNIT____-SAME: (i64 [[I:%.*]]) #[[ATTR8]] {
; IS__TUNIT____-NEXT: [[I2P:%.*]] = inttoptr i64 [[I]] to i64* ; IS__TUNIT____-NEXT: [[I2P:%.*]] = inttoptr i64 [[I]] to i64*
; IS__TUNIT____-NEXT: ret i64* [[I2P]] ; IS__TUNIT____-NEXT: ret i64* [[I2P]]
; ;
; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@int2ptr ; IS__CGSCC____-LABEL: define {{[^@]+}}@int2ptr
; IS__CGSCC_OPM-SAME: (i64 [[I:%.*]]) #[[ATTR10]] { ; IS__CGSCC____-SAME: (i64 [[I:%.*]]) #[[ATTR9]] {
; IS__CGSCC_OPM-NEXT: [[I2P:%.*]] = inttoptr i64 [[I]] to i64* ; IS__CGSCC____-NEXT: [[I2P:%.*]] = inttoptr i64 [[I]] to i64*
; IS__CGSCC_OPM-NEXT: ret i64* [[I2P]] ; IS__CGSCC____-NEXT: ret i64* [[I2P]]
;
; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@int2ptr
; IS__CGSCC_NPM-SAME: (i64 [[I:%.*]]) #[[ATTR9]] {
; IS__CGSCC_NPM-NEXT: [[I2P:%.*]] = inttoptr i64 [[I]] to i64*
; IS__CGSCC_NPM-NEXT: ret i64* [[I2P]]
; ;
%i2p = inttoptr i64 %i to i64* %i2p = inttoptr i64 %i to i64*
ret i64* %i2p ret i64* %i2p
} }
; Use the store alignment only for the pointer operand. ; Use the store alignment only for the pointer operand.
define void @aligned_store(i8* %Value, i8** %Ptr) { define void @aligned_store(i8* %Value, i8** %Ptr) {
; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind willreturn writeonly ; IS__TUNIT____: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__TUNIT____-LABEL: define {{[^@]+}}@aligned_store ; IS__TUNIT____-LABEL: define {{[^@]+}}@aligned_store
; IS__TUNIT____-SAME: (i8* nofree writeonly [[VALUE:%.*]], i8** nocapture nofree noundef nonnull writeonly align 32 dereferenceable(8) [[PTR:%.*]]) #[[ATTR4]] { ; IS__TUNIT____-SAME: (i8* nofree writeonly [[VALUE:%.*]], i8** nocapture nofree noundef nonnull writeonly align 32 dereferenceable(8) [[PTR:%.*]]) #[[ATTR4]] {
; IS__TUNIT____-NEXT: store i8* [[VALUE]], i8** [[PTR]], align 32 ; IS__TUNIT____-NEXT: store i8* [[VALUE]], i8** [[PTR]], align 32
; IS__TUNIT____-NEXT: ret void ; IS__TUNIT____-NEXT: ret void
; ;
; IS__CGSCC_OPM: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly ; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@aligned_store ; IS__CGSCC____-LABEL: define {{[^@]+}}@aligned_store
; IS__CGSCC_OPM-SAME: (i8* nofree writeonly [[VALUE:%.*]], i8** nocapture nofree noundef nonnull writeonly align 32 dereferenceable(8) [[PTR:%.*]]) #[[ATTR6]] { ; IS__CGSCC____-SAME: (i8* nofree writeonly [[VALUE:%.*]], i8** nocapture nofree noundef nonnull writeonly align 32 dereferenceable(8) [[PTR:%.*]]) #[[ATTR5]] {
; IS__CGSCC_OPM-NEXT: store i8* [[VALUE]], i8** [[PTR]], align 32 ; IS__CGSCC____-NEXT: store i8* [[VALUE]], i8** [[PTR]], align 32
; IS__CGSCC_OPM-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
;
; IS__CGSCC_NPM: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@aligned_store
; IS__CGSCC_NPM-SAME: (i8* nofree writeonly [[VALUE:%.*]], i8** nocapture nofree noundef nonnull writeonly align 32 dereferenceable(8) [[PTR:%.*]]) #[[ATTR5]] {
; IS__CGSCC_NPM-NEXT: store i8* [[VALUE]], i8** [[PTR]], align 32
; IS__CGSCC_NPM-NEXT: ret void
; ;
store i8* %Value, i8** %Ptr, align 32 store i8* %Value, i8** %Ptr, align 32
ret void ret void
} }
declare i8* @some_func(i8*) declare i8* @some_func(i8*)
define void @align_call_op_not_store(i8* align 2048 %arg) { define void @align_call_op_not_store(i8* align 2048 %arg) {
; CHECK-LABEL: define {{[^@]+}}@align_call_op_not_store ; CHECK-LABEL: define {{[^@]+}}@align_call_op_not_store
; CHECK-SAME: (i8* align 2048 [[ARG:%.*]]) { ; CHECK-SAME: (i8* align 2048 [[ARG:%.*]]) {
; CHECK-NEXT: [[UNKNOWN:%.*]] = call i8* @some_func(i8* align 2048 [[ARG]]) ; CHECK-NEXT: [[UNKNOWN:%.*]] = call i8* @some_func(i8* align 2048 [[ARG]])
; CHECK-NEXT: store i8 0, i8* [[UNKNOWN]], align 1 ; CHECK-NEXT: store i8 0, i8* [[UNKNOWN]], align 1
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
%unknown = call i8* @some_func(i8* %arg) %unknown = call i8* @some_func(i8* %arg)
store i8 0, i8* %unknown store i8 0, i8* %unknown
ret void ret void
} }
define void @align_store_after_bc(i32* align 2048 %arg) { define void @align_store_after_bc(i32* align 2048 %arg) {
; ;
; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind willreturn writeonly ; IS__TUNIT____: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__TUNIT____-LABEL: define {{[^@]+}}@align_store_after_bc ; IS__TUNIT____-LABEL: define {{[^@]+}}@align_store_after_bc
; IS__TUNIT____-SAME: (i32* nocapture nofree nonnull writeonly align 2048 dereferenceable(1) [[ARG:%.*]]) #[[ATTR4]] { ; IS__TUNIT____-SAME: (i32* nocapture nofree nonnull writeonly align 2048 dereferenceable(1) [[ARG:%.*]]) #[[ATTR4]] {
; IS__TUNIT____-NEXT: [[BC:%.*]] = bitcast i32* [[ARG]] to i8* ; IS__TUNIT____-NEXT: [[BC:%.*]] = bitcast i32* [[ARG]] to i8*
; IS__TUNIT____-NEXT: store i8 0, i8* [[BC]], align 2048 ; IS__TUNIT____-NEXT: store i8 0, i8* [[BC]], align 2048
; IS__TUNIT____-NEXT: ret void ; IS__TUNIT____-NEXT: ret void
; ;
; IS__CGSCC_OPM: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly ; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@align_store_after_bc ; IS__CGSCC____-LABEL: define {{[^@]+}}@align_store_after_bc
; IS__CGSCC_OPM-SAME: (i32* nocapture nofree nonnull writeonly align 2048 dereferenceable(1) [[ARG:%.*]]) #[[ATTR6]] { ; IS__CGSCC____-SAME: (i32* nocapture nofree nonnull writeonly align 2048 dereferenceable(1) [[ARG:%.*]]) #[[ATTR5]] {
; IS__CGSCC_OPM-NEXT: [[BC:%.*]] = bitcast i32* [[ARG]] to i8* ; IS__CGSCC____-NEXT: [[BC:%.*]] = bitcast i32* [[ARG]] to i8*
; IS__CGSCC_OPM-NEXT: store i8 0, i8* [[BC]], align 2048 ; IS__CGSCC____-NEXT: store i8 0, i8* [[BC]], align 2048
; IS__CGSCC_OPM-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
;
; IS__CGSCC_NPM: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@align_store_after_bc
; IS__CGSCC_NPM-SAME: (i32* nocapture nofree nonnull writeonly align 2048 dereferenceable(1) [[ARG:%.*]]) #[[ATTR5]] {
; IS__CGSCC_NPM-NEXT: [[BC:%.*]] = bitcast i32* [[ARG]] to i8*
; IS__CGSCC_NPM-NEXT: store i8 0, i8* [[BC]], align 2048
; IS__CGSCC_NPM-NEXT: ret void
; ;
%bc = bitcast i32* %arg to i8* %bc = bitcast i32* %arg to i8*
store i8 0, i8* %bc store i8 0, i8* %bc
ret void ret void
} }
; Make sure we do not annotate the callee of a must-tail call with an alignment ; Make sure we do not annotate the callee of a must-tail call with an alignment
; we cannot also put on the caller. ; we cannot also put on the caller.
@cnd = external global i1 @cnd = external global i1
define i32 @musttail_callee_1(i32* %p) { define i32 @musttail_callee_1(i32* %p) {
; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind readonly willreturn ; IS__TUNIT____: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@musttail_callee_1 ; IS__TUNIT____-LABEL: define {{[^@]+}}@musttail_callee_1
; IS__TUNIT____-SAME: (i32* nocapture nofree noundef nonnull readonly dereferenceable(4) [[P:%.*]]) #[[ATTR3]] { ; IS__TUNIT____-SAME: (i32* nocapture nofree noundef nonnull readonly dereferenceable(4) [[P:%.*]]) #[[ATTR3]] {
; IS__TUNIT____-NEXT: [[V:%.*]] = load i32, i32* [[P]], align 32 ; IS__TUNIT____-NEXT: [[V:%.*]] = load i32, i32* [[P]], align 32
; IS__TUNIT____-NEXT: ret i32 [[V]] ; IS__TUNIT____-NEXT: ret i32 [[V]]
; ;
; IS__CGSCC_OPM: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn ; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@musttail_callee_1 ; IS__CGSCC____-LABEL: define {{[^@]+}}@musttail_callee_1
; IS__CGSCC_OPM-SAME: (i32* nocapture nofree noundef nonnull readonly dereferenceable(4) [[P:%.*]]) #[[ATTR5]] { ; IS__CGSCC____-SAME: (i32* nocapture nofree noundef nonnull readonly dereferenceable(4) [[P:%.*]]) #[[ATTR4]] {
; IS__CGSCC_OPM-NEXT: [[V:%.*]] = load i32, i32* [[P]], align 32 ; IS__CGSCC____-NEXT: [[V:%.*]] = load i32, i32* [[P]], align 32
; IS__CGSCC_OPM-NEXT: ret i32 [[V]] ; IS__CGSCC____-NEXT: ret i32 [[V]]
;
; IS__CGSCC_NPM: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@musttail_callee_1
; IS__CGSCC_NPM-SAME: (i32* nocapture nofree noundef nonnull readonly dereferenceable(4) [[P:%.*]]) #[[ATTR4]] {
; IS__CGSCC_NPM-NEXT: [[V:%.*]] = load i32, i32* [[P]], align 32
; IS__CGSCC_NPM-NEXT: ret i32 [[V]]
; ;
%v = load i32, i32* %p, align 32 %v = load i32, i32* %p, align 32
ret i32 %v ret i32 %v
} }
define i32 @musttail_caller_1(i32* %p) { define i32 @musttail_caller_1(i32* %p) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readonly willreturn ; IS__TUNIT____: Function Attrs: nofree norecurse nosync nounwind readonly willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@musttail_caller_1 ; IS__TUNIT____-LABEL: define {{[^@]+}}@musttail_caller_1
; IS__TUNIT____-SAME: (i32* nocapture nofree readonly [[P:%.*]]) #[[ATTR9:[0-9]+]] { ; IS__TUNIT____-SAME: (i32* nocapture nofree readonly [[P:%.*]]) #[[ATTR9:[0-9]+]] {
; IS__TUNIT____-NEXT: [[C:%.*]] = load i1, i1* @cnd, align 1 ; IS__TUNIT____-NEXT: [[C:%.*]] = load i1, i1* @cnd, align 1
; IS__TUNIT____-NEXT: br i1 [[C]], label [[MT:%.*]], label [[EXIT:%.*]] ; IS__TUNIT____-NEXT: br i1 [[C]], label [[MT:%.*]], label [[EXIT:%.*]]
; IS__TUNIT____: mt: ; IS__TUNIT____: mt:
; IS__TUNIT____-NEXT: [[V:%.*]] = musttail call i32 @musttail_callee_1(i32* nocapture nofree readonly [[P]]) #[[ATTR9]] ; IS__TUNIT____-NEXT: [[V:%.*]] = musttail call i32 @musttail_callee_1(i32* nocapture nofree readonly [[P]]) #[[ATTR10:[0-9]+]]
; IS__TUNIT____-NEXT: ret i32 [[V]] ; IS__TUNIT____-NEXT: ret i32 [[V]]
; IS__TUNIT____: exit: ; IS__TUNIT____: exit:
; IS__TUNIT____-NEXT: ret i32 0 ; IS__TUNIT____-NEXT: ret i32 0
; ;
; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readonly willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readonly willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@musttail_caller_1 ; IS__CGSCC____-LABEL: define {{[^@]+}}@musttail_caller_1
; IS__CGSCC_OPM-SAME: (i32* nocapture nofree readonly [[P:%.*]]) #[[ATTR11:[0-9]+]] { ; IS__CGSCC____-SAME: (i32* nocapture nofree readonly [[P:%.*]]) #[[ATTR10:[0-9]+]] {
; IS__CGSCC_OPM-NEXT: [[C:%.*]] = load i1, i1* @cnd, align 1 ; IS__CGSCC____-NEXT: [[C:%.*]] = load i1, i1* @cnd, align 1
; IS__CGSCC_OPM-NEXT: br i1 [[C]], label [[MT:%.*]], label [[EXIT:%.*]] ; IS__CGSCC____-NEXT: br i1 [[C]], label [[MT:%.*]], label [[EXIT:%.*]]
; IS__CGSCC_OPM: mt: ; IS__CGSCC____: mt:
; IS__CGSCC_OPM-NEXT: [[V:%.*]] = musttail call i32 @musttail_callee_1(i32* nocapture nofree noundef nonnull readonly dereferenceable(4) [[P]]) #[[ATTR12:[0-9]+]] ; IS__CGSCC____-NEXT: [[V:%.*]] = musttail call i32 @musttail_callee_1(i32* nocapture nofree noundef nonnull readonly dereferenceable(4) [[P]]) #[[ATTR11:[0-9]+]]
; IS__CGSCC_OPM-NEXT: ret i32 [[V]] ; IS__CGSCC____-NEXT: ret i32 [[V]]
; IS__CGSCC_OPM: exit: ; IS__CGSCC____: exit:
; IS__CGSCC_OPM-NEXT: ret i32 0 ; IS__CGSCC____-NEXT: ret i32 0
;
; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readonly willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@musttail_caller_1
; IS__CGSCC_NPM-SAME: (i32* nocapture nofree readonly [[P:%.*]]) #[[ATTR10:[0-9]+]] {
; IS__CGSCC_NPM-NEXT: [[C:%.*]] = load i1, i1* @cnd, align 1
; IS__CGSCC_NPM-NEXT: br i1 [[C]], label [[MT:%.*]], label [[EXIT:%.*]]
; IS__CGSCC_NPM: mt:
; IS__CGSCC_NPM-NEXT: [[V:%.*]] = musttail call i32 @musttail_callee_1(i32* nocapture nofree noundef nonnull readonly dereferenceable(4) [[P]]) #[[ATTR11:[0-9]+]]
; IS__CGSCC_NPM-NEXT: ret i32 [[V]]
; IS__CGSCC_NPM: exit:
; IS__CGSCC_NPM-NEXT: ret i32 0
; ;
%c = load i1, i1* @cnd %c = load i1, i1* @cnd
br i1 %c, label %mt, label %exit br i1 %c, label %mt, label %exit
mt: mt:
%v = musttail call i32 @musttail_callee_1(i32* %p) %v = musttail call i32 @musttail_callee_1(i32* %p)
ret i32 %v ret i32 %v
exit: exit:
ret i32 0 ret i32 0
Show All 11 Lines
; IS__TUNIT____-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i32, i32* [[P]], i64 4 ; IS__TUNIT____-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i32, i32* [[P]], i64 4
; IS__TUNIT____-NEXT: [[CALL:%.*]] = call nonnull align 16 i32* @checkAndAdvance(i32* nonnull readonly align 16 "no-capture-maybe-returned" [[ADD_PTR]]) #[[ATTR1]] ; IS__TUNIT____-NEXT: [[CALL:%.*]] = call nonnull align 16 i32* @checkAndAdvance(i32* nonnull readonly align 16 "no-capture-maybe-returned" [[ADD_PTR]]) #[[ATTR1]]
; IS__TUNIT____-NEXT: br label [[RETURN]] ; IS__TUNIT____-NEXT: br label [[RETURN]]
; IS__TUNIT____: return: ; IS__TUNIT____: return:
; IS__TUNIT____-NEXT: [[RETVAL_0:%.*]] = phi i32* [ [[CALL]], [[IF_THEN]] ], [ [[P]], [[ENTRY:%.*]] ] ; IS__TUNIT____-NEXT: [[RETVAL_0:%.*]] = phi i32* [ [[CALL]], [[IF_THEN]] ], [ [[P]], [[ENTRY:%.*]] ]
; IS__TUNIT____-NEXT: call void @user_i32_ptr(i32* noalias nocapture nonnull readnone align 16 [[RETVAL_0]]) #[[ATTR1]] ; IS__TUNIT____-NEXT: call void @user_i32_ptr(i32* noalias nocapture nonnull readnone align 16 [[RETVAL_0]]) #[[ATTR1]]
; IS__TUNIT____-NEXT: ret i32* [[RETVAL_0]] ; IS__TUNIT____-NEXT: ret i32* [[RETVAL_0]]
; ;
; IS__CGSCC_OPM: Function Attrs: nounwind ; IS__CGSCC____: Function Attrs: nounwind
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@checkAndAdvance ; IS__CGSCC____-LABEL: define {{[^@]+}}@checkAndAdvance
; IS__CGSCC_OPM-SAME: (i32* noundef nonnull readonly align 16 dereferenceable(4) "no-capture-maybe-returned" [[P:%.*]]) #[[ATTR3]] { ; IS__CGSCC____-SAME: (i32* noundef nonnull readonly align 16 dereferenceable(4) "no-capture-maybe-returned" [[P:%.*]]) #[[ATTR2]] {
; IS__CGSCC_OPM-NEXT: entry: ; IS__CGSCC____-NEXT: entry:
; IS__CGSCC_OPM-NEXT: [[TMP0:%.*]] = load i32, i32* [[P]], align 16 ; IS__CGSCC____-NEXT: [[TMP0:%.*]] = load i32, i32* [[P]], align 16
; IS__CGSCC_OPM-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP0]], 0 ; IS__CGSCC____-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP0]], 0
; IS__CGSCC_OPM-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[RETURN:%.*]] ; IS__CGSCC____-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[RETURN:%.*]]
; IS__CGSCC_OPM: if.then: ; IS__CGSCC____: if.then:
; IS__CGSCC_OPM-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i32, i32* [[P]], i64 4 ; IS__CGSCC____-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i32, i32* [[P]], i64 4
; IS__CGSCC_OPM-NEXT: [[CALL:%.*]] = call nonnull align 16 i32* @checkAndAdvance(i32* nonnull readonly align 16 "no-capture-maybe-returned" [[ADD_PTR]]) #[[ATTR3]] ; IS__CGSCC____-NEXT: [[CALL:%.*]] = call nonnull align 16 i32* @checkAndAdvance(i32* nonnull readonly align 16 "no-capture-maybe-returned" [[ADD_PTR]]) #[[ATTR2]]
; IS__CGSCC_OPM-NEXT: br label [[RETURN]] ; IS__CGSCC____-NEXT: br label [[RETURN]]
; IS__CGSCC_OPM: return: ; IS__CGSCC____: return:
; IS__CGSCC_OPM-NEXT: [[RETVAL_0:%.*]] = phi i32* [ [[CALL]], [[IF_THEN]] ], [ [[P]], [[ENTRY:%.*]] ] ; IS__CGSCC____-NEXT: [[RETVAL_0:%.*]] = phi i32* [ [[CALL]], [[IF_THEN]] ], [ [[P]], [[ENTRY:%.*]] ]
; IS__CGSCC_OPM-NEXT: call void @user_i32_ptr(i32* noalias nocapture nonnull readnone align 16 [[RETVAL_0]]) #[[ATTR3]] ; IS__CGSCC____-NEXT: call void @user_i32_ptr(i32* noalias nocapture nonnull readnone align 16 [[RETVAL_0]]) #[[ATTR2]]
; IS__CGSCC_OPM-NEXT: ret i32* [[RETVAL_0]] ; IS__CGSCC____-NEXT: ret i32* [[RETVAL_0]]
;
; IS__CGSCC_NPM: Function Attrs: nounwind
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@checkAndAdvance
; IS__CGSCC_NPM-SAME: (i32* noundef nonnull readonly align 16 dereferenceable(4) "no-capture-maybe-returned" [[P:%.*]]) #[[ATTR2]] {
; IS__CGSCC_NPM-NEXT: entry:
; IS__CGSCC_NPM-NEXT: [[TMP0:%.*]] = load i32, i32* [[P]], align 16
; IS__CGSCC_NPM-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP0]], 0
; IS__CGSCC_NPM-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[RETURN:%.*]]
; IS__CGSCC_NPM: if.then:
; IS__CGSCC_NPM-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i32, i32* [[P]], i64 4
; IS__CGSCC_NPM-NEXT: [[CALL:%.*]] = call nonnull align 16 i32* @checkAndAdvance(i32* nonnull readonly align 16 "no-capture-maybe-returned" [[ADD_PTR]]) #[[ATTR2]]
; IS__CGSCC_NPM-NEXT: br label [[RETURN]]
; IS__CGSCC_NPM: return:
; IS__CGSCC_NPM-NEXT: [[RETVAL_0:%.*]] = phi i32* [ [[CALL]], [[IF_THEN]] ], [ [[P]], [[ENTRY:%.*]] ]
; IS__CGSCC_NPM-NEXT: call void @user_i32_ptr(i32* noalias nocapture nonnull readnone align 16 [[RETVAL_0]]) #[[ATTR2]]
; IS__CGSCC_NPM-NEXT: ret i32* [[RETVAL_0]]
; ;
entry: entry:
%0 = load i32, i32* %p, align 4 %0 = load i32, i32* %p, align 4
%cmp = icmp eq i32 %0, 0 %cmp = icmp eq i32 %0, 0
br i1 %cmp, label %if.then, label %return br i1 %cmp, label %if.then, label %return
if.then: ; preds = %entry if.then: ; preds = %entry
%add.ptr = getelementptr inbounds i32, i32* %p, i64 4 %add.ptr = getelementptr inbounds i32, i32* %p, i64 4
Show All 19 Lines
declare void @align4_callee(i8* align(4) %p) declare void @align4_callee(i8* align(4) %p)
attributes #0 = { nounwind uwtable noinline } attributes #0 = { nounwind uwtable noinline }
attributes #1 = { uwtable noinline } attributes #1 = { uwtable noinline }
attributes #2 = { null_pointer_is_valid } attributes #2 = { null_pointer_is_valid }
;. ;.
; IS__TUNIT____: attributes #[[ATTR0]] = { nofree noinline nosync nounwind readnone uwtable willreturn } ; IS__TUNIT____: attributes #[[ATTR0]] = { nofree noinline norecurse nosync nounwind readnone uwtable willreturn }
; IS__TUNIT____: attributes #[[ATTR1]] = { nounwind } ; IS__TUNIT____: attributes #[[ATTR1]] = { nounwind }
; IS__TUNIT____: attributes #[[ATTR2]] = { nofree nosync nounwind } ; IS__TUNIT____: attributes #[[ATTR2]] = { nofree nosync nounwind }
; IS__TUNIT____: attributes #[[ATTR3]] = { argmemonly nofree nosync nounwind readonly willreturn } ; IS__TUNIT____: attributes #[[ATTR3]] = { argmemonly nofree norecurse nosync nounwind readonly willreturn }
; IS__TUNIT____: attributes #[[ATTR4]] = { argmemonly nofree nosync nounwind willreturn writeonly } ; IS__TUNIT____: attributes #[[ATTR4]] = { argmemonly nofree norecurse nosync nounwind willreturn writeonly }
; IS__TUNIT____: attributes #[[ATTR5]] = { nounwind willreturn } ; IS__TUNIT____: attributes #[[ATTR5]] = { nounwind willreturn }
; IS__TUNIT____: attributes #[[ATTR6]] = { argmemonly nofree noinline nosync nounwind uwtable willreturn writeonly } ; IS__TUNIT____: attributes #[[ATTR6]] = { argmemonly nofree noinline norecurse nosync nounwind uwtable willreturn writeonly }
; IS__TUNIT____: attributes #[[ATTR7]] = { nofree nosync nounwind willreturn writeonly } ; IS__TUNIT____: attributes #[[ATTR7]] = { nofree norecurse nosync nounwind willreturn writeonly }
; IS__TUNIT____: attributes #[[ATTR8]] = { nofree nosync nounwind readnone willreturn } ; IS__TUNIT____: attributes #[[ATTR8]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__TUNIT____: attributes #[[ATTR9]] = { nofree nosync nounwind readonly willreturn } ; IS__TUNIT____: attributes #[[ATTR9]] = { nofree norecurse nosync nounwind readonly willreturn }
;. ; IS__TUNIT____: attributes #[[ATTR10]] = { nofree nosync nounwind readonly willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR0]] = { nofree noinline norecurse nosync nounwind readnone uwtable willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR1]] = { nofree noinline nosync nounwind readnone uwtable willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR2]] = { noinline nounwind uwtable }
; IS__CGSCC_OPM: attributes #[[ATTR3]] = { nounwind }
; IS__CGSCC_OPM: attributes #[[ATTR4]] = { nofree nosync nounwind }
; IS__CGSCC_OPM: attributes #[[ATTR5]] = { argmemonly nofree norecurse nosync nounwind readonly willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR6]] = { argmemonly nofree norecurse nosync nounwind willreturn writeonly }
; IS__CGSCC_OPM: attributes #[[ATTR7]] = { nounwind willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR8]] = { argmemonly nofree noinline norecurse nosync nounwind uwtable willreturn writeonly }
; IS__CGSCC_OPM: attributes #[[ATTR9]] = { nofree norecurse nosync nounwind willreturn writeonly }
; IS__CGSCC_OPM: attributes #[[ATTR10]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR11]] = { nofree norecurse nosync nounwind readonly willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR12]] = { readonly willreturn }
;. ;.
; IS__CGSCC_NPM: attributes #[[ATTR0]] = { nofree noinline norecurse nosync nounwind readnone uwtable willreturn } ; IS__CGSCC____: attributes #[[ATTR0]] = { nofree noinline norecurse nosync nounwind readnone uwtable willreturn }
; IS__CGSCC_NPM: attributes #[[ATTR1]] = { noinline nounwind uwtable } ; IS__CGSCC____: attributes #[[ATTR1]] = { noinline nounwind uwtable }
; IS__CGSCC_NPM: attributes #[[ATTR2]] = { nounwind } ; IS__CGSCC____: attributes #[[ATTR2]] = { nounwind }
; IS__CGSCC_NPM: attributes #[[ATTR3]] = { nofree nosync nounwind } ; IS__CGSCC____: attributes #[[ATTR3]] = { nofree nosync nounwind }
; IS__CGSCC_NPM: attributes #[[ATTR4]] = { argmemonly nofree norecurse nosync nounwind readonly willreturn } ; IS__CGSCC____: attributes #[[ATTR4]] = { argmemonly nofree norecurse nosync nounwind readonly willreturn }
; IS__CGSCC_NPM: attributes #[[ATTR5]] = { argmemonly nofree norecurse nosync nounwind willreturn writeonly } ; IS__CGSCC____: attributes #[[ATTR5]] = { argmemonly nofree norecurse nosync nounwind willreturn writeonly }
; IS__CGSCC_NPM: attributes #[[ATTR6]] = { nounwind willreturn } ; IS__CGSCC____: attributes #[[ATTR6]] = { nounwind willreturn }
; IS__CGSCC_NPM: attributes #[[ATTR7]] = { argmemonly nofree noinline norecurse nosync nounwind uwtable willreturn writeonly } ; IS__CGSCC____: attributes #[[ATTR7]] = { argmemonly nofree noinline norecurse nosync nounwind uwtable willreturn writeonly }
; IS__CGSCC_NPM: attributes #[[ATTR8]] = { nofree norecurse nosync nounwind willreturn writeonly } ; IS__CGSCC____: attributes #[[ATTR8]] = { nofree norecurse nosync nounwind willreturn writeonly }
; IS__CGSCC_NPM: attributes #[[ATTR9]] = { nofree norecurse nosync nounwind readnone willreturn } ; IS__CGSCC____: attributes #[[ATTR9]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__CGSCC_NPM: attributes #[[ATTR10]] = { nofree norecurse nosync nounwind readonly willreturn } ; IS__CGSCC____: attributes #[[ATTR10]] = { nofree norecurse nosync nounwind readonly willreturn }
; IS__CGSCC_NPM: attributes #[[ATTR11]] = { readonly willreturn } ; IS__CGSCC____: attributes #[[ATTR11]] = { readonly willreturn }
;. ;.

llvm/test/Transforms/Attributor/allow_list.ll

Show First 20 Lines • Show All 51 Lines • ▼ Show 20 Lines
; CHECK_ENABLED-NEXT: ret i32 1 ; CHECK_ENABLED-NEXT: ret i32 1
; ;
; CHECK_DISABLED_FUNCTION: Function Attrs: noinline nounwind uwtable ; CHECK_DISABLED_FUNCTION: Function Attrs: noinline nounwind uwtable
; CHECK_DISABLED_FUNCTION-LABEL: define {{[^@]+}}@range_use1 ; CHECK_DISABLED_FUNCTION-LABEL: define {{[^@]+}}@range_use1
; CHECK_DISABLED_FUNCTION-SAME: () #[[ATTR0]] { ; CHECK_DISABLED_FUNCTION-SAME: () #[[ATTR0]] {
; CHECK_DISABLED_FUNCTION-NEXT: [[TMP1:%.*]] = call i32 @range_test(i32 123) ; CHECK_DISABLED_FUNCTION-NEXT: [[TMP1:%.*]] = call i32 @range_test(i32 123)
; CHECK_DISABLED_FUNCTION-NEXT: ret i32 [[TMP1]] ; CHECK_DISABLED_FUNCTION-NEXT: ret i32 [[TMP1]]
; ;
; CHECK_ENABLED_FUNCTION: Function Attrs: nofree noinline nosync nounwind readnone uwtable willreturn ; CHECK_ENABLED_FUNCTION: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable willreturn
; CHECK_ENABLED_FUNCTION-LABEL: define {{[^@]+}}@range_use1 ; CHECK_ENABLED_FUNCTION-LABEL: define {{[^@]+}}@range_use1
; CHECK_ENABLED_FUNCTION-SAME: () #[[ATTR1:[0-9]+]] { ; CHECK_ENABLED_FUNCTION-SAME: () #[[ATTR1:[0-9]+]] {
; CHECK_ENABLED_FUNCTION-NEXT: ret i32 1 ; CHECK_ENABLED_FUNCTION-NEXT: ret i32 1
; ;
%1 = call i32 @range_test(i32 123) %1 = call i32 @range_test(i32 123)
ret i32 %1 ret i32 %1
} }
; Function Attrs: nounwind uwtable ; Function Attrs: nounwind uwtable
define i32 @range_use2() #0 { define i32 @range_use2() #0 {
; CHECK_DISABLED: Function Attrs: noinline nounwind uwtable ; CHECK_DISABLED: Function Attrs: noinline nounwind uwtable
; CHECK_DISABLED-LABEL: define {{[^@]+}}@range_use2 ; CHECK_DISABLED-LABEL: define {{[^@]+}}@range_use2
; CHECK_DISABLED-SAME: () #[[ATTR0]] { ; CHECK_DISABLED-SAME: () #[[ATTR0]] {
; CHECK_DISABLED-NEXT: [[TMP1:%.*]] = call i32 @range_test(i32 123) ; CHECK_DISABLED-NEXT: [[TMP1:%.*]] = call i32 @range_test(i32 123)
; CHECK_DISABLED-NEXT: ret i32 [[TMP1]] ; CHECK_DISABLED-NEXT: ret i32 [[TMP1]]
; ;
; CHECK_ENABLED: Function Attrs: noinline nounwind uwtable ; CHECK_ENABLED: Function Attrs: noinline norecurse nounwind uwtable
; CHECK_ENABLED-LABEL: define {{[^@]+}}@range_use2 ; CHECK_ENABLED-LABEL: define {{[^@]+}}@range_use2
; CHECK_ENABLED-SAME: () #[[ATTR0]] { ; CHECK_ENABLED-SAME: () #[[ATTR1:[0-9]+]] {
; CHECK_ENABLED-NEXT: ret i32 1 ; CHECK_ENABLED-NEXT: ret i32 1
; ;
; CHECK_DISABLED_FUNCTION: Function Attrs: noinline nounwind uwtable ; CHECK_DISABLED_FUNCTION: Function Attrs: noinline nounwind uwtable
; CHECK_DISABLED_FUNCTION-LABEL: define {{[^@]+}}@range_use2 ; CHECK_DISABLED_FUNCTION-LABEL: define {{[^@]+}}@range_use2
; CHECK_DISABLED_FUNCTION-SAME: () #[[ATTR0]] { ; CHECK_DISABLED_FUNCTION-SAME: () #[[ATTR0]] {
; CHECK_DISABLED_FUNCTION-NEXT: [[TMP1:%.*]] = call i32 @range_test(i32 123) ; CHECK_DISABLED_FUNCTION-NEXT: [[TMP1:%.*]] = call i32 @range_test(i32 123)
; CHECK_DISABLED_FUNCTION-NEXT: ret i32 [[TMP1]] ; CHECK_DISABLED_FUNCTION-NEXT: ret i32 [[TMP1]]
; ;
; CHECK_ENABLED_FUNCTION: Function Attrs: noinline nounwind uwtable ; CHECK_ENABLED_FUNCTION: Function Attrs: noinline nounwind uwtable
; CHECK_ENABLED_FUNCTION-LABEL: define {{[^@]+}}@range_use2 ; CHECK_ENABLED_FUNCTION-LABEL: define {{[^@]+}}@range_use2
; CHECK_ENABLED_FUNCTION-SAME: () #[[ATTR2:[0-9]+]] { ; CHECK_ENABLED_FUNCTION-SAME: () #[[ATTR2:[0-9]+]] {
; CHECK_ENABLED_FUNCTION-NEXT: [[TMP1:%.*]] = call i32 @range_test() ; CHECK_ENABLED_FUNCTION-NEXT: [[TMP1:%.*]] = call i32 @range_test()
; CHECK_ENABLED_FUNCTION-NEXT: ret i32 [[TMP1]] ; CHECK_ENABLED_FUNCTION-NEXT: ret i32 [[TMP1]]
; ;
%1 = call i32 @range_test(i32 123) %1 = call i32 @range_test(i32 123)
ret i32 %1 ret i32 %1
} }
attributes #0 = { nounwind uwtable noinline } attributes #0 = { nounwind uwtable noinline }
;. ;.
; CHECK_DISABLED: attributes #[[ATTR0]] = { noinline nounwind uwtable } ; CHECK_DISABLED: attributes #[[ATTR0]] = { noinline nounwind uwtable }
;. ;.
; CHECK_ENABLED: attributes #[[ATTR0]] = { noinline nounwind uwtable } ; CHECK_ENABLED: attributes #[[ATTR0]] = { noinline nounwind uwtable }
; CHECK_ENABLED: attributes #[[ATTR1]] = { noinline norecurse nounwind uwtable }
;. ;.
; CHECK_DISABLED_FUNCTION: attributes #[[ATTR0]] = { noinline nounwind uwtable } ; CHECK_DISABLED_FUNCTION: attributes #[[ATTR0]] = { noinline nounwind uwtable }
;. ;.
; CHECK_ENABLED_FUNCTION: attributes #[[ATTR0]] = { noinline nounwind readnone uwtable } ; CHECK_ENABLED_FUNCTION: attributes #[[ATTR0]] = { noinline nounwind readnone uwtable }
; CHECK_ENABLED_FUNCTION: attributes #[[ATTR1]] = { nofree noinline nosync nounwind readnone uwtable willreturn } ; CHECK_ENABLED_FUNCTION: attributes #[[ATTR1]] = { nofree noinline norecurse nosync nounwind readnone uwtable willreturn }
; CHECK_ENABLED_FUNCTION: attributes #[[ATTR2]] = { noinline nounwind uwtable } ; CHECK_ENABLED_FUNCTION: attributes #[[ATTR2]] = { noinline nounwind uwtable }
;. ;.

llvm/test/Transforms/Attributor/alwaysinline.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals
; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM ; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM
; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM ; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM
; ;
; When a function is marked `alwaysinline` and is able to be inlined, ; When a function is marked `alwaysinline` and is able to be inlined,
; we can IPO its boundaries ; we can IPO its boundaries
; the function is not exactly defined, and marked alwaysinline and can be inlined, ; the function is not exactly defined, and marked alwaysinline and can be inlined,
; so the function can be analyzed ; so the function can be analyzed
define linkonce void @inner1() alwaysinline { define linkonce void @inner1() alwaysinline {
; IS__TUNIT____: Function Attrs: alwaysinline nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: alwaysinline nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@inner1 ; CHECK-LABEL: define {{[^@]+}}@inner1
; IS__TUNIT____-SAME: () #[[ATTR0:[0-9]+]] { ; CHECK-SAME: () #[[ATTR0:[0-9]+]] {
; IS__TUNIT____-NEXT: entry: ; CHECK-NEXT: entry:
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: alwaysinline nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@inner1
; IS__CGSCC____-SAME: () #[[ATTR0:[0-9]+]] {
; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: ret void
; ;
entry: entry:
ret void ret void
} }
define void @outer1() { define void @outer1() {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@outer1 ; CHECK-LABEL: define {{[^@]+}}@outer1
; IS__TUNIT____-SAME: () #[[ATTR1:[0-9]+]] { ; CHECK-SAME: () #[[ATTR1:[0-9]+]] {
; IS__TUNIT____-NEXT: entry: ; CHECK-NEXT: entry:
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@outer1
; IS__CGSCC____-SAME: () #[[ATTR1:[0-9]+]] {
; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: ret void
; ;
entry: entry:
call void @inner1() call void @inner1()
ret void ret void
} }
; The function is not alwaysinline and is not exactly defined ; The function is not alwaysinline and is not exactly defined
; so it will not be analyzed ; so it will not be analyzed
define linkonce i32 @inner2() { define linkonce i32 @inner2() {
; CHECK-LABEL: define {{[^@]+}}@inner2() { ; CHECK-LABEL: define {{[^@]+}}@inner2() {
; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: ret i32 1 ; CHECK-NEXT: ret i32 1
; ;
entry: entry:
ret i32 1 ret i32 1
} }
; CHECK-NOT: Function Attrs ; CHECK-NOT: Function Attrs
define i32 @outer2() { define i32 @outer2() {
; CHECK-LABEL: define {{[^@]+}}@outer2() { ; CHECK: Function Attrs: norecurse
; CHECK-LABEL: define {{[^@]+}}@outer2
; CHECK-SAME: () #[[ATTR2:[0-9]+]] {
; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: [[R:%.*]] = call i32 @inner2() #[[ATTR2:[0-9]+]] ; CHECK-NEXT: [[R:%.*]] = call i32 @inner2() #[[ATTR3:[0-9]+]]
; CHECK-NEXT: ret i32 [[R]] ; CHECK-NEXT: ret i32 [[R]]
; ;
entry: entry:
%r = call i32 @inner2() alwaysinline %r = call i32 @inner2() alwaysinline
ret i32 %r ret i32 %r
} }
; This function cannot be inlined although it is marked alwaysinline ; This function cannot be inlined although it is marked alwaysinline
; it is `unexactly defined` and alwaysinline but cannot be inlined. ; it is `unexactly defined` and alwaysinline but cannot be inlined.
; so it will not be analyzed ; so it will not be analyzed
define linkonce i32 @inner3(i8* %addr) alwaysinline { define linkonce i32 @inner3(i8* %addr) alwaysinline {
; CHECK: Function Attrs: alwaysinline ; CHECK: Function Attrs: alwaysinline
; CHECK-LABEL: define {{[^@]+}}@inner3 ; CHECK-LABEL: define {{[^@]+}}@inner3
; CHECK-SAME: (i8* [[ADDR:%.*]]) #[[ATTR2]] { ; CHECK-SAME: (i8* [[ADDR:%.*]]) #[[ATTR3]] {
; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: indirectbr i8* [[ADDR]], [label [[ONE:%.*]], label %two] ; CHECK-NEXT: indirectbr i8* [[ADDR]], [label [[ONE:%.*]], label %two]
; CHECK: one: ; CHECK: one:
; CHECK-NEXT: ret i32 42 ; CHECK-NEXT: ret i32 42
; CHECK: two: ; CHECK: two:
; CHECK-NEXT: ret i32 44 ; CHECK-NEXT: ret i32 44
; ;
entry: entry:
indirectbr i8* %addr, [ label %one, label %two ] indirectbr i8* %addr, [ label %one, label %two ]
one: one:
ret i32 42 ret i32 42
two: two:
ret i32 44 ret i32 44
} }
define i32 @outer3(i32 %x) { define i32 @outer3(i32 %x) {
; CHECK: Function Attrs: norecurse
; CHECK-LABEL: define {{[^@]+}}@outer3 ; CHECK-LABEL: define {{[^@]+}}@outer3
; CHECK-SAME: (i32 [[X:%.*]]) { ; CHECK-SAME: (i32 [[X:%.*]]) #[[ATTR2]] {
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X]], 42 ; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[X]], 42
; CHECK-NEXT: [[ADDR:%.*]] = select i1 [[CMP]], i8* blockaddress(@inner3, [[ONE:%.*]]), i8* blockaddress(@inner3, [[TWO:%.*]]) ; CHECK-NEXT: [[ADDR:%.*]] = select i1 [[CMP]], i8* blockaddress(@inner3, [[ONE:%.*]]), i8* blockaddress(@inner3, [[TWO:%.*]])
; CHECK-NEXT: [[CALL:%.*]] = call i32 @inner3(i8* [[ADDR]]) ; CHECK-NEXT: [[CALL:%.*]] = call i32 @inner3(i8* [[ADDR]])
; CHECK-NEXT: ret i32 [[CALL]] ; CHECK-NEXT: ret i32 [[CALL]]
; ;
%cmp = icmp slt i32 %x, 42 %cmp = icmp slt i32 %x, 42
%addr = select i1 %cmp, i8* blockaddress(@inner3, %one), i8* blockaddress(@inner3, %two) %addr = select i1 %cmp, i8* blockaddress(@inner3, %one), i8* blockaddress(@inner3, %two)
%call = call i32 @inner3(i8* %addr) %call = call i32 @inner3(i8* %addr)
ret i32 %call ret i32 %call
} }
;. ;.
; IS__TUNIT____: attributes #[[ATTR0]] = { alwaysinline nofree nosync nounwind readnone willreturn } ; CHECK: attributes #[[ATTR0]] = { alwaysinline nofree norecurse nosync nounwind readnone willreturn }
; IS__TUNIT____: attributes #[[ATTR1]] = { nofree nosync nounwind readnone willreturn } ; CHECK: attributes #[[ATTR1]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__TUNIT____: attributes #[[ATTR2]] = { alwaysinline } ; CHECK: attributes #[[ATTR2]] = { norecurse }
;. ; CHECK: attributes #[[ATTR3]] = { alwaysinline }
; IS__CGSCC____: attributes #[[ATTR0]] = { alwaysinline nofree norecurse nosync nounwind readnone willreturn }
; IS__CGSCC____: attributes #[[ATTR1]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__CGSCC____: attributes #[[ATTR2]] = { alwaysinline }
;. ;.

llvm/test/Transforms/Attributor/cb_liveness_disabled.ll

Show First 20 Lines • Show All 148 Lines • ▼ Show 20 Lines;
ret i32 %4 ret i32 %4
} }
attributes #0 = { noinline nounwind sspstrong uwtable} attributes #0 = { noinline nounwind sspstrong uwtable}
; IS__TUNIT_____: !0 = !{i32 0, i32 101} ; IS__TUNIT_____: !0 = !{i32 0, i32 101}
; IS__TUNIT_____: !1 = !{i32 100, i32 201} ; IS__TUNIT_____: !1 = !{i32 100, i32 201}
;. ;.
; IS__TUNIT____: attributes #[[ATTR0]] = { nofree noinline nosync nounwind readnone sspstrong uwtable willreturn } ; IS__TUNIT____: attributes #[[ATTR0]] = { nofree noinline norecurse nosync nounwind readnone sspstrong uwtable willreturn }
; IS__TUNIT____: attributes #[[ATTR1]] = { nofree nosync nounwind readnone willreturn } ; IS__TUNIT____: attributes #[[ATTR1]] = { nofree nosync nounwind readnone willreturn }
;. ;.
; IS__CGSCC____: attributes #[[ATTR0]] = { nofree noinline norecurse nosync nounwind readnone sspstrong uwtable willreturn } ; IS__CGSCC____: attributes #[[ATTR0]] = { nofree noinline norecurse nosync nounwind readnone sspstrong uwtable willreturn }
; IS__CGSCC____: attributes #[[ATTR1]] = { readnone willreturn } ; IS__CGSCC____: attributes #[[ATTR1]] = { readnone willreturn }
;. ;.
; CHECK: [[RNG0]] = !{i32 0, i32 101} ; CHECK: [[RNG0]] = !{i32 0, i32 101}
; CHECK: [[RNG1]] = !{i32 100, i32 201} ; CHECK: [[RNG1]] = !{i32 100, i32 201}
; CHECK: [[RNG2]] = !{i32 0, i32 201} ; CHECK: [[RNG2]] = !{i32 0, i32 201}
;. ;.

llvm/test/Transforms/Attributor/cb_liveness_enabled.ll

Show First 20 Lines • Show All 151 Lines • ▼ Show 20 Lines;
ret i32 %4 ret i32 %4
} }
attributes #0 = { noinline nounwind sspstrong uwtable} attributes #0 = { noinline nounwind sspstrong uwtable}
; IS__TUNIT_____: !0 = !{i32 0, i32 101} ; IS__TUNIT_____: !0 = !{i32 0, i32 101}
; IS__TUNIT_____: !1 = !{i32 100, i32 201} ; IS__TUNIT_____: !1 = !{i32 100, i32 201}
;. ;.
; IS__TUNIT____: attributes #[[ATTR0]] = { nofree noinline nosync nounwind readnone sspstrong uwtable willreturn } ; IS__TUNIT____: attributes #[[ATTR0]] = { nofree noinline norecurse nosync nounwind readnone sspstrong uwtable willreturn }
; IS__TUNIT____: attributes #[[ATTR1]] = { nofree nosync nounwind readnone willreturn } ; IS__TUNIT____: attributes #[[ATTR1]] = { nofree nosync nounwind readnone willreturn }
;. ;.
; IS__CGSCC____: attributes #[[ATTR0]] = { nofree noinline norecurse nosync nounwind readnone sspstrong uwtable willreturn } ; IS__CGSCC____: attributes #[[ATTR0]] = { nofree noinline norecurse nosync nounwind readnone sspstrong uwtable willreturn }
; IS__CGSCC____: attributes #[[ATTR1]] = { readnone willreturn } ; IS__CGSCC____: attributes #[[ATTR1]] = { readnone willreturn }
;. ;.
; CHECK: [[RNG0]] = !{i32 0, i32 101} ; CHECK: [[RNG0]] = !{i32 0, i32 101}
; CHECK: [[RNG1]] = !{i32 100, i32 201} ; CHECK: [[RNG1]] = !{i32 100, i32 201}
; CHECK: [[RNG2]] = !{i32 0, i32 201} ; CHECK: [[RNG2]] = !{i32 0, i32 201}
;. ;.

llvm/test/Transforms/Attributor/cb_range_disabled.ll

Show All 16 Lines
; CHECK-NEXT: ret i32 [[TMP2]] ; CHECK-NEXT: ret i32 [[TMP2]]
; ;
%1 = icmp sgt i32 %unknown, 100 %1 = icmp sgt i32 %unknown, 100
%2 = select i1 %1, i32 100, i32 0 %2 = select i1 %1, i32 100, i32 0
ret i32 %2 ret i32 %2
} }
define i32 @test1(i32 %unknown, i32 %b) { define i32 @test1(i32 %unknown, i32 %b) {
; IS__TUNIT____-LABEL: define {{[^@]+}}@test1 ; CHECK-LABEL: define {{[^@]+}}@test1
; IS__TUNIT____-SAME: (i32 [[UNKNOWN:%.*]], i32 [[B:%.*]]) #[[ATTR0]] { ; CHECK-SAME: (i32 [[UNKNOWN:%.*]], i32 [[B:%.*]]) #[[ATTR0]] {
; IS__TUNIT____-NEXT: [[TMP1:%.*]] = call i32 @test_range(i32 [[UNKNOWN]]) #[[ATTR0]], !range [[RNG0:![0-9]+]] ; CHECK-NEXT: [[TMP1:%.*]] = call i32 @test_range(i32 [[UNKNOWN]]) #[[ATTR1:[0-9]+]], !range [[RNG0:![0-9]+]]
; IS__TUNIT____-NEXT: [[TMP2:%.*]] = sub nsw i32 [[TMP1]], [[B]] ; CHECK-NEXT: [[TMP2:%.*]] = sub nsw i32 [[TMP1]], [[B]]
; IS__TUNIT____-NEXT: ret i32 [[TMP2]] ; CHECK-NEXT: ret i32 [[TMP2]]
;
; IS__CGSCC____-LABEL: define {{[^@]+}}@test1
; IS__CGSCC____-SAME: (i32 [[UNKNOWN:%.*]], i32 [[B:%.*]]) #[[ATTR0]] {
; IS__CGSCC____-NEXT: [[TMP1:%.*]] = call i32 @test_range(i32 [[UNKNOWN]]) #[[ATTR1:[0-9]+]], !range [[RNG0:![0-9]+]]
; IS__CGSCC____-NEXT: [[TMP2:%.*]] = sub nsw i32 [[TMP1]], [[B]]
; IS__CGSCC____-NEXT: ret i32 [[TMP2]]
; ;
%1 = call i32 @test_range(i32 %unknown) %1 = call i32 @test_range(i32 %unknown)
%2 = sub nsw i32 %1, %b %2 = sub nsw i32 %1, %b
ret i32 %2 ret i32 %2
} }
define i32 @test2(i32 %unknown, i32 %b) { define i32 @test2(i32 %unknown, i32 %b) {
; IS__TUNIT____-LABEL: define {{[^@]+}}@test2 ; CHECK-LABEL: define {{[^@]+}}@test2
; IS__TUNIT____-SAME: (i32 [[UNKNOWN:%.*]], i32 [[B:%.*]]) #[[ATTR0]] { ; CHECK-SAME: (i32 [[UNKNOWN:%.*]], i32 [[B:%.*]]) #[[ATTR0]] {
; IS__TUNIT____-NEXT: [[TMP1:%.*]] = call i32 @test_range(i32 [[UNKNOWN]]) #[[ATTR0]], !range [[RNG0]] ; CHECK-NEXT: [[TMP1:%.*]] = call i32 @test_range(i32 [[UNKNOWN]]) #[[ATTR1]], !range [[RNG0]]
; IS__TUNIT____-NEXT: [[TMP2:%.*]] = add nsw i32 [[TMP1]], [[B]] ; CHECK-NEXT: [[TMP2:%.*]] = add nsw i32 [[TMP1]], [[B]]
; IS__TUNIT____-NEXT: ret i32 [[TMP2]] ; CHECK-NEXT: ret i32 [[TMP2]]
;
; IS__CGSCC____-LABEL: define {{[^@]+}}@test2
; IS__CGSCC____-SAME: (i32 [[UNKNOWN:%.*]], i32 [[B:%.*]]) #[[ATTR0]] {
; IS__CGSCC____-NEXT: [[TMP1:%.*]] = call i32 @test_range(i32 [[UNKNOWN]]) #[[ATTR1]], !range [[RNG0]]
; IS__CGSCC____-NEXT: [[TMP2:%.*]] = add nsw i32 [[TMP1]], [[B]]
; IS__CGSCC____-NEXT: ret i32 [[TMP2]]
; ;
%1 = call i32 @test_range(i32 %unknown) %1 = call i32 @test_range(i32 %unknown)
%2 = add nsw i32 %1, %b %2 = add nsw i32 %1, %b
ret i32 %2 ret i32 %2
} }
; Positive checks ; Positive checks
▲ Show 20 Lines • Show All 64 Lines • ▼ Show 20 Lines
; CHECK-NEXT: ret i32 [[TMP3]] ; CHECK-NEXT: ret i32 [[TMP3]]
; ;
%1 = call i32 @test2(i32 %unknown, i32 20) %1 = call i32 @test2(i32 %unknown, i32 20)
%2 = icmp sge i32 %1, 30 %2 = icmp sge i32 %1, 30
%3 = zext i1 %2 to i32 %3 = zext i1 %2 to i32
ret i32 %3 ret i32 %3
} }
;. ;.
; IS__TUNIT____: attributes #[[ATTR0]] = { nofree nosync nounwind readnone willreturn } ; IS__TUNIT____: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__TUNIT____: attributes #[[ATTR1]] = { nofree nosync nounwind readnone willreturn }
;. ;.
; IS__CGSCC____: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn } ; IS__CGSCC____: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__CGSCC____: attributes #[[ATTR1]] = { readnone willreturn } ; IS__CGSCC____: attributes #[[ATTR1]] = { readnone willreturn }
;. ;.
; NOT_CGSCC_NPM: [[META0:![0-9]+]] = !{i32 0, i32 101} ; NOT_CGSCC_NPM: [[RNG0]] = !{i32 0, i32 101}
;. ;.
; IS__CGSCC_NPM: [[RNG0]] = !{i32 0, i32 101} ; IS__CGSCC_NPM: [[RNG0]] = !{i32 0, i32 101}
; IS__CGSCC_NPM: [[RNG1]] = !{i32 -2147483647, i32 -2147483648} ; IS__CGSCC_NPM: [[RNG1]] = !{i32 -2147483647, i32 -2147483648}
;. ;.

llvm/test/Transforms/Attributor/cb_range_enabled.ll

Show All 16 Lines
; CHECK-NEXT: ret i32 [[TMP2]] ; CHECK-NEXT: ret i32 [[TMP2]]
; ;
%1 = icmp sgt i32 %unknown, 100 %1 = icmp sgt i32 %unknown, 100
%2 = select i1 %1, i32 100, i32 0 %2 = select i1 %1, i32 100, i32 0
ret i32 %2 ret i32 %2
} }
define i32 @test1(i32 %unknown, i32 %b) { define i32 @test1(i32 %unknown, i32 %b) {
; IS__TUNIT____-LABEL: define {{[^@]+}}@test1 ; CHECK-LABEL: define {{[^@]+}}@test1
; IS__TUNIT____-SAME: (i32 [[UNKNOWN:%.*]], i32 [[B:%.*]]) #[[ATTR0]] { ; CHECK-SAME: (i32 [[UNKNOWN:%.*]], i32 [[B:%.*]]) #[[ATTR0]] {
; IS__TUNIT____-NEXT: [[TMP1:%.*]] = call i32 @test_range(i32 [[UNKNOWN]]) #[[ATTR0]], !range [[RNG0:![0-9]+]] ; CHECK-NEXT: [[TMP1:%.*]] = call i32 @test_range(i32 [[UNKNOWN]]) #[[ATTR1:[0-9]+]], !range [[RNG0:![0-9]+]]
; IS__TUNIT____-NEXT: [[TMP2:%.*]] = sub nsw i32 [[TMP1]], [[B]] ; CHECK-NEXT: [[TMP2:%.*]] = sub nsw i32 [[TMP1]], [[B]]
; IS__TUNIT____-NEXT: ret i32 [[TMP2]] ; CHECK-NEXT: ret i32 [[TMP2]]
;
; IS__CGSCC____-LABEL: define {{[^@]+}}@test1
; IS__CGSCC____-SAME: (i32 [[UNKNOWN:%.*]], i32 [[B:%.*]]) #[[ATTR0]] {
; IS__CGSCC____-NEXT: [[TMP1:%.*]] = call i32 @test_range(i32 [[UNKNOWN]]) #[[ATTR1:[0-9]+]], !range [[RNG0:![0-9]+]]
; IS__CGSCC____-NEXT: [[TMP2:%.*]] = sub nsw i32 [[TMP1]], [[B]]
; IS__CGSCC____-NEXT: ret i32 [[TMP2]]
; ;
%1 = call i32 @test_range(i32 %unknown) %1 = call i32 @test_range(i32 %unknown)
%2 = sub nsw i32 %1, %b %2 = sub nsw i32 %1, %b
ret i32 %2 ret i32 %2
} }
define i32 @test2(i32 %unknown, i32 %b) { define i32 @test2(i32 %unknown, i32 %b) {
; IS__TUNIT____-LABEL: define {{[^@]+}}@test2 ; CHECK-LABEL: define {{[^@]+}}@test2
; IS__TUNIT____-SAME: (i32 [[UNKNOWN:%.*]], i32 [[B:%.*]]) #[[ATTR0]] { ; CHECK-SAME: (i32 [[UNKNOWN:%.*]], i32 [[B:%.*]]) #[[ATTR0]] {
; IS__TUNIT____-NEXT: [[TMP1:%.*]] = call i32 @test_range(i32 [[UNKNOWN]]) #[[ATTR0]], !range [[RNG0]] ; CHECK-NEXT: [[TMP1:%.*]] = call i32 @test_range(i32 [[UNKNOWN]]) #[[ATTR1]], !range [[RNG0]]
; IS__TUNIT____-NEXT: [[TMP2:%.*]] = add nsw i32 [[TMP1]], [[B]] ; CHECK-NEXT: [[TMP2:%.*]] = add nsw i32 [[TMP1]], [[B]]
; IS__TUNIT____-NEXT: ret i32 [[TMP2]] ; CHECK-NEXT: ret i32 [[TMP2]]
;
; IS__CGSCC____-LABEL: define {{[^@]+}}@test2
; IS__CGSCC____-SAME: (i32 [[UNKNOWN:%.*]], i32 [[B:%.*]]) #[[ATTR0]] {
; IS__CGSCC____-NEXT: [[TMP1:%.*]] = call i32 @test_range(i32 [[UNKNOWN]]) #[[ATTR1]], !range [[RNG0]]
; IS__CGSCC____-NEXT: [[TMP2:%.*]] = add nsw i32 [[TMP1]], [[B]]
; IS__CGSCC____-NEXT: ret i32 [[TMP2]]
; ;
%1 = call i32 @test_range(i32 %unknown) %1 = call i32 @test_range(i32 %unknown)
%2 = add nsw i32 %1, %b %2 = add nsw i32 %1, %b
ret i32 %2 ret i32 %2
} }
; Positive checks ; Positive checks
Show All 21 Lines;
%2 = icmp sge i32 %1, 20 %2 = icmp sge i32 %1, 20
%3 = zext i1 %2 to i32 %3 = zext i1 %2 to i32
ret i32 %3 ret i32 %3
} }
; Negative checks ; Negative checks
define i32 @test1_ncheck(i32 %unknown) { define i32 @test1_ncheck(i32 %unknown) {
; IS__TUNIT____-LABEL: define {{[^@]+}}@test1_ncheck ; CHECK-LABEL: define {{[^@]+}}@test1_ncheck
; IS__TUNIT____-SAME: (i32 [[UNKNOWN:%.*]]) #[[ATTR0]] { ; CHECK-SAME: (i32 [[UNKNOWN:%.*]]) #[[ATTR0]] {
; IS__TUNIT____-NEXT: [[TMP1:%.*]] = call i32 @test1(i32 [[UNKNOWN]], i32 noundef 20) #[[ATTR0]], !range [[RNG1:![0-9]+]] ; CHECK-NEXT: [[TMP1:%.*]] = call i32 @test1(i32 [[UNKNOWN]], i32 noundef 20) #[[ATTR1]], !range [[RNG1:![0-9]+]]
; IS__TUNIT____-NEXT: [[TMP2:%.*]] = icmp sle i32 [[TMP1]], 10 ; CHECK-NEXT: [[TMP2:%.*]] = icmp sle i32 [[TMP1]], 10
; IS__TUNIT____-NEXT: [[TMP3:%.*]] = zext i1 [[TMP2]] to i32 ; CHECK-NEXT: [[TMP3:%.*]] = zext i1 [[TMP2]] to i32
; IS__TUNIT____-NEXT: ret i32 [[TMP3]] ; CHECK-NEXT: ret i32 [[TMP3]]
;
; IS__CGSCC____-LABEL: define {{[^@]+}}@test1_ncheck
; IS__CGSCC____-SAME: (i32 [[UNKNOWN:%.*]]) #[[ATTR0]] {
; IS__CGSCC____-NEXT: [[TMP1:%.*]] = call i32 @test1(i32 [[UNKNOWN]], i32 noundef 20) #[[ATTR1]], !range [[RNG1:![0-9]+]]
; IS__CGSCC____-NEXT: [[TMP2:%.*]] = icmp sle i32 [[TMP1]], 10
; IS__CGSCC____-NEXT: [[TMP3:%.*]] = zext i1 [[TMP2]] to i32
; IS__CGSCC____-NEXT: ret i32 [[TMP3]]
; ;
%1 = call i32 @test1(i32 %unknown, i32 20) %1 = call i32 @test1(i32 %unknown, i32 20)
%2 = icmp sle i32 %1, 10 %2 = icmp sle i32 %1, 10
%3 = zext i1 %2 to i32 %3 = zext i1 %2 to i32
ret i32 %3 ret i32 %3
} }
define i32 @test2_ncheck(i32 %unknown) { define i32 @test2_ncheck(i32 %unknown) {
; IS__TUNIT____-LABEL: define {{[^@]+}}@test2_ncheck ; CHECK-LABEL: define {{[^@]+}}@test2_ncheck
; IS__TUNIT____-SAME: (i32 [[UNKNOWN:%.*]]) #[[ATTR0]] { ; CHECK-SAME: (i32 [[UNKNOWN:%.*]]) #[[ATTR0]] {
; IS__TUNIT____-NEXT: [[TMP1:%.*]] = call i32 @test2(i32 [[UNKNOWN]], i32 noundef 20) #[[ATTR0]], !range [[RNG2:![0-9]+]] ; CHECK-NEXT: [[TMP1:%.*]] = call i32 @test2(i32 [[UNKNOWN]], i32 noundef 20) #[[ATTR1]], !range [[RNG2:![0-9]+]]
; IS__TUNIT____-NEXT: [[TMP2:%.*]] = icmp sge i32 [[TMP1]], 30 ; CHECK-NEXT: [[TMP2:%.*]] = icmp sge i32 [[TMP1]], 30
; IS__TUNIT____-NEXT: [[TMP3:%.*]] = zext i1 [[TMP2]] to i32 ; CHECK-NEXT: [[TMP3:%.*]] = zext i1 [[TMP2]] to i32
; IS__TUNIT____-NEXT: ret i32 [[TMP3]] ; CHECK-NEXT: ret i32 [[TMP3]]
;
; IS__CGSCC____-LABEL: define {{[^@]+}}@test2_ncheck
; IS__CGSCC____-SAME: (i32 [[UNKNOWN:%.*]]) #[[ATTR0]] {
; IS__CGSCC____-NEXT: [[TMP1:%.*]] = call i32 @test2(i32 [[UNKNOWN]], i32 noundef 20) #[[ATTR1]], !range [[RNG2:![0-9]+]]
; IS__CGSCC____-NEXT: [[TMP2:%.*]] = icmp sge i32 [[TMP1]], 30
; IS__CGSCC____-NEXT: [[TMP3:%.*]] = zext i1 [[TMP2]] to i32
; IS__CGSCC____-NEXT: ret i32 [[TMP3]]
; ;
%1 = call i32 @test2(i32 %unknown, i32 20) %1 = call i32 @test2(i32 %unknown, i32 20)
%2 = icmp sge i32 %1, 30 %2 = icmp sge i32 %1, 30
%3 = zext i1 %2 to i32 %3 = zext i1 %2 to i32
ret i32 %3 ret i32 %3
} }
;. ;.
; IS__TUNIT____: attributes #[[ATTR0]] = { nofree nosync nounwind readnone willreturn } ; IS__TUNIT____: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__TUNIT____: attributes #[[ATTR1]] = { nofree nosync nounwind readnone willreturn }
;. ;.
; IS__CGSCC____: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn } ; IS__CGSCC____: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__CGSCC____: attributes #[[ATTR1]] = { readnone willreturn } ; IS__CGSCC____: attributes #[[ATTR1]] = { readnone willreturn }
;. ;.
; CHECK: [[META0:![0-9]+]] = !{i32 0, i32 101} ; CHECK: [[RNG0]] = !{i32 0, i32 101}
; CHECK: [[META1:![0-9]+]] = !{i32 -20, i32 81} ; CHECK: [[RNG1]] = !{i32 -20, i32 81}
; CHECK: [[META2:![0-9]+]] = !{i32 20, i32 121} ; CHECK: [[RNG2]] = !{i32 20, i32 121}
;. ;.

llvm/test/Transforms/Attributor/depgraph.ll

Show First 20 Lines • Show All 134 Lines • ▼ Show 20 Lines
; GRAPH-NEXT: [AAIsDead] for CtxI ' br label %8' at position {flt: [@-1]} with state assumed-live ; GRAPH-NEXT: [AAIsDead] for CtxI ' br label %8' at position {flt: [@-1]} with state assumed-live
; GRAPH-EMPTY: ; GRAPH-EMPTY:
; GRAPH-NEXT: [AAWillReturn] for CtxI ' %6 = call i32* @checkAndAdvance(i32* %5)' at position {cs: [@-1]} with state may-noreturn ; GRAPH-NEXT: [AAWillReturn] for CtxI ' %6 = call i32* @checkAndAdvance(i32* %5)' at position {cs: [@-1]} with state may-noreturn
; GRAPH-EMPTY: ; GRAPH-EMPTY:
; GRAPH-NEXT: [AANoRecurse] for CtxI ' %6 = call i32* @checkAndAdvance(i32* %5)' at position {cs: [@-1]} with state may-recurse ; GRAPH-NEXT: [AANoRecurse] for CtxI ' %6 = call i32* @checkAndAdvance(i32* %5)' at position {cs: [@-1]} with state may-recurse
; GRAPH-EMPTY: ; GRAPH-EMPTY:
; GRAPH-NEXT: [AANoRecurse] for CtxI ' %2 = load i32, i32* %0, align 4' at position {fn:checkAndAdvance [checkAndAdvance@-1]} with state may-recurse ; GRAPH-NEXT: [AANoRecurse] for CtxI ' %2 = load i32, i32* %0, align 4' at position {fn:checkAndAdvance [checkAndAdvance@-1]} with state may-recurse
; GRAPH-EMPTY: ; GRAPH-EMPTY:
; GRAPH-NEXT: [AAFunctionReachability] for CtxI ' %2 = load i32, i32* %0, align 4' at position {fn:checkAndAdvance [checkAndAdvance@-1]} with state FunctionReachability [1,1]
; GRAPH-EMPTY:
; GRAPH-NEXT: [AACallEdges] for CtxI ' %2 = load i32, i32* %0, align 4' at position {fn:checkAndAdvance [checkAndAdvance@-1]} with state CallEdges[0,1]
; GRAPH-EMPTY:
; GRAPH-NEXT: [AACallEdges] for CtxI ' %6 = call i32* @checkAndAdvance(i32* %5)' at position {cs: [@-1]} with state CallEdges[0,1]
; GRAPH-EMPTY:
; GRAPH-NEXT: [AAUndefinedBehavior] for CtxI ' %2 = load i32, i32* %0, align 4' at position {fn:checkAndAdvance [checkAndAdvance@-1]} with state undefined-behavior ; GRAPH-NEXT: [AAUndefinedBehavior] for CtxI ' %2 = load i32, i32* %0, align 4' at position {fn:checkAndAdvance [checkAndAdvance@-1]} with state undefined-behavior
; GRAPH-EMPTY: ; GRAPH-EMPTY:
; GRAPH-NEXT: [AANoUndef] for CtxI ' %6 = call i32* @checkAndAdvance(i32* %5)' at position {cs_arg: [@0]} with state may-undef-or-poison ; GRAPH-NEXT: [AANoUndef] for CtxI ' %6 = call i32* @checkAndAdvance(i32* %5)' at position {cs_arg: [@0]} with state may-undef-or-poison
; GRAPH-EMPTY: ; GRAPH-EMPTY:
; GRAPH-NEXT: [AANoUndef] for CtxI ' %5 = getelementptr inbounds i32, i32* %0, i64 4' at position {flt: [@-1]} with state may-undef-or-poison ; GRAPH-NEXT: [AANoUndef] for CtxI ' %5 = getelementptr inbounds i32, i32* %0, i64 4' at position {flt: [@-1]} with state may-undef-or-poison
; GRAPH-EMPTY: ; GRAPH-EMPTY:
; GRAPH-NEXT: [AAIsDead] for CtxI ' %2 = load i32, i32* %0, align 4' at position {fn_ret:checkAndAdvance [checkAndAdvance@-1]} with state assumed-live ; GRAPH-NEXT: [AAIsDead] for CtxI ' %2 = load i32, i32* %0, align 4' at position {fn_ret:checkAndAdvance [checkAndAdvance@-1]} with state assumed-live
; GRAPH-EMPTY: ; GRAPH-EMPTY:
▲ Show 20 Lines • Show All 177 Lines • Show Last 20 Lines

llvm/test/Transforms/Attributor/dereferenceable-1.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals
; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=16 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM ; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=16 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=16 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=16 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM
; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM ; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM
; FIXME: Figure out why we need 16 iterations here. ; FIXME: Figure out why we need 16 iterations here.
declare void @deref_phi_user(i32* %a); declare void @deref_phi_user(i32* %a);
; TEST 1 ; TEST 1
; take mininimum of return values ; take mininimum of return values
; ;
define i32* @test1(i32* dereferenceable(4) %0, double* dereferenceable(8) %1, i1 zeroext %2) local_unnamed_addr { define i32* @test1(i32* dereferenceable(4) %0, double* dereferenceable(8) %1, i1 zeroext %2) local_unnamed_addr {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@test1 ; CHECK-LABEL: define {{[^@]+}}@test1
; IS__TUNIT____-SAME: (i32* nofree nonnull readnone dereferenceable(4) "no-capture-maybe-returned" [[TMP0:%.*]], double* nofree nonnull readnone dereferenceable(8) "no-capture-maybe-returned" [[TMP1:%.*]], i1 zeroext [[TMP2:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] { ; CHECK-SAME: (i32* nofree nonnull readnone dereferenceable(4) "no-capture-maybe-returned" [[TMP0:%.*]], double* nofree nonnull readnone dereferenceable(8) "no-capture-maybe-returned" [[TMP1:%.*]], i1 zeroext [[TMP2:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] {
; IS__TUNIT____-NEXT: [[TMP4:%.*]] = bitcast double* [[TMP1]] to i32* ; CHECK-NEXT: [[TMP4:%.*]] = bitcast double* [[TMP1]] to i32*
; IS__TUNIT____-NEXT: [[TMP5:%.*]] = select i1 [[TMP2]], i32* [[TMP0]], i32* [[TMP4]] ; CHECK-NEXT: [[TMP5:%.*]] = select i1 [[TMP2]], i32* [[TMP0]], i32* [[TMP4]]
; IS__TUNIT____-NEXT: ret i32* [[TMP5]] ; CHECK-NEXT: ret i32* [[TMP5]]
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@test1
; IS__CGSCC____-SAME: (i32* nofree nonnull readnone dereferenceable(4) "no-capture-maybe-returned" [[TMP0:%.*]], double* nofree nonnull readnone dereferenceable(8) "no-capture-maybe-returned" [[TMP1:%.*]], i1 zeroext [[TMP2:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] {
; IS__CGSCC____-NEXT: [[TMP4:%.*]] = bitcast double* [[TMP1]] to i32*
; IS__CGSCC____-NEXT: [[TMP5:%.*]] = select i1 [[TMP2]], i32* [[TMP0]], i32* [[TMP4]]
; IS__CGSCC____-NEXT: ret i32* [[TMP5]]
; ;
%4 = bitcast double* %1 to i32* %4 = bitcast double* %1 to i32*
%5 = select i1 %2, i32* %0, i32* %4 %5 = select i1 %2, i32* %0, i32* %4
ret i32* %5 ret i32* %5
} }
; TEST 2 ; TEST 2
define i32* @test2(i32* dereferenceable_or_null(4) %0, double* dereferenceable(8) %1, i1 zeroext %2) local_unnamed_addr { define i32* @test2(i32* dereferenceable_or_null(4) %0, double* dereferenceable(8) %1, i1 zeroext %2) local_unnamed_addr {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@test2 ; CHECK-LABEL: define {{[^@]+}}@test2
; IS__TUNIT____-SAME: (i32* nofree readnone dereferenceable_or_null(4) "no-capture-maybe-returned" [[TMP0:%.*]], double* nofree nonnull readnone dereferenceable(8) "no-capture-maybe-returned" [[TMP1:%.*]], i1 zeroext [[TMP2:%.*]]) local_unnamed_addr #[[ATTR0]] { ; CHECK-SAME: (i32* nofree readnone dereferenceable_or_null(4) "no-capture-maybe-returned" [[TMP0:%.*]], double* nofree nonnull readnone dereferenceable(8) "no-capture-maybe-returned" [[TMP1:%.*]], i1 zeroext [[TMP2:%.*]]) local_unnamed_addr #[[ATTR0]] {
; IS__TUNIT____-NEXT: [[TMP4:%.*]] = bitcast double* [[TMP1]] to i32* ; CHECK-NEXT: [[TMP4:%.*]] = bitcast double* [[TMP1]] to i32*
; IS__TUNIT____-NEXT: [[TMP5:%.*]] = select i1 [[TMP2]], i32* [[TMP0]], i32* [[TMP4]] ; CHECK-NEXT: [[TMP5:%.*]] = select i1 [[TMP2]], i32* [[TMP0]], i32* [[TMP4]]
; IS__TUNIT____-NEXT: ret i32* [[TMP5]] ; CHECK-NEXT: ret i32* [[TMP5]]
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@test2
; IS__CGSCC____-SAME: (i32* nofree readnone dereferenceable_or_null(4) "no-capture-maybe-returned" [[TMP0:%.*]], double* nofree nonnull readnone dereferenceable(8) "no-capture-maybe-returned" [[TMP1:%.*]], i1 zeroext [[TMP2:%.*]]) local_unnamed_addr #[[ATTR0]] {
; IS__CGSCC____-NEXT: [[TMP4:%.*]] = bitcast double* [[TMP1]] to i32*
; IS__CGSCC____-NEXT: [[TMP5:%.*]] = select i1 [[TMP2]], i32* [[TMP0]], i32* [[TMP4]]
; IS__CGSCC____-NEXT: ret i32* [[TMP5]]
; ;
%4 = bitcast double* %1 to i32* %4 = bitcast double* %1 to i32*
%5 = select i1 %2, i32* %0, i32* %4 %5 = select i1 %2, i32* %0, i32* %4
ret i32* %5 ret i32* %5
} }
; TEST 3 ; TEST 3
; GEP inbounds ; GEP inbounds
define i32* @test3_1(i32* dereferenceable(8) %0) local_unnamed_addr { define i32* @test3_1(i32* dereferenceable(8) %0) local_unnamed_addr {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@test3_1 ; CHECK-LABEL: define {{[^@]+}}@test3_1
; IS__TUNIT____-SAME: (i32* nofree nonnull readnone dereferenceable(8) "no-capture-maybe-returned" [[TMP0:%.*]]) local_unnamed_addr #[[ATTR0]] { ; CHECK-SAME: (i32* nofree nonnull readnone dereferenceable(8) "no-capture-maybe-returned" [[TMP0:%.*]]) local_unnamed_addr #[[ATTR0]] {
; IS__TUNIT____-NEXT: [[RET:%.*]] = getelementptr inbounds i32, i32* [[TMP0]], i64 1 ; CHECK-NEXT: [[RET:%.*]] = getelementptr inbounds i32, i32* [[TMP0]], i64 1
; IS__TUNIT____-NEXT: ret i32* [[RET]] ; CHECK-NEXT: ret i32* [[RET]]
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@test3_1
; IS__CGSCC____-SAME: (i32* nofree nonnull readnone dereferenceable(8) "no-capture-maybe-returned" [[TMP0:%.*]]) local_unnamed_addr #[[ATTR0]] {
; IS__CGSCC____-NEXT: [[RET:%.*]] = getelementptr inbounds i32, i32* [[TMP0]], i64 1
; IS__CGSCC____-NEXT: ret i32* [[RET]]
; ;
%ret = getelementptr inbounds i32, i32* %0, i64 1 %ret = getelementptr inbounds i32, i32* %0, i64 1
ret i32* %ret ret i32* %ret
} }
define i32* @test3_2(i32* dereferenceable_or_null(32) %0) local_unnamed_addr { define i32* @test3_2(i32* dereferenceable_or_null(32) %0) local_unnamed_addr {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@test3_2 ; CHECK-LABEL: define {{[^@]+}}@test3_2
; IS__TUNIT____-SAME: (i32* nofree readnone dereferenceable_or_null(32) "no-capture-maybe-returned" [[TMP0:%.*]]) local_unnamed_addr #[[ATTR0]] { ; CHECK-SAME: (i32* nofree readnone dereferenceable_or_null(32) "no-capture-maybe-returned" [[TMP0:%.*]]) local_unnamed_addr #[[ATTR0]] {
; IS__TUNIT____-NEXT: [[RET:%.*]] = getelementptr inbounds i32, i32* [[TMP0]], i64 4 ; CHECK-NEXT: [[RET:%.*]] = getelementptr inbounds i32, i32* [[TMP0]], i64 4
; IS__TUNIT____-NEXT: ret i32* [[RET]] ; CHECK-NEXT: ret i32* [[RET]]
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@test3_2
; IS__CGSCC____-SAME: (i32* nofree readnone dereferenceable_or_null(32) "no-capture-maybe-returned" [[TMP0:%.*]]) local_unnamed_addr #[[ATTR0]] {
; IS__CGSCC____-NEXT: [[RET:%.*]] = getelementptr inbounds i32, i32* [[TMP0]], i64 4
; IS__CGSCC____-NEXT: ret i32* [[RET]]
; ;
%ret = getelementptr inbounds i32, i32* %0, i64 4 %ret = getelementptr inbounds i32, i32* %0, i64 4
ret i32* %ret ret i32* %ret
} }
define i32* @test3_3(i32* dereferenceable(8) %0, i32* dereferenceable(16) %1, i1 %2) local_unnamed_addr { define i32* @test3_3(i32* dereferenceable(8) %0, i32* dereferenceable(16) %1, i1 %2) local_unnamed_addr {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@test3_3 ; CHECK-LABEL: define {{[^@]+}}@test3_3
; IS__TUNIT____-SAME: (i32* nofree nonnull readnone dereferenceable(8) "no-capture-maybe-returned" [[TMP0:%.*]], i32* nofree nonnull readnone dereferenceable(16) "no-capture-maybe-returned" [[TMP1:%.*]], i1 [[TMP2:%.*]]) local_unnamed_addr #[[ATTR0]] { ; CHECK-SAME: (i32* nofree nonnull readnone dereferenceable(8) "no-capture-maybe-returned" [[TMP0:%.*]], i32* nofree nonnull readnone dereferenceable(16) "no-capture-maybe-returned" [[TMP1:%.*]], i1 [[TMP2:%.*]]) local_unnamed_addr #[[ATTR0]] {
; IS__TUNIT____-NEXT: [[RET1:%.*]] = getelementptr inbounds i32, i32* [[TMP0]], i64 1 ; CHECK-NEXT: [[RET1:%.*]] = getelementptr inbounds i32, i32* [[TMP0]], i64 1
; IS__TUNIT____-NEXT: [[RET2:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 2 ; CHECK-NEXT: [[RET2:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 2
; IS__TUNIT____-NEXT: [[RET:%.*]] = select i1 [[TMP2]], i32* [[RET1]], i32* [[RET2]] ; CHECK-NEXT: [[RET:%.*]] = select i1 [[TMP2]], i32* [[RET1]], i32* [[RET2]]
; IS__TUNIT____-NEXT: ret i32* [[RET]] ; CHECK-NEXT: ret i32* [[RET]]
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@test3_3
; IS__CGSCC____-SAME: (i32* nofree nonnull readnone dereferenceable(8) "no-capture-maybe-returned" [[TMP0:%.*]], i32* nofree nonnull readnone dereferenceable(16) "no-capture-maybe-returned" [[TMP1:%.*]], i1 [[TMP2:%.*]]) local_unnamed_addr #[[ATTR0]] {
; IS__CGSCC____-NEXT: [[RET1:%.*]] = getelementptr inbounds i32, i32* [[TMP0]], i64 1
; IS__CGSCC____-NEXT: [[RET2:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 2
; IS__CGSCC____-NEXT: [[RET:%.*]] = select i1 [[TMP2]], i32* [[RET1]], i32* [[RET2]]
; IS__CGSCC____-NEXT: ret i32* [[RET]]
; ;
%ret1 = getelementptr inbounds i32, i32* %0, i64 1 %ret1 = getelementptr inbounds i32, i32* %0, i64 1
%ret2 = getelementptr inbounds i32, i32* %1, i64 2 %ret2 = getelementptr inbounds i32, i32* %1, i64 2
%ret = select i1 %2, i32* %ret1, i32* %ret2 %ret = select i1 %2, i32* %ret1, i32* %ret2
ret i32* %ret ret i32* %ret
} }
; TEST 4 ; TEST 4
; Better than known in IR. ; Better than known in IR.
define dereferenceable(4) i32* @test4(i32* dereferenceable(8) %0) local_unnamed_addr { define dereferenceable(4) i32* @test4(i32* dereferenceable(8) %0) local_unnamed_addr {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@test4 ; CHECK-LABEL: define {{[^@]+}}@test4
; IS__TUNIT____-SAME: (i32* nofree nonnull readnone returned dereferenceable(8) "no-capture-maybe-returned" [[TMP0:%.*]]) local_unnamed_addr #[[ATTR0]] { ; CHECK-SAME: (i32* nofree nonnull readnone returned dereferenceable(8) "no-capture-maybe-returned" [[TMP0:%.*]]) local_unnamed_addr #[[ATTR0]] {
; IS__TUNIT____-NEXT: ret i32* [[TMP0]] ; CHECK-NEXT: ret i32* [[TMP0]]
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@test4
; IS__CGSCC____-SAME: (i32* nofree nonnull readnone returned dereferenceable(8) "no-capture-maybe-returned" [[TMP0:%.*]]) local_unnamed_addr #[[ATTR0]] {
; IS__CGSCC____-NEXT: ret i32* [[TMP0]]
; ;
ret i32* %0 ret i32* %0
} }
; TEST 5 ; TEST 5
; loop in which dereferenceabily "grows" ; loop in which dereferenceabily "grows"
define void @deref_phi_growing(i32* dereferenceable(4000) %a) { define void @deref_phi_growing(i32* dereferenceable(4000) %a) {
; CHECK-LABEL: define {{[^@]+}}@deref_phi_growing ; CHECK-LABEL: define {{[^@]+}}@deref_phi_growing
▲ Show 20 Lines • Show All 182 Lines • ▼ Show 20 Lines
; ;
%ptr = tail call i32* @unkown_ptr() %ptr = tail call i32* @unkown_ptr()
store i32 10, i32* %ptr, align 16 store i32 10, i32* %ptr, align 16
ret i32* %ptr ret i32* %ptr
} }
; FIXME: This should have a return dereferenceable(8) but we need to make sure it will work in loops as well. ; FIXME: This should have a return dereferenceable(8) but we need to make sure it will work in loops as well.
define i32* @test_for_minus_index(i32* %p) { define i32* @test_for_minus_index(i32* %p) {
; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind willreturn writeonly ; CHECK: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__TUNIT____-LABEL: define {{[^@]+}}@test_for_minus_index ; CHECK-LABEL: define {{[^@]+}}@test_for_minus_index
; IS__TUNIT____-SAME: (i32* nofree nonnull writeonly align 4 "no-capture-maybe-returned" [[P:%.*]]) #[[ATTR2:[0-9]+]] { ; CHECK-SAME: (i32* nofree nonnull writeonly align 4 "no-capture-maybe-returned" [[P:%.*]]) #[[ATTR2:[0-9]+]] {
; IS__TUNIT____-NEXT: [[Q:%.*]] = getelementptr inbounds i32, i32* [[P]], i32 -2 ; CHECK-NEXT: [[Q:%.*]] = getelementptr inbounds i32, i32* [[P]], i32 -2
; IS__TUNIT____-NEXT: store i32 1, i32* [[Q]], align 4 ; CHECK-NEXT: store i32 1, i32* [[Q]], align 4
; IS__TUNIT____-NEXT: ret i32* [[Q]] ; CHECK-NEXT: ret i32* [[Q]]
;
; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC____-LABEL: define {{[^@]+}}@test_for_minus_index
; IS__CGSCC____-SAME: (i32* nofree nonnull writeonly align 4 "no-capture-maybe-returned" [[P:%.*]]) #[[ATTR2:[0-9]+]] {
; IS__CGSCC____-NEXT: [[Q:%.*]] = getelementptr inbounds i32, i32* [[P]], i32 -2
; IS__CGSCC____-NEXT: store i32 1, i32* [[Q]], align 4
; IS__CGSCC____-NEXT: ret i32* [[Q]]
; ;
%q = getelementptr inbounds i32, i32* %p, i32 -2 %q = getelementptr inbounds i32, i32* %p, i32 -2
store i32 1, i32* %q store i32 1, i32* %q
ret i32* %q ret i32* %q
} }
define void @deref_or_null_and_nonnull(i32* dereferenceable_or_null(100) %0) { define void @deref_or_null_and_nonnull(i32* dereferenceable_or_null(100) %0) {
; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind willreturn writeonly ; CHECK: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__TUNIT____-LABEL: define {{[^@]+}}@deref_or_null_and_nonnull ; CHECK-LABEL: define {{[^@]+}}@deref_or_null_and_nonnull
; IS__TUNIT____-SAME: (i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(100) [[TMP0:%.*]]) #[[ATTR2]] { ; CHECK-SAME: (i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(100) [[TMP0:%.*]]) #[[ATTR2]] {
; IS__TUNIT____-NEXT: store i32 1, i32* [[TMP0]], align 4 ; CHECK-NEXT: store i32 1, i32* [[TMP0]], align 4
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC____-LABEL: define {{[^@]+}}@deref_or_null_and_nonnull
; IS__CGSCC____-SAME: (i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(100) [[TMP0:%.*]]) #[[ATTR2]] {
; IS__CGSCC____-NEXT: store i32 1, i32* [[TMP0]], align 4
; IS__CGSCC____-NEXT: ret void
; ;
store i32 1, i32* %0 store i32 1, i32* %0
ret void ret void
} }
; TEST 8 ; TEST 8
; Use Constant range in deereferenceable ; Use Constant range in deereferenceable
; void g(int *p, long long int *range){ ; void g(int *p, long long int *range){
; int r = *range ; // [10, 99] ; int r = *range ; // [10, 99]
; fill_range(p, *range); ; fill_range(p, *range);
; } ; }
; FIXME: %ptr should be dereferenceable(31) ; FIXME: %ptr should be dereferenceable(31)
define void @test8(i8* %ptr) #0 { define void @test8(i8* %ptr) #0 {
; IS__TUNIT_OPM: Function Attrs: argmemonly nofree nosync nounwind writeonly ; IS________OPM: Function Attrs: argmemonly nofree norecurse nosync nounwind writeonly
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@test8 ; IS________OPM-LABEL: define {{[^@]+}}@test8
; IS__TUNIT_OPM-SAME: (i8* nocapture nofree nonnull writeonly [[PTR:%.*]]) #[[ATTR3:[0-9]+]] { ; IS________OPM-SAME: (i8* nocapture nofree nonnull writeonly [[PTR:%.*]]) #[[ATTR3:[0-9]+]] {
; IS__TUNIT_OPM-NEXT: br label [[TMP1:%.*]] ; IS________OPM-NEXT: br label [[TMP1:%.*]]
; IS__TUNIT_OPM: 1: ; IS________OPM: 1:
; IS__TUNIT_OPM-NEXT: [[I_0:%.*]] = phi i32 [ 20, [[TMP0:%.*]] ], [ [[TMP4:%.*]], [[TMP5:%.*]] ] ; IS________OPM-NEXT: [[I_0:%.*]] = phi i32 [ 20, [[TMP0:%.*]] ], [ [[TMP4:%.*]], [[TMP5:%.*]] ]
; IS__TUNIT_OPM-NEXT: [[TMP2:%.*]] = sext i32 [[I_0]] to i64 ; IS________OPM-NEXT: [[TMP2:%.*]] = sext i32 [[I_0]] to i64
; IS__TUNIT_OPM-NEXT: [[TMP3:%.*]] = getelementptr inbounds i8, i8* [[PTR]], i64 [[TMP2]] ; IS________OPM-NEXT: [[TMP3:%.*]] = getelementptr inbounds i8, i8* [[PTR]], i64 [[TMP2]]
; IS__TUNIT_OPM-NEXT: store i8 32, i8* [[TMP3]], align 1 ; IS________OPM-NEXT: store i8 32, i8* [[TMP3]], align 1
; IS__TUNIT_OPM-NEXT: [[TMP4]] = add nsw i32 [[I_0]], 1 ; IS________OPM-NEXT: [[TMP4]] = add nsw i32 [[I_0]], 1
; IS__TUNIT_OPM-NEXT: br label [[TMP5]] ; IS________OPM-NEXT: br label [[TMP5]]
; IS__TUNIT_OPM: 5: ; IS________OPM: 5:
; IS__TUNIT_OPM-NEXT: [[TMP6:%.*]] = icmp slt i32 [[TMP4]], 30 ; IS________OPM-NEXT: [[TMP6:%.*]] = icmp slt i32 [[TMP4]], 30
; IS__TUNIT_OPM-NEXT: br i1 [[TMP6]], label [[TMP1]], label [[TMP7:%.*]] ; IS________OPM-NEXT: br i1 [[TMP6]], label [[TMP1]], label [[TMP7:%.*]]
; IS__TUNIT_OPM: 7: ; IS________OPM: 7:
; IS__TUNIT_OPM-NEXT: ret void ; IS________OPM-NEXT: ret void
; ;
; IS__TUNIT_NPM: Function Attrs: argmemonly nofree nosync nounwind willreturn writeonly ; IS________NPM: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@test8 ; IS________NPM-LABEL: define {{[^@]+}}@test8
; IS__TUNIT_NPM-SAME: (i8* nocapture nofree nonnull writeonly dereferenceable(21) [[PTR:%.*]]) #[[ATTR2]] { ; IS________NPM-SAME: (i8* nocapture nofree nonnull writeonly dereferenceable(21) [[PTR:%.*]]) #[[ATTR2]] {
; IS__TUNIT_NPM-NEXT: br label [[TMP1:%.*]] ; IS________NPM-NEXT: br label [[TMP1:%.*]]
; IS__TUNIT_NPM: 1: ; IS________NPM: 1:
; IS__TUNIT_NPM-NEXT: [[I_0:%.*]] = phi i32 [ 20, [[TMP0:%.*]] ], [ [[TMP4:%.*]], [[TMP5:%.*]] ] ; IS________NPM-NEXT: [[I_0:%.*]] = phi i32 [ 20, [[TMP0:%.*]] ], [ [[TMP4:%.*]], [[TMP5:%.*]] ]
; IS__TUNIT_NPM-NEXT: [[TMP2:%.*]] = sext i32 [[I_0]] to i64 ; IS________NPM-NEXT: [[TMP2:%.*]] = sext i32 [[I_0]] to i64
; IS__TUNIT_NPM-NEXT: [[TMP3:%.*]] = getelementptr inbounds i8, i8* [[PTR]], i64 [[TMP2]] ; IS________NPM-NEXT: [[TMP3:%.*]] = getelementptr inbounds i8, i8* [[PTR]], i64 [[TMP2]]
; IS__TUNIT_NPM-NEXT: store i8 32, i8* [[TMP3]], align 1 ; IS________NPM-NEXT: store i8 32, i8* [[TMP3]], align 1
; IS__TUNIT_NPM-NEXT: [[TMP4]] = add nsw i32 [[I_0]], 1 ; IS________NPM-NEXT: [[TMP4]] = add nsw i32 [[I_0]], 1
; IS__TUNIT_NPM-NEXT: br label [[TMP5]] ; IS________NPM-NEXT: br label [[TMP5]]
; IS__TUNIT_NPM: 5: ; IS________NPM: 5:
; IS__TUNIT_NPM-NEXT: [[TMP6:%.*]] = icmp slt i32 [[TMP4]], 30 ; IS________NPM-NEXT: [[TMP6:%.*]] = icmp slt i32 [[TMP4]], 30
; IS__TUNIT_NPM-NEXT: br i1 [[TMP6]], label [[TMP1]], label [[TMP7:%.*]] ; IS________NPM-NEXT: br i1 [[TMP6]], label [[TMP1]], label [[TMP7:%.*]]
; IS__TUNIT_NPM: 7: ; IS________NPM: 7:
; IS__TUNIT_NPM-NEXT: ret void ; IS________NPM-NEXT: ret void
;
; IS__CGSCC_OPM: Function Attrs: argmemonly nofree norecurse nosync nounwind writeonly
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@test8
; IS__CGSCC_OPM-SAME: (i8* nocapture nofree nonnull writeonly [[PTR:%.*]]) #[[ATTR3:[0-9]+]] {
; IS__CGSCC_OPM-NEXT: br label [[TMP1:%.*]]
; IS__CGSCC_OPM: 1:
; IS__CGSCC_OPM-NEXT: [[I_0:%.*]] = phi i32 [ 20, [[TMP0:%.*]] ], [ [[TMP4:%.*]], [[TMP5:%.*]] ]
; IS__CGSCC_OPM-NEXT: [[TMP2:%.*]] = sext i32 [[I_0]] to i64
; IS__CGSCC_OPM-NEXT: [[TMP3:%.*]] = getelementptr inbounds i8, i8* [[PTR]], i64 [[TMP2]]
; IS__CGSCC_OPM-NEXT: store i8 32, i8* [[TMP3]], align 1
; IS__CGSCC_OPM-NEXT: [[TMP4]] = add nsw i32 [[I_0]], 1
; IS__CGSCC_OPM-NEXT: br label [[TMP5]]
; IS__CGSCC_OPM: 5:
; IS__CGSCC_OPM-NEXT: [[TMP6:%.*]] = icmp slt i32 [[TMP4]], 30
; IS__CGSCC_OPM-NEXT: br i1 [[TMP6]], label [[TMP1]], label [[TMP7:%.*]]
; IS__CGSCC_OPM: 7:
; IS__CGSCC_OPM-NEXT: ret void
;
; IS__CGSCC_NPM: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@test8
; IS__CGSCC_NPM-SAME: (i8* nocapture nofree nonnull writeonly dereferenceable(21) [[PTR:%.*]]) #[[ATTR2]] {
; IS__CGSCC_NPM-NEXT: br label [[TMP1:%.*]]
; IS__CGSCC_NPM: 1:
; IS__CGSCC_NPM-NEXT: [[I_0:%.*]] = phi i32 [ 20, [[TMP0:%.*]] ], [ [[TMP4:%.*]], [[TMP5:%.*]] ]
; IS__CGSCC_NPM-NEXT: [[TMP2:%.*]] = sext i32 [[I_0]] to i64
; IS__CGSCC_NPM-NEXT: [[TMP3:%.*]] = getelementptr inbounds i8, i8* [[PTR]], i64 [[TMP2]]
; IS__CGSCC_NPM-NEXT: store i8 32, i8* [[TMP3]], align 1
; IS__CGSCC_NPM-NEXT: [[TMP4]] = add nsw i32 [[I_0]], 1
; IS__CGSCC_NPM-NEXT: br label [[TMP5]]
; IS__CGSCC_NPM: 5:
; IS__CGSCC_NPM-NEXT: [[TMP6:%.*]] = icmp slt i32 [[TMP4]], 30
; IS__CGSCC_NPM-NEXT: br i1 [[TMP6]], label [[TMP1]], label [[TMP7:%.*]]
; IS__CGSCC_NPM: 7:
; IS__CGSCC_NPM-NEXT: ret void
; ;
br label %1 br label %1
1: ; preds = %5, %0 1: ; preds = %5, %0
%i.0 = phi i32 [ 20, %0 ], [ %4, %5 ] %i.0 = phi i32 [ 20, %0 ], [ %4, %5 ]
%2 = sext i32 %i.0 to i64 %2 = sext i32 %i.0 to i64
%3 = getelementptr inbounds i8, i8* %ptr, i64 %2 %3 = getelementptr inbounds i8, i8* %ptr, i64 %2
store i8 32, i8* %3, align 1 store i8 32, i8* %3, align 1
%4 = add nsw i32 %i.0, 1 %4 = add nsw i32 %i.0, 1
br label %5 br label %5
5: ; preds = %1 5: ; preds = %1
%6 = icmp slt i32 %4, 30 %6 = icmp slt i32 %4, 30
br i1 %6, label %1, label %7 br i1 %6, label %1, label %7
7: ; preds = %5 7: ; preds = %5
ret void ret void
} }
; 8.2 (negative case) ; 8.2 (negative case)
define void @test8_neg(i32 %i, i8* %ptr) #0 { define void @test8_neg(i32 %i, i8* %ptr) #0 {
; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind willreturn writeonly ; CHECK: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__TUNIT____-LABEL: define {{[^@]+}}@test8_neg ; CHECK-LABEL: define {{[^@]+}}@test8_neg
; IS__TUNIT____-SAME: (i32 [[I:%.*]], i8* nocapture nofree nonnull writeonly [[PTR:%.*]]) #[[ATTR2]] { ; CHECK-SAME: (i32 [[I:%.*]], i8* nocapture nofree nonnull writeonly [[PTR:%.*]]) #[[ATTR2]] {
; IS__TUNIT____-NEXT: [[TMP1:%.*]] = sext i32 [[I]] to i64 ; CHECK-NEXT: [[TMP1:%.*]] = sext i32 [[I]] to i64
; IS__TUNIT____-NEXT: [[TMP2:%.*]] = getelementptr inbounds i8, i8* [[PTR]], i64 [[TMP1]] ; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds i8, i8* [[PTR]], i64 [[TMP1]]
; IS__TUNIT____-NEXT: store i8 65, i8* [[TMP2]], align 1 ; CHECK-NEXT: store i8 65, i8* [[TMP2]], align 1
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC____-LABEL: define {{[^@]+}}@test8_neg
; IS__CGSCC____-SAME: (i32 [[I:%.*]], i8* nocapture nofree nonnull writeonly [[PTR:%.*]]) #[[ATTR2]] {
; IS__CGSCC____-NEXT: [[TMP1:%.*]] = sext i32 [[I]] to i64
; IS__CGSCC____-NEXT: [[TMP2:%.*]] = getelementptr inbounds i8, i8* [[PTR]], i64 [[TMP1]]
; IS__CGSCC____-NEXT: store i8 65, i8* [[TMP2]], align 1
; IS__CGSCC____-NEXT: ret void
; ;
%1 = sext i32 %i to i64 %1 = sext i32 %i to i64
%2 = getelementptr inbounds i8, i8* %ptr, i64 %1 %2 = getelementptr inbounds i8, i8* %ptr, i64 %1
store i8 65, i8* %2, align 1 store i8 65, i8* %2, align 1
ret void ret void
} }
; void fill_range(int* p, long long int start){ ; void fill_range(int* p, long long int start){
; for(long long int i = start;i<start+10;i++){ ; for(long long int i = start;i<start+10;i++){
; // If p[i] is inbounds, p is dereferenceable(40) at least. ; // If p[i] is inbounds, p is dereferenceable(40) at least.
; p[i] = i; ; p[i] = i;
; } ; }
; } ; }
; NOTE: %p should not be dereferenceable ; NOTE: %p should not be dereferenceable
define internal void @fill_range_not_inbounds(i32* %p, i64 %start){ define internal void @fill_range_not_inbounds(i32* %p, i64 %start){
; IS__TUNIT_OPM: Function Attrs: argmemonly nofree nosync nounwind writeonly ; IS________OPM: Function Attrs: argmemonly nofree norecurse nosync nounwind writeonly
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@fill_range_not_inbounds ; IS________OPM-LABEL: define {{[^@]+}}@fill_range_not_inbounds
; IS__TUNIT_OPM-SAME: (i32* nocapture nofree writeonly [[P:%.*]], i64 [[START:%.*]]) #[[ATTR3]] { ; IS________OPM-SAME: (i32* nocapture nofree writeonly [[P:%.*]], i64 [[START:%.*]]) #[[ATTR3]] {
; IS__TUNIT_OPM-NEXT: entry: ; IS________OPM-NEXT: entry:
; IS__TUNIT_OPM-NEXT: [[TMP0:%.*]] = add nsw i64 [[START]], 9 ; IS________OPM-NEXT: [[TMP0:%.*]] = add nsw i64 [[START]], 9
; IS__TUNIT_OPM-NEXT: br label [[FOR_BODY:%.*]] ; IS________OPM-NEXT: br label [[FOR_BODY:%.*]]
; IS__TUNIT_OPM: for.cond.cleanup: ; IS________OPM: for.cond.cleanup:
; IS__TUNIT_OPM-NEXT: ret void ; IS________OPM-NEXT: ret void
; IS__TUNIT_OPM: for.body: ; IS________OPM: for.body:
; IS__TUNIT_OPM-NEXT: [[I_06:%.*]] = phi i64 [ [[START]], [[ENTRY:%.*]] ], [ [[INC:%.*]], [[FOR_BODY]] ] ; IS________OPM-NEXT: [[I_06:%.*]] = phi i64 [ [[START]], [[ENTRY:%.*]] ], [ [[INC:%.*]], [[FOR_BODY]] ]
; IS__TUNIT_OPM-NEXT: [[CONV:%.*]] = trunc i64 [[I_06]] to i32 ; IS________OPM-NEXT: [[CONV:%.*]] = trunc i64 [[I_06]] to i32
; IS__TUNIT_OPM-NEXT: [[ARRAYIDX:%.*]] = getelementptr i32, i32* [[P]], i64 [[I_06]] ; IS________OPM-NEXT: [[ARRAYIDX:%.*]] = getelementptr i32, i32* [[P]], i64 [[I_06]]
; IS__TUNIT_OPM-NEXT: store i32 [[CONV]], i32* [[ARRAYIDX]], align 4 ; IS________OPM-NEXT: store i32 [[CONV]], i32* [[ARRAYIDX]], align 4
; IS__TUNIT_OPM-NEXT: [[INC]] = add nsw i64 [[I_06]], 1 ; IS________OPM-NEXT: [[INC]] = add nsw i64 [[I_06]], 1
; IS__TUNIT_OPM-NEXT: [[CMP:%.*]] = icmp slt i64 [[I_06]], [[TMP0]] ; IS________OPM-NEXT: [[CMP:%.*]] = icmp slt i64 [[I_06]], [[TMP0]]
; IS__TUNIT_OPM-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_COND_CLEANUP:%.*]] ; IS________OPM-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_COND_CLEANUP:%.*]]
; ;
; IS__TUNIT_NPM: Function Attrs: argmemonly nofree nosync nounwind willreturn writeonly ; IS________NPM: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@fill_range_not_inbounds ; IS________NPM-LABEL: define {{[^@]+}}@fill_range_not_inbounds
; IS__TUNIT_NPM-SAME: (i32* nocapture nofree writeonly [[P:%.*]], i64 [[START:%.*]]) #[[ATTR2]] { ; IS________NPM-SAME: (i32* nocapture nofree writeonly [[P:%.*]], i64 [[START:%.*]]) #[[ATTR2]] {
; IS__TUNIT_NPM-NEXT: entry: ; IS________NPM-NEXT: entry:
; IS__TUNIT_NPM-NEXT: [[TMP0:%.*]] = add nsw i64 [[START]], 9 ; IS________NPM-NEXT: [[TMP0:%.*]] = add nsw i64 [[START]], 9
; IS__TUNIT_NPM-NEXT: br label [[FOR_BODY:%.*]] ; IS________NPM-NEXT: br label [[FOR_BODY:%.*]]
; IS__TUNIT_NPM: for.cond.cleanup: ; IS________NPM: for.cond.cleanup:
; IS__TUNIT_NPM-NEXT: ret void ; IS________NPM-NEXT: ret void
; IS__TUNIT_NPM: for.body: ; IS________NPM: for.body:
; IS__TUNIT_NPM-NEXT: [[I_06:%.*]] = phi i64 [ [[START]], [[ENTRY:%.*]] ], [ [[INC:%.*]], [[FOR_BODY]] ] ; IS________NPM-NEXT: [[I_06:%.*]] = phi i64 [ [[START]], [[ENTRY:%.*]] ], [ [[INC:%.*]], [[FOR_BODY]] ]
; IS__TUNIT_NPM-NEXT: [[CONV:%.*]] = trunc i64 [[I_06]] to i32 ; IS________NPM-NEXT: [[CONV:%.*]] = trunc i64 [[I_06]] to i32
; IS__TUNIT_NPM-NEXT: [[ARRAYIDX:%.*]] = getelementptr i32, i32* [[P]], i64 [[I_06]] ; IS________NPM-NEXT: [[ARRAYIDX:%.*]] = getelementptr i32, i32* [[P]], i64 [[I_06]]
; IS__TUNIT_NPM-NEXT: store i32 [[CONV]], i32* [[ARRAYIDX]], align 4 ; IS________NPM-NEXT: store i32 [[CONV]], i32* [[ARRAYIDX]], align 4
; IS__TUNIT_NPM-NEXT: [[INC]] = add nsw i64 [[I_06]], 1 ; IS________NPM-NEXT: [[INC]] = add nsw i64 [[I_06]], 1
; IS__TUNIT_NPM-NEXT: [[CMP:%.*]] = icmp slt i64 [[I_06]], [[TMP0]] ; IS________NPM-NEXT: [[CMP:%.*]] = icmp slt i64 [[I_06]], [[TMP0]]
; IS__TUNIT_NPM-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_COND_CLEANUP:%.*]] ; IS________NPM-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_COND_CLEANUP:%.*]]
;
; IS__CGSCC_OPM: Function Attrs: argmemonly nofree norecurse nosync nounwind writeonly
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@fill_range_not_inbounds
; IS__CGSCC_OPM-SAME: (i32* nocapture nofree writeonly [[P:%.*]], i64 [[START:%.*]]) #[[ATTR3]] {
; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: [[TMP0:%.*]] = add nsw i64 [[START]], 9
; IS__CGSCC_OPM-NEXT: br label [[FOR_BODY:%.*]]
; IS__CGSCC_OPM: for.cond.cleanup:
; IS__CGSCC_OPM-NEXT: ret void
; IS__CGSCC_OPM: for.body:
; IS__CGSCC_OPM-NEXT: [[I_06:%.*]] = phi i64 [ [[START]], [[ENTRY:%.*]] ], [ [[INC:%.*]], [[FOR_BODY]] ]
; IS__CGSCC_OPM-NEXT: [[CONV:%.*]] = trunc i64 [[I_06]] to i32
; IS__CGSCC_OPM-NEXT: [[ARRAYIDX:%.*]] = getelementptr i32, i32* [[P]], i64 [[I_06]]
; IS__CGSCC_OPM-NEXT: store i32 [[CONV]], i32* [[ARRAYIDX]], align 4
; IS__CGSCC_OPM-NEXT: [[INC]] = add nsw i64 [[I_06]], 1
; IS__CGSCC_OPM-NEXT: [[CMP:%.*]] = icmp slt i64 [[I_06]], [[TMP0]]
; IS__CGSCC_OPM-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_COND_CLEANUP:%.*]]
;
; IS__CGSCC_NPM: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@fill_range_not_inbounds
; IS__CGSCC_NPM-SAME: (i32* nocapture nofree writeonly [[P:%.*]], i64 [[START:%.*]]) #[[ATTR2]] {
; IS__CGSCC_NPM-NEXT: entry:
; IS__CGSCC_NPM-NEXT: [[TMP0:%.*]] = add nsw i64 [[START]], 9
; IS__CGSCC_NPM-NEXT: br label [[FOR_BODY:%.*]]
; IS__CGSCC_NPM: for.cond.cleanup:
; IS__CGSCC_NPM-NEXT: ret void
; IS__CGSCC_NPM: for.body:
; IS__CGSCC_NPM-NEXT: [[I_06:%.*]] = phi i64 [ [[START]], [[ENTRY:%.*]] ], [ [[INC:%.*]], [[FOR_BODY]] ]
; IS__CGSCC_NPM-NEXT: [[CONV:%.*]] = trunc i64 [[I_06]] to i32
; IS__CGSCC_NPM-NEXT: [[ARRAYIDX:%.*]] = getelementptr i32, i32* [[P]], i64 [[I_06]]
; IS__CGSCC_NPM-NEXT: store i32 [[CONV]], i32* [[ARRAYIDX]], align 4
; IS__CGSCC_NPM-NEXT: [[INC]] = add nsw i64 [[I_06]], 1
; IS__CGSCC_NPM-NEXT: [[CMP:%.*]] = icmp slt i64 [[I_06]], [[TMP0]]
; IS__CGSCC_NPM-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_COND_CLEANUP:%.*]]
; ;
entry: entry:
%0 = add nsw i64 %start, 9 %0 = add nsw i64 %start, 9
br label %for.body br label %for.body
for.cond.cleanup: ; preds = %for.body for.cond.cleanup: ; preds = %for.body
ret void ret void
for.body: ; preds = %entry, %for.body for.body: ; preds = %entry, %for.body
%i.06 = phi i64 [ %start, %entry ], [ %inc, %for.body ] %i.06 = phi i64 [ %start, %entry ], [ %inc, %for.body ]
%conv = trunc i64 %i.06 to i32 %conv = trunc i64 %i.06 to i32
%arrayidx = getelementptr i32, i32* %p, i64 %i.06 %arrayidx = getelementptr i32, i32* %p, i64 %i.06
store i32 %conv, i32* %arrayidx, align 4 store i32 %conv, i32* %arrayidx, align 4
%inc = add nsw i64 %i.06, 1 %inc = add nsw i64 %i.06, 1
%cmp = icmp slt i64 %i.06, %0 %cmp = icmp slt i64 %i.06, %0
br i1 %cmp, label %for.body, label %for.cond.cleanup br i1 %cmp, label %for.body, label %for.cond.cleanup
} }
; FIXME: %p should be dereferenceable(40) ; FIXME: %p should be dereferenceable(40)
define internal void @fill_range_inbounds(i32* %p, i64 %start){ define internal void @fill_range_inbounds(i32* %p, i64 %start){
; IS__TUNIT_OPM: Function Attrs: argmemonly nofree nosync nounwind writeonly ; IS________OPM: Function Attrs: argmemonly nofree norecurse nosync nounwind writeonly
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@fill_range_inbounds ; IS________OPM-LABEL: define {{[^@]+}}@fill_range_inbounds
; IS__TUNIT_OPM-SAME: (i32* nocapture nofree writeonly [[P:%.*]], i64 [[START:%.*]]) #[[ATTR3]] { ; IS________OPM-SAME: (i32* nocapture nofree writeonly [[P:%.*]], i64 [[START:%.*]]) #[[ATTR3]] {
; IS__TUNIT_OPM-NEXT: entry: ; IS________OPM-NEXT: entry:
; IS__TUNIT_OPM-NEXT: [[TMP0:%.*]] = add nsw i64 [[START]], 9 ; IS________OPM-NEXT: [[TMP0:%.*]] = add nsw i64 [[START]], 9
; IS__TUNIT_OPM-NEXT: br label [[FOR_BODY:%.*]] ; IS________OPM-NEXT: br label [[FOR_BODY:%.*]]
; IS__TUNIT_OPM: for.cond.cleanup: ; IS________OPM: for.cond.cleanup:
; IS__TUNIT_OPM-NEXT: ret void ; IS________OPM-NEXT: ret void
; IS__TUNIT_OPM: for.body: ; IS________OPM: for.body:
; IS__TUNIT_OPM-NEXT: [[I_06:%.*]] = phi i64 [ [[START]], [[ENTRY:%.*]] ], [ [[INC:%.*]], [[FOR_BODY]] ] ; IS________OPM-NEXT: [[I_06:%.*]] = phi i64 [ [[START]], [[ENTRY:%.*]] ], [ [[INC:%.*]], [[FOR_BODY]] ]
; IS__TUNIT_OPM-NEXT: [[CONV:%.*]] = trunc i64 [[I_06]] to i32 ; IS________OPM-NEXT: [[CONV:%.*]] = trunc i64 [[I_06]] to i32
; IS__TUNIT_OPM-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[P]], i64 [[I_06]] ; IS________OPM-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[P]], i64 [[I_06]]
; IS__TUNIT_OPM-NEXT: store i32 [[CONV]], i32* [[ARRAYIDX]], align 4 ; IS________OPM-NEXT: store i32 [[CONV]], i32* [[ARRAYIDX]], align 4
; IS__TUNIT_OPM-NEXT: [[INC]] = add nsw i64 [[I_06]], 1 ; IS________OPM-NEXT: [[INC]] = add nsw i64 [[I_06]], 1
; IS__TUNIT_OPM-NEXT: [[CMP:%.*]] = icmp slt i64 [[I_06]], [[TMP0]] ; IS________OPM-NEXT: [[CMP:%.*]] = icmp slt i64 [[I_06]], [[TMP0]]
; IS__TUNIT_OPM-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_COND_CLEANUP:%.*]] ; IS________OPM-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_COND_CLEANUP:%.*]]
; ;
; IS__TUNIT_NPM: Function Attrs: argmemonly nofree nosync nounwind willreturn writeonly ; IS________NPM: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@fill_range_inbounds ; IS________NPM-LABEL: define {{[^@]+}}@fill_range_inbounds
; IS__TUNIT_NPM-SAME: (i32* nocapture nofree writeonly [[P:%.*]], i64 [[START:%.*]]) #[[ATTR2]] { ; IS________NPM-SAME: (i32* nocapture nofree writeonly [[P:%.*]], i64 [[START:%.*]]) #[[ATTR2]] {
; IS__TUNIT_NPM-NEXT: entry: ; IS________NPM-NEXT: entry:
; IS__TUNIT_NPM-NEXT: [[TMP0:%.*]] = add nsw i64 [[START]], 9 ; IS________NPM-NEXT: [[TMP0:%.*]] = add nsw i64 [[START]], 9
; IS__TUNIT_NPM-NEXT: br label [[FOR_BODY:%.*]] ; IS________NPM-NEXT: br label [[FOR_BODY:%.*]]
; IS__TUNIT_NPM: for.cond.cleanup: ; IS________NPM: for.cond.cleanup:
; IS__TUNIT_NPM-NEXT: ret void ; IS________NPM-NEXT: ret void
; IS__TUNIT_NPM: for.body: ; IS________NPM: for.body:
; IS__TUNIT_NPM-NEXT: [[I_06:%.*]] = phi i64 [ [[START]], [[ENTRY:%.*]] ], [ [[INC:%.*]], [[FOR_BODY]] ] ; IS________NPM-NEXT: [[I_06:%.*]] = phi i64 [ [[START]], [[ENTRY:%.*]] ], [ [[INC:%.*]], [[FOR_BODY]] ]
; IS__TUNIT_NPM-NEXT: [[CONV:%.*]] = trunc i64 [[I_06]] to i32 ; IS________NPM-NEXT: [[CONV:%.*]] = trunc i64 [[I_06]] to i32
; IS__TUNIT_NPM-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[P]], i64 [[I_06]] ; IS________NPM-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[P]], i64 [[I_06]]
; IS__TUNIT_NPM-NEXT: store i32 [[CONV]], i32* [[ARRAYIDX]], align 4 ; IS________NPM-NEXT: store i32 [[CONV]], i32* [[ARRAYIDX]], align 4
; IS__TUNIT_NPM-NEXT: [[INC]] = add nsw i64 [[I_06]], 1 ; IS________NPM-NEXT: [[INC]] = add nsw i64 [[I_06]], 1
; IS__TUNIT_NPM-NEXT: [[CMP:%.*]] = icmp slt i64 [[I_06]], [[TMP0]] ; IS________NPM-NEXT: [[CMP:%.*]] = icmp slt i64 [[I_06]], [[TMP0]]
; IS__TUNIT_NPM-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_COND_CLEANUP:%.*]] ; IS________NPM-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_COND_CLEANUP:%.*]]
;
; IS__CGSCC_OPM: Function Attrs: argmemonly nofree norecurse nosync nounwind writeonly
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@fill_range_inbounds
; IS__CGSCC_OPM-SAME: (i32* nocapture nofree writeonly [[P:%.*]], i64 [[START:%.*]]) #[[ATTR3]] {
; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: [[TMP0:%.*]] = add nsw i64 [[START]], 9
; IS__CGSCC_OPM-NEXT: br label [[FOR_BODY:%.*]]
; IS__CGSCC_OPM: for.cond.cleanup:
; IS__CGSCC_OPM-NEXT: ret void
; IS__CGSCC_OPM: for.body:
; IS__CGSCC_OPM-NEXT: [[I_06:%.*]] = phi i64 [ [[START]], [[ENTRY:%.*]] ], [ [[INC:%.*]], [[FOR_BODY]] ]
; IS__CGSCC_OPM-NEXT: [[CONV:%.*]] = trunc i64 [[I_06]] to i32
; IS__CGSCC_OPM-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[P]], i64 [[I_06]]
; IS__CGSCC_OPM-NEXT: store i32 [[CONV]], i32* [[ARRAYIDX]], align 4
; IS__CGSCC_OPM-NEXT: [[INC]] = add nsw i64 [[I_06]], 1
; IS__CGSCC_OPM-NEXT: [[CMP:%.*]] = icmp slt i64 [[I_06]], [[TMP0]]
; IS__CGSCC_OPM-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_COND_CLEANUP:%.*]]
;
; IS__CGSCC_NPM: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@fill_range_inbounds
; IS__CGSCC_NPM-SAME: (i32* nocapture nofree writeonly [[P:%.*]], i64 [[START:%.*]]) #[[ATTR2]] {
; IS__CGSCC_NPM-NEXT: entry:
; IS__CGSCC_NPM-NEXT: [[TMP0:%.*]] = add nsw i64 [[START]], 9
; IS__CGSCC_NPM-NEXT: br label [[FOR_BODY:%.*]]
; IS__CGSCC_NPM: for.cond.cleanup:
; IS__CGSCC_NPM-NEXT: ret void
; IS__CGSCC_NPM: for.body:
; IS__CGSCC_NPM-NEXT: [[I_06:%.*]] = phi i64 [ [[START]], [[ENTRY:%.*]] ], [ [[INC:%.*]], [[FOR_BODY]] ]
; IS__CGSCC_NPM-NEXT: [[CONV:%.*]] = trunc i64 [[I_06]] to i32
; IS__CGSCC_NPM-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[P]], i64 [[I_06]]
; IS__CGSCC_NPM-NEXT: store i32 [[CONV]], i32* [[ARRAYIDX]], align 4
; IS__CGSCC_NPM-NEXT: [[INC]] = add nsw i64 [[I_06]], 1
; IS__CGSCC_NPM-NEXT: [[CMP:%.*]] = icmp slt i64 [[I_06]], [[TMP0]]
; IS__CGSCC_NPM-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_COND_CLEANUP:%.*]]
; ;
entry: entry:
%0 = add nsw i64 %start, 9 %0 = add nsw i64 %start, 9
br label %for.body br label %for.body
for.cond.cleanup: ; preds = %for.body for.cond.cleanup: ; preds = %for.body
ret void ret void
for.body: ; preds = %entry, %for.body for.body: ; preds = %entry, %for.body
%i.06 = phi i64 [ %start, %entry ], [ %inc, %for.body ] %i.06 = phi i64 [ %start, %entry ], [ %inc, %for.body ]
%conv = trunc i64 %i.06 to i32 %conv = trunc i64 %i.06 to i32
%arrayidx = getelementptr inbounds i32, i32* %p, i64 %i.06 %arrayidx = getelementptr inbounds i32, i32* %p, i64 %i.06
store i32 %conv, i32* %arrayidx, align 4 store i32 %conv, i32* %arrayidx, align 4
%inc = add nsw i64 %i.06, 1 %inc = add nsw i64 %i.06, 1
%cmp = icmp slt i64 %i.06, %0 %cmp = icmp slt i64 %i.06, %0
br i1 %cmp, label %for.body, label %for.cond.cleanup br i1 %cmp, label %for.body, label %for.cond.cleanup
} }
define void @call_fill_range(i32* nocapture %p, i64* nocapture readonly %range) { define void @call_fill_range(i32* nocapture %p, i64* nocapture readonly %range) {
; IS__TUNIT_OPM: Function Attrs: argmemonly nofree nosync nounwind ; IS________OPM: Function Attrs: argmemonly nofree norecurse nosync nounwind
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@call_fill_range ; IS________OPM-LABEL: define {{[^@]+}}@call_fill_range
; IS__TUNIT_OPM-SAME: (i32* nocapture nofree writeonly [[P:%.*]], i64* nocapture nofree noundef nonnull readonly align 8 dereferenceable(8) [[RANGE:%.*]]) #[[ATTR4:[0-9]+]] { ; IS________OPM-SAME: (i32* nocapture nofree writeonly [[P:%.*]], i64* nocapture nofree noundef nonnull readonly align 8 dereferenceable(8) [[RANGE:%.*]]) #[[ATTR4:[0-9]+]] {
; IS__TUNIT_OPM-NEXT: entry: ; IS________OPM-NEXT: entry:
; IS__TUNIT_OPM-NEXT: [[TMP0:%.*]] = load i64, i64* [[RANGE]], align 8, !range [[RNG0:![0-9]+]] ; IS________OPM-NEXT: [[TMP0:%.*]] = load i64, i64* [[RANGE]], align 8, !range [[RNG0:![0-9]+]]
; IS__TUNIT_OPM-NEXT: tail call void @fill_range_inbounds(i32* nocapture nofree writeonly [[P]], i64 [[TMP0]]) #[[ATTR6:[0-9]+]] ; IS________OPM-NEXT: tail call void @fill_range_inbounds(i32* nocapture nofree writeonly [[P]], i64 [[TMP0]]) #[[ATTR7:[0-9]+]]
; IS__TUNIT_OPM-NEXT: tail call void @fill_range_not_inbounds(i32* nocapture nofree writeonly [[P]], i64 [[TMP0]]) #[[ATTR6]] ; IS________OPM-NEXT: tail call void @fill_range_not_inbounds(i32* nocapture nofree writeonly [[P]], i64 [[TMP0]]) #[[ATTR7]]
; IS__TUNIT_OPM-NEXT: ret void ; IS________OPM-NEXT: ret void
; ;
; IS__TUNIT_NPM: Function Attrs: argmemonly nofree nosync nounwind willreturn ; IS________NPM: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@call_fill_range ; IS________NPM-LABEL: define {{[^@]+}}@call_fill_range
; IS__TUNIT_NPM-SAME: (i32* nocapture nofree writeonly [[P:%.*]], i64* nocapture nofree noundef nonnull readonly align 8 dereferenceable(8) [[RANGE:%.*]]) #[[ATTR3:[0-9]+]] { ; IS________NPM-SAME: (i32* nocapture nofree writeonly [[P:%.*]], i64* nocapture nofree noundef nonnull readonly align 8 dereferenceable(8) [[RANGE:%.*]]) #[[ATTR3:[0-9]+]] {
; IS__TUNIT_NPM-NEXT: entry: ; IS________NPM-NEXT: entry:
; IS__TUNIT_NPM-NEXT: [[TMP0:%.*]] = load i64, i64* [[RANGE]], align 8, !range [[RNG0:![0-9]+]] ; IS________NPM-NEXT: [[TMP0:%.*]] = load i64, i64* [[RANGE]], align 8, !range [[RNG0:![0-9]+]]
; IS__TUNIT_NPM-NEXT: tail call void @fill_range_inbounds(i32* nocapture nofree writeonly [[P]], i64 [[TMP0]]) #[[ATTR6:[0-9]+]] ; IS________NPM-NEXT: tail call void @fill_range_inbounds(i32* nocapture nofree writeonly [[P]], i64 [[TMP0]]) #[[ATTR6:[0-9]+]]
; IS__TUNIT_NPM-NEXT: tail call void @fill_range_not_inbounds(i32* nocapture nofree writeonly [[P]], i64 [[TMP0]]) #[[ATTR6]] ; IS________NPM-NEXT: tail call void @fill_range_not_inbounds(i32* nocapture nofree writeonly [[P]], i64 [[TMP0]]) #[[ATTR6]]
; IS__TUNIT_NPM-NEXT: ret void ; IS________NPM-NEXT: ret void
;
; IS__CGSCC_OPM: Function Attrs: argmemonly nofree norecurse nosync nounwind
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@call_fill_range
; IS__CGSCC_OPM-SAME: (i32* nocapture nofree writeonly [[P:%.*]], i64* nocapture nofree noundef nonnull readonly align 8 dereferenceable(8) [[RANGE:%.*]]) #[[ATTR4:[0-9]+]] {
; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: [[TMP0:%.*]] = load i64, i64* [[RANGE]], align 8, !range [[RNG0:![0-9]+]]
; IS__CGSCC_OPM-NEXT: tail call void @fill_range_inbounds(i32* nocapture nofree writeonly [[P]], i64 [[TMP0]]) #[[ATTR7:[0-9]+]]
; IS__CGSCC_OPM-NEXT: tail call void @fill_range_not_inbounds(i32* nocapture nofree writeonly [[P]], i64 [[TMP0]]) #[[ATTR7]]
; IS__CGSCC_OPM-NEXT: ret void
;
; IS__CGSCC_NPM: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@call_fill_range
; IS__CGSCC_NPM-SAME: (i32* nocapture nofree writeonly [[P:%.*]], i64* nocapture nofree noundef nonnull readonly align 8 dereferenceable(8) [[RANGE:%.*]]) #[[ATTR3:[0-9]+]] {
; IS__CGSCC_NPM-NEXT: entry:
; IS__CGSCC_NPM-NEXT: [[TMP0:%.*]] = load i64, i64* [[RANGE]], align 8, !range [[RNG0:![0-9]+]]
; IS__CGSCC_NPM-NEXT: tail call void @fill_range_inbounds(i32* nocapture nofree writeonly [[P]], i64 [[TMP0]]) #[[ATTR6:[0-9]+]]
; IS__CGSCC_NPM-NEXT: tail call void @fill_range_not_inbounds(i32* nocapture nofree writeonly [[P]], i64 [[TMP0]]) #[[ATTR6]]
; IS__CGSCC_NPM-NEXT: ret void
; ;
entry: entry:
%0 = load i64, i64* %range, align 8, !range !0 %0 = load i64, i64* %range, align 8, !range !0
tail call void @fill_range_inbounds(i32* %p, i64 %0) tail call void @fill_range_inbounds(i32* %p, i64 %0)
tail call void @fill_range_not_inbounds(i32* %p, i64 %0) tail call void @fill_range_not_inbounds(i32* %p, i64 %0)
ret void ret void
} }
▲ Show 20 Lines • Show All 85 Lines • ▼ Show 20 Lines
; *ptr = 3; ; *ptr = 3;
; else ; else
; *ptr = 4; ; *ptr = 4;
; } ; }
; } ; }
; ;
; FIXME: %ptr should be dereferenceable(4) ; FIXME: %ptr should be dereferenceable(4)
define dso_local void @rec-branch-1(i32 %a, i32 %b, i32 %c, i32* %ptr) { define dso_local void @rec-branch-1(i32 %a, i32 %b, i32 %c, i32* %ptr) {
; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind willreturn writeonly ; CHECK: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__TUNIT____-LABEL: define {{[^@]+}}@rec-branch-1 ; CHECK-LABEL: define {{[^@]+}}@rec-branch-1
; IS__TUNIT____-SAME: (i32 [[A:%.*]], i32 [[B:%.*]], i32 [[C:%.*]], i32* nocapture nofree writeonly [[PTR:%.*]]) #[[ATTR2]] { ; CHECK-SAME: (i32 [[A:%.*]], i32 [[B:%.*]], i32 [[C:%.*]], i32* nocapture nofree writeonly [[PTR:%.*]]) #[[ATTR2]] {
; IS__TUNIT____-NEXT: entry: ; CHECK-NEXT: entry:
; IS__TUNIT____-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[A]], 0 ; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[A]], 0
; IS__TUNIT____-NEXT: br i1 [[TOBOOL]], label [[IF_ELSE3:%.*]], label [[IF_THEN:%.*]] ; CHECK-NEXT: br i1 [[TOBOOL]], label [[IF_ELSE3:%.*]], label [[IF_THEN:%.*]]
; IS__TUNIT____: if.then: ; CHECK: if.then:
; IS__TUNIT____-NEXT: [[TOBOOL1:%.*]] = icmp eq i32 [[B]], 0 ; CHECK-NEXT: [[TOBOOL1:%.*]] = icmp eq i32 [[B]], 0
; IS__TUNIT____-NEXT: br i1 [[TOBOOL1]], label [[IF_ELSE:%.*]], label [[IF_THEN2:%.*]] ; CHECK-NEXT: br i1 [[TOBOOL1]], label [[IF_ELSE:%.*]], label [[IF_THEN2:%.*]]
; IS__TUNIT____: if.then2: ; CHECK: if.then2:
; IS__TUNIT____-NEXT: store i32 1, i32* [[PTR]], align 4 ; CHECK-NEXT: store i32 1, i32* [[PTR]], align 4
; IS__TUNIT____-NEXT: br label [[IF_END8:%.*]] ; CHECK-NEXT: br label [[IF_END8:%.*]]
; IS__TUNIT____: if.else: ; CHECK: if.else:
; IS__TUNIT____-NEXT: store i32 2, i32* [[PTR]], align 4 ; CHECK-NEXT: store i32 2, i32* [[PTR]], align 4
; IS__TUNIT____-NEXT: br label [[IF_END8]] ; CHECK-NEXT: br label [[IF_END8]]
; IS__TUNIT____: if.else3: ; CHECK: if.else3:
; IS__TUNIT____-NEXT: [[TOBOOL4:%.*]] = icmp eq i32 [[C]], 0 ; CHECK-NEXT: [[TOBOOL4:%.*]] = icmp eq i32 [[C]], 0
; IS__TUNIT____-NEXT: br i1 [[TOBOOL4]], label [[IF_ELSE6:%.*]], label [[IF_THEN5:%.*]] ; CHECK-NEXT: br i1 [[TOBOOL4]], label [[IF_ELSE6:%.*]], label [[IF_THEN5:%.*]]
; IS__TUNIT____: if.then5: ; CHECK: if.then5:
; IS__TUNIT____-NEXT: store i32 3, i32* [[PTR]], align 4 ; CHECK-NEXT: store i32 3, i32* [[PTR]], align 4
; IS__TUNIT____-NEXT: br label [[IF_END8]] ; CHECK-NEXT: br label [[IF_END8]]
; IS__TUNIT____: if.else6: ; CHECK: if.else6:
; IS__TUNIT____-NEXT: store i32 4, i32* [[PTR]], align 4 ; CHECK-NEXT: store i32 4, i32* [[PTR]], align 4
; IS__TUNIT____-NEXT: br label [[IF_END8]] ; CHECK-NEXT: br label [[IF_END8]]
; IS__TUNIT____: if.end8: ; CHECK: if.end8:
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC____-LABEL: define {{[^@]+}}@rec-branch-1
; IS__CGSCC____-SAME: (i32 [[A:%.*]], i32 [[B:%.*]], i32 [[C:%.*]], i32* nocapture nofree writeonly [[PTR:%.*]]) #[[ATTR2]] {
; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[A]], 0
; IS__CGSCC____-NEXT: br i1 [[TOBOOL]], label [[IF_ELSE3:%.*]], label [[IF_THEN:%.*]]
; IS__CGSCC____: if.then:
; IS__CGSCC____-NEXT: [[TOBOOL1:%.*]] = icmp eq i32 [[B]], 0
; IS__CGSCC____-NEXT: br i1 [[TOBOOL1]], label [[IF_ELSE:%.*]], label [[IF_THEN2:%.*]]
; IS__CGSCC____: if.then2:
; IS__CGSCC____-NEXT: store i32 1, i32* [[PTR]], align 4
; IS__CGSCC____-NEXT: br label [[IF_END8:%.*]]
; IS__CGSCC____: if.else:
; IS__CGSCC____-NEXT: store i32 2, i32* [[PTR]], align 4
; IS__CGSCC____-NEXT: br label [[IF_END8]]
; IS__CGSCC____: if.else3:
; IS__CGSCC____-NEXT: [[TOBOOL4:%.*]] = icmp eq i32 [[C]], 0
; IS__CGSCC____-NEXT: br i1 [[TOBOOL4]], label [[IF_ELSE6:%.*]], label [[IF_THEN5:%.*]]
; IS__CGSCC____: if.then5:
; IS__CGSCC____-NEXT: store i32 3, i32* [[PTR]], align 4
; IS__CGSCC____-NEXT: br label [[IF_END8]]
; IS__CGSCC____: if.else6:
; IS__CGSCC____-NEXT: store i32 4, i32* [[PTR]], align 4
; IS__CGSCC____-NEXT: br label [[IF_END8]]
; IS__CGSCC____: if.end8:
; IS__CGSCC____-NEXT: ret void
; ;
entry: entry:
%tobool = icmp eq i32 %a, 0 %tobool = icmp eq i32 %a, 0
br i1 %tobool, label %if.else3, label %if.then br i1 %tobool, label %if.else3, label %if.then
if.then: ; preds = %entry if.then: ; preds = %entry
%tobool1 = icmp eq i32 %b, 0 %tobool1 = icmp eq i32 %b, 0
br i1 %tobool1, label %if.else, label %if.then2 br i1 %tobool1, label %if.else, label %if.then2
Show All 34 Lines
; else ; else
; rec-branch-2(1, 1, 1, ptr); ; rec-branch-2(1, 1, 1, ptr);
; } ; }
; } ; }
; FIXME: %ptr should be dereferenceable(4) ; FIXME: %ptr should be dereferenceable(4)
define dso_local void @rec-branch-2(i32 %a, i32 %b, i32 %c, i32* %ptr) { define dso_local void @rec-branch-2(i32 %a, i32 %b, i32 %c, i32* %ptr) {
; IS__TUNIT_OPM: Function Attrs: argmemonly nofree nosync nounwind writeonly ; IS__TUNIT_OPM: Function Attrs: argmemonly nofree nosync nounwind writeonly
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@rec-branch-2 ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@rec-branch-2
; IS__TUNIT_OPM-SAME: (i32 [[A:%.*]], i32 [[B:%.*]], i32 [[C:%.*]], i32* nocapture nofree writeonly [[PTR:%.*]]) #[[ATTR3]] { ; IS__TUNIT_OPM-SAME: (i32 [[A:%.*]], i32 [[B:%.*]], i32 [[C:%.*]], i32* nocapture nofree writeonly [[PTR:%.*]]) #[[ATTR5:[0-9]+]] {
; IS__TUNIT_OPM-NEXT: entry: ; IS__TUNIT_OPM-NEXT: entry:
; IS__TUNIT_OPM-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[A]], 0 ; IS__TUNIT_OPM-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[A]], 0
; IS__TUNIT_OPM-NEXT: br i1 [[TOBOOL]], label [[IF_ELSE3:%.*]], label [[IF_THEN:%.*]] ; IS__TUNIT_OPM-NEXT: br i1 [[TOBOOL]], label [[IF_ELSE3:%.*]], label [[IF_THEN:%.*]]
; IS__TUNIT_OPM: if.then: ; IS__TUNIT_OPM: if.then:
; IS__TUNIT_OPM-NEXT: [[TOBOOL1:%.*]] = icmp eq i32 [[B]], 0 ; IS__TUNIT_OPM-NEXT: [[TOBOOL1:%.*]] = icmp eq i32 [[B]], 0
; IS__TUNIT_OPM-NEXT: br i1 [[TOBOOL1]], label [[IF_ELSE:%.*]], label [[IF_THEN2:%.*]] ; IS__TUNIT_OPM-NEXT: br i1 [[TOBOOL1]], label [[IF_ELSE:%.*]], label [[IF_THEN2:%.*]]
; IS__TUNIT_OPM: if.then2: ; IS__TUNIT_OPM: if.then2:
; IS__TUNIT_OPM-NEXT: store i32 1, i32* [[PTR]], align 4 ; IS__TUNIT_OPM-NEXT: store i32 1, i32* [[PTR]], align 4
; IS__TUNIT_OPM-NEXT: br label [[IF_END8:%.*]] ; IS__TUNIT_OPM-NEXT: br label [[IF_END8:%.*]]
; IS__TUNIT_OPM: if.else: ; IS__TUNIT_OPM: if.else:
; IS__TUNIT_OPM-NEXT: store i32 2, i32* [[PTR]], align 4 ; IS__TUNIT_OPM-NEXT: store i32 2, i32* [[PTR]], align 4
; IS__TUNIT_OPM-NEXT: br label [[IF_END8]] ; IS__TUNIT_OPM-NEXT: br label [[IF_END8]]
; IS__TUNIT_OPM: if.else3: ; IS__TUNIT_OPM: if.else3:
; IS__TUNIT_OPM-NEXT: [[TOBOOL4:%.*]] = icmp eq i32 [[C]], 0 ; IS__TUNIT_OPM-NEXT: [[TOBOOL4:%.*]] = icmp eq i32 [[C]], 0
; IS__TUNIT_OPM-NEXT: br i1 [[TOBOOL4]], label [[IF_ELSE6:%.*]], label [[IF_THEN5:%.*]] ; IS__TUNIT_OPM-NEXT: br i1 [[TOBOOL4]], label [[IF_ELSE6:%.*]], label [[IF_THEN5:%.*]]
; IS__TUNIT_OPM: if.then5: ; IS__TUNIT_OPM: if.then5:
; IS__TUNIT_OPM-NEXT: store i32 3, i32* [[PTR]], align 4 ; IS__TUNIT_OPM-NEXT: store i32 3, i32* [[PTR]], align 4
; IS__TUNIT_OPM-NEXT: br label [[IF_END8]] ; IS__TUNIT_OPM-NEXT: br label [[IF_END8]]
; IS__TUNIT_OPM: if.else6: ; IS__TUNIT_OPM: if.else6:
; IS__TUNIT_OPM-NEXT: tail call void @rec-branch-2(i32 noundef 1, i32 noundef 1, i32 noundef 1, i32* nocapture nofree writeonly [[PTR]]) #[[ATTR6]] ; IS__TUNIT_OPM-NEXT: tail call void @rec-branch-2(i32 noundef 1, i32 noundef 1, i32 noundef 1, i32* nocapture nofree writeonly [[PTR]]) #[[ATTR7]]
; IS__TUNIT_OPM-NEXT: br label [[IF_END8]] ; IS__TUNIT_OPM-NEXT: br label [[IF_END8]]
; IS__TUNIT_OPM: if.end8: ; IS__TUNIT_OPM: if.end8:
; IS__TUNIT_OPM-NEXT: ret void ; IS__TUNIT_OPM-NEXT: ret void
; ;
; IS________NPM: Function Attrs: argmemonly nofree nosync nounwind writeonly ; IS________NPM: Function Attrs: argmemonly nofree nosync nounwind writeonly
; IS________NPM-LABEL: define {{[^@]+}}@rec-branch-2 ; IS________NPM-LABEL: define {{[^@]+}}@rec-branch-2
; IS________NPM-SAME: (i32 [[A:%.*]], i32 [[B:%.*]], i32 [[C:%.*]], i32* nocapture nofree writeonly [[PTR:%.*]]) #[[ATTR4:[0-9]+]] { ; IS________NPM-SAME: (i32 [[A:%.*]], i32 [[B:%.*]], i32 [[C:%.*]], i32* nocapture nofree writeonly [[PTR:%.*]]) #[[ATTR4:[0-9]+]] {
; IS________NPM-NEXT: entry: ; IS________NPM-NEXT: entry:
▲ Show 20 Lines • Show All 82 Lines • ▼ Show 20 Lines
declare void @unknown() declare void @unknown()
define void @nonnull_assume_pos(i8* %arg1, i8* %arg2, i8* %arg3, i8* %arg4) { define void @nonnull_assume_pos(i8* %arg1, i8* %arg2, i8* %arg3, i8* %arg4) {
; ATTRIBUTOR-LABEL: define {{[^@]+}}@nonnull_assume_pos ; ATTRIBUTOR-LABEL: define {{[^@]+}}@nonnull_assume_pos
; ATTRIBUTOR-SAME: (i8* nocapture nofree nonnull readnone dereferenceable(101) [[ARG1:%.*]], i8* nocapture nofree readnone dereferenceable_or_null(31) [[ARG2:%.*]], i8* nocapture nofree nonnull readnone [[ARG3:%.*]], i8* nocapture nofree readnone dereferenceable_or_null(42) [[ARG4:%.*]]) ; ATTRIBUTOR-SAME: (i8* nocapture nofree nonnull readnone dereferenceable(101) [[ARG1:%.*]], i8* nocapture nofree readnone dereferenceable_or_null(31) [[ARG2:%.*]], i8* nocapture nofree nonnull readnone [[ARG3:%.*]], i8* nocapture nofree readnone dereferenceable_or_null(42) [[ARG4:%.*]])
; ATTRIBUTOR-NEXT: call void @llvm.assume(i1 true) #6 [ "nonnull"(i8* undef), "dereferenceable"(i8* undef, i64 1), "dereferenceable"(i8* undef, i64 2), "dereferenceable"(i8* undef, i64 101), "dereferenceable_or_null"(i8* undef, i64 31), "dereferenceable_or_null"(i8* undef, i64 42) ] ; ATTRIBUTOR-NEXT: call void @llvm.assume(i1 true) #6 [ "nonnull"(i8* undef), "dereferenceable"(i8* undef, i64 1), "dereferenceable"(i8* undef, i64 2), "dereferenceable"(i8* undef, i64 101), "dereferenceable_or_null"(i8* undef, i64 31), "dereferenceable_or_null"(i8* undef, i64 42) ]
; ATTRIBUTOR-NEXT: call void @unknown() ; ATTRIBUTOR-NEXT: call void @unknown()
; ATTRIBUTOR-NEXT: ret void ; ATTRIBUTOR-NEXT: ret void
; ;
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@nonnull_assume_pos ; NOT_CGSCC_OPM-LABEL: define {{[^@]+}}@nonnull_assume_pos
; IS__TUNIT_OPM-SAME: (i8* nocapture nofree nonnull readnone dereferenceable(101) [[ARG1:%.*]], i8* nocapture nofree readnone dereferenceable_or_null(31) [[ARG2:%.*]], i8* nocapture nofree nonnull readnone [[ARG3:%.*]], i8* nocapture nofree readnone dereferenceable_or_null(42) [[ARG4:%.*]]) { ; NOT_CGSCC_OPM-SAME: (i8* nocapture nofree nonnull readnone dereferenceable(101) [[ARG1:%.*]], i8* nocapture nofree readnone dereferenceable_or_null(31) [[ARG2:%.*]], i8* nocapture nofree nonnull readnone [[ARG3:%.*]], i8* nocapture nofree readnone dereferenceable_or_null(42) [[ARG4:%.*]]) {
; IS__TUNIT_OPM-NEXT: call void @llvm.assume(i1 noundef true) #[[ATTR7:[0-9]+]] [ "nonnull"(i8* [[ARG3]]), "dereferenceable"(i8* [[ARG1]], i64 1), "dereferenceable"(i8* [[ARG1]], i64 2), "dereferenceable"(i8* [[ARG1]], i64 101), "dereferenceable_or_null"(i8* [[ARG2]], i64 31), "dereferenceable_or_null"(i8* [[ARG4]], i64 42) ] ; NOT_CGSCC_OPM-NEXT: call void @llvm.assume(i1 noundef true) #[[ATTR8:[0-9]+]] [ "nonnull"(i8* [[ARG3]]), "dereferenceable"(i8* [[ARG1]], i64 1), "dereferenceable"(i8* [[ARG1]], i64 2), "dereferenceable"(i8* [[ARG1]], i64 101), "dereferenceable_or_null"(i8* [[ARG2]], i64 31), "dereferenceable_or_null"(i8* [[ARG4]], i64 42) ]
; IS__TUNIT_OPM-NEXT: call void @unknown() ; NOT_CGSCC_OPM-NEXT: call void @unknown()
; IS__TUNIT_OPM-NEXT: ret void ; NOT_CGSCC_OPM-NEXT: ret void
;
; IS________NPM-LABEL: define {{[^@]+}}@nonnull_assume_pos
; IS________NPM-SAME: (i8* nocapture nofree nonnull readnone dereferenceable(101) [[ARG1:%.*]], i8* nocapture nofree readnone dereferenceable_or_null(31) [[ARG2:%.*]], i8* nocapture nofree nonnull readnone [[ARG3:%.*]], i8* nocapture nofree readnone dereferenceable_or_null(42) [[ARG4:%.*]]) {
; IS________NPM-NEXT: call void @llvm.assume(i1 noundef true) #[[ATTR8:[0-9]+]] [ "nonnull"(i8* [[ARG3]]), "dereferenceable"(i8* [[ARG1]], i64 1), "dereferenceable"(i8* [[ARG1]], i64 2), "dereferenceable"(i8* [[ARG1]], i64 101), "dereferenceable_or_null"(i8* [[ARG2]], i64 31), "dereferenceable_or_null"(i8* [[ARG4]], i64 42) ]
; IS________NPM-NEXT: call void @unknown()
; IS________NPM-NEXT: ret void
; ;
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@nonnull_assume_pos ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@nonnull_assume_pos
; IS__CGSCC_OPM-SAME: (i8* nocapture nofree nonnull readnone dereferenceable(101) [[ARG1:%.*]], i8* nocapture nofree readnone dereferenceable_or_null(31) [[ARG2:%.*]], i8* nocapture nofree nonnull readnone [[ARG3:%.*]], i8* nocapture nofree readnone dereferenceable_or_null(42) [[ARG4:%.*]]) { ; IS__CGSCC_OPM-SAME: (i8* nocapture nofree nonnull readnone dereferenceable(101) [[ARG1:%.*]], i8* nocapture nofree readnone dereferenceable_or_null(31) [[ARG2:%.*]], i8* nocapture nofree nonnull readnone [[ARG3:%.*]], i8* nocapture nofree readnone dereferenceable_or_null(42) [[ARG4:%.*]]) {
; IS__CGSCC_OPM-NEXT: call void @llvm.assume(i1 noundef true) #[[ATTR9:[0-9]+]] [ "nonnull"(i8* [[ARG3]]), "dereferenceable"(i8* [[ARG1]], i64 1), "dereferenceable"(i8* [[ARG1]], i64 2), "dereferenceable"(i8* [[ARG1]], i64 101), "dereferenceable_or_null"(i8* [[ARG2]], i64 31), "dereferenceable_or_null"(i8* [[ARG4]], i64 42) ] ; IS__CGSCC_OPM-NEXT: call void @llvm.assume(i1 noundef true) #[[ATTR9:[0-9]+]] [ "nonnull"(i8* [[ARG3]]), "dereferenceable"(i8* [[ARG1]], i64 1), "dereferenceable"(i8* [[ARG1]], i64 2), "dereferenceable"(i8* [[ARG1]], i64 101), "dereferenceable_or_null"(i8* [[ARG2]], i64 31), "dereferenceable_or_null"(i8* [[ARG4]], i64 42) ]
; IS__CGSCC_OPM-NEXT: call void @unknown() ; IS__CGSCC_OPM-NEXT: call void @unknown()
; IS__CGSCC_OPM-NEXT: ret void ; IS__CGSCC_OPM-NEXT: ret void
; ;
call void @llvm.assume(i1 true) [ "nonnull"(i8* %arg3), "dereferenceable"(i8* %arg1, i64 1), "dereferenceable"(i8* %arg1, i64 2), "dereferenceable"(i8* %arg1, i64 101), "dereferenceable_or_null"(i8* %arg2, i64 31), "dereferenceable_or_null"(i8* %arg4, i64 42)] call void @llvm.assume(i1 true) [ "nonnull"(i8* %arg3), "dereferenceable"(i8* %arg1, i64 1), "dereferenceable"(i8* %arg1, i64 2), "dereferenceable"(i8* %arg1, i64 101), "dereferenceable_or_null"(i8* %arg2, i64 31), "dereferenceable_or_null"(i8* %arg4, i64 42)]
Show All 31 Lines
; ATTRIBUTOR-NEXT: call void @unknown_use8(i8* nonnull dereferenceable(2) [[ARG1]]) ; ATTRIBUTOR-NEXT: call void @unknown_use8(i8* nonnull dereferenceable(2) [[ARG1]])
; ATTRIBUTOR-NEXT: call void @unknown_use8(i8* nonnull dereferenceable(31) [[ARG2]]) ; ATTRIBUTOR-NEXT: call void @unknown_use8(i8* nonnull dereferenceable(31) [[ARG2]])
; ATTRIBUTOR-NEXT: call void @unknown_use8(i8* nonnull [[ARG3]]) ; ATTRIBUTOR-NEXT: call void @unknown_use8(i8* nonnull [[ARG3]])
; ATTRIBUTOR-NEXT: call void @unknown_use8(i8* nonnull dereferenceable(42) [[ARG4]]) ; ATTRIBUTOR-NEXT: call void @unknown_use8(i8* nonnull dereferenceable(42) [[ARG4]])
; ATTRIBUTOR-NEXT: call void @unknown_use32(i32* nonnull dereferenceable(101) [[P]]) ; ATTRIBUTOR-NEXT: call void @unknown_use32(i32* nonnull dereferenceable(101) [[P]])
; ATTRIBUTOR-NEXT: call void @unknown() ; ATTRIBUTOR-NEXT: call void @unknown()
; ATTRIBUTOR-NEXT: ret void ; ATTRIBUTOR-NEXT: ret void
; ;
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@nonnull_assume_call ; NOT_CGSCC_OPM-LABEL: define {{[^@]+}}@nonnull_assume_call
; IS__TUNIT_OPM-SAME: (i8* [[ARG1:%.*]], i8* [[ARG2:%.*]], i8* [[ARG3:%.*]], i8* [[ARG4:%.*]]) { ; NOT_CGSCC_OPM-SAME: (i8* [[ARG1:%.*]], i8* [[ARG2:%.*]], i8* [[ARG3:%.*]], i8* [[ARG4:%.*]]) {
; IS__TUNIT_OPM-NEXT: call void @unknown() ; NOT_CGSCC_OPM-NEXT: call void @unknown()
; IS__TUNIT_OPM-NEXT: [[P:%.*]] = call nonnull dereferenceable(101) i32* @unkown_ptr() #[[ATTR8:[0-9]+]] ; NOT_CGSCC_OPM-NEXT: [[P:%.*]] = call nonnull dereferenceable(101) i32* @unkown_ptr() #[[ATTR9:[0-9]+]]
; IS__TUNIT_OPM-NEXT: call void @unknown_use32(i32* nonnull dereferenceable(101) [[P]]) #[[ATTR8]] ; NOT_CGSCC_OPM-NEXT: call void @unknown_use32(i32* nonnull dereferenceable(101) [[P]]) #[[ATTR9]]
; IS__TUNIT_OPM-NEXT: call void @unknown_use8(i8* dereferenceable_or_null(42) [[ARG4]]) #[[ATTR8]] ; NOT_CGSCC_OPM-NEXT: call void @unknown_use8(i8* dereferenceable_or_null(42) [[ARG4]]) #[[ATTR9]]
; IS__TUNIT_OPM-NEXT: call void @unknown_use8(i8* nonnull [[ARG3]]) #[[ATTR8]] ; NOT_CGSCC_OPM-NEXT: call void @unknown_use8(i8* nonnull [[ARG3]]) #[[ATTR9]]
; IS__TUNIT_OPM-NEXT: call void @unknown_use8(i8* dereferenceable_or_null(31) [[ARG2]]) #[[ATTR8]] ; NOT_CGSCC_OPM-NEXT: call void @unknown_use8(i8* dereferenceable_or_null(31) [[ARG2]]) #[[ATTR9]]
; IS__TUNIT_OPM-NEXT: call void @unknown_use8(i8* nonnull dereferenceable(2) [[ARG1]]) #[[ATTR8]] ; NOT_CGSCC_OPM-NEXT: call void @unknown_use8(i8* nonnull dereferenceable(2) [[ARG1]]) #[[ATTR9]]
; IS__TUNIT_OPM-NEXT: call void @llvm.assume(i1 noundef true) [ "nonnull"(i8* [[ARG3]]), "dereferenceable"(i8* [[ARG1]], i64 1), "dereferenceable"(i8* [[ARG1]], i64 2), "dereferenceable"(i32* [[P]], i64 101), "dereferenceable_or_null"(i8* [[ARG2]], i64 31), "dereferenceable_or_null"(i8* [[ARG4]], i64 42) ] ; NOT_CGSCC_OPM-NEXT: call void @llvm.assume(i1 noundef true) [ "nonnull"(i8* [[ARG3]]), "dereferenceable"(i8* [[ARG1]], i64 1), "dereferenceable"(i8* [[ARG1]], i64 2), "dereferenceable"(i32* [[P]], i64 101), "dereferenceable_or_null"(i8* [[ARG2]], i64 31), "dereferenceable_or_null"(i8* [[ARG4]], i64 42) ]
; IS__TUNIT_OPM-NEXT: call void @unknown_use8(i8* nonnull dereferenceable(2) [[ARG1]]) #[[ATTR8]] ; NOT_CGSCC_OPM-NEXT: call void @unknown_use8(i8* nonnull dereferenceable(2) [[ARG1]]) #[[ATTR9]]
; IS__TUNIT_OPM-NEXT: call void @unknown_use8(i8* dereferenceable_or_null(31) [[ARG2]]) #[[ATTR8]] ; NOT_CGSCC_OPM-NEXT: call void @unknown_use8(i8* dereferenceable_or_null(31) [[ARG2]]) #[[ATTR9]]
; IS__TUNIT_OPM-NEXT: call void @unknown_use8(i8* nonnull [[ARG3]]) #[[ATTR8]] ; NOT_CGSCC_OPM-NEXT: call void @unknown_use8(i8* nonnull [[ARG3]]) #[[ATTR9]]
; IS__TUNIT_OPM-NEXT: call void @unknown_use8(i8* dereferenceable_or_null(42) [[ARG4]]) #[[ATTR8]] ; NOT_CGSCC_OPM-NEXT: call void @unknown_use8(i8* dereferenceable_or_null(42) [[ARG4]]) #[[ATTR9]]
; IS__TUNIT_OPM-NEXT: call void @unknown_use32(i32* nonnull dereferenceable(101) [[P]]) #[[ATTR8]] ; NOT_CGSCC_OPM-NEXT: call void @unknown_use32(i32* nonnull dereferenceable(101) [[P]]) #[[ATTR9]]
; IS__TUNIT_OPM-NEXT: call void @unknown() ; NOT_CGSCC_OPM-NEXT: call void @unknown()
; IS__TUNIT_OPM-NEXT: ret void ; NOT_CGSCC_OPM-NEXT: ret void
;
; IS________NPM-LABEL: define {{[^@]+}}@nonnull_assume_call
; IS________NPM-SAME: (i8* [[ARG1:%.*]], i8* [[ARG2:%.*]], i8* [[ARG3:%.*]], i8* [[ARG4:%.*]]) {
; IS________NPM-NEXT: call void @unknown()
; IS________NPM-NEXT: [[P:%.*]] = call nonnull dereferenceable(101) i32* @unkown_ptr() #[[ATTR9:[0-9]+]]
; IS________NPM-NEXT: call void @unknown_use32(i32* nonnull dereferenceable(101) [[P]]) #[[ATTR9]]
; IS________NPM-NEXT: call void @unknown_use8(i8* dereferenceable_or_null(42) [[ARG4]]) #[[ATTR9]]
; IS________NPM-NEXT: call void @unknown_use8(i8* nonnull [[ARG3]]) #[[ATTR9]]
; IS________NPM-NEXT: call void @unknown_use8(i8* dereferenceable_or_null(31) [[ARG2]]) #[[ATTR9]]
; IS________NPM-NEXT: call void @unknown_use8(i8* nonnull dereferenceable(2) [[ARG1]]) #[[ATTR9]]
; IS________NPM-NEXT: call void @llvm.assume(i1 noundef true) [ "nonnull"(i8* [[ARG3]]), "dereferenceable"(i8* [[ARG1]], i64 1), "dereferenceable"(i8* [[ARG1]], i64 2), "dereferenceable"(i32* [[P]], i64 101), "dereferenceable_or_null"(i8* [[ARG2]], i64 31), "dereferenceable_or_null"(i8* [[ARG4]], i64 42) ]
; IS________NPM-NEXT: call void @unknown_use8(i8* nonnull dereferenceable(2) [[ARG1]]) #[[ATTR9]]
; IS________NPM-NEXT: call void @unknown_use8(i8* dereferenceable_or_null(31) [[ARG2]]) #[[ATTR9]]
; IS________NPM-NEXT: call void @unknown_use8(i8* nonnull [[ARG3]]) #[[ATTR9]]
; IS________NPM-NEXT: call void @unknown_use8(i8* dereferenceable_or_null(42) [[ARG4]]) #[[ATTR9]]
; IS________NPM-NEXT: call void @unknown_use32(i32* nonnull dereferenceable(101) [[P]]) #[[ATTR9]]
; IS________NPM-NEXT: call void @unknown()
; IS________NPM-NEXT: ret void
; ;
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@nonnull_assume_call ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@nonnull_assume_call
; IS__CGSCC_OPM-SAME: (i8* [[ARG1:%.*]], i8* [[ARG2:%.*]], i8* [[ARG3:%.*]], i8* [[ARG4:%.*]]) { ; IS__CGSCC_OPM-SAME: (i8* [[ARG1:%.*]], i8* [[ARG2:%.*]], i8* [[ARG3:%.*]], i8* [[ARG4:%.*]]) {
; IS__CGSCC_OPM-NEXT: call void @unknown() ; IS__CGSCC_OPM-NEXT: call void @unknown()
; IS__CGSCC_OPM-NEXT: [[P:%.*]] = call nonnull dereferenceable(101) i32* @unkown_ptr() #[[ATTR10:[0-9]+]] ; IS__CGSCC_OPM-NEXT: [[P:%.*]] = call nonnull dereferenceable(101) i32* @unkown_ptr() #[[ATTR10:[0-9]+]]
; IS__CGSCC_OPM-NEXT: call void @unknown_use32(i32* nonnull dereferenceable(101) [[P]]) #[[ATTR10]] ; IS__CGSCC_OPM-NEXT: call void @unknown_use32(i32* nonnull dereferenceable(101) [[P]]) #[[ATTR10]]
; IS__CGSCC_OPM-NEXT: call void @unknown_use8(i8* dereferenceable_or_null(42) [[ARG4]]) #[[ATTR10]] ; IS__CGSCC_OPM-NEXT: call void @unknown_use8(i8* dereferenceable_or_null(42) [[ARG4]]) #[[ATTR10]]
; IS__CGSCC_OPM-NEXT: call void @unknown_use8(i8* nonnull [[ARG3]]) #[[ATTR10]] ; IS__CGSCC_OPM-NEXT: call void @unknown_use8(i8* nonnull [[ARG3]]) #[[ATTR10]]
Show All 26 Lines
} }
declare void @unknown_use8(i8*) willreturn nounwind declare void @unknown_use8(i8*) willreturn nounwind
declare void @unknown_use32(i32*) willreturn nounwind declare void @unknown_use32(i32*) willreturn nounwind
declare void @llvm.assume(i1) declare void @llvm.assume(i1)
!0 = !{i64 10, i64 100} !0 = !{i64 10, i64 100}
;. ;.
; IS__TUNIT_OPM: attributes #[[ATTR0]] = { nofree nosync nounwind readnone willreturn } ; IS__TUNIT_OPM: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__TUNIT_OPM: attributes #[[ATTR1]] = { nounwind willreturn } ; IS__TUNIT_OPM: attributes #[[ATTR1]] = { nounwind willreturn }
; IS__TUNIT_OPM: attributes #[[ATTR2]] = { argmemonly nofree nosync nounwind willreturn writeonly } ; IS__TUNIT_OPM: attributes #[[ATTR2]] = { argmemonly nofree norecurse nosync nounwind willreturn writeonly }
; IS__TUNIT_OPM: attributes #[[ATTR3]] = { argmemonly nofree nosync nounwind writeonly } ; IS__TUNIT_OPM: attributes #[[ATTR3]] = { argmemonly nofree norecurse nosync nounwind writeonly }
; IS__TUNIT_OPM: attributes #[[ATTR4]] = { argmemonly nofree nosync nounwind } ; IS__TUNIT_OPM: attributes #[[ATTR4]] = { argmemonly nofree norecurse nosync nounwind }
; IS__TUNIT_OPM: attributes #[[ATTR5:[0-9]+]] = { inaccessiblememonly nofree nosync nounwind willreturn } ; IS__TUNIT_OPM: attributes #[[ATTR5]] = { argmemonly nofree nosync nounwind writeonly }
; IS__TUNIT_OPM: attributes #[[ATTR6]] = { nofree nosync nounwind writeonly } ; IS__TUNIT_OPM: attributes #[[ATTR6:[0-9]+]] = { inaccessiblememonly nofree nosync nounwind willreturn }
; IS__TUNIT_OPM: attributes #[[ATTR7]] = { willreturn } ; IS__TUNIT_OPM: attributes #[[ATTR7]] = { nofree nosync nounwind writeonly }
; IS__TUNIT_OPM: attributes #[[ATTR8]] = { nounwind } ; IS__TUNIT_OPM: attributes #[[ATTR8]] = { willreturn }
; IS__TUNIT_OPM: attributes #[[ATTR9]] = { nounwind }
;. ;.
; IS__TUNIT_NPM: attributes #[[ATTR0]] = { nofree nosync nounwind readnone willreturn } ; IS__TUNIT_NPM: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__TUNIT_NPM: attributes #[[ATTR1]] = { nounwind willreturn } ; IS__TUNIT_NPM: attributes #[[ATTR1]] = { nounwind willreturn }
; IS__TUNIT_NPM: attributes #[[ATTR2]] = { argmemonly nofree nosync nounwind willreturn writeonly } ; IS__TUNIT_NPM: attributes #[[ATTR2]] = { argmemonly nofree norecurse nosync nounwind willreturn writeonly }
; IS__TUNIT_NPM: attributes #[[ATTR3]] = { argmemonly nofree nosync nounwind willreturn } ; IS__TUNIT_NPM: attributes #[[ATTR3]] = { argmemonly nofree norecurse nosync nounwind willreturn }
; IS__TUNIT_NPM: attributes #[[ATTR4]] = { argmemonly nofree nosync nounwind writeonly } ; IS__TUNIT_NPM: attributes #[[ATTR4]] = { argmemonly nofree nosync nounwind writeonly }
; IS__TUNIT_NPM: attributes #[[ATTR5:[0-9]+]] = { inaccessiblememonly nofree nosync nounwind willreturn } ; IS__TUNIT_NPM: attributes #[[ATTR5:[0-9]+]] = { inaccessiblememonly nofree nosync nounwind willreturn }
; IS__TUNIT_NPM: attributes #[[ATTR6]] = { nofree nosync nounwind willreturn writeonly } ; IS__TUNIT_NPM: attributes #[[ATTR6]] = { nofree nosync nounwind willreturn writeonly }
; IS__TUNIT_NPM: attributes #[[ATTR7]] = { nofree nosync nounwind writeonly } ; IS__TUNIT_NPM: attributes #[[ATTR7]] = { nofree nosync nounwind writeonly }
; IS__TUNIT_NPM: attributes #[[ATTR8]] = { willreturn } ; IS__TUNIT_NPM: attributes #[[ATTR8]] = { willreturn }
; IS__TUNIT_NPM: attributes #[[ATTR9]] = { nounwind } ; IS__TUNIT_NPM: attributes #[[ATTR9]] = { nounwind }
;. ;.
; IS__CGSCC_OPM: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn } ; IS__CGSCC_OPM: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn }
Show All 24 Lines

llvm/test/Transforms/Attributor/dereferenceable-2-inseltpoison.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals
; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM ; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM
; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM ; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM
; Determine dereference-ability before unused loads get deleted: ; Determine dereference-ability before unused loads get deleted:
; https://bugs.llvm.org/show_bug.cgi?id=21780 ; https://bugs.llvm.org/show_bug.cgi?id=21780
define <4 x double> @PR21780(double* %ptr) { define <4 x double> @PR21780(double* %ptr) {
; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind readonly willreturn ; CHECK: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@PR21780 ; CHECK-LABEL: define {{[^@]+}}@PR21780
; IS__TUNIT____-SAME: (double* nocapture nofree noundef nonnull readonly align 8 dereferenceable(32) [[PTR:%.*]]) #[[ATTR0:[0-9]+]] { ; CHECK-SAME: (double* nocapture nofree noundef nonnull readonly align 8 dereferenceable(32) [[PTR:%.*]]) #[[ATTR0:[0-9]+]] {
; IS__TUNIT____-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds double, double* [[PTR]], i64 1 ; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds double, double* [[PTR]], i64 1
; IS__TUNIT____-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds double, double* [[PTR]], i64 2 ; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds double, double* [[PTR]], i64 2
; IS__TUNIT____-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds double, double* [[PTR]], i64 3 ; CHECK-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds double, double* [[PTR]], i64 3
; IS__TUNIT____-NEXT: [[T0:%.*]] = load double, double* [[PTR]], align 8 ; CHECK-NEXT: [[T0:%.*]] = load double, double* [[PTR]], align 8
; IS__TUNIT____-NEXT: [[T1:%.*]] = load double, double* [[ARRAYIDX1]], align 8 ; CHECK-NEXT: [[T1:%.*]] = load double, double* [[ARRAYIDX1]], align 8
; IS__TUNIT____-NEXT: [[T2:%.*]] = load double, double* [[ARRAYIDX2]], align 8 ; CHECK-NEXT: [[T2:%.*]] = load double, double* [[ARRAYIDX2]], align 8
; IS__TUNIT____-NEXT: [[T3:%.*]] = load double, double* [[ARRAYIDX3]], align 8 ; CHECK-NEXT: [[T3:%.*]] = load double, double* [[ARRAYIDX3]], align 8
; IS__TUNIT____-NEXT: [[VECINIT0:%.*]] = insertelement <4 x double> poison, double [[T0]], i32 0 ; CHECK-NEXT: [[VECINIT0:%.*]] = insertelement <4 x double> poison, double [[T0]], i32 0
; IS__TUNIT____-NEXT: [[VECINIT1:%.*]] = insertelement <4 x double> [[VECINIT0]], double [[T1]], i32 1 ; CHECK-NEXT: [[VECINIT1:%.*]] = insertelement <4 x double> [[VECINIT0]], double [[T1]], i32 1
; IS__TUNIT____-NEXT: [[VECINIT2:%.*]] = insertelement <4 x double> [[VECINIT1]], double [[T2]], i32 2 ; CHECK-NEXT: [[VECINIT2:%.*]] = insertelement <4 x double> [[VECINIT1]], double [[T2]], i32 2
; IS__TUNIT____-NEXT: [[VECINIT3:%.*]] = insertelement <4 x double> [[VECINIT2]], double [[T3]], i32 3 ; CHECK-NEXT: [[VECINIT3:%.*]] = insertelement <4 x double> [[VECINIT2]], double [[T3]], i32 3
; IS__TUNIT____-NEXT: [[SHUFFLE:%.*]] = shufflevector <4 x double> [[VECINIT3]], <4 x double> [[VECINIT3]], <4 x i32> <i32 0, i32 0, i32 2, i32 2> ; CHECK-NEXT: [[SHUFFLE:%.*]] = shufflevector <4 x double> [[VECINIT3]], <4 x double> [[VECINIT3]], <4 x i32> <i32 0, i32 0, i32 2, i32 2>
; IS__TUNIT____-NEXT: ret <4 x double> [[SHUFFLE]] ; CHECK-NEXT: ret <4 x double> [[SHUFFLE]]
;
; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@PR21780
; IS__CGSCC____-SAME: (double* nocapture nofree noundef nonnull readonly align 8 dereferenceable(32) [[PTR:%.*]]) #[[ATTR0:[0-9]+]] {
; IS__CGSCC____-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds double, double* [[PTR]], i64 1
; IS__CGSCC____-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds double, double* [[PTR]], i64 2
; IS__CGSCC____-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds double, double* [[PTR]], i64 3
; IS__CGSCC____-NEXT: [[T0:%.*]] = load double, double* [[PTR]], align 8
; IS__CGSCC____-NEXT: [[T1:%.*]] = load double, double* [[ARRAYIDX1]], align 8
; IS__CGSCC____-NEXT: [[T2:%.*]] = load double, double* [[ARRAYIDX2]], align 8
; IS__CGSCC____-NEXT: [[T3:%.*]] = load double, double* [[ARRAYIDX3]], align 8
; IS__CGSCC____-NEXT: [[VECINIT0:%.*]] = insertelement <4 x double> poison, double [[T0]], i32 0
; IS__CGSCC____-NEXT: [[VECINIT1:%.*]] = insertelement <4 x double> [[VECINIT0]], double [[T1]], i32 1
; IS__CGSCC____-NEXT: [[VECINIT2:%.*]] = insertelement <4 x double> [[VECINIT1]], double [[T2]], i32 2
; IS__CGSCC____-NEXT: [[VECINIT3:%.*]] = insertelement <4 x double> [[VECINIT2]], double [[T3]], i32 3
; IS__CGSCC____-NEXT: [[SHUFFLE:%.*]] = shufflevector <4 x double> [[VECINIT3]], <4 x double> [[VECINIT3]], <4 x i32> <i32 0, i32 0, i32 2, i32 2>
; IS__CGSCC____-NEXT: ret <4 x double> [[SHUFFLE]]
; ;
; GEP of index 0 is simplified away. ; GEP of index 0 is simplified away.
%arrayidx1 = getelementptr inbounds double, double* %ptr, i64 1 %arrayidx1 = getelementptr inbounds double, double* %ptr, i64 1
%arrayidx2 = getelementptr inbounds double, double* %ptr, i64 2 %arrayidx2 = getelementptr inbounds double, double* %ptr, i64 2
%arrayidx3 = getelementptr inbounds double, double* %ptr, i64 3 %arrayidx3 = getelementptr inbounds double, double* %ptr, i64 3
%t0 = load double, double* %ptr, align 8 %t0 = load double, double* %ptr, align 8
%t1 = load double, double* %arrayidx1, align 8 %t1 = load double, double* %arrayidx1, align 8
%t2 = load double, double* %arrayidx2, align 8 %t2 = load double, double* %arrayidx2, align 8
%t3 = load double, double* %arrayidx3, align 8 %t3 = load double, double* %arrayidx3, align 8
%vecinit0 = insertelement <4 x double> poison, double %t0, i32 0 %vecinit0 = insertelement <4 x double> poison, double %t0, i32 0
%vecinit1 = insertelement <4 x double> %vecinit0, double %t1, i32 1 %vecinit1 = insertelement <4 x double> %vecinit0, double %t1, i32 1
%vecinit2 = insertelement <4 x double> %vecinit1, double %t2, i32 2 %vecinit2 = insertelement <4 x double> %vecinit1, double %t2, i32 2
%vecinit3 = insertelement <4 x double> %vecinit2, double %t3, i32 3 %vecinit3 = insertelement <4 x double> %vecinit2, double %t3, i32 3
%shuffle = shufflevector <4 x double> %vecinit3, <4 x double> %vecinit3, <4 x i32> <i32 0, i32 0, i32 2, i32 2> %shuffle = shufflevector <4 x double> %vecinit3, <4 x double> %vecinit3, <4 x i32> <i32 0, i32 0, i32 2, i32 2>
ret <4 x double> %shuffle ret <4 x double> %shuffle
} }
define double @PR21780_only_access3_with_inbounds(double* %ptr) { define double @PR21780_only_access3_with_inbounds(double* %ptr) {
; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind readonly willreturn ; CHECK: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@PR21780_only_access3_with_inbounds ; CHECK-LABEL: define {{[^@]+}}@PR21780_only_access3_with_inbounds
; IS__TUNIT____-SAME: (double* nocapture nofree nonnull readonly align 8 dereferenceable(32) [[PTR:%.*]]) #[[ATTR0]] { ; CHECK-SAME: (double* nocapture nofree nonnull readonly align 8 dereferenceable(32) [[PTR:%.*]]) #[[ATTR0]] {
; IS__TUNIT____-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds double, double* [[PTR]], i64 3 ; CHECK-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds double, double* [[PTR]], i64 3
; IS__TUNIT____-NEXT: [[T3:%.*]] = load double, double* [[ARRAYIDX3]], align 8 ; CHECK-NEXT: [[T3:%.*]] = load double, double* [[ARRAYIDX3]], align 8
; IS__TUNIT____-NEXT: ret double [[T3]] ; CHECK-NEXT: ret double [[T3]]
;
; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@PR21780_only_access3_with_inbounds
; IS__CGSCC____-SAME: (double* nocapture nofree nonnull readonly align 8 dereferenceable(32) [[PTR:%.*]]) #[[ATTR0]] {
; IS__CGSCC____-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds double, double* [[PTR]], i64 3
; IS__CGSCC____-NEXT: [[T3:%.*]] = load double, double* [[ARRAYIDX3]], align 8
; IS__CGSCC____-NEXT: ret double [[T3]]
; ;
%arrayidx3 = getelementptr inbounds double, double* %ptr, i64 3 %arrayidx3 = getelementptr inbounds double, double* %ptr, i64 3
%t3 = load double, double* %arrayidx3, align 8 %t3 = load double, double* %arrayidx3, align 8
ret double %t3 ret double %t3
} }
define double @PR21780_only_access3_without_inbounds(double* %ptr) { define double @PR21780_only_access3_without_inbounds(double* %ptr) {
; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind readonly willreturn ; CHECK: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@PR21780_only_access3_without_inbounds ; CHECK-LABEL: define {{[^@]+}}@PR21780_only_access3_without_inbounds
; IS__TUNIT____-SAME: (double* nocapture nofree readonly align 8 [[PTR:%.*]]) #[[ATTR0]] { ; CHECK-SAME: (double* nocapture nofree readonly align 8 [[PTR:%.*]]) #[[ATTR0]] {
; IS__TUNIT____-NEXT: [[ARRAYIDX3:%.*]] = getelementptr double, double* [[PTR]], i64 3 ; CHECK-NEXT: [[ARRAYIDX3:%.*]] = getelementptr double, double* [[PTR]], i64 3
; IS__TUNIT____-NEXT: [[T3:%.*]] = load double, double* [[ARRAYIDX3]], align 8 ; CHECK-NEXT: [[T3:%.*]] = load double, double* [[ARRAYIDX3]], align 8
; IS__TUNIT____-NEXT: ret double [[T3]] ; CHECK-NEXT: ret double [[T3]]
;
; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@PR21780_only_access3_without_inbounds
; IS__CGSCC____-SAME: (double* nocapture nofree readonly align 8 [[PTR:%.*]]) #[[ATTR0]] {
; IS__CGSCC____-NEXT: [[ARRAYIDX3:%.*]] = getelementptr double, double* [[PTR]], i64 3
; IS__CGSCC____-NEXT: [[T3:%.*]] = load double, double* [[ARRAYIDX3]], align 8
; IS__CGSCC____-NEXT: ret double [[T3]]
; ;
%arrayidx3 = getelementptr double, double* %ptr, i64 3 %arrayidx3 = getelementptr double, double* %ptr, i64 3
%t3 = load double, double* %arrayidx3, align 8 %t3 = load double, double* %arrayidx3, align 8
ret double %t3 ret double %t3
} }
define double @PR21780_without_inbounds(double* %ptr) { define double @PR21780_without_inbounds(double* %ptr) {
; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind readonly willreturn ; CHECK: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@PR21780_without_inbounds ; CHECK-LABEL: define {{[^@]+}}@PR21780_without_inbounds
; IS__TUNIT____-SAME: (double* nocapture nofree noundef nonnull readonly align 8 dereferenceable(32) [[PTR:%.*]]) #[[ATTR0]] { ; CHECK-SAME: (double* nocapture nofree noundef nonnull readonly align 8 dereferenceable(32) [[PTR:%.*]]) #[[ATTR0]] {
; IS__TUNIT____-NEXT: [[ARRAYIDX3:%.*]] = getelementptr double, double* [[PTR]], i64 3 ; CHECK-NEXT: [[ARRAYIDX3:%.*]] = getelementptr double, double* [[PTR]], i64 3
; IS__TUNIT____-NEXT: [[T3:%.*]] = load double, double* [[ARRAYIDX3]], align 8 ; CHECK-NEXT: [[T3:%.*]] = load double, double* [[ARRAYIDX3]], align 8
; IS__TUNIT____-NEXT: ret double [[T3]] ; CHECK-NEXT: ret double [[T3]]
;
; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@PR21780_without_inbounds
; IS__CGSCC____-SAME: (double* nocapture nofree noundef nonnull readonly align 8 dereferenceable(32) [[PTR:%.*]]) #[[ATTR0]] {
; IS__CGSCC____-NEXT: [[ARRAYIDX3:%.*]] = getelementptr double, double* [[PTR]], i64 3
; IS__CGSCC____-NEXT: [[T3:%.*]] = load double, double* [[ARRAYIDX3]], align 8
; IS__CGSCC____-NEXT: ret double [[T3]]
; ;
%arrayidx1 = getelementptr double, double* %ptr, i64 1 %arrayidx1 = getelementptr double, double* %ptr, i64 1
%arrayidx2 = getelementptr double, double* %ptr, i64 2 %arrayidx2 = getelementptr double, double* %ptr, i64 2
%arrayidx3 = getelementptr double, double* %ptr, i64 3 %arrayidx3 = getelementptr double, double* %ptr, i64 3
%t0 = load double, double* %ptr, align 8 %t0 = load double, double* %ptr, align 8
%t1 = load double, double* %arrayidx1, align 8 %t1 = load double, double* %arrayidx1, align 8
%t2 = load double, double* %arrayidx2, align 8 %t2 = load double, double* %arrayidx2, align 8
%t3 = load double, double* %arrayidx3, align 8 %t3 = load double, double* %arrayidx3, align 8
ret double %t3 ret double %t3
} }
; Unsimplified, but still valid. Also, throw in some bogus arguments. ; Unsimplified, but still valid. Also, throw in some bogus arguments.
define void @gep0(i8* %unused, i8* %other, i8* %ptr) { define void @gep0(i8* %unused, i8* %other, i8* %ptr) {
; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind willreturn ; CHECK: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@gep0 ; CHECK-LABEL: define {{[^@]+}}@gep0
; IS__TUNIT____-SAME: (i8* nocapture nofree readnone [[UNUSED:%.*]], i8* nocapture nofree noundef nonnull writeonly dereferenceable(1) [[OTHER:%.*]], i8* nocapture nofree nonnull readonly dereferenceable(3) [[PTR:%.*]]) #[[ATTR1:[0-9]+]] { ; CHECK-SAME: (i8* nocapture nofree readnone [[UNUSED:%.*]], i8* nocapture nofree noundef nonnull writeonly dereferenceable(1) [[OTHER:%.*]], i8* nocapture nofree nonnull readonly dereferenceable(3) [[PTR:%.*]]) #[[ATTR1:[0-9]+]] {
; IS__TUNIT____-NEXT: [[ARRAYIDX2:%.*]] = getelementptr i8, i8* [[PTR]], i64 2 ; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr i8, i8* [[PTR]], i64 2
; IS__TUNIT____-NEXT: [[T2:%.*]] = load i8, i8* [[ARRAYIDX2]], align 1 ; CHECK-NEXT: [[T2:%.*]] = load i8, i8* [[ARRAYIDX2]], align 1
; IS__TUNIT____-NEXT: store i8 [[T2]], i8* [[OTHER]], align 1 ; CHECK-NEXT: store i8 [[T2]], i8* [[OTHER]], align 1
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@gep0
; IS__CGSCC____-SAME: (i8* nocapture nofree readnone [[UNUSED:%.*]], i8* nocapture nofree noundef nonnull writeonly dereferenceable(1) [[OTHER:%.*]], i8* nocapture nofree nonnull readonly dereferenceable(3) [[PTR:%.*]]) #[[ATTR1:[0-9]+]] {
; IS__CGSCC____-NEXT: [[ARRAYIDX2:%.*]] = getelementptr i8, i8* [[PTR]], i64 2
; IS__CGSCC____-NEXT: [[T2:%.*]] = load i8, i8* [[ARRAYIDX2]], align 1
; IS__CGSCC____-NEXT: store i8 [[T2]], i8* [[OTHER]], align 1
; IS__CGSCC____-NEXT: ret void
; ;
%arrayidx0 = getelementptr i8, i8* %ptr, i64 0 %arrayidx0 = getelementptr i8, i8* %ptr, i64 0
%arrayidx1 = getelementptr i8, i8* %ptr, i64 1 %arrayidx1 = getelementptr i8, i8* %ptr, i64 1
%arrayidx2 = getelementptr i8, i8* %ptr, i64 2 %arrayidx2 = getelementptr i8, i8* %ptr, i64 2
%t0 = load i8, i8* %arrayidx0 %t0 = load i8, i8* %arrayidx0
%t1 = load i8, i8* %arrayidx1 %t1 = load i8, i8* %arrayidx1
%t2 = load i8, i8* %arrayidx2 %t2 = load i8, i8* %arrayidx2
store i8 %t2, i8* %other store i8 %t2, i8* %other
ret void ret void
} }
; Order of accesses does not change computation. ; Order of accesses does not change computation.
; Multiple arguments may be dereferenceable. ; Multiple arguments may be dereferenceable.
define void @ordering(i8* %ptr1, i32* %ptr2) { define void @ordering(i8* %ptr1, i32* %ptr2) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@ordering ; CHECK-LABEL: define {{[^@]+}}@ordering
; IS__TUNIT____-SAME: (i8* nocapture nofree nonnull readnone dereferenceable(3) [[PTR1:%.*]], i32* nocapture nofree nonnull readnone align 4 dereferenceable(8) [[PTR2:%.*]]) #[[ATTR2:[0-9]+]] { ; CHECK-SAME: (i8* nocapture nofree nonnull readnone dereferenceable(3) [[PTR1:%.*]], i32* nocapture nofree nonnull readnone align 4 dereferenceable(8) [[PTR2:%.*]]) #[[ATTR2:[0-9]+]] {
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@ordering
; IS__CGSCC____-SAME: (i8* nocapture nofree nonnull readnone dereferenceable(3) [[PTR1:%.*]], i32* nocapture nofree nonnull readnone align 4 dereferenceable(8) [[PTR2:%.*]]) #[[ATTR2:[0-9]+]] {
; IS__CGSCC____-NEXT: ret void
; ;
%a20 = getelementptr i32, i32* %ptr2, i64 0 %a20 = getelementptr i32, i32* %ptr2, i64 0
%a12 = getelementptr i8, i8* %ptr1, i64 2 %a12 = getelementptr i8, i8* %ptr1, i64 2
%t12 = load i8, i8* %a12 %t12 = load i8, i8* %a12
%a11 = getelementptr i8, i8* %ptr1, i64 1 %a11 = getelementptr i8, i8* %ptr1, i64 1
%t20 = load i32, i32* %a20 %t20 = load i32, i32* %a20
%a10 = getelementptr i8, i8* %ptr1, i64 0 %a10 = getelementptr i8, i8* %ptr1, i64 0
%t10 = load i8, i8* %a10 %t10 = load i8, i8* %a10
%t11 = load i8, i8* %a11 %t11 = load i8, i8* %a11
%a21 = getelementptr i32, i32* %ptr2, i64 1 %a21 = getelementptr i32, i32* %ptr2, i64 1
%t21 = load i32, i32* %a21 %t21 = load i32, i32* %a21
ret void ret void
} }
; Not in entry block. ; Not in entry block.
define void @not_entry_but_guaranteed_to_execute(i8* %ptr) { define void @not_entry_but_guaranteed_to_execute(i8* %ptr) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@not_entry_but_guaranteed_to_execute ; CHECK-LABEL: define {{[^@]+}}@not_entry_but_guaranteed_to_execute
; IS__TUNIT____-SAME: (i8* nocapture nofree nonnull readnone dereferenceable(3) [[PTR:%.*]]) #[[ATTR2]] { ; CHECK-SAME: (i8* nocapture nofree nonnull readnone dereferenceable(3) [[PTR:%.*]]) #[[ATTR2]] {
; IS__TUNIT____-NEXT: entry: ; CHECK-NEXT: entry:
; IS__TUNIT____-NEXT: br label [[EXIT:%.*]] ; CHECK-NEXT: br label [[EXIT:%.*]]
; IS__TUNIT____: exit: ; CHECK: exit:
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@not_entry_but_guaranteed_to_execute
; IS__CGSCC____-SAME: (i8* nocapture nofree nonnull readnone dereferenceable(3) [[PTR:%.*]]) #[[ATTR2]] {
; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: br label [[EXIT:%.*]]
; IS__CGSCC____: exit:
; IS__CGSCC____-NEXT: ret void
; ;
entry: entry:
br label %exit br label %exit
exit: exit:
%arrayidx0 = getelementptr i8, i8* %ptr, i64 0 %arrayidx0 = getelementptr i8, i8* %ptr, i64 0
%arrayidx1 = getelementptr i8, i8* %ptr, i64 1 %arrayidx1 = getelementptr i8, i8* %ptr, i64 1
%arrayidx2 = getelementptr i8, i8* %ptr, i64 2 %arrayidx2 = getelementptr i8, i8* %ptr, i64 2
%t0 = load i8, i8* %arrayidx0 %t0 = load i8, i8* %arrayidx0
%t1 = load i8, i8* %arrayidx1 %t1 = load i8, i8* %arrayidx1
%t2 = load i8, i8* %arrayidx2 %t2 = load i8, i8* %arrayidx2
ret void ret void
} }
; Not in entry block and not guaranteed to execute. ; Not in entry block and not guaranteed to execute.
define void @not_entry_not_guaranteed_to_execute(i8* %ptr, i1 %cond) { define void @not_entry_not_guaranteed_to_execute(i8* %ptr, i1 %cond) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@not_entry_not_guaranteed_to_execute ; CHECK-LABEL: define {{[^@]+}}@not_entry_not_guaranteed_to_execute
; IS__TUNIT____-SAME: (i8* nocapture nofree readnone [[PTR:%.*]], i1 [[COND:%.*]]) #[[ATTR2]] { ; CHECK-SAME: (i8* nocapture nofree readnone [[PTR:%.*]], i1 [[COND:%.*]]) #[[ATTR2]] {
; IS__TUNIT____-NEXT: entry: ; CHECK-NEXT: entry:
; IS__TUNIT____-NEXT: br i1 [[COND]], label [[LOADS:%.*]], label [[EXIT:%.*]] ; CHECK-NEXT: br i1 [[COND]], label [[LOADS:%.*]], label [[EXIT:%.*]]
; IS__TUNIT____: loads: ; CHECK: loads:
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
; IS__TUNIT____: exit: ; CHECK: exit:
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@not_entry_not_guaranteed_to_execute
; IS__CGSCC____-SAME: (i8* nocapture nofree readnone [[PTR:%.*]], i1 [[COND:%.*]]) #[[ATTR2]] {
; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: br i1 [[COND]], label [[LOADS:%.*]], label [[EXIT:%.*]]
; IS__CGSCC____: loads:
; IS__CGSCC____-NEXT: ret void
; IS__CGSCC____: exit:
; IS__CGSCC____-NEXT: ret void
; ;
entry: entry:
br i1 %cond, label %loads, label %exit br i1 %cond, label %loads, label %exit
loads: loads:
%arrayidx0 = getelementptr i8, i8* %ptr, i64 0 %arrayidx0 = getelementptr i8, i8* %ptr, i64 0
%arrayidx1 = getelementptr i8, i8* %ptr, i64 1 %arrayidx1 = getelementptr i8, i8* %ptr, i64 1
%arrayidx2 = getelementptr i8, i8* %ptr, i64 2 %arrayidx2 = getelementptr i8, i8* %ptr, i64 2
%t0 = load i8, i8* %arrayidx0 %t0 = load i8, i8* %arrayidx0
%t1 = load i8, i8* %arrayidx1 %t1 = load i8, i8* %arrayidx1
%t2 = load i8, i8* %arrayidx2 %t2 = load i8, i8* %arrayidx2
ret void ret void
exit: exit:
ret void ret void
} }
; The last load may not execute, so derefenceable bytes only covers the 1st two loads. ; The last load may not execute, so derefenceable bytes only covers the 1st two loads.
define void @partial_in_entry(i16* %ptr, i1 %cond) { define void @partial_in_entry(i16* %ptr, i1 %cond) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@partial_in_entry ; CHECK-LABEL: define {{[^@]+}}@partial_in_entry
; IS__TUNIT____-SAME: (i16* nocapture nofree nonnull readnone align 2 dereferenceable(4) [[PTR:%.*]], i1 [[COND:%.*]]) #[[ATTR2]] { ; CHECK-SAME: (i16* nocapture nofree nonnull readnone align 2 dereferenceable(4) [[PTR:%.*]], i1 [[COND:%.*]]) #[[ATTR2]] {
; IS__TUNIT____-NEXT: entry: ; CHECK-NEXT: entry:
; IS__TUNIT____-NEXT: br i1 [[COND]], label [[LOADS:%.*]], label [[EXIT:%.*]] ; CHECK-NEXT: br i1 [[COND]], label [[LOADS:%.*]], label [[EXIT:%.*]]
; IS__TUNIT____: loads: ; CHECK: loads:
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
; IS__TUNIT____: exit: ; CHECK: exit:
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@partial_in_entry
; IS__CGSCC____-SAME: (i16* nocapture nofree nonnull readnone align 2 dereferenceable(4) [[PTR:%.*]], i1 [[COND:%.*]]) #[[ATTR2]] {
; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: br i1 [[COND]], label [[LOADS:%.*]], label [[EXIT:%.*]]
; IS__CGSCC____: loads:
; IS__CGSCC____-NEXT: ret void
; IS__CGSCC____: exit:
; IS__CGSCC____-NEXT: ret void
; ;
entry: entry:
%arrayidx0 = getelementptr i16, i16* %ptr, i64 0 %arrayidx0 = getelementptr i16, i16* %ptr, i64 0
%arrayidx1 = getelementptr i16, i16* %ptr, i64 1 %arrayidx1 = getelementptr i16, i16* %ptr, i64 1
%arrayidx2 = getelementptr i16, i16* %ptr, i64 2 %arrayidx2 = getelementptr i16, i16* %ptr, i64 2
%t0 = load i16, i16* %arrayidx0 %t0 = load i16, i16* %arrayidx0
%t1 = load i16, i16* %arrayidx1 %t1 = load i16, i16* %arrayidx1
br i1 %cond, label %loads, label %exit br i1 %cond, label %loads, label %exit
loads: loads:
%t2 = load i16, i16* %arrayidx2 %t2 = load i16, i16* %arrayidx2
ret void ret void
exit: exit:
ret void ret void
} }
; The volatile load can't be used to prove a non-volatile access is allowed. ; The volatile load can't be used to prove a non-volatile access is allowed.
; The 2nd and 3rd loads may never execute. ; The 2nd and 3rd loads may never execute.
define void @volatile_is_not_dereferenceable(i16* %ptr) { define void @volatile_is_not_dereferenceable(i16* %ptr) {
; IS__TUNIT____: Function Attrs: argmemonly nofree nounwind willreturn ; CHECK: Function Attrs: argmemonly nofree norecurse nounwind willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@volatile_is_not_dereferenceable ; CHECK-LABEL: define {{[^@]+}}@volatile_is_not_dereferenceable
; IS__TUNIT____-SAME: (i16* nofree align 2 [[PTR:%.*]]) #[[ATTR3:[0-9]+]] { ; CHECK-SAME: (i16* nofree align 2 [[PTR:%.*]]) #[[ATTR3:[0-9]+]] {
; IS__TUNIT____-NEXT: [[T0:%.*]] = load volatile i16, i16* [[PTR]], align 2 ; CHECK-NEXT: [[T0:%.*]] = load volatile i16, i16* [[PTR]], align 2
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@volatile_is_not_dereferenceable
; IS__CGSCC____-SAME: (i16* nofree align 2 [[PTR:%.*]]) #[[ATTR3:[0-9]+]] {
; IS__CGSCC____-NEXT: [[T0:%.*]] = load volatile i16, i16* [[PTR]], align 2
; IS__CGSCC____-NEXT: ret void
; ;
%arrayidx0 = getelementptr i16, i16* %ptr, i64 0 %arrayidx0 = getelementptr i16, i16* %ptr, i64 0
%arrayidx1 = getelementptr i16, i16* %ptr, i64 1 %arrayidx1 = getelementptr i16, i16* %ptr, i64 1
%arrayidx2 = getelementptr i16, i16* %ptr, i64 2 %arrayidx2 = getelementptr i16, i16* %ptr, i64 2
%t0 = load volatile i16, i16* %arrayidx0 %t0 = load volatile i16, i16* %arrayidx0
%t1 = load i16, i16* %arrayidx1 %t1 = load i16, i16* %arrayidx1
%t2 = load i16, i16* %arrayidx2 %t2 = load i16, i16* %arrayidx2
ret void ret void
} }
; TODO: We should allow inference for atomic (but not volatile) ops. ; TODO: We should allow inference for atomic (but not volatile) ops.
define void @atomic_is_alright(i16* %ptr) { define void @atomic_is_alright(i16* %ptr) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@atomic_is_alright ; CHECK-LABEL: define {{[^@]+}}@atomic_is_alright
; IS__TUNIT____-SAME: (i16* nocapture nofree nonnull readnone align 2 dereferenceable(6) [[PTR:%.*]]) #[[ATTR2]] { ; CHECK-SAME: (i16* nocapture nofree nonnull readnone align 2 dereferenceable(6) [[PTR:%.*]]) #[[ATTR2]] {
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@atomic_is_alright
; IS__CGSCC____-SAME: (i16* nocapture nofree nonnull readnone align 2 dereferenceable(6) [[PTR:%.*]]) #[[ATTR2]] {
; IS__CGSCC____-NEXT: ret void
; ;
%arrayidx0 = getelementptr i16, i16* %ptr, i64 0 %arrayidx0 = getelementptr i16, i16* %ptr, i64 0
%arrayidx1 = getelementptr i16, i16* %ptr, i64 1 %arrayidx1 = getelementptr i16, i16* %ptr, i64 1
%arrayidx2 = getelementptr i16, i16* %ptr, i64 2 %arrayidx2 = getelementptr i16, i16* %ptr, i64 2
%t0 = load atomic i16, i16* %arrayidx0 unordered, align 2 %t0 = load atomic i16, i16* %arrayidx0 unordered, align 2
%t1 = load i16, i16* %arrayidx1 %t1 = load i16, i16* %arrayidx1
%t2 = load i16, i16* %arrayidx2 %t2 = load i16, i16* %arrayidx2
ret void ret void
Show All 15 Lines;
%t1 = load i16, i16* %arrayidx1 %t1 = load i16, i16* %arrayidx1
%t2 = load i16, i16* %arrayidx2 %t2 = load i16, i16* %arrayidx2
ret void ret void
} }
; We must have consecutive accesses. ; We must have consecutive accesses.
define void @variable_gep_index(i8* %unused, i8* %ptr, i64 %variable_index) { define void @variable_gep_index(i8* %unused, i8* %ptr, i64 %variable_index) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@variable_gep_index ; CHECK-LABEL: define {{[^@]+}}@variable_gep_index
; IS__TUNIT____-SAME: (i8* nocapture nofree readnone [[UNUSED:%.*]], i8* nocapture nofree nonnull readnone dereferenceable(1) [[PTR:%.*]], i64 [[VARIABLE_INDEX:%.*]]) #[[ATTR2]] { ; CHECK-SAME: (i8* nocapture nofree readnone [[UNUSED:%.*]], i8* nocapture nofree nonnull readnone dereferenceable(1) [[PTR:%.*]], i64 [[VARIABLE_INDEX:%.*]]) #[[ATTR2]] {
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@variable_gep_index
; IS__CGSCC____-SAME: (i8* nocapture nofree readnone [[UNUSED:%.*]], i8* nocapture nofree nonnull readnone dereferenceable(1) [[PTR:%.*]], i64 [[VARIABLE_INDEX:%.*]]) #[[ATTR2]] {
; IS__CGSCC____-NEXT: ret void
; ;
%arrayidx1 = getelementptr i8, i8* %ptr, i64 %variable_index %arrayidx1 = getelementptr i8, i8* %ptr, i64 %variable_index
%arrayidx2 = getelementptr i8, i8* %ptr, i64 2 %arrayidx2 = getelementptr i8, i8* %ptr, i64 2
%t0 = load i8, i8* %ptr %t0 = load i8, i8* %ptr
%t1 = load i8, i8* %arrayidx1 %t1 = load i8, i8* %arrayidx1
%t2 = load i8, i8* %arrayidx2 %t2 = load i8, i8* %arrayidx2
ret void ret void
} }
; Deal with >1 GEP index. ; Deal with >1 GEP index.
define void @multi_index_gep(<4 x i8>* %ptr) { define void @multi_index_gep(<4 x i8>* %ptr) {
; FIXME: %ptr should be dereferenceable(4) ; FIXME: %ptr should be dereferenceable(4)
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@multi_index_gep ; CHECK-LABEL: define {{[^@]+}}@multi_index_gep
; IS__TUNIT____-SAME: (<4 x i8>* nocapture nofree nonnull readnone dereferenceable(1) [[PTR:%.*]]) #[[ATTR2]] { ; CHECK-SAME: (<4 x i8>* nocapture nofree nonnull readnone dereferenceable(1) [[PTR:%.*]]) #[[ATTR2]] {
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@multi_index_gep
; IS__CGSCC____-SAME: (<4 x i8>* nocapture nofree nonnull readnone dereferenceable(1) [[PTR:%.*]]) #[[ATTR2]] {
; IS__CGSCC____-NEXT: ret void
; ;
%arrayidx00 = getelementptr <4 x i8>, <4 x i8>* %ptr, i64 0, i64 0 %arrayidx00 = getelementptr <4 x i8>, <4 x i8>* %ptr, i64 0, i64 0
%t0 = load i8, i8* %arrayidx00 %t0 = load i8, i8* %arrayidx00
ret void ret void
} }
; Could round weird bitwidths down? ; Could round weird bitwidths down?
define void @not_byte_multiple(i9* %ptr) { define void @not_byte_multiple(i9* %ptr) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@not_byte_multiple ; CHECK-LABEL: define {{[^@]+}}@not_byte_multiple
; IS__TUNIT____-SAME: (i9* nocapture nofree nonnull readnone align 2 dereferenceable(2) [[PTR:%.*]]) #[[ATTR2]] { ; CHECK-SAME: (i9* nocapture nofree nonnull readnone align 2 dereferenceable(2) [[PTR:%.*]]) #[[ATTR2]] {
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@not_byte_multiple
; IS__CGSCC____-SAME: (i9* nocapture nofree nonnull readnone align 2 dereferenceable(2) [[PTR:%.*]]) #[[ATTR2]] {
; IS__CGSCC____-NEXT: ret void
; ;
%arrayidx0 = getelementptr i9, i9* %ptr, i64 0 %arrayidx0 = getelementptr i9, i9* %ptr, i64 0
%t0 = load i9, i9* %arrayidx0 %t0 = load i9, i9* %arrayidx0
ret void ret void
} }
; Missing direct access from the pointer. ; Missing direct access from the pointer.
define void @no_pointer_deref(i16* %ptr) { define void @no_pointer_deref(i16* %ptr) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@no_pointer_deref ; CHECK-LABEL: define {{[^@]+}}@no_pointer_deref
; IS__TUNIT____-SAME: (i16* nocapture nofree readnone align 2 [[PTR:%.*]]) #[[ATTR2]] { ; CHECK-SAME: (i16* nocapture nofree readnone align 2 [[PTR:%.*]]) #[[ATTR2]] {
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@no_pointer_deref
; IS__CGSCC____-SAME: (i16* nocapture nofree readnone align 2 [[PTR:%.*]]) #[[ATTR2]] {
; IS__CGSCC____-NEXT: ret void
; ;
%arrayidx1 = getelementptr i16, i16* %ptr, i64 1 %arrayidx1 = getelementptr i16, i16* %ptr, i64 1
%arrayidx2 = getelementptr i16, i16* %ptr, i64 2 %arrayidx2 = getelementptr i16, i16* %ptr, i64 2
%t1 = load i16, i16* %arrayidx1 %t1 = load i16, i16* %arrayidx1
%t2 = load i16, i16* %arrayidx2 %t2 = load i16, i16* %arrayidx2
ret void ret void
} }
; Out-of-order is ok, but missing access concludes dereferenceable range. ; Out-of-order is ok, but missing access concludes dereferenceable range.
define void @non_consecutive(i32* %ptr) { define void @non_consecutive(i32* %ptr) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@non_consecutive ; CHECK-LABEL: define {{[^@]+}}@non_consecutive
; IS__TUNIT____-SAME: (i32* nocapture nofree nonnull readnone align 4 dereferenceable(8) [[PTR:%.*]]) #[[ATTR2]] { ; CHECK-SAME: (i32* nocapture nofree nonnull readnone align 4 dereferenceable(8) [[PTR:%.*]]) #[[ATTR2]] {
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@non_consecutive
; IS__CGSCC____-SAME: (i32* nocapture nofree nonnull readnone align 4 dereferenceable(8) [[PTR:%.*]]) #[[ATTR2]] {
; IS__CGSCC____-NEXT: ret void
; ;
%arrayidx1 = getelementptr i32, i32* %ptr, i64 1 %arrayidx1 = getelementptr i32, i32* %ptr, i64 1
%arrayidx0 = getelementptr i32, i32* %ptr, i64 0 %arrayidx0 = getelementptr i32, i32* %ptr, i64 0
%arrayidx3 = getelementptr i32, i32* %ptr, i64 3 %arrayidx3 = getelementptr i32, i32* %ptr, i64 3
%t1 = load i32, i32* %arrayidx1 %t1 = load i32, i32* %arrayidx1
%t0 = load i32, i32* %arrayidx0 %t0 = load i32, i32* %arrayidx0
%t3 = load i32, i32* %arrayidx3 %t3 = load i32, i32* %arrayidx3
ret void ret void
} }
; Improve on existing dereferenceable attribute. ; Improve on existing dereferenceable attribute.
define void @more_bytes(i32* dereferenceable(8) %ptr) { define void @more_bytes(i32* dereferenceable(8) %ptr) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@more_bytes ; CHECK-LABEL: define {{[^@]+}}@more_bytes
; IS__TUNIT____-SAME: (i32* nocapture nofree nonnull readnone align 4 dereferenceable(16) [[PTR:%.*]]) #[[ATTR2]] { ; CHECK-SAME: (i32* nocapture nofree nonnull readnone align 4 dereferenceable(16) [[PTR:%.*]]) #[[ATTR2]] {
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@more_bytes
; IS__CGSCC____-SAME: (i32* nocapture nofree nonnull readnone align 4 dereferenceable(16) [[PTR:%.*]]) #[[ATTR2]] {
; IS__CGSCC____-NEXT: ret void
; ;
%arrayidx3 = getelementptr i32, i32* %ptr, i64 3 %arrayidx3 = getelementptr i32, i32* %ptr, i64 3
%arrayidx1 = getelementptr i32, i32* %ptr, i64 1 %arrayidx1 = getelementptr i32, i32* %ptr, i64 1
%arrayidx0 = getelementptr i32, i32* %ptr, i64 0 %arrayidx0 = getelementptr i32, i32* %ptr, i64 0
%arrayidx2 = getelementptr i32, i32* %ptr, i64 2 %arrayidx2 = getelementptr i32, i32* %ptr, i64 2
%t3 = load i32, i32* %arrayidx3 %t3 = load i32, i32* %arrayidx3
%t1 = load i32, i32* %arrayidx1 %t1 = load i32, i32* %arrayidx1
%t2 = load i32, i32* %arrayidx2 %t2 = load i32, i32* %arrayidx2
%t0 = load i32, i32* %arrayidx0 %t0 = load i32, i32* %arrayidx0
ret void ret void
} }
; Improve on existing dereferenceable_or_null attribute. ; Improve on existing dereferenceable_or_null attribute.
define void @more_bytes_and_not_null(i32* dereferenceable_or_null(8) %ptr) { define void @more_bytes_and_not_null(i32* dereferenceable_or_null(8) %ptr) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@more_bytes_and_not_null ; CHECK-LABEL: define {{[^@]+}}@more_bytes_and_not_null
; IS__TUNIT____-SAME: (i32* nocapture nofree nonnull readnone align 4 dereferenceable(16) [[PTR:%.*]]) #[[ATTR2]] { ; CHECK-SAME: (i32* nocapture nofree nonnull readnone align 4 dereferenceable(16) [[PTR:%.*]]) #[[ATTR2]] {
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@more_bytes_and_not_null
; IS__CGSCC____-SAME: (i32* nocapture nofree nonnull readnone align 4 dereferenceable(16) [[PTR:%.*]]) #[[ATTR2]] {
; IS__CGSCC____-NEXT: ret void
; ;
%arrayidx3 = getelementptr i32, i32* %ptr, i64 3 %arrayidx3 = getelementptr i32, i32* %ptr, i64 3
%arrayidx1 = getelementptr i32, i32* %ptr, i64 1 %arrayidx1 = getelementptr i32, i32* %ptr, i64 1
%arrayidx0 = getelementptr i32, i32* %ptr, i64 0 %arrayidx0 = getelementptr i32, i32* %ptr, i64 0
%arrayidx2 = getelementptr i32, i32* %ptr, i64 2 %arrayidx2 = getelementptr i32, i32* %ptr, i64 2
%t3 = load i32, i32* %arrayidx3 %t3 = load i32, i32* %arrayidx3
%t1 = load i32, i32* %arrayidx1 %t1 = load i32, i32* %arrayidx1
%t2 = load i32, i32* %arrayidx2 %t2 = load i32, i32* %arrayidx2
%t0 = load i32, i32* %arrayidx0 %t0 = load i32, i32* %arrayidx0
ret void ret void
} }
; But don't pessimize existing dereferenceable attribute. ; But don't pessimize existing dereferenceable attribute.
define void @better_bytes(i32* dereferenceable(100) %ptr) { define void @better_bytes(i32* dereferenceable(100) %ptr) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@better_bytes ; CHECK-LABEL: define {{[^@]+}}@better_bytes
; IS__TUNIT____-SAME: (i32* nocapture nofree nonnull readnone align 4 dereferenceable(100) [[PTR:%.*]]) #[[ATTR2]] { ; CHECK-SAME: (i32* nocapture nofree nonnull readnone align 4 dereferenceable(100) [[PTR:%.*]]) #[[ATTR2]] {
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@better_bytes
; IS__CGSCC____-SAME: (i32* nocapture nofree nonnull readnone align 4 dereferenceable(100) [[PTR:%.*]]) #[[ATTR2]] {
; IS__CGSCC____-NEXT: ret void
; ;
%arrayidx3 = getelementptr i32, i32* %ptr, i64 3 %arrayidx3 = getelementptr i32, i32* %ptr, i64 3
%arrayidx1 = getelementptr i32, i32* %ptr, i64 1 %arrayidx1 = getelementptr i32, i32* %ptr, i64 1
%arrayidx0 = getelementptr i32, i32* %ptr, i64 0 %arrayidx0 = getelementptr i32, i32* %ptr, i64 0
%arrayidx2 = getelementptr i32, i32* %ptr, i64 2 %arrayidx2 = getelementptr i32, i32* %ptr, i64 2
%t3 = load i32, i32* %arrayidx3 %t3 = load i32, i32* %arrayidx3
%t1 = load i32, i32* %arrayidx1 %t1 = load i32, i32* %arrayidx1
%t2 = load i32, i32* %arrayidx2 %t2 = load i32, i32* %arrayidx2
%t0 = load i32, i32* %arrayidx0 %t0 = load i32, i32* %arrayidx0
ret void ret void
} }
define void @bitcast(i32* %arg) { define void @bitcast(i32* %arg) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@bitcast ; CHECK-LABEL: define {{[^@]+}}@bitcast
; IS__TUNIT____-SAME: (i32* nocapture nofree nonnull readnone align 4 dereferenceable(8) [[ARG:%.*]]) #[[ATTR2]] { ; CHECK-SAME: (i32* nocapture nofree nonnull readnone align 4 dereferenceable(8) [[ARG:%.*]]) #[[ATTR2]] {
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@bitcast
; IS__CGSCC____-SAME: (i32* nocapture nofree nonnull readnone align 4 dereferenceable(8) [[ARG:%.*]]) #[[ATTR2]] {
; IS__CGSCC____-NEXT: ret void
; ;
%ptr = bitcast i32* %arg to float* %ptr = bitcast i32* %arg to float*
%arrayidx0 = getelementptr float, float* %ptr, i64 0 %arrayidx0 = getelementptr float, float* %ptr, i64 0
%arrayidx1 = getelementptr float, float* %ptr, i64 1 %arrayidx1 = getelementptr float, float* %ptr, i64 1
%t0 = load float, float* %arrayidx0 %t0 = load float, float* %arrayidx0
%t1 = load float, float* %arrayidx1 %t1 = load float, float* %arrayidx1
ret void ret void
} }
define void @bitcast_different_sizes(double* %arg1, i8* %arg2) { define void @bitcast_different_sizes(double* %arg1, i8* %arg2) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@bitcast_different_sizes ; CHECK-LABEL: define {{[^@]+}}@bitcast_different_sizes
; IS__TUNIT____-SAME: (double* nocapture nofree nonnull readnone align 4 dereferenceable(12) [[ARG1:%.*]], i8* nocapture nofree nonnull readnone align 4 dereferenceable(16) [[ARG2:%.*]]) #[[ATTR2]] { ; CHECK-SAME: (double* nocapture nofree nonnull readnone align 4 dereferenceable(12) [[ARG1:%.*]], i8* nocapture nofree nonnull readnone align 4 dereferenceable(16) [[ARG2:%.*]]) #[[ATTR2]] {
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@bitcast_different_sizes
; IS__CGSCC____-SAME: (double* nocapture nofree nonnull readnone align 4 dereferenceable(12) [[ARG1:%.*]], i8* nocapture nofree nonnull readnone align 4 dereferenceable(16) [[ARG2:%.*]]) #[[ATTR2]] {
; IS__CGSCC____-NEXT: ret void
; ;
%ptr1 = bitcast double* %arg1 to float* %ptr1 = bitcast double* %arg1 to float*
%a10 = getelementptr float, float* %ptr1, i64 0 %a10 = getelementptr float, float* %ptr1, i64 0
%a11 = getelementptr float, float* %ptr1, i64 1 %a11 = getelementptr float, float* %ptr1, i64 1
%a12 = getelementptr float, float* %ptr1, i64 2 %a12 = getelementptr float, float* %ptr1, i64 2
%ld10 = load float, float* %a10 %ld10 = load float, float* %a10
%ld11 = load float, float* %a11 %ld11 = load float, float* %a11
%ld12 = load float, float* %a12 %ld12 = load float, float* %a12
%ptr2 = bitcast i8* %arg2 to i64* %ptr2 = bitcast i8* %arg2 to i64*
%a20 = getelementptr i64, i64* %ptr2, i64 0 %a20 = getelementptr i64, i64* %ptr2, i64 0
%a21 = getelementptr i64, i64* %ptr2, i64 1 %a21 = getelementptr i64, i64* %ptr2, i64 1
%ld20 = load i64, i64* %a20 %ld20 = load i64, i64* %a20
%ld21 = load i64, i64* %a21 %ld21 = load i64, i64* %a21
ret void ret void
} }
define void @negative_offset(i32* %arg) { define void @negative_offset(i32* %arg) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@negative_offset ; CHECK-LABEL: define {{[^@]+}}@negative_offset
; IS__TUNIT____-SAME: (i32* nocapture nofree nonnull readnone align 4 dereferenceable(4) [[ARG:%.*]]) #[[ATTR2]] { ; CHECK-SAME: (i32* nocapture nofree nonnull readnone align 4 dereferenceable(4) [[ARG:%.*]]) #[[ATTR2]] {
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@negative_offset
; IS__CGSCC____-SAME: (i32* nocapture nofree nonnull readnone align 4 dereferenceable(4) [[ARG:%.*]]) #[[ATTR2]] {
; IS__CGSCC____-NEXT: ret void
; ;
%ptr = bitcast i32* %arg to float* %ptr = bitcast i32* %arg to float*
%arrayidx0 = getelementptr float, float* %ptr, i64 0 %arrayidx0 = getelementptr float, float* %ptr, i64 0
%arrayidx1 = getelementptr float, float* %ptr, i64 -1 %arrayidx1 = getelementptr float, float* %ptr, i64 -1
%t0 = load float, float* %arrayidx0 %t0 = load float, float* %arrayidx0
%t1 = load float, float* %arrayidx1 %t1 = load float, float* %arrayidx1
ret void ret void
} }
define void @stores(i32* %arg) { define void @stores(i32* %arg) {
; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind willreturn writeonly ; CHECK: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__TUNIT____-LABEL: define {{[^@]+}}@stores ; CHECK-LABEL: define {{[^@]+}}@stores
; IS__TUNIT____-SAME: (i32* nocapture nofree nonnull writeonly align 4 dereferenceable(8) [[ARG:%.*]]) #[[ATTR4:[0-9]+]] { ; CHECK-SAME: (i32* nocapture nofree nonnull writeonly align 4 dereferenceable(8) [[ARG:%.*]]) #[[ATTR4:[0-9]+]] {
; IS__TUNIT____-NEXT: [[PTR:%.*]] = bitcast i32* [[ARG]] to float* ; CHECK-NEXT: [[PTR:%.*]] = bitcast i32* [[ARG]] to float*
; IS__TUNIT____-NEXT: [[ARRAYIDX0:%.*]] = getelementptr float, float* [[PTR]], i64 0 ; CHECK-NEXT: [[ARRAYIDX0:%.*]] = getelementptr float, float* [[PTR]], i64 0
; IS__TUNIT____-NEXT: [[ARRAYIDX1:%.*]] = getelementptr float, float* [[PTR]], i64 1 ; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr float, float* [[PTR]], i64 1
; IS__TUNIT____-NEXT: store float 1.000000e+00, float* [[ARRAYIDX0]], align 4 ; CHECK-NEXT: store float 1.000000e+00, float* [[ARRAYIDX0]], align 4
; IS__TUNIT____-NEXT: store float 2.000000e+00, float* [[ARRAYIDX1]], align 4 ; CHECK-NEXT: store float 2.000000e+00, float* [[ARRAYIDX1]], align 4
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC____-LABEL: define {{[^@]+}}@stores
; IS__CGSCC____-SAME: (i32* nocapture nofree nonnull writeonly align 4 dereferenceable(8) [[ARG:%.*]]) #[[ATTR4:[0-9]+]] {
; IS__CGSCC____-NEXT: [[PTR:%.*]] = bitcast i32* [[ARG]] to float*
; IS__CGSCC____-NEXT: [[ARRAYIDX0:%.*]] = getelementptr float, float* [[PTR]], i64 0
; IS__CGSCC____-NEXT: [[ARRAYIDX1:%.*]] = getelementptr float, float* [[PTR]], i64 1
; IS__CGSCC____-NEXT: store float 1.000000e+00, float* [[ARRAYIDX0]], align 4
; IS__CGSCC____-NEXT: store float 2.000000e+00, float* [[ARRAYIDX1]], align 4
; IS__CGSCC____-NEXT: ret void
; ;
%ptr = bitcast i32* %arg to float* %ptr = bitcast i32* %arg to float*
%arrayidx0 = getelementptr float, float* %ptr, i64 0 %arrayidx0 = getelementptr float, float* %ptr, i64 0
%arrayidx1 = getelementptr float, float* %ptr, i64 1 %arrayidx1 = getelementptr float, float* %ptr, i64 1
store float 1.0, float* %arrayidx0 store float 1.0, float* %arrayidx0
store float 2.0, float* %arrayidx1 store float 2.0, float* %arrayidx1
ret void ret void
} }
define void @load_store(i32* %arg) { define void @load_store(i32* %arg) {
; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind willreturn writeonly ; CHECK: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__TUNIT____-LABEL: define {{[^@]+}}@load_store ; CHECK-LABEL: define {{[^@]+}}@load_store
; IS__TUNIT____-SAME: (i32* nocapture nofree nonnull writeonly align 4 dereferenceable(8) [[ARG:%.*]]) #[[ATTR4]] { ; CHECK-SAME: (i32* nocapture nofree nonnull writeonly align 4 dereferenceable(8) [[ARG:%.*]]) #[[ATTR4]] {
; IS__TUNIT____-NEXT: [[PTR:%.*]] = bitcast i32* [[ARG]] to float* ; CHECK-NEXT: [[PTR:%.*]] = bitcast i32* [[ARG]] to float*
; IS__TUNIT____-NEXT: [[ARRAYIDX1:%.*]] = getelementptr float, float* [[PTR]], i64 1 ; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr float, float* [[PTR]], i64 1
; IS__TUNIT____-NEXT: store float 2.000000e+00, float* [[ARRAYIDX1]], align 4 ; CHECK-NEXT: store float 2.000000e+00, float* [[ARRAYIDX1]], align 4
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC____-LABEL: define {{[^@]+}}@load_store
; IS__CGSCC____-SAME: (i32* nocapture nofree nonnull writeonly align 4 dereferenceable(8) [[ARG:%.*]]) #[[ATTR4]] {
; IS__CGSCC____-NEXT: [[PTR:%.*]] = bitcast i32* [[ARG]] to float*
; IS__CGSCC____-NEXT: [[ARRAYIDX1:%.*]] = getelementptr float, float* [[PTR]], i64 1
; IS__CGSCC____-NEXT: store float 2.000000e+00, float* [[ARRAYIDX1]], align 4
; IS__CGSCC____-NEXT: ret void
; ;
%ptr = bitcast i32* %arg to float* %ptr = bitcast i32* %arg to float*
%arrayidx0 = getelementptr float, float* %ptr, i64 0 %arrayidx0 = getelementptr float, float* %ptr, i64 0
%arrayidx1 = getelementptr float, float* %ptr, i64 1 %arrayidx1 = getelementptr float, float* %ptr, i64 1
%t1 = load float, float* %arrayidx0 %t1 = load float, float* %arrayidx0
store float 2.0, float* %arrayidx1 store float 2.0, float* %arrayidx1
ret void ret void
} }
define void @different_size1(i32* %arg) { define void @different_size1(i32* %arg) {
; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind willreturn writeonly ; CHECK: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__TUNIT____-LABEL: define {{[^@]+}}@different_size1 ; CHECK-LABEL: define {{[^@]+}}@different_size1
; IS__TUNIT____-SAME: (i32* nocapture nofree noundef nonnull writeonly align 8 dereferenceable(8) [[ARG:%.*]]) #[[ATTR4]] { ; CHECK-SAME: (i32* nocapture nofree noundef nonnull writeonly align 8 dereferenceable(8) [[ARG:%.*]]) #[[ATTR4]] {
; IS__TUNIT____-NEXT: [[ARG_CAST:%.*]] = bitcast i32* [[ARG]] to double* ; CHECK-NEXT: [[ARG_CAST:%.*]] = bitcast i32* [[ARG]] to double*
; IS__TUNIT____-NEXT: store double 0.000000e+00, double* [[ARG_CAST]], align 8 ; CHECK-NEXT: store double 0.000000e+00, double* [[ARG_CAST]], align 8
; IS__TUNIT____-NEXT: store i32 0, i32* [[ARG]], align 8 ; CHECK-NEXT: store i32 0, i32* [[ARG]], align 8
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC____-LABEL: define {{[^@]+}}@different_size1
; IS__CGSCC____-SAME: (i32* nocapture nofree noundef nonnull writeonly align 8 dereferenceable(8) [[ARG:%.*]]) #[[ATTR4]] {
; IS__CGSCC____-NEXT: [[ARG_CAST:%.*]] = bitcast i32* [[ARG]] to double*
; IS__CGSCC____-NEXT: store double 0.000000e+00, double* [[ARG_CAST]], align 8
; IS__CGSCC____-NEXT: store i32 0, i32* [[ARG]], align 8
; IS__CGSCC____-NEXT: ret void
; ;
%arg-cast = bitcast i32* %arg to double* %arg-cast = bitcast i32* %arg to double*
store double 0.000000e+00, double* %arg-cast store double 0.000000e+00, double* %arg-cast
store i32 0, i32* %arg store i32 0, i32* %arg
ret void ret void
} }
define void @different_size2(i32* %arg) { define void @different_size2(i32* %arg) {
; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind willreturn writeonly ; CHECK: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__TUNIT____-LABEL: define {{[^@]+}}@different_size2 ; CHECK-LABEL: define {{[^@]+}}@different_size2
; IS__TUNIT____-SAME: (i32* nocapture nofree noundef nonnull writeonly align 8 dereferenceable(8) [[ARG:%.*]]) #[[ATTR4]] { ; CHECK-SAME: (i32* nocapture nofree noundef nonnull writeonly align 8 dereferenceable(8) [[ARG:%.*]]) #[[ATTR4]] {
; IS__TUNIT____-NEXT: store i32 0, i32* [[ARG]], align 8 ; CHECK-NEXT: store i32 0, i32* [[ARG]], align 8
; IS__TUNIT____-NEXT: [[ARG_CAST:%.*]] = bitcast i32* [[ARG]] to double* ; CHECK-NEXT: [[ARG_CAST:%.*]] = bitcast i32* [[ARG]] to double*
; IS__TUNIT____-NEXT: store double 0.000000e+00, double* [[ARG_CAST]], align 8 ; CHECK-NEXT: store double 0.000000e+00, double* [[ARG_CAST]], align 8
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC____-LABEL: define {{[^@]+}}@different_size2
; IS__CGSCC____-SAME: (i32* nocapture nofree noundef nonnull writeonly align 8 dereferenceable(8) [[ARG:%.*]]) #[[ATTR4]] {
; IS__CGSCC____-NEXT: store i32 0, i32* [[ARG]], align 8
; IS__CGSCC____-NEXT: [[ARG_CAST:%.*]] = bitcast i32* [[ARG]] to double*
; IS__CGSCC____-NEXT: store double 0.000000e+00, double* [[ARG_CAST]], align 8
; IS__CGSCC____-NEXT: ret void
; ;
store i32 0, i32* %arg store i32 0, i32* %arg
%arg-cast = bitcast i32* %arg to double* %arg-cast = bitcast i32* %arg to double*
store double 0.000000e+00, double* %arg-cast store double 0.000000e+00, double* %arg-cast
ret void ret void
} }
; Make use of MustBeExecuted Explorer ; Make use of MustBeExecuted Explorer
Show All 10 Lines
; l6 l7 ; l6 l7
; \ / ; \ /
; end ; end
; According to the above CFG, we can see that instructions in l5 Block must be executed. ; According to the above CFG, we can see that instructions in l5 Block must be executed.
; Therefore, %p must be dereferenced. ; Therefore, %p must be dereferenced.
; ;
; ATTRIBUTOR_CGSCC_NPM-LABEL: define i32 @require_cfg_analysis(i32 %c, i32* {{.*}} dereferenceable(4) %p) ; ATTRIBUTOR_CGSCC_NPM-LABEL: define i32 @require_cfg_analysis(i32 %c, i32* {{.*}} dereferenceable(4) %p)
define i32 @require_cfg_analysis(i32 %c, i32* %p) { define i32 @require_cfg_analysis(i32 %c, i32* %p) {
; IS__TUNIT_OPM: Function Attrs: argmemonly nofree nosync nounwind willreturn writeonly ; IS________OPM: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@require_cfg_analysis ; IS________OPM-LABEL: define {{[^@]+}}@require_cfg_analysis
; IS__TUNIT_OPM-SAME: (i32 [[C:%.*]], i32* nocapture nofree writeonly [[P:%.*]]) #[[ATTR4]] { ; IS________OPM-SAME: (i32 [[C:%.*]], i32* nocapture nofree writeonly [[P:%.*]]) #[[ATTR4]] {
; IS__TUNIT_OPM-NEXT: [[TOBOOL1:%.*]] = icmp eq i32 [[C]], 0 ; IS________OPM-NEXT: [[TOBOOL1:%.*]] = icmp eq i32 [[C]], 0
; IS__TUNIT_OPM-NEXT: br i1 [[TOBOOL1]], label [[L1:%.*]], label [[L2:%.*]] ; IS________OPM-NEXT: br i1 [[TOBOOL1]], label [[L1:%.*]], label [[L2:%.*]]
; IS__TUNIT_OPM: l1: ; IS________OPM: l1:
; IS__TUNIT_OPM-NEXT: [[TOBOOL2:%.*]] = icmp eq i32 [[C]], 1 ; IS________OPM-NEXT: [[TOBOOL2:%.*]] = icmp eq i32 [[C]], 1
; IS__TUNIT_OPM-NEXT: br i1 [[TOBOOL2]], label [[L3:%.*]], label [[L4:%.*]] ; IS________OPM-NEXT: br i1 [[TOBOOL2]], label [[L3:%.*]], label [[L4:%.*]]
; IS__TUNIT_OPM: l2: ; IS________OPM: l2:
; IS__TUNIT_OPM-NEXT: [[TOBOOL3:%.*]] = icmp eq i32 [[C]], 2 ; IS________OPM-NEXT: [[TOBOOL3:%.*]] = icmp eq i32 [[C]], 2
; IS__TUNIT_OPM-NEXT: br i1 [[TOBOOL3]], label [[L3]], label [[L4]] ; IS________OPM-NEXT: br i1 [[TOBOOL3]], label [[L3]], label [[L4]]
; IS__TUNIT_OPM: l3: ; IS________OPM: l3:
; IS__TUNIT_OPM-NEXT: br label [[L5:%.*]] ; IS________OPM-NEXT: br label [[L5:%.*]]
; IS__TUNIT_OPM: l4: ; IS________OPM: l4:
; IS__TUNIT_OPM-NEXT: br label [[L5]] ; IS________OPM-NEXT: br label [[L5]]
; IS__TUNIT_OPM: l5: ; IS________OPM: l5:
; IS__TUNIT_OPM-NEXT: [[TOBOOL4:%.*]] = icmp eq i32 [[C]], 4 ; IS________OPM-NEXT: [[TOBOOL4:%.*]] = icmp eq i32 [[C]], 4
; IS__TUNIT_OPM-NEXT: br i1 [[TOBOOL4]], label [[L6:%.*]], label [[L7:%.*]] ; IS________OPM-NEXT: br i1 [[TOBOOL4]], label [[L6:%.*]], label [[L7:%.*]]
; IS__TUNIT_OPM: l6: ; IS________OPM: l6:
; IS__TUNIT_OPM-NEXT: store i32 0, i32* [[P]], align 4 ; IS________OPM-NEXT: store i32 0, i32* [[P]], align 4
; IS__TUNIT_OPM-NEXT: br label [[END:%.*]] ; IS________OPM-NEXT: br label [[END:%.*]]
; IS__TUNIT_OPM: l7: ; IS________OPM: l7:
; IS__TUNIT_OPM-NEXT: store i32 1, i32* [[P]], align 4 ; IS________OPM-NEXT: store i32 1, i32* [[P]], align 4
; IS__TUNIT_OPM-NEXT: br label [[END]] ; IS________OPM-NEXT: br label [[END]]
; IS__TUNIT_OPM: end: ; IS________OPM: end:
; IS__TUNIT_OPM-NEXT: ret i32 1 ; IS________OPM-NEXT: ret i32 1
; ;
; IS__TUNIT_NPM: Function Attrs: argmemonly nofree nosync nounwind willreturn writeonly ; IS________NPM: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@require_cfg_analysis ; IS________NPM-LABEL: define {{[^@]+}}@require_cfg_analysis
; IS__TUNIT_NPM-SAME: (i32 [[C:%.*]], i32* nocapture nofree nonnull writeonly align 4 dereferenceable(4) [[P:%.*]]) #[[ATTR4]] { ; IS________NPM-SAME: (i32 [[C:%.*]], i32* nocapture nofree nonnull writeonly align 4 dereferenceable(4) [[P:%.*]]) #[[ATTR4]] {
; IS__TUNIT_NPM-NEXT: [[TOBOOL1:%.*]] = icmp eq i32 [[C]], 0 ; IS________NPM-NEXT: [[TOBOOL1:%.*]] = icmp eq i32 [[C]], 0
; IS__TUNIT_NPM-NEXT: br i1 [[TOBOOL1]], label [[L1:%.*]], label [[L2:%.*]] ; IS________NPM-NEXT: br i1 [[TOBOOL1]], label [[L1:%.*]], label [[L2:%.*]]
; IS__TUNIT_NPM: l1: ; IS________NPM: l1:
; IS__TUNIT_NPM-NEXT: br label [[L4:%.*]] ; IS________NPM-NEXT: br label [[L4:%.*]]
; IS__TUNIT_NPM: l2: ; IS________NPM: l2:
; IS__TUNIT_NPM-NEXT: [[TOBOOL3:%.*]] = icmp eq i32 [[C]], 2 ; IS________NPM-NEXT: [[TOBOOL3:%.*]] = icmp eq i32 [[C]], 2
; IS__TUNIT_NPM-NEXT: br i1 [[TOBOOL3]], label [[L3:%.*]], label [[L4]] ; IS________NPM-NEXT: br i1 [[TOBOOL3]], label [[L3:%.*]], label [[L4]]
; IS__TUNIT_NPM: l3: ; IS________NPM: l3:
; IS__TUNIT_NPM-NEXT: br label [[L5:%.*]] ; IS________NPM-NEXT: br label [[L5:%.*]]
; IS__TUNIT_NPM: l4: ; IS________NPM: l4:
; IS__TUNIT_NPM-NEXT: br label [[L5]] ; IS________NPM-NEXT: br label [[L5]]
; IS__TUNIT_NPM: l5: ; IS________NPM: l5:
; IS__TUNIT_NPM-NEXT: [[TOBOOL4:%.*]] = icmp eq i32 [[C]], 4 ; IS________NPM-NEXT: [[TOBOOL4:%.*]] = icmp eq i32 [[C]], 4
; IS__TUNIT_NPM-NEXT: br i1 [[TOBOOL4]], label [[L6:%.*]], label [[L7:%.*]] ; IS________NPM-NEXT: br i1 [[TOBOOL4]], label [[L6:%.*]], label [[L7:%.*]]
; IS__TUNIT_NPM: l6: ; IS________NPM: l6:
; IS__TUNIT_NPM-NEXT: store i32 0, i32* [[P]], align 4 ; IS________NPM-NEXT: store i32 0, i32* [[P]], align 4
; IS__TUNIT_NPM-NEXT: br label [[END:%.*]] ; IS________NPM-NEXT: br label [[END:%.*]]
; IS__TUNIT_NPM: l7: ; IS________NPM: l7:
; IS__TUNIT_NPM-NEXT: store i32 1, i32* [[P]], align 4 ; IS________NPM-NEXT: store i32 1, i32* [[P]], align 4
; IS__TUNIT_NPM-NEXT: br label [[END]] ; IS________NPM-NEXT: br label [[END]]
; IS__TUNIT_NPM: end: ; IS________NPM: end:
; IS__TUNIT_NPM-NEXT: ret i32 1 ; IS________NPM-NEXT: ret i32 1
;
; IS__CGSCC_OPM: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@require_cfg_analysis
; IS__CGSCC_OPM-SAME: (i32 [[C:%.*]], i32* nocapture nofree writeonly [[P:%.*]]) #[[ATTR4]] {
; IS__CGSCC_OPM-NEXT: [[TOBOOL1:%.*]] = icmp eq i32 [[C]], 0
; IS__CGSCC_OPM-NEXT: br i1 [[TOBOOL1]], label [[L1:%.*]], label [[L2:%.*]]
; IS__CGSCC_OPM: l1:
; IS__CGSCC_OPM-NEXT: [[TOBOOL2:%.*]] = icmp eq i32 [[C]], 1
; IS__CGSCC_OPM-NEXT: br i1 [[TOBOOL2]], label [[L3:%.*]], label [[L4:%.*]]
; IS__CGSCC_OPM: l2:
; IS__CGSCC_OPM-NEXT: [[TOBOOL3:%.*]] = icmp eq i32 [[C]], 2
; IS__CGSCC_OPM-NEXT: br i1 [[TOBOOL3]], label [[L3]], label [[L4]]
; IS__CGSCC_OPM: l3:
; IS__CGSCC_OPM-NEXT: br label [[L5:%.*]]
; IS__CGSCC_OPM: l4:
; IS__CGSCC_OPM-NEXT: br label [[L5]]
; IS__CGSCC_OPM: l5:
; IS__CGSCC_OPM-NEXT: [[TOBOOL4:%.*]] = icmp eq i32 [[C]], 4
; IS__CGSCC_OPM-NEXT: br i1 [[TOBOOL4]], label [[L6:%.*]], label [[L7:%.*]]
; IS__CGSCC_OPM: l6:
; IS__CGSCC_OPM-NEXT: store i32 0, i32* [[P]], align 4
; IS__CGSCC_OPM-NEXT: br label [[END:%.*]]
; IS__CGSCC_OPM: l7:
; IS__CGSCC_OPM-NEXT: store i32 1, i32* [[P]], align 4
; IS__CGSCC_OPM-NEXT: br label [[END]]
; IS__CGSCC_OPM: end:
; IS__CGSCC_OPM-NEXT: ret i32 1
;
; IS__CGSCC_NPM: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@require_cfg_analysis
; IS__CGSCC_NPM-SAME: (i32 [[C:%.*]], i32* nocapture nofree nonnull writeonly align 4 dereferenceable(4) [[P:%.*]]) #[[ATTR4]] {
; IS__CGSCC_NPM-NEXT: [[TOBOOL1:%.*]] = icmp eq i32 [[C]], 0
; IS__CGSCC_NPM-NEXT: br i1 [[TOBOOL1]], label [[L1:%.*]], label [[L2:%.*]]
; IS__CGSCC_NPM: l1:
; IS__CGSCC_NPM-NEXT: br label [[L4:%.*]]
; IS__CGSCC_NPM: l2:
; IS__CGSCC_NPM-NEXT: [[TOBOOL3:%.*]] = icmp eq i32 [[C]], 2
; IS__CGSCC_NPM-NEXT: br i1 [[TOBOOL3]], label [[L3:%.*]], label [[L4]]
; IS__CGSCC_NPM: l3:
; IS__CGSCC_NPM-NEXT: br label [[L5:%.*]]
; IS__CGSCC_NPM: l4:
; IS__CGSCC_NPM-NEXT: br label [[L5]]
; IS__CGSCC_NPM: l5:
; IS__CGSCC_NPM-NEXT: [[TOBOOL4:%.*]] = icmp eq i32 [[C]], 4
; IS__CGSCC_NPM-NEXT: br i1 [[TOBOOL4]], label [[L6:%.*]], label [[L7:%.*]]
; IS__CGSCC_NPM: l6:
; IS__CGSCC_NPM-NEXT: store i32 0, i32* [[P]], align 4
; IS__CGSCC_NPM-NEXT: br label [[END:%.*]]
; IS__CGSCC_NPM: l7:
; IS__CGSCC_NPM-NEXT: store i32 1, i32* [[P]], align 4
; IS__CGSCC_NPM-NEXT: br label [[END]]
; IS__CGSCC_NPM: end:
; IS__CGSCC_NPM-NEXT: ret i32 1
; ;
%tobool1 = icmp eq i32 %c, 0 %tobool1 = icmp eq i32 %c, 0
br i1 %tobool1, label %l1, label %l2 br i1 %tobool1, label %l1, label %l2
l1: l1:
%tobool2 = icmp eq i32 %c, 1 %tobool2 = icmp eq i32 %c, 1
br i1 %tobool2, label %l3, label %l4 br i1 %tobool2, label %l3, label %l4
l2: l2:
%tobool3 = icmp eq i32 %c, 2 %tobool3 = icmp eq i32 %c, 2
Show All 10 Linesl6:
br label %end br label %end
l7: l7:
store i32 1, i32* %p store i32 1, i32* %p
br label %end br label %end
end: end:
ret i32 1 ret i32 1
} }
;. ;.
; IS__TUNIT____: attributes #[[ATTR0]] = { argmemonly nofree nosync nounwind readonly willreturn } ; CHECK: attributes #[[ATTR0]] = { argmemonly nofree norecurse nosync nounwind readonly willreturn }
; IS__TUNIT____: attributes #[[ATTR1]] = { argmemonly nofree nosync nounwind willreturn } ; CHECK: attributes #[[ATTR1]] = { argmemonly nofree norecurse nosync nounwind willreturn }
; IS__TUNIT____: attributes #[[ATTR2]] = { nofree nosync nounwind readnone willreturn } ; CHECK: attributes #[[ATTR2]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__TUNIT____: attributes #[[ATTR3]] = { argmemonly nofree nounwind willreturn } ; CHECK: attributes #[[ATTR3]] = { argmemonly nofree norecurse nounwind willreturn }
; IS__TUNIT____: attributes #[[ATTR4]] = { argmemonly nofree nosync nounwind willreturn writeonly } ; CHECK: attributes #[[ATTR4]] = { argmemonly nofree norecurse nosync nounwind willreturn writeonly }
;.
; IS__CGSCC____: attributes #[[ATTR0]] = { argmemonly nofree norecurse nosync nounwind readonly willreturn }
; IS__CGSCC____: attributes #[[ATTR1]] = { argmemonly nofree norecurse nosync nounwind willreturn }
; IS__CGSCC____: attributes #[[ATTR2]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__CGSCC____: attributes #[[ATTR3]] = { argmemonly nofree norecurse nounwind willreturn }
; IS__CGSCC____: attributes #[[ATTR4]] = { argmemonly nofree norecurse nosync nounwind willreturn writeonly }
;. ;.

llvm/test/Transforms/Attributor/dereferenceable-2.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals
; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM ; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM
; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM ; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM
; Determine dereference-ability before unused loads get deleted: ; Determine dereference-ability before unused loads get deleted:
; https://bugs.llvm.org/show_bug.cgi?id=21780 ; https://bugs.llvm.org/show_bug.cgi?id=21780
define <4 x double> @PR21780(double* %ptr) { define <4 x double> @PR21780(double* %ptr) {
; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind readonly willreturn ; CHECK: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@PR21780 ; CHECK-LABEL: define {{[^@]+}}@PR21780
; IS__TUNIT____-SAME: (double* nocapture nofree noundef nonnull readonly align 8 dereferenceable(32) [[PTR:%.*]]) #[[ATTR0:[0-9]+]] { ; CHECK-SAME: (double* nocapture nofree noundef nonnull readonly align 8 dereferenceable(32) [[PTR:%.*]]) #[[ATTR0:[0-9]+]] {
; IS__TUNIT____-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds double, double* [[PTR]], i64 1 ; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds double, double* [[PTR]], i64 1
; IS__TUNIT____-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds double, double* [[PTR]], i64 2 ; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds double, double* [[PTR]], i64 2
; IS__TUNIT____-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds double, double* [[PTR]], i64 3 ; CHECK-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds double, double* [[PTR]], i64 3
; IS__TUNIT____-NEXT: [[T0:%.*]] = load double, double* [[PTR]], align 8 ; CHECK-NEXT: [[T0:%.*]] = load double, double* [[PTR]], align 8
; IS__TUNIT____-NEXT: [[T1:%.*]] = load double, double* [[ARRAYIDX1]], align 8 ; CHECK-NEXT: [[T1:%.*]] = load double, double* [[ARRAYIDX1]], align 8
; IS__TUNIT____-NEXT: [[T2:%.*]] = load double, double* [[ARRAYIDX2]], align 8 ; CHECK-NEXT: [[T2:%.*]] = load double, double* [[ARRAYIDX2]], align 8
; IS__TUNIT____-NEXT: [[T3:%.*]] = load double, double* [[ARRAYIDX3]], align 8 ; CHECK-NEXT: [[T3:%.*]] = load double, double* [[ARRAYIDX3]], align 8
; IS__TUNIT____-NEXT: [[VECINIT0:%.*]] = insertelement <4 x double> undef, double [[T0]], i32 0 ; CHECK-NEXT: [[VECINIT0:%.*]] = insertelement <4 x double> undef, double [[T0]], i32 0
; IS__TUNIT____-NEXT: [[VECINIT1:%.*]] = insertelement <4 x double> [[VECINIT0]], double [[T1]], i32 1 ; CHECK-NEXT: [[VECINIT1:%.*]] = insertelement <4 x double> [[VECINIT0]], double [[T1]], i32 1
; IS__TUNIT____-NEXT: [[VECINIT2:%.*]] = insertelement <4 x double> [[VECINIT1]], double [[T2]], i32 2 ; CHECK-NEXT: [[VECINIT2:%.*]] = insertelement <4 x double> [[VECINIT1]], double [[T2]], i32 2
; IS__TUNIT____-NEXT: [[VECINIT3:%.*]] = insertelement <4 x double> [[VECINIT2]], double [[T3]], i32 3 ; CHECK-NEXT: [[VECINIT3:%.*]] = insertelement <4 x double> [[VECINIT2]], double [[T3]], i32 3
; IS__TUNIT____-NEXT: [[SHUFFLE:%.*]] = shufflevector <4 x double> [[VECINIT3]], <4 x double> [[VECINIT3]], <4 x i32> <i32 0, i32 0, i32 2, i32 2> ; CHECK-NEXT: [[SHUFFLE:%.*]] = shufflevector <4 x double> [[VECINIT3]], <4 x double> [[VECINIT3]], <4 x i32> <i32 0, i32 0, i32 2, i32 2>
; IS__TUNIT____-NEXT: ret <4 x double> [[SHUFFLE]] ; CHECK-NEXT: ret <4 x double> [[SHUFFLE]]
;
; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@PR21780
; IS__CGSCC____-SAME: (double* nocapture nofree noundef nonnull readonly align 8 dereferenceable(32) [[PTR:%.*]]) #[[ATTR0:[0-9]+]] {
; IS__CGSCC____-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds double, double* [[PTR]], i64 1
; IS__CGSCC____-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds double, double* [[PTR]], i64 2
; IS__CGSCC____-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds double, double* [[PTR]], i64 3
; IS__CGSCC____-NEXT: [[T0:%.*]] = load double, double* [[PTR]], align 8
; IS__CGSCC____-NEXT: [[T1:%.*]] = load double, double* [[ARRAYIDX1]], align 8
; IS__CGSCC____-NEXT: [[T2:%.*]] = load double, double* [[ARRAYIDX2]], align 8
; IS__CGSCC____-NEXT: [[T3:%.*]] = load double, double* [[ARRAYIDX3]], align 8
; IS__CGSCC____-NEXT: [[VECINIT0:%.*]] = insertelement <4 x double> undef, double [[T0]], i32 0
; IS__CGSCC____-NEXT: [[VECINIT1:%.*]] = insertelement <4 x double> [[VECINIT0]], double [[T1]], i32 1
; IS__CGSCC____-NEXT: [[VECINIT2:%.*]] = insertelement <4 x double> [[VECINIT1]], double [[T2]], i32 2
; IS__CGSCC____-NEXT: [[VECINIT3:%.*]] = insertelement <4 x double> [[VECINIT2]], double [[T3]], i32 3
; IS__CGSCC____-NEXT: [[SHUFFLE:%.*]] = shufflevector <4 x double> [[VECINIT3]], <4 x double> [[VECINIT3]], <4 x i32> <i32 0, i32 0, i32 2, i32 2>
; IS__CGSCC____-NEXT: ret <4 x double> [[SHUFFLE]]
; ;
; GEP of index 0 is simplified away. ; GEP of index 0 is simplified away.
%arrayidx1 = getelementptr inbounds double, double* %ptr, i64 1 %arrayidx1 = getelementptr inbounds double, double* %ptr, i64 1
%arrayidx2 = getelementptr inbounds double, double* %ptr, i64 2 %arrayidx2 = getelementptr inbounds double, double* %ptr, i64 2
%arrayidx3 = getelementptr inbounds double, double* %ptr, i64 3 %arrayidx3 = getelementptr inbounds double, double* %ptr, i64 3
%t0 = load double, double* %ptr, align 8 %t0 = load double, double* %ptr, align 8
%t1 = load double, double* %arrayidx1, align 8 %t1 = load double, double* %arrayidx1, align 8
%t2 = load double, double* %arrayidx2, align 8 %t2 = load double, double* %arrayidx2, align 8
%t3 = load double, double* %arrayidx3, align 8 %t3 = load double, double* %arrayidx3, align 8
%vecinit0 = insertelement <4 x double> undef, double %t0, i32 0 %vecinit0 = insertelement <4 x double> undef, double %t0, i32 0
%vecinit1 = insertelement <4 x double> %vecinit0, double %t1, i32 1 %vecinit1 = insertelement <4 x double> %vecinit0, double %t1, i32 1
%vecinit2 = insertelement <4 x double> %vecinit1, double %t2, i32 2 %vecinit2 = insertelement <4 x double> %vecinit1, double %t2, i32 2
%vecinit3 = insertelement <4 x double> %vecinit2, double %t3, i32 3 %vecinit3 = insertelement <4 x double> %vecinit2, double %t3, i32 3
%shuffle = shufflevector <4 x double> %vecinit3, <4 x double> %vecinit3, <4 x i32> <i32 0, i32 0, i32 2, i32 2> %shuffle = shufflevector <4 x double> %vecinit3, <4 x double> %vecinit3, <4 x i32> <i32 0, i32 0, i32 2, i32 2>
ret <4 x double> %shuffle ret <4 x double> %shuffle
} }
define double @PR21780_only_access3_with_inbounds(double* %ptr) { define double @PR21780_only_access3_with_inbounds(double* %ptr) {
; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind readonly willreturn ; CHECK: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@PR21780_only_access3_with_inbounds ; CHECK-LABEL: define {{[^@]+}}@PR21780_only_access3_with_inbounds
; IS__TUNIT____-SAME: (double* nocapture nofree nonnull readonly align 8 dereferenceable(32) [[PTR:%.*]]) #[[ATTR0]] { ; CHECK-SAME: (double* nocapture nofree nonnull readonly align 8 dereferenceable(32) [[PTR:%.*]]) #[[ATTR0]] {
; IS__TUNIT____-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds double, double* [[PTR]], i64 3 ; CHECK-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds double, double* [[PTR]], i64 3
; IS__TUNIT____-NEXT: [[T3:%.*]] = load double, double* [[ARRAYIDX3]], align 8 ; CHECK-NEXT: [[T3:%.*]] = load double, double* [[ARRAYIDX3]], align 8
; IS__TUNIT____-NEXT: ret double [[T3]] ; CHECK-NEXT: ret double [[T3]]
;
; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@PR21780_only_access3_with_inbounds
; IS__CGSCC____-SAME: (double* nocapture nofree nonnull readonly align 8 dereferenceable(32) [[PTR:%.*]]) #[[ATTR0]] {
; IS__CGSCC____-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds double, double* [[PTR]], i64 3
; IS__CGSCC____-NEXT: [[T3:%.*]] = load double, double* [[ARRAYIDX3]], align 8
; IS__CGSCC____-NEXT: ret double [[T3]]
; ;
%arrayidx3 = getelementptr inbounds double, double* %ptr, i64 3 %arrayidx3 = getelementptr inbounds double, double* %ptr, i64 3
%t3 = load double, double* %arrayidx3, align 8 %t3 = load double, double* %arrayidx3, align 8
ret double %t3 ret double %t3
} }
define double @PR21780_only_access3_without_inbounds(double* %ptr) { define double @PR21780_only_access3_without_inbounds(double* %ptr) {
; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind readonly willreturn ; CHECK: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@PR21780_only_access3_without_inbounds ; CHECK-LABEL: define {{[^@]+}}@PR21780_only_access3_without_inbounds
; IS__TUNIT____-SAME: (double* nocapture nofree readonly align 8 [[PTR:%.*]]) #[[ATTR0]] { ; CHECK-SAME: (double* nocapture nofree readonly align 8 [[PTR:%.*]]) #[[ATTR0]] {
; IS__TUNIT____-NEXT: [[ARRAYIDX3:%.*]] = getelementptr double, double* [[PTR]], i64 3 ; CHECK-NEXT: [[ARRAYIDX3:%.*]] = getelementptr double, double* [[PTR]], i64 3
; IS__TUNIT____-NEXT: [[T3:%.*]] = load double, double* [[ARRAYIDX3]], align 8 ; CHECK-NEXT: [[T3:%.*]] = load double, double* [[ARRAYIDX3]], align 8
; IS__TUNIT____-NEXT: ret double [[T3]] ; CHECK-NEXT: ret double [[T3]]
;
; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@PR21780_only_access3_without_inbounds
; IS__CGSCC____-SAME: (double* nocapture nofree readonly align 8 [[PTR:%.*]]) #[[ATTR0]] {
; IS__CGSCC____-NEXT: [[ARRAYIDX3:%.*]] = getelementptr double, double* [[PTR]], i64 3
; IS__CGSCC____-NEXT: [[T3:%.*]] = load double, double* [[ARRAYIDX3]], align 8
; IS__CGSCC____-NEXT: ret double [[T3]]
; ;
%arrayidx3 = getelementptr double, double* %ptr, i64 3 %arrayidx3 = getelementptr double, double* %ptr, i64 3
%t3 = load double, double* %arrayidx3, align 8 %t3 = load double, double* %arrayidx3, align 8
ret double %t3 ret double %t3
} }
define double @PR21780_without_inbounds(double* %ptr) { define double @PR21780_without_inbounds(double* %ptr) {
; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind readonly willreturn ; CHECK: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@PR21780_without_inbounds ; CHECK-LABEL: define {{[^@]+}}@PR21780_without_inbounds
; IS__TUNIT____-SAME: (double* nocapture nofree noundef nonnull readonly align 8 dereferenceable(32) [[PTR:%.*]]) #[[ATTR0]] { ; CHECK-SAME: (double* nocapture nofree noundef nonnull readonly align 8 dereferenceable(32) [[PTR:%.*]]) #[[ATTR0]] {
; IS__TUNIT____-NEXT: [[ARRAYIDX3:%.*]] = getelementptr double, double* [[PTR]], i64 3 ; CHECK-NEXT: [[ARRAYIDX3:%.*]] = getelementptr double, double* [[PTR]], i64 3
; IS__TUNIT____-NEXT: [[T3:%.*]] = load double, double* [[ARRAYIDX3]], align 8 ; CHECK-NEXT: [[T3:%.*]] = load double, double* [[ARRAYIDX3]], align 8
; IS__TUNIT____-NEXT: ret double [[T3]] ; CHECK-NEXT: ret double [[T3]]
;
; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@PR21780_without_inbounds
; IS__CGSCC____-SAME: (double* nocapture nofree noundef nonnull readonly align 8 dereferenceable(32) [[PTR:%.*]]) #[[ATTR0]] {
; IS__CGSCC____-NEXT: [[ARRAYIDX3:%.*]] = getelementptr double, double* [[PTR]], i64 3
; IS__CGSCC____-NEXT: [[T3:%.*]] = load double, double* [[ARRAYIDX3]], align 8
; IS__CGSCC____-NEXT: ret double [[T3]]
; ;
%arrayidx1 = getelementptr double, double* %ptr, i64 1 %arrayidx1 = getelementptr double, double* %ptr, i64 1
%arrayidx2 = getelementptr double, double* %ptr, i64 2 %arrayidx2 = getelementptr double, double* %ptr, i64 2
%arrayidx3 = getelementptr double, double* %ptr, i64 3 %arrayidx3 = getelementptr double, double* %ptr, i64 3
%t0 = load double, double* %ptr, align 8 %t0 = load double, double* %ptr, align 8
%t1 = load double, double* %arrayidx1, align 8 %t1 = load double, double* %arrayidx1, align 8
%t2 = load double, double* %arrayidx2, align 8 %t2 = load double, double* %arrayidx2, align 8
%t3 = load double, double* %arrayidx3, align 8 %t3 = load double, double* %arrayidx3, align 8
ret double %t3 ret double %t3
} }
; Unsimplified, but still valid. Also, throw in some bogus arguments. ; Unsimplified, but still valid. Also, throw in some bogus arguments.
define void @gep0(i8* %unused, i8* %other, i8* %ptr) { define void @gep0(i8* %unused, i8* %other, i8* %ptr) {
; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind willreturn ; CHECK: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@gep0 ; CHECK-LABEL: define {{[^@]+}}@gep0
; IS__TUNIT____-SAME: (i8* nocapture nofree readnone [[UNUSED:%.*]], i8* nocapture nofree noundef nonnull writeonly dereferenceable(1) [[OTHER:%.*]], i8* nocapture nofree nonnull readonly dereferenceable(3) [[PTR:%.*]]) #[[ATTR1:[0-9]+]] { ; CHECK-SAME: (i8* nocapture nofree readnone [[UNUSED:%.*]], i8* nocapture nofree noundef nonnull writeonly dereferenceable(1) [[OTHER:%.*]], i8* nocapture nofree nonnull readonly dereferenceable(3) [[PTR:%.*]]) #[[ATTR1:[0-9]+]] {
; IS__TUNIT____-NEXT: [[ARRAYIDX2:%.*]] = getelementptr i8, i8* [[PTR]], i64 2 ; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr i8, i8* [[PTR]], i64 2
; IS__TUNIT____-NEXT: [[T2:%.*]] = load i8, i8* [[ARRAYIDX2]], align 1 ; CHECK-NEXT: [[T2:%.*]] = load i8, i8* [[ARRAYIDX2]], align 1
; IS__TUNIT____-NEXT: store i8 [[T2]], i8* [[OTHER]], align 1 ; CHECK-NEXT: store i8 [[T2]], i8* [[OTHER]], align 1
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@gep0
; IS__CGSCC____-SAME: (i8* nocapture nofree readnone [[UNUSED:%.*]], i8* nocapture nofree noundef nonnull writeonly dereferenceable(1) [[OTHER:%.*]], i8* nocapture nofree nonnull readonly dereferenceable(3) [[PTR:%.*]]) #[[ATTR1:[0-9]+]] {
; IS__CGSCC____-NEXT: [[ARRAYIDX2:%.*]] = getelementptr i8, i8* [[PTR]], i64 2
; IS__CGSCC____-NEXT: [[T2:%.*]] = load i8, i8* [[ARRAYIDX2]], align 1
; IS__CGSCC____-NEXT: store i8 [[T2]], i8* [[OTHER]], align 1
; IS__CGSCC____-NEXT: ret void
; ;
%arrayidx0 = getelementptr i8, i8* %ptr, i64 0 %arrayidx0 = getelementptr i8, i8* %ptr, i64 0
%arrayidx1 = getelementptr i8, i8* %ptr, i64 1 %arrayidx1 = getelementptr i8, i8* %ptr, i64 1
%arrayidx2 = getelementptr i8, i8* %ptr, i64 2 %arrayidx2 = getelementptr i8, i8* %ptr, i64 2
%t0 = load i8, i8* %arrayidx0 %t0 = load i8, i8* %arrayidx0
%t1 = load i8, i8* %arrayidx1 %t1 = load i8, i8* %arrayidx1
%t2 = load i8, i8* %arrayidx2 %t2 = load i8, i8* %arrayidx2
store i8 %t2, i8* %other store i8 %t2, i8* %other
ret void ret void
} }
; Order of accesses does not change computation. ; Order of accesses does not change computation.
; Multiple arguments may be dereferenceable. ; Multiple arguments may be dereferenceable.
define void @ordering(i8* %ptr1, i32* %ptr2) { define void @ordering(i8* %ptr1, i32* %ptr2) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@ordering ; CHECK-LABEL: define {{[^@]+}}@ordering
; IS__TUNIT____-SAME: (i8* nocapture nofree nonnull readnone dereferenceable(3) [[PTR1:%.*]], i32* nocapture nofree nonnull readnone align 4 dereferenceable(8) [[PTR2:%.*]]) #[[ATTR2:[0-9]+]] { ; CHECK-SAME: (i8* nocapture nofree nonnull readnone dereferenceable(3) [[PTR1:%.*]], i32* nocapture nofree nonnull readnone align 4 dereferenceable(8) [[PTR2:%.*]]) #[[ATTR2:[0-9]+]] {
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@ordering
; IS__CGSCC____-SAME: (i8* nocapture nofree nonnull readnone dereferenceable(3) [[PTR1:%.*]], i32* nocapture nofree nonnull readnone align 4 dereferenceable(8) [[PTR2:%.*]]) #[[ATTR2:[0-9]+]] {
; IS__CGSCC____-NEXT: ret void
; ;
%a20 = getelementptr i32, i32* %ptr2, i64 0 %a20 = getelementptr i32, i32* %ptr2, i64 0
%a12 = getelementptr i8, i8* %ptr1, i64 2 %a12 = getelementptr i8, i8* %ptr1, i64 2
%t12 = load i8, i8* %a12 %t12 = load i8, i8* %a12
%a11 = getelementptr i8, i8* %ptr1, i64 1 %a11 = getelementptr i8, i8* %ptr1, i64 1
%t20 = load i32, i32* %a20 %t20 = load i32, i32* %a20
%a10 = getelementptr i8, i8* %ptr1, i64 0 %a10 = getelementptr i8, i8* %ptr1, i64 0
%t10 = load i8, i8* %a10 %t10 = load i8, i8* %a10
%t11 = load i8, i8* %a11 %t11 = load i8, i8* %a11
%a21 = getelementptr i32, i32* %ptr2, i64 1 %a21 = getelementptr i32, i32* %ptr2, i64 1
%t21 = load i32, i32* %a21 %t21 = load i32, i32* %a21
ret void ret void
} }
; Not in entry block. ; Not in entry block.
define void @not_entry_but_guaranteed_to_execute(i8* %ptr) { define void @not_entry_but_guaranteed_to_execute(i8* %ptr) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@not_entry_but_guaranteed_to_execute ; CHECK-LABEL: define {{[^@]+}}@not_entry_but_guaranteed_to_execute
; IS__TUNIT____-SAME: (i8* nocapture nofree nonnull readnone dereferenceable(3) [[PTR:%.*]]) #[[ATTR2]] { ; CHECK-SAME: (i8* nocapture nofree nonnull readnone dereferenceable(3) [[PTR:%.*]]) #[[ATTR2]] {
; IS__TUNIT____-NEXT: entry: ; CHECK-NEXT: entry:
; IS__TUNIT____-NEXT: br label [[EXIT:%.*]] ; CHECK-NEXT: br label [[EXIT:%.*]]
; IS__TUNIT____: exit: ; CHECK: exit:
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@not_entry_but_guaranteed_to_execute
; IS__CGSCC____-SAME: (i8* nocapture nofree nonnull readnone dereferenceable(3) [[PTR:%.*]]) #[[ATTR2]] {
; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: br label [[EXIT:%.*]]
; IS__CGSCC____: exit:
; IS__CGSCC____-NEXT: ret void
; ;
entry: entry:
br label %exit br label %exit
exit: exit:
%arrayidx0 = getelementptr i8, i8* %ptr, i64 0 %arrayidx0 = getelementptr i8, i8* %ptr, i64 0
%arrayidx1 = getelementptr i8, i8* %ptr, i64 1 %arrayidx1 = getelementptr i8, i8* %ptr, i64 1
%arrayidx2 = getelementptr i8, i8* %ptr, i64 2 %arrayidx2 = getelementptr i8, i8* %ptr, i64 2
%t0 = load i8, i8* %arrayidx0 %t0 = load i8, i8* %arrayidx0
%t1 = load i8, i8* %arrayidx1 %t1 = load i8, i8* %arrayidx1
%t2 = load i8, i8* %arrayidx2 %t2 = load i8, i8* %arrayidx2
ret void ret void
} }
; Not in entry block and not guaranteed to execute. ; Not in entry block and not guaranteed to execute.
define void @not_entry_not_guaranteed_to_execute(i8* %ptr, i1 %cond) { define void @not_entry_not_guaranteed_to_execute(i8* %ptr, i1 %cond) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@not_entry_not_guaranteed_to_execute ; CHECK-LABEL: define {{[^@]+}}@not_entry_not_guaranteed_to_execute
; IS__TUNIT____-SAME: (i8* nocapture nofree readnone [[PTR:%.*]], i1 [[COND:%.*]]) #[[ATTR2]] { ; CHECK-SAME: (i8* nocapture nofree readnone [[PTR:%.*]], i1 [[COND:%.*]]) #[[ATTR2]] {
; IS__TUNIT____-NEXT: entry: ; CHECK-NEXT: entry:
; IS__TUNIT____-NEXT: br i1 [[COND]], label [[LOADS:%.*]], label [[EXIT:%.*]] ; CHECK-NEXT: br i1 [[COND]], label [[LOADS:%.*]], label [[EXIT:%.*]]
; IS__TUNIT____: loads: ; CHECK: loads:
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
; IS__TUNIT____: exit: ; CHECK: exit:
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@not_entry_not_guaranteed_to_execute
; IS__CGSCC____-SAME: (i8* nocapture nofree readnone [[PTR:%.*]], i1 [[COND:%.*]]) #[[ATTR2]] {
; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: br i1 [[COND]], label [[LOADS:%.*]], label [[EXIT:%.*]]
; IS__CGSCC____: loads:
; IS__CGSCC____-NEXT: ret void
; IS__CGSCC____: exit:
; IS__CGSCC____-NEXT: ret void
; ;
entry: entry:
br i1 %cond, label %loads, label %exit br i1 %cond, label %loads, label %exit
loads: loads:
%arrayidx0 = getelementptr i8, i8* %ptr, i64 0 %arrayidx0 = getelementptr i8, i8* %ptr, i64 0
%arrayidx1 = getelementptr i8, i8* %ptr, i64 1 %arrayidx1 = getelementptr i8, i8* %ptr, i64 1
%arrayidx2 = getelementptr i8, i8* %ptr, i64 2 %arrayidx2 = getelementptr i8, i8* %ptr, i64 2
%t0 = load i8, i8* %arrayidx0 %t0 = load i8, i8* %arrayidx0
%t1 = load i8, i8* %arrayidx1 %t1 = load i8, i8* %arrayidx1
%t2 = load i8, i8* %arrayidx2 %t2 = load i8, i8* %arrayidx2
ret void ret void
exit: exit:
ret void ret void
} }
; The last load may not execute, so derefenceable bytes only covers the 1st two loads. ; The last load may not execute, so derefenceable bytes only covers the 1st two loads.
define void @partial_in_entry(i16* %ptr, i1 %cond) { define void @partial_in_entry(i16* %ptr, i1 %cond) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@partial_in_entry ; CHECK-LABEL: define {{[^@]+}}@partial_in_entry
; IS__TUNIT____-SAME: (i16* nocapture nofree nonnull readnone align 2 dereferenceable(4) [[PTR:%.*]], i1 [[COND:%.*]]) #[[ATTR2]] { ; CHECK-SAME: (i16* nocapture nofree nonnull readnone align 2 dereferenceable(4) [[PTR:%.*]], i1 [[COND:%.*]]) #[[ATTR2]] {
; IS__TUNIT____-NEXT: entry: ; CHECK-NEXT: entry:
; IS__TUNIT____-NEXT: br i1 [[COND]], label [[LOADS:%.*]], label [[EXIT:%.*]] ; CHECK-NEXT: br i1 [[COND]], label [[LOADS:%.*]], label [[EXIT:%.*]]
; IS__TUNIT____: loads: ; CHECK: loads:
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
; IS__TUNIT____: exit: ; CHECK: exit:
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@partial_in_entry
; IS__CGSCC____-SAME: (i16* nocapture nofree nonnull readnone align 2 dereferenceable(4) [[PTR:%.*]], i1 [[COND:%.*]]) #[[ATTR2]] {
; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: br i1 [[COND]], label [[LOADS:%.*]], label [[EXIT:%.*]]
; IS__CGSCC____: loads:
; IS__CGSCC____-NEXT: ret void
; IS__CGSCC____: exit:
; IS__CGSCC____-NEXT: ret void
; ;
entry: entry:
%arrayidx0 = getelementptr i16, i16* %ptr, i64 0 %arrayidx0 = getelementptr i16, i16* %ptr, i64 0
%arrayidx1 = getelementptr i16, i16* %ptr, i64 1 %arrayidx1 = getelementptr i16, i16* %ptr, i64 1
%arrayidx2 = getelementptr i16, i16* %ptr, i64 2 %arrayidx2 = getelementptr i16, i16* %ptr, i64 2
%t0 = load i16, i16* %arrayidx0 %t0 = load i16, i16* %arrayidx0
%t1 = load i16, i16* %arrayidx1 %t1 = load i16, i16* %arrayidx1
br i1 %cond, label %loads, label %exit br i1 %cond, label %loads, label %exit
loads: loads:
%t2 = load i16, i16* %arrayidx2 %t2 = load i16, i16* %arrayidx2
ret void ret void
exit: exit:
ret void ret void
} }
; The volatile load can't be used to prove a non-volatile access is allowed. ; The volatile load can't be used to prove a non-volatile access is allowed.
; The 2nd and 3rd loads may never execute. ; The 2nd and 3rd loads may never execute.
define void @volatile_is_not_dereferenceable(i16* %ptr) { define void @volatile_is_not_dereferenceable(i16* %ptr) {
; IS__TUNIT____: Function Attrs: argmemonly nofree nounwind willreturn ; CHECK: Function Attrs: argmemonly nofree norecurse nounwind willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@volatile_is_not_dereferenceable ; CHECK-LABEL: define {{[^@]+}}@volatile_is_not_dereferenceable
; IS__TUNIT____-SAME: (i16* nofree align 2 [[PTR:%.*]]) #[[ATTR3:[0-9]+]] { ; CHECK-SAME: (i16* nofree align 2 [[PTR:%.*]]) #[[ATTR3:[0-9]+]] {
; IS__TUNIT____-NEXT: [[T0:%.*]] = load volatile i16, i16* [[PTR]], align 2 ; CHECK-NEXT: [[T0:%.*]] = load volatile i16, i16* [[PTR]], align 2
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@volatile_is_not_dereferenceable
; IS__CGSCC____-SAME: (i16* nofree align 2 [[PTR:%.*]]) #[[ATTR3:[0-9]+]] {
; IS__CGSCC____-NEXT: [[T0:%.*]] = load volatile i16, i16* [[PTR]], align 2
; IS__CGSCC____-NEXT: ret void
; ;
%arrayidx0 = getelementptr i16, i16* %ptr, i64 0 %arrayidx0 = getelementptr i16, i16* %ptr, i64 0
%arrayidx1 = getelementptr i16, i16* %ptr, i64 1 %arrayidx1 = getelementptr i16, i16* %ptr, i64 1
%arrayidx2 = getelementptr i16, i16* %ptr, i64 2 %arrayidx2 = getelementptr i16, i16* %ptr, i64 2
%t0 = load volatile i16, i16* %arrayidx0 %t0 = load volatile i16, i16* %arrayidx0
%t1 = load i16, i16* %arrayidx1 %t1 = load i16, i16* %arrayidx1
%t2 = load i16, i16* %arrayidx2 %t2 = load i16, i16* %arrayidx2
ret void ret void
} }
; TODO: We should allow inference for atomic (but not volatile) ops. ; TODO: We should allow inference for atomic (but not volatile) ops.
define void @atomic_is_alright(i16* %ptr) { define void @atomic_is_alright(i16* %ptr) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@atomic_is_alright ; CHECK-LABEL: define {{[^@]+}}@atomic_is_alright
; IS__TUNIT____-SAME: (i16* nocapture nofree nonnull readnone align 2 dereferenceable(6) [[PTR:%.*]]) #[[ATTR2]] { ; CHECK-SAME: (i16* nocapture nofree nonnull readnone align 2 dereferenceable(6) [[PTR:%.*]]) #[[ATTR2]] {
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@atomic_is_alright
; IS__CGSCC____-SAME: (i16* nocapture nofree nonnull readnone align 2 dereferenceable(6) [[PTR:%.*]]) #[[ATTR2]] {
; IS__CGSCC____-NEXT: ret void
; ;
%arrayidx0 = getelementptr i16, i16* %ptr, i64 0 %arrayidx0 = getelementptr i16, i16* %ptr, i64 0
%arrayidx1 = getelementptr i16, i16* %ptr, i64 1 %arrayidx1 = getelementptr i16, i16* %ptr, i64 1
%arrayidx2 = getelementptr i16, i16* %ptr, i64 2 %arrayidx2 = getelementptr i16, i16* %ptr, i64 2
%t0 = load atomic i16, i16* %arrayidx0 unordered, align 2 %t0 = load atomic i16, i16* %arrayidx0 unordered, align 2
%t1 = load i16, i16* %arrayidx1 %t1 = load i16, i16* %arrayidx1
%t2 = load i16, i16* %arrayidx2 %t2 = load i16, i16* %arrayidx2
ret void ret void
Show All 15 Lines;
%t1 = load i16, i16* %arrayidx1 %t1 = load i16, i16* %arrayidx1
%t2 = load i16, i16* %arrayidx2 %t2 = load i16, i16* %arrayidx2
ret void ret void
} }
; We must have consecutive accesses. ; We must have consecutive accesses.
define void @variable_gep_index(i8* %unused, i8* %ptr, i64 %variable_index) { define void @variable_gep_index(i8* %unused, i8* %ptr, i64 %variable_index) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@variable_gep_index ; CHECK-LABEL: define {{[^@]+}}@variable_gep_index
; IS__TUNIT____-SAME: (i8* nocapture nofree readnone [[UNUSED:%.*]], i8* nocapture nofree nonnull readnone dereferenceable(1) [[PTR:%.*]], i64 [[VARIABLE_INDEX:%.*]]) #[[ATTR2]] { ; CHECK-SAME: (i8* nocapture nofree readnone [[UNUSED:%.*]], i8* nocapture nofree nonnull readnone dereferenceable(1) [[PTR:%.*]], i64 [[VARIABLE_INDEX:%.*]]) #[[ATTR2]] {
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@variable_gep_index
; IS__CGSCC____-SAME: (i8* nocapture nofree readnone [[UNUSED:%.*]], i8* nocapture nofree nonnull readnone dereferenceable(1) [[PTR:%.*]], i64 [[VARIABLE_INDEX:%.*]]) #[[ATTR2]] {
; IS__CGSCC____-NEXT: ret void
; ;
%arrayidx1 = getelementptr i8, i8* %ptr, i64 %variable_index %arrayidx1 = getelementptr i8, i8* %ptr, i64 %variable_index
%arrayidx2 = getelementptr i8, i8* %ptr, i64 2 %arrayidx2 = getelementptr i8, i8* %ptr, i64 2
%t0 = load i8, i8* %ptr %t0 = load i8, i8* %ptr
%t1 = load i8, i8* %arrayidx1 %t1 = load i8, i8* %arrayidx1
%t2 = load i8, i8* %arrayidx2 %t2 = load i8, i8* %arrayidx2
ret void ret void
} }
; Deal with >1 GEP index. ; Deal with >1 GEP index.
define void @multi_index_gep(<4 x i8>* %ptr) { define void @multi_index_gep(<4 x i8>* %ptr) {
; FIXME: %ptr should be dereferenceable(4) ; FIXME: %ptr should be dereferenceable(4)
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@multi_index_gep ; CHECK-LABEL: define {{[^@]+}}@multi_index_gep
; IS__TUNIT____-SAME: (<4 x i8>* nocapture nofree nonnull readnone dereferenceable(1) [[PTR:%.*]]) #[[ATTR2]] { ; CHECK-SAME: (<4 x i8>* nocapture nofree nonnull readnone dereferenceable(1) [[PTR:%.*]]) #[[ATTR2]] {
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@multi_index_gep
; IS__CGSCC____-SAME: (<4 x i8>* nocapture nofree nonnull readnone dereferenceable(1) [[PTR:%.*]]) #[[ATTR2]] {
; IS__CGSCC____-NEXT: ret void
; ;
%arrayidx00 = getelementptr <4 x i8>, <4 x i8>* %ptr, i64 0, i64 0 %arrayidx00 = getelementptr <4 x i8>, <4 x i8>* %ptr, i64 0, i64 0
%t0 = load i8, i8* %arrayidx00 %t0 = load i8, i8* %arrayidx00
ret void ret void
} }
; Could round weird bitwidths down? ; Could round weird bitwidths down?
define void @not_byte_multiple(i9* %ptr) { define void @not_byte_multiple(i9* %ptr) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@not_byte_multiple ; CHECK-LABEL: define {{[^@]+}}@not_byte_multiple
; IS__TUNIT____-SAME: (i9* nocapture nofree nonnull readnone align 2 dereferenceable(2) [[PTR:%.*]]) #[[ATTR2]] { ; CHECK-SAME: (i9* nocapture nofree nonnull readnone align 2 dereferenceable(2) [[PTR:%.*]]) #[[ATTR2]] {
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@not_byte_multiple
; IS__CGSCC____-SAME: (i9* nocapture nofree nonnull readnone align 2 dereferenceable(2) [[PTR:%.*]]) #[[ATTR2]] {
; IS__CGSCC____-NEXT: ret void
; ;
%arrayidx0 = getelementptr i9, i9* %ptr, i64 0 %arrayidx0 = getelementptr i9, i9* %ptr, i64 0
%t0 = load i9, i9* %arrayidx0 %t0 = load i9, i9* %arrayidx0
ret void ret void
} }
; Missing direct access from the pointer. ; Missing direct access from the pointer.
define void @no_pointer_deref(i16* %ptr) { define void @no_pointer_deref(i16* %ptr) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@no_pointer_deref ; CHECK-LABEL: define {{[^@]+}}@no_pointer_deref
; IS__TUNIT____-SAME: (i16* nocapture nofree readnone align 2 [[PTR:%.*]]) #[[ATTR2]] { ; CHECK-SAME: (i16* nocapture nofree readnone align 2 [[PTR:%.*]]) #[[ATTR2]] {
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@no_pointer_deref
; IS__CGSCC____-SAME: (i16* nocapture nofree readnone align 2 [[PTR:%.*]]) #[[ATTR2]] {
; IS__CGSCC____-NEXT: ret void
; ;
%arrayidx1 = getelementptr i16, i16* %ptr, i64 1 %arrayidx1 = getelementptr i16, i16* %ptr, i64 1
%arrayidx2 = getelementptr i16, i16* %ptr, i64 2 %arrayidx2 = getelementptr i16, i16* %ptr, i64 2
%t1 = load i16, i16* %arrayidx1 %t1 = load i16, i16* %arrayidx1
%t2 = load i16, i16* %arrayidx2 %t2 = load i16, i16* %arrayidx2
ret void ret void
} }
; Out-of-order is ok, but missing access concludes dereferenceable range. ; Out-of-order is ok, but missing access concludes dereferenceable range.
define void @non_consecutive(i32* %ptr) { define void @non_consecutive(i32* %ptr) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@non_consecutive ; CHECK-LABEL: define {{[^@]+}}@non_consecutive
; IS__TUNIT____-SAME: (i32* nocapture nofree nonnull readnone align 4 dereferenceable(8) [[PTR:%.*]]) #[[ATTR2]] { ; CHECK-SAME: (i32* nocapture nofree nonnull readnone align 4 dereferenceable(8) [[PTR:%.*]]) #[[ATTR2]] {
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@non_consecutive
; IS__CGSCC____-SAME: (i32* nocapture nofree nonnull readnone align 4 dereferenceable(8) [[PTR:%.*]]) #[[ATTR2]] {
; IS__CGSCC____-NEXT: ret void
; ;
%arrayidx1 = getelementptr i32, i32* %ptr, i64 1 %arrayidx1 = getelementptr i32, i32* %ptr, i64 1
%arrayidx0 = getelementptr i32, i32* %ptr, i64 0 %arrayidx0 = getelementptr i32, i32* %ptr, i64 0
%arrayidx3 = getelementptr i32, i32* %ptr, i64 3 %arrayidx3 = getelementptr i32, i32* %ptr, i64 3
%t1 = load i32, i32* %arrayidx1 %t1 = load i32, i32* %arrayidx1
%t0 = load i32, i32* %arrayidx0 %t0 = load i32, i32* %arrayidx0
%t3 = load i32, i32* %arrayidx3 %t3 = load i32, i32* %arrayidx3
ret void ret void
} }
; Improve on existing dereferenceable attribute. ; Improve on existing dereferenceable attribute.
define void @more_bytes(i32* dereferenceable(8) %ptr) { define void @more_bytes(i32* dereferenceable(8) %ptr) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@more_bytes ; CHECK-LABEL: define {{[^@]+}}@more_bytes
; IS__TUNIT____-SAME: (i32* nocapture nofree nonnull readnone align 4 dereferenceable(16) [[PTR:%.*]]) #[[ATTR2]] { ; CHECK-SAME: (i32* nocapture nofree nonnull readnone align 4 dereferenceable(16) [[PTR:%.*]]) #[[ATTR2]] {
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@more_bytes
; IS__CGSCC____-SAME: (i32* nocapture nofree nonnull readnone align 4 dereferenceable(16) [[PTR:%.*]]) #[[ATTR2]] {
; IS__CGSCC____-NEXT: ret void
; ;
%arrayidx3 = getelementptr i32, i32* %ptr, i64 3 %arrayidx3 = getelementptr i32, i32* %ptr, i64 3
%arrayidx1 = getelementptr i32, i32* %ptr, i64 1 %arrayidx1 = getelementptr i32, i32* %ptr, i64 1
%arrayidx0 = getelementptr i32, i32* %ptr, i64 0 %arrayidx0 = getelementptr i32, i32* %ptr, i64 0
%arrayidx2 = getelementptr i32, i32* %ptr, i64 2 %arrayidx2 = getelementptr i32, i32* %ptr, i64 2
%t3 = load i32, i32* %arrayidx3 %t3 = load i32, i32* %arrayidx3
%t1 = load i32, i32* %arrayidx1 %t1 = load i32, i32* %arrayidx1
%t2 = load i32, i32* %arrayidx2 %t2 = load i32, i32* %arrayidx2
%t0 = load i32, i32* %arrayidx0 %t0 = load i32, i32* %arrayidx0
ret void ret void
} }
; Improve on existing dereferenceable_or_null attribute. ; Improve on existing dereferenceable_or_null attribute.
define void @more_bytes_and_not_null(i32* dereferenceable_or_null(8) %ptr) { define void @more_bytes_and_not_null(i32* dereferenceable_or_null(8) %ptr) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@more_bytes_and_not_null ; CHECK-LABEL: define {{[^@]+}}@more_bytes_and_not_null
; IS__TUNIT____-SAME: (i32* nocapture nofree nonnull readnone align 4 dereferenceable(16) [[PTR:%.*]]) #[[ATTR2]] { ; CHECK-SAME: (i32* nocapture nofree nonnull readnone align 4 dereferenceable(16) [[PTR:%.*]]) #[[ATTR2]] {
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@more_bytes_and_not_null
; IS__CGSCC____-SAME: (i32* nocapture nofree nonnull readnone align 4 dereferenceable(16) [[PTR:%.*]]) #[[ATTR2]] {
; IS__CGSCC____-NEXT: ret void
; ;
%arrayidx3 = getelementptr i32, i32* %ptr, i64 3 %arrayidx3 = getelementptr i32, i32* %ptr, i64 3
%arrayidx1 = getelementptr i32, i32* %ptr, i64 1 %arrayidx1 = getelementptr i32, i32* %ptr, i64 1
%arrayidx0 = getelementptr i32, i32* %ptr, i64 0 %arrayidx0 = getelementptr i32, i32* %ptr, i64 0
%arrayidx2 = getelementptr i32, i32* %ptr, i64 2 %arrayidx2 = getelementptr i32, i32* %ptr, i64 2
%t3 = load i32, i32* %arrayidx3 %t3 = load i32, i32* %arrayidx3
%t1 = load i32, i32* %arrayidx1 %t1 = load i32, i32* %arrayidx1
%t2 = load i32, i32* %arrayidx2 %t2 = load i32, i32* %arrayidx2
%t0 = load i32, i32* %arrayidx0 %t0 = load i32, i32* %arrayidx0
ret void ret void
} }
; But don't pessimize existing dereferenceable attribute. ; But don't pessimize existing dereferenceable attribute.
define void @better_bytes(i32* dereferenceable(100) %ptr) { define void @better_bytes(i32* dereferenceable(100) %ptr) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@better_bytes ; CHECK-LABEL: define {{[^@]+}}@better_bytes
; IS__TUNIT____-SAME: (i32* nocapture nofree nonnull readnone align 4 dereferenceable(100) [[PTR:%.*]]) #[[ATTR2]] { ; CHECK-SAME: (i32* nocapture nofree nonnull readnone align 4 dereferenceable(100) [[PTR:%.*]]) #[[ATTR2]] {
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@better_bytes
; IS__CGSCC____-SAME: (i32* nocapture nofree nonnull readnone align 4 dereferenceable(100) [[PTR:%.*]]) #[[ATTR2]] {
; IS__CGSCC____-NEXT: ret void
; ;
%arrayidx3 = getelementptr i32, i32* %ptr, i64 3 %arrayidx3 = getelementptr i32, i32* %ptr, i64 3
%arrayidx1 = getelementptr i32, i32* %ptr, i64 1 %arrayidx1 = getelementptr i32, i32* %ptr, i64 1
%arrayidx0 = getelementptr i32, i32* %ptr, i64 0 %arrayidx0 = getelementptr i32, i32* %ptr, i64 0
%arrayidx2 = getelementptr i32, i32* %ptr, i64 2 %arrayidx2 = getelementptr i32, i32* %ptr, i64 2
%t3 = load i32, i32* %arrayidx3 %t3 = load i32, i32* %arrayidx3
%t1 = load i32, i32* %arrayidx1 %t1 = load i32, i32* %arrayidx1
%t2 = load i32, i32* %arrayidx2 %t2 = load i32, i32* %arrayidx2
%t0 = load i32, i32* %arrayidx0 %t0 = load i32, i32* %arrayidx0
ret void ret void
} }
define void @bitcast(i32* %arg) { define void @bitcast(i32* %arg) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@bitcast ; CHECK-LABEL: define {{[^@]+}}@bitcast
; IS__TUNIT____-SAME: (i32* nocapture nofree nonnull readnone align 4 dereferenceable(8) [[ARG:%.*]]) #[[ATTR2]] { ; CHECK-SAME: (i32* nocapture nofree nonnull readnone align 4 dereferenceable(8) [[ARG:%.*]]) #[[ATTR2]] {
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@bitcast
; IS__CGSCC____-SAME: (i32* nocapture nofree nonnull readnone align 4 dereferenceable(8) [[ARG:%.*]]) #[[ATTR2]] {
; IS__CGSCC____-NEXT: ret void
; ;
%ptr = bitcast i32* %arg to float* %ptr = bitcast i32* %arg to float*
%arrayidx0 = getelementptr float, float* %ptr, i64 0 %arrayidx0 = getelementptr float, float* %ptr, i64 0
%arrayidx1 = getelementptr float, float* %ptr, i64 1 %arrayidx1 = getelementptr float, float* %ptr, i64 1
%t0 = load float, float* %arrayidx0 %t0 = load float, float* %arrayidx0
%t1 = load float, float* %arrayidx1 %t1 = load float, float* %arrayidx1
ret void ret void
} }
define void @bitcast_different_sizes(double* %arg1, i8* %arg2) { define void @bitcast_different_sizes(double* %arg1, i8* %arg2) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@bitcast_different_sizes ; CHECK-LABEL: define {{[^@]+}}@bitcast_different_sizes
; IS__TUNIT____-SAME: (double* nocapture nofree nonnull readnone align 4 dereferenceable(12) [[ARG1:%.*]], i8* nocapture nofree nonnull readnone align 4 dereferenceable(16) [[ARG2:%.*]]) #[[ATTR2]] { ; CHECK-SAME: (double* nocapture nofree nonnull readnone align 4 dereferenceable(12) [[ARG1:%.*]], i8* nocapture nofree nonnull readnone align 4 dereferenceable(16) [[ARG2:%.*]]) #[[ATTR2]] {
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@bitcast_different_sizes
; IS__CGSCC____-SAME: (double* nocapture nofree nonnull readnone align 4 dereferenceable(12) [[ARG1:%.*]], i8* nocapture nofree nonnull readnone align 4 dereferenceable(16) [[ARG2:%.*]]) #[[ATTR2]] {
; IS__CGSCC____-NEXT: ret void
; ;
%ptr1 = bitcast double* %arg1 to float* %ptr1 = bitcast double* %arg1 to float*
%a10 = getelementptr float, float* %ptr1, i64 0 %a10 = getelementptr float, float* %ptr1, i64 0
%a11 = getelementptr float, float* %ptr1, i64 1 %a11 = getelementptr float, float* %ptr1, i64 1
%a12 = getelementptr float, float* %ptr1, i64 2 %a12 = getelementptr float, float* %ptr1, i64 2
%ld10 = load float, float* %a10 %ld10 = load float, float* %a10
%ld11 = load float, float* %a11 %ld11 = load float, float* %a11
%ld12 = load float, float* %a12 %ld12 = load float, float* %a12
%ptr2 = bitcast i8* %arg2 to i64* %ptr2 = bitcast i8* %arg2 to i64*
%a20 = getelementptr i64, i64* %ptr2, i64 0 %a20 = getelementptr i64, i64* %ptr2, i64 0
%a21 = getelementptr i64, i64* %ptr2, i64 1 %a21 = getelementptr i64, i64* %ptr2, i64 1
%ld20 = load i64, i64* %a20 %ld20 = load i64, i64* %a20
%ld21 = load i64, i64* %a21 %ld21 = load i64, i64* %a21
ret void ret void
} }
define void @negative_offset(i32* %arg) { define void @negative_offset(i32* %arg) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@negative_offset ; CHECK-LABEL: define {{[^@]+}}@negative_offset
; IS__TUNIT____-SAME: (i32* nocapture nofree nonnull readnone align 4 dereferenceable(4) [[ARG:%.*]]) #[[ATTR2]] { ; CHECK-SAME: (i32* nocapture nofree nonnull readnone align 4 dereferenceable(4) [[ARG:%.*]]) #[[ATTR2]] {
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@negative_offset
; IS__CGSCC____-SAME: (i32* nocapture nofree nonnull readnone align 4 dereferenceable(4) [[ARG:%.*]]) #[[ATTR2]] {
; IS__CGSCC____-NEXT: ret void
; ;
%ptr = bitcast i32* %arg to float* %ptr = bitcast i32* %arg to float*
%arrayidx0 = getelementptr float, float* %ptr, i64 0 %arrayidx0 = getelementptr float, float* %ptr, i64 0
%arrayidx1 = getelementptr float, float* %ptr, i64 -1 %arrayidx1 = getelementptr float, float* %ptr, i64 -1
%t0 = load float, float* %arrayidx0 %t0 = load float, float* %arrayidx0
%t1 = load float, float* %arrayidx1 %t1 = load float, float* %arrayidx1
ret void ret void
} }
define void @stores(i32* %arg) { define void @stores(i32* %arg) {
; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind willreturn writeonly ; CHECK: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__TUNIT____-LABEL: define {{[^@]+}}@stores ; CHECK-LABEL: define {{[^@]+}}@stores
; IS__TUNIT____-SAME: (i32* nocapture nofree nonnull writeonly align 4 dereferenceable(8) [[ARG:%.*]]) #[[ATTR4:[0-9]+]] { ; CHECK-SAME: (i32* nocapture nofree nonnull writeonly align 4 dereferenceable(8) [[ARG:%.*]]) #[[ATTR4:[0-9]+]] {
; IS__TUNIT____-NEXT: [[PTR:%.*]] = bitcast i32* [[ARG]] to float* ; CHECK-NEXT: [[PTR:%.*]] = bitcast i32* [[ARG]] to float*
; IS__TUNIT____-NEXT: [[ARRAYIDX0:%.*]] = getelementptr float, float* [[PTR]], i64 0 ; CHECK-NEXT: [[ARRAYIDX0:%.*]] = getelementptr float, float* [[PTR]], i64 0
; IS__TUNIT____-NEXT: [[ARRAYIDX1:%.*]] = getelementptr float, float* [[PTR]], i64 1 ; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr float, float* [[PTR]], i64 1
; IS__TUNIT____-NEXT: store float 1.000000e+00, float* [[ARRAYIDX0]], align 4 ; CHECK-NEXT: store float 1.000000e+00, float* [[ARRAYIDX0]], align 4
; IS__TUNIT____-NEXT: store float 2.000000e+00, float* [[ARRAYIDX1]], align 4 ; CHECK-NEXT: store float 2.000000e+00, float* [[ARRAYIDX1]], align 4
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC____-LABEL: define {{[^@]+}}@stores
; IS__CGSCC____-SAME: (i32* nocapture nofree nonnull writeonly align 4 dereferenceable(8) [[ARG:%.*]]) #[[ATTR4:[0-9]+]] {
; IS__CGSCC____-NEXT: [[PTR:%.*]] = bitcast i32* [[ARG]] to float*
; IS__CGSCC____-NEXT: [[ARRAYIDX0:%.*]] = getelementptr float, float* [[PTR]], i64 0
; IS__CGSCC____-NEXT: [[ARRAYIDX1:%.*]] = getelementptr float, float* [[PTR]], i64 1
; IS__CGSCC____-NEXT: store float 1.000000e+00, float* [[ARRAYIDX0]], align 4
; IS__CGSCC____-NEXT: store float 2.000000e+00, float* [[ARRAYIDX1]], align 4
; IS__CGSCC____-NEXT: ret void
; ;
%ptr = bitcast i32* %arg to float* %ptr = bitcast i32* %arg to float*
%arrayidx0 = getelementptr float, float* %ptr, i64 0 %arrayidx0 = getelementptr float, float* %ptr, i64 0
%arrayidx1 = getelementptr float, float* %ptr, i64 1 %arrayidx1 = getelementptr float, float* %ptr, i64 1
store float 1.0, float* %arrayidx0 store float 1.0, float* %arrayidx0
store float 2.0, float* %arrayidx1 store float 2.0, float* %arrayidx1
ret void ret void
} }
define void @load_store(i32* %arg) { define void @load_store(i32* %arg) {
; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind willreturn writeonly ; CHECK: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__TUNIT____-LABEL: define {{[^@]+}}@load_store ; CHECK-LABEL: define {{[^@]+}}@load_store
; IS__TUNIT____-SAME: (i32* nocapture nofree nonnull writeonly align 4 dereferenceable(8) [[ARG:%.*]]) #[[ATTR4]] { ; CHECK-SAME: (i32* nocapture nofree nonnull writeonly align 4 dereferenceable(8) [[ARG:%.*]]) #[[ATTR4]] {
; IS__TUNIT____-NEXT: [[PTR:%.*]] = bitcast i32* [[ARG]] to float* ; CHECK-NEXT: [[PTR:%.*]] = bitcast i32* [[ARG]] to float*
; IS__TUNIT____-NEXT: [[ARRAYIDX1:%.*]] = getelementptr float, float* [[PTR]], i64 1 ; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr float, float* [[PTR]], i64 1
; IS__TUNIT____-NEXT: store float 2.000000e+00, float* [[ARRAYIDX1]], align 4 ; CHECK-NEXT: store float 2.000000e+00, float* [[ARRAYIDX1]], align 4
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC____-LABEL: define {{[^@]+}}@load_store
; IS__CGSCC____-SAME: (i32* nocapture nofree nonnull writeonly align 4 dereferenceable(8) [[ARG:%.*]]) #[[ATTR4]] {
; IS__CGSCC____-NEXT: [[PTR:%.*]] = bitcast i32* [[ARG]] to float*
; IS__CGSCC____-NEXT: [[ARRAYIDX1:%.*]] = getelementptr float, float* [[PTR]], i64 1
; IS__CGSCC____-NEXT: store float 2.000000e+00, float* [[ARRAYIDX1]], align 4
; IS__CGSCC____-NEXT: ret void
; ;
%ptr = bitcast i32* %arg to float* %ptr = bitcast i32* %arg to float*
%arrayidx0 = getelementptr float, float* %ptr, i64 0 %arrayidx0 = getelementptr float, float* %ptr, i64 0
%arrayidx1 = getelementptr float, float* %ptr, i64 1 %arrayidx1 = getelementptr float, float* %ptr, i64 1
%t1 = load float, float* %arrayidx0 %t1 = load float, float* %arrayidx0
store float 2.0, float* %arrayidx1 store float 2.0, float* %arrayidx1
ret void ret void
} }
define void @different_size1(i32* %arg) { define void @different_size1(i32* %arg) {
; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind willreturn writeonly ; CHECK: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__TUNIT____-LABEL: define {{[^@]+}}@different_size1 ; CHECK-LABEL: define {{[^@]+}}@different_size1
; IS__TUNIT____-SAME: (i32* nocapture nofree noundef nonnull writeonly align 8 dereferenceable(8) [[ARG:%.*]]) #[[ATTR4]] { ; CHECK-SAME: (i32* nocapture nofree noundef nonnull writeonly align 8 dereferenceable(8) [[ARG:%.*]]) #[[ATTR4]] {
; IS__TUNIT____-NEXT: [[ARG_CAST:%.*]] = bitcast i32* [[ARG]] to double* ; CHECK-NEXT: [[ARG_CAST:%.*]] = bitcast i32* [[ARG]] to double*
; IS__TUNIT____-NEXT: store double 0.000000e+00, double* [[ARG_CAST]], align 8 ; CHECK-NEXT: store double 0.000000e+00, double* [[ARG_CAST]], align 8
; IS__TUNIT____-NEXT: store i32 0, i32* [[ARG]], align 8 ; CHECK-NEXT: store i32 0, i32* [[ARG]], align 8
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC____-LABEL: define {{[^@]+}}@different_size1
; IS__CGSCC____-SAME: (i32* nocapture nofree noundef nonnull writeonly align 8 dereferenceable(8) [[ARG:%.*]]) #[[ATTR4]] {
; IS__CGSCC____-NEXT: [[ARG_CAST:%.*]] = bitcast i32* [[ARG]] to double*
; IS__CGSCC____-NEXT: store double 0.000000e+00, double* [[ARG_CAST]], align 8
; IS__CGSCC____-NEXT: store i32 0, i32* [[ARG]], align 8
; IS__CGSCC____-NEXT: ret void
; ;
%arg-cast = bitcast i32* %arg to double* %arg-cast = bitcast i32* %arg to double*
store double 0.000000e+00, double* %arg-cast store double 0.000000e+00, double* %arg-cast
store i32 0, i32* %arg store i32 0, i32* %arg
ret void ret void
} }
define void @different_size2(i32* %arg) { define void @different_size2(i32* %arg) {
; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind willreturn writeonly ; CHECK: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__TUNIT____-LABEL: define {{[^@]+}}@different_size2 ; CHECK-LABEL: define {{[^@]+}}@different_size2
; IS__TUNIT____-SAME: (i32* nocapture nofree noundef nonnull writeonly align 8 dereferenceable(8) [[ARG:%.*]]) #[[ATTR4]] { ; CHECK-SAME: (i32* nocapture nofree noundef nonnull writeonly align 8 dereferenceable(8) [[ARG:%.*]]) #[[ATTR4]] {
; IS__TUNIT____-NEXT: store i32 0, i32* [[ARG]], align 8 ; CHECK-NEXT: store i32 0, i32* [[ARG]], align 8
; IS__TUNIT____-NEXT: [[ARG_CAST:%.*]] = bitcast i32* [[ARG]] to double* ; CHECK-NEXT: [[ARG_CAST:%.*]] = bitcast i32* [[ARG]] to double*
; IS__TUNIT____-NEXT: store double 0.000000e+00, double* [[ARG_CAST]], align 8 ; CHECK-NEXT: store double 0.000000e+00, double* [[ARG_CAST]], align 8
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC____-LABEL: define {{[^@]+}}@different_size2
; IS__CGSCC____-SAME: (i32* nocapture nofree noundef nonnull writeonly align 8 dereferenceable(8) [[ARG:%.*]]) #[[ATTR4]] {
; IS__CGSCC____-NEXT: store i32 0, i32* [[ARG]], align 8
; IS__CGSCC____-NEXT: [[ARG_CAST:%.*]] = bitcast i32* [[ARG]] to double*
; IS__CGSCC____-NEXT: store double 0.000000e+00, double* [[ARG_CAST]], align 8
; IS__CGSCC____-NEXT: ret void
; ;
store i32 0, i32* %arg store i32 0, i32* %arg
%arg-cast = bitcast i32* %arg to double* %arg-cast = bitcast i32* %arg to double*
store double 0.000000e+00, double* %arg-cast store double 0.000000e+00, double* %arg-cast
ret void ret void
} }
; Make use of MustBeExecuted Explorer ; Make use of MustBeExecuted Explorer
Show All 10 Lines
; l6 l7 ; l6 l7
; \ / ; \ /
; end ; end
; According to the above CFG, we can see that instructions in l5 Block must be executed. ; According to the above CFG, we can see that instructions in l5 Block must be executed.
; Therefore, %p must be dereferenced. ; Therefore, %p must be dereferenced.
; ;
; ATTRIBUTOR_CGSCC_NPM-LABEL: define i32 @require_cfg_analysis(i32 %c, i32* {{.*}} dereferenceable(4) %p) ; ATTRIBUTOR_CGSCC_NPM-LABEL: define i32 @require_cfg_analysis(i32 %c, i32* {{.*}} dereferenceable(4) %p)
define i32 @require_cfg_analysis(i32 %c, i32* %p) { define i32 @require_cfg_analysis(i32 %c, i32* %p) {
; IS__TUNIT_OPM: Function Attrs: argmemonly nofree nosync nounwind willreturn writeonly ; IS________OPM: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@require_cfg_analysis ; IS________OPM-LABEL: define {{[^@]+}}@require_cfg_analysis
; IS__TUNIT_OPM-SAME: (i32 [[C:%.*]], i32* nocapture nofree writeonly [[P:%.*]]) #[[ATTR4]] { ; IS________OPM-SAME: (i32 [[C:%.*]], i32* nocapture nofree writeonly [[P:%.*]]) #[[ATTR4]] {
; IS__TUNIT_OPM-NEXT: [[TOBOOL1:%.*]] = icmp eq i32 [[C]], 0 ; IS________OPM-NEXT: [[TOBOOL1:%.*]] = icmp eq i32 [[C]], 0
; IS__TUNIT_OPM-NEXT: br i1 [[TOBOOL1]], label [[L1:%.*]], label [[L2:%.*]] ; IS________OPM-NEXT: br i1 [[TOBOOL1]], label [[L1:%.*]], label [[L2:%.*]]
; IS__TUNIT_OPM: l1: ; IS________OPM: l1:
; IS__TUNIT_OPM-NEXT: [[TOBOOL2:%.*]] = icmp eq i32 [[C]], 1 ; IS________OPM-NEXT: [[TOBOOL2:%.*]] = icmp eq i32 [[C]], 1
; IS__TUNIT_OPM-NEXT: br i1 [[TOBOOL2]], label [[L3:%.*]], label [[L4:%.*]] ; IS________OPM-NEXT: br i1 [[TOBOOL2]], label [[L3:%.*]], label [[L4:%.*]]
; IS__TUNIT_OPM: l2: ; IS________OPM: l2:
; IS__TUNIT_OPM-NEXT: [[TOBOOL3:%.*]] = icmp eq i32 [[C]], 2 ; IS________OPM-NEXT: [[TOBOOL3:%.*]] = icmp eq i32 [[C]], 2
; IS__TUNIT_OPM-NEXT: br i1 [[TOBOOL3]], label [[L3]], label [[L4]] ; IS________OPM-NEXT: br i1 [[TOBOOL3]], label [[L3]], label [[L4]]
; IS__TUNIT_OPM: l3: ; IS________OPM: l3:
; IS__TUNIT_OPM-NEXT: br label [[L5:%.*]] ; IS________OPM-NEXT: br label [[L5:%.*]]
; IS__TUNIT_OPM: l4: ; IS________OPM: l4:
; IS__TUNIT_OPM-NEXT: br label [[L5]] ; IS________OPM-NEXT: br label [[L5]]
; IS__TUNIT_OPM: l5: ; IS________OPM: l5:
; IS__TUNIT_OPM-NEXT: [[TOBOOL4:%.*]] = icmp eq i32 [[C]], 4 ; IS________OPM-NEXT: [[TOBOOL4:%.*]] = icmp eq i32 [[C]], 4
; IS__TUNIT_OPM-NEXT: br i1 [[TOBOOL4]], label [[L6:%.*]], label [[L7:%.*]] ; IS________OPM-NEXT: br i1 [[TOBOOL4]], label [[L6:%.*]], label [[L7:%.*]]
; IS__TUNIT_OPM: l6: ; IS________OPM: l6:
; IS__TUNIT_OPM-NEXT: store i32 0, i32* [[P]], align 4 ; IS________OPM-NEXT: store i32 0, i32* [[P]], align 4
; IS__TUNIT_OPM-NEXT: br label [[END:%.*]] ; IS________OPM-NEXT: br label [[END:%.*]]
; IS__TUNIT_OPM: l7: ; IS________OPM: l7:
; IS__TUNIT_OPM-NEXT: store i32 1, i32* [[P]], align 4 ; IS________OPM-NEXT: store i32 1, i32* [[P]], align 4
; IS__TUNIT_OPM-NEXT: br label [[END]] ; IS________OPM-NEXT: br label [[END]]
; IS__TUNIT_OPM: end: ; IS________OPM: end:
; IS__TUNIT_OPM-NEXT: ret i32 1 ; IS________OPM-NEXT: ret i32 1
; ;
; IS__TUNIT_NPM: Function Attrs: argmemonly nofree nosync nounwind willreturn writeonly ; IS________NPM: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@require_cfg_analysis ; IS________NPM-LABEL: define {{[^@]+}}@require_cfg_analysis
; IS__TUNIT_NPM-SAME: (i32 [[C:%.*]], i32* nocapture nofree nonnull writeonly align 4 dereferenceable(4) [[P:%.*]]) #[[ATTR4]] { ; IS________NPM-SAME: (i32 [[C:%.*]], i32* nocapture nofree nonnull writeonly align 4 dereferenceable(4) [[P:%.*]]) #[[ATTR4]] {
; IS__TUNIT_NPM-NEXT: [[TOBOOL1:%.*]] = icmp eq i32 [[C]], 0 ; IS________NPM-NEXT: [[TOBOOL1:%.*]] = icmp eq i32 [[C]], 0
; IS__TUNIT_NPM-NEXT: br i1 [[TOBOOL1]], label [[L1:%.*]], label [[L2:%.*]] ; IS________NPM-NEXT: br i1 [[TOBOOL1]], label [[L1:%.*]], label [[L2:%.*]]
; IS__TUNIT_NPM: l1: ; IS________NPM: l1:
; IS__TUNIT_NPM-NEXT: br label [[L4:%.*]] ; IS________NPM-NEXT: br label [[L4:%.*]]
; IS__TUNIT_NPM: l2: ; IS________NPM: l2:
; IS__TUNIT_NPM-NEXT: [[TOBOOL3:%.*]] = icmp eq i32 [[C]], 2 ; IS________NPM-NEXT: [[TOBOOL3:%.*]] = icmp eq i32 [[C]], 2
; IS__TUNIT_NPM-NEXT: br i1 [[TOBOOL3]], label [[L3:%.*]], label [[L4]] ; IS________NPM-NEXT: br i1 [[TOBOOL3]], label [[L3:%.*]], label [[L4]]
; IS__TUNIT_NPM: l3: ; IS________NPM: l3:
; IS__TUNIT_NPM-NEXT: br label [[L5:%.*]] ; IS________NPM-NEXT: br label [[L5:%.*]]
; IS__TUNIT_NPM: l4: ; IS________NPM: l4:
; IS__TUNIT_NPM-NEXT: br label [[L5]] ; IS________NPM-NEXT: br label [[L5]]
; IS__TUNIT_NPM: l5: ; IS________NPM: l5:
; IS__TUNIT_NPM-NEXT: [[TOBOOL4:%.*]] = icmp eq i32 [[C]], 4 ; IS________NPM-NEXT: [[TOBOOL4:%.*]] = icmp eq i32 [[C]], 4
; IS__TUNIT_NPM-NEXT: br i1 [[TOBOOL4]], label [[L6:%.*]], label [[L7:%.*]] ; IS________NPM-NEXT: br i1 [[TOBOOL4]], label [[L6:%.*]], label [[L7:%.*]]
; IS__TUNIT_NPM: l6: ; IS________NPM: l6:
; IS__TUNIT_NPM-NEXT: store i32 0, i32* [[P]], align 4 ; IS________NPM-NEXT: store i32 0, i32* [[P]], align 4
; IS__TUNIT_NPM-NEXT: br label [[END:%.*]] ; IS________NPM-NEXT: br label [[END:%.*]]
; IS__TUNIT_NPM: l7: ; IS________NPM: l7:
; IS__TUNIT_NPM-NEXT: store i32 1, i32* [[P]], align 4 ; IS________NPM-NEXT: store i32 1, i32* [[P]], align 4
; IS__TUNIT_NPM-NEXT: br label [[END]] ; IS________NPM-NEXT: br label [[END]]
; IS__TUNIT_NPM: end: ; IS________NPM: end:
; IS__TUNIT_NPM-NEXT: ret i32 1 ; IS________NPM-NEXT: ret i32 1
;
; IS__CGSCC_OPM: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@require_cfg_analysis
; IS__CGSCC_OPM-SAME: (i32 [[C:%.*]], i32* nocapture nofree writeonly [[P:%.*]]) #[[ATTR4]] {
; IS__CGSCC_OPM-NEXT: [[TOBOOL1:%.*]] = icmp eq i32 [[C]], 0
; IS__CGSCC_OPM-NEXT: br i1 [[TOBOOL1]], label [[L1:%.*]], label [[L2:%.*]]
; IS__CGSCC_OPM: l1:
; IS__CGSCC_OPM-NEXT: [[TOBOOL2:%.*]] = icmp eq i32 [[C]], 1
; IS__CGSCC_OPM-NEXT: br i1 [[TOBOOL2]], label [[L3:%.*]], label [[L4:%.*]]
; IS__CGSCC_OPM: l2:
; IS__CGSCC_OPM-NEXT: [[TOBOOL3:%.*]] = icmp eq i32 [[C]], 2
; IS__CGSCC_OPM-NEXT: br i1 [[TOBOOL3]], label [[L3]], label [[L4]]
; IS__CGSCC_OPM: l3:
; IS__CGSCC_OPM-NEXT: br label [[L5:%.*]]
; IS__CGSCC_OPM: l4:
; IS__CGSCC_OPM-NEXT: br label [[L5]]
; IS__CGSCC_OPM: l5:
; IS__CGSCC_OPM-NEXT: [[TOBOOL4:%.*]] = icmp eq i32 [[C]], 4
; IS__CGSCC_OPM-NEXT: br i1 [[TOBOOL4]], label [[L6:%.*]], label [[L7:%.*]]
; IS__CGSCC_OPM: l6:
; IS__CGSCC_OPM-NEXT: store i32 0, i32* [[P]], align 4
; IS__CGSCC_OPM-NEXT: br label [[END:%.*]]
; IS__CGSCC_OPM: l7:
; IS__CGSCC_OPM-NEXT: store i32 1, i32* [[P]], align 4
; IS__CGSCC_OPM-NEXT: br label [[END]]
; IS__CGSCC_OPM: end:
; IS__CGSCC_OPM-NEXT: ret i32 1
;
; IS__CGSCC_NPM: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@require_cfg_analysis
; IS__CGSCC_NPM-SAME: (i32 [[C:%.*]], i32* nocapture nofree nonnull writeonly align 4 dereferenceable(4) [[P:%.*]]) #[[ATTR4]] {
; IS__CGSCC_NPM-NEXT: [[TOBOOL1:%.*]] = icmp eq i32 [[C]], 0
; IS__CGSCC_NPM-NEXT: br i1 [[TOBOOL1]], label [[L1:%.*]], label [[L2:%.*]]
; IS__CGSCC_NPM: l1:
; IS__CGSCC_NPM-NEXT: br label [[L4:%.*]]
; IS__CGSCC_NPM: l2:
; IS__CGSCC_NPM-NEXT: [[TOBOOL3:%.*]] = icmp eq i32 [[C]], 2
; IS__CGSCC_NPM-NEXT: br i1 [[TOBOOL3]], label [[L3:%.*]], label [[L4]]
; IS__CGSCC_NPM: l3:
; IS__CGSCC_NPM-NEXT: br label [[L5:%.*]]
; IS__CGSCC_NPM: l4:
; IS__CGSCC_NPM-NEXT: br label [[L5]]
; IS__CGSCC_NPM: l5:
; IS__CGSCC_NPM-NEXT: [[TOBOOL4:%.*]] = icmp eq i32 [[C]], 4
; IS__CGSCC_NPM-NEXT: br i1 [[TOBOOL4]], label [[L6:%.*]], label [[L7:%.*]]
; IS__CGSCC_NPM: l6:
; IS__CGSCC_NPM-NEXT: store i32 0, i32* [[P]], align 4
; IS__CGSCC_NPM-NEXT: br label [[END:%.*]]
; IS__CGSCC_NPM: l7:
; IS__CGSCC_NPM-NEXT: store i32 1, i32* [[P]], align 4
; IS__CGSCC_NPM-NEXT: br label [[END]]
; IS__CGSCC_NPM: end:
; IS__CGSCC_NPM-NEXT: ret i32 1
; ;
%tobool1 = icmp eq i32 %c, 0 %tobool1 = icmp eq i32 %c, 0
br i1 %tobool1, label %l1, label %l2 br i1 %tobool1, label %l1, label %l2
l1: l1:
%tobool2 = icmp eq i32 %c, 1 %tobool2 = icmp eq i32 %c, 1
br i1 %tobool2, label %l3, label %l4 br i1 %tobool2, label %l3, label %l4
l2: l2:
%tobool3 = icmp eq i32 %c, 2 %tobool3 = icmp eq i32 %c, 2
Show All 10 Linesl6:
br label %end br label %end
l7: l7:
store i32 1, i32* %p store i32 1, i32* %p
br label %end br label %end
end: end:
ret i32 1 ret i32 1
} }
;. ;.
; IS__TUNIT____: attributes #[[ATTR0]] = { argmemonly nofree nosync nounwind readonly willreturn } ; CHECK: attributes #[[ATTR0]] = { argmemonly nofree norecurse nosync nounwind readonly willreturn }
; IS__TUNIT____: attributes #[[ATTR1]] = { argmemonly nofree nosync nounwind willreturn } ; CHECK: attributes #[[ATTR1]] = { argmemonly nofree norecurse nosync nounwind willreturn }
; IS__TUNIT____: attributes #[[ATTR2]] = { nofree nosync nounwind readnone willreturn } ; CHECK: attributes #[[ATTR2]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__TUNIT____: attributes #[[ATTR3]] = { argmemonly nofree nounwind willreturn } ; CHECK: attributes #[[ATTR3]] = { argmemonly nofree norecurse nounwind willreturn }
; IS__TUNIT____: attributes #[[ATTR4]] = { argmemonly nofree nosync nounwind willreturn writeonly } ; CHECK: attributes #[[ATTR4]] = { argmemonly nofree norecurse nosync nounwind willreturn writeonly }
;.
; IS__CGSCC____: attributes #[[ATTR0]] = { argmemonly nofree norecurse nosync nounwind readonly willreturn }
; IS__CGSCC____: attributes #[[ATTR1]] = { argmemonly nofree norecurse nosync nounwind willreturn }
; IS__CGSCC____: attributes #[[ATTR2]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__CGSCC____: attributes #[[ATTR3]] = { argmemonly nofree norecurse nounwind willreturn }
; IS__CGSCC____: attributes #[[ATTR4]] = { argmemonly nofree norecurse nosync nounwind willreturn writeonly }
;. ;.

llvm/test/Transforms/Attributor/heap_to_stack.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals
; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=3 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM ; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=4 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=11 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=11 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM
; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM ; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM
declare noalias i8* @malloc(i64) declare noalias i8* @malloc(i64)
declare void @nocapture_func_frees_pointer(i8* nocapture) declare void @nocapture_func_frees_pointer(i8* nocapture)
▲ Show 20 Lines • Show All 833 Lines • Show Last 20 Lines

llvm/test/Transforms/Attributor/heap_to_stack_gpu.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals
; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=3 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM ; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=4 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=3 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=4 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM
; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM ; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM
target triple = "amdgcn-amd-amdhsa" target triple = "amdgcn-amd-amdhsa"
declare noalias i8* @malloc(i64) declare noalias i8* @malloc(i64)
declare void @nocapture_func_frees_pointer(i8* nocapture) declare void @nocapture_func_frees_pointer(i8* nocapture)
▲ Show 20 Lines • Show All 662 Lines • Show Last 20 Lines

llvm/test/Transforms/Attributor/internal-noalias.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals
; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=2 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM ; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=6 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=2 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=6 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM
; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM ; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM
define dso_local i32 @visible(i32* noalias %A, i32* noalias %B) #0 { define dso_local i32 @visible(i32* noalias %A, i32* noalias %B) #0 {
; IS__TUNIT____: Function Attrs: argmemonly nofree noinline nosync nounwind readonly uwtable willreturn ; IS__TUNIT____: Function Attrs: argmemonly nofree noinline norecurse nosync nounwind readonly uwtable willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@visible ; IS__TUNIT____-LABEL: define {{[^@]+}}@visible
; IS__TUNIT____-SAME: (i32* noalias nocapture nofree readonly align 4 [[A:%.*]], i32* noalias nocapture nofree readonly align 4 [[B:%.*]]) #[[ATTR0:[0-9]+]] { ; IS__TUNIT____-SAME: (i32* noalias nocapture nofree readonly align 4 [[A:%.*]], i32* noalias nocapture nofree readonly align 4 [[B:%.*]]) #[[ATTR0:[0-9]+]] {
; IS__TUNIT____-NEXT: entry: ; IS__TUNIT____-NEXT: entry:
; IS__TUNIT____-NEXT: [[CALL1:%.*]] = call i32 @noalias_args(i32* noalias nocapture nofree readonly align 4 [[A]], i32* noalias nocapture nofree readonly align 4 [[B]]) #[[ATTR3:[0-9]+]] ; IS__TUNIT____-NEXT: [[CALL1:%.*]] = call i32 @noalias_args(i32* noalias nocapture nofree readonly align 4 [[A]], i32* noalias nocapture nofree readonly align 4 [[B]]) #[[ATTR3:[0-9]+]]
; IS__TUNIT____-NEXT: [[CALL2:%.*]] = call i32 @noalias_args_argmem(i32* noalias nocapture nofree readonly align 4 [[A]], i32* noalias nocapture nofree readonly align 4 [[B]]) #[[ATTR3]] ; IS__TUNIT____-NEXT: [[CALL2:%.*]] = call i32 @noalias_args_argmem(i32* noalias nocapture nofree readonly align 4 [[A]], i32* noalias nocapture nofree readonly align 4 [[B]]) #[[ATTR3]]
; IS__TUNIT____-NEXT: [[ADD:%.*]] = add nsw i32 [[CALL1]], [[CALL2]] ; IS__TUNIT____-NEXT: [[ADD:%.*]] = add nsw i32 [[CALL1]], [[CALL2]]
; IS__TUNIT____-NEXT: ret i32 [[ADD]] ; IS__TUNIT____-NEXT: ret i32 [[ADD]]
; ;
Show All 9 Lines
entry: entry:
%call1 = call i32 @noalias_args(i32* %A, i32* %B) %call1 = call i32 @noalias_args(i32* %A, i32* %B)
%call2 = call i32 @noalias_args_argmem(i32* %A, i32* %B) %call2 = call i32 @noalias_args_argmem(i32* %A, i32* %B)
%add = add nsw i32 %call1, %call2 %add = add nsw i32 %call1, %call2
ret i32 %add ret i32 %add
} }
define private i32 @noalias_args(i32* %A, i32* %B) #0 { define private i32 @noalias_args(i32* %A, i32* %B) #0 {
; IS__TUNIT____: Function Attrs: argmemonly nofree noinline nosync nounwind readonly uwtable willreturn ; IS__TUNIT____: Function Attrs: argmemonly nofree noinline norecurse nosync nounwind readonly uwtable willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@noalias_args ; IS__TUNIT____-LABEL: define {{[^@]+}}@noalias_args
; IS__TUNIT____-SAME: (i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[A:%.*]], i32* noalias nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[B:%.*]]) #[[ATTR0]] { ; IS__TUNIT____-SAME: (i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[A:%.*]], i32* noalias nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[B:%.*]]) #[[ATTR0]] {
; IS__TUNIT____-NEXT: entry: ; IS__TUNIT____-NEXT: entry:
; IS__TUNIT____-NEXT: [[TMP0:%.*]] = load i32, i32* [[A]], align 4 ; IS__TUNIT____-NEXT: [[TMP0:%.*]] = load i32, i32* [[A]], align 4
; IS__TUNIT____-NEXT: [[TMP1:%.*]] = load i32, i32* [[B]], align 4 ; IS__TUNIT____-NEXT: [[TMP1:%.*]] = load i32, i32* [[B]], align 4
; IS__TUNIT____-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP0]], [[TMP1]] ; IS__TUNIT____-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP0]], [[TMP1]]
; IS__TUNIT____-NEXT: [[CALL:%.*]] = call i32 @noalias_args_argmem(i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[A]], i32* noalias nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[B]]) #[[ATTR3]] ; IS__TUNIT____-NEXT: [[CALL:%.*]] = call i32 @noalias_args_argmem(i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[A]], i32* noalias nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[B]]) #[[ATTR3]]
; IS__TUNIT____-NEXT: [[ADD2:%.*]] = add nsw i32 [[ADD]], [[CALL]] ; IS__TUNIT____-NEXT: [[ADD2:%.*]] = add nsw i32 [[ADD]], [[CALL]]
Show All 16 Linesentry:
%add = add nsw i32 %0, %1 %add = add nsw i32 %0, %1
%call = call i32 @noalias_args_argmem(i32* %A, i32* %B) %call = call i32 @noalias_args_argmem(i32* %A, i32* %B)
%add2 = add nsw i32 %add, %call %add2 = add nsw i32 %add, %call
ret i32 %add2 ret i32 %add2
} }
define internal i32 @noalias_args_argmem(i32* %A, i32* %B) #1 { define internal i32 @noalias_args_argmem(i32* %A, i32* %B) #1 {
; IS__TUNIT____: Function Attrs: argmemonly nofree noinline nosync nounwind readonly uwtable willreturn ; CHECK: Function Attrs: argmemonly nofree noinline norecurse nosync nounwind readonly uwtable willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@noalias_args_argmem ; CHECK-LABEL: define {{[^@]+}}@noalias_args_argmem
; IS__TUNIT____-SAME: (i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[A:%.*]], i32* noalias nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[B:%.*]]) #[[ATTR0]] { ; CHECK-SAME: (i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[A:%.*]], i32* noalias nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[B:%.*]]) #[[ATTR0:[0-9]+]] {
; IS__TUNIT____-NEXT: entry: ; CHECK-NEXT: entry:
; IS__TUNIT____-NEXT: [[TMP0:%.*]] = load i32, i32* [[A]], align 4 ; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[A]], align 4
; IS__TUNIT____-NEXT: [[TMP1:%.*]] = load i32, i32* [[B]], align 4 ; CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* [[B]], align 4
; IS__TUNIT____-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP0]], [[TMP1]] ; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP0]], [[TMP1]]
; IS__TUNIT____-NEXT: ret i32 [[ADD]] ; CHECK-NEXT: ret i32 [[ADD]]
;
; IS__CGSCC____: Function Attrs: argmemonly nofree noinline norecurse nosync nounwind readonly uwtable willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@noalias_args_argmem
; IS__CGSCC____-SAME: (i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[A:%.*]], i32* noalias nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[B:%.*]]) #[[ATTR0]] {
; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: [[TMP0:%.*]] = load i32, i32* [[A]], align 4
; IS__CGSCC____-NEXT: [[TMP1:%.*]] = load i32, i32* [[B]], align 4
; IS__CGSCC____-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP0]], [[TMP1]]
; IS__CGSCC____-NEXT: ret i32 [[ADD]]
; ;
entry: entry:
%0 = load i32, i32* %A, align 4 %0 = load i32, i32* %A, align 4
%1 = load i32, i32* %B, align 4 %1 = load i32, i32* %B, align 4
%add = add nsw i32 %0, %1 %add = add nsw i32 %0, %1
ret i32 %add ret i32 %add
} }
define dso_local i32 @visible_local(i32* %A) #0 { define dso_local i32 @visible_local(i32* %A) #0 {
; IS__TUNIT____: Function Attrs: argmemonly nofree noinline nosync nounwind uwtable willreturn ; IS__TUNIT____: Function Attrs: argmemonly nofree noinline norecurse nosync nounwind uwtable willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@visible_local ; IS__TUNIT____-LABEL: define {{[^@]+}}@visible_local
; IS__TUNIT____-SAME: (i32* nocapture nofree readonly [[A:%.*]]) #[[ATTR1:[0-9]+]] { ; IS__TUNIT____-SAME: (i32* nocapture nofree readonly [[A:%.*]]) #[[ATTR1:[0-9]+]] {
; IS__TUNIT____-NEXT: entry: ; IS__TUNIT____-NEXT: entry:
; IS__TUNIT____-NEXT: [[B:%.*]] = alloca i32, align 4 ; IS__TUNIT____-NEXT: [[B:%.*]] = alloca i32, align 4
; IS__TUNIT____-NEXT: store i32 5, i32* [[B]], align 4 ; IS__TUNIT____-NEXT: store i32 5, i32* [[B]], align 4
; IS__TUNIT____-NEXT: [[CALL1:%.*]] = call i32 @noalias_args(i32* nocapture nofree readonly align 4 [[A]], i32* noalias nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[B]]) #[[ATTR3]] ; IS__TUNIT____-NEXT: [[CALL1:%.*]] = call i32 @noalias_args(i32* nocapture nofree readonly align 4 [[A]], i32* noalias nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[B]]) #[[ATTR3]]
; IS__TUNIT____-NEXT: [[CALL2:%.*]] = call i32 @noalias_args_argmem(i32* nocapture nofree readonly align 4 [[A]], i32* noalias nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[B]]) #[[ATTR3]] ; IS__TUNIT____-NEXT: [[CALL2:%.*]] = call i32 @noalias_args_argmem(i32* nocapture nofree readonly align 4 [[A]], i32* noalias nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[B]]) #[[ATTR3]]
; IS__TUNIT____-NEXT: [[ADD:%.*]] = add nsw i32 [[CALL1]], [[CALL2]] ; IS__TUNIT____-NEXT: [[ADD:%.*]] = add nsw i32 [[CALL1]], [[CALL2]]
Show All 27 Lines
; ;
%t0 = load i32, i32* %A, align 4 %t0 = load i32, i32* %A, align 4
%t1 = load i32, i32* %B, align 4 %t1 = load i32, i32* %B, align 4
%add = add nsw i32 %t0, %t1 %add = add nsw i32 %t0, %t1
ret i32 %add ret i32 %add
} }
define i32 @visible_local_2() { define i32 @visible_local_2() {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__TUNIT____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@visible_local_2 ; IS__TUNIT____-LABEL: define {{[^@]+}}@visible_local_2
; IS__TUNIT____-SAME: () #[[ATTR2:[0-9]+]] { ; IS__TUNIT____-SAME: () #[[ATTR2:[0-9]+]] {
; IS__TUNIT____-NEXT: [[B:%.*]] = alloca i32, align 4 ; IS__TUNIT____-NEXT: [[B:%.*]] = alloca i32, align 4
; IS__TUNIT____-NEXT: ret i32 10 ; IS__TUNIT____-NEXT: ret i32 10
; ;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@visible_local_2 ; IS__CGSCC____-LABEL: define {{[^@]+}}@visible_local_2
; IS__CGSCC____-SAME: () #[[ATTR3:[0-9]+]] { ; IS__CGSCC____-SAME: () #[[ATTR3:[0-9]+]] {
; IS__CGSCC____-NEXT: [[B:%.*]] = alloca i32, align 4 ; IS__CGSCC____-NEXT: [[B:%.*]] = alloca i32, align 4
; IS__CGSCC____-NEXT: ret i32 10 ; IS__CGSCC____-NEXT: ret i32 10
; ;
%B = alloca i32, align 4 %B = alloca i32, align 4
store i32 5, i32* %B, align 4 store i32 5, i32* %B, align 4
%call = call i32 @noalias_args_argmem_ro(i32* %B, i32* %B) %call = call i32 @noalias_args_argmem_ro(i32* %B, i32* %B)
ret i32 %call ret i32 %call
} }
define internal i32 @noalias_args_argmem_rn(i32* %A, i32* %B) #1 { define internal i32 @noalias_args_argmem_rn(i32* %A, i32* %B) #1 {
; IS__TUNIT____: Function Attrs: argmemonly nofree noinline nosync nounwind uwtable willreturn ; CHECK: Function Attrs: argmemonly nofree noinline norecurse nosync nounwind uwtable willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@noalias_args_argmem_rn ; CHECK-LABEL: define {{[^@]+}}@noalias_args_argmem_rn
; IS__TUNIT____-SAME: (i32* noalias nocapture nofree noundef nonnull align 4 dereferenceable(4) [[B:%.*]]) #[[ATTR1]] { ; CHECK-SAME: (i32* noalias nocapture nofree noundef nonnull align 4 dereferenceable(4) [[B:%.*]]) #[[ATTR1:[0-9]+]] {
; IS__TUNIT____-NEXT: [[T0:%.*]] = load i32, i32* [[B]], align 4 ; CHECK-NEXT: [[T0:%.*]] = load i32, i32* [[B]], align 4
; IS__TUNIT____-NEXT: store i32 0, i32* [[B]], align 4 ; CHECK-NEXT: store i32 0, i32* [[B]], align 4
; IS__TUNIT____-NEXT: ret i32 [[T0]] ; CHECK-NEXT: ret i32 [[T0]]
;
; IS__CGSCC____: Function Attrs: argmemonly nofree noinline norecurse nosync nounwind uwtable willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@noalias_args_argmem_rn
; IS__CGSCC____-SAME: (i32* noalias nocapture nofree noundef nonnull align 4 dereferenceable(4) [[B:%.*]]) #[[ATTR1]] {
; IS__CGSCC____-NEXT: [[T0:%.*]] = load i32, i32* [[B]], align 4
; IS__CGSCC____-NEXT: store i32 0, i32* [[B]], align 4
; IS__CGSCC____-NEXT: ret i32 [[T0]]
; ;
%t0 = load i32, i32* %B, align 4 %t0 = load i32, i32* %B, align 4
store i32 0, i32* %B store i32 0, i32* %B
ret i32 %t0 ret i32 %t0
} }
define i32 @visible_local_3() { define i32 @visible_local_3() {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__TUNIT____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@visible_local_3 ; IS__TUNIT____-LABEL: define {{[^@]+}}@visible_local_3
; IS__TUNIT____-SAME: () #[[ATTR2]] { ; IS__TUNIT____-SAME: () #[[ATTR2]] {
; IS__TUNIT____-NEXT: [[B:%.*]] = alloca i32, align 4 ; IS__TUNIT____-NEXT: [[B:%.*]] = alloca i32, align 4
; IS__TUNIT____-NEXT: store i32 5, i32* [[B]], align 4 ; IS__TUNIT____-NEXT: store i32 5, i32* [[B]], align 4
; IS__TUNIT____-NEXT: [[CALL:%.*]] = call i32 @noalias_args_argmem_rn(i32* noalias nocapture nofree noundef nonnull align 4 dereferenceable(4) [[B]]) #[[ATTR4:[0-9]+]] ; IS__TUNIT____-NEXT: [[CALL:%.*]] = call i32 @noalias_args_argmem_rn(i32* noalias nocapture nofree noundef nonnull align 4 dereferenceable(4) [[B]]) #[[ATTR4:[0-9]+]]
; IS__TUNIT____-NEXT: ret i32 [[CALL]] ; IS__TUNIT____-NEXT: ret i32 [[CALL]]
; ;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@visible_local_3 ; IS__CGSCC____-LABEL: define {{[^@]+}}@visible_local_3
; IS__CGSCC____-SAME: () #[[ATTR3]] { ; IS__CGSCC____-SAME: () #[[ATTR3]] {
; IS__CGSCC____-NEXT: [[B:%.*]] = alloca i32, align 4 ; IS__CGSCC____-NEXT: [[B:%.*]] = alloca i32, align 4
; IS__CGSCC____-NEXT: store i32 5, i32* [[B]], align 4 ; IS__CGSCC____-NEXT: store i32 5, i32* [[B]], align 4
; IS__CGSCC____-NEXT: [[CALL:%.*]] = call i32 @noalias_args_argmem_rn(i32* noalias nocapture nofree noundef nonnull align 4 dereferenceable(4) [[B]]) #[[ATTR6:[0-9]+]] ; IS__CGSCC____-NEXT: [[CALL:%.*]] = call i32 @noalias_args_argmem_rn(i32* noalias nocapture nofree noundef nonnull align 4 dereferenceable(4) [[B]]) #[[ATTR6:[0-9]+]]
; IS__CGSCC____-NEXT: ret i32 [[CALL]] ; IS__CGSCC____-NEXT: ret i32 [[CALL]]
; ;
%B = alloca i32, align 4 %B = alloca i32, align 4
store i32 5, i32* %B, align 4 store i32 5, i32* %B, align 4
%call = call i32 @noalias_args_argmem_rn(i32* %B, i32* %B) %call = call i32 @noalias_args_argmem_rn(i32* %B, i32* %B)
ret i32 %call ret i32 %call
} }
attributes #0 = { noinline nounwind uwtable willreturn } attributes #0 = { noinline nounwind uwtable willreturn }
attributes #1 = { argmemonly noinline nounwind uwtable willreturn} attributes #1 = { argmemonly noinline nounwind uwtable willreturn}
;. ;.
; IS__TUNIT____: attributes #[[ATTR0]] = { argmemonly nofree noinline nosync nounwind readonly uwtable willreturn } ; IS__TUNIT____: attributes #[[ATTR0]] = { argmemonly nofree noinline norecurse nosync nounwind readonly uwtable willreturn }
; IS__TUNIT____: attributes #[[ATTR1]] = { argmemonly nofree noinline nosync nounwind uwtable willreturn } ; IS__TUNIT____: attributes #[[ATTR1]] = { argmemonly nofree noinline norecurse nosync nounwind uwtable willreturn }
; IS__TUNIT____: attributes #[[ATTR2]] = { nofree nosync nounwind readnone willreturn } ; IS__TUNIT____: attributes #[[ATTR2]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__TUNIT____: attributes #[[ATTR3]] = { nofree nosync nounwind readonly } ; IS__TUNIT____: attributes #[[ATTR3]] = { nofree nosync nounwind readonly }
; IS__TUNIT____: attributes #[[ATTR4]] = { nofree nosync nounwind willreturn } ; IS__TUNIT____: attributes #[[ATTR4]] = { nofree nosync nounwind willreturn }
;. ;.
; IS__CGSCC____: attributes #[[ATTR0]] = { argmemonly nofree noinline norecurse nosync nounwind readonly uwtable willreturn } ; IS__CGSCC____: attributes #[[ATTR0]] = { argmemonly nofree noinline norecurse nosync nounwind readonly uwtable willreturn }
; IS__CGSCC____: attributes #[[ATTR1]] = { argmemonly nofree noinline norecurse nosync nounwind uwtable willreturn } ; IS__CGSCC____: attributes #[[ATTR1]] = { argmemonly nofree noinline norecurse nosync nounwind uwtable willreturn }
; IS__CGSCC____: attributes #[[ATTR2]] = { nofree noinline norecurse nosync nounwind readnone uwtable willreturn } ; IS__CGSCC____: attributes #[[ATTR2]] = { nofree noinline norecurse nosync nounwind readnone uwtable willreturn }
; IS__CGSCC____: attributes #[[ATTR3]] = { nofree norecurse nosync nounwind readnone willreturn } ; IS__CGSCC____: attributes #[[ATTR3]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__CGSCC____: attributes #[[ATTR4]] = { nounwind readonly } ; IS__CGSCC____: attributes #[[ATTR4]] = { nounwind readonly }
; IS__CGSCC____: attributes #[[ATTR5]] = { nosync nounwind readonly } ; IS__CGSCC____: attributes #[[ATTR5]] = { nosync nounwind readonly }
; IS__CGSCC____: attributes #[[ATTR6]] = { nounwind willreturn } ; IS__CGSCC____: attributes #[[ATTR6]] = { nounwind willreturn }
;. ;.

llvm/test/Transforms/Attributor/internalize.ll

Show First 20 Lines • Show All 87 Lines • ▼ Show 20 Lines
} }
; Since the inner1 cannot be internalized, there should be no change to its callsite ; Since the inner1 cannot be internalized, there should be no change to its callsite
; Since the inner2 cannot be internalized, there should be no change to its callsite ; Since the inner2 cannot be internalized, there should be no change to its callsite
; Since the inner3 is internalized, the use of the original function should be replaced by the ; Since the inner3 is internalized, the use of the original function should be replaced by the
; copied one ; copied one
; ;
define i32 @outer1() { define i32 @outer1() {
; CHECK_DISABLED-LABEL: define {{[^@]+}}@outer1() { ; CHECK_DISABLED: Function Attrs: norecurse
; CHECK_DISABLED-LABEL: define {{[^@]+}}@outer1
; CHECK_DISABLED-SAME: () #[[ATTR0:[0-9]+]] {
; CHECK_DISABLED-NEXT: entry: ; CHECK_DISABLED-NEXT: entry:
; CHECK_DISABLED-NEXT: [[RET1:%.*]] = call i32 @inner1(i32 noundef 1, i32 noundef 2) ; CHECK_DISABLED-NEXT: [[RET1:%.*]] = call i32 @inner1(i32 noundef 1, i32 noundef 2)
; CHECK_DISABLED-NEXT: [[RET2:%.*]] = call i32 @inner2(i32 noundef 1, i32 noundef 2) ; CHECK_DISABLED-NEXT: [[RET2:%.*]] = call i32 @inner2(i32 noundef 1, i32 noundef 2)
; CHECK_DISABLED-NEXT: [[RET3:%.*]] = call i32 @inner3(i32 [[RET1]], i32 [[RET2]]) ; CHECK_DISABLED-NEXT: [[RET3:%.*]] = call i32 @inner3(i32 [[RET1]], i32 [[RET2]])
; CHECK_DISABLED-NEXT: [[RET4:%.*]] = call i32 @inner4(i32 [[RET3]], i32 [[RET3]]) ; CHECK_DISABLED-NEXT: [[RET4:%.*]] = call i32 @inner4(i32 [[RET3]], i32 [[RET3]])
; CHECK_DISABLED-NEXT: ret i32 [[RET4]] ; CHECK_DISABLED-NEXT: ret i32 [[RET4]]
; ;
; CHECK_ENABLED-LABEL: define {{[^@]+}}@outer1() { ; CHECK_ENABLED: Function Attrs: norecurse
; CHECK_ENABLED-LABEL: define {{[^@]+}}@outer1
; CHECK_ENABLED-SAME: () #[[ATTR1:[0-9]+]] {
; CHECK_ENABLED-NEXT: entry: ; CHECK_ENABLED-NEXT: entry:
; CHECK_ENABLED-NEXT: [[RET1:%.*]] = call i32 @inner1(i32 noundef 1, i32 noundef 2) ; CHECK_ENABLED-NEXT: [[RET1:%.*]] = call i32 @inner1(i32 noundef 1, i32 noundef 2)
; CHECK_ENABLED-NEXT: [[RET2:%.*]] = call i32 @inner2(i32 noundef 1, i32 noundef 2) ; CHECK_ENABLED-NEXT: [[RET2:%.*]] = call i32 @inner2(i32 noundef 1, i32 noundef 2)
; CHECK_ENABLED-NEXT: [[RET3:%.*]] = call i32 @inner3.internalized(i32 [[RET1]], i32 [[RET2]]) ; CHECK_ENABLED-NEXT: [[RET3:%.*]] = call i32 @inner3.internalized(i32 [[RET1]], i32 [[RET2]])
; CHECK_ENABLED-NEXT: [[RET4:%.*]] = call i32 @inner4.internalized(i32 [[RET3]], i32 [[RET3]]) ; CHECK_ENABLED-NEXT: [[RET4:%.*]] = call i32 @inner4.internalized(i32 [[RET3]], i32 [[RET3]])
; CHECK_ENABLED-NEXT: ret i32 [[RET4]] ; CHECK_ENABLED-NEXT: ret i32 [[RET4]]
; ;
entry: entry:
Show All 9 Lines
; CHECK_DISABLED-LABEL: define {{[^@]+}}@unused_arg ; CHECK_DISABLED-LABEL: define {{[^@]+}}@unused_arg
; CHECK_DISABLED-SAME: (i8 [[TMP0:%.*]]) { ; CHECK_DISABLED-SAME: (i8 [[TMP0:%.*]]) {
; CHECK_DISABLED-NEXT: unreachable ; CHECK_DISABLED-NEXT: unreachable
; ;
unreachable unreachable
} }
define void @unused_arg_caller() { define void @unused_arg_caller() {
; CHECK_DISABLED-LABEL: define {{[^@]+}}@unused_arg_caller() { ; CHECK_DISABLED: Function Attrs: norecurse
; CHECK_DISABLED-LABEL: define {{[^@]+}}@unused_arg_caller
; CHECK_DISABLED-SAME: () #[[ATTR0]] {
; CHECK_DISABLED-NEXT: call void @unused_arg(i8 noundef 0) ; CHECK_DISABLED-NEXT: call void @unused_arg(i8 noundef 0)
; CHECK_DISABLED-NEXT: ret void ; CHECK_DISABLED-NEXT: ret void
; ;
; CHECK_ENABLED: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK_ENABLED: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; CHECK_ENABLED-LABEL: define {{[^@]+}}@unused_arg_caller ; CHECK_ENABLED-LABEL: define {{[^@]+}}@unused_arg_caller
; CHECK_ENABLED-SAME: () #[[ATTR0:[0-9]+]] { ; CHECK_ENABLED-SAME: () #[[ATTR0:[0-9]+]] {
; CHECK_ENABLED-NEXT: unreachable ; CHECK_ENABLED-NEXT: unreachable
; ;
; IS__CGSCC_____ENABLED: Function Attrs: nofree norecurse noreturn nosync nounwind readnone willreturn ; IS__CGSCC_____ENABLED: Function Attrs: nofree norecurse noreturn nosync nounwind readnone willreturn
; IS__CGSCC_____ENABLED-LABEL: define {{[^@]+}}@unused_arg_caller ; IS__CGSCC_____ENABLED-LABEL: define {{[^@]+}}@unused_arg_caller
; IS__CGSCC_____ENABLED-SAME: () #[[ATTR2:[0-9]+]] { ; IS__CGSCC_____ENABLED-SAME: () #[[ATTR2:[0-9]+]] {
; IS__CGSCC_____ENABLED-NEXT: unreachable ; IS__CGSCC_____ENABLED-NEXT: unreachable
Show All 10 Lines;
call void @__clang_call_terminate() call void @__clang_call_terminate()
unreachable unreachable
} }
; IS__CGSCC_____ENABLED: attributes #[[ATTR0:[0-9]+]] = { nofree nosync nounwind readnone willreturn } ; IS__CGSCC_____ENABLED: attributes #[[ATTR0:[0-9]+]] = { nofree nosync nounwind readnone willreturn }
; IS__CGSCC_____ENABLED: attributes #[[ATTR1:[0-9]+]] = { nofree noreturn nosync nounwind readnone willreturn } ; IS__CGSCC_____ENABLED: attributes #[[ATTR1:[0-9]+]] = { nofree noreturn nosync nounwind readnone willreturn }
; IS__CGSCC_____ENABLED: attributes #[[ATTR2]] = { nofree norecurse noreturn nosync nounwind readnone willreturn } ; IS__CGSCC_____ENABLED: attributes #[[ATTR2]] = { nofree norecurse noreturn nosync nounwind readnone willreturn }
;. ;.
; CHECK_ENABLED: attributes #[[ATTR0]] = { nofree nosync nounwind readnone willreturn } ; CHECK_DISABLED: attributes #[[ATTR0]] = { norecurse }
; CHECK_ENABLED: attributes #[[ATTR1:[0-9]+]] = { nounwind readnone } ;.
; CHECK_ENABLED: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn }
; CHECK_ENABLED: attributes #[[ATTR1]] = { norecurse }
; CHECK_ENABLED: attributes #[[ATTR2:[0-9]+]] = { nounwind readnone }
;. ;.

llvm/test/Transforms/Attributor/liveness.ll

Show First 20 Lines • Show All 173 Lines • ▼ Show 20 Lines
cond.end: ; preds = %cond.false, %cond.true cond.end: ; preds = %cond.false, %cond.true
%cond = phi i32 [ %call, %cond.true ], [ %call1, %cond.false ] %cond = phi i32 [ %call, %cond.true ], [ %call1, %cond.false ]
ret i32 %cond ret i32 %cond
} }
; TEST 3: both cond.true and cond.false are dead, therfore cond.end is dead as well. ; TEST 3: both cond.true and cond.false are dead, therfore cond.end is dead as well.
define i32 @all_dead(i32 %a) #0 { define i32 @all_dead(i32 %a) #0 {
; CHECK: Function Attrs: noreturn ; NOT_CGSCC_NPM: Function Attrs: noreturn
; CHECK-LABEL: define {{[^@]+}}@all_dead ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@all_dead
; CHECK-SAME: (i32 [[A:%.*]]) #[[ATTR4:[0-9]+]] { ; NOT_CGSCC_NPM-SAME: (i32 [[A:%.*]]) #[[ATTR4:[0-9]+]] {
; CHECK-NEXT: entry: ; NOT_CGSCC_NPM-NEXT: entry:
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[A]], 0 ; NOT_CGSCC_NPM-NEXT: [[CMP:%.*]] = icmp eq i32 [[A]], 0
; CHECK-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] ; NOT_CGSCC_NPM-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
; CHECK: cond.true: ; NOT_CGSCC_NPM: cond.true:
; CHECK-NEXT: call void @no_return_call() #[[ATTR3]] ; NOT_CGSCC_NPM-NEXT: call void @no_return_call() #[[ATTR3]]
; CHECK-NEXT: unreachable ; NOT_CGSCC_NPM-NEXT: unreachable
; CHECK: cond.false: ; NOT_CGSCC_NPM: cond.false:
; CHECK-NEXT: call void @no_return_call() #[[ATTR3]] ; NOT_CGSCC_NPM-NEXT: call void @no_return_call() #[[ATTR3]]
; CHECK-NEXT: unreachable ; NOT_CGSCC_NPM-NEXT: unreachable
; CHECK: cond.end: ; NOT_CGSCC_NPM: cond.end:
; CHECK-NEXT: unreachable ; NOT_CGSCC_NPM-NEXT: unreachable
;
; IS__CGSCC____: Function Attrs: norecurse noreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@all_dead
; IS__CGSCC____-SAME: (i32 [[A:%.*]]) #[[ATTR9:[0-9]+]] {
; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: [[CMP:%.*]] = icmp eq i32 [[A]], 0
; IS__CGSCC____-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
; IS__CGSCC____: cond.true:
; IS__CGSCC____-NEXT: call void @no_return_call() #[[ATTR3]]
; IS__CGSCC____-NEXT: unreachable
; IS__CGSCC____: cond.false:
; IS__CGSCC____-NEXT: call void @no_return_call() #[[ATTR3]]
; IS__CGSCC____-NEXT: unreachable
; IS__CGSCC____: cond.end:
; IS__CGSCC____-NEXT: unreachable
; ;
entry: entry:
%cmp = icmp eq i32 %a, 0 %cmp = icmp eq i32 %a, 0
br i1 %cmp, label %cond.true, label %cond.false br i1 %cmp, label %cond.true, label %cond.false
cond.true: ; preds = %entry cond.true: ; preds = %entry
call void @no_return_call() call void @no_return_call()
call i32 @dead_internal_func(i32 10) call i32 @dead_internal_func(i32 10)
Show All 18 Lines
define i32 @all_live(i32 %a) #0 { define i32 @all_live(i32 %a) #0 {
; CHECK-LABEL: define {{[^@]+}}@all_live ; CHECK-LABEL: define {{[^@]+}}@all_live
; CHECK-SAME: (i32 [[A:%.*]]) { ; CHECK-SAME: (i32 [[A:%.*]]) {
; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[A]], 0 ; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[A]], 0
; CHECK-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] ; CHECK-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
; CHECK: cond.true: ; CHECK: cond.true:
; CHECK-NEXT: call void @normal_call() ; CHECK-NEXT: call void @normal_call()
; CHECK-NEXT: [[CALL:%.*]] = call i32 @foo_noreturn() #[[ATTR4]] ; CHECK-NEXT: [[CALL:%.*]] = call i32 @foo_noreturn() #[[ATTR4:[0-9]+]]
; CHECK-NEXT: unreachable ; CHECK-NEXT: unreachable
; CHECK: cond.false: ; CHECK: cond.false:
; CHECK-NEXT: call void @normal_call() ; CHECK-NEXT: call void @normal_call()
; CHECK-NEXT: [[CALL1:%.*]] = call i32 @bar() ; CHECK-NEXT: [[CALL1:%.*]] = call i32 @bar()
; CHECK-NEXT: br label [[COND_END:%.*]] ; CHECK-NEXT: br label [[COND_END:%.*]]
; CHECK: cond.end: ; CHECK: cond.end:
; CHECK-NEXT: ret i32 [[CALL1]] ; CHECK-NEXT: ret i32 [[CALL1]]
; ;
▲ Show 20 Lines • Show All 257 Lines • ▼ Show 20 Linescleanup:
%res = landingpad { i8*, i32 } catch i8* null %res = landingpad { i8*, i32 } catch i8* null
ret i32 0 ret i32 0
} }
; TEST 6: Undefined behvior, taken from LangRef. ; TEST 6: Undefined behvior, taken from LangRef.
; FIXME: Should be able to detect undefined behavior. ; FIXME: Should be able to detect undefined behavior.
define void @ub(i32* %0) { define void @ub(i32* %0) {
; IS________OPM: Function Attrs: argmemonly nofree nosync nounwind willreturn writeonly ; IS________OPM: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS________OPM-LABEL: define {{[^@]+}}@ub ; IS________OPM-LABEL: define {{[^@]+}}@ub
; IS________OPM-SAME: (i32* nocapture nofree writeonly [[TMP0:%.*]]) #[[ATTR7:[0-9]+]] { ; IS________OPM-SAME: (i32* nocapture nofree writeonly [[TMP0:%.*]]) #[[ATTR7:[0-9]+]] {
; IS________OPM-NEXT: store i32 0, i32* [[TMP0]], align 4 ; IS________OPM-NEXT: store i32 0, i32* [[TMP0]], align 4
; IS________OPM-NEXT: ret void ; IS________OPM-NEXT: ret void
; ;
; IS__TUNIT_NPM: Function Attrs: argmemonly nofree nosync nounwind willreturn writeonly ; IS__TUNIT_NPM: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@ub ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@ub
; IS__TUNIT_NPM-SAME: (i32* nocapture nofree readnone [[TMP0:%.*]]) #[[ATTR7:[0-9]+]] { ; IS__TUNIT_NPM-SAME: (i32* nocapture nofree readnone [[TMP0:%.*]]) #[[ATTR7:[0-9]+]] {
; IS__TUNIT_NPM-NEXT: store i32 0, i32* undef, align 4294967296 ; IS__TUNIT_NPM-NEXT: store i32 0, i32* undef, align 4294967296
; IS__TUNIT_NPM-NEXT: ret void ; IS__TUNIT_NPM-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly ; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC____-LABEL: define {{[^@]+}}@ub ; IS__CGSCC____-LABEL: define {{[^@]+}}@ub
; IS__CGSCC____-SAME: (i32* nocapture nofree readnone [[TMP0:%.*]]) #[[ATTR9:[0-9]+]] { ; IS__CGSCC____-SAME: (i32* nocapture nofree readnone [[TMP0:%.*]]) #[[ATTR10:[0-9]+]] {
; IS__CGSCC____-NEXT: store i32 0, i32* undef, align 4294967296 ; IS__CGSCC____-NEXT: store i32 0, i32* undef, align 4294967296
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
%poison = sub nuw i32 0, 1 ; Results in a poison value. %poison = sub nuw i32 0, 1 ; Results in a poison value.
%still_poison = and i32 %poison, 0 ; 0, but also poison. %still_poison = and i32 %poison, 0 ; 0, but also poison.
%poison_yet_again = getelementptr i32, i32* %0, i32 %still_poison %poison_yet_again = getelementptr i32, i32* %0, i32 %still_poison
store i32 0, i32* %poison_yet_again ; Undefined behavior due to store to poison. store i32 0, i32* %poison_yet_again ; Undefined behavior due to store to poison.
ret void ret void
} }
define void @inf_loop() #0 { define void @inf_loop() #0 {
; NOT_CGSCC_NPM: Function Attrs: nofree noreturn nosync nounwind readnone ; NOT_CGSCC_NPM: Function Attrs: nofree norecurse noreturn nosync nounwind readnone
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@inf_loop ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@inf_loop
; NOT_CGSCC_NPM-SAME: () #[[ATTR8:[0-9]+]] { ; NOT_CGSCC_NPM-SAME: () #[[ATTR8:[0-9]+]] {
; NOT_CGSCC_NPM-NEXT: entry: ; NOT_CGSCC_NPM-NEXT: entry:
; NOT_CGSCC_NPM-NEXT: br label [[WHILE_BODY:%.*]] ; NOT_CGSCC_NPM-NEXT: br label [[WHILE_BODY:%.*]]
; NOT_CGSCC_NPM: while.body: ; NOT_CGSCC_NPM: while.body:
; NOT_CGSCC_NPM-NEXT: br label [[WHILE_BODY]] ; NOT_CGSCC_NPM-NEXT: br label [[WHILE_BODY]]
; ;
; IS__CGSCC____: Function Attrs: nofree norecurse noreturn nosync nounwind readnone ; IS__CGSCC____: Function Attrs: nofree norecurse noreturn nosync nounwind readnone
; IS__CGSCC____-LABEL: define {{[^@]+}}@inf_loop ; IS__CGSCC____-LABEL: define {{[^@]+}}@inf_loop
; IS__CGSCC____-SAME: () #[[ATTR10:[0-9]+]] { ; IS__CGSCC____-SAME: () #[[ATTR11:[0-9]+]] {
; IS__CGSCC____-NEXT: entry: ; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: br label [[WHILE_BODY:%.*]] ; IS__CGSCC____-NEXT: br label [[WHILE_BODY:%.*]]
; IS__CGSCC____: while.body: ; IS__CGSCC____: while.body:
; IS__CGSCC____-NEXT: br label [[WHILE_BODY]] ; IS__CGSCC____-NEXT: br label [[WHILE_BODY]]
; ;
entry: entry:
br label %while.body br label %while.body
Show All 37 Linescond.else: ; preds = %cond.elseif
br label %cond.end br label %cond.end
cond.end: ; preds = %cond.if, %cond.else, %cond.elseif cond.end: ; preds = %cond.if, %cond.else, %cond.elseif
%7 = phi i32 [ %1, %cond.elseif ], [ 0, %cond.else ], [ 0, %cond.if ] %7 = phi i32 [ %1, %cond.elseif ], [ 0, %cond.else ], [ 0, %cond.if ]
ret i32 %7 ret i32 %7
} }
define void @rec() #0 { define void @rec() #0 {
; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind readnone willreturn ; NOT_CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@rec ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@rec
; NOT_CGSCC_NPM-SAME: () #[[ATTR9:[0-9]+]] { ; NOT_CGSCC_NPM-SAME: () #[[ATTR9:[0-9]+]] {
; NOT_CGSCC_NPM-NEXT: entry: ; NOT_CGSCC_NPM-NEXT: entry:
; NOT_CGSCC_NPM-NEXT: ret void ; NOT_CGSCC_NPM-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@rec ; IS__CGSCC____-LABEL: define {{[^@]+}}@rec
; IS__CGSCC____-SAME: () #[[ATTR6]] { ; IS__CGSCC____-SAME: () #[[ATTR6]] {
▲ Show 20 Lines • Show All 190 Lines • ▼ Show 20 Lines; <label>:5: ; preds = %1, %3
ret i8* %6 ret i8* %6
} }
declare void @sink() nofree nosync nounwind willreturn declare void @sink() nofree nosync nounwind willreturn
define void @test_unreachable() { define void @test_unreachable() {
; NOT_CGSCC_NPM: Function Attrs: nofree noreturn nosync nounwind ; NOT_CGSCC_NPM: Function Attrs: nofree noreturn nosync nounwind
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@test_unreachable ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@test_unreachable
; NOT_CGSCC_NPM-SAME: () #[[ATTR0]] { ; NOT_CGSCC_NPM-SAME: () #[[ATTR0]] {
; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR12:[0-9]+]] ; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR13:[0-9]+]]
; NOT_CGSCC_NPM-NEXT: call void @test_unreachable() #[[ATTR0]] ; NOT_CGSCC_NPM-NEXT: call void @test_unreachable() #[[ATTR0]]
; NOT_CGSCC_NPM-NEXT: unreachable ; NOT_CGSCC_NPM-NEXT: unreachable
; ;
; IS__CGSCC____: Function Attrs: nofree noreturn nosync nounwind ; IS__CGSCC____: Function Attrs: nofree noreturn nosync nounwind
; IS__CGSCC____-LABEL: define {{[^@]+}}@test_unreachable ; IS__CGSCC____-LABEL: define {{[^@]+}}@test_unreachable
; IS__CGSCC____-SAME: () #[[ATTR0]] { ; IS__CGSCC____-SAME: () #[[ATTR0]] {
; IS__CGSCC____-NEXT: call void @sink() #[[ATTR15:[0-9]+]] ; IS__CGSCC____-NEXT: call void @sink() #[[ATTR17:[0-9]+]]
; IS__CGSCC____-NEXT: call void @test_unreachable() #[[ATTR0]] ; IS__CGSCC____-NEXT: call void @test_unreachable() #[[ATTR0]]
; IS__CGSCC____-NEXT: unreachable ; IS__CGSCC____-NEXT: unreachable
; ;
call void @sink() call void @sink()
call void @test_unreachable() call void @test_unreachable()
unreachable unreachable
} }
▲ Show 20 Lines • Show All 64 Lines • ▼ Show 20 Lines
; NOT_CGSCC_NPM-NEXT: call void @non_dead_b15() #[[ATTR10]] ; NOT_CGSCC_NPM-NEXT: call void @non_dead_b15() #[[ATTR10]]
; NOT_CGSCC_NPM-NEXT: br label [[BB4:%.*]] ; NOT_CGSCC_NPM-NEXT: br label [[BB4:%.*]]
; NOT_CGSCC_NPM: bb4: ; NOT_CGSCC_NPM: bb4:
; NOT_CGSCC_NPM-NEXT: call void @non_exact2() ; NOT_CGSCC_NPM-NEXT: call void @non_exact2()
; NOT_CGSCC_NPM-NEXT: ret void ; NOT_CGSCC_NPM-NEXT: ret void
; ;
; IS__CGSCC____-LABEL: define {{[^@]+}}@middle() { ; IS__CGSCC____-LABEL: define {{[^@]+}}@middle() {
; IS__CGSCC____-NEXT: bb0: ; IS__CGSCC____-NEXT: bb0:
; IS__CGSCC____-NEXT: call void @non_dead_b0() #[[ATTR15]] ; IS__CGSCC____-NEXT: call void @non_dead_b0() #[[ATTR17]]
; IS__CGSCC____-NEXT: call void @non_dead_b1() #[[ATTR15]] ; IS__CGSCC____-NEXT: call void @non_dead_b1() #[[ATTR17]]
; IS__CGSCC____-NEXT: call void @non_dead_b2() #[[ATTR15]] ; IS__CGSCC____-NEXT: call void @non_dead_b2() #[[ATTR17]]
; IS__CGSCC____-NEXT: call void @non_dead_b3() #[[ATTR15]] ; IS__CGSCC____-NEXT: call void @non_dead_b3() #[[ATTR17]]
; IS__CGSCC____-NEXT: br label [[BB1:%.*]] ; IS__CGSCC____-NEXT: br label [[BB1:%.*]]
; IS__CGSCC____: bb1: ; IS__CGSCC____: bb1:
; IS__CGSCC____-NEXT: call void @non_dead_b4() #[[ATTR15]] ; IS__CGSCC____-NEXT: call void @non_dead_b4() #[[ATTR17]]
; IS__CGSCC____-NEXT: call void @non_dead_b5() #[[ATTR15]] ; IS__CGSCC____-NEXT: call void @non_dead_b5() #[[ATTR17]]
; IS__CGSCC____-NEXT: call void @non_dead_b6() #[[ATTR15]] ; IS__CGSCC____-NEXT: call void @non_dead_b6() #[[ATTR17]]
; IS__CGSCC____-NEXT: call void @non_dead_b7() #[[ATTR15]] ; IS__CGSCC____-NEXT: call void @non_dead_b7() #[[ATTR17]]
; IS__CGSCC____-NEXT: br label [[BB2:%.*]] ; IS__CGSCC____-NEXT: br label [[BB2:%.*]]
; IS__CGSCC____: bb2: ; IS__CGSCC____: bb2:
; IS__CGSCC____-NEXT: call void @non_dead_b8() #[[ATTR15]] ; IS__CGSCC____-NEXT: call void @non_dead_b8() #[[ATTR17]]
; IS__CGSCC____-NEXT: call void @non_dead_b9() #[[ATTR15]] ; IS__CGSCC____-NEXT: call void @non_dead_b9() #[[ATTR17]]
; IS__CGSCC____-NEXT: call void @non_dead_b10() #[[ATTR15]] ; IS__CGSCC____-NEXT: call void @non_dead_b10() #[[ATTR17]]
; IS__CGSCC____-NEXT: call void @non_dead_b11() #[[ATTR15]] ; IS__CGSCC____-NEXT: call void @non_dead_b11() #[[ATTR17]]
; IS__CGSCC____-NEXT: br label [[BB3:%.*]] ; IS__CGSCC____-NEXT: br label [[BB3:%.*]]
; IS__CGSCC____: bb3: ; IS__CGSCC____: bb3:
; IS__CGSCC____-NEXT: call void @non_dead_b12() #[[ATTR15]] ; IS__CGSCC____-NEXT: call void @non_dead_b12() #[[ATTR17]]
; IS__CGSCC____-NEXT: call void @non_dead_b13() #[[ATTR15]] ; IS__CGSCC____-NEXT: call void @non_dead_b13() #[[ATTR17]]
; IS__CGSCC____-NEXT: call void @non_dead_b14() #[[ATTR15]] ; IS__CGSCC____-NEXT: call void @non_dead_b14() #[[ATTR17]]
; IS__CGSCC____-NEXT: call void @non_dead_b15() #[[ATTR15]] ; IS__CGSCC____-NEXT: call void @non_dead_b15() #[[ATTR17]]
; IS__CGSCC____-NEXT: br label [[BB4:%.*]] ; IS__CGSCC____-NEXT: br label [[BB4:%.*]]
; IS__CGSCC____: bb4: ; IS__CGSCC____: bb4:
; IS__CGSCC____-NEXT: call void @non_exact2() ; IS__CGSCC____-NEXT: call void @non_exact2()
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
bb0: bb0:
call void @non_dead_b0() call void @non_dead_b0()
call void @non_dead_b1() call void @non_dead_b1()
▲ Show 20 Lines • Show All 103 Lines • ▼ Show 20 Lines;
call void @dead_e1() call void @dead_e1()
ret void ret void
} }
define internal void @non_dead_a0() { define internal void @non_dead_a0() {
; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn ; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_a0 ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_a0
; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] { ; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] {
; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR12]] ; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR13]]
; NOT_CGSCC_NPM-NEXT: ret void ; NOT_CGSCC_NPM-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn ; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_a0 ; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_a0
; IS__CGSCC____-SAME: () #[[ATTR11:[0-9]+]] { ; IS__CGSCC____-SAME: () #[[ATTR12:[0-9]+]] {
; IS__CGSCC____-NEXT: call void @sink() #[[ATTR15]] ; IS__CGSCC____-NEXT: call void @sink() #[[ATTR17]]
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
call void @sink() call void @sink()
ret void ret void
} }
define internal void @non_dead_a1() { define internal void @non_dead_a1() {
; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn ; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_a1 ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_a1
; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] { ; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] {
; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR12]] ; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR13]]
; NOT_CGSCC_NPM-NEXT: ret void ; NOT_CGSCC_NPM-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn ; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_a1 ; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_a1
; IS__CGSCC____-SAME: () #[[ATTR11]] { ; IS__CGSCC____-SAME: () #[[ATTR12]] {
; IS__CGSCC____-NEXT: call void @sink() #[[ATTR15]] ; IS__CGSCC____-NEXT: call void @sink() #[[ATTR17]]
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
call void @sink() call void @sink()
ret void ret void
} }
define internal void @non_dead_a2() { define internal void @non_dead_a2() {
; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn ; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_a2 ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_a2
; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] { ; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] {
; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR12]] ; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR13]]
; NOT_CGSCC_NPM-NEXT: ret void ; NOT_CGSCC_NPM-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn ; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_a2 ; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_a2
; IS__CGSCC____-SAME: () #[[ATTR11]] { ; IS__CGSCC____-SAME: () #[[ATTR12]] {
; IS__CGSCC____-NEXT: call void @sink() #[[ATTR15]] ; IS__CGSCC____-NEXT: call void @sink() #[[ATTR17]]
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
call void @sink() call void @sink()
ret void ret void
} }
define internal void @non_dead_a3() { define internal void @non_dead_a3() {
; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn ; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_a3 ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_a3
; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] { ; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] {
; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR12]] ; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR13]]
; NOT_CGSCC_NPM-NEXT: ret void ; NOT_CGSCC_NPM-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn ; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_a3 ; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_a3
; IS__CGSCC____-SAME: () #[[ATTR11]] { ; IS__CGSCC____-SAME: () #[[ATTR12]] {
; IS__CGSCC____-NEXT: call void @sink() #[[ATTR15]] ; IS__CGSCC____-NEXT: call void @sink() #[[ATTR17]]
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
call void @sink() call void @sink()
ret void ret void
} }
define internal void @non_dead_a4() { define internal void @non_dead_a4() {
; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn ; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_a4 ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_a4
; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] { ; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] {
; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR12]] ; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR13]]
; NOT_CGSCC_NPM-NEXT: ret void ; NOT_CGSCC_NPM-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn ; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_a4 ; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_a4
; IS__CGSCC____-SAME: () #[[ATTR11]] { ; IS__CGSCC____-SAME: () #[[ATTR12]] {
; IS__CGSCC____-NEXT: call void @sink() #[[ATTR15]] ; IS__CGSCC____-NEXT: call void @sink() #[[ATTR17]]
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
call void @sink() call void @sink()
ret void ret void
} }
define internal void @non_dead_a5() { define internal void @non_dead_a5() {
; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn ; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_a5 ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_a5
; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] { ; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] {
; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR12]] ; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR13]]
; NOT_CGSCC_NPM-NEXT: ret void ; NOT_CGSCC_NPM-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn ; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_a5 ; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_a5
; IS__CGSCC____-SAME: () #[[ATTR11]] { ; IS__CGSCC____-SAME: () #[[ATTR12]] {
; IS__CGSCC____-NEXT: call void @sink() #[[ATTR15]] ; IS__CGSCC____-NEXT: call void @sink() #[[ATTR17]]
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
call void @sink() call void @sink()
ret void ret void
} }
define internal void @non_dead_a6() { define internal void @non_dead_a6() {
; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn ; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_a6 ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_a6
; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] { ; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] {
; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR12]] ; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR13]]
; NOT_CGSCC_NPM-NEXT: ret void ; NOT_CGSCC_NPM-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn ; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_a6 ; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_a6
; IS__CGSCC____-SAME: () #[[ATTR11]] { ; IS__CGSCC____-SAME: () #[[ATTR12]] {
; IS__CGSCC____-NEXT: call void @sink() #[[ATTR15]] ; IS__CGSCC____-NEXT: call void @sink() #[[ATTR17]]
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
call void @sink() call void @sink()
ret void ret void
} }
define internal void @non_dead_a7() { define internal void @non_dead_a7() {
; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn ; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_a7 ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_a7
; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] { ; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] {
; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR12]] ; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR13]]
; NOT_CGSCC_NPM-NEXT: ret void ; NOT_CGSCC_NPM-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn ; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_a7 ; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_a7
; IS__CGSCC____-SAME: () #[[ATTR11]] { ; IS__CGSCC____-SAME: () #[[ATTR12]] {
; IS__CGSCC____-NEXT: call void @sink() #[[ATTR15]] ; IS__CGSCC____-NEXT: call void @sink() #[[ATTR17]]
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
call void @sink() call void @sink()
ret void ret void
} }
define internal void @non_dead_a8() { define internal void @non_dead_a8() {
; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn ; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_a8 ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_a8
; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] { ; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] {
; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR12]] ; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR13]]
; NOT_CGSCC_NPM-NEXT: ret void ; NOT_CGSCC_NPM-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn ; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_a8 ; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_a8
; IS__CGSCC____-SAME: () #[[ATTR11]] { ; IS__CGSCC____-SAME: () #[[ATTR12]] {
; IS__CGSCC____-NEXT: call void @sink() #[[ATTR15]] ; IS__CGSCC____-NEXT: call void @sink() #[[ATTR17]]
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
call void @sink() call void @sink()
ret void ret void
} }
define internal void @non_dead_a9() { define internal void @non_dead_a9() {
; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn ; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_a9 ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_a9
; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] { ; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] {
; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR12]] ; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR13]]
; NOT_CGSCC_NPM-NEXT: ret void ; NOT_CGSCC_NPM-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn ; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_a9 ; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_a9
; IS__CGSCC____-SAME: () #[[ATTR11]] { ; IS__CGSCC____-SAME: () #[[ATTR12]] {
; IS__CGSCC____-NEXT: call void @sink() #[[ATTR15]] ; IS__CGSCC____-NEXT: call void @sink() #[[ATTR17]]
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
call void @sink() call void @sink()
ret void ret void
} }
define internal void @non_dead_a10() { define internal void @non_dead_a10() {
; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn ; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_a10 ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_a10
; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] { ; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] {
; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR12]] ; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR13]]
; NOT_CGSCC_NPM-NEXT: ret void ; NOT_CGSCC_NPM-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn ; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_a10 ; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_a10
; IS__CGSCC____-SAME: () #[[ATTR11]] { ; IS__CGSCC____-SAME: () #[[ATTR12]] {
; IS__CGSCC____-NEXT: call void @sink() #[[ATTR15]] ; IS__CGSCC____-NEXT: call void @sink() #[[ATTR17]]
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
call void @sink() call void @sink()
ret void ret void
} }
define internal void @non_dead_a11() { define internal void @non_dead_a11() {
; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn ; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_a11 ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_a11
; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] { ; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] {
; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR12]] ; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR13]]
; NOT_CGSCC_NPM-NEXT: ret void ; NOT_CGSCC_NPM-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn ; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_a11 ; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_a11
; IS__CGSCC____-SAME: () #[[ATTR11]] { ; IS__CGSCC____-SAME: () #[[ATTR12]] {
; IS__CGSCC____-NEXT: call void @sink() #[[ATTR15]] ; IS__CGSCC____-NEXT: call void @sink() #[[ATTR17]]
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
call void @sink() call void @sink()
ret void ret void
} }
define internal void @non_dead_a12() { define internal void @non_dead_a12() {
; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn ; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_a12 ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_a12
; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] { ; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] {
; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR12]] ; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR13]]
; NOT_CGSCC_NPM-NEXT: ret void ; NOT_CGSCC_NPM-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn ; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_a12 ; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_a12
; IS__CGSCC____-SAME: () #[[ATTR11]] { ; IS__CGSCC____-SAME: () #[[ATTR12]] {
; IS__CGSCC____-NEXT: call void @sink() #[[ATTR15]] ; IS__CGSCC____-NEXT: call void @sink() #[[ATTR17]]
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
call void @sink() call void @sink()
ret void ret void
} }
define internal void @non_dead_a13() { define internal void @non_dead_a13() {
; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn ; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_a13 ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_a13
; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] { ; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] {
; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR12]] ; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR13]]
; NOT_CGSCC_NPM-NEXT: ret void ; NOT_CGSCC_NPM-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn ; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_a13 ; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_a13
; IS__CGSCC____-SAME: () #[[ATTR11]] { ; IS__CGSCC____-SAME: () #[[ATTR12]] {
; IS__CGSCC____-NEXT: call void @sink() #[[ATTR15]] ; IS__CGSCC____-NEXT: call void @sink() #[[ATTR17]]
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
call void @sink() call void @sink()
ret void ret void
} }
define internal void @non_dead_a14() { define internal void @non_dead_a14() {
; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn ; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_a14 ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_a14
; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] { ; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] {
; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR12]] ; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR13]]
; NOT_CGSCC_NPM-NEXT: ret void ; NOT_CGSCC_NPM-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn ; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_a14 ; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_a14
; IS__CGSCC____-SAME: () #[[ATTR11]] { ; IS__CGSCC____-SAME: () #[[ATTR12]] {
; IS__CGSCC____-NEXT: call void @sink() #[[ATTR15]] ; IS__CGSCC____-NEXT: call void @sink() #[[ATTR17]]
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
call void @sink() call void @sink()
ret void ret void
} }
define internal void @non_dead_a15() { define internal void @non_dead_a15() {
; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn ; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_a15 ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_a15
; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] { ; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] {
; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR12]] ; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR13]]
; NOT_CGSCC_NPM-NEXT: ret void ; NOT_CGSCC_NPM-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn ; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_a15 ; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_a15
; IS__CGSCC____-SAME: () #[[ATTR11]] { ; IS__CGSCC____-SAME: () #[[ATTR12]] {
; IS__CGSCC____-NEXT: call void @sink() #[[ATTR15]] ; IS__CGSCC____-NEXT: call void @sink() #[[ATTR17]]
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
call void @sink() call void @sink()
ret void ret void
} }
define internal void @non_dead_b0() { define internal void @non_dead_b0() {
; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn ; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_b0 ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_b0
; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] { ; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] {
; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR12]] ; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR13]]
; NOT_CGSCC_NPM-NEXT: ret void ; NOT_CGSCC_NPM-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn ; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_b0 ; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_b0
; IS__CGSCC____-SAME: () #[[ATTR11]] { ; IS__CGSCC____-SAME: () #[[ATTR12]] {
; IS__CGSCC____-NEXT: call void @sink() #[[ATTR15]] ; IS__CGSCC____-NEXT: call void @sink() #[[ATTR17]]
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
call void @sink() call void @sink()
ret void ret void
} }
define internal void @non_dead_b1() { define internal void @non_dead_b1() {
; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn ; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_b1 ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_b1
; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] { ; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] {
; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR12]] ; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR13]]
; NOT_CGSCC_NPM-NEXT: ret void ; NOT_CGSCC_NPM-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn ; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_b1 ; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_b1
; IS__CGSCC____-SAME: () #[[ATTR11]] { ; IS__CGSCC____-SAME: () #[[ATTR12]] {
; IS__CGSCC____-NEXT: call void @sink() #[[ATTR15]] ; IS__CGSCC____-NEXT: call void @sink() #[[ATTR17]]
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
call void @sink() call void @sink()
ret void ret void
} }
define internal void @non_dead_b2() { define internal void @non_dead_b2() {
; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn ; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_b2 ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_b2
; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] { ; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] {
; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR12]] ; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR13]]
; NOT_CGSCC_NPM-NEXT: ret void ; NOT_CGSCC_NPM-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn ; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_b2 ; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_b2
; IS__CGSCC____-SAME: () #[[ATTR11]] { ; IS__CGSCC____-SAME: () #[[ATTR12]] {
; IS__CGSCC____-NEXT: call void @sink() #[[ATTR15]] ; IS__CGSCC____-NEXT: call void @sink() #[[ATTR17]]
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
call void @sink() call void @sink()
ret void ret void
} }
define internal void @non_dead_b3() { define internal void @non_dead_b3() {
; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn ; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_b3 ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_b3
; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] { ; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] {
; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR12]] ; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR13]]
; NOT_CGSCC_NPM-NEXT: ret void ; NOT_CGSCC_NPM-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn ; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_b3 ; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_b3
; IS__CGSCC____-SAME: () #[[ATTR11]] { ; IS__CGSCC____-SAME: () #[[ATTR12]] {
; IS__CGSCC____-NEXT: call void @sink() #[[ATTR15]] ; IS__CGSCC____-NEXT: call void @sink() #[[ATTR17]]
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
call void @sink() call void @sink()
ret void ret void
} }
define internal void @non_dead_b4() { define internal void @non_dead_b4() {
; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn ; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_b4 ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_b4
; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] { ; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] {
; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR12]] ; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR13]]
; NOT_CGSCC_NPM-NEXT: ret void ; NOT_CGSCC_NPM-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn ; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_b4 ; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_b4
; IS__CGSCC____-SAME: () #[[ATTR11]] { ; IS__CGSCC____-SAME: () #[[ATTR12]] {
; IS__CGSCC____-NEXT: call void @sink() #[[ATTR15]] ; IS__CGSCC____-NEXT: call void @sink() #[[ATTR17]]
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
call void @sink() call void @sink()
ret void ret void
} }
define internal void @non_dead_b5() { define internal void @non_dead_b5() {
; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn ; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_b5 ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_b5
; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] { ; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] {
; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR12]] ; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR13]]
; NOT_CGSCC_NPM-NEXT: ret void ; NOT_CGSCC_NPM-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn ; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_b5 ; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_b5
; IS__CGSCC____-SAME: () #[[ATTR11]] { ; IS__CGSCC____-SAME: () #[[ATTR12]] {
; IS__CGSCC____-NEXT: call void @sink() #[[ATTR15]] ; IS__CGSCC____-NEXT: call void @sink() #[[ATTR17]]
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
call void @sink() call void @sink()
ret void ret void
} }
define internal void @non_dead_b6() { define internal void @non_dead_b6() {
; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn ; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_b6 ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_b6
; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] { ; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] {
; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR12]] ; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR13]]
; NOT_CGSCC_NPM-NEXT: ret void ; NOT_CGSCC_NPM-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn ; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_b6 ; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_b6
; IS__CGSCC____-SAME: () #[[ATTR11]] { ; IS__CGSCC____-SAME: () #[[ATTR12]] {
; IS__CGSCC____-NEXT: call void @sink() #[[ATTR15]] ; IS__CGSCC____-NEXT: call void @sink() #[[ATTR17]]
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
call void @sink() call void @sink()
ret void ret void
} }
define internal void @non_dead_b7() { define internal void @non_dead_b7() {
; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn ; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_b7 ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_b7
; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] { ; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] {
; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR12]] ; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR13]]
; NOT_CGSCC_NPM-NEXT: ret void ; NOT_CGSCC_NPM-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn ; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_b7 ; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_b7
; IS__CGSCC____-SAME: () #[[ATTR11]] { ; IS__CGSCC____-SAME: () #[[ATTR12]] {
; IS__CGSCC____-NEXT: call void @sink() #[[ATTR15]] ; IS__CGSCC____-NEXT: call void @sink() #[[ATTR17]]
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
call void @sink() call void @sink()
ret void ret void
} }
define internal void @non_dead_b8() { define internal void @non_dead_b8() {
; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn ; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_b8 ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_b8
; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] { ; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] {
; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR12]] ; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR13]]
; NOT_CGSCC_NPM-NEXT: ret void ; NOT_CGSCC_NPM-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn ; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_b8 ; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_b8
; IS__CGSCC____-SAME: () #[[ATTR11]] { ; IS__CGSCC____-SAME: () #[[ATTR12]] {
; IS__CGSCC____-NEXT: call void @sink() #[[ATTR15]] ; IS__CGSCC____-NEXT: call void @sink() #[[ATTR17]]
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
call void @sink() call void @sink()
ret void ret void
} }
define internal void @non_dead_b9() { define internal void @non_dead_b9() {
; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn ; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_b9 ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_b9
; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] { ; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] {
; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR12]] ; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR13]]
; NOT_CGSCC_NPM-NEXT: ret void ; NOT_CGSCC_NPM-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn ; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_b9 ; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_b9
; IS__CGSCC____-SAME: () #[[ATTR11]] { ; IS__CGSCC____-SAME: () #[[ATTR12]] {
; IS__CGSCC____-NEXT: call void @sink() #[[ATTR15]] ; IS__CGSCC____-NEXT: call void @sink() #[[ATTR17]]
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
call void @sink() call void @sink()
ret void ret void
} }
define internal void @non_dead_b10() { define internal void @non_dead_b10() {
; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn ; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_b10 ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_b10
; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] { ; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] {
; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR12]] ; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR13]]
; NOT_CGSCC_NPM-NEXT: ret void ; NOT_CGSCC_NPM-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn ; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_b10 ; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_b10
; IS__CGSCC____-SAME: () #[[ATTR11]] { ; IS__CGSCC____-SAME: () #[[ATTR12]] {
; IS__CGSCC____-NEXT: call void @sink() #[[ATTR15]] ; IS__CGSCC____-NEXT: call void @sink() #[[ATTR17]]
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
call void @sink() call void @sink()
ret void ret void
} }
define internal void @non_dead_b11() { define internal void @non_dead_b11() {
; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn ; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_b11 ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_b11
; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] { ; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] {
; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR12]] ; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR13]]
; NOT_CGSCC_NPM-NEXT: ret void ; NOT_CGSCC_NPM-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn ; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_b11 ; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_b11
; IS__CGSCC____-SAME: () #[[ATTR11]] { ; IS__CGSCC____-SAME: () #[[ATTR12]] {
; IS__CGSCC____-NEXT: call void @sink() #[[ATTR15]] ; IS__CGSCC____-NEXT: call void @sink() #[[ATTR17]]
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
call void @sink() call void @sink()
ret void ret void
} }
define internal void @non_dead_b12() { define internal void @non_dead_b12() {
; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn ; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_b12 ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_b12
; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] { ; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] {
; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR12]] ; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR13]]
; NOT_CGSCC_NPM-NEXT: ret void ; NOT_CGSCC_NPM-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn ; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_b12 ; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_b12
; IS__CGSCC____-SAME: () #[[ATTR11]] { ; IS__CGSCC____-SAME: () #[[ATTR12]] {
; IS__CGSCC____-NEXT: call void @sink() #[[ATTR15]] ; IS__CGSCC____-NEXT: call void @sink() #[[ATTR17]]
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
call void @sink() call void @sink()
ret void ret void
} }
define internal void @non_dead_b13() { define internal void @non_dead_b13() {
; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn ; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_b13 ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_b13
; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] { ; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] {
; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR12]] ; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR13]]
; NOT_CGSCC_NPM-NEXT: ret void ; NOT_CGSCC_NPM-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn ; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_b13 ; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_b13
; IS__CGSCC____-SAME: () #[[ATTR11]] { ; IS__CGSCC____-SAME: () #[[ATTR12]] {
; IS__CGSCC____-NEXT: call void @sink() #[[ATTR15]] ; IS__CGSCC____-NEXT: call void @sink() #[[ATTR17]]
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
call void @sink() call void @sink()
ret void ret void
} }
define internal void @non_dead_b14() { define internal void @non_dead_b14() {
; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn ; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_b14 ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_b14
; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] { ; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] {
; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR12]] ; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR13]]
; NOT_CGSCC_NPM-NEXT: ret void ; NOT_CGSCC_NPM-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn ; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_b14 ; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_b14
; IS__CGSCC____-SAME: () #[[ATTR11]] { ; IS__CGSCC____-SAME: () #[[ATTR12]] {
; IS__CGSCC____-NEXT: call void @sink() #[[ATTR15]] ; IS__CGSCC____-NEXT: call void @sink() #[[ATTR17]]
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
call void @sink() call void @sink()
ret void ret void
} }
define internal void @non_dead_b15() { define internal void @non_dead_b15() {
; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn ; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_b15 ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_b15
; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] { ; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] {
; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR12]] ; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR13]]
; NOT_CGSCC_NPM-NEXT: ret void ; NOT_CGSCC_NPM-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn ; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_b15 ; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_b15
; IS__CGSCC____-SAME: () #[[ATTR11]] { ; IS__CGSCC____-SAME: () #[[ATTR12]] {
; IS__CGSCC____-NEXT: call void @sink() #[[ATTR15]] ; IS__CGSCC____-NEXT: call void @sink() #[[ATTR17]]
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
call void @sink() call void @sink()
ret void ret void
} }
define internal void @non_dead_c0() { define internal void @non_dead_c0() {
; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn ; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_c0 ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_c0
; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] { ; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] {
; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR12]] ; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR13]]
; NOT_CGSCC_NPM-NEXT: ret void ; NOT_CGSCC_NPM-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn ; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_c0 ; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_c0
; IS__CGSCC____-SAME: () #[[ATTR11]] { ; IS__CGSCC____-SAME: () #[[ATTR12]] {
; IS__CGSCC____-NEXT: call void @sink() #[[ATTR15]] ; IS__CGSCC____-NEXT: call void @sink() #[[ATTR17]]
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
call void @sink() call void @sink()
ret void ret void
} }
define internal void @non_dead_c1() { define internal void @non_dead_c1() {
; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn ; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_c1 ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_c1
; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] { ; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] {
; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR12]] ; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR13]]
; NOT_CGSCC_NPM-NEXT: ret void ; NOT_CGSCC_NPM-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn ; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_c1 ; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_c1
; IS__CGSCC____-SAME: () #[[ATTR11]] { ; IS__CGSCC____-SAME: () #[[ATTR12]] {
; IS__CGSCC____-NEXT: call void @sink() #[[ATTR15]] ; IS__CGSCC____-NEXT: call void @sink() #[[ATTR17]]
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
call void @sink() call void @sink()
ret void ret void
} }
define internal void @non_dead_c2() { define internal void @non_dead_c2() {
; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn ; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_c2 ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_c2
; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] { ; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] {
; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR12]] ; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR13]]
; NOT_CGSCC_NPM-NEXT: ret void ; NOT_CGSCC_NPM-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn ; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_c2 ; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_c2
; IS__CGSCC____-SAME: () #[[ATTR11]] { ; IS__CGSCC____-SAME: () #[[ATTR12]] {
; IS__CGSCC____-NEXT: call void @sink() #[[ATTR15]] ; IS__CGSCC____-NEXT: call void @sink() #[[ATTR17]]
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
call void @sink() call void @sink()
ret void ret void
} }
define internal void @non_dead_c3() { define internal void @non_dead_c3() {
; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn ; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_c3 ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_c3
; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] { ; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] {
; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR12]] ; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR13]]
; NOT_CGSCC_NPM-NEXT: ret void ; NOT_CGSCC_NPM-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn ; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_c3 ; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_c3
; IS__CGSCC____-SAME: () #[[ATTR11]] { ; IS__CGSCC____-SAME: () #[[ATTR12]] {
; IS__CGSCC____-NEXT: call void @sink() #[[ATTR15]] ; IS__CGSCC____-NEXT: call void @sink() #[[ATTR17]]
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
call void @sink() call void @sink()
ret void ret void
} }
define internal void @non_dead_c4() { define internal void @non_dead_c4() {
; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn ; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_c4 ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_c4
; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] { ; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] {
; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR12]] ; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR13]]
; NOT_CGSCC_NPM-NEXT: ret void ; NOT_CGSCC_NPM-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn ; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_c4 ; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_c4
; IS__CGSCC____-SAME: () #[[ATTR11]] { ; IS__CGSCC____-SAME: () #[[ATTR12]] {
; IS__CGSCC____-NEXT: call void @sink() #[[ATTR15]] ; IS__CGSCC____-NEXT: call void @sink() #[[ATTR17]]
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
call void @sink() call void @sink()
ret void ret void
} }
define internal void @non_dead_c5() { define internal void @non_dead_c5() {
; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn ; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_c5 ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_c5
; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] { ; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] {
; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR12]] ; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR13]]
; NOT_CGSCC_NPM-NEXT: ret void ; NOT_CGSCC_NPM-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn ; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_c5 ; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_c5
; IS__CGSCC____-SAME: () #[[ATTR11]] { ; IS__CGSCC____-SAME: () #[[ATTR12]] {
; IS__CGSCC____-NEXT: call void @sink() #[[ATTR15]] ; IS__CGSCC____-NEXT: call void @sink() #[[ATTR17]]
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
call void @sink() call void @sink()
ret void ret void
} }
define internal void @non_dead_c6() { define internal void @non_dead_c6() {
; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn ; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_c6 ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_c6
; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] { ; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] {
; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR12]] ; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR13]]
; NOT_CGSCC_NPM-NEXT: ret void ; NOT_CGSCC_NPM-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn ; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_c6 ; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_c6
; IS__CGSCC____-SAME: () #[[ATTR11]] { ; IS__CGSCC____-SAME: () #[[ATTR12]] {
; IS__CGSCC____-NEXT: call void @sink() #[[ATTR15]] ; IS__CGSCC____-NEXT: call void @sink() #[[ATTR17]]
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
call void @sink() call void @sink()
ret void ret void
} }
define internal void @non_dead_c7() { define internal void @non_dead_c7() {
; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn ; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_c7 ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_c7
; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] { ; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] {
; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR12]] ; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR13]]
; NOT_CGSCC_NPM-NEXT: ret void ; NOT_CGSCC_NPM-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn ; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_c7 ; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_c7
; IS__CGSCC____-SAME: () #[[ATTR11]] { ; IS__CGSCC____-SAME: () #[[ATTR12]] {
; IS__CGSCC____-NEXT: call void @sink() #[[ATTR15]] ; IS__CGSCC____-NEXT: call void @sink() #[[ATTR17]]
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
call void @sink() call void @sink()
ret void ret void
} }
define internal void @non_dead_c8() { define internal void @non_dead_c8() {
; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn ; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_c8 ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_c8
; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] { ; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] {
; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR12]] ; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR13]]
; NOT_CGSCC_NPM-NEXT: ret void ; NOT_CGSCC_NPM-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn ; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_c8 ; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_c8
; IS__CGSCC____-SAME: () #[[ATTR11]] { ; IS__CGSCC____-SAME: () #[[ATTR12]] {
; IS__CGSCC____-NEXT: call void @sink() #[[ATTR15]] ; IS__CGSCC____-NEXT: call void @sink() #[[ATTR17]]
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
call void @sink() call void @sink()
ret void ret void
} }
define internal void @non_dead_c9() { define internal void @non_dead_c9() {
; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn ; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_c9 ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_c9
; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] { ; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] {
; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR12]] ; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR13]]
; NOT_CGSCC_NPM-NEXT: ret void ; NOT_CGSCC_NPM-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn ; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_c9 ; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_c9
; IS__CGSCC____-SAME: () #[[ATTR11]] { ; IS__CGSCC____-SAME: () #[[ATTR12]] {
; IS__CGSCC____-NEXT: call void @sink() #[[ATTR15]] ; IS__CGSCC____-NEXT: call void @sink() #[[ATTR17]]
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
call void @sink() call void @sink()
ret void ret void
} }
define internal void @non_dead_c10() { define internal void @non_dead_c10() {
; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn ; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_c10 ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_c10
; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] { ; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] {
; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR12]] ; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR13]]
; NOT_CGSCC_NPM-NEXT: ret void ; NOT_CGSCC_NPM-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn ; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_c10 ; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_c10
; IS__CGSCC____-SAME: () #[[ATTR11]] { ; IS__CGSCC____-SAME: () #[[ATTR12]] {
; IS__CGSCC____-NEXT: call void @sink() #[[ATTR15]] ; IS__CGSCC____-NEXT: call void @sink() #[[ATTR17]]
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
call void @sink() call void @sink()
ret void ret void
} }
define internal void @non_dead_c11() { define internal void @non_dead_c11() {
; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn ; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_c11 ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_c11
; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] { ; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] {
; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR12]] ; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR13]]
; NOT_CGSCC_NPM-NEXT: ret void ; NOT_CGSCC_NPM-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn ; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_c11 ; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_c11
; IS__CGSCC____-SAME: () #[[ATTR11]] { ; IS__CGSCC____-SAME: () #[[ATTR12]] {
; IS__CGSCC____-NEXT: call void @sink() #[[ATTR15]] ; IS__CGSCC____-NEXT: call void @sink() #[[ATTR17]]
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
call void @sink() call void @sink()
ret void ret void
} }
define internal void @non_dead_c12() { define internal void @non_dead_c12() {
; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn ; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_c12 ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_c12
; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] { ; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] {
; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR12]] ; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR13]]
; NOT_CGSCC_NPM-NEXT: ret void ; NOT_CGSCC_NPM-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn ; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_c12 ; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_c12
; IS__CGSCC____-SAME: () #[[ATTR11]] { ; IS__CGSCC____-SAME: () #[[ATTR12]] {
; IS__CGSCC____-NEXT: call void @sink() #[[ATTR15]] ; IS__CGSCC____-NEXT: call void @sink() #[[ATTR17]]
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
call void @sink() call void @sink()
ret void ret void
} }
define internal void @non_dead_c13() { define internal void @non_dead_c13() {
; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn ; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_c13 ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_c13
; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] { ; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] {
; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR12]] ; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR13]]
; NOT_CGSCC_NPM-NEXT: ret void ; NOT_CGSCC_NPM-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn ; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_c13 ; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_c13
; IS__CGSCC____-SAME: () #[[ATTR11]] { ; IS__CGSCC____-SAME: () #[[ATTR12]] {
; IS__CGSCC____-NEXT: call void @sink() #[[ATTR15]] ; IS__CGSCC____-NEXT: call void @sink() #[[ATTR17]]
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
call void @sink() call void @sink()
ret void ret void
} }
define internal void @non_dead_c14() { define internal void @non_dead_c14() {
; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn ; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_c14 ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_c14
; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] { ; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] {
; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR12]] ; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR13]]
; NOT_CGSCC_NPM-NEXT: ret void ; NOT_CGSCC_NPM-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn ; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_c14 ; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_c14
; IS__CGSCC____-SAME: () #[[ATTR11]] { ; IS__CGSCC____-SAME: () #[[ATTR12]] {
; IS__CGSCC____-NEXT: call void @sink() #[[ATTR15]] ; IS__CGSCC____-NEXT: call void @sink() #[[ATTR17]]
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
call void @sink() call void @sink()
ret void ret void
} }
define internal void @non_dead_c15() { define internal void @non_dead_c15() {
; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn ; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_c15 ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_c15
; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] { ; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] {
; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR12]] ; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR13]]
; NOT_CGSCC_NPM-NEXT: ret void ; NOT_CGSCC_NPM-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn ; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_c15 ; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_c15
; IS__CGSCC____-SAME: () #[[ATTR11]] { ; IS__CGSCC____-SAME: () #[[ATTR12]] {
; IS__CGSCC____-NEXT: call void @sink() #[[ATTR15]] ; IS__CGSCC____-NEXT: call void @sink() #[[ATTR17]]
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
call void @sink() call void @sink()
ret void ret void
} }
define internal void @non_dead_d0() { define internal void @non_dead_d0() {
; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn ; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_d0 ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_d0
; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] { ; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] {
; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR12]] ; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR13]]
; NOT_CGSCC_NPM-NEXT: ret void ; NOT_CGSCC_NPM-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn ; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_d0 ; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_d0
; IS__CGSCC____-SAME: () #[[ATTR11]] { ; IS__CGSCC____-SAME: () #[[ATTR12]] {
; IS__CGSCC____-NEXT: call void @sink() #[[ATTR15]] ; IS__CGSCC____-NEXT: call void @sink() #[[ATTR17]]
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
call void @sink() call void @sink()
ret void ret void
} }
define internal void @non_dead_d1() { define internal void @non_dead_d1() {
; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn ; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_d1 ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_d1
; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] { ; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] {
; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR12]] ; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR13]]
; NOT_CGSCC_NPM-NEXT: ret void ; NOT_CGSCC_NPM-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn ; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_d1 ; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_d1
; IS__CGSCC____-SAME: () #[[ATTR11]] { ; IS__CGSCC____-SAME: () #[[ATTR12]] {
; IS__CGSCC____-NEXT: call void @sink() #[[ATTR15]] ; IS__CGSCC____-NEXT: call void @sink() #[[ATTR17]]
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
call void @sink() call void @sink()
ret void ret void
} }
define internal void @non_dead_d2() { define internal void @non_dead_d2() {
; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn ; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_d2 ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_d2
; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] { ; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] {
; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR12]] ; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR13]]
; NOT_CGSCC_NPM-NEXT: ret void ; NOT_CGSCC_NPM-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn ; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_d2 ; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_d2
; IS__CGSCC____-SAME: () #[[ATTR11]] { ; IS__CGSCC____-SAME: () #[[ATTR12]] {
; IS__CGSCC____-NEXT: call void @sink() #[[ATTR15]] ; IS__CGSCC____-NEXT: call void @sink() #[[ATTR17]]
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
call void @sink() call void @sink()
ret void ret void
} }
define internal void @non_dead_d3() { define internal void @non_dead_d3() {
; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn ; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_d3 ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_d3
; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] { ; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] {
; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR12]] ; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR13]]
; NOT_CGSCC_NPM-NEXT: ret void ; NOT_CGSCC_NPM-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn ; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_d3 ; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_d3
; IS__CGSCC____-SAME: () #[[ATTR11]] { ; IS__CGSCC____-SAME: () #[[ATTR12]] {
; IS__CGSCC____-NEXT: call void @sink() #[[ATTR15]] ; IS__CGSCC____-NEXT: call void @sink() #[[ATTR17]]
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
call void @sink() call void @sink()
ret void ret void
} }
define internal void @non_dead_d4() { define internal void @non_dead_d4() {
; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn ; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_d4 ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_d4
; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] { ; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] {
; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR12]] ; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR13]]
; NOT_CGSCC_NPM-NEXT: ret void ; NOT_CGSCC_NPM-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn ; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_d4 ; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_d4
; IS__CGSCC____-SAME: () #[[ATTR11]] { ; IS__CGSCC____-SAME: () #[[ATTR12]] {
; IS__CGSCC____-NEXT: call void @sink() #[[ATTR15]] ; IS__CGSCC____-NEXT: call void @sink() #[[ATTR17]]
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
call void @sink() call void @sink()
ret void ret void
} }
define internal void @non_dead_d5() { define internal void @non_dead_d5() {
; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn ; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_d5 ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_d5
; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] { ; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] {
; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR12]] ; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR13]]
; NOT_CGSCC_NPM-NEXT: ret void ; NOT_CGSCC_NPM-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn ; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_d5 ; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_d5
; IS__CGSCC____-SAME: () #[[ATTR11]] { ; IS__CGSCC____-SAME: () #[[ATTR12]] {
; IS__CGSCC____-NEXT: call void @sink() #[[ATTR15]] ; IS__CGSCC____-NEXT: call void @sink() #[[ATTR17]]
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
call void @sink() call void @sink()
ret void ret void
} }
define internal void @non_dead_d6() { define internal void @non_dead_d6() {
; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn ; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_d6 ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_d6
; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] { ; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] {
; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR12]] ; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR13]]
; NOT_CGSCC_NPM-NEXT: ret void ; NOT_CGSCC_NPM-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn ; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_d6 ; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_d6
; IS__CGSCC____-SAME: () #[[ATTR11]] { ; IS__CGSCC____-SAME: () #[[ATTR12]] {
; IS__CGSCC____-NEXT: call void @sink() #[[ATTR15]] ; IS__CGSCC____-NEXT: call void @sink() #[[ATTR17]]
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
call void @sink() call void @sink()
ret void ret void
} }
define internal void @non_dead_d7() { define internal void @non_dead_d7() {
; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn ; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_d7 ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_d7
; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] { ; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] {
; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR12]] ; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR13]]
; NOT_CGSCC_NPM-NEXT: ret void ; NOT_CGSCC_NPM-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn ; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_d7 ; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_d7
; IS__CGSCC____-SAME: () #[[ATTR11]] { ; IS__CGSCC____-SAME: () #[[ATTR12]] {
; IS__CGSCC____-NEXT: call void @sink() #[[ATTR15]] ; IS__CGSCC____-NEXT: call void @sink() #[[ATTR17]]
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
call void @sink() call void @sink()
ret void ret void
} }
define internal void @non_dead_d8() { define internal void @non_dead_d8() {
; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn ; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_d8 ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_d8
; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] { ; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] {
; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR12]] ; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR13]]
; NOT_CGSCC_NPM-NEXT: ret void ; NOT_CGSCC_NPM-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn ; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_d8 ; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_d8
; IS__CGSCC____-SAME: () #[[ATTR11]] { ; IS__CGSCC____-SAME: () #[[ATTR12]] {
; IS__CGSCC____-NEXT: call void @sink() #[[ATTR15]] ; IS__CGSCC____-NEXT: call void @sink() #[[ATTR17]]
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
call void @sink() call void @sink()
ret void ret void
} }
define internal void @non_dead_d9() { define internal void @non_dead_d9() {
; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn ; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_d9 ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_d9
; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] { ; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] {
; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR12]] ; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR13]]
; NOT_CGSCC_NPM-NEXT: ret void ; NOT_CGSCC_NPM-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn ; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_d9 ; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_d9
; IS__CGSCC____-SAME: () #[[ATTR11]] { ; IS__CGSCC____-SAME: () #[[ATTR12]] {
; IS__CGSCC____-NEXT: call void @sink() #[[ATTR15]] ; IS__CGSCC____-NEXT: call void @sink() #[[ATTR17]]
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
call void @sink() call void @sink()
ret void ret void
} }
define internal void @non_dead_d10() { define internal void @non_dead_d10() {
; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn ; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_d10 ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_d10
; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] { ; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] {
; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR12]] ; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR13]]
; NOT_CGSCC_NPM-NEXT: ret void ; NOT_CGSCC_NPM-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn ; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_d10 ; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_d10
; IS__CGSCC____-SAME: () #[[ATTR11]] { ; IS__CGSCC____-SAME: () #[[ATTR12]] {
; IS__CGSCC____-NEXT: call void @sink() #[[ATTR15]] ; IS__CGSCC____-NEXT: call void @sink() #[[ATTR17]]
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
call void @sink() call void @sink()
ret void ret void
} }
define internal void @non_dead_d11() { define internal void @non_dead_d11() {
; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn ; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_d11 ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_d11
; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] { ; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] {
; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR12]] ; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR13]]
; NOT_CGSCC_NPM-NEXT: ret void ; NOT_CGSCC_NPM-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn ; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_d11 ; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_d11
; IS__CGSCC____-SAME: () #[[ATTR11]] { ; IS__CGSCC____-SAME: () #[[ATTR12]] {
; IS__CGSCC____-NEXT: call void @sink() #[[ATTR15]] ; IS__CGSCC____-NEXT: call void @sink() #[[ATTR17]]
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
call void @sink() call void @sink()
ret void ret void
} }
define internal void @non_dead_d12() { define internal void @non_dead_d12() {
; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn ; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_d12 ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_d12
; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] { ; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] {
; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR12]] ; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR13]]
; NOT_CGSCC_NPM-NEXT: ret void ; NOT_CGSCC_NPM-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn ; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_d12 ; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_d12
; IS__CGSCC____-SAME: () #[[ATTR11]] { ; IS__CGSCC____-SAME: () #[[ATTR12]] {
; IS__CGSCC____-NEXT: call void @sink() #[[ATTR15]] ; IS__CGSCC____-NEXT: call void @sink() #[[ATTR17]]
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
call void @sink() call void @sink()
ret void ret void
} }
define internal void @non_dead_d13() { define internal void @non_dead_d13() {
; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn ; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_d13 ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_d13
; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] { ; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] {
; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR12]] ; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR13]]
; NOT_CGSCC_NPM-NEXT: ret void ; NOT_CGSCC_NPM-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn ; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_d13 ; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_d13
; IS__CGSCC____-SAME: () #[[ATTR11]] { ; IS__CGSCC____-SAME: () #[[ATTR12]] {
; IS__CGSCC____-NEXT: call void @sink() #[[ATTR15]] ; IS__CGSCC____-NEXT: call void @sink() #[[ATTR17]]
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
call void @sink() call void @sink()
ret void ret void
} }
define internal void @non_dead_d14() { define internal void @non_dead_d14() {
; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn ; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_d14 ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_d14
; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] { ; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] {
; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR12]] ; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR13]]
; NOT_CGSCC_NPM-NEXT: ret void ; NOT_CGSCC_NPM-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn ; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_d14 ; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_d14
; IS__CGSCC____-SAME: () #[[ATTR11]] { ; IS__CGSCC____-SAME: () #[[ATTR12]] {
; IS__CGSCC____-NEXT: call void @sink() #[[ATTR15]] ; IS__CGSCC____-NEXT: call void @sink() #[[ATTR17]]
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
call void @sink() call void @sink()
ret void ret void
} }
define internal void @non_dead_d15() { define internal void @non_dead_d15() {
; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn ; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_d15 ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@non_dead_d15
; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] { ; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] {
; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR12]] ; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR13]]
; NOT_CGSCC_NPM-NEXT: ret void ; NOT_CGSCC_NPM-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn ; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_d15 ; IS__CGSCC____-LABEL: define {{[^@]+}}@non_dead_d15
; IS__CGSCC____-SAME: () #[[ATTR11]] { ; IS__CGSCC____-SAME: () #[[ATTR12]] {
; IS__CGSCC____-NEXT: call void @sink() #[[ATTR15]] ; IS__CGSCC____-NEXT: call void @sink() #[[ATTR17]]
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
call void @sink() call void @sink()
ret void ret void
} }
define internal void @dead_e0() { call void @dead_e1() ret void } define internal void @dead_e0() { call void @dead_e1() ret void }
; IS__CGSCC____-LABEL: define {{[^@]+}}@dead_e0() { ; IS__CGSCC____-LABEL: define {{[^@]+}}@dead_e0() {
; IS__CGSCC____-NEXT: call void @dead_e1() ; IS__CGSCC____-NEXT: call void @dead_e1()
▲ Show 20 Lines • Show All 49 Lines • ▼ Show 20 Lines
live_with_dead_entry: live_with_dead_entry:
ret void ret void
} }
define internal void @useless_arg_sink(i32* %a) { define internal void @useless_arg_sink(i32* %a) {
; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn ; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@useless_arg_sink ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@useless_arg_sink
; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] { ; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] {
; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR12]] ; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR13]]
; NOT_CGSCC_NPM-NEXT: ret void ; NOT_CGSCC_NPM-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn ; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@useless_arg_sink ; IS__CGSCC____-LABEL: define {{[^@]+}}@useless_arg_sink
; IS__CGSCC____-SAME: () #[[ATTR11]] { ; IS__CGSCC____-SAME: () #[[ATTR12]] {
; IS__CGSCC____-NEXT: call void @sink() #[[ATTR15]] ; IS__CGSCC____-NEXT: call void @sink() #[[ATTR17]]
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
call void @sink() call void @sink()
ret void ret void
} }
define internal void @useless_arg_almost_sink(i32* %a) { define internal void @useless_arg_almost_sink(i32* %a) {
; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn ; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@useless_arg_almost_sink ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@useless_arg_almost_sink
; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] { ; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] {
; NOT_CGSCC_NPM-NEXT: call void @useless_arg_sink() #[[ATTR10]] ; NOT_CGSCC_NPM-NEXT: call void @useless_arg_sink() #[[ATTR10]]
; NOT_CGSCC_NPM-NEXT: ret void ; NOT_CGSCC_NPM-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn ; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@useless_arg_almost_sink ; IS__CGSCC____-LABEL: define {{[^@]+}}@useless_arg_almost_sink
; IS__CGSCC____-SAME: () #[[ATTR11]] { ; IS__CGSCC____-SAME: () #[[ATTR12]] {
; IS__CGSCC____-NEXT: call void @useless_arg_sink() #[[ATTR15]] ; IS__CGSCC____-NEXT: call void @useless_arg_sink() #[[ATTR17]]
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
call void @useless_arg_sink(i32* %a) call void @useless_arg_sink(i32* %a)
ret void ret void
} }
; Check we do not annotate the function interface of this weak function. ; Check we do not annotate the function interface of this weak function.
define weak_odr void @useless_arg_ext(i32* %a) { define weak_odr void @useless_arg_ext(i32* %a) {
Show All 33 Lines
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@switch_default ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@switch_default
; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] { ; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] {
; NOT_CGSCC_NPM-NEXT: entry: ; NOT_CGSCC_NPM-NEXT: entry:
; NOT_CGSCC_NPM-NEXT: switch i64 0, label [[SW_DEFAULT:%.*]] [ ; NOT_CGSCC_NPM-NEXT: switch i64 0, label [[SW_DEFAULT:%.*]] [
; NOT_CGSCC_NPM-NEXT: i64 3, label [[RETURN:%.*]] ; NOT_CGSCC_NPM-NEXT: i64 3, label [[RETURN:%.*]]
; NOT_CGSCC_NPM-NEXT: i64 10, label [[RETURN]] ; NOT_CGSCC_NPM-NEXT: i64 10, label [[RETURN]]
; NOT_CGSCC_NPM-NEXT: ] ; NOT_CGSCC_NPM-NEXT: ]
; NOT_CGSCC_NPM: sw.default: ; NOT_CGSCC_NPM: sw.default:
; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR12]] ; NOT_CGSCC_NPM-NEXT: call void @sink() #[[ATTR13]]
; NOT_CGSCC_NPM-NEXT: ret i32 undef ; NOT_CGSCC_NPM-NEXT: ret i32 undef
; NOT_CGSCC_NPM: return: ; NOT_CGSCC_NPM: return:
; NOT_CGSCC_NPM-NEXT: unreachable ; NOT_CGSCC_NPM-NEXT: unreachable
; ;
; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn ; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@switch_default ; IS__CGSCC____-LABEL: define {{[^@]+}}@switch_default
; IS__CGSCC____-SAME: () #[[ATTR11]] { ; IS__CGSCC____-SAME: () #[[ATTR12]] {
; IS__CGSCC____-NEXT: entry: ; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: switch i64 0, label [[SW_DEFAULT:%.*]] [ ; IS__CGSCC____-NEXT: switch i64 0, label [[SW_DEFAULT:%.*]] [
; IS__CGSCC____-NEXT: i64 3, label [[RETURN:%.*]] ; IS__CGSCC____-NEXT: i64 3, label [[RETURN:%.*]]
; IS__CGSCC____-NEXT: i64 10, label [[RETURN]] ; IS__CGSCC____-NEXT: i64 10, label [[RETURN]]
; IS__CGSCC____-NEXT: ] ; IS__CGSCC____-NEXT: ]
; IS__CGSCC____: sw.default: ; IS__CGSCC____: sw.default:
; IS__CGSCC____-NEXT: call void @sink() #[[ATTR15]] ; IS__CGSCC____-NEXT: call void @sink() #[[ATTR17]]
; IS__CGSCC____-NEXT: ret i32 undef ; IS__CGSCC____-NEXT: ret i32 undef
; IS__CGSCC____: return: ; IS__CGSCC____: return:
; IS__CGSCC____-NEXT: unreachable ; IS__CGSCC____-NEXT: unreachable
; ;
entry: entry:
switch i64 %i, label %sw.default [ switch i64 %i, label %sw.default [
i64 3, label %return i64 3, label %return
i64 10, label %return i64 10, label %return
Show All 11 Lines
; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn ; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@switch_default_caller ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@switch_default_caller
; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] { ; NOT_CGSCC_NPM-SAME: () #[[ATTR10]] {
; NOT_CGSCC_NPM-NEXT: [[CALL2:%.*]] = tail call i32 @switch_default() #[[ATTR10]] ; NOT_CGSCC_NPM-NEXT: [[CALL2:%.*]] = tail call i32 @switch_default() #[[ATTR10]]
; NOT_CGSCC_NPM-NEXT: ret i32 123 ; NOT_CGSCC_NPM-NEXT: ret i32 123
; ;
; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn ; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@switch_default_caller ; IS__CGSCC____-LABEL: define {{[^@]+}}@switch_default_caller
; IS__CGSCC____-SAME: () #[[ATTR11]] { ; IS__CGSCC____-SAME: () #[[ATTR12]] {
; IS__CGSCC____-NEXT: [[CALL2:%.*]] = tail call i32 @switch_default() #[[ATTR15]] ; IS__CGSCC____-NEXT: [[CALL2:%.*]] = tail call i32 @switch_default() #[[ATTR17]]
; IS__CGSCC____-NEXT: ret i32 123 ; IS__CGSCC____-NEXT: ret i32 123
; ;
%call2 = tail call i32 @switch_default(i64 0) %call2 = tail call i32 @switch_default(i64 0)
ret i32 %call2 ret i32 %call2
} }
define internal i32 @switch_default_dead(i64 %i) nounwind { define internal i32 @switch_default_dead(i64 %i) nounwind {
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
Show All 18 Lines
sw.default: sw.default:
ret i32 123 ret i32 123
return: return:
ret i32 0 ret i32 0
} }
define i32 @switch_default_dead_caller() { define i32 @switch_default_dead_caller() {
; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind readnone willreturn ; NOT_CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@switch_default_dead_caller ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@switch_default_dead_caller
; NOT_CGSCC_NPM-SAME: () #[[ATTR9]] { ; NOT_CGSCC_NPM-SAME: () #[[ATTR9]] {
; NOT_CGSCC_NPM-NEXT: ret i32 123 ; NOT_CGSCC_NPM-NEXT: ret i32 123
; ;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@switch_default_dead_caller ; IS__CGSCC____-LABEL: define {{[^@]+}}@switch_default_dead_caller
; IS__CGSCC____-SAME: () #[[ATTR6]] { ; IS__CGSCC____-SAME: () #[[ATTR6]] {
; IS__CGSCC____-NEXT: ret i32 123 ; IS__CGSCC____-NEXT: ret i32 123
Show All 13 Lines
} }
; FIXME: We have to prevent the propagation of %fp in the new pm CGSCC pass until the CallGraphUpdater can handle the new call edge. ; FIXME: We have to prevent the propagation of %fp in the new pm CGSCC pass until the CallGraphUpdater can handle the new call edge.
define internal void @call_via_pointer_with_dead_args_internal_a(i32* %a, i32* %b, void (i32*, i32*, i32*, i64, i32**)* %fp) { define internal void @call_via_pointer_with_dead_args_internal_a(i32* %a, i32* %b, void (i32*, i32*, i32*, i64, i32**)* %fp) {
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@call_via_pointer_with_dead_args_internal_a ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@call_via_pointer_with_dead_args_internal_a
; NOT_CGSCC_NPM-SAME: (i32* [[A:%.*]], i32* noundef nonnull align 128 dereferenceable(4) [[B:%.*]]) { ; NOT_CGSCC_NPM-SAME: (i32* [[A:%.*]], i32* noundef nonnull align 128 dereferenceable(4) [[B:%.*]]) {
; NOT_CGSCC_NPM-NEXT: call void @called_via_pointer(i32* [[A]], i32* nonnull align 128 dereferenceable(4) [[B]], i32* [[A]], i64 -1, i32** null) ; NOT_CGSCC_NPM-NEXT: call void @called_via_pointer(i32* [[A]], i32* nonnull align 128 dereferenceable(4) [[B]], i32* [[A]], i64 -1, i32** null)
; NOT_CGSCC_NPM-NEXT: ret void ; NOT_CGSCC_NPM-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: norecurse
; IS__CGSCC____-LABEL: define {{[^@]+}}@call_via_pointer_with_dead_args_internal_a ; IS__CGSCC____-LABEL: define {{[^@]+}}@call_via_pointer_with_dead_args_internal_a
; IS__CGSCC____-SAME: (i32* [[A:%.*]], i32* noundef nonnull align 128 dereferenceable(4) [[B:%.*]], void (i32*, i32*, i32*, i64, i32**)* nocapture nofree noundef nonnull [[FP:%.*]]) { ; IS__CGSCC____-SAME: (i32* [[A:%.*]], i32* noundef nonnull align 128 dereferenceable(4) [[B:%.*]], void (i32*, i32*, i32*, i64, i32**)* nocapture nofree noundef nonnull [[FP:%.*]]) #[[ATTR13:[0-9]+]] {
; IS__CGSCC____-NEXT: call void [[FP]](i32* [[A]], i32* nonnull align 128 dereferenceable(4) [[B]], i32* [[A]], i64 -1, i32** null) ; IS__CGSCC____-NEXT: call void [[FP]](i32* [[A]], i32* nonnull align 128 dereferenceable(4) [[B]], i32* [[A]], i64 -1, i32** null)
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
call void %fp(i32* %a, i32* %b, i32* %a, i64 -1, i32** null) call void %fp(i32* %a, i32* %b, i32* %a, i64 -1, i32** null)
ret void ret void
} }
define internal void @call_via_pointer_with_dead_args_internal_b(i32* %a, i32* %b, void (i32*, i32*, i32*, i64, i32**)* %fp) { define internal void @call_via_pointer_with_dead_args_internal_b(i32* %a, i32* %b, void (i32*, i32*, i32*, i64, i32**)* %fp) {
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@call_via_pointer_with_dead_args_internal_b ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@call_via_pointer_with_dead_args_internal_b
; NOT_CGSCC_NPM-SAME: (i32* [[A:%.*]], i32* noundef nonnull align 128 dereferenceable(4) [[B:%.*]]) { ; NOT_CGSCC_NPM-SAME: (i32* [[A:%.*]], i32* noundef nonnull align 128 dereferenceable(4) [[B:%.*]]) {
; NOT_CGSCC_NPM-NEXT: call void @called_via_pointer_internal_2(i32* [[A]], i32* nonnull align 128 dereferenceable(4) [[B]], i32* [[A]], i64 -1, i32** null) ; NOT_CGSCC_NPM-NEXT: call void @called_via_pointer_internal_2(i32* [[A]], i32* nonnull align 128 dereferenceable(4) [[B]], i32* [[A]], i64 -1, i32** null)
; NOT_CGSCC_NPM-NEXT: ret void ; NOT_CGSCC_NPM-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: norecurse
; IS__CGSCC____-LABEL: define {{[^@]+}}@call_via_pointer_with_dead_args_internal_b ; IS__CGSCC____-LABEL: define {{[^@]+}}@call_via_pointer_with_dead_args_internal_b
; IS__CGSCC____-SAME: (i32* [[A:%.*]], i32* noundef nonnull align 128 dereferenceable(4) [[B:%.*]], void (i32*, i32*, i32*, i64, i32**)* nocapture nofree noundef nonnull [[FP:%.*]]) { ; IS__CGSCC____-SAME: (i32* [[A:%.*]], i32* noundef nonnull align 128 dereferenceable(4) [[B:%.*]], void (i32*, i32*, i32*, i64, i32**)* nocapture nofree noundef nonnull [[FP:%.*]]) #[[ATTR13]] {
; IS__CGSCC____-NEXT: call void [[FP]](i32* [[A]], i32* nonnull align 128 dereferenceable(4) [[B]], i32* [[A]], i64 -1, i32** null) ; IS__CGSCC____-NEXT: call void [[FP]](i32* [[A]], i32* nonnull align 128 dereferenceable(4) [[B]], i32* [[A]], i64 -1, i32** null)
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
call void %fp(i32* %a, i32* %b, i32* %a, i64 -1, i32** null) call void %fp(i32* %a, i32* %b, i32* %a, i64 -1, i32** null)
ret void ret void
} }
define void @call_via_pointer_with_dead_args_caller(i32* %a, i32* %b) { define void @call_via_pointer_with_dead_args_caller(i32* %a, i32* %b) {
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@call_via_pointer_with_dead_args_caller ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@call_via_pointer_with_dead_args_caller
; NOT_CGSCC_NPM-SAME: (i32* [[A:%.*]], i32* [[B:%.*]]) { ; NOT_CGSCC_NPM-SAME: (i32* [[A:%.*]], i32* [[B:%.*]]) {
; NOT_CGSCC_NPM-NEXT: [[PTR1:%.*]] = alloca i32, align 128 ; NOT_CGSCC_NPM-NEXT: [[PTR1:%.*]] = alloca i32, align 128
; NOT_CGSCC_NPM-NEXT: [[PTR2:%.*]] = alloca i32, align 128 ; NOT_CGSCC_NPM-NEXT: [[PTR2:%.*]] = alloca i32, align 128
; NOT_CGSCC_NPM-NEXT: [[PTR3:%.*]] = alloca i32, align 128 ; NOT_CGSCC_NPM-NEXT: [[PTR3:%.*]] = alloca i32, align 128
; NOT_CGSCC_NPM-NEXT: [[PTR4:%.*]] = alloca i32, align 128 ; NOT_CGSCC_NPM-NEXT: [[PTR4:%.*]] = alloca i32, align 128
; NOT_CGSCC_NPM-NEXT: call void @call_via_pointer_with_dead_args(i32* [[A]], i32* noundef nonnull align 128 dereferenceable(4) [[PTR1]], void (i32*, i32*, i32*, i64, i32**)* nocapture nofree noundef @called_via_pointer) ; NOT_CGSCC_NPM-NEXT: call void @call_via_pointer_with_dead_args(i32* [[A]], i32* noundef nonnull align 128 dereferenceable(4) [[PTR1]], void (i32*, i32*, i32*, i64, i32**)* nocapture nofree noundef @called_via_pointer)
; NOT_CGSCC_NPM-NEXT: call void @call_via_pointer_with_dead_args(i32* [[A]], i32* noundef nonnull align 128 dereferenceable(4) [[PTR2]], void (i32*, i32*, i32*, i64, i32**)* nocapture nofree noundef @called_via_pointer_internal_1) ; NOT_CGSCC_NPM-NEXT: call void @call_via_pointer_with_dead_args(i32* [[A]], i32* noundef nonnull align 128 dereferenceable(4) [[PTR2]], void (i32*, i32*, i32*, i64, i32**)* nocapture nofree noundef @called_via_pointer_internal_1)
; NOT_CGSCC_NPM-NEXT: call void @call_via_pointer_with_dead_args_internal_a(i32* [[B]], i32* noundef nonnull align 128 dereferenceable(4) [[PTR3]]) ; NOT_CGSCC_NPM-NEXT: call void @call_via_pointer_with_dead_args_internal_a(i32* [[B]], i32* noundef nonnull align 128 dereferenceable(4) [[PTR3]])
; NOT_CGSCC_NPM-NEXT: call void @call_via_pointer_with_dead_args_internal_b(i32* [[B]], i32* noundef nonnull align 128 dereferenceable(4) [[PTR4]]) ; NOT_CGSCC_NPM-NEXT: call void @call_via_pointer_with_dead_args_internal_b(i32* [[B]], i32* noundef nonnull align 128 dereferenceable(4) [[PTR4]])
; NOT_CGSCC_NPM-NEXT: ret void ; NOT_CGSCC_NPM-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: norecurse
; IS__CGSCC____-LABEL: define {{[^@]+}}@call_via_pointer_with_dead_args_caller ; IS__CGSCC____-LABEL: define {{[^@]+}}@call_via_pointer_with_dead_args_caller
; IS__CGSCC____-SAME: (i32* [[A:%.*]], i32* [[B:%.*]]) { ; IS__CGSCC____-SAME: (i32* [[A:%.*]], i32* [[B:%.*]]) #[[ATTR13]] {
; IS__CGSCC____-NEXT: [[PTR1:%.*]] = alloca i32, align 128 ; IS__CGSCC____-NEXT: [[PTR1:%.*]] = alloca i32, align 128
; IS__CGSCC____-NEXT: [[PTR2:%.*]] = alloca i32, align 128 ; IS__CGSCC____-NEXT: [[PTR2:%.*]] = alloca i32, align 128
; IS__CGSCC____-NEXT: [[PTR3:%.*]] = alloca i32, align 128 ; IS__CGSCC____-NEXT: [[PTR3:%.*]] = alloca i32, align 128
; IS__CGSCC____-NEXT: [[PTR4:%.*]] = alloca i32, align 128 ; IS__CGSCC____-NEXT: [[PTR4:%.*]] = alloca i32, align 128
; IS__CGSCC____-NEXT: call void @call_via_pointer_with_dead_args(i32* [[A]], i32* noundef nonnull align 128 dereferenceable(4) [[PTR1]], void (i32*, i32*, i32*, i64, i32**)* nocapture nofree noundef nonnull @called_via_pointer) ; IS__CGSCC____-NEXT: call void @call_via_pointer_with_dead_args(i32* [[A]], i32* noundef nonnull align 128 dereferenceable(4) [[PTR1]], void (i32*, i32*, i32*, i64, i32**)* nocapture nofree noundef nonnull @called_via_pointer)
; IS__CGSCC____-NEXT: call void @call_via_pointer_with_dead_args(i32* [[A]], i32* noundef nonnull align 128 dereferenceable(4) [[PTR2]], void (i32*, i32*, i32*, i64, i32**)* nocapture nofree noundef nonnull @called_via_pointer_internal_1) ; IS__CGSCC____-NEXT: call void @call_via_pointer_with_dead_args(i32* [[A]], i32* noundef nonnull align 128 dereferenceable(4) [[PTR2]], void (i32*, i32*, i32*, i64, i32**)* nocapture nofree noundef nonnull @called_via_pointer_internal_1)
; IS__CGSCC____-NEXT: call void @call_via_pointer_with_dead_args_internal_a(i32* [[B]], i32* noundef nonnull align 128 dereferenceable(4) [[PTR3]], void (i32*, i32*, i32*, i64, i32**)* nocapture nofree noundef nonnull @called_via_pointer) ; IS__CGSCC____-NEXT: call void @call_via_pointer_with_dead_args_internal_a(i32* [[B]], i32* noundef nonnull align 128 dereferenceable(4) [[PTR3]], void (i32*, i32*, i32*, i64, i32**)* nocapture nofree noundef nonnull @called_via_pointer)
; IS__CGSCC____-NEXT: call void @call_via_pointer_with_dead_args_internal_b(i32* [[B]], i32* noundef nonnull align 128 dereferenceable(4) [[PTR4]], void (i32*, i32*, i32*, i64, i32**)* nocapture nofree noundef nonnull @called_via_pointer_internal_2) ; IS__CGSCC____-NEXT: call void @call_via_pointer_with_dead_args_internal_b(i32* [[B]], i32* noundef nonnull align 128 dereferenceable(4) [[PTR4]], void (i32*, i32*, i32*, i64, i32**)* nocapture nofree noundef nonnull @called_via_pointer_internal_2)
▲ Show 20 Lines • Show All 67 Lines • ▼ Show 20 Lines
; IS__CGSCC_OPM-NEXT: [[PC_ADDR_0:%.*]] = getelementptr i32, i32* [[PC]], i32 [[INDVAR]] ; IS__CGSCC_OPM-NEXT: [[PC_ADDR_0:%.*]] = getelementptr i32, i32* [[PC]], i32 [[INDVAR]]
; IS__CGSCC_OPM-NEXT: [[TMP1_PN:%.*]] = load i32, i32* [[PC_ADDR_0]] ; IS__CGSCC_OPM-NEXT: [[TMP1_PN:%.*]] = load i32, i32* [[PC_ADDR_0]]
; IS__CGSCC_OPM-NEXT: [[INDIRECT_GOTO_DEST_IN:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* @dead_with_blockaddress_users.l, i32 0, i32 [[TMP1_PN]] ; IS__CGSCC_OPM-NEXT: [[INDIRECT_GOTO_DEST_IN:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* @dead_with_blockaddress_users.l, i32 0, i32 [[TMP1_PN]]
; IS__CGSCC_OPM-NEXT: [[INDIRECT_GOTO_DEST:%.*]] = load i8*, i8** [[INDIRECT_GOTO_DEST_IN]] ; IS__CGSCC_OPM-NEXT: [[INDIRECT_GOTO_DEST:%.*]] = load i8*, i8** [[INDIRECT_GOTO_DEST_IN]]
; IS__CGSCC_OPM-NEXT: indirectbr i8* [[INDIRECT_GOTO_DEST]], [label [[LAB0]], label %end] ; IS__CGSCC_OPM-NEXT: indirectbr i8* [[INDIRECT_GOTO_DEST]], [label [[LAB0]], label %end]
; ;
; IS__CGSCC____: Function Attrs: nounwind readonly ; IS__CGSCC____: Function Attrs: nounwind readonly
; IS__CGSCC____-LABEL: define {{[^@]+}}@dead_with_blockaddress_users ; IS__CGSCC____-LABEL: define {{[^@]+}}@dead_with_blockaddress_users
; IS__CGSCC____-SAME: (i32* nocapture [[PC:%.*]]) #[[ATTR12:[0-9]+]] { ; IS__CGSCC____-SAME: (i32* nocapture [[PC:%.*]]) #[[ATTR14:[0-9]+]] {
; IS__CGSCC____-NEXT: entry: ; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: br label [[INDIRECTGOTO:%.*]] ; IS__CGSCC____-NEXT: br label [[INDIRECTGOTO:%.*]]
; IS__CGSCC____: lab0: ; IS__CGSCC____: lab0:
; IS__CGSCC____-NEXT: [[INDVAR_NEXT:%.*]] = add i32 [[INDVAR:%.*]], 1 ; IS__CGSCC____-NEXT: [[INDVAR_NEXT:%.*]] = add i32 [[INDVAR:%.*]], 1
; IS__CGSCC____-NEXT: br label [[INDIRECTGOTO]] ; IS__CGSCC____-NEXT: br label [[INDIRECTGOTO]]
; IS__CGSCC____: end: ; IS__CGSCC____: end:
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; IS__CGSCC____: indirectgoto: ; IS__CGSCC____: indirectgoto:
▲ Show 20 Lines • Show All 117 Lines • ▼ Show 20 Lines
for.end.1: for.end.1:
ret i32 0 ret i32 0
} }
declare noalias i8* @malloc(i64) declare noalias i8* @malloc(i64)
define i32 @h(i32 %i) { define i32 @h(i32 %i) {
; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind readnone willreturn ; NOT_CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@h ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@h
; NOT_CGSCC_NPM-SAME: (i32 [[I:%.*]]) #[[ATTR9]] { ; NOT_CGSCC_NPM-SAME: (i32 [[I:%.*]]) #[[ATTR9]] {
; NOT_CGSCC_NPM-NEXT: ret i32 0 ; NOT_CGSCC_NPM-NEXT: ret i32 0
; ;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@h ; IS__CGSCC____-LABEL: define {{[^@]+}}@h
; IS__CGSCC____-SAME: (i32 [[I:%.*]]) #[[ATTR6]] { ; IS__CGSCC____-SAME: (i32 [[I:%.*]]) #[[ATTR6]] {
; IS__CGSCC____-NEXT: ret i32 0 ; IS__CGSCC____-NEXT: ret i32 0
; ;
ret i32 0 ret i32 0
} }
; Verify we do not choke on the GEP in the unreachable block. ; Verify we do not choke on the GEP in the unreachable block.
@p = global i8 0 @p = global i8 0
define void @bad_gep() { define void @bad_gep() {
; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind readnone willreturn ; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind readnone willreturn
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@bad_gep ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@bad_gep
; NOT_CGSCC_NPM-SAME: () #[[ATTR9]] { ; NOT_CGSCC_NPM-SAME: () #[[ATTR11:[0-9]+]] {
; NOT_CGSCC_NPM-NEXT: entry: ; NOT_CGSCC_NPM-NEXT: entry:
; NOT_CGSCC_NPM-NEXT: [[N:%.*]] = alloca i8, align 1 ; NOT_CGSCC_NPM-NEXT: [[N:%.*]] = alloca i8, align 1
; NOT_CGSCC_NPM-NEXT: [[M:%.*]] = alloca i8, align 1 ; NOT_CGSCC_NPM-NEXT: [[M:%.*]] = alloca i8, align 1
; NOT_CGSCC_NPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 1, i8* noalias nocapture nofree noundef nonnull dereferenceable(1) [[N]]) #[[ATTR13:[0-9]+]] ; NOT_CGSCC_NPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 1, i8* noalias nocapture nofree noundef nonnull dereferenceable(1) [[N]]) #[[ATTR14:[0-9]+]]
; NOT_CGSCC_NPM-NEXT: br label [[EXIT:%.*]] ; NOT_CGSCC_NPM-NEXT: br label [[EXIT:%.*]]
; NOT_CGSCC_NPM: while.body: ; NOT_CGSCC_NPM: while.body:
; NOT_CGSCC_NPM-NEXT: unreachable ; NOT_CGSCC_NPM-NEXT: unreachable
; NOT_CGSCC_NPM: if.then: ; NOT_CGSCC_NPM: if.then:
; NOT_CGSCC_NPM-NEXT: unreachable ; NOT_CGSCC_NPM-NEXT: unreachable
; NOT_CGSCC_NPM: if.end: ; NOT_CGSCC_NPM: if.end:
; NOT_CGSCC_NPM-NEXT: unreachable ; NOT_CGSCC_NPM-NEXT: unreachable
; NOT_CGSCC_NPM: exit: ; NOT_CGSCC_NPM: exit:
; NOT_CGSCC_NPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 1, i8* noalias nocapture nofree noundef nonnull dereferenceable(1) [[N]]) #[[ATTR13]] ; NOT_CGSCC_NPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 1, i8* noalias nocapture nofree noundef nonnull dereferenceable(1) [[N]]) #[[ATTR14]]
; NOT_CGSCC_NPM-NEXT: ret void ; NOT_CGSCC_NPM-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@bad_gep ; IS__CGSCC____-LABEL: define {{[^@]+}}@bad_gep
; IS__CGSCC____-SAME: () #[[ATTR13:[0-9]+]] { ; IS__CGSCC____-SAME: () #[[ATTR15:[0-9]+]] {
; IS__CGSCC____-NEXT: entry: ; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: [[N:%.*]] = alloca i8, align 1 ; IS__CGSCC____-NEXT: [[N:%.*]] = alloca i8, align 1
; IS__CGSCC____-NEXT: [[M:%.*]] = alloca i8, align 1 ; IS__CGSCC____-NEXT: [[M:%.*]] = alloca i8, align 1
; IS__CGSCC____-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 1, i8* noalias nocapture nofree noundef nonnull dereferenceable(1) [[N]]) #[[ATTR16:[0-9]+]] ; IS__CGSCC____-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 1, i8* noalias nocapture nofree noundef nonnull dereferenceable(1) [[N]]) #[[ATTR18:[0-9]+]]
; IS__CGSCC____-NEXT: br label [[EXIT:%.*]] ; IS__CGSCC____-NEXT: br label [[EXIT:%.*]]
; IS__CGSCC____: while.body: ; IS__CGSCC____: while.body:
; IS__CGSCC____-NEXT: unreachable ; IS__CGSCC____-NEXT: unreachable
; IS__CGSCC____: if.then: ; IS__CGSCC____: if.then:
; IS__CGSCC____-NEXT: unreachable ; IS__CGSCC____-NEXT: unreachable
; IS__CGSCC____: if.end: ; IS__CGSCC____: if.end:
; IS__CGSCC____-NEXT: unreachable ; IS__CGSCC____-NEXT: unreachable
; IS__CGSCC____: exit: ; IS__CGSCC____: exit:
; IS__CGSCC____-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 1, i8* noalias nocapture nofree noundef nonnull dereferenceable(1) [[N]]) #[[ATTR16]] ; IS__CGSCC____-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 1, i8* noalias nocapture nofree noundef nonnull dereferenceable(1) [[N]]) #[[ATTR18]]
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
entry: entry:
%n = alloca i8 %n = alloca i8
%m = alloca i8 %m = alloca i8
call void @llvm.lifetime.start.p0i8(i64 1, i8* %n) call void @llvm.lifetime.start.p0i8(i64 1, i8* %n)
br label %exit br label %exit
Show All 12 Linesif.end:
br i1 %cmp, label %exit, label %while.body br i1 %cmp, label %exit, label %while.body
exit: exit:
call void @llvm.lifetime.end.p0i8(i64 1, i8* %n) call void @llvm.lifetime.end.p0i8(i64 1, i8* %n)
ret void ret void
} }
define i8 @edge_vs_block_liveness() { define i8 @edge_vs_block_liveness() {
; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind readnone willreturn ; NOT_CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@edge_vs_block_liveness ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@edge_vs_block_liveness
; NOT_CGSCC_NPM-SAME: () #[[ATTR9]] { ; NOT_CGSCC_NPM-SAME: () #[[ATTR9]] {
; NOT_CGSCC_NPM-NEXT: entry: ; NOT_CGSCC_NPM-NEXT: entry:
; NOT_CGSCC_NPM-NEXT: br i1 true, label [[B1:%.*]], label [[B2:%.*]] ; NOT_CGSCC_NPM-NEXT: br i1 true, label [[B1:%.*]], label [[B2:%.*]]
; NOT_CGSCC_NPM: b1: ; NOT_CGSCC_NPM: b1:
; NOT_CGSCC_NPM-NEXT: br label [[B2]] ; NOT_CGSCC_NPM-NEXT: br label [[B2]]
; NOT_CGSCC_NPM: b2: ; NOT_CGSCC_NPM: b2:
; NOT_CGSCC_NPM-NEXT: [[PHI:%.*]] = phi i8 [ 0, [[ENTRY:%.*]] ], [ 1, [[B1]] ] ; NOT_CGSCC_NPM-NEXT: [[PHI:%.*]] = phi i8 [ 0, [[ENTRY:%.*]] ], [ 1, [[B1]] ]
Show All 27 Lines
;. ;.
; NOT_CGSCC_NPM: attributes #[[ATTR0]] = { nofree noreturn nosync nounwind } ; NOT_CGSCC_NPM: attributes #[[ATTR0]] = { nofree noreturn nosync nounwind }
; NOT_CGSCC_NPM: attributes #[[ATTR1:[0-9]+]] = { readnone } ; NOT_CGSCC_NPM: attributes #[[ATTR1:[0-9]+]] = { readnone }
; NOT_CGSCC_NPM: attributes #[[ATTR2]] = { nounwind } ; NOT_CGSCC_NPM: attributes #[[ATTR2]] = { nounwind }
; NOT_CGSCC_NPM: attributes #[[ATTR3]] = { noreturn nounwind } ; NOT_CGSCC_NPM: attributes #[[ATTR3]] = { noreturn nounwind }
; NOT_CGSCC_NPM: attributes #[[ATTR4]] = { noreturn } ; NOT_CGSCC_NPM: attributes #[[ATTR4]] = { noreturn }
; NOT_CGSCC_NPM: attributes #[[ATTR5]] = { nosync readnone } ; NOT_CGSCC_NPM: attributes #[[ATTR5]] = { nosync readnone }
; NOT_CGSCC_NPM: attributes #[[ATTR6]] = { argmemonly nofree norecurse nounwind uwtable willreturn } ; NOT_CGSCC_NPM: attributes #[[ATTR6]] = { argmemonly nofree norecurse nounwind uwtable willreturn }
; NOT_CGSCC_NPM: attributes #[[ATTR7:[0-9]+]] = { argmemonly nofree nosync nounwind willreturn writeonly } ; NOT_CGSCC_NPM: attributes #[[ATTR7:[0-9]+]] = { argmemonly nofree norecurse nosync nounwind willreturn writeonly }
; NOT_CGSCC_NPM: attributes #[[ATTR8]] = { nofree noreturn nosync nounwind readnone } ; NOT_CGSCC_NPM: attributes #[[ATTR8]] = { nofree norecurse noreturn nosync nounwind readnone }
; NOT_CGSCC_NPM: attributes #[[ATTR9]] = { nofree nosync nounwind readnone willreturn } ; NOT_CGSCC_NPM: attributes #[[ATTR9]] = { nofree norecurse nosync nounwind readnone willreturn }
; NOT_CGSCC_NPM: attributes #[[ATTR10]] = { nofree nosync nounwind willreturn } ; NOT_CGSCC_NPM: attributes #[[ATTR10]] = { nofree nosync nounwind willreturn }
; NOT_CGSCC_NPM: attributes #[[ATTR11:[0-9]+]] = { argmemonly nofree nosync nounwind willreturn } ; NOT_CGSCC_NPM: attributes #[[ATTR11]] = { nofree nosync nounwind readnone willreturn }
; NOT_CGSCC_NPM: attributes #[[ATTR12]] = { nounwind willreturn } ; NOT_CGSCC_NPM: attributes #[[ATTR12:[0-9]+]] = { argmemonly nofree nosync nounwind willreturn }
; NOT_CGSCC_NPM: attributes #[[ATTR13]] = { willreturn } ; NOT_CGSCC_NPM: attributes #[[ATTR13]] = { nounwind willreturn }
; NOT_CGSCC_NPM: attributes #[[ATTR14]] = { willreturn }
;. ;.
; IS__CGSCC____: attributes #[[ATTR0]] = { nofree noreturn nosync nounwind } ; IS__CGSCC____: attributes #[[ATTR0]] = { nofree noreturn nosync nounwind }
; IS__CGSCC____: attributes #[[ATTR1:[0-9]+]] = { readnone } ; IS__CGSCC____: attributes #[[ATTR1:[0-9]+]] = { readnone }
; IS__CGSCC____: attributes #[[ATTR2]] = { nounwind } ; IS__CGSCC____: attributes #[[ATTR2]] = { nounwind }
; IS__CGSCC____: attributes #[[ATTR3]] = { noreturn nounwind } ; IS__CGSCC____: attributes #[[ATTR3]] = { noreturn nounwind }
; IS__CGSCC____: attributes #[[ATTR4]] = { noreturn } ; IS__CGSCC____: attributes #[[ATTR4]] = { noreturn }
; IS__CGSCC____: attributes #[[ATTR5]] = { nosync readnone } ; IS__CGSCC____: attributes #[[ATTR5]] = { nosync readnone }
; IS__CGSCC____: attributes #[[ATTR6]] = { nofree norecurse nosync nounwind readnone willreturn } ; IS__CGSCC____: attributes #[[ATTR6]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__CGSCC____: attributes #[[ATTR7]] = { argmemonly nofree norecurse nounwind uwtable willreturn } ; IS__CGSCC____: attributes #[[ATTR7]] = { argmemonly nofree norecurse nounwind uwtable willreturn }
; IS__CGSCC____: attributes #[[ATTR8]] = { nofree norecurse nosync nounwind readnone uwtable willreturn } ; IS__CGSCC____: attributes #[[ATTR8]] = { nofree norecurse nosync nounwind readnone uwtable willreturn }
; IS__CGSCC____: attributes #[[ATTR9]] = { argmemonly nofree norecurse nosync nounwind willreturn writeonly } ; IS__CGSCC____: attributes #[[ATTR9]] = { norecurse noreturn }
; IS__CGSCC____: attributes #[[ATTR10]] = { nofree norecurse noreturn nosync nounwind readnone } ; IS__CGSCC____: attributes #[[ATTR10]] = { argmemonly nofree norecurse nosync nounwind willreturn writeonly }
; IS__CGSCC____: attributes #[[ATTR11]] = { nofree nosync nounwind willreturn } ; IS__CGSCC____: attributes #[[ATTR11]] = { nofree norecurse noreturn nosync nounwind readnone }
; IS__CGSCC____: attributes #[[ATTR12]] = { nounwind readonly } ; IS__CGSCC____: attributes #[[ATTR12]] = { nofree nosync nounwind willreturn }
; IS__CGSCC____: attributes #[[ATTR13]] = { nofree nosync nounwind readnone willreturn } ; IS__CGSCC____: attributes #[[ATTR13]] = { norecurse }
; IS__CGSCC____: attributes #[[ATTR14:[0-9]+]] = { argmemonly nofree nosync nounwind willreturn } ; IS__CGSCC____: attributes #[[ATTR14]] = { nounwind readonly }
; IS__CGSCC____: attributes #[[ATTR15]] = { nounwind willreturn } ; IS__CGSCC____: attributes #[[ATTR15]] = { nofree nosync nounwind readnone willreturn }
; IS__CGSCC____: attributes #[[ATTR16]] = { willreturn } ; IS__CGSCC____: attributes #[[ATTR16:[0-9]+]] = { argmemonly nofree nosync nounwind willreturn }
; IS__CGSCC____: attributes #[[ATTR17]] = { nounwind willreturn }
; IS__CGSCC____: attributes #[[ATTR18]] = { willreturn }
;. ;.

llvm/test/Transforms/Attributor/liveness_chains.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals
; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM ; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM
; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM ; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM
; Make sure we need a single iteration to determine the chains are dead/alive. ; Make sure we need a single iteration to determine the chains are dead/alive.
declare i32 @source() nounwind readonly declare i32 @source() nounwind readonly
define i32 @chain_dead(i32 %arg) { define i32 @chain_dead(i32 %arg) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@chain_dead ; CHECK-LABEL: define {{[^@]+}}@chain_dead
; IS__TUNIT____-SAME: (i32 [[ARG:%.*]]) #[[ATTR1:[0-9]+]] { ; CHECK-SAME: (i32 [[ARG:%.*]]) #[[ATTR1:[0-9]+]] {
; IS__TUNIT____-NEXT: ret i32 0 ; CHECK-NEXT: ret i32 0
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@chain_dead
; IS__CGSCC____-SAME: (i32 [[ARG:%.*]]) #[[ATTR1:[0-9]+]] {
; IS__CGSCC____-NEXT: ret i32 0
; ;
%init = call i32 @source() %init = call i32 @source()
%v0 = add i32 %arg, %init %v0 = add i32 %arg, %init
%v1 = add i32 %init, %v0 %v1 = add i32 %init, %v0
%v2 = add i32 %v0, %v1 %v2 = add i32 %v0, %v1
%v3 = add i32 %v1, %v2 %v3 = add i32 %v1, %v2
%v4 = add i32 %v2, %v3 %v4 = add i32 %v2, %v3
%v5 = add i32 %v3, %v4 %v5 = add i32 %v3, %v4
Show All 30 Lines;
%v5 = add i32 %v3, %v4 %v5 = add i32 %v3, %v4
%v6 = add i32 %v4, %v5 %v6 = add i32 %v4, %v5
%v7 = add i32 %v5, %v6 %v7 = add i32 %v5, %v6
%v8 = add i32 %v6, %v7 %v8 = add i32 %v6, %v7
%v9 = add i32 %v7, %v8 %v9 = add i32 %v7, %v8
ret i32 %v9 ret i32 %v9
} }
;. ;.
; IS__TUNIT____: attributes #[[ATTR0]] = { nounwind readonly } ; CHECK: attributes #[[ATTR0]] = { nounwind readonly }
; IS__TUNIT____: attributes #[[ATTR1]] = { nofree nosync nounwind readnone willreturn } ; CHECK: attributes #[[ATTR1]] = { nofree norecurse nosync nounwind readnone willreturn }
;.
; IS__CGSCC____: attributes #[[ATTR0]] = { nounwind readonly }
; IS__CGSCC____: attributes #[[ATTR1]] = { nofree norecurse nosync nounwind readnone willreturn }
;. ;.

llvm/test/Transforms/Attributor/lvi-after-jumpthreading.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals
; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=17 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM ; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=17 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=17 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=17 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM
; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM ; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM
define i8 @test1(i32 %a, i32 %length) { define i8 @test1(i32 %a, i32 %length) {
; IS__TUNIT_OPM: Function Attrs: nofree nosync nounwind readnone ; IS________OPM: Function Attrs: nofree norecurse nosync nounwind readnone
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@test1 ; IS________OPM-LABEL: define {{[^@]+}}@test1
; IS__TUNIT_OPM-SAME: (i32 [[A:%.*]], i32 [[LENGTH:%.*]]) #[[ATTR0:[0-9]+]] { ; IS________OPM-SAME: (i32 [[A:%.*]], i32 [[LENGTH:%.*]]) #[[ATTR0:[0-9]+]] {
; IS__TUNIT_OPM-NEXT: entry: ; IS________OPM-NEXT: entry:
; IS__TUNIT_OPM-NEXT: br label [[LOOP:%.*]] ; IS________OPM-NEXT: br label [[LOOP:%.*]]
; IS__TUNIT_OPM: loop: ; IS________OPM: loop:
; IS__TUNIT_OPM-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[BACKEDGE:%.*]] ] ; IS________OPM-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[BACKEDGE:%.*]] ]
; IS__TUNIT_OPM-NEXT: [[CND:%.*]] = icmp sge i32 [[IV]], 0 ; IS________OPM-NEXT: [[CND:%.*]] = icmp sge i32 [[IV]], 0
; IS__TUNIT_OPM-NEXT: br i1 [[CND]], label [[BACKEDGE]], label [[EXIT:%.*]] ; IS________OPM-NEXT: br i1 [[CND]], label [[BACKEDGE]], label [[EXIT:%.*]]
; IS__TUNIT_OPM: backedge: ; IS________OPM: backedge:
; IS__TUNIT_OPM-NEXT: [[IV_NEXT]] = add nsw i32 [[IV]], 1 ; IS________OPM-NEXT: [[IV_NEXT]] = add nsw i32 [[IV]], 1
; IS__TUNIT_OPM-NEXT: [[CONT:%.*]] = icmp slt i32 [[IV_NEXT]], 400 ; IS________OPM-NEXT: [[CONT:%.*]] = icmp slt i32 [[IV_NEXT]], 400
; IS__TUNIT_OPM-NEXT: br i1 [[CONT]], label [[LOOP]], label [[EXIT]] ; IS________OPM-NEXT: br i1 [[CONT]], label [[LOOP]], label [[EXIT]]
; IS__TUNIT_OPM: exit: ; IS________OPM: exit:
; IS__TUNIT_OPM-NEXT: ret i8 0 ; IS________OPM-NEXT: ret i8 0
;
; IS__TUNIT_NPM: Function Attrs: nofree nosync nounwind readnone willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@test1
; IS__TUNIT_NPM-SAME: (i32 [[A:%.*]], i32 [[LENGTH:%.*]]) #[[ATTR0:[0-9]+]] {
; IS__TUNIT_NPM-NEXT: entry:
; IS__TUNIT_NPM-NEXT: br label [[LOOP:%.*]]
; IS__TUNIT_NPM: loop:
; IS__TUNIT_NPM-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[BACKEDGE:%.*]] ]
; IS__TUNIT_NPM-NEXT: br label [[BACKEDGE]]
; IS__TUNIT_NPM: backedge:
; IS__TUNIT_NPM-NEXT: [[IV_NEXT]] = add nsw i32 [[IV]], 1
; IS__TUNIT_NPM-NEXT: [[CONT:%.*]] = icmp slt i32 [[IV_NEXT]], 400
; IS__TUNIT_NPM-NEXT: br i1 [[CONT]], label [[LOOP]], label [[EXIT:%.*]]
; IS__TUNIT_NPM: exit:
; IS__TUNIT_NPM-NEXT: ret i8 0
;
; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readnone
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@test1
; IS__CGSCC_OPM-SAME: (i32 [[A:%.*]], i32 [[LENGTH:%.*]]) #[[ATTR0:[0-9]+]] {
; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: br label [[LOOP:%.*]]
; IS__CGSCC_OPM: loop:
; IS__CGSCC_OPM-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[BACKEDGE:%.*]] ]
; IS__CGSCC_OPM-NEXT: [[CND:%.*]] = icmp sge i32 [[IV]], 0
; IS__CGSCC_OPM-NEXT: br i1 [[CND]], label [[BACKEDGE]], label [[EXIT:%.*]]
; IS__CGSCC_OPM: backedge:
; IS__CGSCC_OPM-NEXT: [[IV_NEXT]] = add nsw i32 [[IV]], 1
; IS__CGSCC_OPM-NEXT: [[CONT:%.*]] = icmp slt i32 [[IV_NEXT]], 400
; IS__CGSCC_OPM-NEXT: br i1 [[CONT]], label [[LOOP]], label [[EXIT]]
; IS__CGSCC_OPM: exit:
; IS__CGSCC_OPM-NEXT: ret i8 0
; ;
; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS________NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@test1 ; IS________NPM-LABEL: define {{[^@]+}}@test1
; IS__CGSCC_NPM-SAME: (i32 [[A:%.*]], i32 [[LENGTH:%.*]]) #[[ATTR0:[0-9]+]] { ; IS________NPM-SAME: (i32 [[A:%.*]], i32 [[LENGTH:%.*]]) #[[ATTR0:[0-9]+]] {
; IS__CGSCC_NPM-NEXT: entry: ; IS________NPM-NEXT: entry:
; IS__CGSCC_NPM-NEXT: br label [[LOOP:%.*]] ; IS________NPM-NEXT: br label [[LOOP:%.*]]
; IS__CGSCC_NPM: loop: ; IS________NPM: loop:
; IS__CGSCC_NPM-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[BACKEDGE:%.*]] ] ; IS________NPM-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[BACKEDGE:%.*]] ]
; IS__CGSCC_NPM-NEXT: br label [[BACKEDGE]] ; IS________NPM-NEXT: br label [[BACKEDGE]]
; IS__CGSCC_NPM: backedge: ; IS________NPM: backedge:
; IS__CGSCC_NPM-NEXT: [[IV_NEXT]] = add nsw i32 [[IV]], 1 ; IS________NPM-NEXT: [[IV_NEXT]] = add nsw i32 [[IV]], 1
; IS__CGSCC_NPM-NEXT: [[CONT:%.*]] = icmp slt i32 [[IV_NEXT]], 400 ; IS________NPM-NEXT: [[CONT:%.*]] = icmp slt i32 [[IV_NEXT]], 400
; IS__CGSCC_NPM-NEXT: br i1 [[CONT]], label [[LOOP]], label [[EXIT:%.*]] ; IS________NPM-NEXT: br i1 [[CONT]], label [[LOOP]], label [[EXIT:%.*]]
; IS__CGSCC_NPM: exit: ; IS________NPM: exit:
; IS__CGSCC_NPM-NEXT: ret i8 0 ; IS________NPM-NEXT: ret i8 0
; ;
entry: entry:
br label %loop br label %loop
loop: loop:
%iv = phi i32 [0, %entry], [%iv.next, %backedge] %iv = phi i32 [0, %entry], [%iv.next, %backedge]
%cnd = icmp sge i32 %iv, 0 %cnd = icmp sge i32 %iv, 0
br i1 %cnd, label %backedge, label %exit br i1 %cnd, label %backedge, label %exit
backedge: backedge:
%iv.next = add nsw i32 %iv, 1 %iv.next = add nsw i32 %iv, 1
%cont = icmp slt i32 %iv.next, 400 %cont = icmp slt i32 %iv.next, 400
br i1 %cont, label %loop, label %exit br i1 %cont, label %loop, label %exit
exit: exit:
ret i8 0 ret i8 0
} }
define i8 @test2(i32 %n) { define i8 @test2(i32 %n) {
; IS__TUNIT_OPM: Function Attrs: nofree nosync nounwind readnone ; IS________OPM: Function Attrs: nofree norecurse nosync nounwind readnone
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@test2 ; IS________OPM-LABEL: define {{[^@]+}}@test2
; IS__TUNIT_OPM-SAME: (i32 [[N:%.*]]) #[[ATTR0]] { ; IS________OPM-SAME: (i32 [[N:%.*]]) #[[ATTR0]] {
; IS__TUNIT_OPM-NEXT: entry: ; IS________OPM-NEXT: entry:
; IS__TUNIT_OPM-NEXT: br label [[LOOP:%.*]] ; IS________OPM-NEXT: br label [[LOOP:%.*]]
; IS__TUNIT_OPM: loop: ; IS________OPM: loop:
; IS__TUNIT_OPM-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[BACKEDGE:%.*]] ] ; IS________OPM-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[BACKEDGE:%.*]] ]
; IS__TUNIT_OPM-NEXT: [[IV2:%.*]] = phi i32 [ [[N]], [[ENTRY]] ], [ [[IV2_NEXT:%.*]], [[BACKEDGE]] ] ; IS________OPM-NEXT: [[IV2:%.*]] = phi i32 [ [[N]], [[ENTRY]] ], [ [[IV2_NEXT:%.*]], [[BACKEDGE]] ]
; IS__TUNIT_OPM-NEXT: [[CND1:%.*]] = icmp sge i32 [[IV]], 0 ; IS________OPM-NEXT: [[CND1:%.*]] = icmp sge i32 [[IV]], 0
; IS__TUNIT_OPM-NEXT: [[CND2:%.*]] = icmp sgt i32 [[IV2]], 0 ; IS________OPM-NEXT: [[CND2:%.*]] = icmp sgt i32 [[IV2]], 0
; IS__TUNIT_OPM-NEXT: [[CND:%.*]] = and i1 [[CND1]], [[CND2]] ; IS________OPM-NEXT: [[CND:%.*]] = and i1 [[CND1]], [[CND2]]
; IS__TUNIT_OPM-NEXT: br i1 [[CND]], label [[BACKEDGE]], label [[EXIT:%.*]] ; IS________OPM-NEXT: br i1 [[CND]], label [[BACKEDGE]], label [[EXIT:%.*]]
; IS__TUNIT_OPM: backedge: ; IS________OPM: backedge:
; IS__TUNIT_OPM-NEXT: [[IV_NEXT]] = add nsw i32 [[IV]], 1 ; IS________OPM-NEXT: [[IV_NEXT]] = add nsw i32 [[IV]], 1
; IS__TUNIT_OPM-NEXT: [[IV2_NEXT]] = sub nsw i32 [[IV2]], 1 ; IS________OPM-NEXT: [[IV2_NEXT]] = sub nsw i32 [[IV2]], 1
; IS__TUNIT_OPM-NEXT: [[CONT1:%.*]] = icmp slt i32 [[IV_NEXT]], 400 ; IS________OPM-NEXT: [[CONT1:%.*]] = icmp slt i32 [[IV_NEXT]], 400
; IS__TUNIT_OPM-NEXT: [[CONT2:%.*]] = icmp sgt i32 [[IV2_NEXT]], 0 ; IS________OPM-NEXT: [[CONT2:%.*]] = icmp sgt i32 [[IV2_NEXT]], 0
; IS__TUNIT_OPM-NEXT: [[CONT:%.*]] = and i1 [[CONT1]], [[CONT2]] ; IS________OPM-NEXT: [[CONT:%.*]] = and i1 [[CONT1]], [[CONT2]]
; IS__TUNIT_OPM-NEXT: br i1 [[CONT]], label [[LOOP]], label [[EXIT]] ; IS________OPM-NEXT: br i1 [[CONT]], label [[LOOP]], label [[EXIT]]
; IS__TUNIT_OPM: exit: ; IS________OPM: exit:
; IS__TUNIT_OPM-NEXT: ret i8 0 ; IS________OPM-NEXT: ret i8 0
;
; IS__TUNIT_NPM: Function Attrs: nofree nosync nounwind readnone willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@test2
; IS__TUNIT_NPM-SAME: (i32 [[N:%.*]]) #[[ATTR0]] {
; IS__TUNIT_NPM-NEXT: entry:
; IS__TUNIT_NPM-NEXT: br label [[LOOP:%.*]]
; IS__TUNIT_NPM: loop:
; IS__TUNIT_NPM-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[BACKEDGE:%.*]] ]
; IS__TUNIT_NPM-NEXT: [[IV2:%.*]] = phi i32 [ [[N]], [[ENTRY]] ], [ [[IV2_NEXT:%.*]], [[BACKEDGE]] ]
; IS__TUNIT_NPM-NEXT: [[CND2:%.*]] = icmp sgt i32 [[IV2]], 0
; IS__TUNIT_NPM-NEXT: br i1 [[CND2]], label [[BACKEDGE]], label [[EXIT:%.*]]
; IS__TUNIT_NPM: backedge:
; IS__TUNIT_NPM-NEXT: [[IV_NEXT]] = add nsw i32 [[IV]], 1
; IS__TUNIT_NPM-NEXT: [[IV2_NEXT]] = sub nsw i32 [[IV2]], 1
; IS__TUNIT_NPM-NEXT: [[CONT1:%.*]] = icmp slt i32 [[IV_NEXT]], 400
; IS__TUNIT_NPM-NEXT: [[CONT2:%.*]] = icmp sgt i32 [[IV2_NEXT]], 0
; IS__TUNIT_NPM-NEXT: [[CONT:%.*]] = and i1 [[CONT1]], [[CONT2]]
; IS__TUNIT_NPM-NEXT: br i1 [[CONT]], label [[LOOP]], label [[EXIT]]
; IS__TUNIT_NPM: exit:
; IS__TUNIT_NPM-NEXT: ret i8 0
;
; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readnone
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@test2
; IS__CGSCC_OPM-SAME: (i32 [[N:%.*]]) #[[ATTR0]] {
; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: br label [[LOOP:%.*]]
; IS__CGSCC_OPM: loop:
; IS__CGSCC_OPM-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[BACKEDGE:%.*]] ]
; IS__CGSCC_OPM-NEXT: [[IV2:%.*]] = phi i32 [ [[N]], [[ENTRY]] ], [ [[IV2_NEXT:%.*]], [[BACKEDGE]] ]
; IS__CGSCC_OPM-NEXT: [[CND1:%.*]] = icmp sge i32 [[IV]], 0
; IS__CGSCC_OPM-NEXT: [[CND2:%.*]] = icmp sgt i32 [[IV2]], 0
; IS__CGSCC_OPM-NEXT: [[CND:%.*]] = and i1 [[CND1]], [[CND2]]
; IS__CGSCC_OPM-NEXT: br i1 [[CND]], label [[BACKEDGE]], label [[EXIT:%.*]]
; IS__CGSCC_OPM: backedge:
; IS__CGSCC_OPM-NEXT: [[IV_NEXT]] = add nsw i32 [[IV]], 1
; IS__CGSCC_OPM-NEXT: [[IV2_NEXT]] = sub nsw i32 [[IV2]], 1
; IS__CGSCC_OPM-NEXT: [[CONT1:%.*]] = icmp slt i32 [[IV_NEXT]], 400
; IS__CGSCC_OPM-NEXT: [[CONT2:%.*]] = icmp sgt i32 [[IV2_NEXT]], 0
; IS__CGSCC_OPM-NEXT: [[CONT:%.*]] = and i1 [[CONT1]], [[CONT2]]
; IS__CGSCC_OPM-NEXT: br i1 [[CONT]], label [[LOOP]], label [[EXIT]]
; IS__CGSCC_OPM: exit:
; IS__CGSCC_OPM-NEXT: ret i8 0
; ;
; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS________NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@test2 ; IS________NPM-LABEL: define {{[^@]+}}@test2
; IS__CGSCC_NPM-SAME: (i32 [[N:%.*]]) #[[ATTR0]] { ; IS________NPM-SAME: (i32 [[N:%.*]]) #[[ATTR0]] {
; IS__CGSCC_NPM-NEXT: entry: ; IS________NPM-NEXT: entry:
; IS__CGSCC_NPM-NEXT: br label [[LOOP:%.*]] ; IS________NPM-NEXT: br label [[LOOP:%.*]]
; IS__CGSCC_NPM: loop: ; IS________NPM: loop:
; IS__CGSCC_NPM-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[BACKEDGE:%.*]] ] ; IS________NPM-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[BACKEDGE:%.*]] ]
; IS__CGSCC_NPM-NEXT: [[IV2:%.*]] = phi i32 [ [[N]], [[ENTRY]] ], [ [[IV2_NEXT:%.*]], [[BACKEDGE]] ] ; IS________NPM-NEXT: [[IV2:%.*]] = phi i32 [ [[N]], [[ENTRY]] ], [ [[IV2_NEXT:%.*]], [[BACKEDGE]] ]
; IS__CGSCC_NPM-NEXT: [[CND2:%.*]] = icmp sgt i32 [[IV2]], 0 ; IS________NPM-NEXT: [[CND2:%.*]] = icmp sgt i32 [[IV2]], 0
; IS__CGSCC_NPM-NEXT: br i1 [[CND2]], label [[BACKEDGE]], label [[EXIT:%.*]] ; IS________NPM-NEXT: br i1 [[CND2]], label [[BACKEDGE]], label [[EXIT:%.*]]
; IS__CGSCC_NPM: backedge: ; IS________NPM: backedge:
; IS__CGSCC_NPM-NEXT: [[IV_NEXT]] = add nsw i32 [[IV]], 1 ; IS________NPM-NEXT: [[IV_NEXT]] = add nsw i32 [[IV]], 1
; IS__CGSCC_NPM-NEXT: [[IV2_NEXT]] = sub nsw i32 [[IV2]], 1 ; IS________NPM-NEXT: [[IV2_NEXT]] = sub nsw i32 [[IV2]], 1
; IS__CGSCC_NPM-NEXT: [[CONT1:%.*]] = icmp slt i32 [[IV_NEXT]], 400 ; IS________NPM-NEXT: [[CONT1:%.*]] = icmp slt i32 [[IV_NEXT]], 400
; IS__CGSCC_NPM-NEXT: [[CONT2:%.*]] = icmp sgt i32 [[IV2_NEXT]], 0 ; IS________NPM-NEXT: [[CONT2:%.*]] = icmp sgt i32 [[IV2_NEXT]], 0
; IS__CGSCC_NPM-NEXT: [[CONT:%.*]] = and i1 [[CONT1]], [[CONT2]] ; IS________NPM-NEXT: [[CONT:%.*]] = and i1 [[CONT1]], [[CONT2]]
; IS__CGSCC_NPM-NEXT: br i1 [[CONT]], label [[LOOP]], label [[EXIT]] ; IS________NPM-NEXT: br i1 [[CONT]], label [[LOOP]], label [[EXIT]]
; IS__CGSCC_NPM: exit: ; IS________NPM: exit:
; IS__CGSCC_NPM-NEXT: ret i8 0 ; IS________NPM-NEXT: ret i8 0
; ;
entry: entry:
br label %loop br label %loop
loop: loop:
%iv = phi i32 [0, %entry], [%iv.next, %backedge] %iv = phi i32 [0, %entry], [%iv.next, %backedge]
%iv2 = phi i32 [%n, %entry], [%iv2.next, %backedge] %iv2 = phi i32 [%n, %entry], [%iv2.next, %backedge]
▲ Show 20 Lines • Show All 131 Lines • ▼ Show 20 Lines
} }
declare i32 @exit() declare i32 @exit()
declare i32 @consume(i1) declare i32 @consume(i1)
declare void @llvm.assume(i1) nounwind declare void @llvm.assume(i1) nounwind
declare void @dummy(i1) nounwind declare void @dummy(i1) nounwind
declare void @llvm.experimental.guard(i1, ...) declare void @llvm.experimental.guard(i1, ...)
;. ;.
; IS__TUNIT_OPM: attributes #[[ATTR0]] = { nofree nosync nounwind readnone } ; IS________OPM: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone }
; IS__TUNIT_OPM: attributes #[[ATTR1:[0-9]+]] = { inaccessiblememonly nofree nosync nounwind willreturn } ; IS________OPM: attributes #[[ATTR1:[0-9]+]] = { inaccessiblememonly nofree nosync nounwind willreturn }
; IS__TUNIT_OPM: attributes #[[ATTR2]] = { nounwind } ; IS________OPM: attributes #[[ATTR2]] = { nounwind }
; IS__TUNIT_OPM: attributes #[[ATTR3:[0-9]+]] = { nofree nosync willreturn } ; IS________OPM: attributes #[[ATTR3:[0-9]+]] = { nofree nosync willreturn }
;.
; IS__TUNIT_NPM: attributes #[[ATTR0]] = { nofree nosync nounwind readnone willreturn }
; IS__TUNIT_NPM: attributes #[[ATTR1:[0-9]+]] = { inaccessiblememonly nofree nosync nounwind willreturn }
; IS__TUNIT_NPM: attributes #[[ATTR2]] = { nounwind }
; IS__TUNIT_NPM: attributes #[[ATTR3:[0-9]+]] = { nofree nosync willreturn }
;.
; IS__CGSCC_OPM: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone }
; IS__CGSCC_OPM: attributes #[[ATTR1:[0-9]+]] = { inaccessiblememonly nofree nosync nounwind willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR2]] = { nounwind }
; IS__CGSCC_OPM: attributes #[[ATTR3:[0-9]+]] = { nofree nosync willreturn }
;. ;.
; IS__CGSCC_NPM: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn } ; IS________NPM: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__CGSCC_NPM: attributes #[[ATTR1:[0-9]+]] = { inaccessiblememonly nofree nosync nounwind willreturn } ; IS________NPM: attributes #[[ATTR1:[0-9]+]] = { inaccessiblememonly nofree nosync nounwind willreturn }
; IS__CGSCC_NPM: attributes #[[ATTR2]] = { nounwind } ; IS________NPM: attributes #[[ATTR2]] = { nounwind }
; IS__CGSCC_NPM: attributes #[[ATTR3:[0-9]+]] = { nofree nosync willreturn } ; IS________NPM: attributes #[[ATTR3:[0-9]+]] = { nofree nosync willreturn }
;. ;.

llvm/test/Transforms/Attributor/lvi-for-ashr.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals
; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM ; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM
; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM ; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM
; FIXME: DOT should be replaced with 3 ; FIXME: DOT should be replaced with 3
define i32 @test-ashr(i32 %c) { define i32 @test-ashr(i32 %c) {
; IS__TUNIT_OPM: Function Attrs: nofree nosync nounwind readnone willreturn ; IS________OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@test-ashr ; IS________OPM-LABEL: define {{[^@]+}}@test-ashr
; IS__TUNIT_OPM-SAME: (i32 [[C:%.*]]) #[[ATTR0:[0-9]+]] { ; IS________OPM-SAME: (i32 [[C:%.*]]) #[[ATTR0:[0-9]+]] {
; IS__TUNIT_OPM-NEXT: chk65: ; IS________OPM-NEXT: chk65:
; IS__TUNIT_OPM-NEXT: [[CMP:%.*]] = icmp sgt i32 [[C]], 65 ; IS________OPM-NEXT: [[CMP:%.*]] = icmp sgt i32 [[C]], 65
; IS__TUNIT_OPM-NEXT: br i1 [[CMP]], label [[RETURN:%.*]], label [[CHK0:%.*]] ; IS________OPM-NEXT: br i1 [[CMP]], label [[RETURN:%.*]], label [[CHK0:%.*]]
; IS__TUNIT_OPM: chk0: ; IS________OPM: chk0:
; IS__TUNIT_OPM-NEXT: [[CMP1:%.*]] = icmp slt i32 [[C]], 0 ; IS________OPM-NEXT: [[CMP1:%.*]] = icmp slt i32 [[C]], 0
; IS__TUNIT_OPM-NEXT: br i1 [[CMP]], label [[RETURN]], label [[BB_IF:%.*]] ; IS________OPM-NEXT: br i1 [[CMP]], label [[RETURN]], label [[BB_IF:%.*]]
; IS__TUNIT_OPM: bb_if: ; IS________OPM: bb_if:
; IS__TUNIT_OPM-NEXT: [[ASHR_VAL:%.*]] = ashr exact i32 [[C]], 2 ; IS________OPM-NEXT: [[ASHR_VAL:%.*]] = ashr exact i32 [[C]], 2
; IS__TUNIT_OPM-NEXT: [[CMP2:%.*]] = icmp sgt i32 [[ASHR_VAL]], 15 ; IS________OPM-NEXT: [[CMP2:%.*]] = icmp sgt i32 [[ASHR_VAL]], 15
; IS__TUNIT_OPM-NEXT: br i1 [[CMP2]], label [[BB_THEN:%.*]], label [[RETURN]] ; IS________OPM-NEXT: br i1 [[CMP2]], label [[BB_THEN:%.*]], label [[RETURN]]
; IS__TUNIT_OPM: bb_then: ; IS________OPM: bb_then:
; IS__TUNIT_OPM-NEXT: [[CMP3:%.*]] = icmp eq i32 [[ASHR_VAL]], 16 ; IS________OPM-NEXT: [[CMP3:%.*]] = icmp eq i32 [[ASHR_VAL]], 16
; IS__TUNIT_OPM-NEXT: [[DOT:%.*]] = select i1 [[CMP3]], i32 3, i32 2 ; IS________OPM-NEXT: [[DOT:%.*]] = select i1 [[CMP3]], i32 3, i32 2
; IS__TUNIT_OPM-NEXT: br label [[RETURN]] ; IS________OPM-NEXT: br label [[RETURN]]
; IS__TUNIT_OPM: return: ; IS________OPM: return:
; IS__TUNIT_OPM-NEXT: [[RETVAL:%.*]] = phi i32 [ 0, [[CHK65:%.*]] ], [ 1, [[CHK0]] ], [ [[DOT]], [[BB_THEN]] ], [ 4, [[BB_IF]] ] ; IS________OPM-NEXT: [[RETVAL:%.*]] = phi i32 [ 0, [[CHK65:%.*]] ], [ 1, [[CHK0]] ], [ [[DOT]], [[BB_THEN]] ], [ 4, [[BB_IF]] ]
; IS__TUNIT_OPM-NEXT: ret i32 [[RETVAL]] ; IS________OPM-NEXT: ret i32 [[RETVAL]]
; ;
; IS__TUNIT_NPM: Function Attrs: nofree nosync nounwind readnone willreturn ; IS________NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@test-ashr ; IS________NPM-LABEL: define {{[^@]+}}@test-ashr
; IS__TUNIT_NPM-SAME: (i32 [[C:%.*]]) #[[ATTR0:[0-9]+]] { ; IS________NPM-SAME: (i32 [[C:%.*]]) #[[ATTR0:[0-9]+]] {
; IS__TUNIT_NPM-NEXT: chk65: ; IS________NPM-NEXT: chk65:
; IS__TUNIT_NPM-NEXT: [[CMP:%.*]] = icmp sgt i32 [[C]], 65 ; IS________NPM-NEXT: [[CMP:%.*]] = icmp sgt i32 [[C]], 65
; IS__TUNIT_NPM-NEXT: br i1 [[CMP]], label [[RETURN:%.*]], label [[CHK0:%.*]] ; IS________NPM-NEXT: br i1 [[CMP]], label [[RETURN:%.*]], label [[CHK0:%.*]]
; IS__TUNIT_NPM: chk0: ; IS________NPM: chk0:
; IS__TUNIT_NPM-NEXT: [[CMP1:%.*]] = icmp slt i32 [[C]], 0 ; IS________NPM-NEXT: [[CMP1:%.*]] = icmp slt i32 [[C]], 0
; IS__TUNIT_NPM-NEXT: br i1 [[CMP]], label [[RETURN]], label [[BB_IF:%.*]] ; IS________NPM-NEXT: br i1 [[CMP]], label [[RETURN]], label [[BB_IF:%.*]]
; IS__TUNIT_NPM: bb_if: ; IS________NPM: bb_if:
; IS__TUNIT_NPM-NEXT: [[ASHR_VAL:%.*]] = ashr exact i32 [[C]], 2 ; IS________NPM-NEXT: [[ASHR_VAL:%.*]] = ashr exact i32 [[C]], 2
; IS__TUNIT_NPM-NEXT: [[CMP2:%.*]] = icmp sgt i32 [[ASHR_VAL]], 15 ; IS________NPM-NEXT: [[CMP2:%.*]] = icmp sgt i32 [[ASHR_VAL]], 15
; IS__TUNIT_NPM-NEXT: br i1 [[CMP2]], label [[BB_THEN:%.*]], label [[RETURN]] ; IS________NPM-NEXT: br i1 [[CMP2]], label [[BB_THEN:%.*]], label [[RETURN]]
; IS__TUNIT_NPM: bb_then: ; IS________NPM: bb_then:
; IS__TUNIT_NPM-NEXT: [[DOT:%.*]] = select i1 true, i32 3, i32 2 ; IS________NPM-NEXT: [[DOT:%.*]] = select i1 true, i32 3, i32 2
; IS__TUNIT_NPM-NEXT: br label [[RETURN]] ; IS________NPM-NEXT: br label [[RETURN]]
; IS__TUNIT_NPM: return: ; IS________NPM: return:
; IS__TUNIT_NPM-NEXT: [[RETVAL:%.*]] = phi i32 [ 0, [[CHK65:%.*]] ], [ 1, [[CHK0]] ], [ [[DOT]], [[BB_THEN]] ], [ 4, [[BB_IF]] ] ; IS________NPM-NEXT: [[RETVAL:%.*]] = phi i32 [ 0, [[CHK65:%.*]] ], [ 1, [[CHK0]] ], [ [[DOT]], [[BB_THEN]] ], [ 4, [[BB_IF]] ]
; IS__TUNIT_NPM-NEXT: ret i32 [[RETVAL]] ; IS________NPM-NEXT: ret i32 [[RETVAL]]
;
; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@test-ashr
; IS__CGSCC_OPM-SAME: (i32 [[C:%.*]]) #[[ATTR0:[0-9]+]] {
; IS__CGSCC_OPM-NEXT: chk65:
; IS__CGSCC_OPM-NEXT: [[CMP:%.*]] = icmp sgt i32 [[C]], 65
; IS__CGSCC_OPM-NEXT: br i1 [[CMP]], label [[RETURN:%.*]], label [[CHK0:%.*]]
; IS__CGSCC_OPM: chk0:
; IS__CGSCC_OPM-NEXT: [[CMP1:%.*]] = icmp slt i32 [[C]], 0
; IS__CGSCC_OPM-NEXT: br i1 [[CMP]], label [[RETURN]], label [[BB_IF:%.*]]
; IS__CGSCC_OPM: bb_if:
; IS__CGSCC_OPM-NEXT: [[ASHR_VAL:%.*]] = ashr exact i32 [[C]], 2
; IS__CGSCC_OPM-NEXT: [[CMP2:%.*]] = icmp sgt i32 [[ASHR_VAL]], 15
; IS__CGSCC_OPM-NEXT: br i1 [[CMP2]], label [[BB_THEN:%.*]], label [[RETURN]]
; IS__CGSCC_OPM: bb_then:
; IS__CGSCC_OPM-NEXT: [[CMP3:%.*]] = icmp eq i32 [[ASHR_VAL]], 16
; IS__CGSCC_OPM-NEXT: [[DOT:%.*]] = select i1 [[CMP3]], i32 3, i32 2
; IS__CGSCC_OPM-NEXT: br label [[RETURN]]
; IS__CGSCC_OPM: return:
; IS__CGSCC_OPM-NEXT: [[RETVAL:%.*]] = phi i32 [ 0, [[CHK65:%.*]] ], [ 1, [[CHK0]] ], [ [[DOT]], [[BB_THEN]] ], [ 4, [[BB_IF]] ]
; IS__CGSCC_OPM-NEXT: ret i32 [[RETVAL]]
;
; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@test-ashr
; IS__CGSCC_NPM-SAME: (i32 [[C:%.*]]) #[[ATTR0:[0-9]+]] {
; IS__CGSCC_NPM-NEXT: chk65:
; IS__CGSCC_NPM-NEXT: [[CMP:%.*]] = icmp sgt i32 [[C]], 65
; IS__CGSCC_NPM-NEXT: br i1 [[CMP]], label [[RETURN:%.*]], label [[CHK0:%.*]]
; IS__CGSCC_NPM: chk0:
; IS__CGSCC_NPM-NEXT: [[CMP1:%.*]] = icmp slt i32 [[C]], 0
; IS__CGSCC_NPM-NEXT: br i1 [[CMP]], label [[RETURN]], label [[BB_IF:%.*]]
; IS__CGSCC_NPM: bb_if:
; IS__CGSCC_NPM-NEXT: [[ASHR_VAL:%.*]] = ashr exact i32 [[C]], 2
; IS__CGSCC_NPM-NEXT: [[CMP2:%.*]] = icmp sgt i32 [[ASHR_VAL]], 15
; IS__CGSCC_NPM-NEXT: br i1 [[CMP2]], label [[BB_THEN:%.*]], label [[RETURN]]
; IS__CGSCC_NPM: bb_then:
; IS__CGSCC_NPM-NEXT: [[DOT:%.*]] = select i1 true, i32 3, i32 2
; IS__CGSCC_NPM-NEXT: br label [[RETURN]]
; IS__CGSCC_NPM: return:
; IS__CGSCC_NPM-NEXT: [[RETVAL:%.*]] = phi i32 [ 0, [[CHK65:%.*]] ], [ 1, [[CHK0]] ], [ [[DOT]], [[BB_THEN]] ], [ 4, [[BB_IF]] ]
; IS__CGSCC_NPM-NEXT: ret i32 [[RETVAL]]
; ;
chk65: chk65:
%cmp = icmp sgt i32 %c, 65 %cmp = icmp sgt i32 %c, 65
br i1 %cmp, label %return, label %chk0 br i1 %cmp, label %return, label %chk0
chk0: chk0:
%cmp1 = icmp slt i32 %c, 0 %cmp1 = icmp slt i32 %c, 0
br i1 %cmp, label %return, label %bb_if br i1 %cmp, label %return, label %bb_if
bb_if: bb_if:
%ashr.val = ashr exact i32 %c, 2 %ashr.val = ashr exact i32 %c, 2
%cmp2 = icmp sgt i32 %ashr.val, 15 %cmp2 = icmp sgt i32 %ashr.val, 15
br i1 %cmp2, label %bb_then, label %return br i1 %cmp2, label %bb_then, label %return
bb_then: bb_then:
%cmp3 = icmp eq i32 %ashr.val, 16 %cmp3 = icmp eq i32 %ashr.val, 16
%. = select i1 %cmp3, i32 3, i32 2 %. = select i1 %cmp3, i32 3, i32 2
br label %return br label %return
return: return:
%retval = phi i32 [0, %chk65], [1, %chk0], [%., %bb_then], [4, %bb_if] %retval = phi i32 [0, %chk65], [1, %chk0], [%., %bb_then], [4, %bb_if]
ret i32 %retval ret i32 %retval
} }
;. ;.
; IS__TUNIT____: attributes #[[ATTR0:[0-9]+]] = { nofree nosync nounwind readnone willreturn } ; CHECK: attributes #[[ATTR0:[0-9]+]] = { nofree norecurse nosync nounwind readnone willreturn }
;.
; IS__CGSCC____: attributes #[[ATTR0:[0-9]+]] = { nofree norecurse nosync nounwind readnone willreturn }
;. ;.

llvm/test/Transforms/Attributor/memory_locations.ll

Show First 20 Lines • Show All 436 Lines • ▼ Show 20 Lines
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
%unknown = call i8* @inaccesible_argmem_only_decl(i8* null) %unknown = call i8* @inaccesible_argmem_only_decl(i8* null)
store i8 0, i8* %unknown store i8 0, i8* %unknown
ret void ret void
} }
define void @callerE(i8* %arg) { define void @callerE(i8* %arg) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@callerE ; CHECK-LABEL: define {{[^@]+}}@callerE
; IS__TUNIT____-SAME: (i8* nocapture nofree readnone [[ARG:%.*]]) #[[ATTR5:[0-9]+]] { ; CHECK-SAME: (i8* nocapture nofree readnone [[ARG:%.*]]) #[[ATTR5:[0-9]+]] {
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@callerE
; IS__CGSCC____-SAME: (i8* nocapture nofree readnone [[ARG:%.*]]) #[[ATTR5:[0-9]+]] {
; IS__CGSCC____-NEXT: ret void
; ;
call void @llvm.lifetime.start.p0i8(i64 4, i8* %arg) call void @llvm.lifetime.start.p0i8(i64 4, i8* %arg)
ret void ret void
} }
define void @write_global() { define void @write_global() {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind willreturn writeonly ; CHECK: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly
; IS__TUNIT____-LABEL: define {{[^@]+}}@write_global ; CHECK-LABEL: define {{[^@]+}}@write_global
; IS__TUNIT____-SAME: () #[[ATTR6:[0-9]+]] { ; CHECK-SAME: () #[[ATTR6:[0-9]+]] {
; IS__TUNIT____-NEXT: store i32 0, i32* @G, align 4 ; CHECK-NEXT: store i32 0, i32* @G, align 4
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC____-LABEL: define {{[^@]+}}@write_global
; IS__CGSCC____-SAME: () #[[ATTR6:[0-9]+]] {
; IS__CGSCC____-NEXT: store i32 0, i32* @G, align 4
; IS__CGSCC____-NEXT: ret void
; ;
store i32 0, i32* @G, align 4 store i32 0, i32* @G, align 4
ret void ret void
} }
define void @write_global_via_arg(i32* %GPtr) { define void @write_global_via_arg(i32* %GPtr) {
; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind willreturn writeonly ; CHECK: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__TUNIT____-LABEL: define {{[^@]+}}@write_global_via_arg ; CHECK-LABEL: define {{[^@]+}}@write_global_via_arg
; IS__TUNIT____-SAME: (i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[GPTR:%.*]]) #[[ATTR7:[0-9]+]] { ; CHECK-SAME: (i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[GPTR:%.*]]) #[[ATTR7:[0-9]+]] {
; IS__TUNIT____-NEXT: store i32 0, i32* [[GPTR]], align 4 ; CHECK-NEXT: store i32 0, i32* [[GPTR]], align 4
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC____-LABEL: define {{[^@]+}}@write_global_via_arg
; IS__CGSCC____-SAME: (i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[GPTR:%.*]]) #[[ATTR7:[0-9]+]] {
; IS__CGSCC____-NEXT: store i32 0, i32* [[GPTR]], align 4
; IS__CGSCC____-NEXT: ret void
; ;
store i32 0, i32* %GPtr, align 4 store i32 0, i32* %GPtr, align 4
ret void ret void
} }
define internal void @write_global_via_arg_internal(i32* %GPtr) { define internal void @write_global_via_arg_internal(i32* %GPtr) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind willreturn writeonly ; CHECK: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly
; IS__TUNIT____-LABEL: define {{[^@]+}}@write_global_via_arg_internal ; CHECK-LABEL: define {{[^@]+}}@write_global_via_arg_internal
; IS__TUNIT____-SAME: () #[[ATTR6]] { ; CHECK-SAME: () #[[ATTR6]] {
; IS__TUNIT____-NEXT: store i32 0, i32* @G, align 4 ; CHECK-NEXT: store i32 0, i32* @G, align 4
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC____-LABEL: define {{[^@]+}}@write_global_via_arg_internal
; IS__CGSCC____-SAME: () #[[ATTR6]] {
; IS__CGSCC____-NEXT: store i32 0, i32* @G, align 4
; IS__CGSCC____-NEXT: ret void
; ;
store i32 0, i32* %GPtr, align 4 store i32 0, i32* %GPtr, align 4
ret void ret void
} }
define void @writeonly_global() { define void @writeonly_global() {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind willreturn writeonly ; IS__TUNIT____: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly
; IS__TUNIT____-LABEL: define {{[^@]+}}@writeonly_global ; IS__TUNIT____-LABEL: define {{[^@]+}}@writeonly_global
; IS__TUNIT____-SAME: () #[[ATTR6]] { ; IS__TUNIT____-SAME: () #[[ATTR6]] {
; IS__TUNIT____-NEXT: call void @write_global() #[[ATTR6]] ; IS__TUNIT____-NEXT: call void @write_global() #[[ATTR10:[0-9]+]]
; IS__TUNIT____-NEXT: ret void ; IS__TUNIT____-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC____-LABEL: define {{[^@]+}}@writeonly_global ; IS__CGSCC____-LABEL: define {{[^@]+}}@writeonly_global
; IS__CGSCC____-SAME: () #[[ATTR6]] { ; IS__CGSCC____-SAME: () #[[ATTR6]] {
; IS__CGSCC____-NEXT: call void @write_global() #[[ATTR11:[0-9]+]] ; IS__CGSCC____-NEXT: call void @write_global() #[[ATTR9:[0-9]+]]
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
call void @write_global() call void @write_global()
ret void ret void
} }
define void @writeonly_global_via_arg() { define void @writeonly_global_via_arg() {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind willreturn writeonly ; IS__TUNIT____: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly
; IS__TUNIT____-LABEL: define {{[^@]+}}@writeonly_global_via_arg ; IS__TUNIT____-LABEL: define {{[^@]+}}@writeonly_global_via_arg
; IS__TUNIT____-SAME: () #[[ATTR6]] { ; IS__TUNIT____-SAME: () #[[ATTR6]] {
; IS__TUNIT____-NEXT: call void @write_global_via_arg(i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) @G) #[[ATTR6]] ; IS__TUNIT____-NEXT: call void @write_global_via_arg(i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) @G) #[[ATTR10]]
; IS__TUNIT____-NEXT: ret void ; IS__TUNIT____-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC____-LABEL: define {{[^@]+}}@writeonly_global_via_arg ; IS__CGSCC____-LABEL: define {{[^@]+}}@writeonly_global_via_arg
; IS__CGSCC____-SAME: () #[[ATTR6]] { ; IS__CGSCC____-SAME: () #[[ATTR6]] {
; IS__CGSCC____-NEXT: call void @write_global_via_arg(i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) @G) #[[ATTR11]] ; IS__CGSCC____-NEXT: call void @write_global_via_arg(i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) @G) #[[ATTR9]]
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
call void @write_global_via_arg(i32* @G) call void @write_global_via_arg(i32* @G)
ret void ret void
} }
define void @writeonly_global_via_arg_internal() { define void @writeonly_global_via_arg_internal() {
; ;
; IS__TUNIT____: Function Attrs: nofree nosync nounwind willreturn writeonly ; IS__TUNIT____: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly
; IS__TUNIT____-LABEL: define {{[^@]+}}@writeonly_global_via_arg_internal ; IS__TUNIT____-LABEL: define {{[^@]+}}@writeonly_global_via_arg_internal
; IS__TUNIT____-SAME: () #[[ATTR6]] { ; IS__TUNIT____-SAME: () #[[ATTR6]] {
; IS__TUNIT____-NEXT: call void @write_global_via_arg_internal() #[[ATTR6]] ; IS__TUNIT____-NEXT: call void @write_global_via_arg_internal() #[[ATTR10]]
; IS__TUNIT____-NEXT: ret void ; IS__TUNIT____-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC____-LABEL: define {{[^@]+}}@writeonly_global_via_arg_internal ; IS__CGSCC____-LABEL: define {{[^@]+}}@writeonly_global_via_arg_internal
; IS__CGSCC____-SAME: () #[[ATTR6]] { ; IS__CGSCC____-SAME: () #[[ATTR6]] {
; IS__CGSCC____-NEXT: call void @write_global_via_arg_internal() #[[ATTR11]] ; IS__CGSCC____-NEXT: call void @write_global_via_arg_internal() #[[ATTR9]]
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
call void @write_global_via_arg_internal(i32* @G) call void @write_global_via_arg_internal(i32* @G)
ret void ret void
} }
define i8 @recursive_not_readnone(i8* %ptr, i1 %c) { define i8 @recursive_not_readnone(i8* %ptr, i1 %c) {
; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind writeonly ; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind writeonly
; IS__TUNIT____-LABEL: define {{[^@]+}}@recursive_not_readnone ; IS__TUNIT____-LABEL: define {{[^@]+}}@recursive_not_readnone
; IS__TUNIT____-SAME: (i8* nocapture nofree writeonly [[PTR:%.*]], i1 [[C:%.*]]) #[[ATTR8:[0-9]+]] { ; IS__TUNIT____-SAME: (i8* nocapture nofree writeonly [[PTR:%.*]], i1 [[C:%.*]]) #[[ATTR8:[0-9]+]] {
; IS__TUNIT____-NEXT: [[ALLOC:%.*]] = alloca i8, align 1 ; IS__TUNIT____-NEXT: [[ALLOC:%.*]] = alloca i8, align 1
; IS__TUNIT____-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]] ; IS__TUNIT____-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]]
; IS__TUNIT____: t: ; IS__TUNIT____: t:
; IS__TUNIT____-NEXT: [[TMP1:%.*]] = call i8 @recursive_not_readnone(i8* noalias nocapture nofree noundef nonnull writeonly dereferenceable(1) [[ALLOC]], i1 noundef false) #[[ATTR10:[0-9]+]] ; IS__TUNIT____-NEXT: [[TMP1:%.*]] = call i8 @recursive_not_readnone(i8* noalias nocapture nofree noundef nonnull writeonly dereferenceable(1) [[ALLOC]], i1 noundef false) #[[ATTR11:[0-9]+]]
; IS__TUNIT____-NEXT: ret i8 1 ; IS__TUNIT____-NEXT: ret i8 1
; IS__TUNIT____: f: ; IS__TUNIT____: f:
; IS__TUNIT____-NEXT: store i8 1, i8* [[PTR]], align 1 ; IS__TUNIT____-NEXT: store i8 1, i8* [[PTR]], align 1
; IS__TUNIT____-NEXT: ret i8 0 ; IS__TUNIT____-NEXT: ret i8 0
; ;
; IS__CGSCC____: Function Attrs: argmemonly nofree nosync nounwind writeonly ; IS__CGSCC____: Function Attrs: argmemonly nofree nosync nounwind writeonly
; IS__CGSCC____-LABEL: define {{[^@]+}}@recursive_not_readnone ; IS__CGSCC____-LABEL: define {{[^@]+}}@recursive_not_readnone
; IS__CGSCC____-SAME: (i8* nocapture nofree writeonly [[PTR:%.*]], i1 [[C:%.*]]) #[[ATTR8:[0-9]+]] { ; IS__CGSCC____-SAME: (i8* nocapture nofree writeonly [[PTR:%.*]], i1 [[C:%.*]]) #[[ATTR8:[0-9]+]] {
; IS__CGSCC____-NEXT: [[ALLOC:%.*]] = alloca i8, align 1 ; IS__CGSCC____-NEXT: [[ALLOC:%.*]] = alloca i8, align 1
; IS__CGSCC____-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]] ; IS__CGSCC____-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]]
; IS__CGSCC____: t: ; IS__CGSCC____: t:
; IS__CGSCC____-NEXT: [[TMP1:%.*]] = call i8 @recursive_not_readnone(i8* noalias nocapture nofree noundef nonnull writeonly dereferenceable(1) [[ALLOC]], i1 noundef false) #[[ATTR12:[0-9]+]] ; IS__CGSCC____-NEXT: [[TMP1:%.*]] = call i8 @recursive_not_readnone(i8* noalias nocapture nofree noundef nonnull writeonly dereferenceable(1) [[ALLOC]], i1 noundef false) #[[ATTR10:[0-9]+]]
; IS__CGSCC____-NEXT: ret i8 1 ; IS__CGSCC____-NEXT: ret i8 1
; IS__CGSCC____: f: ; IS__CGSCC____: f:
; IS__CGSCC____-NEXT: store i8 1, i8* [[PTR]], align 1 ; IS__CGSCC____-NEXT: store i8 1, i8* [[PTR]], align 1
; IS__CGSCC____-NEXT: ret i8 0 ; IS__CGSCC____-NEXT: ret i8 0
; ;
%alloc = alloca i8 %alloc = alloca i8
br i1 %c, label %t, label %f br i1 %c, label %t, label %f
t: t:
call i8 @recursive_not_readnone(i8* %alloc, i1 false) call i8 @recursive_not_readnone(i8* %alloc, i1 false)
%r = load i8, i8* %alloc %r = load i8, i8* %alloc
ret i8 %r ret i8 %r
f: f:
store i8 1, i8* %ptr store i8 1, i8* %ptr
ret i8 0 ret i8 0
} }
define internal i8 @recursive_not_readnone_internal(i8* %ptr, i1 %c) { define internal i8 @recursive_not_readnone_internal(i8* %ptr, i1 %c) {
; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind writeonly ; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind writeonly
; IS__TUNIT____-LABEL: define {{[^@]+}}@recursive_not_readnone_internal ; IS__TUNIT____-LABEL: define {{[^@]+}}@recursive_not_readnone_internal
; IS__TUNIT____-SAME: (i8* noalias nocapture nofree noundef nonnull writeonly dereferenceable(1) [[PTR:%.*]], i1 [[C:%.*]]) #[[ATTR8]] { ; IS__TUNIT____-SAME: (i8* noalias nocapture nofree noundef nonnull writeonly dereferenceable(1) [[PTR:%.*]], i1 [[C:%.*]]) #[[ATTR8]] {
; IS__TUNIT____-NEXT: [[ALLOC:%.*]] = alloca i8, align 1 ; IS__TUNIT____-NEXT: [[ALLOC:%.*]] = alloca i8, align 1
; IS__TUNIT____-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]] ; IS__TUNIT____-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]]
; IS__TUNIT____: t: ; IS__TUNIT____: t:
; IS__TUNIT____-NEXT: [[TMP1:%.*]] = call i8 @recursive_not_readnone_internal(i8* noalias nocapture nofree noundef nonnull writeonly dereferenceable(1) [[ALLOC]], i1 noundef false) #[[ATTR10]] ; IS__TUNIT____-NEXT: [[TMP1:%.*]] = call i8 @recursive_not_readnone_internal(i8* noalias nocapture nofree noundef nonnull writeonly dereferenceable(1) [[ALLOC]], i1 noundef false) #[[ATTR11]], !range [[RNG0:![0-9]+]]
; IS__TUNIT____-NEXT: ret i8 1 ; IS__TUNIT____-NEXT: ret i8 1
; IS__TUNIT____: f: ; IS__TUNIT____: f:
; IS__TUNIT____-NEXT: ret i8 0 ; IS__TUNIT____-NEXT: ret i8 0
; ;
; IS__CGSCC____: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@recursive_not_readnone_internal ; IS__CGSCC____-LABEL: define {{[^@]+}}@recursive_not_readnone_internal
; IS__CGSCC____-SAME: (i8* noalias nocapture nofree nonnull readnone dereferenceable(1) [[PTR:%.*]], i1 [[C:%.*]]) #[[ATTR9:[0-9]+]] { ; IS__CGSCC____-SAME: (i8* noalias nocapture nofree nonnull readnone dereferenceable(1) [[PTR:%.*]], i1 [[C:%.*]]) #[[ATTR5]] {
; IS__CGSCC____-NEXT: [[ALLOC:%.*]] = alloca i8, align 1 ; IS__CGSCC____-NEXT: [[ALLOC:%.*]] = alloca i8, align 1
; IS__CGSCC____-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]] ; IS__CGSCC____-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]]
; IS__CGSCC____: t: ; IS__CGSCC____: t:
; IS__CGSCC____-NEXT: [[TMP1:%.*]] = call i8 @recursive_not_readnone_internal(i8* noalias nocapture nofree nonnull readnone dereferenceable(1) undef, i1 noundef false) #[[ATTR10:[0-9]+]], !range [[RNG0:![0-9]+]] ; IS__CGSCC____-NEXT: [[TMP1:%.*]] = call i8 @recursive_not_readnone_internal(i8* noalias nocapture nofree nonnull readnone dereferenceable(1) undef, i1 noundef false) #[[ATTR11:[0-9]+]], !range [[RNG0:![0-9]+]]
; IS__CGSCC____-NEXT: ret i8 1 ; IS__CGSCC____-NEXT: ret i8 1
; IS__CGSCC____: f: ; IS__CGSCC____: f:
; IS__CGSCC____-NEXT: ret i8 0 ; IS__CGSCC____-NEXT: ret i8 0
; ;
%alloc = alloca i8 %alloc = alloca i8
br i1 %c, label %t, label %f br i1 %c, label %t, label %f
t: t:
call i8 @recursive_not_readnone_internal(i8* %alloc, i1 false) call i8 @recursive_not_readnone_internal(i8* %alloc, i1 false)
%r = load i8, i8* %alloc %r = load i8, i8* %alloc
ret i8 %r ret i8 %r
f: f:
store i8 1, i8* %ptr store i8 1, i8* %ptr
ret i8 0 ret i8 0
} }
define i8 @readnone_caller(i1 %c) { define i8 @readnone_caller(i1 %c) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone ; IS__TUNIT____: Function Attrs: nofree norecurse nosync nounwind readnone
; IS__TUNIT____-LABEL: define {{[^@]+}}@readnone_caller ; IS__TUNIT____-LABEL: define {{[^@]+}}@readnone_caller
; IS__TUNIT____-SAME: (i1 [[C:%.*]]) #[[ATTR9:[0-9]+]] { ; IS__TUNIT____-SAME: (i1 [[C:%.*]]) #[[ATTR9:[0-9]+]] {
; IS__TUNIT____-NEXT: [[A:%.*]] = alloca i8, align 1 ; IS__TUNIT____-NEXT: [[A:%.*]] = alloca i8, align 1
; IS__TUNIT____-NEXT: [[R:%.*]] = call noundef i8 @recursive_not_readnone_internal(i8* noalias nocapture nofree noundef nonnull writeonly dereferenceable(1) [[A]], i1 [[C]]) #[[ATTR10]], !range [[RNG0:![0-9]+]] ; IS__TUNIT____-NEXT: [[R:%.*]] = call i8 @recursive_not_readnone_internal(i8* noalias nocapture nofree noundef nonnull writeonly dereferenceable(1) [[A]], i1 [[C]]) #[[ATTR11]], !range [[RNG0]]
; IS__TUNIT____-NEXT: ret i8 [[R]] ; IS__TUNIT____-NEXT: ret i8 [[R]]
; ;
; IS__CGSCC____: Function Attrs: nofree nosync nounwind readnone ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@readnone_caller ; IS__CGSCC____-LABEL: define {{[^@]+}}@readnone_caller
; IS__CGSCC____-SAME: (i1 [[C:%.*]]) #[[ATTR10]] { ; IS__CGSCC____-SAME: (i1 [[C:%.*]]) #[[ATTR5]] {
; IS__CGSCC____-NEXT: [[R:%.*]] = call noundef i8 @recursive_not_readnone_internal(i8* noalias nocapture nofree nonnull readnone dereferenceable(1) undef, i1 [[C]]) #[[ATTR13:[0-9]+]], !range [[RNG0]] ; IS__CGSCC____-NEXT: [[R:%.*]] = call noundef i8 @recursive_not_readnone_internal(i8* noalias nocapture nofree nonnull readnone dereferenceable(1) undef, i1 [[C]]) #[[ATTR12:[0-9]+]], !range [[RNG0]]
; IS__CGSCC____-NEXT: ret i8 [[R]] ; IS__CGSCC____-NEXT: ret i8 [[R]]
; ;
%a = alloca i8 %a = alloca i8
%r = call i8 @recursive_not_readnone_internal(i8* %a, i1 %c) %r = call i8 @recursive_not_readnone_internal(i8* %a, i1 %c)
ret i8 %r ret i8 %r
} }
define internal i8 @recursive_readnone_internal2(i8* %ptr, i1 %c) { define internal i8 @recursive_readnone_internal2(i8* %ptr, i1 %c) {
; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind writeonly ; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind writeonly
; IS__TUNIT____-LABEL: define {{[^@]+}}@recursive_readnone_internal2 ; IS__TUNIT____-LABEL: define {{[^@]+}}@recursive_readnone_internal2
; IS__TUNIT____-SAME: (i8* nocapture nofree nonnull writeonly [[PTR:%.*]], i1 [[C:%.*]]) #[[ATTR8]] { ; IS__TUNIT____-SAME: (i8* nocapture nofree nonnull writeonly [[PTR:%.*]], i1 [[C:%.*]]) #[[ATTR8]] {
; IS__TUNIT____-NEXT: [[ALLOC:%.*]] = alloca i8, align 1 ; IS__TUNIT____-NEXT: [[ALLOC:%.*]] = alloca i8, align 1
; IS__TUNIT____-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]] ; IS__TUNIT____-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]]
; IS__TUNIT____: t: ; IS__TUNIT____: t:
; IS__TUNIT____-NEXT: [[TMP1:%.*]] = call i8 @recursive_readnone_internal2(i8* noalias nocapture nofree noundef nonnull writeonly dereferenceable(1) [[ALLOC]], i1 noundef false) #[[ATTR10]] ; IS__TUNIT____-NEXT: [[TMP1:%.*]] = call i8 @recursive_readnone_internal2(i8* noalias nocapture nofree noundef nonnull writeonly dereferenceable(1) [[ALLOC]], i1 noundef false) #[[ATTR11]], !range [[RNG0]]
; IS__TUNIT____-NEXT: ret i8 1 ; IS__TUNIT____-NEXT: ret i8 1
; IS__TUNIT____: f: ; IS__TUNIT____: f:
; IS__TUNIT____-NEXT: ret i8 0 ; IS__TUNIT____-NEXT: ret i8 0
; ;
; IS__CGSCC____: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@recursive_readnone_internal2 ; IS__CGSCC____-LABEL: define {{[^@]+}}@recursive_readnone_internal2
; IS__CGSCC____-SAME: (i8* noalias nocapture nofree nonnull readnone [[PTR:%.*]], i1 [[C:%.*]]) #[[ATTR9]] { ; IS__CGSCC____-SAME: (i8* noalias nocapture nofree nonnull readnone [[PTR:%.*]], i1 [[C:%.*]]) #[[ATTR5]] {
; IS__CGSCC____-NEXT: [[ALLOC:%.*]] = alloca i8, align 1 ; IS__CGSCC____-NEXT: [[ALLOC:%.*]] = alloca i8, align 1
; IS__CGSCC____-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]] ; IS__CGSCC____-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]]
; IS__CGSCC____: t: ; IS__CGSCC____: t:
; IS__CGSCC____-NEXT: [[TMP1:%.*]] = call i8 @recursive_readnone_internal2(i8* noalias nocapture nofree nonnull readnone dereferenceable(1) undef, i1 noundef false) #[[ATTR10]], !range [[RNG0]] ; IS__CGSCC____-NEXT: [[TMP1:%.*]] = call i8 @recursive_readnone_internal2(i8* noalias nocapture nofree nonnull readnone dereferenceable(1) undef, i1 noundef false) #[[ATTR11]], !range [[RNG0]]
; IS__CGSCC____-NEXT: ret i8 1 ; IS__CGSCC____-NEXT: ret i8 1
; IS__CGSCC____: f: ; IS__CGSCC____: f:
; IS__CGSCC____-NEXT: ret i8 0 ; IS__CGSCC____-NEXT: ret i8 0
; ;
%alloc = alloca i8 %alloc = alloca i8
br i1 %c, label %t, label %f br i1 %c, label %t, label %f
t: t:
call i8 @recursive_readnone_internal2(i8* %alloc, i1 false) call i8 @recursive_readnone_internal2(i8* %alloc, i1 false)
%r = load i8, i8* %alloc %r = load i8, i8* %alloc
ret i8 %r ret i8 %r
f: f:
store i8 1, i8* %ptr store i8 1, i8* %ptr
ret i8 0 ret i8 0
} }
define i8 @readnone_caller2(i1 %c) { define i8 @readnone_caller2(i1 %c) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone ; IS__TUNIT____: Function Attrs: nofree norecurse nosync nounwind readnone
; IS__TUNIT____-LABEL: define {{[^@]+}}@readnone_caller2 ; IS__TUNIT____-LABEL: define {{[^@]+}}@readnone_caller2
; IS__TUNIT____-SAME: (i1 [[C:%.*]]) #[[ATTR9]] { ; IS__TUNIT____-SAME: (i1 [[C:%.*]]) #[[ATTR9]] {
; IS__TUNIT____-NEXT: [[R:%.*]] = call noundef i8 @recursive_readnone_internal2(i8* undef, i1 [[C]]) #[[ATTR10]], !range [[RNG0]] ; IS__TUNIT____-NEXT: [[R:%.*]] = call i8 @recursive_readnone_internal2(i8* undef, i1 [[C]]) #[[ATTR11]], !range [[RNG0]]
; IS__TUNIT____-NEXT: ret i8 [[R]] ; IS__TUNIT____-NEXT: ret i8 [[R]]
; ;
; IS__CGSCC____: Function Attrs: nofree nosync nounwind readnone ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@readnone_caller2 ; IS__CGSCC____-LABEL: define {{[^@]+}}@readnone_caller2
; IS__CGSCC____-SAME: (i1 [[C:%.*]]) #[[ATTR10]] { ; IS__CGSCC____-SAME: (i1 [[C:%.*]]) #[[ATTR5]] {
; IS__CGSCC____-NEXT: [[R:%.*]] = call noundef i8 @recursive_readnone_internal2(i8* undef, i1 [[C]]) #[[ATTR13]], !range [[RNG0]] ; IS__CGSCC____-NEXT: [[R:%.*]] = call noundef i8 @recursive_readnone_internal2(i8* undef, i1 [[C]]) #[[ATTR12]], !range [[RNG0]]
; IS__CGSCC____-NEXT: ret i8 [[R]] ; IS__CGSCC____-NEXT: ret i8 [[R]]
; ;
%r = call i8 @recursive_readnone_internal2(i8* undef, i1 %c) %r = call i8 @recursive_readnone_internal2(i8* undef, i1 %c)
ret i8 %r ret i8 %r
} }
define internal i8 @recursive_not_readnone_internal3(i8* %ptr, i1 %c) { define internal i8 @recursive_not_readnone_internal3(i8* %ptr, i1 %c) {
; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind writeonly ; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind writeonly
; IS__TUNIT____-LABEL: define {{[^@]+}}@recursive_not_readnone_internal3 ; IS__TUNIT____-LABEL: define {{[^@]+}}@recursive_not_readnone_internal3
; IS__TUNIT____-SAME: (i8* noalias nocapture nofree noundef nonnull writeonly dereferenceable(1) [[PTR:%.*]], i1 [[C:%.*]]) #[[ATTR8]] { ; IS__TUNIT____-SAME: (i8* noalias nocapture nofree noundef nonnull writeonly dereferenceable(1) [[PTR:%.*]], i1 [[C:%.*]]) #[[ATTR8]] {
; IS__TUNIT____-NEXT: [[ALLOC:%.*]] = alloca i8, align 1 ; IS__TUNIT____-NEXT: [[ALLOC:%.*]] = alloca i8, align 1
; IS__TUNIT____-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]] ; IS__TUNIT____-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]]
; IS__TUNIT____: t: ; IS__TUNIT____: t:
; IS__TUNIT____-NEXT: [[TMP1:%.*]] = call i8 @recursive_not_readnone_internal3(i8* noalias nocapture nofree noundef nonnull writeonly dereferenceable(1) [[ALLOC]], i1 noundef false) #[[ATTR10]] ; IS__TUNIT____-NEXT: [[TMP1:%.*]] = call i8 @recursive_not_readnone_internal3(i8* noalias nocapture nofree noundef nonnull writeonly dereferenceable(1) [[ALLOC]], i1 noundef false) #[[ATTR11]], !range [[RNG0]]
; IS__TUNIT____-NEXT: ret i8 1 ; IS__TUNIT____-NEXT: ret i8 1
; IS__TUNIT____: f: ; IS__TUNIT____: f:
; IS__TUNIT____-NEXT: ret i8 0 ; IS__TUNIT____-NEXT: ret i8 0
; ;
; IS__CGSCC____: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@recursive_not_readnone_internal3 ; IS__CGSCC____-LABEL: define {{[^@]+}}@recursive_not_readnone_internal3
; IS__CGSCC____-SAME: (i8* noalias nocapture nofree nonnull readnone dereferenceable(1) [[PTR:%.*]], i1 [[C:%.*]]) #[[ATTR9]] { ; IS__CGSCC____-SAME: (i8* noalias nocapture nofree nonnull readnone dereferenceable(1) [[PTR:%.*]], i1 [[C:%.*]]) #[[ATTR5]] {
; IS__CGSCC____-NEXT: [[ALLOC:%.*]] = alloca i8, align 1 ; IS__CGSCC____-NEXT: [[ALLOC:%.*]] = alloca i8, align 1
; IS__CGSCC____-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]] ; IS__CGSCC____-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]]
; IS__CGSCC____: t: ; IS__CGSCC____: t:
; IS__CGSCC____-NEXT: [[TMP1:%.*]] = call i8 @recursive_not_readnone_internal3(i8* noalias nocapture nofree nonnull readnone dereferenceable(1) undef, i1 noundef false) #[[ATTR10]], !range [[RNG0]] ; IS__CGSCC____-NEXT: [[TMP1:%.*]] = call i8 @recursive_not_readnone_internal3(i8* noalias nocapture nofree nonnull readnone dereferenceable(1) undef, i1 noundef false) #[[ATTR11]], !range [[RNG0]]
; IS__CGSCC____-NEXT: ret i8 1 ; IS__CGSCC____-NEXT: ret i8 1
; IS__CGSCC____: f: ; IS__CGSCC____: f:
; IS__CGSCC____-NEXT: ret i8 0 ; IS__CGSCC____-NEXT: ret i8 0
; ;
%alloc = alloca i8 %alloc = alloca i8
br i1 %c, label %t, label %f br i1 %c, label %t, label %f
t: t:
call i8 @recursive_not_readnone_internal3(i8* %alloc, i1 false) call i8 @recursive_not_readnone_internal3(i8* %alloc, i1 false)
%r = load i8, i8* %alloc %r = load i8, i8* %alloc
ret i8 %r ret i8 %r
f: f:
store i8 1, i8* %ptr store i8 1, i8* %ptr
ret i8 0 ret i8 0
} }
define i8 @readnone_caller3(i1 %c) { define i8 @readnone_caller3(i1 %c) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone ; IS__TUNIT____: Function Attrs: nofree norecurse nosync nounwind readnone
; IS__TUNIT____-LABEL: define {{[^@]+}}@readnone_caller3 ; IS__TUNIT____-LABEL: define {{[^@]+}}@readnone_caller3
; IS__TUNIT____-SAME: (i1 [[C:%.*]]) #[[ATTR9]] { ; IS__TUNIT____-SAME: (i1 [[C:%.*]]) #[[ATTR9]] {
; IS__TUNIT____-NEXT: [[ALLOC:%.*]] = alloca i8, align 1 ; IS__TUNIT____-NEXT: [[ALLOC:%.*]] = alloca i8, align 1
; IS__TUNIT____-NEXT: [[R:%.*]] = call noundef i8 @recursive_not_readnone_internal3(i8* noalias nocapture nofree noundef nonnull writeonly dereferenceable(1) [[ALLOC]], i1 [[C]]) #[[ATTR10]], !range [[RNG0]] ; IS__TUNIT____-NEXT: [[R:%.*]] = call i8 @recursive_not_readnone_internal3(i8* noalias nocapture nofree noundef nonnull writeonly dereferenceable(1) [[ALLOC]], i1 [[C]]) #[[ATTR11]], !range [[RNG0]]
; IS__TUNIT____-NEXT: ret i8 [[R]] ; IS__TUNIT____-NEXT: ret i8 [[R]]
; ;
; IS__CGSCC____: Function Attrs: nofree nosync nounwind readnone ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@readnone_caller3 ; IS__CGSCC____-LABEL: define {{[^@]+}}@readnone_caller3
; IS__CGSCC____-SAME: (i1 [[C:%.*]]) #[[ATTR10]] { ; IS__CGSCC____-SAME: (i1 [[C:%.*]]) #[[ATTR5]] {
; IS__CGSCC____-NEXT: [[R:%.*]] = call noundef i8 @recursive_not_readnone_internal3(i8* noalias nocapture nofree nonnull readnone dereferenceable(1) undef, i1 [[C]]) #[[ATTR13]], !range [[RNG0]] ; IS__CGSCC____-NEXT: [[R:%.*]] = call noundef i8 @recursive_not_readnone_internal3(i8* noalias nocapture nofree nonnull readnone dereferenceable(1) undef, i1 [[C]]) #[[ATTR12]], !range [[RNG0]]
; IS__CGSCC____-NEXT: ret i8 [[R]] ; IS__CGSCC____-NEXT: ret i8 [[R]]
; ;
%alloc = alloca i8 %alloc = alloca i8
%r = call i8 @recursive_not_readnone_internal3(i8* %alloc, i1 %c) %r = call i8 @recursive_not_readnone_internal3(i8* %alloc, i1 %c)
ret i8 %r ret i8 %r
} }
define internal void @argmemonly_before_ipconstprop(i32* %p) argmemonly { define internal void @argmemonly_before_ipconstprop(i32* %p) argmemonly {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind willreturn writeonly
; IS__TUNIT____-LABEL: define {{[^@]+}}@argmemonly_before_ipconstprop
; IS__TUNIT____-SAME: () #[[ATTR6]] {
; IS__TUNIT____-NEXT: store i32 0, i32* @G, align 4
; IS__TUNIT____-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC____-LABEL: define {{[^@]+}}@argmemonly_before_ipconstprop ; IS__CGSCC____-LABEL: define {{[^@]+}}@argmemonly_before_ipconstprop
; IS__CGSCC____-SAME: () #[[ATTR6]] { ; IS__CGSCC____-SAME: () #[[ATTR6]] {
; IS__CGSCC____-NEXT: store i32 0, i32* @G, align 4 ; IS__CGSCC____-NEXT: store i32 0, i32* @G, align 4
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
store i32 0, i32* %p store i32 0, i32* %p
ret void ret void
} }
define void @argmemonky_caller() { define void @argmemonky_caller() {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind willreturn writeonly ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@argmemonky_caller ; CHECK-LABEL: define {{[^@]+}}@argmemonky_caller
; IS__TUNIT____-SAME: () #[[ATTR6]] { ; CHECK-SAME: () #[[ATTR5]] {
; IS__TUNIT____-NEXT: call void @argmemonly_before_ipconstprop() #[[ATTR6]] ; CHECK-NEXT: ret void
; IS__TUNIT____-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC____-LABEL: define {{[^@]+}}@argmemonky_caller
; IS__CGSCC____-SAME: () #[[ATTR6]] {
; IS__CGSCC____-NEXT: call void @argmemonly_before_ipconstprop() #[[ATTR11]]
; IS__CGSCC____-NEXT: ret void
; ;
call void @argmemonly_before_ipconstprop(i32* @G) call void @argmemonly_before_ipconstprop(i32* @G)
ret void ret void
} }
;. ;.
; IS__TUNIT____: attributes #[[ATTR0]] = { inaccessiblememonly } ; IS__TUNIT____: attributes #[[ATTR0]] = { inaccessiblememonly }
; IS__TUNIT____: attributes #[[ATTR1]] = { inaccessiblemem_or_argmemonly } ; IS__TUNIT____: attributes #[[ATTR1]] = { inaccessiblemem_or_argmemonly }
; IS__TUNIT____: attributes #[[ATTR2]] = { readnone } ; IS__TUNIT____: attributes #[[ATTR2]] = { readnone }
; IS__TUNIT____: attributes #[[ATTR3]] = { argmemonly } ; IS__TUNIT____: attributes #[[ATTR3]] = { argmemonly }
; IS__TUNIT____: attributes #[[ATTR4:[0-9]+]] = { argmemonly nofree nosync nounwind willreturn } ; IS__TUNIT____: attributes #[[ATTR4:[0-9]+]] = { argmemonly nofree nosync nounwind willreturn }
; IS__TUNIT____: attributes #[[ATTR5]] = { nofree nosync nounwind readnone willreturn } ; IS__TUNIT____: attributes #[[ATTR5]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__TUNIT____: attributes #[[ATTR6]] = { nofree nosync nounwind willreturn writeonly } ; IS__TUNIT____: attributes #[[ATTR6]] = { nofree norecurse nosync nounwind willreturn writeonly }
; IS__TUNIT____: attributes #[[ATTR7]] = { argmemonly nofree nosync nounwind willreturn writeonly } ; IS__TUNIT____: attributes #[[ATTR7]] = { argmemonly nofree norecurse nosync nounwind willreturn writeonly }
; IS__TUNIT____: attributes #[[ATTR8]] = { argmemonly nofree nosync nounwind writeonly } ; IS__TUNIT____: attributes #[[ATTR8]] = { argmemonly nofree nosync nounwind writeonly }
; IS__TUNIT____: attributes #[[ATTR9]] = { nofree nosync nounwind readnone } ; IS__TUNIT____: attributes #[[ATTR9]] = { nofree norecurse nosync nounwind readnone }
; IS__TUNIT____: attributes #[[ATTR10]] = { nofree nosync nounwind writeonly } ; IS__TUNIT____: attributes #[[ATTR10]] = { nofree nosync nounwind willreturn writeonly }
; IS__TUNIT____: attributes #[[ATTR11]] = { nofree nosync nounwind writeonly }
;. ;.
; IS__CGSCC____: attributes #[[ATTR0]] = { inaccessiblememonly } ; IS__CGSCC____: attributes #[[ATTR0]] = { inaccessiblememonly }
; IS__CGSCC____: attributes #[[ATTR1]] = { inaccessiblemem_or_argmemonly } ; IS__CGSCC____: attributes #[[ATTR1]] = { inaccessiblemem_or_argmemonly }
; IS__CGSCC____: attributes #[[ATTR2]] = { readnone } ; IS__CGSCC____: attributes #[[ATTR2]] = { readnone }
; IS__CGSCC____: attributes #[[ATTR3]] = { argmemonly } ; IS__CGSCC____: attributes #[[ATTR3]] = { argmemonly }
; IS__CGSCC____: attributes #[[ATTR4:[0-9]+]] = { argmemonly nofree nosync nounwind willreturn } ; IS__CGSCC____: attributes #[[ATTR4:[0-9]+]] = { argmemonly nofree nosync nounwind willreturn }
; IS__CGSCC____: attributes #[[ATTR5]] = { nofree norecurse nosync nounwind readnone willreturn } ; IS__CGSCC____: attributes #[[ATTR5]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__CGSCC____: attributes #[[ATTR6]] = { nofree norecurse nosync nounwind willreturn writeonly } ; IS__CGSCC____: attributes #[[ATTR6]] = { nofree norecurse nosync nounwind willreturn writeonly }
; IS__CGSCC____: attributes #[[ATTR7]] = { argmemonly nofree norecurse nosync nounwind willreturn writeonly } ; IS__CGSCC____: attributes #[[ATTR7]] = { argmemonly nofree norecurse nosync nounwind willreturn writeonly }
; IS__CGSCC____: attributes #[[ATTR8]] = { argmemonly nofree nosync nounwind writeonly } ; IS__CGSCC____: attributes #[[ATTR8]] = { argmemonly nofree nosync nounwind writeonly }
; IS__CGSCC____: attributes #[[ATTR9]] = { nofree nosync nounwind readnone willreturn } ; IS__CGSCC____: attributes #[[ATTR9]] = { nounwind willreturn writeonly }
; IS__CGSCC____: attributes #[[ATTR10]] = { nofree nosync nounwind readnone } ; IS__CGSCC____: attributes #[[ATTR10]] = { nofree nosync nounwind writeonly }
; IS__CGSCC____: attributes #[[ATTR11]] = { nounwind willreturn writeonly } ; IS__CGSCC____: attributes #[[ATTR11]] = { nofree nosync nounwind readnone }
; IS__CGSCC____: attributes #[[ATTR12]] = { nofree nosync nounwind writeonly } ; IS__CGSCC____: attributes #[[ATTR12]] = { norecurse nounwind readnone willreturn }
; IS__CGSCC____: attributes #[[ATTR13]] = { nounwind readnone willreturn }
;. ;.
; CHECK: [[META0:![0-9]+]] = !{i8 0, i8 2} ; CHECK: [[META0:![0-9]+]] = !{i8 0, i8 2}
;. ;.

llvm/test/Transforms/Attributor/misc.ll

Show First 20 Lines • Show All 89 Lines • ▼ Show 20 Linesentry:
%tmp1 = bitcast i32* %a to i8* %tmp1 = bitcast i32* %a to i8*
call void %fp(i8* %tmp1) call void %fp(i8* %tmp1)
call void @internal(void (i8*)* %fp) call void @internal(void (i8*)* %fp)
ret void ret void
} }
define internal void @foo(i32* %a) { define internal void @foo(i32* %a) {
; ;
; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind willreturn writeonly ; CHECK: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__TUNIT____-LABEL: define {{[^@]+}}@foo ; CHECK-LABEL: define {{[^@]+}}@foo
; IS__TUNIT____-SAME: (i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR0:[0-9]+]] { ; CHECK-SAME: (i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR0:[0-9]+]] {
; IS__TUNIT____-NEXT: entry: ; CHECK-NEXT: entry:
; IS__TUNIT____-NEXT: store i32 0, i32* [[A]], align 4 ; CHECK-NEXT: store i32 0, i32* [[A]], align 4
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC____-LABEL: define {{[^@]+}}@foo
; IS__CGSCC____-SAME: (i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR0:[0-9]+]] {
; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: store i32 0, i32* [[A]], align 4
; IS__CGSCC____-NEXT: ret void
; ;
entry: entry:
store i32 0, i32* %a store i32 0, i32* %a
ret void ret void
} }
declare void @callback1(void (i32*)*) declare void @callback1(void (i32*)*)
declare void @callback2(void (i8*)*) declare void @callback2(void (i8*)*)
;. ;.
; IS__TUNIT____: attributes #[[ATTR0]] = { argmemonly nofree nosync nounwind willreturn writeonly } ; IS__TUNIT____: attributes #[[ATTR0]] = { argmemonly nofree norecurse nosync nounwind willreturn writeonly }
; IS__TUNIT____: attributes #[[ATTR1]] = { nofree nosync nounwind willreturn writeonly } ; IS__TUNIT____: attributes #[[ATTR1]] = { nofree nosync nounwind willreturn writeonly }
;. ;.
; IS__CGSCC____: attributes #[[ATTR0]] = { argmemonly nofree norecurse nosync nounwind willreturn writeonly } ; IS__CGSCC____: attributes #[[ATTR0]] = { argmemonly nofree norecurse nosync nounwind willreturn writeonly }
; IS__CGSCC____: attributes #[[ATTR1]] = { nounwind willreturn writeonly } ; IS__CGSCC____: attributes #[[ATTR1]] = { nounwind willreturn writeonly }
;. ;.

llvm/test/Transforms/Attributor/misc_crash.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals
; RUN: opt -attributor -enable-new-pm=0 -S %s | FileCheck %s ; RUN: opt -attributor -enable-new-pm=0 -S %s | FileCheck %s
; RUN: opt -passes=attributor -S %s | FileCheck %s ; RUN: opt -passes=attributor -S %s | FileCheck %s
@var1 = internal global [1 x i32] undef @var1 = internal global [1 x i32] undef
@var2 = internal global i32 0 @var2 = internal global i32 0
;. ;.
; CHECK: @[[VAR1:[a-zA-Z0-9_$"\\.-]+]] = internal global [1 x i32] undef ; CHECK: @[[VAR1:[a-zA-Z0-9_$"\\.-]+]] = internal global [1 x i32] undef
; CHECK: @[[VAR2:[a-zA-Z0-9_$"\\.-]+]] = internal global i32 0 ; CHECK: @[[VAR2:[a-zA-Z0-9_$"\\.-]+]] = internal global i32 0
;. ;.
define i32 addrspace(1)* @foo(i32 addrspace(4)* %arg) { define i32 addrspace(1)* @foo(i32 addrspace(4)* %arg) {
; CHECK: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; CHECK-LABEL: define {{[^@]+}}@foo ; CHECK-LABEL: define {{[^@]+}}@foo
; CHECK-SAME: (i32 addrspace(4)* nofree readnone [[ARG:%.*]]) #[[ATTR0:[0-9]+]] { ; CHECK-SAME: (i32 addrspace(4)* nofree readnone [[ARG:%.*]]) #[[ATTR0:[0-9]+]] {
; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = addrspacecast i32 addrspace(4)* [[ARG]] to i32 addrspace(1)* ; CHECK-NEXT: [[TMP0:%.*]] = addrspacecast i32 addrspace(4)* [[ARG]] to i32 addrspace(1)*
; CHECK-NEXT: ret i32 addrspace(1)* [[TMP0]] ; CHECK-NEXT: ret i32 addrspace(1)* [[TMP0]]
; ;
entry: entry:
%0 = addrspacecast i32 addrspace(4)* %arg to i32 addrspace(1)* %0 = addrspacecast i32 addrspace(4)* %arg to i32 addrspace(1)*
ret i32 addrspace(1)* %0 ret i32 addrspace(1)* %0
} }
define i32* @func1() { define i32* @func1() {
; CHECK: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; CHECK-LABEL: define {{[^@]+}}@func1 ; CHECK-LABEL: define {{[^@]+}}@func1
; CHECK-SAME: () #[[ATTR0]] { ; CHECK-SAME: () #[[ATTR0]] {
; CHECK-NEXT: ret i32* getelementptr inbounds ([1 x i32], [1 x i32]* @var1, i32 0, i32 0) ; CHECK-NEXT: ret i32* getelementptr inbounds ([1 x i32], [1 x i32]* @var1, i32 0, i32 0)
; ;
%ptr = call i32* @func1a([1 x i32]* @var1) %ptr = call i32* @func1a([1 x i32]* @var1)
ret i32* %ptr ret i32* %ptr
} }
define internal i32* @func1a([1 x i32]* %arg) { define internal i32* @func1a([1 x i32]* %arg) {
%ptr = getelementptr inbounds [1 x i32], [1 x i32]* %arg, i64 0, i64 0 %ptr = getelementptr inbounds [1 x i32], [1 x i32]* %arg, i64 0, i64 0
ret i32* %ptr ret i32* %ptr
} }
define internal void @func2a(i32* %0) { define internal void @func2a(i32* %0) {
; CHECK: Function Attrs: nofree nosync nounwind willreturn writeonly ; CHECK: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly
; CHECK-LABEL: define {{[^@]+}}@func2a ; CHECK-LABEL: define {{[^@]+}}@func2a
; CHECK-SAME: (i32* nocapture nofree nonnull writeonly align 4 dereferenceable(4) [[TMP0:%.*]]) #[[ATTR1:[0-9]+]] { ; CHECK-SAME: (i32* nocapture nofree nonnull writeonly align 4 dereferenceable(4) [[TMP0:%.*]]) #[[ATTR1:[0-9]+]] {
; CHECK-NEXT: store i32 0, i32* @var2, align 4 ; CHECK-NEXT: store i32 0, i32* @var2, align 4
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
store i32 0, i32* %0 store i32 0, i32* %0
ret void ret void
} }
define i32 @func2() { define i32 @func2() {
; CHECK-LABEL: define {{[^@]+}}@func2() { ; CHECK: Function Attrs: norecurse
; CHECK-LABEL: define {{[^@]+}}@func2
; CHECK-SAME: () #[[ATTR2:[0-9]+]] {
; CHECK-NEXT: [[TMP1:%.*]] = tail call i32 (i32*, ...) bitcast (void (i32*)* @func2a to i32 (i32*, ...)*)(i32* nonnull align 4 dereferenceable(4) @var2) ; CHECK-NEXT: [[TMP1:%.*]] = tail call i32 (i32*, ...) bitcast (void (i32*)* @func2a to i32 (i32*, ...)*)(i32* nonnull align 4 dereferenceable(4) @var2)
; CHECK-NEXT: [[TMP2:%.*]] = load i32, i32* @var2, align 4 ; CHECK-NEXT: [[TMP2:%.*]] = load i32, i32* @var2, align 4
; CHECK-NEXT: ret i32 [[TMP2]] ; CHECK-NEXT: ret i32 [[TMP2]]
; ;
%1 = tail call i32 (i32*, ...) bitcast (void (i32*)* @func2a to i32 (i32*, ...)*)(i32* @var2) %1 = tail call i32 (i32*, ...) bitcast (void (i32*)* @func2a to i32 (i32*, ...)*)(i32* @var2)
%2 = load i32, i32* @var2 %2 = load i32, i32* @var2
ret i32 %2 ret i32 %2
} }
define i32 @func3(i1 %false) { define i32 @func3(i1 %false) {
; CHECK: Function Attrs: norecurse
; CHECK-LABEL: define {{[^@]+}}@func3 ; CHECK-LABEL: define {{[^@]+}}@func3
; CHECK-SAME: (i1 [[FALSE:%.*]]) { ; CHECK-SAME: (i1 [[FALSE:%.*]]) #[[ATTR2]] {
; CHECK-NEXT: [[TMP1:%.*]] = tail call i32 (i32*, ...) bitcast (void (i32*)* @func2a to i32 (i32*, ...)*)(i32* nonnull align 4 dereferenceable(4) @var2) ; CHECK-NEXT: [[TMP1:%.*]] = tail call i32 (i32*, ...) bitcast (void (i32*)* @func2a to i32 (i32*, ...)*)(i32* nonnull align 4 dereferenceable(4) @var2)
; CHECK-NEXT: br i1 [[FALSE]], label [[USE_BB:%.*]], label [[RET_BB:%.*]] ; CHECK-NEXT: br i1 [[FALSE]], label [[USE_BB:%.*]], label [[RET_BB:%.*]]
; CHECK: use_bb: ; CHECK: use_bb:
; CHECK-NEXT: ret i32 [[TMP1]] ; CHECK-NEXT: ret i32 [[TMP1]]
; CHECK: ret_bb: ; CHECK: ret_bb:
; CHECK-NEXT: [[TMP2:%.*]] = load i32, i32* @var2, align 4 ; CHECK-NEXT: [[TMP2:%.*]] = load i32, i32* @var2, align 4
; CHECK-NEXT: ret i32 [[TMP2]] ; CHECK-NEXT: ret i32 [[TMP2]]
; ;
Show All 28 Lines
block: block:
store i8* blockaddress(@func5, %block), i8** %tmp store i8* blockaddress(@func5, %block), i8** %tmp
%addr = load i8*, i8** %tmp %addr = load i8*, i8** %tmp
call void @func6(i8* %addr) call void @func6(i8* %addr)
ret void ret void
} }
define i16 @foo3() { define i16 @foo3() {
; CHECK-LABEL: define {{[^@]+}}@foo3() { ; CHECK: Function Attrs: norecurse
; CHECK-LABEL: define {{[^@]+}}@foo3
; CHECK-SAME: () #[[ATTR2]] {
; CHECK-NEXT: [[CALL:%.*]] = call i16 bitcast (i16 (i16*, i16)* @bar3 to i16 ()*)() ; CHECK-NEXT: [[CALL:%.*]] = call i16 bitcast (i16 (i16*, i16)* @bar3 to i16 ()*)()
; CHECK-NEXT: ret i16 [[CALL]] ; CHECK-NEXT: ret i16 [[CALL]]
; ;
%call = call i16 bitcast (i16 (i16*, i16) * @bar3 to i16 () *)() %call = call i16 bitcast (i16 (i16*, i16) * @bar3 to i16 () *)()
ret i16 %call ret i16 %call
} }
define internal i16 @bar3(i16* %p1, i16 %p2) { define internal i16 @bar3(i16* %p1, i16 %p2) {
; CHECK: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; CHECK-LABEL: define {{[^@]+}}@bar3 ; CHECK-LABEL: define {{[^@]+}}@bar3
; CHECK-SAME: (i16* nocapture nofree readnone [[P1:%.*]], i16 returned [[P2:%.*]]) #[[ATTR0]] { ; CHECK-SAME: (i16* nocapture nofree readnone [[P1:%.*]], i16 returned [[P2:%.*]]) #[[ATTR0]] {
; CHECK-NEXT: ret i16 [[P2]] ; CHECK-NEXT: ret i16 [[P2]]
; ;
ret i16 %p2 ret i16 %p2
} }
; CHECK-LABEL: declare {{[^@]+}}@func6 ; CHECK-LABEL: declare {{[^@]+}}@func6
; CHECK-SAME: (i8*) ; CHECK-SAME: (i8*)
declare void @func6(i8*) declare void @func6(i8*)
;. ;.
; CHECK: attributes #[[ATTR0]] = { nofree nosync nounwind readnone willreturn } ; CHECK: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn }
; CHECK: attributes #[[ATTR1]] = { nofree nosync nounwind willreturn writeonly } ; CHECK: attributes #[[ATTR1]] = { nofree norecurse nosync nounwind willreturn writeonly }
; CHECK: attributes #[[ATTR2]] = { norecurse }
;. ;.

llvm/test/Transforms/Attributor/noalias.ll

Show All 40 Lines
; CHECK-NEXT: [[TMP1:%.*]] = tail call noalias i8* @malloc(i64 noundef 4) ; CHECK-NEXT: [[TMP1:%.*]] = tail call noalias i8* @malloc(i64 noundef 4)
; CHECK-NEXT: ret i8* [[TMP1]] ; CHECK-NEXT: ret i8* [[TMP1]]
; ;
%1 = tail call noalias i8* @malloc(i64 4) %1 = tail call noalias i8* @malloc(i64 4)
ret i8* %1 ret i8* %1
} }
define void @nocapture(i8* %a){ define void @nocapture(i8* %a){
; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@nocapture ; CHECK-LABEL: define {{[^@]+}}@nocapture
; NOT_CGSCC_NPM-SAME: (i8* nocapture nofree readnone [[A:%.*]]) #[[ATTR0:[0-9]+]] { ; CHECK-SAME: (i8* nocapture nofree readnone [[A:%.*]]) #[[ATTR0:[0-9]+]] {
; NOT_CGSCC_NPM-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@nocapture
; IS__CGSCC____-SAME: (i8* nocapture nofree readnone [[A:%.*]]) #[[ATTR0:[0-9]+]] {
; IS__CGSCC____-NEXT: ret void
; ;
ret void ret void
} }
define i8* @return_noalias_looks_like_capture(){ define i8* @return_noalias_looks_like_capture(){
; CHECK-LABEL: define {{[^@]+}}@return_noalias_looks_like_capture() { ; CHECK-LABEL: define {{[^@]+}}@return_noalias_looks_like_capture() {
; CHECK-NEXT: [[TMP1:%.*]] = tail call noalias i8* @malloc(i64 noundef 4) ; CHECK-NEXT: [[TMP1:%.*]] = tail call noalias i8* @malloc(i64 noundef 4)
; CHECK-NEXT: ret i8* [[TMP1]] ; CHECK-NEXT: ret i8* [[TMP1]]
▲ Show 20 Lines • Show All 78 Lines • ▼ Show 20 Lines
} }
declare i8* @baz(...) nounwind uwtable declare i8* @baz(...) nounwind uwtable
; TEST 5 ; TEST 5
; Returning global pointer. Should not be noalias. ; Returning global pointer. Should not be noalias.
define i8** @getter() { define i8** @getter() {
; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@getter ; CHECK-LABEL: define {{[^@]+}}@getter
; NOT_CGSCC_NPM-SAME: () #[[ATTR0]] { ; CHECK-SAME: () #[[ATTR0]] {
; NOT_CGSCC_NPM-NEXT: ret i8** @G ; CHECK-NEXT: ret i8** @G
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@getter
; IS__CGSCC____-SAME: () #[[ATTR0]] {
; IS__CGSCC____-NEXT: ret i8** @G
; ;
ret i8** @G ret i8** @G
} }
; Returning global pointer. Should not be noalias. ; Returning global pointer. Should not be noalias.
define i8** @calle1(){ define i8** @calle1(){
; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@calle1 ; CHECK-LABEL: define {{[^@]+}}@calle1
; NOT_CGSCC_NPM-SAME: () #[[ATTR0]] { ; CHECK-SAME: () #[[ATTR0]] {
; NOT_CGSCC_NPM-NEXT: ret i8** @G ; CHECK-NEXT: ret i8** @G
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@calle1
; IS__CGSCC____-SAME: () #[[ATTR0]] {
; IS__CGSCC____-NEXT: ret i8** @G
; ;
%1 = call i8** @getter() %1 = call i8** @getter()
ret i8** %1 ret i8** %1
} }
; TEST 6 ; TEST 6
declare noalias i8* @strdup(i8* nocapture) nounwind declare noalias i8* @strdup(i8* nocapture) nounwind
▲ Show 20 Lines • Show All 328 Lines • ▼ Show 20 Lines;
%c2b = bitcast i16* %c1 to i8* %c2b = bitcast i16* %c1 to i8*
call void @use_i8_internal(i8* %c2a) call void @use_i8_internal(i8* %c2a)
call void @use_i8_internal(i8* %c2b) call void @use_i8_internal(i8* %c2b)
ret void ret void
} }
; TEST 14 i2p casts ; TEST 14 i2p casts
define internal i32 @p2i(i32* %arg) { define internal i32 @p2i(i32* %arg) {
; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@p2i ; CHECK-LABEL: define {{[^@]+}}@p2i
; NOT_CGSCC_NPM-SAME: (i32* noalias nofree readnone [[ARG:%.*]]) #[[ATTR0]] { ; CHECK-SAME: (i32* noalias nofree readnone [[ARG:%.*]]) #[[ATTR0]] {
; NOT_CGSCC_NPM-NEXT: [[P2I:%.*]] = ptrtoint i32* [[ARG]] to i32 ; CHECK-NEXT: [[P2I:%.*]] = ptrtoint i32* [[ARG]] to i32
; NOT_CGSCC_NPM-NEXT: ret i32 [[P2I]] ; CHECK-NEXT: ret i32 [[P2I]]
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@p2i
; IS__CGSCC____-SAME: (i32* noalias nofree readnone [[ARG:%.*]]) #[[ATTR0]] {
; IS__CGSCC____-NEXT: [[P2I:%.*]] = ptrtoint i32* [[ARG]] to i32
; IS__CGSCC____-NEXT: ret i32 [[P2I]]
; ;
%p2i = ptrtoint i32* %arg to i32 %p2i = ptrtoint i32* %arg to i32
ret i32 %p2i ret i32 %p2i
} }
define i32 @i2p(i32* %arg) { define i32 @i2p(i32* %arg) {
; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind readonly willreturn ; NOT_CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readonly willreturn
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@i2p ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@i2p
; NOT_CGSCC_NPM-SAME: (i32* nofree readonly [[ARG:%.*]]) #[[ATTR4:[0-9]+]] { ; NOT_CGSCC_NPM-SAME: (i32* nofree readonly [[ARG:%.*]]) #[[ATTR4:[0-9]+]] {
; NOT_CGSCC_NPM-NEXT: [[C:%.*]] = call i32 @p2i(i32* noalias nofree readnone [[ARG]]) #[[ATTR0]] ; NOT_CGSCC_NPM-NEXT: [[C:%.*]] = call i32 @p2i(i32* noalias nofree readnone [[ARG]]) #[[ATTR9:[0-9]+]]
; NOT_CGSCC_NPM-NEXT: [[I2P:%.*]] = inttoptr i32 [[C]] to i8* ; NOT_CGSCC_NPM-NEXT: [[I2P:%.*]] = inttoptr i32 [[C]] to i8*
; NOT_CGSCC_NPM-NEXT: [[BC:%.*]] = bitcast i8* [[I2P]] to i32* ; NOT_CGSCC_NPM-NEXT: [[BC:%.*]] = bitcast i8* [[I2P]] to i32*
; NOT_CGSCC_NPM-NEXT: [[CALL:%.*]] = call i32 @ret(i32* nocapture nofree readonly align 4 [[BC]]) #[[ATTR4]] ; NOT_CGSCC_NPM-NEXT: [[CALL:%.*]] = call i32 @ret(i32* nocapture nofree readonly align 4 [[BC]]) #[[ATTR10:[0-9]+]]
; NOT_CGSCC_NPM-NEXT: ret i32 [[CALL]] ; NOT_CGSCC_NPM-NEXT: ret i32 [[CALL]]
; ;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readonly willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readonly willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@i2p ; IS__CGSCC____-LABEL: define {{[^@]+}}@i2p
; IS__CGSCC____-SAME: (i32* nofree readonly [[ARG:%.*]]) #[[ATTR4:[0-9]+]] { ; IS__CGSCC____-SAME: (i32* nofree readonly [[ARG:%.*]]) #[[ATTR4:[0-9]+]] {
; IS__CGSCC____-NEXT: [[C:%.*]] = call i32 @p2i(i32* noalias nofree readnone [[ARG]]) #[[ATTR9:[0-9]+]] ; IS__CGSCC____-NEXT: [[C:%.*]] = call i32 @p2i(i32* noalias nofree readnone [[ARG]]) #[[ATTR9:[0-9]+]]
; IS__CGSCC____-NEXT: [[I2P:%.*]] = inttoptr i32 [[C]] to i8* ; IS__CGSCC____-NEXT: [[I2P:%.*]] = inttoptr i32 [[C]] to i8*
; IS__CGSCC____-NEXT: [[BC:%.*]] = bitcast i8* [[I2P]] to i32* ; IS__CGSCC____-NEXT: [[BC:%.*]] = bitcast i8* [[I2P]] to i32*
; IS__CGSCC____-NEXT: [[CALL:%.*]] = call i32 @ret(i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[BC]]) #[[ATTR10:[0-9]+]] ; IS__CGSCC____-NEXT: [[CALL:%.*]] = call i32 @ret(i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[BC]]) #[[ATTR10:[0-9]+]]
; IS__CGSCC____-NEXT: ret i32 [[CALL]] ; IS__CGSCC____-NEXT: ret i32 [[CALL]]
; ;
%c = call i32 @p2i(i32* %arg) %c = call i32 @p2i(i32* %arg)
%i2p = inttoptr i32 %c to i8* %i2p = inttoptr i32 %c to i8*
%bc = bitcast i8* %i2p to i32* %bc = bitcast i8* %i2p to i32*
%call = call i32 @ret(i32* %bc) %call = call i32 @ret(i32* %bc)
ret i32 %call ret i32 %call
} }
define internal i32 @ret(i32* %arg) { define internal i32 @ret(i32* %arg) {
; NOT_CGSCC_NPM: Function Attrs: argmemonly nofree nosync nounwind readonly willreturn ; CHECK: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@ret ; CHECK-LABEL: define {{[^@]+}}@ret
; NOT_CGSCC_NPM-SAME: (i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[ARG:%.*]]) #[[ATTR5:[0-9]+]] { ; CHECK-SAME: (i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[ARG:%.*]]) #[[ATTR5:[0-9]+]] {
; NOT_CGSCC_NPM-NEXT: [[L:%.*]] = load i32, i32* [[ARG]], align 4 ; CHECK-NEXT: [[L:%.*]] = load i32, i32* [[ARG]], align 4
; NOT_CGSCC_NPM-NEXT: ret i32 [[L]] ; CHECK-NEXT: ret i32 [[L]]
;
; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@ret
; IS__CGSCC____-SAME: (i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[ARG:%.*]]) #[[ATTR5:[0-9]+]] {
; IS__CGSCC____-NEXT: [[L:%.*]] = load i32, i32* [[ARG]], align 4
; IS__CGSCC____-NEXT: ret i32 [[L]]
; ;
%l = load i32, i32* %arg %l = load i32, i32* %arg
ret i32 %l ret i32 %l
} }
; Test to propagate noalias where value is assumed to be no-capture in all the ; Test to propagate noalias where value is assumed to be no-capture in all the
; uses possibly executed before this callsite. ; uses possibly executed before this callsite.
; IR referred from musl/src/strtod.c file ; IR referred from musl/src/strtod.c file
%struct._IO_FILE = type { i32, i8*, i8*, i32 (%struct._IO_FILE*)*, i8*, i8*, i8*, i8*, i32 (%struct._IO_FILE*, i8*, i32)*, i32 (%struct._IO_FILE*, i8*, i32)*, i64 (%struct._IO_FILE*, i64, i32)*, i8*, i32, %struct._IO_FILE*, %struct._IO_FILE*, i32, i32, i32, i16, i8, i8, i32, i32, i8*, i64, i8*, i8*, i8*, [4 x i8], i64, i64, %struct._IO_FILE*, %struct._IO_FILE*, %struct.__locale_struct*, [4 x i8] } %struct._IO_FILE = type { i32, i8*, i8*, i32 (%struct._IO_FILE*)*, i8*, i8*, i8*, i8*, i32 (%struct._IO_FILE*, i8*, i32)*, i32 (%struct._IO_FILE*, i8*, i32)*, i64 (%struct._IO_FILE*, i64, i32)*, i8*, i32, %struct._IO_FILE*, %struct._IO_FILE*, i32, i32, i32, i16, i8, i8, i32, i32, i8*, i64, i8*, i8*, i8*, [4 x i8], i64, i64, %struct._IO_FILE*, %struct._IO_FILE*, %struct.__locale_struct*, [4 x i8] }
%struct.__locale_struct = type { [6 x %struct.__locale_map*] } %struct.__locale_struct = type { [6 x %struct.__locale_map*] }
%struct.__locale_map = type opaque %struct.__locale_map = type opaque
; Function Attrs: nounwind optsize ; Function Attrs: nounwind optsize
define internal fastcc double @strtox(i8* %s, i8** %p, i32 %prec) unnamed_addr { define internal fastcc double @strtox(i8* %s, i8** %p, i32 %prec) unnamed_addr {
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@strtox ; CHECK-LABEL: define {{[^@]+}}@strtox
; NOT_CGSCC_NPM-SAME: (i8* [[S:%.*]]) unnamed_addr { ; CHECK-SAME: (i8* [[S:%.*]]) unnamed_addr {
; NOT_CGSCC_NPM-NEXT: entry: ; CHECK-NEXT: entry:
; NOT_CGSCC_NPM-NEXT: [[F:%.*]] = alloca [[STRUCT__IO_FILE:%.*]], align 8 ; CHECK-NEXT: [[F:%.*]] = alloca [[STRUCT__IO_FILE:%.*]], align 8
; NOT_CGSCC_NPM-NEXT: [[TMP0:%.*]] = bitcast %struct._IO_FILE* [[F]] to i8* ; CHECK-NEXT: [[TMP0:%.*]] = bitcast %struct._IO_FILE* [[F]] to i8*
; NOT_CGSCC_NPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 144, i8* nocapture nofree noundef nonnull align 8 dereferenceable(240) [[TMP0]]) #[[ATTR9:[0-9]+]] ; CHECK-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 144, i8* nocapture nofree noundef nonnull align 8 dereferenceable(240) [[TMP0]]) #[[ATTR11:[0-9]+]]
; NOT_CGSCC_NPM-NEXT: [[CALL:%.*]] = call i32 bitcast (i32 (...)* @sh_fromstring to i32 (%struct._IO_FILE*, i8*)*)(%struct._IO_FILE* nonnull align 8 dereferenceable(240) [[F]], i8* [[S]]) ; CHECK-NEXT: [[CALL:%.*]] = call i32 bitcast (i32 (...)* @sh_fromstring to i32 (%struct._IO_FILE*, i8*)*)(%struct._IO_FILE* nonnull align 8 dereferenceable(240) [[F]], i8* [[S]])
; NOT_CGSCC_NPM-NEXT: call void @__shlim(%struct._IO_FILE* noundef nonnull align 8 dereferenceable(240) [[F]], i64 noundef 0) ; CHECK-NEXT: call void @__shlim(%struct._IO_FILE* noundef nonnull align 8 dereferenceable(240) [[F]], i64 noundef 0)
; NOT_CGSCC_NPM-NEXT: [[CALL1:%.*]] = call double @__floatscan(%struct._IO_FILE* noundef nonnull align 8 dereferenceable(240) [[F]], i32 noundef 1, i32 noundef 1) ; CHECK-NEXT: [[CALL1:%.*]] = call double @__floatscan(%struct._IO_FILE* noundef nonnull align 8 dereferenceable(240) [[F]], i32 noundef 1, i32 noundef 1)
; NOT_CGSCC_NPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 144, i8* nocapture nofree noundef nonnull align 8 dereferenceable(240) [[TMP0]]) ; CHECK-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 144, i8* nocapture nofree noundef nonnull align 8 dereferenceable(240) [[TMP0]])
; NOT_CGSCC_NPM-NEXT: ret double [[CALL1]] ; CHECK-NEXT: ret double [[CALL1]]
;
; IS__CGSCC____-LABEL: define {{[^@]+}}@strtox
; IS__CGSCC____-SAME: (i8* [[S:%.*]]) unnamed_addr {
; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: [[F:%.*]] = alloca [[STRUCT__IO_FILE:%.*]], align 8
; IS__CGSCC____-NEXT: [[TMP0:%.*]] = bitcast %struct._IO_FILE* [[F]] to i8*
; IS__CGSCC____-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 144, i8* nocapture nofree noundef nonnull align 8 dereferenceable(240) [[TMP0]]) #[[ATTR11:[0-9]+]]
; IS__CGSCC____-NEXT: [[CALL:%.*]] = call i32 bitcast (i32 (...)* @sh_fromstring to i32 (%struct._IO_FILE*, i8*)*)(%struct._IO_FILE* nonnull align 8 dereferenceable(240) [[F]], i8* [[S]])
; IS__CGSCC____-NEXT: call void @__shlim(%struct._IO_FILE* noundef nonnull align 8 dereferenceable(240) [[F]], i64 noundef 0)
; IS__CGSCC____-NEXT: [[CALL1:%.*]] = call double @__floatscan(%struct._IO_FILE* noundef nonnull align 8 dereferenceable(240) [[F]], i32 noundef 1, i32 noundef 1)
; IS__CGSCC____-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 144, i8* nocapture nofree noundef nonnull align 8 dereferenceable(240) [[TMP0]])
; IS__CGSCC____-NEXT: ret double [[CALL1]]
; ;
entry: entry:
%f = alloca %struct._IO_FILE, align 8 %f = alloca %struct._IO_FILE, align 8
%0 = bitcast %struct._IO_FILE* %f to i8* %0 = bitcast %struct._IO_FILE* %f to i8*
call void @llvm.lifetime.start.p0i8(i64 144, i8* nonnull %0) call void @llvm.lifetime.start.p0i8(i64 144, i8* nonnull %0)
%call = call i32 bitcast (i32 (...)* @sh_fromstring to i32 (%struct._IO_FILE*, i8*)*)(%struct._IO_FILE* nonnull %f, i8* %s) %call = call i32 bitcast (i32 (...)* @sh_fromstring to i32 (%struct._IO_FILE*, i8*)*)(%struct._IO_FILE* nonnull %f, i8* %s)
call void @__shlim(%struct._IO_FILE* nonnull %f, i64 0) call void @__shlim(%struct._IO_FILE* nonnull %f, i64 0)
%call1 = call double @__floatscan(%struct._IO_FILE* nonnull %f, i32 %prec, i32 1) %call1 = call double @__floatscan(%struct._IO_FILE* nonnull %f, i32 %prec, i32 1)
Show All 31 Lines
declare void @llvm.lifetime.end.p0i8(i64 immarg, i8* nocapture) declare void @llvm.lifetime.end.p0i8(i64 immarg, i8* nocapture)
; Test 15 ; Test 15
; propagate noalias to some callsite arguments that there is no possibly reachable capture before it ; propagate noalias to some callsite arguments that there is no possibly reachable capture before it
@alias_of_p = external global i32* @alias_of_p = external global i32*
define void @make_alias(i32* %p) { define void @make_alias(i32* %p) {
; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn writeonly ; CHECK: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@make_alias ; CHECK-LABEL: define {{[^@]+}}@make_alias
; NOT_CGSCC_NPM-SAME: (i32* nofree writeonly [[P:%.*]]) #[[ATTR7:[0-9]+]] { ; CHECK-SAME: (i32* nofree writeonly [[P:%.*]]) #[[ATTR7:[0-9]+]] {
; NOT_CGSCC_NPM-NEXT: store i32* [[P]], i32** @alias_of_p, align 8 ; CHECK-NEXT: store i32* [[P]], i32** @alias_of_p, align 8
; NOT_CGSCC_NPM-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC____-LABEL: define {{[^@]+}}@make_alias
; IS__CGSCC____-SAME: (i32* nofree writeonly [[P:%.*]]) #[[ATTR7:[0-9]+]] {
; IS__CGSCC____-NEXT: store i32* [[P]], i32** @alias_of_p, align 8
; IS__CGSCC____-NEXT: ret void
; ;
store i32* %p, i32** @alias_of_p store i32* %p, i32** @alias_of_p
ret void ret void
} }
define void @only_store(i32* %p) { define void @only_store(i32* %p) {
; NOT_CGSCC_NPM: Function Attrs: argmemonly nofree nosync nounwind willreturn writeonly ; CHECK: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@only_store ; CHECK-LABEL: define {{[^@]+}}@only_store
; NOT_CGSCC_NPM-SAME: (i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[P:%.*]]) #[[ATTR8:[0-9]+]] { ; CHECK-SAME: (i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[P:%.*]]) #[[ATTR8:[0-9]+]] {
; NOT_CGSCC_NPM-NEXT: store i32 0, i32* [[P]], align 4 ; CHECK-NEXT: store i32 0, i32* [[P]], align 4
; NOT_CGSCC_NPM-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC____-LABEL: define {{[^@]+}}@only_store
; IS__CGSCC____-SAME: (i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[P:%.*]]) #[[ATTR8:[0-9]+]] {
; IS__CGSCC____-NEXT: store i32 0, i32* [[P]], align 4
; IS__CGSCC____-NEXT: ret void
; ;
store i32 0, i32* %p store i32 0, i32* %p
ret void ret void
} }
define void @test15_caller(i32* noalias %p, i32 %c) { define void @test15_caller(i32* noalias %p, i32 %c) {
; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn writeonly ; NOT_CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@test15_caller ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@test15_caller
; NOT_CGSCC_NPM-SAME: (i32* noalias nofree writeonly [[P:%.*]], i32 [[C:%.*]]) #[[ATTR7]] { ; NOT_CGSCC_NPM-SAME: (i32* noalias nofree writeonly [[P:%.*]], i32 [[C:%.*]]) #[[ATTR7]] {
; NOT_CGSCC_NPM-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[C]], 0 ; NOT_CGSCC_NPM-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[C]], 0
; NOT_CGSCC_NPM-NEXT: br i1 [[TOBOOL]], label [[IF_END:%.*]], label [[IF_THEN:%.*]] ; NOT_CGSCC_NPM-NEXT: br i1 [[TOBOOL]], label [[IF_END:%.*]], label [[IF_THEN:%.*]]
; NOT_CGSCC_NPM: if.then: ; NOT_CGSCC_NPM: if.then:
; NOT_CGSCC_NPM-NEXT: tail call void @only_store(i32* nocapture nofree writeonly align 4 [[P]]) #[[ATTR7]] ; NOT_CGSCC_NPM-NEXT: tail call void @only_store(i32* noalias nocapture nofree writeonly align 4 [[P]]) #[[ATTR12:[0-9]+]]
; NOT_CGSCC_NPM-NEXT: br label [[IF_END]] ; NOT_CGSCC_NPM-NEXT: br label [[IF_END]]
; NOT_CGSCC_NPM: if.end: ; NOT_CGSCC_NPM: if.end:
; NOT_CGSCC_NPM-NEXT: tail call void @make_alias(i32* nofree writeonly [[P]]) #[[ATTR7]] ; NOT_CGSCC_NPM-NEXT: tail call void @make_alias(i32* nofree writeonly [[P]]) #[[ATTR12]]
; NOT_CGSCC_NPM-NEXT: ret void ; NOT_CGSCC_NPM-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC____-LABEL: define {{[^@]+}}@test15_caller ; IS__CGSCC____-LABEL: define {{[^@]+}}@test15_caller
; IS__CGSCC____-SAME: (i32* noalias nofree writeonly [[P:%.*]], i32 [[C:%.*]]) #[[ATTR7]] { ; IS__CGSCC____-SAME: (i32* noalias nofree writeonly [[P:%.*]], i32 [[C:%.*]]) #[[ATTR7]] {
; IS__CGSCC____-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[C]], 0 ; IS__CGSCC____-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[C]], 0
; IS__CGSCC____-NEXT: br i1 [[TOBOOL]], label [[IF_END:%.*]], label [[IF_THEN:%.*]] ; IS__CGSCC____-NEXT: br i1 [[TOBOOL]], label [[IF_END:%.*]], label [[IF_THEN:%.*]]
; IS__CGSCC____: if.then: ; IS__CGSCC____: if.then:
Show All 31 Lines
; test16_sub(p, c, c); ; test16_sub(p, c, c);
; } ; }
; ;
; FIXME: this should be tail @only_store(i32* noalias %p) ; FIXME: this should be tail @only_store(i32* noalias %p)
; when test16_caller is called, c1 always equals to c2. (Note that linkage is internal) ; when test16_caller is called, c1 always equals to c2. (Note that linkage is internal)
; Therefore, only one of the two conditions of if statementes will be fulfilled. ; Therefore, only one of the two conditions of if statementes will be fulfilled.
define internal void @test16_sub(i32* noalias %p, i32 %c1, i32 %c2) { define internal void @test16_sub(i32* noalias %p, i32 %c1, i32 %c2) {
; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn writeonly ; NOT_CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@test16_sub ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@test16_sub
; NOT_CGSCC_NPM-SAME: (i32* noalias nofree writeonly [[P:%.*]], i32 [[C1:%.*]], i32 [[C2:%.*]]) #[[ATTR7]] { ; NOT_CGSCC_NPM-SAME: (i32* noalias nofree writeonly [[P:%.*]], i32 [[C1:%.*]], i32 [[C2:%.*]]) #[[ATTR7]] {
; NOT_CGSCC_NPM-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[C1]], 0 ; NOT_CGSCC_NPM-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[C1]], 0
; NOT_CGSCC_NPM-NEXT: br i1 [[TOBOOL]], label [[IF_END:%.*]], label [[IF_THEN:%.*]] ; NOT_CGSCC_NPM-NEXT: br i1 [[TOBOOL]], label [[IF_END:%.*]], label [[IF_THEN:%.*]]
; NOT_CGSCC_NPM: if.then: ; NOT_CGSCC_NPM: if.then:
; NOT_CGSCC_NPM-NEXT: tail call void @only_store(i32* nocapture nofree writeonly align 4 [[P]]) #[[ATTR7]] ; NOT_CGSCC_NPM-NEXT: tail call void @only_store(i32* noalias nocapture nofree writeonly align 4 [[P]]) #[[ATTR12]]
; NOT_CGSCC_NPM-NEXT: tail call void @make_alias(i32* nofree writeonly align 4 [[P]]) #[[ATTR7]] ; NOT_CGSCC_NPM-NEXT: tail call void @make_alias(i32* nofree writeonly align 4 [[P]]) #[[ATTR12]]
; NOT_CGSCC_NPM-NEXT: br label [[IF_END]] ; NOT_CGSCC_NPM-NEXT: br label [[IF_END]]
; NOT_CGSCC_NPM: if.end: ; NOT_CGSCC_NPM: if.end:
; NOT_CGSCC_NPM-NEXT: [[TOBOOL1:%.*]] = icmp eq i32 [[C2]], 0 ; NOT_CGSCC_NPM-NEXT: [[TOBOOL1:%.*]] = icmp eq i32 [[C2]], 0
; NOT_CGSCC_NPM-NEXT: br i1 [[TOBOOL1]], label [[IF_THEN2:%.*]], label [[IF_END3:%.*]] ; NOT_CGSCC_NPM-NEXT: br i1 [[TOBOOL1]], label [[IF_THEN2:%.*]], label [[IF_END3:%.*]]
; NOT_CGSCC_NPM: if.then2: ; NOT_CGSCC_NPM: if.then2:
; NOT_CGSCC_NPM-NEXT: tail call void @only_store(i32* nocapture nofree writeonly align 4 [[P]]) #[[ATTR7]] ; NOT_CGSCC_NPM-NEXT: tail call void @only_store(i32* nocapture nofree writeonly align 4 [[P]]) #[[ATTR12]]
; NOT_CGSCC_NPM-NEXT: br label [[IF_END3]] ; NOT_CGSCC_NPM-NEXT: br label [[IF_END3]]
; NOT_CGSCC_NPM: if.end3: ; NOT_CGSCC_NPM: if.end3:
; NOT_CGSCC_NPM-NEXT: ret void ; NOT_CGSCC_NPM-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC____-LABEL: define {{[^@]+}}@test16_sub ; IS__CGSCC____-LABEL: define {{[^@]+}}@test16_sub
; IS__CGSCC____-SAME: (i32* noalias nofree writeonly [[P:%.*]], i32 [[C1:%.*]], i32 [[C2:%.*]]) #[[ATTR7]] { ; IS__CGSCC____-SAME: (i32* noalias nofree writeonly [[P:%.*]], i32 [[C1:%.*]], i32 [[C2:%.*]]) #[[ATTR7]] {
; IS__CGSCC____-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[C1]], 0 ; IS__CGSCC____-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[C1]], 0
Show All 27 Linesif.then2:
tail call void @only_store(i32* %p) tail call void @only_store(i32* %p)
br label %if.end3 br label %if.end3
if.end3: if.end3:
ret void ret void
} }
define void @test16_caller(i32* %p, i32 %c) { define void @test16_caller(i32* %p, i32 %c) {
; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn writeonly ; CHECK: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@test16_caller ; CHECK-LABEL: define {{[^@]+}}@test16_caller
; NOT_CGSCC_NPM-SAME: (i32* nofree writeonly [[P:%.*]], i32 [[C:%.*]]) #[[ATTR7]] { ; CHECK-SAME: (i32* nofree writeonly [[P:%.*]], i32 [[C:%.*]]) #[[ATTR7]] {
; NOT_CGSCC_NPM-NEXT: tail call void @test16_sub(i32* noalias nofree writeonly [[P]], i32 [[C]], i32 [[C]]) #[[ATTR7]] ; CHECK-NEXT: tail call void @test16_sub(i32* noalias nofree writeonly [[P]], i32 [[C]], i32 [[C]]) #[[ATTR12:[0-9]+]]
; NOT_CGSCC_NPM-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC____-LABEL: define {{[^@]+}}@test16_caller
; IS__CGSCC____-SAME: (i32* nofree writeonly [[P:%.*]], i32 [[C:%.*]]) #[[ATTR7]] {
; IS__CGSCC____-NEXT: tail call void @test16_sub(i32* noalias nofree writeonly [[P]], i32 [[C]], i32 [[C]]) #[[ATTR12]]
; IS__CGSCC____-NEXT: ret void
; ;
tail call void @test16_sub(i32* %p, i32 %c, i32 %c) tail call void @test16_sub(i32* %p, i32 %c, i32 %c)
ret void ret void
} }
; test 17 ; test 17
; ;
; only_store is not called after make_alias is called. ; only_store is not called after make_alias is called.
Show All 9 Lines
; } ; }
; l2: ; l2:
; only_store(p); ; only_store(p);
; l3: ; l3:
; return; ; return;
; } ; }
define void @test17_caller(i32* noalias %p, i32 %c) { define void @test17_caller(i32* noalias %p, i32 %c) {
; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn writeonly ; NOT_CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@test17_caller ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@test17_caller
; NOT_CGSCC_NPM-SAME: (i32* noalias nofree writeonly [[P:%.*]], i32 [[C:%.*]]) #[[ATTR7]] { ; NOT_CGSCC_NPM-SAME: (i32* noalias nofree writeonly [[P:%.*]], i32 [[C:%.*]]) #[[ATTR7]] {
; NOT_CGSCC_NPM-NEXT: entry: ; NOT_CGSCC_NPM-NEXT: entry:
; NOT_CGSCC_NPM-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[C]], 0 ; NOT_CGSCC_NPM-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[C]], 0
; NOT_CGSCC_NPM-NEXT: br i1 [[TOBOOL]], label [[L1:%.*]], label [[L2:%.*]] ; NOT_CGSCC_NPM-NEXT: br i1 [[TOBOOL]], label [[L1:%.*]], label [[L2:%.*]]
; NOT_CGSCC_NPM: l1: ; NOT_CGSCC_NPM: l1:
; NOT_CGSCC_NPM-NEXT: tail call void @make_alias(i32* nofree writeonly [[P]]) #[[ATTR7]] ; NOT_CGSCC_NPM-NEXT: tail call void @make_alias(i32* nofree writeonly [[P]]) #[[ATTR12]]
; NOT_CGSCC_NPM-NEXT: br label [[L3:%.*]] ; NOT_CGSCC_NPM-NEXT: br label [[L3:%.*]]
; NOT_CGSCC_NPM: l2: ; NOT_CGSCC_NPM: l2:
; NOT_CGSCC_NPM-NEXT: tail call void @only_store(i32* nocapture nofree writeonly align 4 [[P]]) #[[ATTR7]] ; NOT_CGSCC_NPM-NEXT: tail call void @only_store(i32* nocapture nofree writeonly align 4 [[P]]) #[[ATTR12]]
; NOT_CGSCC_NPM-NEXT: br label [[L3]] ; NOT_CGSCC_NPM-NEXT: br label [[L3]]
; NOT_CGSCC_NPM: l3: ; NOT_CGSCC_NPM: l3:
; NOT_CGSCC_NPM-NEXT: ret void ; NOT_CGSCC_NPM-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC____-LABEL: define {{[^@]+}}@test17_caller ; IS__CGSCC____-LABEL: define {{[^@]+}}@test17_caller
; IS__CGSCC____-SAME: (i32* noalias nofree writeonly [[P:%.*]], i32 [[C:%.*]]) #[[ATTR7]] { ; IS__CGSCC____-SAME: (i32* noalias nofree writeonly [[P:%.*]], i32 [[C:%.*]]) #[[ATTR7]] {
; IS__CGSCC____-NEXT: entry: ; IS__CGSCC____-NEXT: entry:
Show All 31 Lines
; make_alias(p); ; make_alias(p);
; noreturn(); ; noreturn();
; } ; }
; only_store(p); ; only_store(p);
; return; ; return;
; } ; }
define void @noreturn() { define void @noreturn() {
; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@noreturn ; CHECK-LABEL: define {{[^@]+}}@noreturn
; NOT_CGSCC_NPM-SAME: () #[[ATTR0]] { ; CHECK-SAME: () #[[ATTR0]] {
; NOT_CGSCC_NPM-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@noreturn
; IS__CGSCC____-SAME: () #[[ATTR0]] {
; IS__CGSCC____-NEXT: ret void
; ;
call void @noreturn() call void @noreturn()
ret void ret void
} }
define void @test18_caller(i32* noalias %p, i32 %c) { define void @test18_caller(i32* noalias %p, i32 %c) {
; NOT_CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn writeonly ; NOT_CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@test18_caller ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@test18_caller
; NOT_CGSCC_NPM-SAME: (i32* noalias nofree writeonly [[P:%.*]], i32 [[C:%.*]]) #[[ATTR7]] { ; NOT_CGSCC_NPM-SAME: (i32* noalias nofree writeonly [[P:%.*]], i32 [[C:%.*]]) #[[ATTR7]] {
; NOT_CGSCC_NPM-NEXT: entry: ; NOT_CGSCC_NPM-NEXT: entry:
; NOT_CGSCC_NPM-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[C]], 0 ; NOT_CGSCC_NPM-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[C]], 0
; NOT_CGSCC_NPM-NEXT: br i1 [[TOBOOL]], label [[L1:%.*]], label [[L2:%.*]] ; NOT_CGSCC_NPM-NEXT: br i1 [[TOBOOL]], label [[L1:%.*]], label [[L2:%.*]]
; NOT_CGSCC_NPM: l1: ; NOT_CGSCC_NPM: l1:
; NOT_CGSCC_NPM-NEXT: tail call void @make_alias(i32* nofree writeonly [[P]]) #[[ATTR7]] ; NOT_CGSCC_NPM-NEXT: tail call void @make_alias(i32* nofree writeonly [[P]]) #[[ATTR12]]
; NOT_CGSCC_NPM-NEXT: br label [[L2]] ; NOT_CGSCC_NPM-NEXT: br label [[L2]]
; NOT_CGSCC_NPM: l2: ; NOT_CGSCC_NPM: l2:
; NOT_CGSCC_NPM-NEXT: tail call void @only_store(i32* nocapture nofree writeonly align 4 [[P]]) #[[ATTR7]] ; NOT_CGSCC_NPM-NEXT: tail call void @only_store(i32* nocapture nofree writeonly align 4 [[P]]) #[[ATTR12]]
; NOT_CGSCC_NPM-NEXT: ret void ; NOT_CGSCC_NPM-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC____-LABEL: define {{[^@]+}}@test18_caller ; IS__CGSCC____-LABEL: define {{[^@]+}}@test18_caller
; IS__CGSCC____-SAME: (i32* noalias nofree nonnull writeonly align 4 dereferenceable(4) [[P:%.*]], i32 [[C:%.*]]) #[[ATTR7]] { ; IS__CGSCC____-SAME: (i32* noalias nofree nonnull writeonly align 4 dereferenceable(4) [[P:%.*]], i32 [[C:%.*]]) #[[ATTR7]] {
; IS__CGSCC____-NEXT: entry: ; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[C]], 0 ; IS__CGSCC____-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[C]], 0
; IS__CGSCC____-NEXT: br i1 [[TOBOOL]], label [[L1:%.*]], label [[L2:%.*]] ; IS__CGSCC____-NEXT: br i1 [[TOBOOL]], label [[L1:%.*]], label [[L2:%.*]]
Show All 13 Linesl1:
tail call void @noreturn() tail call void @noreturn()
br label %l2 br label %l2
l2: l2:
tail call void @only_store(i32* %p) tail call void @only_store(i32* %p)
ret void ret void
} }
;. ;.
; NOT_CGSCC_NPM: attributes #[[ATTR0]] = { nofree nosync nounwind readnone willreturn } ; NOT_CGSCC_NPM: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn }
; NOT_CGSCC_NPM: attributes #[[ATTR1]] = { nounwind uwtable } ; NOT_CGSCC_NPM: attributes #[[ATTR1]] = { nounwind uwtable }
; NOT_CGSCC_NPM: attributes #[[ATTR2]] = { nounwind } ; NOT_CGSCC_NPM: attributes #[[ATTR2]] = { nounwind }
; NOT_CGSCC_NPM: attributes #[[ATTR3]] = { nounwind ssp uwtable } ; NOT_CGSCC_NPM: attributes #[[ATTR3]] = { nounwind ssp uwtable }
; NOT_CGSCC_NPM: attributes #[[ATTR4]] = { nofree nosync nounwind readonly willreturn } ; NOT_CGSCC_NPM: attributes #[[ATTR4]] = { nofree norecurse nosync nounwind readonly willreturn }
; NOT_CGSCC_NPM: attributes #[[ATTR5]] = { argmemonly nofree nosync nounwind readonly willreturn } ; NOT_CGSCC_NPM: attributes #[[ATTR5]] = { argmemonly nofree norecurse nosync nounwind readonly willreturn }
; NOT_CGSCC_NPM: attributes #[[ATTR6:[0-9]+]] = { argmemonly nofree nosync nounwind willreturn } ; NOT_CGSCC_NPM: attributes #[[ATTR6:[0-9]+]] = { argmemonly nofree nosync nounwind willreturn }
; NOT_CGSCC_NPM: attributes #[[ATTR7]] = { nofree nosync nounwind willreturn writeonly } ; NOT_CGSCC_NPM: attributes #[[ATTR7]] = { nofree norecurse nosync nounwind willreturn writeonly }
; NOT_CGSCC_NPM: attributes #[[ATTR8]] = { argmemonly nofree nosync nounwind willreturn writeonly } ; NOT_CGSCC_NPM: attributes #[[ATTR8]] = { argmemonly nofree norecurse nosync nounwind willreturn writeonly }
; NOT_CGSCC_NPM: attributes #[[ATTR9]] = { willreturn } ; NOT_CGSCC_NPM: attributes #[[ATTR9]] = { nofree nosync nounwind readnone willreturn }
; NOT_CGSCC_NPM: attributes #[[ATTR10]] = { nofree nosync nounwind readonly willreturn }
; NOT_CGSCC_NPM: attributes #[[ATTR11]] = { willreturn }
; NOT_CGSCC_NPM: attributes #[[ATTR12]] = { nofree nosync nounwind willreturn writeonly }
;. ;.
; IS__CGSCC____: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn } ; IS__CGSCC____: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__CGSCC____: attributes #[[ATTR1]] = { nounwind uwtable } ; IS__CGSCC____: attributes #[[ATTR1]] = { nounwind uwtable }
; IS__CGSCC____: attributes #[[ATTR2]] = { nounwind } ; IS__CGSCC____: attributes #[[ATTR2]] = { nounwind }
; IS__CGSCC____: attributes #[[ATTR3]] = { nounwind ssp uwtable } ; IS__CGSCC____: attributes #[[ATTR3]] = { nounwind ssp uwtable }
; IS__CGSCC____: attributes #[[ATTR4]] = { nofree norecurse nosync nounwind readonly willreturn } ; IS__CGSCC____: attributes #[[ATTR4]] = { nofree norecurse nosync nounwind readonly willreturn }
; IS__CGSCC____: attributes #[[ATTR5]] = { argmemonly nofree norecurse nosync nounwind readonly willreturn } ; IS__CGSCC____: attributes #[[ATTR5]] = { argmemonly nofree norecurse nosync nounwind readonly willreturn }
; IS__CGSCC____: attributes #[[ATTR6:[0-9]+]] = { argmemonly nofree nosync nounwind willreturn } ; IS__CGSCC____: attributes #[[ATTR6:[0-9]+]] = { argmemonly nofree nosync nounwind willreturn }
; IS__CGSCC____: attributes #[[ATTR7]] = { nofree norecurse nosync nounwind willreturn writeonly } ; IS__CGSCC____: attributes #[[ATTR7]] = { nofree norecurse nosync nounwind willreturn writeonly }
; IS__CGSCC____: attributes #[[ATTR8]] = { argmemonly nofree norecurse nosync nounwind willreturn writeonly } ; IS__CGSCC____: attributes #[[ATTR8]] = { argmemonly nofree norecurse nosync nounwind willreturn writeonly }
; IS__CGSCC____: attributes #[[ATTR9]] = { readnone willreturn } ; IS__CGSCC____: attributes #[[ATTR9]] = { nounwind readnone willreturn }
; IS__CGSCC____: attributes #[[ATTR10]] = { readonly willreturn } ; IS__CGSCC____: attributes #[[ATTR10]] = { readonly willreturn }
; IS__CGSCC____: attributes #[[ATTR11]] = { willreturn } ; IS__CGSCC____: attributes #[[ATTR11]] = { willreturn }
; IS__CGSCC____: attributes #[[ATTR12]] = { nounwind willreturn writeonly } ; IS__CGSCC____: attributes #[[ATTR12]] = { nounwind willreturn writeonly }
;. ;.

llvm/test/Transforms/Attributor/nocapture-1.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals
; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=3 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM ; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=3 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=3 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=3 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM
; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM ; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM
@g = global i32* null ; <i32**> [#uses=1] @g = global i32* null ; <i32**> [#uses=1]
;. ;.
; CHECK: @[[G:[a-zA-Z0-9_$"\\.-]+]] = global i32* null ; CHECK: @[[G:[a-zA-Z0-9_$"\\.-]+]] = global i32* null
; CHECK: @[[LOOKUP_TABLE:[a-zA-Z0-9_$"\\.-]+]] = global [2 x i1] [i1 false, i1 true] ; CHECK: @[[LOOKUP_TABLE:[a-zA-Z0-9_$"\\.-]+]] = global [2 x i1] [i1 false, i1 true]
; CHECK: @[[G2:[a-zA-Z0-9_$"\\.-]+]] = global i8* null ; CHECK: @[[G2:[a-zA-Z0-9_$"\\.-]+]] = global i8* null
; CHECK: @[[G3:[a-zA-Z0-9_$"\\.-]+]] = global i8* null ; CHECK: @[[G3:[a-zA-Z0-9_$"\\.-]+]] = global i8* null
;. ;.
define i32* @c1(i32* %q) { define i32* @c1(i32* %q) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@c1 ; CHECK-LABEL: define {{[^@]+}}@c1
; IS__TUNIT____-SAME: (i32* nofree readnone returned "no-capture-maybe-returned" [[Q:%.*]]) #[[ATTR0:[0-9]+]] { ; CHECK-SAME: (i32* nofree readnone returned "no-capture-maybe-returned" [[Q:%.*]]) #[[ATTR0:[0-9]+]] {
; IS__TUNIT____-NEXT: ret i32* [[Q]] ; CHECK-NEXT: ret i32* [[Q]]
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@c1
; IS__CGSCC____-SAME: (i32* nofree readnone returned "no-capture-maybe-returned" [[Q:%.*]]) #[[ATTR0:[0-9]+]] {
; IS__CGSCC____-NEXT: ret i32* [[Q]]
; ;
ret i32* %q ret i32* %q
} }
; It would also be acceptable to mark %q as readnone. Update @c3 too. ; It would also be acceptable to mark %q as readnone. Update @c3 too.
define void @c2(i32* %q) { define void @c2(i32* %q) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind willreturn writeonly ; CHECK: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly
; IS__TUNIT____-LABEL: define {{[^@]+}}@c2 ; CHECK-LABEL: define {{[^@]+}}@c2
; IS__TUNIT____-SAME: (i32* nofree writeonly [[Q:%.*]]) #[[ATTR1:[0-9]+]] { ; CHECK-SAME: (i32* nofree writeonly [[Q:%.*]]) #[[ATTR1:[0-9]+]] {
; IS__TUNIT____-NEXT: store i32* [[Q]], i32** @g, align 8 ; CHECK-NEXT: store i32* [[Q]], i32** @g, align 8
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC____-LABEL: define {{[^@]+}}@c2
; IS__CGSCC____-SAME: (i32* nofree writeonly [[Q:%.*]]) #[[ATTR1:[0-9]+]] {
; IS__CGSCC____-NEXT: store i32* [[Q]], i32** @g, align 8
; IS__CGSCC____-NEXT: ret void
; ;
store i32* %q, i32** @g store i32* %q, i32** @g
ret void ret void
} }
define void @c3(i32* %q) { define void @c3(i32* %q) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind willreturn writeonly ; IS__TUNIT____: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly
; IS__TUNIT____-LABEL: define {{[^@]+}}@c3 ; IS__TUNIT____-LABEL: define {{[^@]+}}@c3
; IS__TUNIT____-SAME: (i32* nofree writeonly [[Q:%.*]]) #[[ATTR1]] { ; IS__TUNIT____-SAME: (i32* nofree writeonly [[Q:%.*]]) #[[ATTR1]] {
; IS__TUNIT____-NEXT: call void @c2(i32* nofree writeonly [[Q]]) #[[ATTR1]] ; IS__TUNIT____-NEXT: call void @c2(i32* nofree writeonly [[Q]]) #[[ATTR12:[0-9]+]]
; IS__TUNIT____-NEXT: ret void ; IS__TUNIT____-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC____-LABEL: define {{[^@]+}}@c3 ; IS__CGSCC____-LABEL: define {{[^@]+}}@c3
; IS__CGSCC____-SAME: (i32* nofree writeonly [[Q:%.*]]) #[[ATTR1]] { ; IS__CGSCC____-SAME: (i32* nofree writeonly [[Q:%.*]]) #[[ATTR1]] {
; IS__CGSCC____-NEXT: call void @c2(i32* nofree writeonly [[Q]]) #[[ATTR18:[0-9]+]] ; IS__CGSCC____-NEXT: call void @c2(i32* nofree writeonly [[Q]]) #[[ATTR18:[0-9]+]]
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
call void @c2(i32* %q) call void @c2(i32* %q)
ret void ret void
} }
define i1 @c4(i32* %q, i32 %bitno) { define i1 @c4(i32* %q, i32 %bitno) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@c4 ; CHECK-LABEL: define {{[^@]+}}@c4
; IS__TUNIT____-SAME: (i32* nofree readnone [[Q:%.*]], i32 [[BITNO:%.*]]) #[[ATTR0]] { ; CHECK-SAME: (i32* nofree readnone [[Q:%.*]], i32 [[BITNO:%.*]]) #[[ATTR0]] {
; IS__TUNIT____-NEXT: [[TMP:%.*]] = ptrtoint i32* [[Q]] to i32 ; CHECK-NEXT: [[TMP:%.*]] = ptrtoint i32* [[Q]] to i32
; IS__TUNIT____-NEXT: [[TMP2:%.*]] = lshr i32 [[TMP]], [[BITNO]] ; CHECK-NEXT: [[TMP2:%.*]] = lshr i32 [[TMP]], [[BITNO]]
; IS__TUNIT____-NEXT: [[BIT:%.*]] = trunc i32 [[TMP2]] to i1 ; CHECK-NEXT: [[BIT:%.*]] = trunc i32 [[TMP2]] to i1
; IS__TUNIT____-NEXT: br i1 [[BIT]], label [[L1:%.*]], label [[L0:%.*]] ; CHECK-NEXT: br i1 [[BIT]], label [[L1:%.*]], label [[L0:%.*]]
; IS__TUNIT____: l0: ; CHECK: l0:
; IS__TUNIT____-NEXT: ret i1 false ; CHECK-NEXT: ret i1 false
; IS__TUNIT____: l1: ; CHECK: l1:
; IS__TUNIT____-NEXT: ret i1 true ; CHECK-NEXT: ret i1 true
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@c4
; IS__CGSCC____-SAME: (i32* nofree readnone [[Q:%.*]], i32 [[BITNO:%.*]]) #[[ATTR0]] {
; IS__CGSCC____-NEXT: [[TMP:%.*]] = ptrtoint i32* [[Q]] to i32
; IS__CGSCC____-NEXT: [[TMP2:%.*]] = lshr i32 [[TMP]], [[BITNO]]
; IS__CGSCC____-NEXT: [[BIT:%.*]] = trunc i32 [[TMP2]] to i1
; IS__CGSCC____-NEXT: br i1 [[BIT]], label [[L1:%.*]], label [[L0:%.*]]
; IS__CGSCC____: l0:
; IS__CGSCC____-NEXT: ret i1 false
; IS__CGSCC____: l1:
; IS__CGSCC____-NEXT: ret i1 true
; ;
%tmp = ptrtoint i32* %q to i32 %tmp = ptrtoint i32* %q to i32
%tmp2 = lshr i32 %tmp, %bitno %tmp2 = lshr i32 %tmp, %bitno
%bit = trunc i32 %tmp2 to i1 %bit = trunc i32 %tmp2 to i1
br i1 %bit, label %l1, label %l0 br i1 %bit, label %l1, label %l0
l0: l0:
ret i1 0 ; escaping value not caught by def-use chaining. ret i1 0 ; escaping value not caught by def-use chaining.
l1: l1:
ret i1 1 ; escaping value not caught by def-use chaining. ret i1 1 ; escaping value not caught by def-use chaining.
} }
; c4b is c4 but without the escaping part ; c4b is c4 but without the escaping part
define i1 @c4b(i32* %q, i32 %bitno) { define i1 @c4b(i32* %q, i32 %bitno) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@c4b ; CHECK-LABEL: define {{[^@]+}}@c4b
; IS__TUNIT____-SAME: (i32* nocapture nofree readnone [[Q:%.*]], i32 [[BITNO:%.*]]) #[[ATTR0]] { ; CHECK-SAME: (i32* nocapture nofree readnone [[Q:%.*]], i32 [[BITNO:%.*]]) #[[ATTR0]] {
; IS__TUNIT____-NEXT: [[TMP:%.*]] = ptrtoint i32* [[Q]] to i32 ; CHECK-NEXT: [[TMP:%.*]] = ptrtoint i32* [[Q]] to i32
; IS__TUNIT____-NEXT: [[TMP2:%.*]] = lshr i32 [[TMP]], [[BITNO]] ; CHECK-NEXT: [[TMP2:%.*]] = lshr i32 [[TMP]], [[BITNO]]
; IS__TUNIT____-NEXT: [[BIT:%.*]] = trunc i32 [[TMP2]] to i1 ; CHECK-NEXT: [[BIT:%.*]] = trunc i32 [[TMP2]] to i1
; IS__TUNIT____-NEXT: br i1 [[BIT]], label [[L1:%.*]], label [[L0:%.*]] ; CHECK-NEXT: br i1 [[BIT]], label [[L1:%.*]], label [[L0:%.*]]
; IS__TUNIT____: l0: ; CHECK: l0:
; IS__TUNIT____-NEXT: ret i1 false ; CHECK-NEXT: ret i1 false
; IS__TUNIT____: l1: ; CHECK: l1:
; IS__TUNIT____-NEXT: ret i1 false ; CHECK-NEXT: ret i1 false
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@c4b
; IS__CGSCC____-SAME: (i32* nocapture nofree readnone [[Q:%.*]], i32 [[BITNO:%.*]]) #[[ATTR0]] {
; IS__CGSCC____-NEXT: [[TMP:%.*]] = ptrtoint i32* [[Q]] to i32
; IS__CGSCC____-NEXT: [[TMP2:%.*]] = lshr i32 [[TMP]], [[BITNO]]
; IS__CGSCC____-NEXT: [[BIT:%.*]] = trunc i32 [[TMP2]] to i1
; IS__CGSCC____-NEXT: br i1 [[BIT]], label [[L1:%.*]], label [[L0:%.*]]
; IS__CGSCC____: l0:
; IS__CGSCC____-NEXT: ret i1 false
; IS__CGSCC____: l1:
; IS__CGSCC____-NEXT: ret i1 false
; ;
%tmp = ptrtoint i32* %q to i32 %tmp = ptrtoint i32* %q to i32
%tmp2 = lshr i32 %tmp, %bitno %tmp2 = lshr i32 %tmp, %bitno
%bit = trunc i32 %tmp2 to i1 %bit = trunc i32 %tmp2 to i1
br i1 %bit, label %l1, label %l0 br i1 %bit, label %l1, label %l0
l0: l0:
ret i1 0 ; not escaping! ret i1 0 ; not escaping!
l1: l1:
ret i1 0 ; not escaping! ret i1 0 ; not escaping!
} }
@lookup_table = global [2 x i1] [ i1 0, i1 1 ] @lookup_table = global [2 x i1] [ i1 0, i1 1 ]
define i1 @c5(i32* %q, i32 %bitno) { define i1 @c5(i32* %q, i32 %bitno) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readonly willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readonly willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@c5 ; CHECK-LABEL: define {{[^@]+}}@c5
; IS__TUNIT____-SAME: (i32* nofree readonly [[Q:%.*]], i32 [[BITNO:%.*]]) #[[ATTR2:[0-9]+]] { ; CHECK-SAME: (i32* nofree readonly [[Q:%.*]], i32 [[BITNO:%.*]]) #[[ATTR2:[0-9]+]] {
; IS__TUNIT____-NEXT: [[TMP:%.*]] = ptrtoint i32* [[Q]] to i32 ; CHECK-NEXT: [[TMP:%.*]] = ptrtoint i32* [[Q]] to i32
; IS__TUNIT____-NEXT: [[TMP2:%.*]] = lshr i32 [[TMP]], [[BITNO]] ; CHECK-NEXT: [[TMP2:%.*]] = lshr i32 [[TMP]], [[BITNO]]
; IS__TUNIT____-NEXT: [[BIT:%.*]] = and i32 [[TMP2]], 1 ; CHECK-NEXT: [[BIT:%.*]] = and i32 [[TMP2]], 1
; IS__TUNIT____-NEXT: [[LOOKUP:%.*]] = getelementptr [2 x i1], [2 x i1]* @lookup_table, i32 0, i32 [[BIT]] ; CHECK-NEXT: [[LOOKUP:%.*]] = getelementptr [2 x i1], [2 x i1]* @lookup_table, i32 0, i32 [[BIT]]
; IS__TUNIT____-NEXT: [[VAL:%.*]] = load i1, i1* [[LOOKUP]], align 1 ; CHECK-NEXT: [[VAL:%.*]] = load i1, i1* [[LOOKUP]], align 1
; IS__TUNIT____-NEXT: ret i1 [[VAL]] ; CHECK-NEXT: ret i1 [[VAL]]
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readonly willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@c5
; IS__CGSCC____-SAME: (i32* nofree readonly [[Q:%.*]], i32 [[BITNO:%.*]]) #[[ATTR2:[0-9]+]] {
; IS__CGSCC____-NEXT: [[TMP:%.*]] = ptrtoint i32* [[Q]] to i32
; IS__CGSCC____-NEXT: [[TMP2:%.*]] = lshr i32 [[TMP]], [[BITNO]]
; IS__CGSCC____-NEXT: [[BIT:%.*]] = and i32 [[TMP2]], 1
; IS__CGSCC____-NEXT: [[LOOKUP:%.*]] = getelementptr [2 x i1], [2 x i1]* @lookup_table, i32 0, i32 [[BIT]]
; IS__CGSCC____-NEXT: [[VAL:%.*]] = load i1, i1* [[LOOKUP]], align 1
; IS__CGSCC____-NEXT: ret i1 [[VAL]]
; ;
%tmp = ptrtoint i32* %q to i32 %tmp = ptrtoint i32* %q to i32
%tmp2 = lshr i32 %tmp, %bitno %tmp2 = lshr i32 %tmp, %bitno
%bit = and i32 %tmp2, 1 %bit = and i32 %tmp2, 1
; subtle escape mechanism follows ; subtle escape mechanism follows
%lookup = getelementptr [2 x i1], [2 x i1]* @lookup_table, i32 0, i32 %bit %lookup = getelementptr [2 x i1], [2 x i1]* @lookup_table, i32 0, i32 %bit
%val = load i1, i1* %lookup %val = load i1, i1* %lookup
ret i1 %val ret i1 %val
Show All 22 Linesret1:
%exn = landingpad {i8*, i32} %exn = landingpad {i8*, i32}
cleanup cleanup
ret i1 1 ret i1 1
} }
declare i32 @__gxx_personality_v0(...) declare i32 @__gxx_personality_v0(...)
define i1* @lookup_bit(i32* %q, i32 %bitno) readnone nounwind { define i1* @lookup_bit(i32* %q, i32 %bitno) readnone nounwind {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@lookup_bit ; CHECK-LABEL: define {{[^@]+}}@lookup_bit
; IS__TUNIT____-SAME: (i32* nofree readnone [[Q:%.*]], i32 [[BITNO:%.*]]) #[[ATTR0]] { ; CHECK-SAME: (i32* nofree readnone [[Q:%.*]], i32 [[BITNO:%.*]]) #[[ATTR0]] {
; IS__TUNIT____-NEXT: [[TMP:%.*]] = ptrtoint i32* [[Q]] to i32 ; CHECK-NEXT: [[TMP:%.*]] = ptrtoint i32* [[Q]] to i32
; IS__TUNIT____-NEXT: [[TMP2:%.*]] = lshr i32 [[TMP]], [[BITNO]] ; CHECK-NEXT: [[TMP2:%.*]] = lshr i32 [[TMP]], [[BITNO]]
; IS__TUNIT____-NEXT: [[BIT:%.*]] = and i32 [[TMP2]], 1 ; CHECK-NEXT: [[BIT:%.*]] = and i32 [[TMP2]], 1
; IS__TUNIT____-NEXT: [[LOOKUP:%.*]] = getelementptr [2 x i1], [2 x i1]* @lookup_table, i32 0, i32 [[BIT]] ; CHECK-NEXT: [[LOOKUP:%.*]] = getelementptr [2 x i1], [2 x i1]* @lookup_table, i32 0, i32 [[BIT]]
; IS__TUNIT____-NEXT: ret i1* [[LOOKUP]] ; CHECK-NEXT: ret i1* [[LOOKUP]]
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@lookup_bit
; IS__CGSCC____-SAME: (i32* nofree readnone [[Q:%.*]], i32 [[BITNO:%.*]]) #[[ATTR0]] {
; IS__CGSCC____-NEXT: [[TMP:%.*]] = ptrtoint i32* [[Q]] to i32
; IS__CGSCC____-NEXT: [[TMP2:%.*]] = lshr i32 [[TMP]], [[BITNO]]
; IS__CGSCC____-NEXT: [[BIT:%.*]] = and i32 [[TMP2]], 1
; IS__CGSCC____-NEXT: [[LOOKUP:%.*]] = getelementptr [2 x i1], [2 x i1]* @lookup_table, i32 0, i32 [[BIT]]
; IS__CGSCC____-NEXT: ret i1* [[LOOKUP]]
; ;
%tmp = ptrtoint i32* %q to i32 %tmp = ptrtoint i32* %q to i32
%tmp2 = lshr i32 %tmp, %bitno %tmp2 = lshr i32 %tmp, %bitno
%bit = and i32 %tmp2, 1 %bit = and i32 %tmp2, 1
%lookup = getelementptr [2 x i1], [2 x i1]* @lookup_table, i32 0, i32 %bit %lookup = getelementptr [2 x i1], [2 x i1]* @lookup_table, i32 0, i32 %bit
ret i1* %lookup ret i1* %lookup
} }
define i1 @c7(i32* %q, i32 %bitno) { define i1 @c7(i32* %q, i32 %bitno) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readonly willreturn ; IS__TUNIT____: Function Attrs: nofree norecurse nosync nounwind readonly willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@c7 ; IS__TUNIT____-LABEL: define {{[^@]+}}@c7
; IS__TUNIT____-SAME: (i32* nofree readonly [[Q:%.*]], i32 [[BITNO:%.*]]) #[[ATTR2]] { ; IS__TUNIT____-SAME: (i32* nofree readonly [[Q:%.*]], i32 [[BITNO:%.*]]) #[[ATTR2]] {
; IS__TUNIT____-NEXT: [[PTR:%.*]] = call i1* @lookup_bit(i32* noalias nofree readnone [[Q]], i32 [[BITNO]]) #[[ATTR16:[0-9]+]] ; IS__TUNIT____-NEXT: [[PTR:%.*]] = call i1* @lookup_bit(i32* noalias nofree readnone [[Q]], i32 [[BITNO]]) #[[ATTR18:[0-9]+]]
; IS__TUNIT____-NEXT: [[VAL:%.*]] = load i1, i1* [[PTR]], align 1 ; IS__TUNIT____-NEXT: [[VAL:%.*]] = load i1, i1* [[PTR]], align 1
; IS__TUNIT____-NEXT: ret i1 [[VAL]] ; IS__TUNIT____-NEXT: ret i1 [[VAL]]
; ;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readonly willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readonly willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@c7 ; IS__CGSCC____-LABEL: define {{[^@]+}}@c7
; IS__CGSCC____-SAME: (i32* nofree readonly [[Q:%.*]], i32 [[BITNO:%.*]]) #[[ATTR2]] { ; IS__CGSCC____-SAME: (i32* nofree readonly [[Q:%.*]], i32 [[BITNO:%.*]]) #[[ATTR2]] {
; IS__CGSCC____-NEXT: [[PTR:%.*]] = call i1* @lookup_bit(i32* noalias nofree readnone [[Q]], i32 [[BITNO]]) #[[ATTR19:[0-9]+]] ; IS__CGSCC____-NEXT: [[PTR:%.*]] = call i1* @lookup_bit(i32* noalias nofree readnone [[Q]], i32 [[BITNO]]) #[[ATTR19:[0-9]+]]
; IS__CGSCC____-NEXT: [[VAL:%.*]] = load i1, i1* [[PTR]], align 1 ; IS__CGSCC____-NEXT: [[VAL:%.*]] = load i1, i1* [[PTR]], align 1
; IS__CGSCC____-NEXT: ret i1 [[VAL]] ; IS__CGSCC____-NEXT: ret i1 [[VAL]]
; ;
%ptr = call i1* @lookup_bit(i32* %q, i32 %bitno) %ptr = call i1* @lookup_bit(i32* %q, i32 %bitno)
%val = load i1, i1* %ptr %val = load i1, i1* %ptr
ret i1 %val ret i1 %val
} }
define i32 @nc1(i32* %q, i32* %p, i1 %b) { define i32 @nc1(i32* %q, i32* %p, i1 %b) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind willreturn ; IS__TUNIT____: Function Attrs: nofree norecurse nosync nounwind willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@nc1 ; IS__TUNIT____-LABEL: define {{[^@]+}}@nc1
; IS__TUNIT____-SAME: (i32* nofree [[Q:%.*]], i32* nocapture nofree [[P:%.*]], i1 [[B:%.*]]) #[[ATTR5:[0-9]+]] { ; IS__TUNIT____-SAME: (i32* nofree [[Q:%.*]], i32* nocapture nofree [[P:%.*]], i1 [[B:%.*]]) #[[ATTR5:[0-9]+]] {
; IS__TUNIT____-NEXT: e: ; IS__TUNIT____-NEXT: e:
; IS__TUNIT____-NEXT: br label [[L:%.*]] ; IS__TUNIT____-NEXT: br label [[L:%.*]]
; IS__TUNIT____: l: ; IS__TUNIT____: l:
; IS__TUNIT____-NEXT: [[Y:%.*]] = phi i32* [ [[Q]], [[E:%.*]] ] ; IS__TUNIT____-NEXT: [[Y:%.*]] = phi i32* [ [[Q]], [[E:%.*]] ]
; IS__TUNIT____-NEXT: [[TMP2:%.*]] = select i1 [[B]], i32* [[P]], i32* [[Y]] ; IS__TUNIT____-NEXT: [[TMP2:%.*]] = select i1 [[B]], i32* [[P]], i32* [[Y]]
; IS__TUNIT____-NEXT: [[VAL:%.*]] = load i32, i32* [[TMP2]], align 4 ; IS__TUNIT____-NEXT: [[VAL:%.*]] = load i32, i32* [[TMP2]], align 4
Show All 23 Linesl:
%tmp2 = select i1 %b, i32* %tmp, i32* %y %tmp2 = select i1 %b, i32* %tmp, i32* %y
%val = load i32, i32* %tmp2 ; <i32> [#uses=1] %val = load i32, i32* %tmp2 ; <i32> [#uses=1]
store i32 0, i32* %tmp store i32 0, i32* %tmp
store i32* %y, i32** @g store i32* %y, i32** @g
ret i32 %val ret i32 %val
} }
define i32 @nc1_addrspace(i32* %q, i32 addrspace(1)* %p, i1 %b) { define i32 @nc1_addrspace(i32* %q, i32 addrspace(1)* %p, i1 %b) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@nc1_addrspace ; CHECK-LABEL: define {{[^@]+}}@nc1_addrspace
; IS__TUNIT____-SAME: (i32* nofree [[Q:%.*]], i32 addrspace(1)* nocapture nofree [[P:%.*]], i1 [[B:%.*]]) #[[ATTR5]] { ; CHECK-SAME: (i32* nofree [[Q:%.*]], i32 addrspace(1)* nocapture nofree [[P:%.*]], i1 [[B:%.*]]) #[[ATTR5:[0-9]+]] {
; IS__TUNIT____-NEXT: e: ; CHECK-NEXT: e:
; IS__TUNIT____-NEXT: br label [[L:%.*]] ; CHECK-NEXT: br label [[L:%.*]]
; IS__TUNIT____: l: ; CHECK: l:
; IS__TUNIT____-NEXT: [[X:%.*]] = phi i32 addrspace(1)* [ [[P]], [[E:%.*]] ] ; CHECK-NEXT: [[X:%.*]] = phi i32 addrspace(1)* [ [[P]], [[E:%.*]] ]
; IS__TUNIT____-NEXT: [[Y:%.*]] = phi i32* [ [[Q]], [[E]] ] ; CHECK-NEXT: [[Y:%.*]] = phi i32* [ [[Q]], [[E]] ]
; IS__TUNIT____-NEXT: [[TMP:%.*]] = addrspacecast i32 addrspace(1)* [[X]] to i32* ; CHECK-NEXT: [[TMP:%.*]] = addrspacecast i32 addrspace(1)* [[X]] to i32*
; IS__TUNIT____-NEXT: [[TMP2:%.*]] = select i1 [[B]], i32* [[TMP]], i32* [[Y]] ; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[B]], i32* [[TMP]], i32* [[Y]]
; IS__TUNIT____-NEXT: [[VAL:%.*]] = load i32, i32* [[TMP2]], align 4 ; CHECK-NEXT: [[VAL:%.*]] = load i32, i32* [[TMP2]], align 4
; IS__TUNIT____-NEXT: store i32 0, i32* [[TMP]], align 4 ; CHECK-NEXT: store i32 0, i32* [[TMP]], align 4
; IS__TUNIT____-NEXT: store i32* [[Y]], i32** @g, align 8 ; CHECK-NEXT: store i32* [[Y]], i32** @g, align 8
; IS__TUNIT____-NEXT: ret i32 [[VAL]] ; CHECK-NEXT: ret i32 [[VAL]]
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@nc1_addrspace
; IS__CGSCC____-SAME: (i32* nofree [[Q:%.*]], i32 addrspace(1)* nocapture nofree [[P:%.*]], i1 [[B:%.*]]) #[[ATTR5]] {
; IS__CGSCC____-NEXT: e:
; IS__CGSCC____-NEXT: br label [[L:%.*]]
; IS__CGSCC____: l:
; IS__CGSCC____-NEXT: [[X:%.*]] = phi i32 addrspace(1)* [ [[P]], [[E:%.*]] ]
; IS__CGSCC____-NEXT: [[Y:%.*]] = phi i32* [ [[Q]], [[E]] ]
; IS__CGSCC____-NEXT: [[TMP:%.*]] = addrspacecast i32 addrspace(1)* [[X]] to i32*
; IS__CGSCC____-NEXT: [[TMP2:%.*]] = select i1 [[B]], i32* [[TMP]], i32* [[Y]]
; IS__CGSCC____-NEXT: [[VAL:%.*]] = load i32, i32* [[TMP2]], align 4
; IS__CGSCC____-NEXT: store i32 0, i32* [[TMP]], align 4
; IS__CGSCC____-NEXT: store i32* [[Y]], i32** @g, align 8
; IS__CGSCC____-NEXT: ret i32 [[VAL]]
; ;
e: e:
br label %l br label %l
l: l:
%x = phi i32 addrspace(1)* [ %p, %e ] %x = phi i32 addrspace(1)* [ %p, %e ]
%y = phi i32* [ %q, %e ] %y = phi i32* [ %q, %e ]
%tmp = addrspacecast i32 addrspace(1)* %x to i32* ; <i32*> [#uses=2] %tmp = addrspacecast i32 addrspace(1)* %x to i32* ; <i32*> [#uses=2]
%tmp2 = select i1 %b, i32* %tmp, i32* %y %tmp2 = select i1 %b, i32* %tmp, i32* %y
%val = load i32, i32* %tmp2 ; <i32> [#uses=1] %val = load i32, i32* %tmp2 ; <i32> [#uses=1]
store i32 0, i32* %tmp store i32 0, i32* %tmp
store i32* %y, i32** @g store i32* %y, i32** @g
ret i32 %val ret i32 %val
} }
define void @nc2(i32* %p, i32* %q) { define void @nc2(i32* %p, i32* %q) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind willreturn ; IS__TUNIT____: Function Attrs: nofree norecurse nosync nounwind willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@nc2 ; IS__TUNIT____-LABEL: define {{[^@]+}}@nc2
; IS__TUNIT____-SAME: (i32* nocapture nofree [[P:%.*]], i32* nofree [[Q:%.*]]) #[[ATTR5]] { ; IS__TUNIT____-SAME: (i32* nocapture nofree [[P:%.*]], i32* nofree [[Q:%.*]]) #[[ATTR5]] {
; IS__TUNIT____-NEXT: [[TMP1:%.*]] = call i32 @nc1(i32* nofree [[Q]], i32* nocapture nofree [[P]], i1 noundef false) #[[ATTR5]] ; IS__TUNIT____-NEXT: [[TMP1:%.*]] = call i32 @nc1(i32* nofree [[Q]], i32* nocapture nofree [[P]], i1 noundef false) #[[ATTR10:[0-9]+]]
; IS__TUNIT____-NEXT: ret void ; IS__TUNIT____-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@nc2 ; IS__CGSCC____-LABEL: define {{[^@]+}}@nc2
; IS__CGSCC____-SAME: (i32* nocapture nofree align 4 [[P:%.*]], i32* nofree [[Q:%.*]]) #[[ATTR5]] { ; IS__CGSCC____-SAME: (i32* nocapture nofree align 4 [[P:%.*]], i32* nofree [[Q:%.*]]) #[[ATTR5]] {
; IS__CGSCC____-NEXT: [[TMP1:%.*]] = call i32 @nc1(i32* nofree [[Q]], i32* nocapture nofree align 4 [[P]], i1 noundef false) #[[ATTR15:[0-9]+]] ; IS__CGSCC____-NEXT: [[TMP1:%.*]] = call i32 @nc1(i32* nofree [[Q]], i32* nocapture nofree align 4 [[P]], i1 noundef false) #[[ATTR15:[0-9]+]]
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
Show All 14 Lines
; The following test is tricky because improvements to AAIsDead can cause the call to be removed. ; The following test is tricky because improvements to AAIsDead can cause the call to be removed.
; FIXME: readonly and nocapture missing on the pointer. ; FIXME: readonly and nocapture missing on the pointer.
declare void @external(i8* readonly) nounwind argmemonly declare void @external(i8* readonly) nounwind argmemonly
define void @nc4(i8* %p) { define void @nc4(i8* %p) {
; IS__TUNIT____: Function Attrs: argmemonly nounwind ; IS__TUNIT____: Function Attrs: argmemonly nounwind
; IS__TUNIT____-LABEL: define {{[^@]+}}@nc4 ; IS__TUNIT____-LABEL: define {{[^@]+}}@nc4
; IS__TUNIT____-SAME: (i8* [[P:%.*]]) #[[ATTR6:[0-9]+]] { ; IS__TUNIT____-SAME: (i8* [[P:%.*]]) #[[ATTR6:[0-9]+]] {
; IS__TUNIT____-NEXT: call void @external(i8* readonly [[P]]) #[[ATTR17:[0-9]+]] ; IS__TUNIT____-NEXT: call void @external(i8* readonly [[P]]) #[[ATTR19:[0-9]+]]
; IS__TUNIT____-NEXT: ret void ; IS__TUNIT____-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: argmemonly nounwind ; IS__CGSCC____: Function Attrs: argmemonly nounwind
; IS__CGSCC____-LABEL: define {{[^@]+}}@nc4 ; IS__CGSCC____-LABEL: define {{[^@]+}}@nc4
; IS__CGSCC____-SAME: (i8* [[P:%.*]]) #[[ATTR6:[0-9]+]] { ; IS__CGSCC____-SAME: (i8* [[P:%.*]]) #[[ATTR6:[0-9]+]] {
; IS__CGSCC____-NEXT: call void @external(i8* readonly [[P]]) #[[ATTR20:[0-9]+]] ; IS__CGSCC____-NEXT: call void @external(i8* readonly [[P]]) #[[ATTR20:[0-9]+]]
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
▲ Show 20 Lines • Show All 153 Lines • ▼ Show 20 Lines
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
call void (i8*, i8*, ...) @test6_1(i8* %x6_2, i8* %y6_2, i8* %z6_2) call void (i8*, i8*, ...) @test6_1(i8* %x6_2, i8* %y6_2, i8* %z6_2)
store i32* null, i32** @g store i32* null, i32** @g
ret void ret void
} }
define void @test_cmpxchg(i32* %p) { define void @test_cmpxchg(i32* %p) {
; IS__TUNIT____: Function Attrs: argmemonly nofree nounwind willreturn ; CHECK: Function Attrs: argmemonly nofree norecurse nounwind willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@test_cmpxchg ; CHECK-LABEL: define {{[^@]+}}@test_cmpxchg
; IS__TUNIT____-SAME: (i32* nocapture nofree noundef nonnull dereferenceable(4) [[P:%.*]]) #[[ATTR8:[0-9]+]] { ; CHECK-SAME: (i32* nocapture nofree noundef nonnull dereferenceable(4) [[P:%.*]]) #[[ATTR8:[0-9]+]] {
; IS__TUNIT____-NEXT: [[TMP1:%.*]] = cmpxchg i32* [[P]], i32 0, i32 1 acquire monotonic, align 4 ; CHECK-NEXT: [[TMP1:%.*]] = cmpxchg i32* [[P]], i32 0, i32 1 acquire monotonic, align 4
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@test_cmpxchg
; IS__CGSCC____-SAME: (i32* nocapture nofree noundef nonnull dereferenceable(4) [[P:%.*]]) #[[ATTR8:[0-9]+]] {
; IS__CGSCC____-NEXT: [[TMP1:%.*]] = cmpxchg i32* [[P]], i32 0, i32 1 acquire monotonic, align 4
; IS__CGSCC____-NEXT: ret void
; ;
cmpxchg i32* %p, i32 0, i32 1 acquire monotonic cmpxchg i32* %p, i32 0, i32 1 acquire monotonic
ret void ret void
} }
define void @test_cmpxchg_ptr(i32** %p, i32* %q) { define void @test_cmpxchg_ptr(i32** %p, i32* %q) {
; IS__TUNIT____: Function Attrs: argmemonly nofree nounwind willreturn ; CHECK: Function Attrs: argmemonly nofree norecurse nounwind willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@test_cmpxchg_ptr ; CHECK-LABEL: define {{[^@]+}}@test_cmpxchg_ptr
; IS__TUNIT____-SAME: (i32** nocapture nofree noundef nonnull dereferenceable(8) [[P:%.*]], i32* nofree [[Q:%.*]]) #[[ATTR8]] { ; CHECK-SAME: (i32** nocapture nofree noundef nonnull dereferenceable(8) [[P:%.*]], i32* nofree [[Q:%.*]]) #[[ATTR8]] {
; IS__TUNIT____-NEXT: [[TMP1:%.*]] = cmpxchg i32** [[P]], i32* null, i32* [[Q]] acquire monotonic, align 8 ; CHECK-NEXT: [[TMP1:%.*]] = cmpxchg i32** [[P]], i32* null, i32* [[Q]] acquire monotonic, align 8
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@test_cmpxchg_ptr
; IS__CGSCC____-SAME: (i32** nocapture nofree noundef nonnull dereferenceable(8) [[P:%.*]], i32* nofree [[Q:%.*]]) #[[ATTR8]] {
; IS__CGSCC____-NEXT: [[TMP1:%.*]] = cmpxchg i32** [[P]], i32* null, i32* [[Q]] acquire monotonic, align 8
; IS__CGSCC____-NEXT: ret void
; ;
cmpxchg i32** %p, i32* null, i32* %q acquire monotonic cmpxchg i32** %p, i32* null, i32* %q acquire monotonic
ret void ret void
} }
define void @test_atomicrmw(i32* %p) { define void @test_atomicrmw(i32* %p) {
; IS__TUNIT____: Function Attrs: argmemonly nofree nounwind willreturn ; CHECK: Function Attrs: argmemonly nofree norecurse nounwind willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@test_atomicrmw ; CHECK-LABEL: define {{[^@]+}}@test_atomicrmw
; IS__TUNIT____-SAME: (i32* nocapture nofree noundef nonnull dereferenceable(4) [[P:%.*]]) #[[ATTR8]] { ; CHECK-SAME: (i32* nocapture nofree noundef nonnull dereferenceable(4) [[P:%.*]]) #[[ATTR8]] {
; IS__TUNIT____-NEXT: [[TMP1:%.*]] = atomicrmw add i32* [[P]], i32 1 seq_cst, align 4 ; CHECK-NEXT: [[TMP1:%.*]] = atomicrmw add i32* [[P]], i32 1 seq_cst, align 4
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@test_atomicrmw
; IS__CGSCC____-SAME: (i32* nocapture nofree noundef nonnull dereferenceable(4) [[P:%.*]]) #[[ATTR8]] {
; IS__CGSCC____-NEXT: [[TMP1:%.*]] = atomicrmw add i32* [[P]], i32 1 seq_cst, align 4
; IS__CGSCC____-NEXT: ret void
; ;
atomicrmw add i32* %p, i32 1 seq_cst atomicrmw add i32* %p, i32 1 seq_cst
ret void ret void
} }
define void @test_volatile(i32* %x) { define void @test_volatile(i32* %x) {
; IS__TUNIT____: Function Attrs: argmemonly nofree nounwind willreturn ; CHECK: Function Attrs: argmemonly nofree norecurse nounwind willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@test_volatile ; CHECK-LABEL: define {{[^@]+}}@test_volatile
; IS__TUNIT____-SAME: (i32* nofree align 4 [[X:%.*]]) #[[ATTR8]] { ; CHECK-SAME: (i32* nofree align 4 [[X:%.*]]) #[[ATTR8]] {
; IS__TUNIT____-NEXT: entry: ; CHECK-NEXT: entry:
; IS__TUNIT____-NEXT: [[GEP:%.*]] = getelementptr i32, i32* [[X]], i64 1 ; CHECK-NEXT: [[GEP:%.*]] = getelementptr i32, i32* [[X]], i64 1
; IS__TUNIT____-NEXT: store volatile i32 0, i32* [[GEP]], align 4 ; CHECK-NEXT: store volatile i32 0, i32* [[GEP]], align 4
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@test_volatile
; IS__CGSCC____-SAME: (i32* nofree align 4 [[X:%.*]]) #[[ATTR8]] {
; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: [[GEP:%.*]] = getelementptr i32, i32* [[X]], i64 1
; IS__CGSCC____-NEXT: store volatile i32 0, i32* [[GEP]], align 4
; IS__CGSCC____-NEXT: ret void
; ;
entry: entry:
%gep = getelementptr i32, i32* %x, i64 1 %gep = getelementptr i32, i32* %x, i64 1
store volatile i32 0, i32* %gep, align 4 store volatile i32 0, i32* %gep, align 4
ret void ret void
} }
define void @nocaptureLaunder(i8* %p) { define void @nocaptureLaunder(i8* %p) {
; IS__TUNIT____: Function Attrs: inaccessiblemem_or_argmemonly nofree nosync nounwind willreturn ; IS__TUNIT____: Function Attrs: inaccessiblemem_or_argmemonly nofree nosync nounwind willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@nocaptureLaunder ; IS__TUNIT____-LABEL: define {{[^@]+}}@nocaptureLaunder
; IS__TUNIT____-SAME: (i8* nocapture nofree [[P:%.*]]) #[[ATTR9:[0-9]+]] { ; IS__TUNIT____-SAME: (i8* nocapture nofree [[P:%.*]]) #[[ATTR9:[0-9]+]] {
; IS__TUNIT____-NEXT: entry: ; IS__TUNIT____-NEXT: entry:
; IS__TUNIT____-NEXT: [[B:%.*]] = call i8* @llvm.launder.invariant.group.p0i8(i8* nofree [[P]]) #[[ATTR18:[0-9]+]] ; IS__TUNIT____-NEXT: [[B:%.*]] = call i8* @llvm.launder.invariant.group.p0i8(i8* nofree [[P]]) #[[ATTR20:[0-9]+]]
; IS__TUNIT____-NEXT: store i8 42, i8* [[B]], align 1 ; IS__TUNIT____-NEXT: store i8 42, i8* [[B]], align 1
; IS__TUNIT____-NEXT: ret void ; IS__TUNIT____-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: inaccessiblemem_or_argmemonly nofree nosync nounwind willreturn ; IS__CGSCC____: Function Attrs: inaccessiblemem_or_argmemonly nofree nosync nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@nocaptureLaunder ; IS__CGSCC____-LABEL: define {{[^@]+}}@nocaptureLaunder
; IS__CGSCC____-SAME: (i8* nocapture nofree [[P:%.*]]) #[[ATTR9:[0-9]+]] { ; IS__CGSCC____-SAME: (i8* nocapture nofree [[P:%.*]]) #[[ATTR9:[0-9]+]] {
; IS__CGSCC____-NEXT: entry: ; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: [[B:%.*]] = call i8* @llvm.launder.invariant.group.p0i8(i8* nofree [[P]]) #[[ATTR21:[0-9]+]] ; IS__CGSCC____-NEXT: [[B:%.*]] = call i8* @llvm.launder.invariant.group.p0i8(i8* nofree [[P]]) #[[ATTR21:[0-9]+]]
; IS__CGSCC____-NEXT: store i8 42, i8* [[B]], align 1 ; IS__CGSCC____-NEXT: store i8 42, i8* [[B]], align 1
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
entry: entry:
%b = call i8* @llvm.launder.invariant.group.p0i8(i8* %p) %b = call i8* @llvm.launder.invariant.group.p0i8(i8* %p)
store i8 42, i8* %b store i8 42, i8* %b
ret void ret void
} }
@g2 = global i8* null @g2 = global i8* null
define void @captureLaunder(i8* %p) { define void @captureLaunder(i8* %p) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind willreturn ; IS__TUNIT____: Function Attrs: nofree nosync nounwind willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@captureLaunder ; IS__TUNIT____-LABEL: define {{[^@]+}}@captureLaunder
; IS__TUNIT____-SAME: (i8* nofree [[P:%.*]]) #[[ATTR5]] { ; IS__TUNIT____-SAME: (i8* nofree [[P:%.*]]) #[[ATTR10]] {
; IS__TUNIT____-NEXT: [[B:%.*]] = call i8* @llvm.launder.invariant.group.p0i8(i8* nofree [[P]]) #[[ATTR18]] ; IS__TUNIT____-NEXT: [[B:%.*]] = call i8* @llvm.launder.invariant.group.p0i8(i8* nofree [[P]]) #[[ATTR20]]
; IS__TUNIT____-NEXT: store i8* [[B]], i8** @g2, align 8 ; IS__TUNIT____-NEXT: store i8* [[B]], i8** @g2, align 8
; IS__TUNIT____-NEXT: ret void ; IS__TUNIT____-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn ; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@captureLaunder ; IS__CGSCC____-LABEL: define {{[^@]+}}@captureLaunder
; IS__CGSCC____-SAME: (i8* nofree [[P:%.*]]) #[[ATTR10:[0-9]+]] { ; IS__CGSCC____-SAME: (i8* nofree [[P:%.*]]) #[[ATTR10:[0-9]+]] {
; IS__CGSCC____-NEXT: [[B:%.*]] = call i8* @llvm.launder.invariant.group.p0i8(i8* nofree [[P]]) #[[ATTR21]] ; IS__CGSCC____-NEXT: [[B:%.*]] = call i8* @llvm.launder.invariant.group.p0i8(i8* nofree [[P]]) #[[ATTR21]]
; IS__CGSCC____-NEXT: store i8* [[B]], i8** @g2, align 8 ; IS__CGSCC____-NEXT: store i8* [[B]], i8** @g2, align 8
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
%b = call i8* @llvm.launder.invariant.group.p0i8(i8* %p) %b = call i8* @llvm.launder.invariant.group.p0i8(i8* %p)
store i8* %b, i8** @g2 store i8* %b, i8** @g2
ret void ret void
} }
define void @nocaptureStrip(i8* %p) { define void @nocaptureStrip(i8* %p) {
; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind willreturn writeonly ; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind willreturn writeonly
; IS__TUNIT____-LABEL: define {{[^@]+}}@nocaptureStrip ; IS__TUNIT____-LABEL: define {{[^@]+}}@nocaptureStrip
; IS__TUNIT____-SAME: (i8* nocapture nofree writeonly [[P:%.*]]) #[[ATTR10:[0-9]+]] { ; IS__TUNIT____-SAME: (i8* nocapture nofree writeonly [[P:%.*]]) #[[ATTR11:[0-9]+]] {
; IS__TUNIT____-NEXT: entry: ; IS__TUNIT____-NEXT: entry:
; IS__TUNIT____-NEXT: [[B:%.*]] = call i8* @llvm.strip.invariant.group.p0i8(i8* noalias nofree readnone [[P]]) #[[ATTR19:[0-9]+]] ; IS__TUNIT____-NEXT: [[B:%.*]] = call i8* @llvm.strip.invariant.group.p0i8(i8* noalias nofree readnone [[P]]) #[[ATTR21:[0-9]+]]
; IS__TUNIT____-NEXT: store i8 42, i8* [[B]], align 1 ; IS__TUNIT____-NEXT: store i8 42, i8* [[B]], align 1
; IS__TUNIT____-NEXT: ret void ; IS__TUNIT____-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: argmemonly nofree nosync nounwind willreturn writeonly ; IS__CGSCC____: Function Attrs: argmemonly nofree nosync nounwind willreturn writeonly
; IS__CGSCC____-LABEL: define {{[^@]+}}@nocaptureStrip ; IS__CGSCC____-LABEL: define {{[^@]+}}@nocaptureStrip
; IS__CGSCC____-SAME: (i8* nocapture nofree writeonly [[P:%.*]]) #[[ATTR11:[0-9]+]] { ; IS__CGSCC____-SAME: (i8* nocapture nofree writeonly [[P:%.*]]) #[[ATTR11:[0-9]+]] {
; IS__CGSCC____-NEXT: entry: ; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: [[B:%.*]] = call i8* @llvm.strip.invariant.group.p0i8(i8* noalias nofree readnone [[P]]) #[[ATTR19]] ; IS__CGSCC____-NEXT: [[B:%.*]] = call i8* @llvm.strip.invariant.group.p0i8(i8* noalias nofree readnone [[P]]) #[[ATTR19]]
; IS__CGSCC____-NEXT: store i8 42, i8* [[B]], align 1 ; IS__CGSCC____-NEXT: store i8 42, i8* [[B]], align 1
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
entry: entry:
%b = call i8* @llvm.strip.invariant.group.p0i8(i8* %p) %b = call i8* @llvm.strip.invariant.group.p0i8(i8* %p)
store i8 42, i8* %b store i8 42, i8* %b
ret void ret void
} }
@g3 = global i8* null @g3 = global i8* null
define void @captureStrip(i8* %p) { define void @captureStrip(i8* %p) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind willreturn writeonly ; IS__TUNIT____: Function Attrs: nofree nosync nounwind willreturn writeonly
; IS__TUNIT____-LABEL: define {{[^@]+}}@captureStrip ; IS__TUNIT____-LABEL: define {{[^@]+}}@captureStrip
; IS__TUNIT____-SAME: (i8* nofree writeonly [[P:%.*]]) #[[ATTR1]] { ; IS__TUNIT____-SAME: (i8* nofree writeonly [[P:%.*]]) #[[ATTR12]] {
; IS__TUNIT____-NEXT: [[B:%.*]] = call i8* @llvm.strip.invariant.group.p0i8(i8* noalias nofree readnone [[P]]) #[[ATTR19]] ; IS__TUNIT____-NEXT: [[B:%.*]] = call i8* @llvm.strip.invariant.group.p0i8(i8* noalias nofree readnone [[P]]) #[[ATTR21]]
; IS__TUNIT____-NEXT: store i8* [[B]], i8** @g3, align 8 ; IS__TUNIT____-NEXT: store i8* [[B]], i8** @g3, align 8
; IS__TUNIT____-NEXT: ret void ; IS__TUNIT____-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn writeonly ; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn writeonly
; IS__CGSCC____-LABEL: define {{[^@]+}}@captureStrip ; IS__CGSCC____-LABEL: define {{[^@]+}}@captureStrip
; IS__CGSCC____-SAME: (i8* nofree writeonly [[P:%.*]]) #[[ATTR12:[0-9]+]] { ; IS__CGSCC____-SAME: (i8* nofree writeonly [[P:%.*]]) #[[ATTR12:[0-9]+]] {
; IS__CGSCC____-NEXT: [[B:%.*]] = call i8* @llvm.strip.invariant.group.p0i8(i8* noalias nofree readnone [[P]]) #[[ATTR19]] ; IS__CGSCC____-NEXT: [[B:%.*]] = call i8* @llvm.strip.invariant.group.p0i8(i8* noalias nofree readnone [[P]]) #[[ATTR19]]
; IS__CGSCC____-NEXT: store i8* [[B]], i8** @g3, align 8 ; IS__CGSCC____-NEXT: store i8* [[B]], i8** @g3, align 8
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
%b = call i8* @llvm.strip.invariant.group.p0i8(i8* %p) %b = call i8* @llvm.strip.invariant.group.p0i8(i8* %p)
store i8* %b, i8** @g3 store i8* %b, i8** @g3
ret void ret void
} }
define i1 @captureICmp(i32* %x) { define i1 @captureICmp(i32* %x) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@captureICmp ; CHECK-LABEL: define {{[^@]+}}@captureICmp
; IS__TUNIT____-SAME: (i32* nofree readnone [[X:%.*]]) #[[ATTR0]] { ; CHECK-SAME: (i32* nofree readnone [[X:%.*]]) #[[ATTR0]] {
; IS__TUNIT____-NEXT: [[TMP1:%.*]] = icmp eq i32* [[X]], null ; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i32* [[X]], null
; IS__TUNIT____-NEXT: ret i1 [[TMP1]] ; CHECK-NEXT: ret i1 [[TMP1]]
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@captureICmp
; IS__CGSCC____-SAME: (i32* nofree readnone [[X:%.*]]) #[[ATTR0]] {
; IS__CGSCC____-NEXT: [[TMP1:%.*]] = icmp eq i32* [[X]], null
; IS__CGSCC____-NEXT: ret i1 [[TMP1]]
; ;
%1 = icmp eq i32* %x, null %1 = icmp eq i32* %x, null
ret i1 %1 ret i1 %1
} }
define i1 @captureICmpRev(i32* %x) { define i1 @captureICmpRev(i32* %x) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@captureICmpRev ; CHECK-LABEL: define {{[^@]+}}@captureICmpRev
; IS__TUNIT____-SAME: (i32* nofree readnone [[X:%.*]]) #[[ATTR0]] { ; CHECK-SAME: (i32* nofree readnone [[X:%.*]]) #[[ATTR0]] {
; IS__TUNIT____-NEXT: [[TMP1:%.*]] = icmp eq i32* null, [[X]] ; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i32* null, [[X]]
; IS__TUNIT____-NEXT: ret i1 [[TMP1]] ; CHECK-NEXT: ret i1 [[TMP1]]
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@captureICmpRev
; IS__CGSCC____-SAME: (i32* nofree readnone [[X:%.*]]) #[[ATTR0]] {
; IS__CGSCC____-NEXT: [[TMP1:%.*]] = icmp eq i32* null, [[X]]
; IS__CGSCC____-NEXT: ret i1 [[TMP1]]
; ;
%1 = icmp eq i32* null, %x %1 = icmp eq i32* null, %x
ret i1 %1 ret i1 %1
} }
define i1 @nocaptureInboundsGEPICmp(i32* %x) { define i1 @nocaptureInboundsGEPICmp(i32* %x) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@nocaptureInboundsGEPICmp ; CHECK-LABEL: define {{[^@]+}}@nocaptureInboundsGEPICmp
; IS__TUNIT____-SAME: (i32* nocapture nofree readnone [[X:%.*]]) #[[ATTR0]] { ; CHECK-SAME: (i32* nocapture nofree readnone [[X:%.*]]) #[[ATTR0]] {
; IS__TUNIT____-NEXT: ret i1 false ; CHECK-NEXT: ret i1 false
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@nocaptureInboundsGEPICmp
; IS__CGSCC____-SAME: (i32* nocapture nofree readnone [[X:%.*]]) #[[ATTR0]] {
; IS__CGSCC____-NEXT: ret i1 false
; ;
%1 = getelementptr inbounds i32, i32* %x, i32 5 %1 = getelementptr inbounds i32, i32* %x, i32 5
%2 = bitcast i32* %1 to i8* %2 = bitcast i32* %1 to i8*
%3 = icmp eq i8* %2, null %3 = icmp eq i8* %2, null
ret i1 %3 ret i1 %3
} }
define i1 @nocaptureInboundsGEPICmpRev(i32* %x) { define i1 @nocaptureInboundsGEPICmpRev(i32* %x) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@nocaptureInboundsGEPICmpRev ; CHECK-LABEL: define {{[^@]+}}@nocaptureInboundsGEPICmpRev
; IS__TUNIT____-SAME: (i32* nocapture nofree readnone [[X:%.*]]) #[[ATTR0]] { ; CHECK-SAME: (i32* nocapture nofree readnone [[X:%.*]]) #[[ATTR0]] {
; IS__TUNIT____-NEXT: ret i1 true ; CHECK-NEXT: ret i1 true
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@nocaptureInboundsGEPICmpRev
; IS__CGSCC____-SAME: (i32* nocapture nofree readnone [[X:%.*]]) #[[ATTR0]] {
; IS__CGSCC____-NEXT: ret i1 true
; ;
%1 = getelementptr inbounds i32, i32* %x, i32 5 %1 = getelementptr inbounds i32, i32* %x, i32 5
%2 = bitcast i32* %1 to i8* %2 = bitcast i32* %1 to i8*
%3 = icmp ne i8* null, %2 %3 = icmp ne i8* null, %2
ret i1 %3 ret i1 %3
} }
define i1 @nocaptureDereferenceableOrNullICmp(i32* dereferenceable_or_null(4) %x) { define i1 @nocaptureDereferenceableOrNullICmp(i32* dereferenceable_or_null(4) %x) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@nocaptureDereferenceableOrNullICmp ; CHECK-LABEL: define {{[^@]+}}@nocaptureDereferenceableOrNullICmp
; IS__TUNIT____-SAME: (i32* nocapture nofree readnone dereferenceable_or_null(4) [[X:%.*]]) #[[ATTR0]] { ; CHECK-SAME: (i32* nocapture nofree readnone dereferenceable_or_null(4) [[X:%.*]]) #[[ATTR0]] {
; IS__TUNIT____-NEXT: [[TMP1:%.*]] = bitcast i32* [[X]] to i8* ; CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[X]] to i8*
; IS__TUNIT____-NEXT: [[TMP2:%.*]] = icmp eq i8* [[TMP1]], null ; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i8* [[TMP1]], null
; IS__TUNIT____-NEXT: ret i1 [[TMP2]] ; CHECK-NEXT: ret i1 [[TMP2]]
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@nocaptureDereferenceableOrNullICmp
; IS__CGSCC____-SAME: (i32* nocapture nofree readnone dereferenceable_or_null(4) [[X:%.*]]) #[[ATTR0]] {
; IS__CGSCC____-NEXT: [[TMP1:%.*]] = bitcast i32* [[X]] to i8*
; IS__CGSCC____-NEXT: [[TMP2:%.*]] = icmp eq i8* [[TMP1]], null
; IS__CGSCC____-NEXT: ret i1 [[TMP2]]
; ;
%1 = bitcast i32* %x to i8* %1 = bitcast i32* %x to i8*
%2 = icmp eq i8* %1, null %2 = icmp eq i8* %1, null
ret i1 %2 ret i1 %2
} }
define i1 @captureDereferenceableOrNullICmp(i32* dereferenceable_or_null(4) %x) null_pointer_is_valid { define i1 @captureDereferenceableOrNullICmp(i32* dereferenceable_or_null(4) %x) null_pointer_is_valid {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind null_pointer_is_valid readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind null_pointer_is_valid readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@captureDereferenceableOrNullICmp ; CHECK-LABEL: define {{[^@]+}}@captureDereferenceableOrNullICmp
; IS__TUNIT____-SAME: (i32* nofree readnone dereferenceable_or_null(4) [[X:%.*]]) #[[ATTR11:[0-9]+]] { ; CHECK-SAME: (i32* nofree readnone dereferenceable_or_null(4) [[X:%.*]]) #[[ATTR13:[0-9]+]] {
; IS__TUNIT____-NEXT: [[TMP1:%.*]] = bitcast i32* [[X]] to i8* ; CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[X]] to i8*
; IS__TUNIT____-NEXT: [[TMP2:%.*]] = icmp eq i8* [[TMP1]], null ; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i8* [[TMP1]], null
; IS__TUNIT____-NEXT: ret i1 [[TMP2]] ; CHECK-NEXT: ret i1 [[TMP2]]
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind null_pointer_is_valid readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@captureDereferenceableOrNullICmp
; IS__CGSCC____-SAME: (i32* nofree readnone dereferenceable_or_null(4) [[X:%.*]]) #[[ATTR13:[0-9]+]] {
; IS__CGSCC____-NEXT: [[TMP1:%.*]] = bitcast i32* [[X]] to i8*
; IS__CGSCC____-NEXT: [[TMP2:%.*]] = icmp eq i8* [[TMP1]], null
; IS__CGSCC____-NEXT: ret i1 [[TMP2]]
; ;
%1 = bitcast i32* %x to i8* %1 = bitcast i32* %x to i8*
%2 = icmp eq i8* %1, null %2 = icmp eq i8* %1, null
ret i1 %2 ret i1 %2
} }
declare void @unknown(i8*) declare void @unknown(i8*)
; We know that 'null' in AS 0 does not alias anything and cannot be captured. Though the latter is not qurried -> derived atm. ; We know that 'null' in AS 0 does not alias anything and cannot be captured. Though the latter is not qurried -> derived atm.
Show All 36 Lines
} }
declare i8* @maybe_returned_ptr(i8* readonly %ptr) readonly nounwind willreturn declare i8* @maybe_returned_ptr(i8* readonly %ptr) readonly nounwind willreturn
declare i8 @maybe_returned_val(i8* %ptr) readonly nounwind willreturn declare i8 @maybe_returned_val(i8* %ptr) readonly nounwind willreturn
declare void @val_use(i8 %ptr) readonly nounwind willreturn declare void @val_use(i8 %ptr) readonly nounwind willreturn
; FIXME: Both pointers should be nocapture ; FIXME: Both pointers should be nocapture
define void @ptr_uses(i8* %ptr, i8* %wptr) { define void @ptr_uses(i8* %ptr, i8* %wptr) {
; IS__TUNIT____: Function Attrs: nounwind willreturn ; CHECK: Function Attrs: nounwind willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@ptr_uses ; CHECK-LABEL: define {{[^@]+}}@ptr_uses
; IS__TUNIT____-SAME: (i8* [[PTR:%.*]], i8* nocapture nofree noundef nonnull writeonly dereferenceable(1) [[WPTR:%.*]]) #[[ATTR13:[0-9]+]] { ; CHECK-SAME: (i8* [[PTR:%.*]], i8* nocapture nofree noundef nonnull writeonly dereferenceable(1) [[WPTR:%.*]]) #[[ATTR15:[0-9]+]] {
; IS__TUNIT____-NEXT: store i8 0, i8* [[WPTR]], align 1 ; CHECK-NEXT: store i8 0, i8* [[WPTR]], align 1
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@ptr_uses
; IS__CGSCC____-SAME: (i8* [[PTR:%.*]], i8* nocapture nofree noundef nonnull writeonly dereferenceable(1) [[WPTR:%.*]]) #[[ATTR15]] {
; IS__CGSCC____-NEXT: store i8 0, i8* [[WPTR]], align 1
; IS__CGSCC____-NEXT: ret void
; ;
%call_ptr = call i8* @maybe_returned_ptr(i8* %ptr) %call_ptr = call i8* @maybe_returned_ptr(i8* %ptr)
%call_val = call i8 @maybe_returned_val(i8* %call_ptr) %call_val = call i8 @maybe_returned_val(i8* %call_ptr)
call void @val_use(i8 %call_val) call void @val_use(i8 %call_val)
store i8 0, i8* %wptr store i8 0, i8* %wptr
ret void ret void
} }
declare i8* @llvm.launder.invariant.group.p0i8(i8*) declare i8* @llvm.launder.invariant.group.p0i8(i8*)
declare i8* @llvm.strip.invariant.group.p0i8(i8*) declare i8* @llvm.strip.invariant.group.p0i8(i8*)
;. ;.
; IS__TUNIT____: attributes #[[ATTR0]] = { nofree nosync nounwind readnone willreturn } ; IS__TUNIT____: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__TUNIT____: attributes #[[ATTR1]] = { nofree nosync nounwind willreturn writeonly } ; IS__TUNIT____: attributes #[[ATTR1]] = { nofree norecurse nosync nounwind willreturn writeonly }
; IS__TUNIT____: attributes #[[ATTR2]] = { nofree nosync nounwind readonly willreturn } ; IS__TUNIT____: attributes #[[ATTR2]] = { nofree norecurse nosync nounwind readonly willreturn }
; IS__TUNIT____: attributes #[[ATTR3]] = { readonly } ; IS__TUNIT____: attributes #[[ATTR3]] = { readonly }
; IS__TUNIT____: attributes #[[ATTR4]] = { nounwind readonly } ; IS__TUNIT____: attributes #[[ATTR4]] = { nounwind readonly }
; IS__TUNIT____: attributes #[[ATTR5]] = { nofree nosync nounwind willreturn } ; IS__TUNIT____: attributes #[[ATTR5]] = { nofree norecurse nosync nounwind willreturn }
; IS__TUNIT____: attributes #[[ATTR6]] = { argmemonly nounwind } ; IS__TUNIT____: attributes #[[ATTR6]] = { argmemonly nounwind }
; IS__TUNIT____: attributes #[[ATTR7]] = { nofree nosync nounwind writeonly } ; IS__TUNIT____: attributes #[[ATTR7]] = { nofree nosync nounwind writeonly }
; IS__TUNIT____: attributes #[[ATTR8]] = { argmemonly nofree nounwind willreturn } ; IS__TUNIT____: attributes #[[ATTR8]] = { argmemonly nofree norecurse nounwind willreturn }
; IS__TUNIT____: attributes #[[ATTR9]] = { inaccessiblemem_or_argmemonly nofree nosync nounwind willreturn } ; IS__TUNIT____: attributes #[[ATTR9]] = { inaccessiblemem_or_argmemonly nofree nosync nounwind willreturn }
; IS__TUNIT____: attributes #[[ATTR10]] = { argmemonly nofree nosync nounwind willreturn writeonly } ; IS__TUNIT____: attributes #[[ATTR10]] = { nofree nosync nounwind willreturn }
; IS__TUNIT____: attributes #[[ATTR11]] = { nofree nosync nounwind null_pointer_is_valid readnone willreturn } ; IS__TUNIT____: attributes #[[ATTR11]] = { argmemonly nofree nosync nounwind willreturn writeonly }
; IS__TUNIT____: attributes #[[ATTR12:[0-9]+]] = { nounwind readonly willreturn } ; IS__TUNIT____: attributes #[[ATTR12]] = { nofree nosync nounwind willreturn writeonly }
; IS__TUNIT____: attributes #[[ATTR13]] = { nounwind willreturn } ; IS__TUNIT____: attributes #[[ATTR13]] = { nofree norecurse nosync nounwind null_pointer_is_valid readnone willreturn }
; IS__TUNIT____: attributes #[[ATTR14:[0-9]+]] = { inaccessiblememonly nofree nosync nounwind speculatable willreturn } ; IS__TUNIT____: attributes #[[ATTR14:[0-9]+]] = { nounwind readonly willreturn }
; IS__TUNIT____: attributes #[[ATTR15:[0-9]+]] = { nofree nosync nounwind readnone speculatable willreturn } ; IS__TUNIT____: attributes #[[ATTR15]] = { nounwind willreturn }
; IS__TUNIT____: attributes #[[ATTR16]] = { nofree nounwind readnone willreturn } ; IS__TUNIT____: attributes #[[ATTR16:[0-9]+]] = { inaccessiblememonly nofree nosync nounwind speculatable willreturn }
; IS__TUNIT____: attributes #[[ATTR17]] = { nounwind } ; IS__TUNIT____: attributes #[[ATTR17:[0-9]+]] = { nofree nosync nounwind readnone speculatable willreturn }
; IS__TUNIT____: attributes #[[ATTR18]] = { willreturn } ; IS__TUNIT____: attributes #[[ATTR18]] = { nofree nounwind readnone willreturn }
; IS__TUNIT____: attributes #[[ATTR19]] = { readnone willreturn } ; IS__TUNIT____: attributes #[[ATTR19]] = { nounwind }
; IS__TUNIT____: attributes #[[ATTR20]] = { willreturn }
; IS__TUNIT____: attributes #[[ATTR21]] = { readnone willreturn }
;. ;.
; IS__CGSCC____: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn } ; IS__CGSCC____: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__CGSCC____: attributes #[[ATTR1]] = { nofree norecurse nosync nounwind willreturn writeonly } ; IS__CGSCC____: attributes #[[ATTR1]] = { nofree norecurse nosync nounwind willreturn writeonly }
; IS__CGSCC____: attributes #[[ATTR2]] = { nofree norecurse nosync nounwind readonly willreturn } ; IS__CGSCC____: attributes #[[ATTR2]] = { nofree norecurse nosync nounwind readonly willreturn }
; IS__CGSCC____: attributes #[[ATTR3]] = { readonly } ; IS__CGSCC____: attributes #[[ATTR3]] = { readonly }
; IS__CGSCC____: attributes #[[ATTR4]] = { nounwind readonly } ; IS__CGSCC____: attributes #[[ATTR4]] = { nounwind readonly }
; IS__CGSCC____: attributes #[[ATTR5]] = { nofree norecurse nosync nounwind willreturn } ; IS__CGSCC____: attributes #[[ATTR5]] = { nofree norecurse nosync nounwind willreturn }
; IS__CGSCC____: attributes #[[ATTR6]] = { argmemonly nounwind } ; IS__CGSCC____: attributes #[[ATTR6]] = { argmemonly nounwind }
Show All 16 Lines

llvm/test/Transforms/Attributor/nocapture-2.ll

Show All 12 Lines
; TEST comparison against NULL ; TEST comparison against NULL
; ;
; int is_null_return(int *p) { ; int is_null_return(int *p) {
; return p == 0; ; return p == 0;
; } ; }
; ;
; no-capture is missing on %p because it is not dereferenceable ; no-capture is missing on %p because it is not dereferenceable
define i32 @is_null_return(i32* %p) #0 { define i32 @is_null_return(i32* %p) #0 {
; IS__TUNIT____: Function Attrs: nofree noinline nosync nounwind readnone uwtable willreturn ; CHECK: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@is_null_return ; CHECK-LABEL: define {{[^@]+}}@is_null_return
; IS__TUNIT____-SAME: (i32* nofree readnone [[P:%.*]]) #[[ATTR0:[0-9]+]] { ; CHECK-SAME: (i32* nofree readnone [[P:%.*]]) #[[ATTR0:[0-9]+]] {
; IS__TUNIT____-NEXT: entry: ; CHECK-NEXT: entry:
; IS__TUNIT____-NEXT: [[CMP:%.*]] = icmp eq i32* [[P]], null ; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32* [[P]], null
; IS__TUNIT____-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32 ; CHECK-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
; IS__TUNIT____-NEXT: ret i32 [[CONV]] ; CHECK-NEXT: ret i32 [[CONV]]
;
; IS__CGSCC____: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@is_null_return
; IS__CGSCC____-SAME: (i32* nofree readnone [[P:%.*]]) #[[ATTR0:[0-9]+]] {
; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: [[CMP:%.*]] = icmp eq i32* [[P]], null
; IS__CGSCC____-NEXT: [[CONV:%.*]] = zext i1 [[CMP]] to i32
; IS__CGSCC____-NEXT: ret i32 [[CONV]]
; ;
entry: entry:
%cmp = icmp eq i32* %p, null %cmp = icmp eq i32* %p, null
%conv = zext i1 %cmp to i32 %conv = zext i1 %cmp to i32
ret i32 %conv ret i32 %conv
} }
; TEST comparison against NULL in control flow ; TEST comparison against NULL in control flow
; ;
; int is_null_control(int *p) { ; int is_null_control(int *p) {
; if (p == 0) ; if (p == 0)
; return 1; ; return 1;
; if (0 == p) ; if (0 == p)
; return 1; ; return 1;
; return 0; ; return 0;
; } ; }
; ;
; no-capture is missing on %p because it is not dereferenceable ; no-capture is missing on %p because it is not dereferenceable
define i32 @is_null_control(i32* %p) #0 { define i32 @is_null_control(i32* %p) #0 {
; IS__TUNIT____: Function Attrs: nofree noinline nosync nounwind readnone uwtable willreturn ; CHECK: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@is_null_control ; CHECK-LABEL: define {{[^@]+}}@is_null_control
; IS__TUNIT____-SAME: (i32* nofree [[P:%.*]]) #[[ATTR0]] { ; CHECK-SAME: (i32* nofree [[P:%.*]]) #[[ATTR0]] {
; IS__TUNIT____-NEXT: entry: ; CHECK-NEXT: entry:
; IS__TUNIT____-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 ; CHECK-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
; IS__TUNIT____-NEXT: [[CMP:%.*]] = icmp eq i32* [[P]], null ; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32* [[P]], null
; IS__TUNIT____-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_END:%.*]] ; CHECK-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
; IS__TUNIT____: if.then: ; CHECK: if.then:
; IS__TUNIT____-NEXT: store i32 1, i32* [[RETVAL]], align 4 ; CHECK-NEXT: store i32 1, i32* [[RETVAL]], align 4
; IS__TUNIT____-NEXT: br label [[RETURN:%.*]] ; CHECK-NEXT: br label [[RETURN:%.*]]
; IS__TUNIT____: if.end: ; CHECK: if.end:
; IS__TUNIT____-NEXT: [[CMP1:%.*]] = icmp eq i32* null, [[P]] ; CHECK-NEXT: [[CMP1:%.*]] = icmp eq i32* null, [[P]]
; IS__TUNIT____-NEXT: br i1 [[CMP1]], label [[IF_THEN2:%.*]], label [[IF_END3:%.*]] ; CHECK-NEXT: br i1 [[CMP1]], label [[IF_THEN2:%.*]], label [[IF_END3:%.*]]
; IS__TUNIT____: if.then2: ; CHECK: if.then2:
; IS__TUNIT____-NEXT: store i32 1, i32* [[RETVAL]], align 4 ; CHECK-NEXT: store i32 1, i32* [[RETVAL]], align 4
; IS__TUNIT____-NEXT: br label [[RETURN]] ; CHECK-NEXT: br label [[RETURN]]
; IS__TUNIT____: if.end3: ; CHECK: if.end3:
; IS__TUNIT____-NEXT: store i32 0, i32* [[RETVAL]], align 4 ; CHECK-NEXT: store i32 0, i32* [[RETVAL]], align 4
; IS__TUNIT____-NEXT: br label [[RETURN]] ; CHECK-NEXT: br label [[RETURN]]
; IS__TUNIT____: return: ; CHECK: return:
; IS__TUNIT____-NEXT: [[TMP0:%.*]] = load i32, i32* [[RETVAL]], align 4 ; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[RETVAL]], align 4
; IS__TUNIT____-NEXT: ret i32 [[TMP0]] ; CHECK-NEXT: ret i32 [[TMP0]]
;
; IS__CGSCC____: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@is_null_control
; IS__CGSCC____-SAME: (i32* nofree [[P:%.*]]) #[[ATTR0]] {
; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
; IS__CGSCC____-NEXT: [[CMP:%.*]] = icmp eq i32* [[P]], null
; IS__CGSCC____-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
; IS__CGSCC____: if.then:
; IS__CGSCC____-NEXT: store i32 1, i32* [[RETVAL]], align 4
; IS__CGSCC____-NEXT: br label [[RETURN:%.*]]
; IS__CGSCC____: if.end:
; IS__CGSCC____-NEXT: [[CMP1:%.*]] = icmp eq i32* null, [[P]]
; IS__CGSCC____-NEXT: br i1 [[CMP1]], label [[IF_THEN2:%.*]], label [[IF_END3:%.*]]
; IS__CGSCC____: if.then2:
; IS__CGSCC____-NEXT: store i32 1, i32* [[RETVAL]], align 4
; IS__CGSCC____-NEXT: br label [[RETURN]]
; IS__CGSCC____: if.end3:
; IS__CGSCC____-NEXT: store i32 0, i32* [[RETVAL]], align 4
; IS__CGSCC____-NEXT: br label [[RETURN]]
; IS__CGSCC____: return:
; IS__CGSCC____-NEXT: [[TMP0:%.*]] = load i32, i32* [[RETVAL]], align 4
; IS__CGSCC____-NEXT: ret i32 [[TMP0]]
; ;
entry: entry:
%retval = alloca i32, align 4 %retval = alloca i32, align 4
%cmp = icmp eq i32* %p, null %cmp = icmp eq i32* %p, null
br i1 %cmp, label %if.then, label %if.end br i1 %cmp, label %if.then, label %if.end
if.then: ; preds = %entry if.then: ; preds = %entry
store i32 1, i32* %retval, align 4 store i32 1, i32* %retval, align 4
Show All 19 Lines
; TEST singleton SCC ; TEST singleton SCC
; ;
; double *srec0(double *a) { ; double *srec0(double *a) {
; srec0(a); ; srec0(a);
; return 0; ; return 0;
; } ; }
; ;
define double* @srec0(double* %a) #0 { define double* @srec0(double* %a) #0 {
; IS__TUNIT____: Function Attrs: nofree noinline nosync nounwind readnone uwtable willreturn ; CHECK: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@srec0 ; CHECK-LABEL: define {{[^@]+}}@srec0
; IS__TUNIT____-SAME: (double* nocapture nofree readnone [[A:%.*]]) #[[ATTR0]] { ; CHECK-SAME: (double* nocapture nofree readnone [[A:%.*]]) #[[ATTR0]] {
; IS__TUNIT____-NEXT: entry: ; CHECK-NEXT: entry:
; IS__TUNIT____-NEXT: ret double* null ; CHECK-NEXT: ret double* null
;
; IS__CGSCC____: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@srec0
; IS__CGSCC____-SAME: (double* nocapture nofree readnone [[A:%.*]]) #[[ATTR0]] {
; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: ret double* null
; ;
entry: entry:
%call = call double* @srec0(double* %a) %call = call double* @srec0(double* %a)
ret double* null ret double* null
} }
; TEST singleton SCC with lots of nested recursive calls ; TEST singleton SCC with lots of nested recursive calls
; ;
; int* srec16(int* a) { ; int* srec16(int* a) {
; return srec16(srec16(srec16(srec16( ; return srec16(srec16(srec16(srec16(
; srec16(srec16(srec16(srec16( ; srec16(srec16(srec16(srec16(
; srec16(srec16(srec16(srec16( ; srec16(srec16(srec16(srec16(
; srec16(srec16(srec16(srec16( ; srec16(srec16(srec16(srec16(
; a ; a
; )))))))))))))))); ; ))))))))))))))));
; } ; }
; ;
; Other arguments are possible here due to the no-return behavior. ; Other arguments are possible here due to the no-return behavior.
; ;
define i32* @srec16(i32* %a) #0 { define i32* @srec16(i32* %a) #0 {
; IS__TUNIT____: Function Attrs: nofree noinline nosync nounwind readnone uwtable willreturn ; CHECK: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@srec16 ; CHECK-LABEL: define {{[^@]+}}@srec16
; IS__TUNIT____-SAME: (i32* nocapture nofree readnone [[A:%.*]]) #[[ATTR0]] { ; CHECK-SAME: (i32* nocapture nofree readnone [[A:%.*]]) #[[ATTR0]] {
; IS__TUNIT____-NEXT: entry: ; CHECK-NEXT: entry:
; IS__TUNIT____-NEXT: ret i32* undef ; CHECK-NEXT: ret i32* undef
;
; IS__CGSCC____: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@srec16
; IS__CGSCC____-SAME: (i32* nocapture nofree readnone [[A:%.*]]) #[[ATTR0]] {
; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: ret i32* undef
; ;
entry: entry:
%call = call i32* @srec16(i32* %a) %call = call i32* @srec16(i32* %a)
%call1 = call i32* @srec16(i32* %call) %call1 = call i32* @srec16(i32* %call)
%call2 = call i32* @srec16(i32* %call1) %call2 = call i32* @srec16(i32* %call1)
%call3 = call i32* @srec16(i32* %call2) %call3 = call i32* @srec16(i32* %call2)
%call4 = call i32* @srec16(i32* %call3) %call4 = call i32* @srec16(i32* %call3)
%call5 = call i32* @srec16(i32* %call4) %call5 = call i32* @srec16(i32* %call4)
▲ Show 20 Lines • Show All 215 Lines • ▼ Show 20 Lines
; ;
; long *not_captured_but_returned_0(long *a) { ; long *not_captured_but_returned_0(long *a) {
; *a1 = 0; ; *a1 = 0;
; return a; ; return a;
; } ; }
; ;
; There should *not* be a no-capture attribute on %a ; There should *not* be a no-capture attribute on %a
define i64* @not_captured_but_returned_0(i64* %a) #0 { define i64* @not_captured_but_returned_0(i64* %a) #0 {
; IS__TUNIT____: Function Attrs: argmemonly nofree noinline nosync nounwind uwtable willreturn writeonly ; CHECK: Function Attrs: argmemonly nofree noinline norecurse nosync nounwind uwtable willreturn writeonly
; IS__TUNIT____-LABEL: define {{[^@]+}}@not_captured_but_returned_0 ; CHECK-LABEL: define {{[^@]+}}@not_captured_but_returned_0
; IS__TUNIT____-SAME: (i64* nofree noundef nonnull returned writeonly align 8 dereferenceable(8) "no-capture-maybe-returned" [[A:%.*]]) #[[ATTR3:[0-9]+]] { ; CHECK-SAME: (i64* nofree noundef nonnull returned writeonly align 8 dereferenceable(8) "no-capture-maybe-returned" [[A:%.*]]) #[[ATTR3:[0-9]+]] {
; IS__TUNIT____-NEXT: entry: ; CHECK-NEXT: entry:
; IS__TUNIT____-NEXT: store i64 0, i64* [[A]], align 8 ; CHECK-NEXT: store i64 0, i64* [[A]], align 8
; IS__TUNIT____-NEXT: ret i64* [[A]] ; CHECK-NEXT: ret i64* [[A]]
;
; IS__CGSCC____: Function Attrs: argmemonly nofree noinline norecurse nosync nounwind uwtable willreturn writeonly
; IS__CGSCC____-LABEL: define {{[^@]+}}@not_captured_but_returned_0
; IS__CGSCC____-SAME: (i64* nofree noundef nonnull returned writeonly align 8 dereferenceable(8) "no-capture-maybe-returned" [[A:%.*]]) #[[ATTR3:[0-9]+]] {
; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: store i64 0, i64* [[A]], align 8
; IS__CGSCC____-NEXT: ret i64* [[A]]
; ;
entry: entry:
store i64 0, i64* %a, align 8 store i64 0, i64* %a, align 8
ret i64* %a ret i64* %a
} }
; TEST "captured" only through return ; TEST "captured" only through return
; ;
; long *not_captured_but_returned_1(long *a) { ; long *not_captured_but_returned_1(long *a) {
; *(a+1) = 1; ; *(a+1) = 1;
; return a + 1; ; return a + 1;
; } ; }
; ;
; There should *not* be a no-capture attribute on %a ; There should *not* be a no-capture attribute on %a
define i64* @not_captured_but_returned_1(i64* %a) #0 { define i64* @not_captured_but_returned_1(i64* %a) #0 {
; IS__TUNIT____: Function Attrs: argmemonly nofree noinline nosync nounwind uwtable willreturn writeonly ; CHECK: Function Attrs: argmemonly nofree noinline norecurse nosync nounwind uwtable willreturn writeonly
; IS__TUNIT____-LABEL: define {{[^@]+}}@not_captured_but_returned_1 ; CHECK-LABEL: define {{[^@]+}}@not_captured_but_returned_1
; IS__TUNIT____-SAME: (i64* nofree nonnull writeonly align 8 dereferenceable(16) "no-capture-maybe-returned" [[A:%.*]]) #[[ATTR3]] { ; CHECK-SAME: (i64* nofree nonnull writeonly align 8 dereferenceable(16) "no-capture-maybe-returned" [[A:%.*]]) #[[ATTR3]] {
; IS__TUNIT____-NEXT: entry: ; CHECK-NEXT: entry:
; IS__TUNIT____-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i64, i64* [[A]], i64 1 ; CHECK-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i64, i64* [[A]], i64 1
; IS__TUNIT____-NEXT: store i64 1, i64* [[ADD_PTR]], align 8 ; CHECK-NEXT: store i64 1, i64* [[ADD_PTR]], align 8
; IS__TUNIT____-NEXT: ret i64* [[ADD_PTR]] ; CHECK-NEXT: ret i64* [[ADD_PTR]]
;
; IS__CGSCC____: Function Attrs: argmemonly nofree noinline norecurse nosync nounwind uwtable willreturn writeonly
; IS__CGSCC____-LABEL: define {{[^@]+}}@not_captured_but_returned_1
; IS__CGSCC____-SAME: (i64* nofree nonnull writeonly align 8 dereferenceable(16) "no-capture-maybe-returned" [[A:%.*]]) #[[ATTR3]] {
; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i64, i64* [[A]], i64 1
; IS__CGSCC____-NEXT: store i64 1, i64* [[ADD_PTR]], align 8
; IS__CGSCC____-NEXT: ret i64* [[ADD_PTR]]
; ;
entry: entry:
%add.ptr = getelementptr inbounds i64, i64* %a, i64 1 %add.ptr = getelementptr inbounds i64, i64* %a, i64 1
store i64 1, i64* %add.ptr, align 8 store i64 1, i64* %add.ptr, align 8
ret i64* %add.ptr ret i64* %add.ptr
} }
; TEST calls to "captured" only through return functions ; TEST calls to "captured" only through return functions
; ;
; void test_not_captured_but_returned_calls(long *a) { ; void test_not_captured_but_returned_calls(long *a) {
; not_captured_but_returned_0(a); ; not_captured_but_returned_0(a);
; not_captured_but_returned_1(a); ; not_captured_but_returned_1(a);
; } ; }
; ;
define void @test_not_captured_but_returned_calls(i64* %a) #0 { define void @test_not_captured_but_returned_calls(i64* %a) #0 {
; IS__TUNIT____: Function Attrs: argmemonly nofree noinline nosync nounwind uwtable willreturn writeonly ; IS__TUNIT____: Function Attrs: argmemonly nofree noinline norecurse nosync nounwind uwtable willreturn writeonly
; IS__TUNIT____-LABEL: define {{[^@]+}}@test_not_captured_but_returned_calls ; IS__TUNIT____-LABEL: define {{[^@]+}}@test_not_captured_but_returned_calls
; IS__TUNIT____-SAME: (i64* nocapture nofree writeonly align 8 [[A:%.*]]) #[[ATTR3]] { ; IS__TUNIT____-SAME: (i64* nocapture nofree writeonly align 8 [[A:%.*]]) #[[ATTR3]] {
; IS__TUNIT____-NEXT: entry: ; IS__TUNIT____-NEXT: entry:
; IS__TUNIT____-NEXT: [[CALL:%.*]] = call i64* @not_captured_but_returned_0(i64* nofree writeonly align 8 "no-capture-maybe-returned" [[A]]) #[[ATTR8:[0-9]+]] ; IS__TUNIT____-NEXT: [[CALL:%.*]] = call i64* @not_captured_but_returned_0(i64* nofree writeonly align 8 "no-capture-maybe-returned" [[A]]) #[[ATTR8:[0-9]+]]
; IS__TUNIT____-NEXT: [[CALL1:%.*]] = call i64* @not_captured_but_returned_1(i64* nofree writeonly align 8 "no-capture-maybe-returned" [[A]]) #[[ATTR8]] ; IS__TUNIT____-NEXT: [[CALL1:%.*]] = call i64* @not_captured_but_returned_1(i64* nofree writeonly align 8 "no-capture-maybe-returned" [[A]]) #[[ATTR8]]
; IS__TUNIT____-NEXT: ret void ; IS__TUNIT____-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: argmemonly nofree noinline norecurse nosync nounwind uwtable willreturn writeonly ; IS__CGSCC____: Function Attrs: argmemonly nofree noinline norecurse nosync nounwind uwtable willreturn writeonly
Show All 13 Lines
; TEST "captured" only through transitive return ; TEST "captured" only through transitive return
; ;
; long* negative_test_not_captured_but_returned_call_0a(long *a) { ; long* negative_test_not_captured_but_returned_call_0a(long *a) {
; return not_captured_but_returned_0(a); ; return not_captured_but_returned_0(a);
; } ; }
; ;
; There should *not* be a no-capture attribute on %a ; There should *not* be a no-capture attribute on %a
define i64* @negative_test_not_captured_but_returned_call_0a(i64* %a) #0 { define i64* @negative_test_not_captured_but_returned_call_0a(i64* %a) #0 {
; IS__TUNIT____: Function Attrs: argmemonly nofree noinline nosync nounwind uwtable willreturn writeonly ; IS__TUNIT____: Function Attrs: argmemonly nofree noinline norecurse nosync nounwind uwtable willreturn writeonly
; IS__TUNIT____-LABEL: define {{[^@]+}}@negative_test_not_captured_but_returned_call_0a ; IS__TUNIT____-LABEL: define {{[^@]+}}@negative_test_not_captured_but_returned_call_0a
; IS__TUNIT____-SAME: (i64* nofree returned writeonly align 8 "no-capture-maybe-returned" [[A:%.*]]) #[[ATTR3]] { ; IS__TUNIT____-SAME: (i64* nofree returned writeonly align 8 "no-capture-maybe-returned" [[A:%.*]]) #[[ATTR3]] {
; IS__TUNIT____-NEXT: entry: ; IS__TUNIT____-NEXT: entry:
; IS__TUNIT____-NEXT: [[CALL:%.*]] = call i64* @not_captured_but_returned_0(i64* nofree writeonly align 8 "no-capture-maybe-returned" [[A]]) #[[ATTR8]] ; IS__TUNIT____-NEXT: [[CALL:%.*]] = call i64* @not_captured_but_returned_0(i64* nofree writeonly align 8 "no-capture-maybe-returned" [[A]]) #[[ATTR8]]
; IS__TUNIT____-NEXT: ret i64* [[A]] ; IS__TUNIT____-NEXT: ret i64* [[A]]
; ;
; IS__CGSCC____: Function Attrs: argmemonly nofree noinline norecurse nosync nounwind uwtable willreturn writeonly ; IS__CGSCC____: Function Attrs: argmemonly nofree noinline norecurse nosync nounwind uwtable willreturn writeonly
; IS__CGSCC____-LABEL: define {{[^@]+}}@negative_test_not_captured_but_returned_call_0a ; IS__CGSCC____-LABEL: define {{[^@]+}}@negative_test_not_captured_but_returned_call_0a
Show All 10 Lines
; TEST captured through write ; TEST captured through write
; ;
; void negative_test_not_captured_but_returned_call_0b(long *a) { ; void negative_test_not_captured_but_returned_call_0b(long *a) {
; *a = (long)not_captured_but_returned_0(a); ; *a = (long)not_captured_but_returned_0(a);
; } ; }
; ;
; There should *not* be a no-capture attribute on %a ; There should *not* be a no-capture attribute on %a
define void @negative_test_not_captured_but_returned_call_0b(i64* %a) #0 { define void @negative_test_not_captured_but_returned_call_0b(i64* %a) #0 {
; IS__TUNIT____: Function Attrs: argmemonly nofree noinline nosync nounwind uwtable willreturn writeonly ; IS__TUNIT____: Function Attrs: argmemonly nofree noinline norecurse nosync nounwind uwtable willreturn writeonly
; IS__TUNIT____-LABEL: define {{[^@]+}}@negative_test_not_captured_but_returned_call_0b ; IS__TUNIT____-LABEL: define {{[^@]+}}@negative_test_not_captured_but_returned_call_0b
; IS__TUNIT____-SAME: (i64* nofree writeonly align 8 [[A:%.*]]) #[[ATTR3]] { ; IS__TUNIT____-SAME: (i64* nofree writeonly align 8 [[A:%.*]]) #[[ATTR3]] {
; IS__TUNIT____-NEXT: entry: ; IS__TUNIT____-NEXT: entry:
; IS__TUNIT____-NEXT: [[CALL:%.*]] = call i64* @not_captured_but_returned_0(i64* nofree writeonly align 8 "no-capture-maybe-returned" [[A]]) #[[ATTR8]] ; IS__TUNIT____-NEXT: [[CALL:%.*]] = call i64* @not_captured_but_returned_0(i64* nofree writeonly align 8 "no-capture-maybe-returned" [[A]]) #[[ATTR8]]
; IS__TUNIT____-NEXT: [[TMP0:%.*]] = ptrtoint i64* [[A]] to i64 ; IS__TUNIT____-NEXT: [[TMP0:%.*]] = ptrtoint i64* [[A]] to i64
; IS__TUNIT____-NEXT: store i64 [[TMP0]], i64* [[A]], align 8 ; IS__TUNIT____-NEXT: store i64 [[TMP0]], i64* [[A]], align 8
; IS__TUNIT____-NEXT: ret void ; IS__TUNIT____-NEXT: ret void
; ;
Show All 16 Lines
; TEST "captured" only through transitive return ; TEST "captured" only through transitive return
; ;
; long* negative_test_not_captured_but_returned_call_1a(long *a) { ; long* negative_test_not_captured_but_returned_call_1a(long *a) {
; return not_captured_but_returned_1(a); ; return not_captured_but_returned_1(a);
; } ; }
; ;
; There should *not* be a no-capture attribute on %a ; There should *not* be a no-capture attribute on %a
define i64* @negative_test_not_captured_but_returned_call_1a(i64* %a) #0 { define i64* @negative_test_not_captured_but_returned_call_1a(i64* %a) #0 {
; IS__TUNIT____: Function Attrs: argmemonly nofree noinline nosync nounwind uwtable willreturn writeonly ; IS__TUNIT____: Function Attrs: argmemonly nofree noinline norecurse nosync nounwind uwtable willreturn writeonly
; IS__TUNIT____-LABEL: define {{[^@]+}}@negative_test_not_captured_but_returned_call_1a ; IS__TUNIT____-LABEL: define {{[^@]+}}@negative_test_not_captured_but_returned_call_1a
; IS__TUNIT____-SAME: (i64* nofree writeonly align 8 "no-capture-maybe-returned" [[A:%.*]]) #[[ATTR3]] { ; IS__TUNIT____-SAME: (i64* nofree writeonly align 8 "no-capture-maybe-returned" [[A:%.*]]) #[[ATTR3]] {
; IS__TUNIT____-NEXT: entry: ; IS__TUNIT____-NEXT: entry:
; IS__TUNIT____-NEXT: [[CALL:%.*]] = call noundef nonnull align 8 dereferenceable(8) i64* @not_captured_but_returned_1(i64* nofree writeonly align 8 "no-capture-maybe-returned" [[A]]) #[[ATTR8]] ; IS__TUNIT____-NEXT: [[CALL:%.*]] = call noundef nonnull align 8 dereferenceable(8) i64* @not_captured_but_returned_1(i64* nofree writeonly align 8 "no-capture-maybe-returned" [[A]]) #[[ATTR8]]
; IS__TUNIT____-NEXT: ret i64* [[CALL]] ; IS__TUNIT____-NEXT: ret i64* [[CALL]]
; ;
; IS__CGSCC____: Function Attrs: argmemonly nofree noinline norecurse nosync nounwind uwtable willreturn writeonly ; IS__CGSCC____: Function Attrs: argmemonly nofree noinline norecurse nosync nounwind uwtable willreturn writeonly
; IS__CGSCC____-LABEL: define {{[^@]+}}@negative_test_not_captured_but_returned_call_1a ; IS__CGSCC____-LABEL: define {{[^@]+}}@negative_test_not_captured_but_returned_call_1a
Show All 10 Lines
; TEST captured through write ; TEST captured through write
; ;
; void negative_test_not_captured_but_returned_call_1b(long *a) { ; void negative_test_not_captured_but_returned_call_1b(long *a) {
; *a = (long)not_captured_but_returned_1(a); ; *a = (long)not_captured_but_returned_1(a);
; } ; }
; ;
; There should *not* be a no-capture attribute on %a ; There should *not* be a no-capture attribute on %a
define void @negative_test_not_captured_but_returned_call_1b(i64* %a) #0 { define void @negative_test_not_captured_but_returned_call_1b(i64* %a) #0 {
; IS__TUNIT____: Function Attrs: nofree noinline nosync nounwind uwtable willreturn writeonly ; IS__TUNIT____: Function Attrs: nofree noinline norecurse nosync nounwind uwtable willreturn writeonly
; IS__TUNIT____-LABEL: define {{[^@]+}}@negative_test_not_captured_but_returned_call_1b ; IS__TUNIT____-LABEL: define {{[^@]+}}@negative_test_not_captured_but_returned_call_1b
; IS__TUNIT____-SAME: (i64* nofree writeonly align 8 [[A:%.*]]) #[[ATTR4:[0-9]+]] { ; IS__TUNIT____-SAME: (i64* nofree writeonly align 8 [[A:%.*]]) #[[ATTR4:[0-9]+]] {
; IS__TUNIT____-NEXT: entry: ; IS__TUNIT____-NEXT: entry:
; IS__TUNIT____-NEXT: [[CALL:%.*]] = call align 8 i64* @not_captured_but_returned_1(i64* nofree writeonly align 8 "no-capture-maybe-returned" [[A]]) #[[ATTR8]] ; IS__TUNIT____-NEXT: [[CALL:%.*]] = call align 8 i64* @not_captured_but_returned_1(i64* nofree writeonly align 8 "no-capture-maybe-returned" [[A]]) #[[ATTR8]]
; IS__TUNIT____-NEXT: [[TMP0:%.*]] = ptrtoint i64* [[CALL]] to i64 ; IS__TUNIT____-NEXT: [[TMP0:%.*]] = ptrtoint i64* [[CALL]] to i64
; IS__TUNIT____-NEXT: store i64 [[TMP0]], i64* [[CALL]], align 8 ; IS__TUNIT____-NEXT: store i64 [[TMP0]], i64* [[CALL]], align 8
; IS__TUNIT____-NEXT: ret void ; IS__TUNIT____-NEXT: ret void
; ;
▲ Show 20 Lines • Show All 186 Lines • ▼ Show 20 Lines
entry: entry:
%call = call i32* @readonly_i32p(i32* %b) %call = call i32* @readonly_i32p(i32* %b)
store i32 0, i32* %call store i32 0, i32* %call
ret void ret void
} }
attributes #0 = { noinline nounwind uwtable } attributes #0 = { noinline nounwind uwtable }
;. ;.
; IS__TUNIT____: attributes #[[ATTR0]] = { nofree noinline nosync nounwind readnone uwtable willreturn } ; IS__TUNIT____: attributes #[[ATTR0]] = { nofree noinline norecurse nosync nounwind readnone uwtable willreturn }
; IS__TUNIT____: attributes #[[ATTR1]] = { nofree nosync nounwind readnone } ; IS__TUNIT____: attributes #[[ATTR1]] = { nofree nosync nounwind readnone }
; IS__TUNIT____: attributes #[[ATTR2]] = { noinline nounwind uwtable } ; IS__TUNIT____: attributes #[[ATTR2]] = { noinline nounwind uwtable }
; IS__TUNIT____: attributes #[[ATTR3]] = { argmemonly nofree noinline nosync nounwind uwtable willreturn writeonly } ; IS__TUNIT____: attributes #[[ATTR3]] = { argmemonly nofree noinline norecurse nosync nounwind uwtable willreturn writeonly }
; IS__TUNIT____: attributes #[[ATTR4]] = { nofree noinline nosync nounwind uwtable willreturn writeonly } ; IS__TUNIT____: attributes #[[ATTR4]] = { nofree noinline norecurse nosync nounwind uwtable willreturn writeonly }
; IS__TUNIT____: attributes #[[ATTR5]] = { readonly } ; IS__TUNIT____: attributes #[[ATTR5]] = { readonly }
; IS__TUNIT____: attributes #[[ATTR6]] = { noinline nounwind readonly uwtable } ; IS__TUNIT____: attributes #[[ATTR6]] = { noinline nounwind readonly uwtable }
; IS__TUNIT____: attributes #[[ATTR7]] = { nounwind readonly } ; IS__TUNIT____: attributes #[[ATTR7]] = { nounwind readonly }
; IS__TUNIT____: attributes #[[ATTR8]] = { nofree nosync nounwind willreturn writeonly } ; IS__TUNIT____: attributes #[[ATTR8]] = { nofree nosync nounwind willreturn writeonly }
;. ;.
; IS__CGSCC____: attributes #[[ATTR0]] = { nofree noinline norecurse nosync nounwind readnone uwtable willreturn } ; IS__CGSCC____: attributes #[[ATTR0]] = { nofree noinline norecurse nosync nounwind readnone uwtable willreturn }
; IS__CGSCC____: attributes #[[ATTR1]] = { nofree nosync nounwind readnone } ; IS__CGSCC____: attributes #[[ATTR1]] = { nofree nosync nounwind readnone }
; IS__CGSCC____: attributes #[[ATTR2]] = { noinline nounwind uwtable } ; IS__CGSCC____: attributes #[[ATTR2]] = { noinline nounwind uwtable }
; IS__CGSCC____: attributes #[[ATTR3]] = { argmemonly nofree noinline norecurse nosync nounwind uwtable willreturn writeonly } ; IS__CGSCC____: attributes #[[ATTR3]] = { argmemonly nofree noinline norecurse nosync nounwind uwtable willreturn writeonly }
; IS__CGSCC____: attributes #[[ATTR4]] = { nofree noinline norecurse nosync nounwind uwtable willreturn writeonly } ; IS__CGSCC____: attributes #[[ATTR4]] = { nofree noinline norecurse nosync nounwind uwtable willreturn writeonly }
; IS__CGSCC____: attributes #[[ATTR5]] = { readonly } ; IS__CGSCC____: attributes #[[ATTR5]] = { readonly }
; IS__CGSCC____: attributes #[[ATTR6]] = { noinline nounwind readonly uwtable } ; IS__CGSCC____: attributes #[[ATTR6]] = { noinline nounwind readonly uwtable }
; IS__CGSCC____: attributes #[[ATTR7]] = { nounwind readonly } ; IS__CGSCC____: attributes #[[ATTR7]] = { nounwind readonly }
; IS__CGSCC____: attributes #[[ATTR8]] = { nounwind willreturn writeonly } ; IS__CGSCC____: attributes #[[ATTR8]] = { nounwind willreturn writeonly }
;. ;.

llvm/test/Transforms/Attributor/nodelete.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals
; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=2 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM ; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=2 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=2 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=2 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM
; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM ; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM
%"a" = type { i64 } %"a" = type { i64 }
%"b" = type { i8 } %"b" = type { i8 }
define hidden i64 @f1() align 2 { define hidden i64 @f1() align 2 {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__TUNIT____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@f1 ; IS__TUNIT____-LABEL: define {{[^@]+}}@f1
; IS__TUNIT____-SAME: () #[[ATTR0:[0-9]+]] align 2 { ; IS__TUNIT____-SAME: () #[[ATTR0:[0-9]+]] align 2 {
; IS__TUNIT____-NEXT: entry: ; IS__TUNIT____-NEXT: entry:
; IS__TUNIT____-NEXT: ret i64 undef ; IS__TUNIT____-NEXT: ret i64 undef
; ;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@f1 ; IS__CGSCC____-LABEL: define {{[^@]+}}@f1
; IS__CGSCC____-SAME: () #[[ATTR0:[0-9]+]] align 2 { ; IS__CGSCC____-SAME: () #[[ATTR0:[0-9]+]] align 2 {
; IS__CGSCC____-NEXT: entry: ; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: [[REF_TMP:%.*]] = alloca [[A:%.*]], align 8 ; IS__CGSCC____-NEXT: [[REF_TMP:%.*]] = alloca [[A:%.*]], align 8
; IS__CGSCC____-NEXT: ret i64 undef ; IS__CGSCC____-NEXT: ret i64 undef
; ;
entry: entry:
%ref.tmp = alloca %"a", align 8 %ref.tmp = alloca %"a", align 8
%call2 = call i64 @f2(%"a"* %ref.tmp) %call2 = call i64 @f2(%"a"* %ref.tmp)
ret i64 %call2 ret i64 %call2
} }
define internal i64 @f2(%"a"* %this) align 2 { define internal i64 @f2(%"a"* %this) align 2 {
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@f2 ; IS__CGSCC____-LABEL: define {{[^@]+}}@f2
; IS__CGSCC____-SAME: () #[[ATTR0]] align 2 { ; IS__CGSCC____-SAME: () #[[ATTR0]] align 2 {
; IS__CGSCC____-NEXT: entry: ; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: [[THIS_ADDR:%.*]] = alloca %a*, align 8
; IS__CGSCC____-NEXT: [[THIS1:%.*]] = load %a*, %a** [[THIS_ADDR]], align 8
; IS__CGSCC____-NEXT: ret i64 undef ; IS__CGSCC____-NEXT: ret i64 undef
; ;
entry: entry:
%this.addr = alloca %"a"*, align 8 %this.addr = alloca %"a"*, align 8
store %"a"* %this, %"a"** %this.addr, align 8 store %"a"* %this, %"a"** %this.addr, align 8
%this1 = load %"a"*, %"a"** %this.addr, align 8 %this1 = load %"a"*, %"a"** %this.addr, align 8
%0 = bitcast %"a"* %this1 to %"b"* %0 = bitcast %"a"* %this1 to %"b"*
call void @f3(%"b"* %0) call void @f3(%"b"* %0)
▲ Show 20 Lines • Show All 44 Lines • ▼ Show 20 Lines
entry: entry:
%this.addr = alloca %"b"*, align 8 %this.addr = alloca %"b"*, align 8
store %"b"* %this, %"b"** %this.addr, align 8 store %"b"* %this, %"b"** %this.addr, align 8
%this1 = load %"b"*, %"b"** %this.addr, align 8 %this1 = load %"b"*, %"b"** %this.addr, align 8
%0 = bitcast %"b"* %this1 to %"a"* %0 = bitcast %"b"* %this1 to %"a"*
ret %"a"* %0 ret %"a"* %0
} }
;. ;.
; IS__TUNIT____: attributes #[[ATTR0]] = { nofree nosync nounwind readnone willreturn } ; CHECK: attributes #[[ATTR0:[0-9]+]] = { nofree norecurse nosync nounwind readnone willreturn }
;.
; IS__CGSCC____: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn }
;. ;.

llvm/test/Transforms/Attributor/nofree.ll

Show All 11 Lines
; Free functions ; Free functions
declare void @free(i8* nocapture) local_unnamed_addr #1 declare void @free(i8* nocapture) local_unnamed_addr #1
declare noalias i8* @realloc(i8* nocapture, i64) local_unnamed_addr #0 declare noalias i8* @realloc(i8* nocapture, i64) local_unnamed_addr #0
declare void @_ZdaPv(i8*) local_unnamed_addr #2 declare void @_ZdaPv(i8*) local_unnamed_addr #2
; TEST 1 (positive case) ; TEST 1 (positive case)
define void @only_return() #0 { define void @only_return() #0 {
; IS__TUNIT____: Function Attrs: nofree noinline nosync nounwind readnone uwtable willreturn ; CHECK: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@only_return ; CHECK-LABEL: define {{[^@]+}}@only_return
; IS__TUNIT____-SAME: () #[[ATTR3:[0-9]+]] { ; CHECK-SAME: () #[[ATTR3:[0-9]+]] {
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@only_return
; IS__CGSCC____-SAME: () #[[ATTR3:[0-9]+]] {
; IS__CGSCC____-NEXT: ret void
; ;
ret void ret void
} }
; TEST 2 (negative case) ; TEST 2 (negative case)
; Only free ; Only free
; void only_free(char* p) { ; void only_free(char* p) {
▲ Show 20 Lines • Show All 69 Lines • ▼ Show 20 Lines
; mutual_recursion2(); ; mutual_recursion2();
; } ; }
; void mutual_recursion2(){ ; void mutual_recursion2(){
; mutual_recursion1(); ; mutual_recursion1();
; } ; }
define void @mutual_recursion1() #0 { define void @mutual_recursion1() #0 {
; IS__TUNIT____: Function Attrs: nofree noinline nosync nounwind readnone uwtable willreturn ; CHECK: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@mutual_recursion1 ; CHECK-LABEL: define {{[^@]+}}@mutual_recursion1
; IS__TUNIT____-SAME: () #[[ATTR3]] { ; CHECK-SAME: () #[[ATTR3]] {
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC_OPM: Function Attrs: nofree noinline nosync nounwind readnone uwtable willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@mutual_recursion1
; IS__CGSCC_OPM-SAME: () #[[ATTR4:[0-9]+]] {
; IS__CGSCC_OPM-NEXT: ret void
;
; IS__CGSCC_NPM: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@mutual_recursion1
; IS__CGSCC_NPM-SAME: () #[[ATTR3]] {
; IS__CGSCC_NPM-NEXT: ret void
; ;
call void @mutual_recursion2() call void @mutual_recursion2()
ret void ret void
} }
define void @mutual_recursion2() #0 { define void @mutual_recursion2() #0 {
; IS__TUNIT____: Function Attrs: nofree noinline nosync nounwind readnone uwtable willreturn ; CHECK: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@mutual_recursion2 ; CHECK-LABEL: define {{[^@]+}}@mutual_recursion2
; IS__TUNIT____-SAME: () #[[ATTR3]] { ; CHECK-SAME: () #[[ATTR3]] {
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC_OPM: Function Attrs: nofree noinline nosync nounwind readnone uwtable willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@mutual_recursion2
; IS__CGSCC_OPM-SAME: () #[[ATTR4]] {
; IS__CGSCC_OPM-NEXT: ret void
;
; IS__CGSCC_NPM: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@mutual_recursion2
; IS__CGSCC_NPM-SAME: () #[[ATTR3]] {
; IS__CGSCC_NPM-NEXT: ret void
; ;
call void @mutual_recursion1() call void @mutual_recursion1()
ret void ret void
} }
; TEST 5 ; TEST 5
; C++ delete operation (negative case) ; C++ delete operation (negative case)
▲ Show 20 Lines • Show All 43 Lines • ▼ Show 20 Lines
; Call function declaration with "nofree" ; Call function declaration with "nofree"
; CHECK: Function Attrs: nofree noinline nounwind readnone uwtable ; CHECK: Function Attrs: nofree noinline nounwind readnone uwtable
; CHECK-NEXT: declare void @nofree_function() ; CHECK-NEXT: declare void @nofree_function()
declare void @nofree_function() nofree readnone #0 declare void @nofree_function() nofree readnone #0
define void @call_nofree_function() #0 { define void @call_nofree_function() #0 {
; IS__TUNIT____: Function Attrs: nofree noinline nosync nounwind readnone uwtable willreturn ; CHECK: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@call_nofree_function ; CHECK-LABEL: define {{[^@]+}}@call_nofree_function
; IS__TUNIT____-SAME: () #[[ATTR3]] { ; CHECK-SAME: () #[[ATTR3]] {
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@call_nofree_function
; IS__CGSCC____-SAME: () #[[ATTR3]] {
; IS__CGSCC____-NEXT: ret void
; ;
tail call void @nofree_function() tail call void @nofree_function()
ret void ret void
} }
; TEST 8 (negative case) ; TEST 8 (negative case)
; Call function declaration without "nofree" ; Call function declaration without "nofree"
Show All 33 Lines
; TEST 10 (positive case) ; TEST 10 (positive case)
; Call intrinsic function ; Call intrinsic function
; CHECK: Function Attrs: nofree nosync nounwind readnone speculatable willreturn ; CHECK: Function Attrs: nofree nosync nounwind readnone speculatable willreturn
; CHECK-NEXT: declare float @llvm.floor.f32(float) ; CHECK-NEXT: declare float @llvm.floor.f32(float)
declare float @llvm.floor.f32(float) declare float @llvm.floor.f32(float)
define void @call_floor(float %a) #0 { define void @call_floor(float %a) #0 {
; IS__TUNIT____: Function Attrs: nofree noinline nosync nounwind readnone uwtable willreturn ; CHECK: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@call_floor ; CHECK-LABEL: define {{[^@]+}}@call_floor
; IS__TUNIT____-SAME: (float [[A:%.*]]) #[[ATTR3]] { ; CHECK-SAME: (float [[A:%.*]]) #[[ATTR3]] {
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@call_floor
; IS__CGSCC____-SAME: (float [[A:%.*]]) #[[ATTR3]] {
; IS__CGSCC____-NEXT: ret void
; ;
tail call float @llvm.floor.f32(float %a) tail call float @llvm.floor.f32(float %a)
ret void ret void
} }
define float @call_floor2(float %a) #0 { define float @call_floor2(float %a) #0 {
; IS__TUNIT____: Function Attrs: nofree noinline nosync nounwind readnone uwtable willreturn ; CHECK: Function Attrs: nofree noinline nosync nounwind readnone uwtable willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@call_floor2 ; CHECK-LABEL: define {{[^@]+}}@call_floor2
; IS__TUNIT____-SAME: (float [[A:%.*]]) #[[ATTR3]] { ; CHECK-SAME: (float [[A:%.*]]) #[[ATTR6:[0-9]+]] {
; IS__TUNIT____-NEXT: [[C:%.*]] = tail call float @llvm.floor.f32(float [[A]]) #[[ATTR10:[0-9]+]] ; CHECK-NEXT: [[C:%.*]] = tail call float @llvm.floor.f32(float [[A]]) #[[ATTR11:[0-9]+]]
; IS__TUNIT____-NEXT: ret float [[C]] ; CHECK-NEXT: ret float [[C]]
;
; IS__CGSCC_OPM: Function Attrs: nofree noinline nosync nounwind readnone uwtable willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@call_floor2
; IS__CGSCC_OPM-SAME: (float [[A:%.*]]) #[[ATTR4]] {
; IS__CGSCC_OPM-NEXT: [[C:%.*]] = tail call float @llvm.floor.f32(float [[A]]) #[[ATTR11:[0-9]+]]
; IS__CGSCC_OPM-NEXT: ret float [[C]]
;
; IS__CGSCC_NPM: Function Attrs: nofree noinline nosync nounwind readnone uwtable willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@call_floor2
; IS__CGSCC_NPM-SAME: (float [[A:%.*]]) #[[ATTR6:[0-9]+]] {
; IS__CGSCC_NPM-NEXT: [[C:%.*]] = tail call float @llvm.floor.f32(float [[A]]) #[[ATTR11:[0-9]+]]
; IS__CGSCC_NPM-NEXT: ret float [[C]]
; ;
%c = tail call float @llvm.floor.f32(float %a) %c = tail call float @llvm.floor.f32(float %a)
ret float %c ret float %c
} }
; TEST 11 (positive case) ; TEST 11 (positive case)
; Check propagation. ; Check propagation.
define void @f1() #0 { define void @f1() #0 {
; IS__TUNIT____: Function Attrs: nofree noinline nosync nounwind readnone uwtable willreturn ; CHECK: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@f1 ; CHECK-LABEL: define {{[^@]+}}@f1
; IS__TUNIT____-SAME: () #[[ATTR3]] { ; CHECK-SAME: () #[[ATTR3]] {
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@f1
; IS__CGSCC____-SAME: () #[[ATTR3]] {
; IS__CGSCC____-NEXT: ret void
; ;
tail call void @nofree_function() tail call void @nofree_function()
ret void ret void
} }
define void @f2() #0 { define void @f2() #0 {
; IS__TUNIT____: Function Attrs: nofree noinline nosync nounwind readnone uwtable willreturn ; CHECK: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@f2 ; CHECK-LABEL: define {{[^@]+}}@f2
; IS__TUNIT____-SAME: () #[[ATTR3]] { ; CHECK-SAME: () #[[ATTR3]] {
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@f2
; IS__CGSCC____-SAME: () #[[ATTR3]] {
; IS__CGSCC____-NEXT: ret void
; ;
tail call void @f1() tail call void @f1()
ret void ret void
} }
; TEST 12 NoFree argument - positive. ; TEST 12 NoFree argument - positive.
define double @test12(double* nocapture readonly %a) { define double @test12(double* nocapture readonly %a) {
; IS__TUNIT____: Function Attrs: nofree nounwind ; CHECK: Function Attrs: nofree nounwind
; IS__TUNIT____-LABEL: define {{[^@]+}}@test12 ; CHECK-LABEL: define {{[^@]+}}@test12
; IS__TUNIT____-SAME: (double* nocapture nofree noundef nonnull readonly align 8 dereferenceable(8) [[A:%.*]]) #[[ATTR6:[0-9]+]] { ; CHECK-SAME: (double* nocapture nofree noundef nonnull readonly align 8 dereferenceable(8) [[A:%.*]]) #[[ATTR7:[0-9]+]] {
; IS__TUNIT____-NEXT: entry: ; CHECK-NEXT: entry:
; IS__TUNIT____-NEXT: [[TMP0:%.*]] = load double, double* [[A]], align 8 ; CHECK-NEXT: [[TMP0:%.*]] = load double, double* [[A]], align 8
; IS__TUNIT____-NEXT: [[CALL:%.*]] = tail call double @cos(double [[TMP0]]) #[[ATTR2]] ; CHECK-NEXT: [[CALL:%.*]] = tail call double @cos(double [[TMP0]]) #[[ATTR2]]
; IS__TUNIT____-NEXT: ret double [[CALL]] ; CHECK-NEXT: ret double [[CALL]]
;
; IS__CGSCC____: Function Attrs: nofree nounwind
; IS__CGSCC____-LABEL: define {{[^@]+}}@test12
; IS__CGSCC____-SAME: (double* nocapture nofree noundef nonnull readonly align 8 dereferenceable(8) [[A:%.*]]) #[[ATTR7:[0-9]+]] {
; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: [[TMP0:%.*]] = load double, double* [[A]], align 8
; IS__CGSCC____-NEXT: [[CALL:%.*]] = tail call double @cos(double [[TMP0]]) #[[ATTR2]]
; IS__CGSCC____-NEXT: ret double [[CALL]]
; ;
entry: entry:
%0 = load double, double* %a, align 8 %0 = load double, double* %a, align 8
%call = tail call double @cos(double %0) #2 %call = tail call double @cos(double %0) #2
ret double %call ret double %call
} }
declare double @cos(double) nobuiltin nounwind nofree declare double @cos(double) nobuiltin nounwind nofree
Show All 32 Lines
define void @nonnull_assume_pos(i8* %arg1, i8* %arg2, i8* %arg3, i8* %arg4) { define void @nonnull_assume_pos(i8* %arg1, i8* %arg2, i8* %arg3, i8* %arg4) {
; ATTRIBUTOR-LABEL: define {{[^@]+}}@nonnull_assume_pos ; ATTRIBUTOR-LABEL: define {{[^@]+}}@nonnull_assume_pos
; ATTRIBUTOR-SAME: (i8* nofree [[ARG1:%.*]], i8* [[ARG2:%.*]], i8* nofree [[ARG3:%.*]], i8* [[ARG4:%.*]]) ; ATTRIBUTOR-SAME: (i8* nofree [[ARG1:%.*]], i8* [[ARG2:%.*]], i8* nofree [[ARG3:%.*]], i8* [[ARG4:%.*]])
; ATTRIBUTOR-NEXT: call void @llvm.assume(i1 true) #11 [ "nofree"(i8* [[ARG1]]), "nofree"(i8* [[ARG3]]) ] ; ATTRIBUTOR-NEXT: call void @llvm.assume(i1 true) #11 [ "nofree"(i8* [[ARG1]]), "nofree"(i8* [[ARG3]]) ]
; ATTRIBUTOR-NEXT: call void @unknown(i8* nofree [[ARG1]], i8* [[ARG2]], i8* nofree [[ARG3]], i8* [[ARG4]]) ; ATTRIBUTOR-NEXT: call void @unknown(i8* nofree [[ARG1]], i8* [[ARG2]], i8* nofree [[ARG3]], i8* [[ARG4]])
; ATTRIBUTOR-NEXT: ret void ; ATTRIBUTOR-NEXT: ret void
; ;
; IS__TUNIT____-LABEL: define {{[^@]+}}@nonnull_assume_pos ; CHECK-LABEL: define {{[^@]+}}@nonnull_assume_pos
; IS__TUNIT____-SAME: (i8* nofree [[ARG1:%.*]], i8* [[ARG2:%.*]], i8* nofree [[ARG3:%.*]], i8* [[ARG4:%.*]]) { ; CHECK-SAME: (i8* nofree [[ARG1:%.*]], i8* [[ARG2:%.*]], i8* nofree [[ARG3:%.*]], i8* [[ARG4:%.*]]) {
; IS__TUNIT____-NEXT: call void @llvm.assume(i1 noundef true) #[[ATTR11:[0-9]+]] [ "nofree"(i8* [[ARG1]]), "nofree"(i8* [[ARG3]]) ] ; CHECK-NEXT: call void @llvm.assume(i1 noundef true) #[[ATTR12:[0-9]+]] [ "nofree"(i8* [[ARG1]]), "nofree"(i8* [[ARG3]]) ]
; IS__TUNIT____-NEXT: call void @unknown(i8* nofree [[ARG1]], i8* [[ARG2]], i8* nofree [[ARG3]], i8* [[ARG4]]) ; CHECK-NEXT: call void @unknown(i8* nofree [[ARG1]], i8* [[ARG2]], i8* nofree [[ARG3]], i8* [[ARG4]])
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____-LABEL: define {{[^@]+}}@nonnull_assume_pos
; IS__CGSCC____-SAME: (i8* nofree [[ARG1:%.*]], i8* [[ARG2:%.*]], i8* nofree [[ARG3:%.*]], i8* [[ARG4:%.*]]) {
; IS__CGSCC____-NEXT: call void @llvm.assume(i1 noundef true) #[[ATTR12:[0-9]+]] [ "nofree"(i8* [[ARG1]]), "nofree"(i8* [[ARG3]]) ]
; IS__CGSCC____-NEXT: call void @unknown(i8* nofree [[ARG1]], i8* [[ARG2]], i8* nofree [[ARG3]], i8* [[ARG4]])
; IS__CGSCC____-NEXT: ret void
; ;
call void @llvm.assume(i1 true) ["nofree"(i8* %arg1), "nofree"(i8* %arg3)] call void @llvm.assume(i1 true) ["nofree"(i8* %arg1), "nofree"(i8* %arg3)]
call void @unknown(i8* %arg1, i8* %arg2, i8* %arg3, i8* %arg4) call void @unknown(i8* %arg1, i8* %arg2, i8* %arg3, i8* %arg4)
ret void ret void
} }
define void @nonnull_assume_neg(i8* %arg1, i8* %arg2, i8* %arg3, i8* %arg4) { define void @nonnull_assume_neg(i8* %arg1, i8* %arg2, i8* %arg3, i8* %arg4) {
; ATTRIBUTOR-LABEL: define {{[^@]+}}@nonnull_assume_neg ; ATTRIBUTOR-LABEL: define {{[^@]+}}@nonnull_assume_neg
; ATTRIBUTOR-SAME: (i8* [[ARG1:%.*]], i8* [[ARG2:%.*]], i8* [[ARG3:%.*]], i8* [[ARG4:%.*]]) ; ATTRIBUTOR-SAME: (i8* [[ARG1:%.*]], i8* [[ARG2:%.*]], i8* [[ARG3:%.*]], i8* [[ARG4:%.*]])
▲ Show 20 Lines • Show All 61 Lines • ▼ Show 20 Lines
declare void @use_i8_ptr_ret(i8* nocapture readnone) nounwind willreturn declare void @use_i8_ptr_ret(i8* nocapture readnone) nounwind willreturn
declare noalias i8* @malloc(i64) declare noalias i8* @malloc(i64)
attributes #0 = { nounwind uwtable noinline } attributes #0 = { nounwind uwtable noinline }
attributes #1 = { nounwind } attributes #1 = { nounwind }
attributes #2 = { nobuiltin nounwind } attributes #2 = { nobuiltin nounwind }
;. ;.
; IS__TUNIT____: attributes #[[ATTR0]] = { nounwind } ; CHECK: attributes #[[ATTR0]] = { nounwind }
; IS__TUNIT____: attributes #[[ATTR1]] = { noinline nounwind uwtable } ; CHECK: attributes #[[ATTR1]] = { noinline nounwind uwtable }
; IS__TUNIT____: attributes #[[ATTR2]] = { nobuiltin nounwind } ; CHECK: attributes #[[ATTR2]] = { nobuiltin nounwind }
; IS__TUNIT____: attributes #[[ATTR3]] = { nofree noinline nosync nounwind readnone uwtable willreturn } ; CHECK: attributes #[[ATTR3]] = { nofree noinline norecurse nosync nounwind readnone uwtable willreturn }
; IS__TUNIT____: attributes #[[ATTR4:[0-9]+]] = { nofree noinline nounwind readnone uwtable } ; CHECK: attributes #[[ATTR4:[0-9]+]] = { nofree noinline nounwind readnone uwtable }
; IS__TUNIT____: attributes #[[ATTR5:[0-9]+]] = { nofree nosync nounwind readnone speculatable willreturn } ; CHECK: attributes #[[ATTR5:[0-9]+]] = { nofree nosync nounwind readnone speculatable willreturn }
; IS__TUNIT____: attributes #[[ATTR6]] = { nofree nounwind } ; CHECK: attributes #[[ATTR6]] = { nofree noinline nosync nounwind readnone uwtable willreturn }
; IS__TUNIT____: attributes #[[ATTR7:[0-9]+]] = { nobuiltin nofree nounwind } ; CHECK: attributes #[[ATTR7]] = { nofree nounwind }
; IS__TUNIT____: attributes #[[ATTR8:[0-9]+]] = { inaccessiblememonly nofree nosync nounwind willreturn } ; CHECK: attributes #[[ATTR8:[0-9]+]] = { nobuiltin nofree nounwind }
; IS__TUNIT____: attributes #[[ATTR9:[0-9]+]] = { nounwind willreturn } ; CHECK: attributes #[[ATTR9:[0-9]+]] = { inaccessiblememonly nofree nosync nounwind willreturn }
; IS__TUNIT____: attributes #[[ATTR10]] = { readnone willreturn } ; CHECK: attributes #[[ATTR10:[0-9]+]] = { nounwind willreturn }
; IS__TUNIT____: attributes #[[ATTR11]] = { willreturn } ; CHECK: attributes #[[ATTR11]] = { readnone willreturn }
;. ; CHECK: attributes #[[ATTR12]] = { willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR0]] = { nounwind }
; IS__CGSCC_OPM: attributes #[[ATTR1]] = { noinline nounwind uwtable }
; IS__CGSCC_OPM: attributes #[[ATTR2]] = { nobuiltin nounwind }
; IS__CGSCC_OPM: attributes #[[ATTR3]] = { nofree noinline norecurse nosync nounwind readnone uwtable willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR4]] = { nofree noinline nosync nounwind readnone uwtable willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR5:[0-9]+]] = { nofree noinline nounwind readnone uwtable }
; IS__CGSCC_OPM: attributes #[[ATTR6:[0-9]+]] = { nofree nosync nounwind readnone speculatable willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR7]] = { nofree nounwind }
; IS__CGSCC_OPM: attributes #[[ATTR8:[0-9]+]] = { nobuiltin nofree nounwind }
; IS__CGSCC_OPM: attributes #[[ATTR9:[0-9]+]] = { inaccessiblememonly nofree nosync nounwind willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR10:[0-9]+]] = { nounwind willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR11]] = { readnone willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR12]] = { willreturn }
;.
; IS__CGSCC_NPM: attributes #[[ATTR0]] = { nounwind }
; IS__CGSCC_NPM: attributes #[[ATTR1]] = { noinline nounwind uwtable }
; IS__CGSCC_NPM: attributes #[[ATTR2]] = { nobuiltin nounwind }
; IS__CGSCC_NPM: attributes #[[ATTR3]] = { nofree noinline norecurse nosync nounwind readnone uwtable willreturn }
; IS__CGSCC_NPM: attributes #[[ATTR4:[0-9]+]] = { nofree noinline nounwind readnone uwtable }
; IS__CGSCC_NPM: attributes #[[ATTR5:[0-9]+]] = { nofree nosync nounwind readnone speculatable willreturn }
; IS__CGSCC_NPM: attributes #[[ATTR6]] = { nofree noinline nosync nounwind readnone uwtable willreturn }
; IS__CGSCC_NPM: attributes #[[ATTR7]] = { nofree nounwind }
; IS__CGSCC_NPM: attributes #[[ATTR8:[0-9]+]] = { nobuiltin nofree nounwind }
; IS__CGSCC_NPM: attributes #[[ATTR9:[0-9]+]] = { inaccessiblememonly nofree nosync nounwind willreturn }
; IS__CGSCC_NPM: attributes #[[ATTR10:[0-9]+]] = { nounwind willreturn }
; IS__CGSCC_NPM: attributes #[[ATTR11]] = { readnone willreturn }
; IS__CGSCC_NPM: attributes #[[ATTR12]] = { willreturn }
;. ;.

llvm/test/Transforms/Attributor/nonnull.ll

Show All 16 Lines
; CHECK-NEXT: ret i8* [[RET]] ; CHECK-NEXT: ret i8* [[RET]]
; ;
%ret = call i8* @ret_nonnull() %ret = call i8* @ret_nonnull()
ret i8* %ret ret i8* %ret
} }
; Return a pointer trivially nonnull (argument attribute) ; Return a pointer trivially nonnull (argument attribute)
define i8* @test2(i8* nonnull %p) { define i8* @test2(i8* nonnull %p) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@test2 ; CHECK-LABEL: define {{[^@]+}}@test2
; IS__TUNIT____-SAME: (i8* nofree nonnull readnone returned "no-capture-maybe-returned" [[P:%.*]]) #[[ATTR1:[0-9]+]] { ; CHECK-SAME: (i8* nofree nonnull readnone returned "no-capture-maybe-returned" [[P:%.*]]) #[[ATTR1:[0-9]+]] {
; IS__TUNIT____-NEXT: ret i8* [[P]] ; CHECK-NEXT: ret i8* [[P]]
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@test2
; IS__CGSCC____-SAME: (i8* nofree nonnull readnone returned "no-capture-maybe-returned" [[P:%.*]]) #[[ATTR1:[0-9]+]] {
; IS__CGSCC____-NEXT: ret i8* [[P]]
; ;
ret i8* %p ret i8* %p
} }
define i8* @test2A(i1 %c, i8* %ret) { define i8* @test2A(i1 %c, i8* %ret) {
; NOT_CGSCC_OPM: Function Attrs: inaccessiblememonly nofree nosync nounwind willreturn ; CHECK: Function Attrs: inaccessiblememonly nofree nosync nounwind willreturn
; NOT_CGSCC_OPM-LABEL: define {{[^@]+}}@test2A ; CHECK-LABEL: define {{[^@]+}}@test2A
; NOT_CGSCC_OPM-SAME: (i1 [[C:%.*]], i8* nofree nonnull readnone returned "no-capture-maybe-returned" [[RET:%.*]]) #[[ATTR0:[0-9]+]] { ; CHECK-SAME: (i1 [[C:%.*]], i8* nofree nonnull readnone returned "no-capture-maybe-returned" [[RET:%.*]]) #[[ATTR0:[0-9]+]] {
; NOT_CGSCC_OPM-NEXT: br i1 [[C]], label [[A:%.*]], label [[B:%.*]] ; CHECK-NEXT: br i1 [[C]], label [[A:%.*]], label [[B:%.*]]
; NOT_CGSCC_OPM: A: ; CHECK: A:
; NOT_CGSCC_OPM-NEXT: call void @llvm.assume(i1 noundef true) #[[ATTR11:[0-9]+]] [ "nonnull"(i8* [[RET]]) ] ; CHECK-NEXT: call void @llvm.assume(i1 noundef true) #[[ATTR11:[0-9]+]] [ "nonnull"(i8* [[RET]]) ]
; NOT_CGSCC_OPM-NEXT: ret i8* [[RET]] ; CHECK-NEXT: ret i8* [[RET]]
; NOT_CGSCC_OPM: B: ; CHECK: B:
; NOT_CGSCC_OPM-NEXT: call void @llvm.assume(i1 noundef true) #[[ATTR11]] [ "nonnull"(i8* [[RET]]) ] ; CHECK-NEXT: call void @llvm.assume(i1 noundef true) #[[ATTR11]] [ "nonnull"(i8* [[RET]]) ]
; NOT_CGSCC_OPM-NEXT: ret i8* [[RET]] ; CHECK-NEXT: ret i8* [[RET]]
;
; IS__CGSCC_OPM: Function Attrs: inaccessiblememonly nofree nosync nounwind willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@test2A
; IS__CGSCC_OPM-SAME: (i1 [[C:%.*]], i8* nofree nonnull readnone returned "no-capture-maybe-returned" [[RET:%.*]]) #[[ATTR0:[0-9]+]] {
; IS__CGSCC_OPM-NEXT: br i1 [[C]], label [[A:%.*]], label [[B:%.*]]
; IS__CGSCC_OPM: A:
; IS__CGSCC_OPM-NEXT: call void @llvm.assume(i1 noundef true) #[[ATTR12:[0-9]+]] [ "nonnull"(i8* [[RET]]) ]
; IS__CGSCC_OPM-NEXT: ret i8* [[RET]]
; IS__CGSCC_OPM: B:
; IS__CGSCC_OPM-NEXT: call void @llvm.assume(i1 noundef true) #[[ATTR12]] [ "nonnull"(i8* [[RET]]) ]
; IS__CGSCC_OPM-NEXT: ret i8* [[RET]]
; ;
br i1 %c, label %A, label %B br i1 %c, label %A, label %B
A: A:
call void @llvm.assume(i1 true) [ "nonnull"(i8* %ret) ] call void @llvm.assume(i1 true) [ "nonnull"(i8* %ret) ]
ret i8* %ret ret i8* %ret
B: B:
call void @llvm.assume(i1 true) [ "nonnull"(i8* %ret) ] call void @llvm.assume(i1 true) [ "nonnull"(i8* %ret) ]
ret i8* %ret ret i8* %ret
} }
define i8* @test2B(i1 %c, i8* %ret) { define i8* @test2B(i1 %c, i8* %ret) {
; NOT_CGSCC_OPM: Function Attrs: inaccessiblememonly nofree nosync nounwind willreturn ; CHECK: Function Attrs: inaccessiblememonly nofree nosync nounwind willreturn
; NOT_CGSCC_OPM-LABEL: define {{[^@]+}}@test2B ; CHECK-LABEL: define {{[^@]+}}@test2B
; NOT_CGSCC_OPM-SAME: (i1 [[C:%.*]], i8* nofree nonnull readnone returned dereferenceable(4) "no-capture-maybe-returned" [[RET:%.*]]) #[[ATTR0]] { ; CHECK-SAME: (i1 [[C:%.*]], i8* nofree nonnull readnone returned dereferenceable(4) "no-capture-maybe-returned" [[RET:%.*]]) #[[ATTR0]] {
; NOT_CGSCC_OPM-NEXT: br i1 [[C]], label [[A:%.*]], label [[B:%.*]] ; CHECK-NEXT: br i1 [[C]], label [[A:%.*]], label [[B:%.*]]
; NOT_CGSCC_OPM: A: ; CHECK: A:
; NOT_CGSCC_OPM-NEXT: call void @llvm.assume(i1 noundef true) #[[ATTR11]] [ "dereferenceable"(i8* [[RET]], i32 4) ] ; CHECK-NEXT: call void @llvm.assume(i1 noundef true) #[[ATTR11]] [ "dereferenceable"(i8* [[RET]], i32 4) ]
; NOT_CGSCC_OPM-NEXT: ret i8* [[RET]] ; CHECK-NEXT: ret i8* [[RET]]
; NOT_CGSCC_OPM: B: ; CHECK: B:
; NOT_CGSCC_OPM-NEXT: call void @llvm.assume(i1 noundef true) #[[ATTR11]] [ "dereferenceable"(i8* [[RET]], i32 4) ] ; CHECK-NEXT: call void @llvm.assume(i1 noundef true) #[[ATTR11]] [ "dereferenceable"(i8* [[RET]], i32 4) ]
; NOT_CGSCC_OPM-NEXT: ret i8* [[RET]] ; CHECK-NEXT: ret i8* [[RET]]
;
; IS__CGSCC_OPM: Function Attrs: inaccessiblememonly nofree nosync nounwind willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@test2B
; IS__CGSCC_OPM-SAME: (i1 [[C:%.*]], i8* nofree nonnull readnone returned dereferenceable(4) "no-capture-maybe-returned" [[RET:%.*]]) #[[ATTR0]] {
; IS__CGSCC_OPM-NEXT: br i1 [[C]], label [[A:%.*]], label [[B:%.*]]
; IS__CGSCC_OPM: A:
; IS__CGSCC_OPM-NEXT: call void @llvm.assume(i1 noundef true) #[[ATTR12]] [ "dereferenceable"(i8* [[RET]], i32 4) ]
; IS__CGSCC_OPM-NEXT: ret i8* [[RET]]
; IS__CGSCC_OPM: B:
; IS__CGSCC_OPM-NEXT: call void @llvm.assume(i1 noundef true) #[[ATTR12]] [ "dereferenceable"(i8* [[RET]], i32 4) ]
; IS__CGSCC_OPM-NEXT: ret i8* [[RET]]
; ;
br i1 %c, label %A, label %B br i1 %c, label %A, label %B
A: A:
call void @llvm.assume(i1 true) [ "dereferenceable"(i8* %ret, i32 4) ] call void @llvm.assume(i1 true) [ "dereferenceable"(i8* %ret, i32 4) ]
ret i8* %ret ret i8* %ret
B: B:
call void @llvm.assume(i1 true) [ "dereferenceable"(i8* %ret, i32 4) ] call void @llvm.assume(i1 true) [ "dereferenceable"(i8* %ret, i32 4) ]
ret i8* %ret ret i8* %ret
Show All 39 Lines;
%ret = call i8* @ret_nonnull() %ret = call i8* @ret_nonnull()
ret i8* %ret ret i8* %ret
} }
; Given a mutual recursive set of functions, we can mark them ; Given a mutual recursive set of functions, we can mark them
; nonnull if neither can ever return null. (In this case, they ; nonnull if neither can ever return null. (In this case, they
; just never return period.) ; just never return period.)
define i8* @test4_helper() { define i8* @test4_helper() {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@test4_helper ; CHECK-LABEL: define {{[^@]+}}@test4_helper
; IS__TUNIT____-SAME: () #[[ATTR1]] { ; CHECK-SAME: () #[[ATTR1]] {
; IS__TUNIT____-NEXT: ret i8* undef ; CHECK-NEXT: ret i8* undef
;
; IS__CGSCC_OPM: Function Attrs: nofree nosync nounwind readnone willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@test4_helper
; IS__CGSCC_OPM-SAME: () #[[ATTR2:[0-9]+]] {
; IS__CGSCC_OPM-NEXT: ret i8* undef
;
; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@test4_helper
; IS__CGSCC_NPM-SAME: () #[[ATTR1]] {
; IS__CGSCC_NPM-NEXT: ret i8* undef
; ;
%ret = call i8* @test4() %ret = call i8* @test4()
ret i8* %ret ret i8* %ret
} }
define i8* @test4() { define i8* @test4() {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@test4 ; CHECK-LABEL: define {{[^@]+}}@test4
; IS__TUNIT____-SAME: () #[[ATTR1]] { ; CHECK-SAME: () #[[ATTR1]] {
; IS__TUNIT____-NEXT: ret i8* undef ; CHECK-NEXT: ret i8* undef
;
; IS__CGSCC_OPM: Function Attrs: nofree nosync nounwind readnone willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@test4
; IS__CGSCC_OPM-SAME: () #[[ATTR2]] {
; IS__CGSCC_OPM-NEXT: ret i8* undef
;
; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@test4
; IS__CGSCC_NPM-SAME: () #[[ATTR1]] {
; IS__CGSCC_NPM-NEXT: ret i8* undef
; ;
%ret = call i8* @test4_helper() %ret = call i8* @test4_helper()
ret i8* %ret ret i8* %ret
} }
; Given a mutual recursive set of functions which *can* return null ; Given a mutual recursive set of functions which *can* return null
; make sure we haven't marked them as nonnull. ; make sure we haven't marked them as nonnull.
define i8* @test5_helper(i1 %c) { define i8* @test5_helper(i1 %c) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@test5_helper ; CHECK-LABEL: define {{[^@]+}}@test5_helper
; IS__TUNIT____-SAME: (i1 [[C:%.*]]) #[[ATTR1]] { ; CHECK-SAME: (i1 [[C:%.*]]) #[[ATTR1]] {
; IS__TUNIT____-NEXT: br i1 [[C]], label [[REC:%.*]], label [[END:%.*]] ; CHECK-NEXT: br i1 [[C]], label [[REC:%.*]], label [[END:%.*]]
; IS__TUNIT____: rec: ; CHECK: rec:
; IS__TUNIT____-NEXT: br label [[END]] ; CHECK-NEXT: br label [[END]]
; IS__TUNIT____: end: ; CHECK: end:
; IS__TUNIT____-NEXT: ret i8* null ; CHECK-NEXT: ret i8* null
;
; IS__CGSCC_OPM: Function Attrs: nofree nosync nounwind readnone willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@test5_helper
; IS__CGSCC_OPM-SAME: (i1 [[C:%.*]]) #[[ATTR2]] {
; IS__CGSCC_OPM-NEXT: br i1 [[C]], label [[REC:%.*]], label [[END:%.*]]
; IS__CGSCC_OPM: rec:
; IS__CGSCC_OPM-NEXT: br label [[END]]
; IS__CGSCC_OPM: end:
; IS__CGSCC_OPM-NEXT: ret i8* null
;
; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@test5_helper
; IS__CGSCC_NPM-SAME: (i1 [[C:%.*]]) #[[ATTR1]] {
; IS__CGSCC_NPM-NEXT: br i1 [[C]], label [[REC:%.*]], label [[END:%.*]]
; IS__CGSCC_NPM: rec:
; IS__CGSCC_NPM-NEXT: br label [[END]]
; IS__CGSCC_NPM: end:
; IS__CGSCC_NPM-NEXT: ret i8* null
; ;
br i1 %c, label %rec, label %end br i1 %c, label %rec, label %end
rec: rec:
%ret = call i8* @test5(i1 %c) %ret = call i8* @test5(i1 %c)
br label %end br label %end
end: end:
ret i8* null ret i8* null
} }
define i8* @test5(i1 %c) { define i8* @test5(i1 %c) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@test5 ; CHECK-LABEL: define {{[^@]+}}@test5
; IS__TUNIT____-SAME: (i1 [[C:%.*]]) #[[ATTR1]] { ; CHECK-SAME: (i1 [[C:%.*]]) #[[ATTR1]] {
; IS__TUNIT____-NEXT: ret i8* null ; CHECK-NEXT: ret i8* null
;
; IS__CGSCC_OPM: Function Attrs: nofree nosync nounwind readnone willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@test5
; IS__CGSCC_OPM-SAME: (i1 [[C:%.*]]) #[[ATTR2]] {
; IS__CGSCC_OPM-NEXT: ret i8* null
;
; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@test5
; IS__CGSCC_NPM-SAME: (i1 [[C:%.*]]) #[[ATTR1]] {
; IS__CGSCC_NPM-NEXT: ret i8* null
; ;
%ret = call i8* @test5_helper(i1 %c) %ret = call i8* @test5_helper(i1 %c)
ret i8* %ret ret i8* %ret
} }
; Local analysis, but going through a self recursive phi ; Local analysis, but going through a self recursive phi
define i8* @test6a() { define i8* @test6a() {
; ;
; NOT_CGSCC_OPM: Function Attrs: noreturn ; CHECK: Function Attrs: noreturn
; NOT_CGSCC_OPM-LABEL: define {{[^@]+}}@test6a ; CHECK-LABEL: define {{[^@]+}}@test6a
; NOT_CGSCC_OPM-SAME: () #[[ATTR2:[0-9]+]] { ; CHECK-SAME: () #[[ATTR2:[0-9]+]] {
; NOT_CGSCC_OPM-NEXT: entry: ; CHECK-NEXT: entry:
; NOT_CGSCC_OPM-NEXT: [[RET:%.*]] = call i8* @ret_nonnull() ; CHECK-NEXT: [[RET:%.*]] = call i8* @ret_nonnull()
; NOT_CGSCC_OPM-NEXT: br label [[LOOP:%.*]] ; CHECK-NEXT: br label [[LOOP:%.*]]
; NOT_CGSCC_OPM: loop: ; CHECK: loop:
; NOT_CGSCC_OPM-NEXT: unreachable ; CHECK-NEXT: unreachable
; NOT_CGSCC_OPM: exit: ; CHECK: exit:
; NOT_CGSCC_OPM-NEXT: unreachable ; CHECK-NEXT: unreachable
;
; IS__CGSCC_OPM: Function Attrs: noreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@test6a
; IS__CGSCC_OPM-SAME: () #[[ATTR3:[0-9]+]] {
; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: [[RET:%.*]] = call i8* @ret_nonnull()
; IS__CGSCC_OPM-NEXT: br label [[LOOP:%.*]]
; IS__CGSCC_OPM: loop:
; IS__CGSCC_OPM-NEXT: unreachable
; IS__CGSCC_OPM: exit:
; IS__CGSCC_OPM-NEXT: unreachable
; ;
entry: entry:
%ret = call i8* @ret_nonnull() %ret = call i8* @ret_nonnull()
br label %loop br label %loop
loop: loop:
%phi = phi i8* [%ret, %entry], [%phi, %loop] %phi = phi i8* [%ret, %entry], [%phi, %loop]
br i1 undef, label %loop, label %exit br i1 undef, label %loop, label %exit
exit: exit:
Show All 18 Lines
loop: loop:
%phi = phi i8* [%ret, %entry], [%phi, %loop] %phi = phi i8* [%ret, %entry], [%phi, %loop]
br i1 %c, label %loop, label %exit br i1 %c, label %loop, label %exit
exit: exit:
ret i8* %phi ret i8* %phi
} }
define i8* @test7(i8* %a) { define i8* @test7(i8* %a) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@test7 ; CHECK-LABEL: define {{[^@]+}}@test7
; IS__TUNIT____-SAME: (i8* nofree readnone returned "no-capture-maybe-returned" [[A:%.*]]) #[[ATTR1]] { ; CHECK-SAME: (i8* nofree readnone returned "no-capture-maybe-returned" [[A:%.*]]) #[[ATTR1]] {
; IS__TUNIT____-NEXT: ret i8* [[A]] ; CHECK-NEXT: ret i8* [[A]]
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@test7
; IS__CGSCC____-SAME: (i8* nofree readnone returned "no-capture-maybe-returned" [[A:%.*]]) #[[ATTR1]] {
; IS__CGSCC____-NEXT: ret i8* [[A]]
; ;
%b = getelementptr inbounds i8, i8* %a, i64 0 %b = getelementptr inbounds i8, i8* %a, i64 0
ret i8* %b ret i8* %b
} }
define i8* @test8(i8* %a) { define i8* @test8(i8* %a) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@test8 ; CHECK-LABEL: define {{[^@]+}}@test8
; IS__TUNIT____-SAME: (i8* nofree readnone "no-capture-maybe-returned" [[A:%.*]]) #[[ATTR1]] { ; CHECK-SAME: (i8* nofree readnone "no-capture-maybe-returned" [[A:%.*]]) #[[ATTR1]] {
; IS__TUNIT____-NEXT: [[B:%.*]] = getelementptr inbounds i8, i8* [[A]], i64 1 ; CHECK-NEXT: [[B:%.*]] = getelementptr inbounds i8, i8* [[A]], i64 1
; IS__TUNIT____-NEXT: ret i8* [[B]] ; CHECK-NEXT: ret i8* [[B]]
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@test8
; IS__CGSCC____-SAME: (i8* nofree readnone "no-capture-maybe-returned" [[A:%.*]]) #[[ATTR1]] {
; IS__CGSCC____-NEXT: [[B:%.*]] = getelementptr inbounds i8, i8* [[A]], i64 1
; IS__CGSCC____-NEXT: ret i8* [[B]]
; ;
%b = getelementptr inbounds i8, i8* %a, i64 1 %b = getelementptr inbounds i8, i8* %a, i64 1
ret i8* %b ret i8* %b
} }
define i8* @test9(i8* %a, i64 %n) { define i8* @test9(i8* %a, i64 %n) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@test9 ; CHECK-LABEL: define {{[^@]+}}@test9
; IS__TUNIT____-SAME: (i8* nofree readnone "no-capture-maybe-returned" [[A:%.*]], i64 [[N:%.*]]) #[[ATTR1]] { ; CHECK-SAME: (i8* nofree readnone "no-capture-maybe-returned" [[A:%.*]], i64 [[N:%.*]]) #[[ATTR1]] {
; IS__TUNIT____-NEXT: [[B:%.*]] = getelementptr inbounds i8, i8* [[A]], i64 [[N]] ; CHECK-NEXT: [[B:%.*]] = getelementptr inbounds i8, i8* [[A]], i64 [[N]]
; IS__TUNIT____-NEXT: ret i8* [[B]] ; CHECK-NEXT: ret i8* [[B]]
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@test9
; IS__CGSCC____-SAME: (i8* nofree readnone "no-capture-maybe-returned" [[A:%.*]], i64 [[N:%.*]]) #[[ATTR1]] {
; IS__CGSCC____-NEXT: [[B:%.*]] = getelementptr inbounds i8, i8* [[A]], i64 [[N]]
; IS__CGSCC____-NEXT: ret i8* [[B]]
; ;
%b = getelementptr inbounds i8, i8* %a, i64 %n %b = getelementptr inbounds i8, i8* %a, i64 %n
ret i8* %b ret i8* %b
} }
; ATTRIBUTOR_OPM: define i8* @test10 ; ATTRIBUTOR_OPM: define i8* @test10
; ATTRIBUTOR_NPM: define nonnull i8* @test10 ; ATTRIBUTOR_NPM: define nonnull i8* @test10
define i8* @test10(i8* %a, i64 %n) { define i8* @test10(i8* %a, i64 %n) {
; NOT_CGSCC_OPM: Function Attrs: inaccessiblememonly nofree nosync nounwind willreturn ; CHECK: Function Attrs: inaccessiblememonly nofree nosync nounwind willreturn
; NOT_CGSCC_OPM-LABEL: define {{[^@]+}}@test10 ; CHECK-LABEL: define {{[^@]+}}@test10
; NOT_CGSCC_OPM-SAME: (i8* nofree readnone "no-capture-maybe-returned" [[A:%.*]], i64 [[N:%.*]]) #[[ATTR0]] { ; CHECK-SAME: (i8* nofree readnone "no-capture-maybe-returned" [[A:%.*]], i64 [[N:%.*]]) #[[ATTR0]] {
; NOT_CGSCC_OPM-NEXT: call void @llvm.assume(i1 noundef true) #[[ATTR11]] ; CHECK-NEXT: call void @llvm.assume(i1 noundef true) #[[ATTR11]]
; NOT_CGSCC_OPM-NEXT: [[B:%.*]] = getelementptr inbounds i8, i8* [[A]], i64 [[N]] ; CHECK-NEXT: [[B:%.*]] = getelementptr inbounds i8, i8* [[A]], i64 [[N]]
; NOT_CGSCC_OPM-NEXT: ret i8* [[B]] ; CHECK-NEXT: ret i8* [[B]]
;
; IS__CGSCC_OPM: Function Attrs: inaccessiblememonly nofree nosync nounwind willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@test10
; IS__CGSCC_OPM-SAME: (i8* nofree readnone "no-capture-maybe-returned" [[A:%.*]], i64 [[N:%.*]]) #[[ATTR0]] {
; IS__CGSCC_OPM-NEXT: call void @llvm.assume(i1 noundef true) #[[ATTR12]]
; IS__CGSCC_OPM-NEXT: [[B:%.*]] = getelementptr inbounds i8, i8* [[A]], i64 [[N]]
; IS__CGSCC_OPM-NEXT: ret i8* [[B]]
; ;
%cmp = icmp ne i64 %n, 0 %cmp = icmp ne i64 %n, 0
call void @llvm.assume(i1 %cmp) call void @llvm.assume(i1 %cmp)
%b = getelementptr inbounds i8, i8* %a, i64 %n %b = getelementptr inbounds i8, i8* %a, i64 %n
ret i8* %b ret i8* %b
} }
; TEST 11 ; TEST 11
Show All 37 Lines;
tail call void @test12_helper(i8* %a) tail call void @test12_helper(i8* %a)
ret void ret void
} }
; TEST 13 ; TEST 13
; Simple Argument Tests ; Simple Argument Tests
declare i8* @unknown() declare i8* @unknown()
define void @test13_helper() { define void @test13_helper() {
; NOT_CGSCC_OPM-LABEL: define {{[^@]+}}@test13_helper() { ; CHECK-LABEL: define {{[^@]+}}@test13_helper() {
; NOT_CGSCC_OPM-NEXT: [[NONNULLPTR:%.*]] = tail call nonnull i8* @ret_nonnull() ; CHECK-NEXT: [[NONNULLPTR:%.*]] = tail call nonnull i8* @ret_nonnull()
; NOT_CGSCC_OPM-NEXT: [[MAYBENULLPTR:%.*]] = tail call i8* @unknown() ; CHECK-NEXT: [[MAYBENULLPTR:%.*]] = tail call i8* @unknown()
; NOT_CGSCC_OPM-NEXT: tail call void @test13(i8* noalias nocapture nofree nonnull readnone [[NONNULLPTR]], i8* noalias nocapture nofree nonnull readnone [[NONNULLPTR]], i8* noalias nocapture nofree readnone [[MAYBENULLPTR]]) #[[ATTR3:[0-9]+]] ; CHECK-NEXT: tail call void @test13(i8* noalias nocapture nofree nonnull readnone [[NONNULLPTR]], i8* noalias nocapture nofree nonnull readnone [[NONNULLPTR]], i8* noalias nocapture nofree readnone [[MAYBENULLPTR]]) #[[ATTR3:[0-9]+]]
; NOT_CGSCC_OPM-NEXT: tail call void @test13(i8* noalias nocapture nofree nonnull readnone [[NONNULLPTR]], i8* noalias nocapture nofree readnone [[MAYBENULLPTR]], i8* noalias nocapture nofree nonnull readnone [[NONNULLPTR]]) #[[ATTR3]] ; CHECK-NEXT: tail call void @test13(i8* noalias nocapture nofree nonnull readnone [[NONNULLPTR]], i8* noalias nocapture nofree readnone [[MAYBENULLPTR]], i8* noalias nocapture nofree nonnull readnone [[NONNULLPTR]]) #[[ATTR3]]
; NOT_CGSCC_OPM-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@test13_helper() {
; IS__CGSCC_OPM-NEXT: [[NONNULLPTR:%.*]] = tail call nonnull i8* @ret_nonnull()
; IS__CGSCC_OPM-NEXT: [[MAYBENULLPTR:%.*]] = tail call i8* @unknown()
; IS__CGSCC_OPM-NEXT: tail call void @test13(i8* noalias nocapture nofree nonnull readnone [[NONNULLPTR]], i8* noalias nocapture nofree nonnull readnone [[NONNULLPTR]], i8* noalias nocapture nofree readnone [[MAYBENULLPTR]]) #[[ATTR4:[0-9]+]]
; IS__CGSCC_OPM-NEXT: tail call void @test13(i8* noalias nocapture nofree nonnull readnone [[NONNULLPTR]], i8* noalias nocapture nofree readnone [[MAYBENULLPTR]], i8* noalias nocapture nofree nonnull readnone [[NONNULLPTR]]) #[[ATTR4]]
; IS__CGSCC_OPM-NEXT: ret void
; ;
%nonnullptr = tail call i8* @ret_nonnull() %nonnullptr = tail call i8* @ret_nonnull()
%maybenullptr = tail call i8* @unknown() %maybenullptr = tail call i8* @unknown()
tail call void @test13(i8* %nonnullptr, i8* %nonnullptr, i8* %maybenullptr) tail call void @test13(i8* %nonnullptr, i8* %nonnullptr, i8* %maybenullptr)
tail call void @test13(i8* %nonnullptr, i8* %maybenullptr, i8* %nonnullptr) tail call void @test13(i8* %nonnullptr, i8* %maybenullptr, i8* %nonnullptr)
ret void ret void
} }
define internal void @test13(i8* %a, i8* %b, i8* %c) { define internal void @test13(i8* %a, i8* %b, i8* %c) {
; ;
; NOT_CGSCC_OPM: Function Attrs: nounwind ; CHECK: Function Attrs: nounwind
; NOT_CGSCC_OPM-LABEL: define {{[^@]+}}@test13 ; CHECK-LABEL: define {{[^@]+}}@test13
; NOT_CGSCC_OPM-SAME: (i8* noalias nocapture nofree nonnull readnone [[A:%.*]], i8* noalias nocapture nofree readnone [[B:%.*]], i8* noalias nocapture nofree readnone [[C:%.*]]) #[[ATTR3]] { ; CHECK-SAME: (i8* noalias nocapture nofree nonnull readnone [[A:%.*]], i8* noalias nocapture nofree readnone [[B:%.*]], i8* noalias nocapture nofree readnone [[C:%.*]]) #[[ATTR3]] {
; NOT_CGSCC_OPM-NEXT: call void @use_i8_ptr(i8* noalias nocapture nofree nonnull readnone [[A]]) #[[ATTR3]] ; CHECK-NEXT: call void @use_i8_ptr(i8* noalias nocapture nofree nonnull readnone [[A]]) #[[ATTR3]]
; NOT_CGSCC_OPM-NEXT: call void @use_i8_ptr(i8* noalias nocapture nofree readnone [[B]]) #[[ATTR3]] ; CHECK-NEXT: call void @use_i8_ptr(i8* noalias nocapture nofree readnone [[B]]) #[[ATTR3]]
; NOT_CGSCC_OPM-NEXT: call void @use_i8_ptr(i8* noalias nocapture nofree readnone [[C]]) #[[ATTR3]] ; CHECK-NEXT: call void @use_i8_ptr(i8* noalias nocapture nofree readnone [[C]]) #[[ATTR3]]
; NOT_CGSCC_OPM-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC_OPM: Function Attrs: nounwind
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@test13
; IS__CGSCC_OPM-SAME: (i8* noalias nocapture nofree nonnull readnone [[A:%.*]], i8* noalias nocapture nofree readnone [[B:%.*]], i8* noalias nocapture nofree readnone [[C:%.*]]) #[[ATTR4]] {
; IS__CGSCC_OPM-NEXT: call void @use_i8_ptr(i8* noalias nocapture nofree nonnull readnone [[A]]) #[[ATTR4]]
; IS__CGSCC_OPM-NEXT: call void @use_i8_ptr(i8* noalias nocapture nofree readnone [[B]]) #[[ATTR4]]
; IS__CGSCC_OPM-NEXT: call void @use_i8_ptr(i8* noalias nocapture nofree readnone [[C]]) #[[ATTR4]]
; IS__CGSCC_OPM-NEXT: ret void
; ;
call void @use_i8_ptr(i8* %a) call void @use_i8_ptr(i8* %a)
call void @use_i8_ptr(i8* %b) call void @use_i8_ptr(i8* %b)
call void @use_i8_ptr(i8* %c) call void @use_i8_ptr(i8* %c)
ret void ret void
} }
declare nonnull i8* @nonnull() declare nonnull i8* @nonnull()
; TEST 14 ; TEST 14
; Complex propagation ; Complex propagation
; Argument of f1, f2, f3 can be marked with nonnull. ; Argument of f1, f2, f3 can be marked with nonnull.
; * Argument ; * Argument
; 1. In f1:bb6, %arg can be marked with nonnull because of the comparison in bb1 ; 1. In f1:bb6, %arg can be marked with nonnull because of the comparison in bb1
; 2. Because f2 is internal function, f2(i32* %arg) -> @f2(i32* nonnull %arg) ; 2. Because f2 is internal function, f2(i32* %arg) -> @f2(i32* nonnull %arg)
; 3. In f1:bb4 %tmp5 is nonnull and f3 is internal function. ; 3. In f1:bb4 %tmp5 is nonnull and f3 is internal function.
; Then, f3(i32* %arg) -> @f3(i32* nonnull %arg) ; Then, f3(i32* %arg) -> @f3(i32* nonnull %arg)
; 4. We get nonnull in whole f1 call sites so f1(i32* %arg) -> @f1(i32* nonnull %arg) ; 4. We get nonnull in whole f1 call sites so f1(i32* %arg) -> @f1(i32* nonnull %arg)
define internal i32* @f1(i32* %arg) { define internal i32* @f1(i32* %arg) {
; FIXME: missing nonnull It should be nonnull @f1(i32* nonnull readonly %arg) ; FIXME: missing nonnull It should be nonnull @f1(i32* nonnull readonly %arg)
; NOT_CGSCC_OPM: Function Attrs: argmemonly nofree nosync nounwind readonly ; CHECK: Function Attrs: argmemonly nofree nosync nounwind readonly
; NOT_CGSCC_OPM-LABEL: define {{[^@]+}}@f1 ; CHECK-LABEL: define {{[^@]+}}@f1
; NOT_CGSCC_OPM-SAME: (i32* nofree readonly [[ARG:%.*]]) #[[ATTR4:[0-9]+]] { ; CHECK-SAME: (i32* nofree readonly [[ARG:%.*]]) #[[ATTR4:[0-9]+]] {
; NOT_CGSCC_OPM-NEXT: bb: ; CHECK-NEXT: bb:
; NOT_CGSCC_OPM-NEXT: [[TMP:%.*]] = icmp eq i32* [[ARG]], null ; CHECK-NEXT: [[TMP:%.*]] = icmp eq i32* [[ARG]], null
; NOT_CGSCC_OPM-NEXT: br i1 [[TMP]], label [[BB9:%.*]], label [[BB1:%.*]] ; CHECK-NEXT: br i1 [[TMP]], label [[BB9:%.*]], label [[BB1:%.*]]
; NOT_CGSCC_OPM: bb1: ; CHECK: bb1:
; NOT_CGSCC_OPM-NEXT: [[TMP2:%.*]] = load i32, i32* [[ARG]], align 4 ; CHECK-NEXT: [[TMP2:%.*]] = load i32, i32* [[ARG]], align 4
; NOT_CGSCC_OPM-NEXT: [[TMP3:%.*]] = icmp eq i32 [[TMP2]], 0 ; CHECK-NEXT: [[TMP3:%.*]] = icmp eq i32 [[TMP2]], 0
; NOT_CGSCC_OPM-NEXT: br i1 [[TMP3]], label [[BB6:%.*]], label [[BB4:%.*]] ; CHECK-NEXT: br i1 [[TMP3]], label [[BB6:%.*]], label [[BB4:%.*]]
; NOT_CGSCC_OPM: bb4: ; CHECK: bb4:
; NOT_CGSCC_OPM-NEXT: [[TMP5:%.*]] = getelementptr inbounds i32, i32* [[ARG]], i64 1 ; CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds i32, i32* [[ARG]], i64 1
; NOT_CGSCC_OPM-NEXT: [[TMP5B:%.*]] = tail call i32* @f3(i32* nofree nonnull readonly [[TMP5]]) #[[ATTR12:[0-9]+]] ; CHECK-NEXT: [[TMP5B:%.*]] = tail call i32* @f3(i32* nofree nonnull readonly [[TMP5]]) #[[ATTR12:[0-9]+]]
; NOT_CGSCC_OPM-NEXT: [[TMP5C:%.*]] = getelementptr inbounds i32, i32* [[TMP5B]], i64 -1 ; CHECK-NEXT: [[TMP5C:%.*]] = getelementptr inbounds i32, i32* [[TMP5B]], i64 -1
; NOT_CGSCC_OPM-NEXT: br label [[BB9]] ; CHECK-NEXT: br label [[BB9]]
; NOT_CGSCC_OPM: bb6: ; CHECK: bb6:
; NOT_CGSCC_OPM-NEXT: [[TMP7:%.*]] = tail call i32* @f2(i32* nofree nonnull readonly align 4 dereferenceable(4) [[ARG]]) #[[ATTR12]] ; CHECK-NEXT: [[TMP7:%.*]] = tail call i32* @f2(i32* nofree nonnull readonly align 4 dereferenceable(4) [[ARG]]) #[[ATTR12]]
; NOT_CGSCC_OPM-NEXT: ret i32* [[TMP7]] ; CHECK-NEXT: ret i32* [[TMP7]]
; NOT_CGSCC_OPM: bb9: ; CHECK: bb9:
; NOT_CGSCC_OPM-NEXT: [[TMP10:%.*]] = phi i32* [ [[TMP5C]], [[BB4]] ], [ inttoptr (i64 4 to i32*), [[BB:%.*]] ] ; CHECK-NEXT: [[TMP10:%.*]] = phi i32* [ [[TMP5C]], [[BB4]] ], [ inttoptr (i64 4 to i32*), [[BB:%.*]] ]
; NOT_CGSCC_OPM-NEXT: ret i32* [[TMP10]] ; CHECK-NEXT: ret i32* [[TMP10]]
;
; IS__CGSCC_OPM: Function Attrs: argmemonly nofree nosync nounwind readonly
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@f1
; IS__CGSCC_OPM-SAME: (i32* nofree readonly [[ARG:%.*]]) #[[ATTR5:[0-9]+]] {
; IS__CGSCC_OPM-NEXT: bb:
; IS__CGSCC_OPM-NEXT: [[TMP:%.*]] = icmp eq i32* [[ARG]], null
; IS__CGSCC_OPM-NEXT: br i1 [[TMP]], label [[BB9:%.*]], label [[BB1:%.*]]
; IS__CGSCC_OPM: bb1:
; IS__CGSCC_OPM-NEXT: [[TMP2:%.*]] = load i32, i32* [[ARG]], align 4
; IS__CGSCC_OPM-NEXT: [[TMP3:%.*]] = icmp eq i32 [[TMP2]], 0
; IS__CGSCC_OPM-NEXT: br i1 [[TMP3]], label [[BB6:%.*]], label [[BB4:%.*]]
; IS__CGSCC_OPM: bb4:
; IS__CGSCC_OPM-NEXT: [[TMP5:%.*]] = getelementptr inbounds i32, i32* [[ARG]], i64 1
; IS__CGSCC_OPM-NEXT: [[TMP5B:%.*]] = tail call i32* @f3(i32* nofree nonnull readonly [[TMP5]]) #[[ATTR13:[0-9]+]]
; IS__CGSCC_OPM-NEXT: [[TMP5C:%.*]] = getelementptr inbounds i32, i32* [[TMP5B]], i64 -1
; IS__CGSCC_OPM-NEXT: br label [[BB9]]
; IS__CGSCC_OPM: bb6:
; IS__CGSCC_OPM-NEXT: [[TMP7:%.*]] = tail call i32* @f2(i32* nofree nonnull readonly align 4 dereferenceable(4) [[ARG]]) #[[ATTR13]]
; IS__CGSCC_OPM-NEXT: ret i32* [[TMP7]]
; IS__CGSCC_OPM: bb9:
; IS__CGSCC_OPM-NEXT: [[TMP10:%.*]] = phi i32* [ [[TMP5C]], [[BB4]] ], [ inttoptr (i64 4 to i32*), [[BB:%.*]] ]
; IS__CGSCC_OPM-NEXT: ret i32* [[TMP10]]
; ;
bb: bb:
%tmp = icmp eq i32* %arg, null %tmp = icmp eq i32* %arg, null
br i1 %tmp, label %bb9, label %bb1 br i1 %tmp, label %bb9, label %bb1
bb1: ; preds = %bb bb1: ; preds = %bb
%tmp2 = load i32, i32* %arg, align 4 %tmp2 = load i32, i32* %arg, align 4
Show All 11 Linesbb6: ; preds = %bb1
ret i32* %tmp7 ret i32* %tmp7
bb9: ; preds = %bb4, %bb bb9: ; preds = %bb4, %bb
%tmp10 = phi i32* [ %tmp5c, %bb4 ], [ inttoptr (i64 4 to i32*), %bb ] %tmp10 = phi i32* [ %tmp5c, %bb4 ], [ inttoptr (i64 4 to i32*), %bb ]
ret i32* %tmp10 ret i32* %tmp10
} }
define internal i32* @f2(i32* %arg) { define internal i32* @f2(i32* %arg) {
; NOT_CGSCC_OPM: Function Attrs: argmemonly nofree nosync nounwind readonly ; CHECK: Function Attrs: argmemonly nofree nosync nounwind readonly
; NOT_CGSCC_OPM-LABEL: define {{[^@]+}}@f2 ; CHECK-LABEL: define {{[^@]+}}@f2
; NOT_CGSCC_OPM-SAME: (i32* nofree nonnull readonly align 4 dereferenceable(4) [[ARG:%.*]]) #[[ATTR4]] { ; CHECK-SAME: (i32* nofree nonnull readonly align 4 dereferenceable(4) [[ARG:%.*]]) #[[ATTR4]] {
; NOT_CGSCC_OPM-NEXT: bb: ; CHECK-NEXT: bb:
; NOT_CGSCC_OPM-NEXT: [[TMP:%.*]] = tail call i32* @f1(i32* nofree readonly [[ARG]]) #[[ATTR12]] ; CHECK-NEXT: [[TMP:%.*]] = tail call i32* @f1(i32* nofree readonly [[ARG]]) #[[ATTR12]]
; NOT_CGSCC_OPM-NEXT: ret i32* [[TMP]] ; CHECK-NEXT: ret i32* [[TMP]]
;
; IS__CGSCC_OPM: Function Attrs: argmemonly nofree nosync nounwind readonly
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@f2
; IS__CGSCC_OPM-SAME: (i32* nofree nonnull readonly align 4 dereferenceable(4) [[ARG:%.*]]) #[[ATTR5]] {
; IS__CGSCC_OPM-NEXT: bb:
; IS__CGSCC_OPM-NEXT: [[TMP:%.*]] = tail call i32* @f1(i32* nofree readonly [[ARG]]) #[[ATTR13]]
; IS__CGSCC_OPM-NEXT: ret i32* [[TMP]]
; ;
bb: bb:
%tmp = tail call i32* @f1(i32* %arg) %tmp = tail call i32* @f1(i32* %arg)
ret i32* %tmp ret i32* %tmp
} }
define dso_local noalias i32* @f3(i32* %arg) { define dso_local noalias i32* @f3(i32* %arg) {
; FIXME: missing nonnull. It should be nonnull @f3(i32* nonnull readonly %arg) ; FIXME: missing nonnull. It should be nonnull @f3(i32* nonnull readonly %arg)
; NOT_CGSCC_OPM: Function Attrs: argmemonly nofree nosync nounwind readonly ; CHECK: Function Attrs: argmemonly nofree nosync nounwind readonly
; NOT_CGSCC_OPM-LABEL: define {{[^@]+}}@f3 ; CHECK-LABEL: define {{[^@]+}}@f3
; NOT_CGSCC_OPM-SAME: (i32* nofree readonly [[ARG:%.*]]) #[[ATTR4]] { ; CHECK-SAME: (i32* nofree readonly [[ARG:%.*]]) #[[ATTR4]] {
; NOT_CGSCC_OPM-NEXT: bb: ; CHECK-NEXT: bb:
; NOT_CGSCC_OPM-NEXT: [[TMP:%.*]] = call i32* @f1(i32* nofree readonly [[ARG]]) #[[ATTR12]] ; CHECK-NEXT: [[TMP:%.*]] = call i32* @f1(i32* nofree readonly [[ARG]]) #[[ATTR12]]
; NOT_CGSCC_OPM-NEXT: ret i32* [[TMP]] ; CHECK-NEXT: ret i32* [[TMP]]
;
; IS__CGSCC_OPM: Function Attrs: argmemonly nofree nosync nounwind readonly
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@f3
; IS__CGSCC_OPM-SAME: (i32* nofree readonly [[ARG:%.*]]) #[[ATTR5]] {
; IS__CGSCC_OPM-NEXT: bb:
; IS__CGSCC_OPM-NEXT: [[TMP:%.*]] = call i32* @f1(i32* nofree readonly [[ARG]]) #[[ATTR13]]
; IS__CGSCC_OPM-NEXT: ret i32* [[TMP]]
; ;
bb: bb:
; FIXME: missing nonnull. It should be @f1(i32* nonnull readonly %arg) ; FIXME: missing nonnull. It should be @f1(i32* nonnull readonly %arg)
%tmp = call i32* @f1(i32* %arg) %tmp = call i32* @f1(i32* %arg)
ret i32* %tmp ret i32* %tmp
} }
; TEST 15 ; TEST 15
Show All 14 Lines
declare void @fun3(i8*, i8*, i8*) #1 declare void @fun3(i8*, i8*, i8*) #1
; TEST 16 simple path test ; TEST 16 simple path test
; if(..) ; if(..)
; fun2(nonnull %a, nonnull %b) ; fun2(nonnull %a, nonnull %b)
; else ; else
; fun2(nonnull %a, %b) ; fun2(nonnull %a, %b)
; We can say that %a is nonnull but %b is not. ; We can say that %a is nonnull but %b is not.
define void @f16(i8* %a, i8 * %b, i8 %c) { define void @f16(i8* %a, i8 * %b, i8 %c) {
; NOT_CGSCC_OPM: Function Attrs: nounwind willreturn ; CHECK: Function Attrs: nounwind willreturn
; NOT_CGSCC_OPM-LABEL: define {{[^@]+}}@f16 ; CHECK-LABEL: define {{[^@]+}}@f16
; NOT_CGSCC_OPM-SAME: (i8* nonnull [[A:%.*]], i8* [[B:%.*]], i8 [[C:%.*]]) #[[ATTR5:[0-9]+]] { ; CHECK-SAME: (i8* nonnull [[A:%.*]], i8* [[B:%.*]], i8 [[C:%.*]]) #[[ATTR5:[0-9]+]] {
; NOT_CGSCC_OPM-NEXT: [[CMP:%.*]] = icmp eq i8 [[C]], 0 ; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[C]], 0
; NOT_CGSCC_OPM-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]] ; CHECK-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]]
; NOT_CGSCC_OPM: if.then: ; CHECK: if.then:
; NOT_CGSCC_OPM-NEXT: tail call void @fun2(i8* nonnull [[A]], i8* nonnull [[B]]) #[[ATTR5]] ; CHECK-NEXT: tail call void @fun2(i8* nonnull [[A]], i8* nonnull [[B]]) #[[ATTR5]]
; NOT_CGSCC_OPM-NEXT: ret void ; CHECK-NEXT: ret void
; NOT_CGSCC_OPM: if.else: ; CHECK: if.else:
; NOT_CGSCC_OPM-NEXT: tail call void @fun2(i8* nonnull [[A]], i8* [[B]]) #[[ATTR5]] ; CHECK-NEXT: tail call void @fun2(i8* nonnull [[A]], i8* [[B]]) #[[ATTR5]]
; NOT_CGSCC_OPM-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC_OPM: Function Attrs: nounwind willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@f16
; IS__CGSCC_OPM-SAME: (i8* nonnull [[A:%.*]], i8* [[B:%.*]], i8 [[C:%.*]]) #[[ATTR6:[0-9]+]] {
; IS__CGSCC_OPM-NEXT: [[CMP:%.*]] = icmp eq i8 [[C]], 0
; IS__CGSCC_OPM-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]]
; IS__CGSCC_OPM: if.then:
; IS__CGSCC_OPM-NEXT: tail call void @fun2(i8* nonnull [[A]], i8* nonnull [[B]]) #[[ATTR6]]
; IS__CGSCC_OPM-NEXT: ret void
; IS__CGSCC_OPM: if.else:
; IS__CGSCC_OPM-NEXT: tail call void @fun2(i8* nonnull [[A]], i8* [[B]]) #[[ATTR6]]
; IS__CGSCC_OPM-NEXT: ret void
; ;
%cmp = icmp eq i8 %c, 0 %cmp = icmp eq i8 %c, 0
br i1 %cmp, label %if.then, label %if.else br i1 %cmp, label %if.then, label %if.else
if.then: if.then:
tail call void @fun2(i8* nonnull %a, i8* nonnull %b) tail call void @fun2(i8* nonnull %a, i8* nonnull %b)
ret void ret void
if.else: if.else:
tail call void @fun2(i8* nonnull %a, i8* %b) tail call void @fun2(i8* nonnull %a, i8* %b)
ret void ret void
} }
; TEST 17 explore child BB test ; TEST 17 explore child BB test
; if(..) ; if(..)
; ... (willreturn & nounwind) ; ... (willreturn & nounwind)
; else ; else
; ... (willreturn & nounwind) ; ... (willreturn & nounwind)
; fun1(nonnull %a) ; fun1(nonnull %a)
; We can say that %a is nonnull ; We can say that %a is nonnull
define void @f17(i8* %a, i8 %c) { define void @f17(i8* %a, i8 %c) {
; ;
; NOT_CGSCC_OPM: Function Attrs: nounwind willreturn ; CHECK: Function Attrs: nounwind willreturn
; NOT_CGSCC_OPM-LABEL: define {{[^@]+}}@f17 ; CHECK-LABEL: define {{[^@]+}}@f17
; NOT_CGSCC_OPM-SAME: (i8* nonnull [[A:%.*]], i8 [[C:%.*]]) #[[ATTR5]] { ; CHECK-SAME: (i8* nonnull [[A:%.*]], i8 [[C:%.*]]) #[[ATTR5]] {
; NOT_CGSCC_OPM-NEXT: [[CMP:%.*]] = icmp eq i8 [[C]], 0 ; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[C]], 0
; NOT_CGSCC_OPM-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]] ; CHECK-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]]
; NOT_CGSCC_OPM: if.then: ; CHECK: if.then:
; NOT_CGSCC_OPM-NEXT: tail call void @fun0() #[[ATTR5]] ; CHECK-NEXT: tail call void @fun0() #[[ATTR5]]
; NOT_CGSCC_OPM-NEXT: br label [[CONT:%.*]] ; CHECK-NEXT: br label [[CONT:%.*]]
; NOT_CGSCC_OPM: if.else: ; CHECK: if.else:
; NOT_CGSCC_OPM-NEXT: tail call void @fun0() #[[ATTR5]] ; CHECK-NEXT: tail call void @fun0() #[[ATTR5]]
; NOT_CGSCC_OPM-NEXT: br label [[CONT]] ; CHECK-NEXT: br label [[CONT]]
; NOT_CGSCC_OPM: cont: ; CHECK: cont:
; NOT_CGSCC_OPM-NEXT: tail call void @fun1(i8* nonnull [[A]]) #[[ATTR5]] ; CHECK-NEXT: tail call void @fun1(i8* nonnull [[A]]) #[[ATTR5]]
; NOT_CGSCC_OPM-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC_OPM: Function Attrs: nounwind willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@f17
; IS__CGSCC_OPM-SAME: (i8* nonnull [[A:%.*]], i8 [[C:%.*]]) #[[ATTR6]] {
; IS__CGSCC_OPM-NEXT: [[CMP:%.*]] = icmp eq i8 [[C]], 0
; IS__CGSCC_OPM-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]]
; IS__CGSCC_OPM: if.then:
; IS__CGSCC_OPM-NEXT: tail call void @fun0() #[[ATTR6]]
; IS__CGSCC_OPM-NEXT: br label [[CONT:%.*]]
; IS__CGSCC_OPM: if.else:
; IS__CGSCC_OPM-NEXT: tail call void @fun0() #[[ATTR6]]
; IS__CGSCC_OPM-NEXT: br label [[CONT]]
; IS__CGSCC_OPM: cont:
; IS__CGSCC_OPM-NEXT: tail call void @fun1(i8* nonnull [[A]]) #[[ATTR6]]
; IS__CGSCC_OPM-NEXT: ret void
; ;
%cmp = icmp eq i8 %c, 0 %cmp = icmp eq i8 %c, 0
br i1 %cmp, label %if.then, label %if.else br i1 %cmp, label %if.then, label %if.else
if.then: if.then:
tail call void @fun0() tail call void @fun0()
br label %cont br label %cont
if.else: if.else:
tail call void @fun0() tail call void @fun0()
Show All 9 Lines
; ... (willreturn & nounwind) ; ... (willreturn & nounwind)
; if(..) ; if(..)
; ... (willreturn & nounwind) ; ... (willreturn & nounwind)
; else ; else
; ... (willreturn & nounwind) ; ... (willreturn & nounwind)
; fun1(nonnull %a) ; fun1(nonnull %a)
define void @f18(i8* %a, i8* %b, i8 %c) { define void @f18(i8* %a, i8* %b, i8 %c) {
; NOT_CGSCC_OPM: Function Attrs: nounwind willreturn ; CHECK: Function Attrs: nounwind willreturn
; NOT_CGSCC_OPM-LABEL: define {{[^@]+}}@f18 ; CHECK-LABEL: define {{[^@]+}}@f18
; NOT_CGSCC_OPM-SAME: (i8* nonnull [[A:%.*]], i8* [[B:%.*]], i8 [[C:%.*]]) #[[ATTR5]] { ; CHECK-SAME: (i8* nonnull [[A:%.*]], i8* [[B:%.*]], i8 [[C:%.*]]) #[[ATTR5]] {
; NOT_CGSCC_OPM-NEXT: [[CMP1:%.*]] = icmp eq i8 [[C]], 0 ; CHECK-NEXT: [[CMP1:%.*]] = icmp eq i8 [[C]], 0
; NOT_CGSCC_OPM-NEXT: br i1 [[CMP1]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]] ; CHECK-NEXT: br i1 [[CMP1]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]]
; NOT_CGSCC_OPM: if.then: ; CHECK: if.then:
; NOT_CGSCC_OPM-NEXT: tail call void @fun0() #[[ATTR5]] ; CHECK-NEXT: tail call void @fun0() #[[ATTR5]]
; NOT_CGSCC_OPM-NEXT: br label [[CONT:%.*]] ; CHECK-NEXT: br label [[CONT:%.*]]
; NOT_CGSCC_OPM: if.else: ; CHECK: if.else:
; NOT_CGSCC_OPM-NEXT: tail call void @fun0() #[[ATTR5]] ; CHECK-NEXT: tail call void @fun0() #[[ATTR5]]
; NOT_CGSCC_OPM-NEXT: br label [[CONT]] ; CHECK-NEXT: br label [[CONT]]
; NOT_CGSCC_OPM: cont: ; CHECK: cont:
; NOT_CGSCC_OPM-NEXT: [[CMP2:%.*]] = icmp eq i8 [[C]], 1 ; CHECK-NEXT: [[CMP2:%.*]] = icmp eq i8 [[C]], 1
; NOT_CGSCC_OPM-NEXT: br i1 [[CMP2]], label [[CONT_THEN:%.*]], label [[CONT_ELSE:%.*]] ; CHECK-NEXT: br i1 [[CMP2]], label [[CONT_THEN:%.*]], label [[CONT_ELSE:%.*]]
; NOT_CGSCC_OPM: cont.then: ; CHECK: cont.then:
; NOT_CGSCC_OPM-NEXT: tail call void @fun1(i8* nonnull [[B]]) #[[ATTR5]] ; CHECK-NEXT: tail call void @fun1(i8* nonnull [[B]]) #[[ATTR5]]
; NOT_CGSCC_OPM-NEXT: br label [[CONT2:%.*]] ; CHECK-NEXT: br label [[CONT2:%.*]]
; NOT_CGSCC_OPM: cont.else: ; CHECK: cont.else:
; NOT_CGSCC_OPM-NEXT: tail call void @fun0() #[[ATTR5]] ; CHECK-NEXT: tail call void @fun0() #[[ATTR5]]
; NOT_CGSCC_OPM-NEXT: br label [[CONT2]] ; CHECK-NEXT: br label [[CONT2]]
; NOT_CGSCC_OPM: cont2: ; CHECK: cont2:
; NOT_CGSCC_OPM-NEXT: tail call void @fun1(i8* nonnull [[A]]) #[[ATTR5]] ; CHECK-NEXT: tail call void @fun1(i8* nonnull [[A]]) #[[ATTR5]]
; NOT_CGSCC_OPM-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC_OPM: Function Attrs: nounwind willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@f18
; IS__CGSCC_OPM-SAME: (i8* nonnull [[A:%.*]], i8* [[B:%.*]], i8 [[C:%.*]]) #[[ATTR6]] {
; IS__CGSCC_OPM-NEXT: [[CMP1:%.*]] = icmp eq i8 [[C]], 0
; IS__CGSCC_OPM-NEXT: br i1 [[CMP1]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]]
; IS__CGSCC_OPM: if.then:
; IS__CGSCC_OPM-NEXT: tail call void @fun0() #[[ATTR6]]
; IS__CGSCC_OPM-NEXT: br label [[CONT:%.*]]
; IS__CGSCC_OPM: if.else:
; IS__CGSCC_OPM-NEXT: tail call void @fun0() #[[ATTR6]]
; IS__CGSCC_OPM-NEXT: br label [[CONT]]
; IS__CGSCC_OPM: cont:
; IS__CGSCC_OPM-NEXT: [[CMP2:%.*]] = icmp eq i8 [[C]], 1
; IS__CGSCC_OPM-NEXT: br i1 [[CMP2]], label [[CONT_THEN:%.*]], label [[CONT_ELSE:%.*]]
; IS__CGSCC_OPM: cont.then:
; IS__CGSCC_OPM-NEXT: tail call void @fun1(i8* nonnull [[B]]) #[[ATTR6]]
; IS__CGSCC_OPM-NEXT: br label [[CONT2:%.*]]
; IS__CGSCC_OPM: cont.else:
; IS__CGSCC_OPM-NEXT: tail call void @fun0() #[[ATTR6]]
; IS__CGSCC_OPM-NEXT: br label [[CONT2]]
; IS__CGSCC_OPM: cont2:
; IS__CGSCC_OPM-NEXT: tail call void @fun1(i8* nonnull [[A]]) #[[ATTR6]]
; IS__CGSCC_OPM-NEXT: ret void
; ;
%cmp1 = icmp eq i8 %c, 0 %cmp1 = icmp eq i8 %c, 0
br i1 %cmp1, label %if.then, label %if.else br i1 %cmp1, label %if.then, label %if.else
if.then: if.then:
tail call void @fun0() tail call void @fun0()
br label %cont br label %cont
if.else: if.else:
tail call void @fun0() tail call void @fun0()
Show All 10 Lines
cont2: cont2:
tail call void @fun1(i8* nonnull %a) tail call void @fun1(i8* nonnull %a)
ret void ret void
} }
; TEST 19: Loop ; TEST 19: Loop
define void @f19(i8* %a, i8* %b, i8 %c) { define void @f19(i8* %a, i8* %b, i8 %c) {
; NOT_CGSCC_OPM: Function Attrs: nounwind ; CHECK: Function Attrs: nounwind
; NOT_CGSCC_OPM-LABEL: define {{[^@]+}}@f19 ; CHECK-LABEL: define {{[^@]+}}@f19
; NOT_CGSCC_OPM-SAME: (i8* [[A:%.*]], i8* nonnull [[B:%.*]], i8 [[C:%.*]]) #[[ATTR3]] { ; CHECK-SAME: (i8* [[A:%.*]], i8* nonnull [[B:%.*]], i8 [[C:%.*]]) #[[ATTR3]] {
; NOT_CGSCC_OPM-NEXT: br label [[LOOP_HEADER:%.*]] ; CHECK-NEXT: br label [[LOOP_HEADER:%.*]]
; NOT_CGSCC_OPM: loop.header: ; CHECK: loop.header:
; NOT_CGSCC_OPM-NEXT: [[CMP2:%.*]] = icmp eq i8 [[C]], 0 ; CHECK-NEXT: [[CMP2:%.*]] = icmp eq i8 [[C]], 0
; NOT_CGSCC_OPM-NEXT: br i1 [[CMP2]], label [[LOOP_BODY:%.*]], label [[LOOP_EXIT:%.*]] ; CHECK-NEXT: br i1 [[CMP2]], label [[LOOP_BODY:%.*]], label [[LOOP_EXIT:%.*]]
; NOT_CGSCC_OPM: loop.body: ; CHECK: loop.body:
; NOT_CGSCC_OPM-NEXT: tail call void @fun1(i8* nonnull [[B]]) #[[ATTR3]] ; CHECK-NEXT: tail call void @fun1(i8* nonnull [[B]]) #[[ATTR3]]
; NOT_CGSCC_OPM-NEXT: tail call void @fun1(i8* nonnull [[A]]) #[[ATTR3]] ; CHECK-NEXT: tail call void @fun1(i8* nonnull [[A]]) #[[ATTR3]]
; NOT_CGSCC_OPM-NEXT: br label [[LOOP_HEADER]] ; CHECK-NEXT: br label [[LOOP_HEADER]]
; NOT_CGSCC_OPM: loop.exit: ; CHECK: loop.exit:
; NOT_CGSCC_OPM-NEXT: tail call void @fun1(i8* nonnull [[B]]) #[[ATTR3]] ; CHECK-NEXT: tail call void @fun1(i8* nonnull [[B]]) #[[ATTR3]]
; NOT_CGSCC_OPM-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC_OPM: Function Attrs: nounwind
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@f19
; IS__CGSCC_OPM-SAME: (i8* [[A:%.*]], i8* nonnull [[B:%.*]], i8 [[C:%.*]]) #[[ATTR4]] {
; IS__CGSCC_OPM-NEXT: br label [[LOOP_HEADER:%.*]]
; IS__CGSCC_OPM: loop.header:
; IS__CGSCC_OPM-NEXT: [[CMP2:%.*]] = icmp eq i8 [[C]], 0
; IS__CGSCC_OPM-NEXT: br i1 [[CMP2]], label [[LOOP_BODY:%.*]], label [[LOOP_EXIT:%.*]]
; IS__CGSCC_OPM: loop.body:
; IS__CGSCC_OPM-NEXT: tail call void @fun1(i8* nonnull [[B]]) #[[ATTR4]]
; IS__CGSCC_OPM-NEXT: tail call void @fun1(i8* nonnull [[A]]) #[[ATTR4]]
; IS__CGSCC_OPM-NEXT: br label [[LOOP_HEADER]]
; IS__CGSCC_OPM: loop.exit:
; IS__CGSCC_OPM-NEXT: tail call void @fun1(i8* nonnull [[B]]) #[[ATTR4]]
; IS__CGSCC_OPM-NEXT: ret void
; ;
br label %loop.header br label %loop.header
loop.header: loop.header:
%cmp2 = icmp eq i8 %c, 0 %cmp2 = icmp eq i8 %c, 0
br i1 %cmp2, label %loop.body, label %loop.exit br i1 %cmp2, label %loop.body, label %loop.exit
loop.body: loop.body:
tail call void @fun1(i8* nonnull %b) tail call void @fun1(i8* nonnull %b)
tail call void @fun1(i8* nonnull %a) tail call void @fun1(i8* nonnull %a)
▲ Show 20 Lines • Show All 116 Lines • ▼ Show 20 Lines;
%c = load volatile i8, i8* %b %c = load volatile i8, i8* %b
call void @use1nonnull(i8* %a) call void @use1nonnull(i8* %a)
ret i8 %c ret i8 %c
} }
; The nonnull callsite is guaranteed to execute, so the argument must be nonnull throughout the parent. ; The nonnull callsite is guaranteed to execute, so the argument must be nonnull throughout the parent.
define i8 @parent7(i8* %a) { define i8 @parent7(i8* %a) {
; NOT_CGSCC_OPM-LABEL: define {{[^@]+}}@parent7 ; CHECK-LABEL: define {{[^@]+}}@parent7
; NOT_CGSCC_OPM-SAME: (i8* nonnull [[A:%.*]]) { ; CHECK-SAME: (i8* nonnull [[A:%.*]]) {
; NOT_CGSCC_OPM-NEXT: [[RET:%.*]] = call i8 @use1safecall(i8* nonnull readonly [[A]]) #[[ATTR13:[0-9]+]] ; CHECK-NEXT: [[RET:%.*]] = call i8 @use1safecall(i8* nonnull readonly [[A]]) #[[ATTR13:[0-9]+]]
; NOT_CGSCC_OPM-NEXT: call void @use1nonnull(i8* nonnull [[A]]) ; CHECK-NEXT: call void @use1nonnull(i8* nonnull [[A]])
; NOT_CGSCC_OPM-NEXT: ret i8 [[RET]] ; CHECK-NEXT: ret i8 [[RET]]
;
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@parent7
; IS__CGSCC_OPM-SAME: (i8* nonnull [[A:%.*]]) {
; IS__CGSCC_OPM-NEXT: [[RET:%.*]] = call i8 @use1safecall(i8* nonnull readonly [[A]]) #[[ATTR14:[0-9]+]]
; IS__CGSCC_OPM-NEXT: call void @use1nonnull(i8* nonnull [[A]])
; IS__CGSCC_OPM-NEXT: ret i8 [[RET]]
; ;
%ret = call i8 @use1safecall(i8* %a) %ret = call i8 @use1safecall(i8* %a)
call void @use1nonnull(i8* %a) call void @use1nonnull(i8* %a)
ret i8 %ret ret i8 %ret
} }
; Make sure that an invoke works similarly to a call. ; Make sure that an invoke works similarly to a call.
declare i32 @esfp(...) declare i32 @esfp(...)
define i1 @parent8(i8* %a, i8* %bogus1, i8* %b) personality i8* bitcast (i32 (...)* @esfp to i8*){ define i1 @parent8(i8* %a, i8* %bogus1, i8* %b) personality i8* bitcast (i32 (...)* @esfp to i8*){
; NOT_CGSCC_OPM: Function Attrs: nounwind ; CHECK: Function Attrs: nounwind
; NOT_CGSCC_OPM-LABEL: define {{[^@]+}}@parent8 ; CHECK-LABEL: define {{[^@]+}}@parent8
; NOT_CGSCC_OPM-SAME: (i8* nonnull [[A:%.*]], i8* nocapture nofree readnone [[BOGUS1:%.*]], i8* nonnull [[B:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @esfp to i8*) { ; CHECK-SAME: (i8* nonnull [[A:%.*]], i8* nocapture nofree readnone [[BOGUS1:%.*]], i8* nonnull [[B:%.*]]) #[[ATTR3]] personality i8* bitcast (i32 (...)* @esfp to i8*) {
; NOT_CGSCC_OPM-NEXT: entry: ; CHECK-NEXT: entry:
; NOT_CGSCC_OPM-NEXT: invoke void @use2nonnull(i8* nonnull [[A]], i8* nonnull [[B]]) ; CHECK-NEXT: invoke void @use2nonnull(i8* nonnull [[A]], i8* nonnull [[B]])
; NOT_CGSCC_OPM-NEXT: to label [[CONT:%.*]] unwind label [[EXC:%.*]] ; CHECK-NEXT: to label [[CONT:%.*]] unwind label [[EXC:%.*]]
; NOT_CGSCC_OPM: cont: ; CHECK: cont:
; NOT_CGSCC_OPM-NEXT: ret i1 false ; CHECK-NEXT: ret i1 false
; NOT_CGSCC_OPM: exc: ; CHECK: exc:
; NOT_CGSCC_OPM-NEXT: [[LP:%.*]] = landingpad { i8*, i32 } ; CHECK-NEXT: [[LP:%.*]] = landingpad { i8*, i32 }
; NOT_CGSCC_OPM-NEXT: filter [0 x i8*] zeroinitializer ; CHECK-NEXT: filter [0 x i8*] zeroinitializer
; NOT_CGSCC_OPM-NEXT: unreachable ; CHECK-NEXT: unreachable
;
; IS__CGSCC_OPM: Function Attrs: nounwind
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@parent8
; IS__CGSCC_OPM-SAME: (i8* nonnull [[A:%.*]], i8* nocapture nofree readnone [[BOGUS1:%.*]], i8* nonnull [[B:%.*]]) #[[ATTR4]] personality i8* bitcast (i32 (...)* @esfp to i8*) {
; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: invoke void @use2nonnull(i8* nonnull [[A]], i8* nonnull [[B]])
; IS__CGSCC_OPM-NEXT: to label [[CONT:%.*]] unwind label [[EXC:%.*]]
; IS__CGSCC_OPM: cont:
; IS__CGSCC_OPM-NEXT: ret i1 false
; IS__CGSCC_OPM: exc:
; IS__CGSCC_OPM-NEXT: [[LP:%.*]] = landingpad { i8*, i32 }
; IS__CGSCC_OPM-NEXT: filter [0 x i8*] zeroinitializer
; IS__CGSCC_OPM-NEXT: unreachable
; ;
entry: entry:
invoke void @use2nonnull(i8* %a, i8* %b) invoke void @use2nonnull(i8* %a, i8* %b)
to label %cont unwind label %exc to label %cont unwind label %exc
cont: cont:
%null_check = icmp eq i8* %b, null %null_check = icmp eq i8* %b, null
ret i1 %null_check ret i1 %null_check
exc: exc:
%lp = landingpad { i8*, i32 } %lp = landingpad { i8*, i32 }
filter [0 x i8*] zeroinitializer filter [0 x i8*] zeroinitializer
unreachable unreachable
} }
define i32* @gep1(i32* %p) { define i32* @gep1(i32* %p) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@gep1 ; CHECK-LABEL: define {{[^@]+}}@gep1
; IS__TUNIT____-SAME: (i32* nofree readnone "no-capture-maybe-returned" [[P:%.*]]) #[[ATTR1]] { ; CHECK-SAME: (i32* nofree readnone "no-capture-maybe-returned" [[P:%.*]]) #[[ATTR1]] {
; IS__TUNIT____-NEXT: [[Q:%.*]] = getelementptr inbounds i32, i32* [[P]], i32 1 ; CHECK-NEXT: [[Q:%.*]] = getelementptr inbounds i32, i32* [[P]], i32 1
; IS__TUNIT____-NEXT: ret i32* [[Q]] ; CHECK-NEXT: ret i32* [[Q]]
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@gep1
; IS__CGSCC____-SAME: (i32* nofree readnone "no-capture-maybe-returned" [[P:%.*]]) #[[ATTR1]] {
; IS__CGSCC____-NEXT: [[Q:%.*]] = getelementptr inbounds i32, i32* [[P]], i32 1
; IS__CGSCC____-NEXT: ret i32* [[Q]]
; ;
%q = getelementptr inbounds i32, i32* %p, i32 1 %q = getelementptr inbounds i32, i32* %p, i32 1
ret i32* %q ret i32* %q
} }
define i32* @gep1_no_null_opt(i32* %p) #0 { define i32* @gep1_no_null_opt(i32* %p) #0 {
; Should't be able to derive nonnull based on gep. ; Should't be able to derive nonnull based on gep.
; IS__TUNIT____: Function Attrs: nofree nosync nounwind null_pointer_is_valid readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind null_pointer_is_valid readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@gep1_no_null_opt ; CHECK-LABEL: define {{[^@]+}}@gep1_no_null_opt
; IS__TUNIT____-SAME: (i32* nofree readnone "no-capture-maybe-returned" [[P:%.*]]) #[[ATTR7:[0-9]+]] { ; CHECK-SAME: (i32* nofree readnone "no-capture-maybe-returned" [[P:%.*]]) #[[ATTR7:[0-9]+]] {
; IS__TUNIT____-NEXT: [[Q:%.*]] = getelementptr inbounds i32, i32* [[P]], i32 1 ; CHECK-NEXT: [[Q:%.*]] = getelementptr inbounds i32, i32* [[P]], i32 1
; IS__TUNIT____-NEXT: ret i32* [[Q]] ; CHECK-NEXT: ret i32* [[Q]]
;
; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind null_pointer_is_valid readnone willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@gep1_no_null_opt
; IS__CGSCC_OPM-SAME: (i32* nofree readnone "no-capture-maybe-returned" [[P:%.*]]) #[[ATTR8:[0-9]+]] {
; IS__CGSCC_OPM-NEXT: [[Q:%.*]] = getelementptr inbounds i32, i32* [[P]], i32 1
; IS__CGSCC_OPM-NEXT: ret i32* [[Q]]
;
; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind null_pointer_is_valid readnone willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@gep1_no_null_opt
; IS__CGSCC_NPM-SAME: (i32* nofree readnone "no-capture-maybe-returned" [[P:%.*]]) #[[ATTR7:[0-9]+]] {
; IS__CGSCC_NPM-NEXT: [[Q:%.*]] = getelementptr inbounds i32, i32* [[P]], i32 1
; IS__CGSCC_NPM-NEXT: ret i32* [[Q]]
; ;
%q = getelementptr inbounds i32, i32* %p, i32 1 %q = getelementptr inbounds i32, i32* %p, i32 1
ret i32* %q ret i32* %q
} }
define i32 addrspace(3)* @gep2(i32 addrspace(3)* %p) { define i32 addrspace(3)* @gep2(i32 addrspace(3)* %p) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@gep2 ; CHECK-LABEL: define {{[^@]+}}@gep2
; IS__TUNIT____-SAME: (i32 addrspace(3)* nofree readnone "no-capture-maybe-returned" [[P:%.*]]) #[[ATTR1]] { ; CHECK-SAME: (i32 addrspace(3)* nofree readnone "no-capture-maybe-returned" [[P:%.*]]) #[[ATTR1]] {
; IS__TUNIT____-NEXT: [[Q:%.*]] = getelementptr inbounds i32, i32 addrspace(3)* [[P]], i32 1 ; CHECK-NEXT: [[Q:%.*]] = getelementptr inbounds i32, i32 addrspace(3)* [[P]], i32 1
; IS__TUNIT____-NEXT: ret i32 addrspace(3)* [[Q]] ; CHECK-NEXT: ret i32 addrspace(3)* [[Q]]
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@gep2
; IS__CGSCC____-SAME: (i32 addrspace(3)* nofree readnone "no-capture-maybe-returned" [[P:%.*]]) #[[ATTR1]] {
; IS__CGSCC____-NEXT: [[Q:%.*]] = getelementptr inbounds i32, i32 addrspace(3)* [[P]], i32 1
; IS__CGSCC____-NEXT: ret i32 addrspace(3)* [[Q]]
; ;
%q = getelementptr inbounds i32, i32 addrspace(3)* %p, i32 1 %q = getelementptr inbounds i32, i32 addrspace(3)* %p, i32 1
ret i32 addrspace(3)* %q ret i32 addrspace(3)* %q
} }
; FIXME: We should propagate dereferenceable here but *not* nonnull ; FIXME: We should propagate dereferenceable here but *not* nonnull
define i32 addrspace(3)* @as(i32 addrspace(3)* dereferenceable(4) %p) { define i32 addrspace(3)* @as(i32 addrspace(3)* dereferenceable(4) %p) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@as ; CHECK-LABEL: define {{[^@]+}}@as
; IS__TUNIT____-SAME: (i32 addrspace(3)* nofree nonnull readnone returned dereferenceable(4) "no-capture-maybe-returned" [[P:%.*]]) #[[ATTR1]] { ; CHECK-SAME: (i32 addrspace(3)* nofree nonnull readnone returned dereferenceable(4) "no-capture-maybe-returned" [[P:%.*]]) #[[ATTR1]] {
; IS__TUNIT____-NEXT: ret i32 addrspace(3)* [[P]] ; CHECK-NEXT: ret i32 addrspace(3)* [[P]]
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@as
; IS__CGSCC____-SAME: (i32 addrspace(3)* nofree nonnull readnone returned dereferenceable(4) "no-capture-maybe-returned" [[P:%.*]]) #[[ATTR1]] {
; IS__CGSCC____-NEXT: ret i32 addrspace(3)* [[P]]
; ;
ret i32 addrspace(3)* %p ret i32 addrspace(3)* %p
} }
; CHECK-NOT: @g2() ; CHECK-NOT: @g2()
define internal i32* @g2() { define internal i32* @g2() {
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@g2 ; IS__CGSCC____-LABEL: define {{[^@]+}}@g2
; IS__CGSCC____-SAME: () #[[ATTR1]] { ; IS__CGSCC____-SAME: () #[[ATTR1]] {
; IS__CGSCC____-NEXT: ret i32* undef ; IS__CGSCC____-NEXT: ret i32* undef
; ;
ret i32* inttoptr (i64 4 to i32*) ret i32* inttoptr (i64 4 to i32*)
} }
define i32* @g1() { define i32* @g1() {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@g1 ; CHECK-LABEL: define {{[^@]+}}@g1
; IS__TUNIT____-SAME: () #[[ATTR1]] { ; CHECK-SAME: () #[[ATTR1]] {
; IS__TUNIT____-NEXT: ret i32* inttoptr (i64 4 to i32*) ; CHECK-NEXT: ret i32* inttoptr (i64 4 to i32*)
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@g1
; IS__CGSCC____-SAME: () #[[ATTR1]] {
; IS__CGSCC____-NEXT: ret i32* inttoptr (i64 4 to i32*)
; ;
%c = call i32* @g2() %c = call i32* @g2()
ret i32* %c ret i32* %c
} }
declare void @use_i32_ptr(i32* readnone nocapture) nounwind declare void @use_i32_ptr(i32* readnone nocapture) nounwind
define internal void @called_by_weak(i32* %a) { define internal void @called_by_weak(i32* %a) {
; NOT_CGSCC_OPM: Function Attrs: nounwind ; CHECK: Function Attrs: nounwind
; NOT_CGSCC_OPM-LABEL: define {{[^@]+}}@called_by_weak ; CHECK-LABEL: define {{[^@]+}}@called_by_weak
; NOT_CGSCC_OPM-SAME: (i32* noalias nocapture nonnull readnone [[A:%.*]]) #[[ATTR3]] { ; CHECK-SAME: (i32* noalias nocapture nonnull readnone [[A:%.*]]) #[[ATTR3]] {
; NOT_CGSCC_OPM-NEXT: call void @use_i32_ptr(i32* noalias nocapture nonnull readnone [[A]]) #[[ATTR3]] ; CHECK-NEXT: call void @use_i32_ptr(i32* noalias nocapture nonnull readnone [[A]]) #[[ATTR3]]
; NOT_CGSCC_OPM-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC_OPM: Function Attrs: nounwind
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@called_by_weak
; IS__CGSCC_OPM-SAME: (i32* noalias nocapture nonnull readnone [[A:%.*]]) #[[ATTR4]] {
; IS__CGSCC_OPM-NEXT: call void @use_i32_ptr(i32* noalias nocapture nonnull readnone [[A]]) #[[ATTR4]]
; IS__CGSCC_OPM-NEXT: ret void
; ;
call void @use_i32_ptr(i32* %a) call void @use_i32_ptr(i32* %a)
ret void ret void
} }
; Check we do not annotate the function interface of this weak function. ; Check we do not annotate the function interface of this weak function.
define weak_odr void @weak_caller(i32* nonnull %a) { define weak_odr void @weak_caller(i32* nonnull %a) {
; ;
; NOT_CGSCC_OPM-LABEL: define {{[^@]+}}@weak_caller ; CHECK-LABEL: define {{[^@]+}}@weak_caller
; NOT_CGSCC_OPM-SAME: (i32* nonnull [[A:%.*]]) { ; CHECK-SAME: (i32* nonnull [[A:%.*]]) {
; NOT_CGSCC_OPM-NEXT: call void @called_by_weak(i32* noalias nocapture nonnull readnone [[A]]) #[[ATTR3]] ; CHECK-NEXT: call void @called_by_weak(i32* noalias nocapture nonnull readnone [[A]]) #[[ATTR3]]
; NOT_CGSCC_OPM-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@weak_caller
; IS__CGSCC_OPM-SAME: (i32* nonnull [[A:%.*]]) {
; IS__CGSCC_OPM-NEXT: call void @called_by_weak(i32* noalias nocapture nonnull readnone [[A]]) #[[ATTR4]]
; IS__CGSCC_OPM-NEXT: ret void
; ;
call void @called_by_weak(i32* %a) call void @called_by_weak(i32* %a)
ret void ret void
} }
; Expect nonnull ; Expect nonnull
define internal void @control(i32* dereferenceable(4) %a) { define internal void @control(i32* dereferenceable(4) %a) {
; NOT_CGSCC_OPM: Function Attrs: nounwind ; CHECK: Function Attrs: nounwind
; NOT_CGSCC_OPM-LABEL: define {{[^@]+}}@control ; CHECK-LABEL: define {{[^@]+}}@control
; NOT_CGSCC_OPM-SAME: (i32* noalias nocapture noundef nonnull readnone align 16 dereferenceable(8) [[A:%.*]]) #[[ATTR3]] { ; CHECK-SAME: (i32* noalias nocapture noundef nonnull readnone align 16 dereferenceable(8) [[A:%.*]]) #[[ATTR3]] {
; NOT_CGSCC_OPM-NEXT: call void @use_i32_ptr(i32* noalias nocapture noundef nonnull readnone align 16 dereferenceable(8) [[A]]) #[[ATTR3]] ; CHECK-NEXT: call void @use_i32_ptr(i32* noalias nocapture noundef nonnull readnone align 16 dereferenceable(8) [[A]]) #[[ATTR3]]
; NOT_CGSCC_OPM-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC_OPM: Function Attrs: nounwind
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@control
; IS__CGSCC_OPM-SAME: (i32* noalias nocapture noundef nonnull readnone align 16 dereferenceable(8) [[A:%.*]]) #[[ATTR4]] {
; IS__CGSCC_OPM-NEXT: call void @use_i32_ptr(i32* noalias nocapture noundef nonnull readnone align 16 dereferenceable(8) [[A]]) #[[ATTR4]]
; IS__CGSCC_OPM-NEXT: ret void
; ;
call void @use_i32_ptr(i32* %a) call void @use_i32_ptr(i32* %a)
ret void ret void
} }
; Avoid nonnull as we do not touch naked functions ; Avoid nonnull as we do not touch naked functions
define internal void @naked(i32* dereferenceable(4) %a) naked { define internal void @naked(i32* dereferenceable(4) %a) naked {
; NOT_CGSCC_OPM: Function Attrs: naked ; CHECK: Function Attrs: naked
; NOT_CGSCC_OPM-LABEL: define {{[^@]+}}@naked ; CHECK-LABEL: define {{[^@]+}}@naked
; NOT_CGSCC_OPM-SAME: (i32* dereferenceable(4) [[A:%.*]]) #[[ATTR8:[0-9]+]] { ; CHECK-SAME: (i32* dereferenceable(4) [[A:%.*]]) #[[ATTR8:[0-9]+]] {
; NOT_CGSCC_OPM-NEXT: call void @use_i32_ptr(i32* [[A]]) ; CHECK-NEXT: call void @use_i32_ptr(i32* [[A]])
; NOT_CGSCC_OPM-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC_OPM: Function Attrs: naked
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@naked
; IS__CGSCC_OPM-SAME: (i32* dereferenceable(4) [[A:%.*]]) #[[ATTR9:[0-9]+]] {
; IS__CGSCC_OPM-NEXT: call void @use_i32_ptr(i32* [[A]])
; IS__CGSCC_OPM-NEXT: ret void
; ;
call void @use_i32_ptr(i32* %a) call void @use_i32_ptr(i32* %a)
ret void ret void
} }
; Avoid nonnull as we do not touch optnone ; Avoid nonnull as we do not touch optnone
define internal void @optnone(i32* dereferenceable(4) %a) optnone noinline { define internal void @optnone(i32* dereferenceable(4) %a) optnone noinline {
; ;
; NOT_CGSCC_OPM: Function Attrs: noinline optnone ; CHECK: Function Attrs: noinline optnone
; NOT_CGSCC_OPM-LABEL: define {{[^@]+}}@optnone ; CHECK-LABEL: define {{[^@]+}}@optnone
; NOT_CGSCC_OPM-SAME: (i32* dereferenceable(4) [[A:%.*]]) #[[ATTR9:[0-9]+]] { ; CHECK-SAME: (i32* dereferenceable(4) [[A:%.*]]) #[[ATTR9:[0-9]+]] {
; NOT_CGSCC_OPM-NEXT: call void @use_i32_ptr(i32* [[A]]) ; CHECK-NEXT: call void @use_i32_ptr(i32* [[A]])
; NOT_CGSCC_OPM-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC_OPM: Function Attrs: noinline optnone
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@optnone
; IS__CGSCC_OPM-SAME: (i32* dereferenceable(4) [[A:%.*]]) #[[ATTR10:[0-9]+]] {
; IS__CGSCC_OPM-NEXT: call void @use_i32_ptr(i32* [[A]])
; IS__CGSCC_OPM-NEXT: ret void
; ;
call void @use_i32_ptr(i32* %a) call void @use_i32_ptr(i32* %a)
ret void ret void
} }
define void @make_live(i32* nonnull dereferenceable(8) %a) { define void @make_live(i32* nonnull dereferenceable(8) %a) {
; NOT_CGSCC_OPM-LABEL: define {{[^@]+}}@make_live ; CHECK-LABEL: define {{[^@]+}}@make_live
; NOT_CGSCC_OPM-SAME: (i32* noundef nonnull align 16 dereferenceable(8) [[A:%.*]]) { ; CHECK-SAME: (i32* noundef nonnull align 16 dereferenceable(8) [[A:%.*]]) {
; NOT_CGSCC_OPM-NEXT: call void @naked(i32* noundef nonnull align 16 dereferenceable(8) [[A]]) ; CHECK-NEXT: call void @naked(i32* noundef nonnull align 16 dereferenceable(8) [[A]])
; NOT_CGSCC_OPM-NEXT: call void @control(i32* noalias nocapture noundef nonnull readnone align 16 dereferenceable(8) [[A]]) #[[ATTR3]] ; CHECK-NEXT: call void @control(i32* noalias nocapture noundef nonnull readnone align 16 dereferenceable(8) [[A]]) #[[ATTR3]]
; NOT_CGSCC_OPM-NEXT: call void @optnone(i32* noundef nonnull align 16 dereferenceable(8) [[A]]) ; CHECK-NEXT: call void @optnone(i32* noundef nonnull align 16 dereferenceable(8) [[A]])
; NOT_CGSCC_OPM-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@make_live
; IS__CGSCC_OPM-SAME: (i32* noundef nonnull align 16 dereferenceable(8) [[A:%.*]]) {
; IS__CGSCC_OPM-NEXT: call void @naked(i32* noundef nonnull align 16 dereferenceable(8) [[A]])
; IS__CGSCC_OPM-NEXT: call void @control(i32* noalias nocapture noundef nonnull readnone align 16 dereferenceable(8) [[A]]) #[[ATTR4]]
; IS__CGSCC_OPM-NEXT: call void @optnone(i32* noundef nonnull align 16 dereferenceable(8) [[A]])
; IS__CGSCC_OPM-NEXT: ret void
; ;
call void @naked(i32* nonnull dereferenceable(8) align 16 %a) call void @naked(i32* nonnull dereferenceable(8) align 16 %a)
call void @control(i32* nonnull dereferenceable(8) align 16 %a) call void @control(i32* nonnull dereferenceable(8) align 16 %a)
call void @optnone(i32* nonnull dereferenceable(8) align 16 %a) call void @optnone(i32* nonnull dereferenceable(8) align 16 %a)
ret void ret void
} }
;int f(int *u, int n){ ;int f(int *u, int n){
; for(int i = 0;i<n;i++){ ; for(int i = 0;i<n;i++){
; h(u); ; h(u);
; } ; }
; return g(nonnull u); ; return g(nonnull u);
;} ;}
declare void @h(i32*) willreturn nounwind declare void @h(i32*) willreturn nounwind
declare i32 @g(i32*) willreturn nounwind declare i32 @g(i32*) willreturn nounwind
define i32 @nonnull_exec_ctx_1(i32* %a, i32 %b) { define i32 @nonnull_exec_ctx_1(i32* %a, i32 %b) {
; ;
; IS__TUNIT_OPM: Function Attrs: nounwind ; IS________OPM: Function Attrs: nounwind
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@nonnull_exec_ctx_1 ; IS________OPM-LABEL: define {{[^@]+}}@nonnull_exec_ctx_1
; IS__TUNIT_OPM-SAME: (i32* [[A:%.*]], i32 [[B:%.*]]) #[[ATTR3]] { ; IS________OPM-SAME: (i32* [[A:%.*]], i32 [[B:%.*]]) #[[ATTR3]] {
; IS__TUNIT_OPM-NEXT: en: ; IS________OPM-NEXT: en:
; IS__TUNIT_OPM-NEXT: [[TMP3:%.*]] = icmp eq i32 [[B]], 0 ; IS________OPM-NEXT: [[TMP3:%.*]] = icmp eq i32 [[B]], 0
; IS__TUNIT_OPM-NEXT: br i1 [[TMP3]], label [[EX:%.*]], label [[HD:%.*]] ; IS________OPM-NEXT: br i1 [[TMP3]], label [[EX:%.*]], label [[HD:%.*]]
; IS__TUNIT_OPM: ex: ; IS________OPM: ex:
; IS__TUNIT_OPM-NEXT: [[TMP5:%.*]] = tail call i32 @g(i32* nonnull [[A]]) #[[ATTR3]] ; IS________OPM-NEXT: [[TMP5:%.*]] = tail call i32 @g(i32* nonnull [[A]]) #[[ATTR3]]
; IS__TUNIT_OPM-NEXT: ret i32 [[TMP5]] ; IS________OPM-NEXT: ret i32 [[TMP5]]
; IS__TUNIT_OPM: hd: ; IS________OPM: hd:
; IS__TUNIT_OPM-NEXT: [[TMP7:%.*]] = phi i32 [ [[TMP8:%.*]], [[HD]] ], [ 0, [[EN:%.*]] ] ; IS________OPM-NEXT: [[TMP7:%.*]] = phi i32 [ [[TMP8:%.*]], [[HD]] ], [ 0, [[EN:%.*]] ]
; IS__TUNIT_OPM-NEXT: tail call void @h(i32* [[A]]) #[[ATTR3]] ; IS________OPM-NEXT: tail call void @h(i32* [[A]]) #[[ATTR3]]
; IS__TUNIT_OPM-NEXT: [[TMP8]] = add nuw i32 [[TMP7]], 1 ; IS________OPM-NEXT: [[TMP8]] = add nuw i32 [[TMP7]], 1
; IS__TUNIT_OPM-NEXT: [[TMP9:%.*]] = icmp eq i32 [[TMP8]], [[B]] ; IS________OPM-NEXT: [[TMP9:%.*]] = icmp eq i32 [[TMP8]], [[B]]
; IS__TUNIT_OPM-NEXT: br i1 [[TMP9]], label [[EX]], label [[HD]] ; IS________OPM-NEXT: br i1 [[TMP9]], label [[EX]], label [[HD]]
; ;
; IS________NPM: Function Attrs: nounwind willreturn ; IS________NPM: Function Attrs: nounwind willreturn
; IS________NPM-LABEL: define {{[^@]+}}@nonnull_exec_ctx_1 ; IS________NPM-LABEL: define {{[^@]+}}@nonnull_exec_ctx_1
; IS________NPM-SAME: (i32* [[A:%.*]], i32 [[B:%.*]]) #[[ATTR5]] { ; IS________NPM-SAME: (i32* [[A:%.*]], i32 [[B:%.*]]) #[[ATTR5]] {
; IS________NPM-NEXT: en: ; IS________NPM-NEXT: en:
; IS________NPM-NEXT: [[TMP3:%.*]] = icmp eq i32 [[B]], 0 ; IS________NPM-NEXT: [[TMP3:%.*]] = icmp eq i32 [[B]], 0
; IS________NPM-NEXT: br i1 [[TMP3]], label [[EX:%.*]], label [[HD:%.*]] ; IS________NPM-NEXT: br i1 [[TMP3]], label [[EX:%.*]], label [[HD:%.*]]
; IS________NPM: ex: ; IS________NPM: ex:
; IS________NPM-NEXT: [[TMP5:%.*]] = tail call i32 @g(i32* nonnull [[A]]) #[[ATTR5]] ; IS________NPM-NEXT: [[TMP5:%.*]] = tail call i32 @g(i32* nonnull [[A]]) #[[ATTR5]]
; IS________NPM-NEXT: ret i32 [[TMP5]] ; IS________NPM-NEXT: ret i32 [[TMP5]]
; IS________NPM: hd: ; IS________NPM: hd:
; IS________NPM-NEXT: [[TMP7:%.*]] = phi i32 [ [[TMP8:%.*]], [[HD]] ], [ 0, [[EN:%.*]] ] ; IS________NPM-NEXT: [[TMP7:%.*]] = phi i32 [ [[TMP8:%.*]], [[HD]] ], [ 0, [[EN:%.*]] ]
; IS________NPM-NEXT: tail call void @h(i32* [[A]]) #[[ATTR5]] ; IS________NPM-NEXT: tail call void @h(i32* [[A]]) #[[ATTR5]]
; IS________NPM-NEXT: [[TMP8]] = add nuw i32 [[TMP7]], 1 ; IS________NPM-NEXT: [[TMP8]] = add nuw i32 [[TMP7]], 1
; IS________NPM-NEXT: [[TMP9:%.*]] = icmp eq i32 [[TMP8]], [[B]] ; IS________NPM-NEXT: [[TMP9:%.*]] = icmp eq i32 [[TMP8]], [[B]]
; IS________NPM-NEXT: br i1 [[TMP9]], label [[EX]], label [[HD]] ; IS________NPM-NEXT: br i1 [[TMP9]], label [[EX]], label [[HD]]
; ;
; IS__CGSCC_OPM: Function Attrs: nounwind
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@nonnull_exec_ctx_1
; IS__CGSCC_OPM-SAME: (i32* [[A:%.*]], i32 [[B:%.*]]) #[[ATTR4]] {
; IS__CGSCC_OPM-NEXT: en:
; IS__CGSCC_OPM-NEXT: [[TMP3:%.*]] = icmp eq i32 [[B]], 0
; IS__CGSCC_OPM-NEXT: br i1 [[TMP3]], label [[EX:%.*]], label [[HD:%.*]]
; IS__CGSCC_OPM: ex:
; IS__CGSCC_OPM-NEXT: [[TMP5:%.*]] = tail call i32 @g(i32* nonnull [[A]]) #[[ATTR4]]
; IS__CGSCC_OPM-NEXT: ret i32 [[TMP5]]
; IS__CGSCC_OPM: hd:
; IS__CGSCC_OPM-NEXT: [[TMP7:%.*]] = phi i32 [ [[TMP8:%.*]], [[HD]] ], [ 0, [[EN:%.*]] ]
; IS__CGSCC_OPM-NEXT: tail call void @h(i32* [[A]]) #[[ATTR4]]
; IS__CGSCC_OPM-NEXT: [[TMP8]] = add nuw i32 [[TMP7]], 1
; IS__CGSCC_OPM-NEXT: [[TMP9:%.*]] = icmp eq i32 [[TMP8]], [[B]]
; IS__CGSCC_OPM-NEXT: br i1 [[TMP9]], label [[EX]], label [[HD]]
;
en: en:
%tmp3 = icmp eq i32 %b, 0 %tmp3 = icmp eq i32 %b, 0
br i1 %tmp3, label %ex, label %hd br i1 %tmp3, label %ex, label %hd
ex: ex:
%tmp5 = tail call i32 @g(i32* nonnull %a) %tmp5 = tail call i32 @g(i32* nonnull %a)
ret i32 %tmp5 ret i32 %tmp5
hd: hd:
%tmp7 = phi i32 [ %tmp8, %hd ], [ 0, %en ] %tmp7 = phi i32 [ %tmp8, %hd ], [ 0, %en ]
tail call void @h(i32* %a) tail call void @h(i32* %a)
%tmp8 = add nuw i32 %tmp7, 1 %tmp8 = add nuw i32 %tmp7, 1
%tmp9 = icmp eq i32 %tmp8, %b %tmp9 = icmp eq i32 %tmp8, %b
br i1 %tmp9, label %ex, label %hd br i1 %tmp9, label %ex, label %hd
} }
define i32 @nonnull_exec_ctx_1b(i32* %a, i32 %b) { define i32 @nonnull_exec_ctx_1b(i32* %a, i32 %b) {
; ;
; IS__TUNIT_OPM: Function Attrs: nounwind ; IS________OPM: Function Attrs: nounwind
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@nonnull_exec_ctx_1b ; IS________OPM-LABEL: define {{[^@]+}}@nonnull_exec_ctx_1b
; IS__TUNIT_OPM-SAME: (i32* [[A:%.*]], i32 [[B:%.*]]) #[[ATTR3]] { ; IS________OPM-SAME: (i32* [[A:%.*]], i32 [[B:%.*]]) #[[ATTR3]] {
; IS__TUNIT_OPM-NEXT: en: ; IS________OPM-NEXT: en:
; IS__TUNIT_OPM-NEXT: [[TMP3:%.*]] = icmp eq i32 [[B]], 0 ; IS________OPM-NEXT: [[TMP3:%.*]] = icmp eq i32 [[B]], 0
; IS__TUNIT_OPM-NEXT: br i1 [[TMP3]], label [[EX:%.*]], label [[HD:%.*]] ; IS________OPM-NEXT: br i1 [[TMP3]], label [[EX:%.*]], label [[HD:%.*]]
; IS__TUNIT_OPM: ex: ; IS________OPM: ex:
; IS__TUNIT_OPM-NEXT: [[TMP5:%.*]] = tail call i32 @g(i32* nonnull [[A]]) #[[ATTR3]] ; IS________OPM-NEXT: [[TMP5:%.*]] = tail call i32 @g(i32* nonnull [[A]]) #[[ATTR3]]
; IS__TUNIT_OPM-NEXT: ret i32 [[TMP5]] ; IS________OPM-NEXT: ret i32 [[TMP5]]
; IS__TUNIT_OPM: hd: ; IS________OPM: hd:
; IS__TUNIT_OPM-NEXT: [[TMP7:%.*]] = phi i32 [ [[TMP8:%.*]], [[HD2:%.*]] ], [ 0, [[EN:%.*]] ] ; IS________OPM-NEXT: [[TMP7:%.*]] = phi i32 [ [[TMP8:%.*]], [[HD2:%.*]] ], [ 0, [[EN:%.*]] ]
; IS__TUNIT_OPM-NEXT: tail call void @h(i32* [[A]]) #[[ATTR3]] ; IS________OPM-NEXT: tail call void @h(i32* [[A]]) #[[ATTR3]]
; IS__TUNIT_OPM-NEXT: br label [[HD2]] ; IS________OPM-NEXT: br label [[HD2]]
; IS__TUNIT_OPM: hd2: ; IS________OPM: hd2:
; IS__TUNIT_OPM-NEXT: [[TMP8]] = add nuw i32 [[TMP7]], 1 ; IS________OPM-NEXT: [[TMP8]] = add nuw i32 [[TMP7]], 1
; IS__TUNIT_OPM-NEXT: [[TMP9:%.*]] = icmp eq i32 [[TMP8]], [[B]] ; IS________OPM-NEXT: [[TMP9:%.*]] = icmp eq i32 [[TMP8]], [[B]]
; IS__TUNIT_OPM-NEXT: br i1 [[TMP9]], label [[EX]], label [[HD]] ; IS________OPM-NEXT: br i1 [[TMP9]], label [[EX]], label [[HD]]
; ;
; IS________NPM: Function Attrs: nounwind willreturn ; IS________NPM: Function Attrs: nounwind willreturn
; IS________NPM-LABEL: define {{[^@]+}}@nonnull_exec_ctx_1b ; IS________NPM-LABEL: define {{[^@]+}}@nonnull_exec_ctx_1b
; IS________NPM-SAME: (i32* [[A:%.*]], i32 [[B:%.*]]) #[[ATTR5]] { ; IS________NPM-SAME: (i32* [[A:%.*]], i32 [[B:%.*]]) #[[ATTR5]] {
; IS________NPM-NEXT: en: ; IS________NPM-NEXT: en:
; IS________NPM-NEXT: [[TMP3:%.*]] = icmp eq i32 [[B]], 0 ; IS________NPM-NEXT: [[TMP3:%.*]] = icmp eq i32 [[B]], 0
; IS________NPM-NEXT: br i1 [[TMP3]], label [[EX:%.*]], label [[HD:%.*]] ; IS________NPM-NEXT: br i1 [[TMP3]], label [[EX:%.*]], label [[HD:%.*]]
; IS________NPM: ex: ; IS________NPM: ex:
; IS________NPM-NEXT: [[TMP5:%.*]] = tail call i32 @g(i32* nonnull [[A]]) #[[ATTR5]] ; IS________NPM-NEXT: [[TMP5:%.*]] = tail call i32 @g(i32* nonnull [[A]]) #[[ATTR5]]
; IS________NPM-NEXT: ret i32 [[TMP5]] ; IS________NPM-NEXT: ret i32 [[TMP5]]
; IS________NPM: hd: ; IS________NPM: hd:
; IS________NPM-NEXT: [[TMP7:%.*]] = phi i32 [ [[TMP8:%.*]], [[HD2:%.*]] ], [ 0, [[EN:%.*]] ] ; IS________NPM-NEXT: [[TMP7:%.*]] = phi i32 [ [[TMP8:%.*]], [[HD2:%.*]] ], [ 0, [[EN:%.*]] ]
; IS________NPM-NEXT: tail call void @h(i32* [[A]]) #[[ATTR5]] ; IS________NPM-NEXT: tail call void @h(i32* [[A]]) #[[ATTR5]]
; IS________NPM-NEXT: br label [[HD2]] ; IS________NPM-NEXT: br label [[HD2]]
; IS________NPM: hd2: ; IS________NPM: hd2:
; IS________NPM-NEXT: [[TMP8]] = add nuw i32 [[TMP7]], 1 ; IS________NPM-NEXT: [[TMP8]] = add nuw i32 [[TMP7]], 1
; IS________NPM-NEXT: [[TMP9:%.*]] = icmp eq i32 [[TMP8]], [[B]] ; IS________NPM-NEXT: [[TMP9:%.*]] = icmp eq i32 [[TMP8]], [[B]]
; IS________NPM-NEXT: br i1 [[TMP9]], label [[EX]], label [[HD]] ; IS________NPM-NEXT: br i1 [[TMP9]], label [[EX]], label [[HD]]
; ;
; IS__CGSCC_OPM: Function Attrs: nounwind
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@nonnull_exec_ctx_1b
; IS__CGSCC_OPM-SAME: (i32* [[A:%.*]], i32 [[B:%.*]]) #[[ATTR4]] {
; IS__CGSCC_OPM-NEXT: en:
; IS__CGSCC_OPM-NEXT: [[TMP3:%.*]] = icmp eq i32 [[B]], 0
; IS__CGSCC_OPM-NEXT: br i1 [[TMP3]], label [[EX:%.*]], label [[HD:%.*]]
; IS__CGSCC_OPM: ex:
; IS__CGSCC_OPM-NEXT: [[TMP5:%.*]] = tail call i32 @g(i32* nonnull [[A]]) #[[ATTR4]]
; IS__CGSCC_OPM-NEXT: ret i32 [[TMP5]]
; IS__CGSCC_OPM: hd:
; IS__CGSCC_OPM-NEXT: [[TMP7:%.*]] = phi i32 [ [[TMP8:%.*]], [[HD2:%.*]] ], [ 0, [[EN:%.*]] ]
; IS__CGSCC_OPM-NEXT: tail call void @h(i32* [[A]]) #[[ATTR4]]
; IS__CGSCC_OPM-NEXT: br label [[HD2]]
; IS__CGSCC_OPM: hd2:
; IS__CGSCC_OPM-NEXT: [[TMP8]] = add nuw i32 [[TMP7]], 1
; IS__CGSCC_OPM-NEXT: [[TMP9:%.*]] = icmp eq i32 [[TMP8]], [[B]]
; IS__CGSCC_OPM-NEXT: br i1 [[TMP9]], label [[EX]], label [[HD]]
;
en: en:
%tmp3 = icmp eq i32 %b, 0 %tmp3 = icmp eq i32 %b, 0
br i1 %tmp3, label %ex, label %hd br i1 %tmp3, label %ex, label %hd
ex: ex:
%tmp5 = tail call i32 @g(i32* nonnull %a) %tmp5 = tail call i32 @g(i32* nonnull %a)
ret i32 %tmp5 ret i32 %tmp5
hd: hd:
%tmp7 = phi i32 [ %tmp8, %hd2 ], [ 0, %en ] %tmp7 = phi i32 [ %tmp8, %hd2 ], [ 0, %en ]
tail call void @h(i32* %a) tail call void @h(i32* %a)
br label %hd2 br label %hd2
hd2: hd2:
%tmp8 = add nuw i32 %tmp7, 1 %tmp8 = add nuw i32 %tmp7, 1
%tmp9 = icmp eq i32 %tmp8, %b %tmp9 = icmp eq i32 %tmp8, %b
br i1 %tmp9, label %ex, label %hd br i1 %tmp9, label %ex, label %hd
} }
define i32 @nonnull_exec_ctx_2(i32* %a, i32 %b) willreturn nounwind { define i32 @nonnull_exec_ctx_2(i32* %a, i32 %b) willreturn nounwind {
; ;
; NOT_CGSCC_OPM: Function Attrs: nounwind willreturn ; CHECK: Function Attrs: nounwind willreturn
; NOT_CGSCC_OPM-LABEL: define {{[^@]+}}@nonnull_exec_ctx_2 ; CHECK-LABEL: define {{[^@]+}}@nonnull_exec_ctx_2
; NOT_CGSCC_OPM-SAME: (i32* nonnull [[A:%.*]], i32 [[B:%.*]]) #[[ATTR5]] { ; CHECK-SAME: (i32* nonnull [[A:%.*]], i32 [[B:%.*]]) #[[ATTR5]] {
; NOT_CGSCC_OPM-NEXT: en: ; CHECK-NEXT: en:
; NOT_CGSCC_OPM-NEXT: [[TMP3:%.*]] = icmp eq i32 [[B]], 0 ; CHECK-NEXT: [[TMP3:%.*]] = icmp eq i32 [[B]], 0
; NOT_CGSCC_OPM-NEXT: br i1 [[TMP3]], label [[EX:%.*]], label [[HD:%.*]] ; CHECK-NEXT: br i1 [[TMP3]], label [[EX:%.*]], label [[HD:%.*]]
; NOT_CGSCC_OPM: ex: ; CHECK: ex:
; NOT_CGSCC_OPM-NEXT: [[TMP5:%.*]] = tail call i32 @g(i32* nonnull [[A]]) #[[ATTR3]] ; CHECK-NEXT: [[TMP5:%.*]] = tail call i32 @g(i32* nonnull [[A]]) #[[ATTR3]]
; NOT_CGSCC_OPM-NEXT: ret i32 [[TMP5]] ; CHECK-NEXT: ret i32 [[TMP5]]
; NOT_CGSCC_OPM: hd: ; CHECK: hd:
; NOT_CGSCC_OPM-NEXT: [[TMP7:%.*]] = phi i32 [ [[TMP8:%.*]], [[HD]] ], [ 0, [[EN:%.*]] ] ; CHECK-NEXT: [[TMP7:%.*]] = phi i32 [ [[TMP8:%.*]], [[HD]] ], [ 0, [[EN:%.*]] ]
; NOT_CGSCC_OPM-NEXT: tail call void @h(i32* nonnull [[A]]) #[[ATTR3]] ; CHECK-NEXT: tail call void @h(i32* nonnull [[A]]) #[[ATTR3]]
; NOT_CGSCC_OPM-NEXT: [[TMP8]] = add nuw i32 [[TMP7]], 1 ; CHECK-NEXT: [[TMP8]] = add nuw i32 [[TMP7]], 1
; NOT_CGSCC_OPM-NEXT: [[TMP9:%.*]] = icmp eq i32 [[TMP8]], [[B]] ; CHECK-NEXT: [[TMP9:%.*]] = icmp eq i32 [[TMP8]], [[B]]
; NOT_CGSCC_OPM-NEXT: br i1 [[TMP9]], label [[EX]], label [[HD]] ; CHECK-NEXT: br i1 [[TMP9]], label [[EX]], label [[HD]]
;
; IS__CGSCC_OPM: Function Attrs: nounwind willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@nonnull_exec_ctx_2
; IS__CGSCC_OPM-SAME: (i32* nonnull [[A:%.*]], i32 [[B:%.*]]) #[[ATTR6]] {
; IS__CGSCC_OPM-NEXT: en:
; IS__CGSCC_OPM-NEXT: [[TMP3:%.*]] = icmp eq i32 [[B]], 0
; IS__CGSCC_OPM-NEXT: br i1 [[TMP3]], label [[EX:%.*]], label [[HD:%.*]]
; IS__CGSCC_OPM: ex:
; IS__CGSCC_OPM-NEXT: [[TMP5:%.*]] = tail call i32 @g(i32* nonnull [[A]]) #[[ATTR4]]
; IS__CGSCC_OPM-NEXT: ret i32 [[TMP5]]
; IS__CGSCC_OPM: hd:
; IS__CGSCC_OPM-NEXT: [[TMP7:%.*]] = phi i32 [ [[TMP8:%.*]], [[HD]] ], [ 0, [[EN:%.*]] ]
; IS__CGSCC_OPM-NEXT: tail call void @h(i32* nonnull [[A]]) #[[ATTR4]]
; IS__CGSCC_OPM-NEXT: [[TMP8]] = add nuw i32 [[TMP7]], 1
; IS__CGSCC_OPM-NEXT: [[TMP9:%.*]] = icmp eq i32 [[TMP8]], [[B]]
; IS__CGSCC_OPM-NEXT: br i1 [[TMP9]], label [[EX]], label [[HD]]
; ;
en: en:
%tmp3 = icmp eq i32 %b, 0 %tmp3 = icmp eq i32 %b, 0
br i1 %tmp3, label %ex, label %hd br i1 %tmp3, label %ex, label %hd
ex: ex:
%tmp5 = tail call i32 @g(i32* nonnull %a) %tmp5 = tail call i32 @g(i32* nonnull %a)
ret i32 %tmp5 ret i32 %tmp5
hd: hd:
%tmp7 = phi i32 [ %tmp8, %hd ], [ 0, %en ] %tmp7 = phi i32 [ %tmp8, %hd ], [ 0, %en ]
tail call void @h(i32* %a) tail call void @h(i32* %a)
%tmp8 = add nuw i32 %tmp7, 1 %tmp8 = add nuw i32 %tmp7, 1
%tmp9 = icmp eq i32 %tmp8, %b %tmp9 = icmp eq i32 %tmp8, %b
br i1 %tmp9, label %ex, label %hd br i1 %tmp9, label %ex, label %hd
} }
define i32 @nonnull_exec_ctx_2b(i32* %a, i32 %b) willreturn nounwind { define i32 @nonnull_exec_ctx_2b(i32* %a, i32 %b) willreturn nounwind {
; ;
; NOT_CGSCC_OPM: Function Attrs: nounwind willreturn ; CHECK: Function Attrs: nounwind willreturn
; NOT_CGSCC_OPM-LABEL: define {{[^@]+}}@nonnull_exec_ctx_2b ; CHECK-LABEL: define {{[^@]+}}@nonnull_exec_ctx_2b
; NOT_CGSCC_OPM-SAME: (i32* nonnull [[A:%.*]], i32 [[B:%.*]]) #[[ATTR5]] { ; CHECK-SAME: (i32* nonnull [[A:%.*]], i32 [[B:%.*]]) #[[ATTR5]] {
; NOT_CGSCC_OPM-NEXT: en: ; CHECK-NEXT: en:
; NOT_CGSCC_OPM-NEXT: [[TMP3:%.*]] = icmp eq i32 [[B]], 0 ; CHECK-NEXT: [[TMP3:%.*]] = icmp eq i32 [[B]], 0
; NOT_CGSCC_OPM-NEXT: br i1 [[TMP3]], label [[EX:%.*]], label [[HD:%.*]] ; CHECK-NEXT: br i1 [[TMP3]], label [[EX:%.*]], label [[HD:%.*]]
; NOT_CGSCC_OPM: ex: ; CHECK: ex:
; NOT_CGSCC_OPM-NEXT: [[TMP5:%.*]] = tail call i32 @g(i32* nonnull [[A]]) #[[ATTR3]] ; CHECK-NEXT: [[TMP5:%.*]] = tail call i32 @g(i32* nonnull [[A]]) #[[ATTR3]]
; NOT_CGSCC_OPM-NEXT: ret i32 [[TMP5]] ; CHECK-NEXT: ret i32 [[TMP5]]
; NOT_CGSCC_OPM: hd: ; CHECK: hd:
; NOT_CGSCC_OPM-NEXT: [[TMP7:%.*]] = phi i32 [ [[TMP8:%.*]], [[HD2:%.*]] ], [ 0, [[EN:%.*]] ] ; CHECK-NEXT: [[TMP7:%.*]] = phi i32 [ [[TMP8:%.*]], [[HD2:%.*]] ], [ 0, [[EN:%.*]] ]
; NOT_CGSCC_OPM-NEXT: tail call void @h(i32* nonnull [[A]]) #[[ATTR3]] ; CHECK-NEXT: tail call void @h(i32* nonnull [[A]]) #[[ATTR3]]
; NOT_CGSCC_OPM-NEXT: br label [[HD2]] ; CHECK-NEXT: br label [[HD2]]
; NOT_CGSCC_OPM: hd2: ; CHECK: hd2:
; NOT_CGSCC_OPM-NEXT: [[TMP8]] = add nuw i32 [[TMP7]], 1 ; CHECK-NEXT: [[TMP8]] = add nuw i32 [[TMP7]], 1
; NOT_CGSCC_OPM-NEXT: [[TMP9:%.*]] = icmp eq i32 [[TMP8]], [[B]] ; CHECK-NEXT: [[TMP9:%.*]] = icmp eq i32 [[TMP8]], [[B]]
; NOT_CGSCC_OPM-NEXT: br i1 [[TMP9]], label [[EX]], label [[HD]] ; CHECK-NEXT: br i1 [[TMP9]], label [[EX]], label [[HD]]
;
; IS__CGSCC_OPM: Function Attrs: nounwind willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@nonnull_exec_ctx_2b
; IS__CGSCC_OPM-SAME: (i32* nonnull [[A:%.*]], i32 [[B:%.*]]) #[[ATTR6]] {
; IS__CGSCC_OPM-NEXT: en:
; IS__CGSCC_OPM-NEXT: [[TMP3:%.*]] = icmp eq i32 [[B]], 0
; IS__CGSCC_OPM-NEXT: br i1 [[TMP3]], label [[EX:%.*]], label [[HD:%.*]]
; IS__CGSCC_OPM: ex:
; IS__CGSCC_OPM-NEXT: [[TMP5:%.*]] = tail call i32 @g(i32* nonnull [[A]]) #[[ATTR4]]
; IS__CGSCC_OPM-NEXT: ret i32 [[TMP5]]
; IS__CGSCC_OPM: hd:
; IS__CGSCC_OPM-NEXT: [[TMP7:%.*]] = phi i32 [ [[TMP8:%.*]], [[HD2:%.*]] ], [ 0, [[EN:%.*]] ]
; IS__CGSCC_OPM-NEXT: tail call void @h(i32* nonnull [[A]]) #[[ATTR4]]
; IS__CGSCC_OPM-NEXT: br label [[HD2]]
; IS__CGSCC_OPM: hd2:
; IS__CGSCC_OPM-NEXT: [[TMP8]] = add nuw i32 [[TMP7]], 1
; IS__CGSCC_OPM-NEXT: [[TMP9:%.*]] = icmp eq i32 [[TMP8]], [[B]]
; IS__CGSCC_OPM-NEXT: br i1 [[TMP9]], label [[EX]], label [[HD]]
; ;
en: en:
%tmp3 = icmp eq i32 %b, 0 %tmp3 = icmp eq i32 %b, 0
br i1 %tmp3, label %ex, label %hd br i1 %tmp3, label %ex, label %hd
ex: ex:
%tmp5 = tail call i32 @g(i32* nonnull %a) %tmp5 = tail call i32 @g(i32* nonnull %a)
ret i32 %tmp5 ret i32 %tmp5
▲ Show 20 Lines • Show All 120 Lines • ▼ Show 20 Lines8: ; preds = %8, %4
%11 = icmp eq i32 %10, %1 %11 = icmp eq i32 %10, %1
br i1 %11, label %7, label %8 br i1 %11, label %7, label %8
} }
declare i8* @strrchr(i8* %0, i32 %1) nofree nounwind readonly willreturn declare i8* @strrchr(i8* %0, i32 %1) nofree nounwind readonly willreturn
; We should not mark the return of @strrchr as `nonnull`, it may well be NULL! ; We should not mark the return of @strrchr as `nonnull`, it may well be NULL!
define i8* @mybasename(i8* nofree readonly %str) { define i8* @mybasename(i8* nofree readonly %str) {
; NOT_CGSCC_OPM: Function Attrs: nofree nounwind readonly willreturn ; CHECK: Function Attrs: nofree nounwind readonly willreturn
; NOT_CGSCC_OPM-LABEL: define {{[^@]+}}@mybasename ; CHECK-LABEL: define {{[^@]+}}@mybasename
; NOT_CGSCC_OPM-SAME: (i8* nofree readonly [[STR:%.*]]) #[[ATTR10:[0-9]+]] { ; CHECK-SAME: (i8* nofree readonly [[STR:%.*]]) #[[ATTR10:[0-9]+]] {
; NOT_CGSCC_OPM-NEXT: [[CALL:%.*]] = call i8* @strrchr(i8* nofree readonly [[STR]], i32 noundef 47) #[[ATTR13]] ; CHECK-NEXT: [[CALL:%.*]] = call i8* @strrchr(i8* nofree readonly [[STR]], i32 noundef 47) #[[ATTR13]]
; NOT_CGSCC_OPM-NEXT: [[TOBOOL:%.*]] = icmp ne i8* [[CALL]], null ; CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i8* [[CALL]], null
; NOT_CGSCC_OPM-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i8, i8* [[CALL]], i64 1 ; CHECK-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i8, i8* [[CALL]], i64 1
; NOT_CGSCC_OPM-NEXT: [[COND:%.*]] = select i1 [[TOBOOL]], i8* [[ADD_PTR]], i8* [[STR]] ; CHECK-NEXT: [[COND:%.*]] = select i1 [[TOBOOL]], i8* [[ADD_PTR]], i8* [[STR]]
; NOT_CGSCC_OPM-NEXT: ret i8* [[COND]] ; CHECK-NEXT: ret i8* [[COND]]
;
; IS__CGSCC_OPM: Function Attrs: nofree nounwind readonly willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@mybasename
; IS__CGSCC_OPM-SAME: (i8* nofree readonly [[STR:%.*]]) #[[ATTR11:[0-9]+]] {
; IS__CGSCC_OPM-NEXT: [[CALL:%.*]] = call i8* @strrchr(i8* nofree readonly [[STR]], i32 noundef 47) #[[ATTR14]]
; IS__CGSCC_OPM-NEXT: [[TOBOOL:%.*]] = icmp ne i8* [[CALL]], null
; IS__CGSCC_OPM-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i8, i8* [[CALL]], i64 1
; IS__CGSCC_OPM-NEXT: [[COND:%.*]] = select i1 [[TOBOOL]], i8* [[ADD_PTR]], i8* [[STR]]
; IS__CGSCC_OPM-NEXT: ret i8* [[COND]]
; ;
%call = call i8* @strrchr(i8* %str, i32 47) %call = call i8* @strrchr(i8* %str, i32 47)
%tobool = icmp ne i8* %call, null %tobool = icmp ne i8* %call, null
%add.ptr = getelementptr inbounds i8, i8* %call, i64 1 %add.ptr = getelementptr inbounds i8, i8* %call, i64 1
%cond = select i1 %tobool, i8* %add.ptr, i8* %str %cond = select i1 %tobool, i8* %add.ptr, i8* %str
ret i8* %cond ret i8* %cond
} }
define void @nonnull_assume_pos(i8* %arg) { define void @nonnull_assume_pos(i8* %arg) {
; ATTRIBUTOR-LABEL: define {{[^@]+}}@nonnull_assume_pos ; ATTRIBUTOR-LABEL: define {{[^@]+}}@nonnull_assume_pos
; ATTRIBUTOR-SAME: (i8* nocapture nofree nonnull readnone [[ARG:%.*]]) ; ATTRIBUTOR-SAME: (i8* nocapture nofree nonnull readnone [[ARG:%.*]])
; ATTRIBUTOR-NEXT: call void @llvm.assume(i1 true) #11 [ "nonnull"(i8* [[ARG]]) ] ; ATTRIBUTOR-NEXT: call void @llvm.assume(i1 true) #11 [ "nonnull"(i8* [[ARG]]) ]
; ATTRIBUTOR-NEXT: call void @use_i8_ptr(i8* noalias nocapture nofree nonnull readnone [[ARG]]) ; ATTRIBUTOR-NEXT: call void @use_i8_ptr(i8* noalias nocapture nofree nonnull readnone [[ARG]])
; ATTRIBUTOR-NEXT: [[TMP1:%.*]] = call i8* @unknown() ; ATTRIBUTOR-NEXT: [[TMP1:%.*]] = call i8* @unknown()
; ATTRIBUTOR-NEXT: ret void ; ATTRIBUTOR-NEXT: ret void
; ;
; NOT_CGSCC_OPM-LABEL: define {{[^@]+}}@nonnull_assume_pos ; CHECK-LABEL: define {{[^@]+}}@nonnull_assume_pos
; NOT_CGSCC_OPM-SAME: (i8* nocapture nofree nonnull readnone [[ARG:%.*]]) { ; CHECK-SAME: (i8* nocapture nofree nonnull readnone [[ARG:%.*]]) {
; NOT_CGSCC_OPM-NEXT: call void @llvm.assume(i1 noundef true) #[[ATTR11]] [ "nonnull"(i8* [[ARG]]) ] ; CHECK-NEXT: call void @llvm.assume(i1 noundef true) #[[ATTR11]] [ "nonnull"(i8* [[ARG]]) ]
; NOT_CGSCC_OPM-NEXT: call void @use_i8_ptr(i8* noalias nocapture nofree nonnull readnone [[ARG]]) #[[ATTR3]] ; CHECK-NEXT: call void @use_i8_ptr(i8* noalias nocapture nofree nonnull readnone [[ARG]]) #[[ATTR3]]
; NOT_CGSCC_OPM-NEXT: [[TMP1:%.*]] = call i8* @unknown() ; CHECK-NEXT: [[TMP1:%.*]] = call i8* @unknown()
; NOT_CGSCC_OPM-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@nonnull_assume_pos
; IS__CGSCC_OPM-SAME: (i8* nocapture nofree nonnull readnone [[ARG:%.*]]) {
; IS__CGSCC_OPM-NEXT: call void @llvm.assume(i1 noundef true) #[[ATTR12]] [ "nonnull"(i8* [[ARG]]) ]
; IS__CGSCC_OPM-NEXT: call void @use_i8_ptr(i8* noalias nocapture nofree nonnull readnone [[ARG]]) #[[ATTR4]]
; IS__CGSCC_OPM-NEXT: [[TMP1:%.*]] = call i8* @unknown()
; IS__CGSCC_OPM-NEXT: ret void
; ;
call void @llvm.assume(i1 true) ["nonnull"(i8* %arg)] call void @llvm.assume(i1 true) ["nonnull"(i8* %arg)]
call void @use_i8_ptr(i8* %arg) call void @use_i8_ptr(i8* %arg)
call i8* @unknown() call i8* @unknown()
ret void ret void
} }
define void @nonnull_assume_neg(i8* %arg) { define void @nonnull_assume_neg(i8* %arg) {
; ATTRIBUTOR-LABEL: define {{[^@]+}}@nonnull_assume_neg ; ATTRIBUTOR-LABEL: define {{[^@]+}}@nonnull_assume_neg
; ATTRIBUTOR-SAME: (i8* nocapture nofree readnone [[ARG:%.*]]) ; ATTRIBUTOR-SAME: (i8* nocapture nofree readnone [[ARG:%.*]])
; ATTRIBUTOR-NEXT: [[TMP1:%.*]] = call i8* @unknown() ; ATTRIBUTOR-NEXT: [[TMP1:%.*]] = call i8* @unknown()
; ATTRIBUTOR-NEXT: call void @use_i8_ptr(i8* noalias nocapture nofree readnone [[ARG]]) ; ATTRIBUTOR-NEXT: call void @use_i8_ptr(i8* noalias nocapture nofree readnone [[ARG]])
; ATTRIBUTOR-NEXT: call void @llvm.assume(i1 true) [ "nonnull"(i8* [[ARG]]) ] ; ATTRIBUTOR-NEXT: call void @llvm.assume(i1 true) [ "nonnull"(i8* [[ARG]]) ]
; ATTRIBUTOR-NEXT: call void @use_i8_ptr(i8* noalias nocapture nofree nonnull readnone [[ARG]]) ; ATTRIBUTOR-NEXT: call void @use_i8_ptr(i8* noalias nocapture nofree nonnull readnone [[ARG]])
; ATTRIBUTOR-NEXT: [[TMP2:%.*]] = call i8* @unknown() ; ATTRIBUTOR-NEXT: [[TMP2:%.*]] = call i8* @unknown()
; ATTRIBUTOR-NEXT: call void @use_i8_ptr_ret(i8* noalias nocapture nofree nonnull readnone [[ARG]]) ; ATTRIBUTOR-NEXT: call void @use_i8_ptr_ret(i8* noalias nocapture nofree nonnull readnone [[ARG]])
; ATTRIBUTOR-NEXT: call void @llvm.assume(i1 true) [ "nonnull"(i8* [[ARG]]) ] ; ATTRIBUTOR-NEXT: call void @llvm.assume(i1 true) [ "nonnull"(i8* [[ARG]]) ]
; ATTRIBUTOR-NEXT: call void @use_i8_ptr_ret(i8* noalias nocapture nofree nonnull readnone [[ARG]]) ; ATTRIBUTOR-NEXT: call void @use_i8_ptr_ret(i8* noalias nocapture nofree nonnull readnone [[ARG]])
; ATTRIBUTOR-NEXT: ret void ; ATTRIBUTOR-NEXT: ret void
; ;
; ;
; NOT_CGSCC_OPM-LABEL: define {{[^@]+}}@nonnull_assume_neg ; CHECK-LABEL: define {{[^@]+}}@nonnull_assume_neg
; NOT_CGSCC_OPM-SAME: (i8* nocapture nofree readnone [[ARG:%.*]]) { ; CHECK-SAME: (i8* nocapture nofree readnone [[ARG:%.*]]) {
; NOT_CGSCC_OPM-NEXT: [[TMP1:%.*]] = call i8* @unknown() ; CHECK-NEXT: [[TMP1:%.*]] = call i8* @unknown()
; NOT_CGSCC_OPM-NEXT: call void @use_i8_ptr(i8* noalias nocapture nofree readnone [[ARG]]) #[[ATTR3]] ; CHECK-NEXT: call void @use_i8_ptr(i8* noalias nocapture nofree readnone [[ARG]]) #[[ATTR3]]
; NOT_CGSCC_OPM-NEXT: call void @llvm.assume(i1 noundef true) [ "nonnull"(i8* [[ARG]]) ] ; CHECK-NEXT: call void @llvm.assume(i1 noundef true) [ "nonnull"(i8* [[ARG]]) ]
; NOT_CGSCC_OPM-NEXT: call void @use_i8_ptr(i8* noalias nocapture nofree nonnull readnone [[ARG]]) #[[ATTR3]] ; CHECK-NEXT: call void @use_i8_ptr(i8* noalias nocapture nofree nonnull readnone [[ARG]]) #[[ATTR3]]
; NOT_CGSCC_OPM-NEXT: [[TMP2:%.*]] = call i8* @unknown() ; CHECK-NEXT: [[TMP2:%.*]] = call i8* @unknown()
; NOT_CGSCC_OPM-NEXT: call void @use_i8_ptr_ret(i8* noalias nocapture nofree nonnull readnone [[ARG]]) #[[ATTR3]] ; CHECK-NEXT: call void @use_i8_ptr_ret(i8* noalias nocapture nofree nonnull readnone [[ARG]]) #[[ATTR3]]
; NOT_CGSCC_OPM-NEXT: call void @llvm.assume(i1 noundef true) [ "nonnull"(i8* [[ARG]]) ] ; CHECK-NEXT: call void @llvm.assume(i1 noundef true) [ "nonnull"(i8* [[ARG]]) ]
; NOT_CGSCC_OPM-NEXT: call void @use_i8_ptr_ret(i8* noalias nocapture nofree nonnull readnone [[ARG]]) #[[ATTR3]] ; CHECK-NEXT: call void @use_i8_ptr_ret(i8* noalias nocapture nofree nonnull readnone [[ARG]]) #[[ATTR3]]
; NOT_CGSCC_OPM-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@nonnull_assume_neg
; IS__CGSCC_OPM-SAME: (i8* nocapture nofree readnone [[ARG:%.*]]) {
; IS__CGSCC_OPM-NEXT: [[TMP1:%.*]] = call i8* @unknown()
; IS__CGSCC_OPM-NEXT: call void @use_i8_ptr(i8* noalias nocapture nofree readnone [[ARG]]) #[[ATTR4]]
; IS__CGSCC_OPM-NEXT: call void @llvm.assume(i1 noundef true) [ "nonnull"(i8* [[ARG]]) ]
; IS__CGSCC_OPM-NEXT: call void @use_i8_ptr(i8* noalias nocapture nofree nonnull readnone [[ARG]]) #[[ATTR4]]
; IS__CGSCC_OPM-NEXT: [[TMP2:%.*]] = call i8* @unknown()
; IS__CGSCC_OPM-NEXT: call void @use_i8_ptr_ret(i8* noalias nocapture nofree nonnull readnone [[ARG]]) #[[ATTR4]]
; IS__CGSCC_OPM-NEXT: call void @llvm.assume(i1 noundef true) [ "nonnull"(i8* [[ARG]]) ]
; IS__CGSCC_OPM-NEXT: call void @use_i8_ptr_ret(i8* noalias nocapture nofree nonnull readnone [[ARG]]) #[[ATTR4]]
; IS__CGSCC_OPM-NEXT: ret void
; ;
call i8* @unknown() call i8* @unknown()
call void @use_i8_ptr(i8* %arg) call void @use_i8_ptr(i8* %arg)
call void @llvm.assume(i1 true) ["nonnull"(i8* %arg)] call void @llvm.assume(i1 true) ["nonnull"(i8* %arg)]
call void @use_i8_ptr(i8* %arg) call void @use_i8_ptr(i8* %arg)
call i8* @unknown() call i8* @unknown()
call void @use_i8_ptr_ret(i8* %arg) call void @use_i8_ptr_ret(i8* %arg)
call void @llvm.assume(i1 true) ["nonnull"(i8* %arg)] call void @llvm.assume(i1 true) ["nonnull"(i8* %arg)]
call void @use_i8_ptr_ret(i8* %arg) call void @use_i8_ptr_ret(i8* %arg)
ret void ret void
} }
declare void @use_i8_ptr(i8* nofree nocapture readnone) nounwind declare void @use_i8_ptr(i8* nofree nocapture readnone) nounwind
declare void @use_i8_ptr_ret(i8* nofree nocapture readnone) nounwind willreturn declare void @use_i8_ptr_ret(i8* nofree nocapture readnone) nounwind willreturn
define i8* @nonnull_function_ptr_1() { define i8* @nonnull_function_ptr_1() {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@nonnull_function_ptr_1 ; CHECK-LABEL: define {{[^@]+}}@nonnull_function_ptr_1
; IS__TUNIT____-SAME: () #[[ATTR1]] { ; CHECK-SAME: () #[[ATTR1]] {
; IS__TUNIT____-NEXT: ret i8* bitcast (i8* ()* @nonnull_function_ptr_1 to i8*) ; CHECK-NEXT: ret i8* bitcast (i8* ()* @nonnull_function_ptr_1 to i8*)
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@nonnull_function_ptr_1
; IS__CGSCC____-SAME: () #[[ATTR1]] {
; IS__CGSCC____-NEXT: ret i8* bitcast (i8* ()* @nonnull_function_ptr_1 to i8*)
; ;
%bc = bitcast i8*()* @nonnull_function_ptr_1 to i8* %bc = bitcast i8*()* @nonnull_function_ptr_1 to i8*
ret i8* %bc ret i8* %bc
} }
declare i8* @function_decl() declare i8* @function_decl()
define i8* @nonnull_function_ptr_2() { define i8* @nonnull_function_ptr_2() {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@nonnull_function_ptr_2 ; CHECK-LABEL: define {{[^@]+}}@nonnull_function_ptr_2
; IS__TUNIT____-SAME: () #[[ATTR1]] { ; CHECK-SAME: () #[[ATTR1]] {
; IS__TUNIT____-NEXT: ret i8* bitcast (i8* ()* @function_decl to i8*) ; CHECK-NEXT: ret i8* bitcast (i8* ()* @function_decl to i8*)
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@nonnull_function_ptr_2
; IS__CGSCC____-SAME: () #[[ATTR1]] {
; IS__CGSCC____-NEXT: ret i8* bitcast (i8* ()* @function_decl to i8*)
; ;
%bc = bitcast i8*()* @function_decl to i8* %bc = bitcast i8*()* @function_decl to i8*
ret i8* %bc ret i8* %bc
} }
; FIXME: nonnull should not be propagated to the caller's p unless there is noundef ; FIXME: nonnull should not be propagated to the caller's p unless there is noundef
define void @nonnull_caller(i8* %p) { define void @nonnull_caller(i8* %p) {
; CHECK-LABEL: define {{[^@]+}}@nonnull_caller ; CHECK-LABEL: define {{[^@]+}}@nonnull_caller
; CHECK-SAME: (i8* nonnull [[P:%.*]]) { ; CHECK-SAME: (i8* nonnull [[P:%.*]]) {
; CHECK-NEXT: call void @nonnull_callee(i8* nonnull [[P]]) ; CHECK-NEXT: call void @nonnull_callee(i8* nonnull [[P]])
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
call void @nonnull_callee(i8* %p) call void @nonnull_callee(i8* %p)
ret void ret void
} }
declare void @nonnull_callee(i8* nonnull %p) declare void @nonnull_callee(i8* nonnull %p)
attributes #0 = { null_pointer_is_valid } attributes #0 = { null_pointer_is_valid }
attributes #1 = { nounwind willreturn} attributes #1 = { nounwind willreturn}
;. ;.
; IS__TUNIT____: attributes #[[ATTR0]] = { inaccessiblememonly nofree nosync nounwind willreturn } ; CHECK: attributes #[[ATTR0]] = { inaccessiblememonly nofree nosync nounwind willreturn }
; IS__TUNIT____: attributes #[[ATTR1]] = { nofree nosync nounwind readnone willreturn } ; CHECK: attributes #[[ATTR1]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__TUNIT____: attributes #[[ATTR2]] = { noreturn } ; CHECK: attributes #[[ATTR2]] = { noreturn }
; IS__TUNIT____: attributes #[[ATTR3]] = { nounwind } ; CHECK: attributes #[[ATTR3]] = { nounwind }
; IS__TUNIT____: attributes #[[ATTR4]] = { argmemonly nofree nosync nounwind readonly } ; CHECK: attributes #[[ATTR4]] = { argmemonly nofree nosync nounwind readonly }
; IS__TUNIT____: attributes #[[ATTR5]] = { nounwind willreturn } ; CHECK: attributes #[[ATTR5]] = { nounwind willreturn }
; IS__TUNIT____: attributes #[[ATTR6:[0-9]+]] = { nounwind readonly willreturn } ; CHECK: attributes #[[ATTR6:[0-9]+]] = { nounwind readonly willreturn }
; IS__TUNIT____: attributes #[[ATTR7]] = { nofree nosync nounwind null_pointer_is_valid readnone willreturn } ; CHECK: attributes #[[ATTR7]] = { nofree norecurse nosync nounwind null_pointer_is_valid readnone willreturn }
; IS__TUNIT____: attributes #[[ATTR8]] = { naked } ; CHECK: attributes #[[ATTR8]] = { naked }
; IS__TUNIT____: attributes #[[ATTR9]] = { noinline optnone } ; CHECK: attributes #[[ATTR9]] = { noinline optnone }
; IS__TUNIT____: attributes #[[ATTR10]] = { nofree nounwind readonly willreturn } ; CHECK: attributes #[[ATTR10]] = { nofree nounwind readonly willreturn }
; IS__TUNIT____: attributes #[[ATTR11]] = { willreturn } ; CHECK: attributes #[[ATTR11]] = { willreturn }
; IS__TUNIT____: attributes #[[ATTR12]] = { nofree nosync nounwind readonly } ; CHECK: attributes #[[ATTR12]] = { nofree nosync nounwind readonly }
; IS__TUNIT____: attributes #[[ATTR13]] = { readonly willreturn } ; CHECK: attributes #[[ATTR13]] = { readonly willreturn }
;.
; IS__CGSCC_OPM: attributes #[[ATTR0]] = { inaccessiblememonly nofree nosync nounwind willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR1]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR2]] = { nofree nosync nounwind readnone willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR3]] = { noreturn }
; IS__CGSCC_OPM: attributes #[[ATTR4]] = { nounwind }
; IS__CGSCC_OPM: attributes #[[ATTR5]] = { argmemonly nofree nosync nounwind readonly }
; IS__CGSCC_OPM: attributes #[[ATTR6]] = { nounwind willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR7:[0-9]+]] = { nounwind readonly willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR8]] = { nofree norecurse nosync nounwind null_pointer_is_valid readnone willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR9]] = { naked }
; IS__CGSCC_OPM: attributes #[[ATTR10]] = { noinline optnone }
; IS__CGSCC_OPM: attributes #[[ATTR11]] = { nofree nounwind readonly willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR12]] = { willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR13]] = { nofree nosync nounwind readonly }
; IS__CGSCC_OPM: attributes #[[ATTR14]] = { readonly willreturn }
;.
; IS__CGSCC_NPM: attributes #[[ATTR0]] = { inaccessiblememonly nofree nosync nounwind willreturn }
; IS__CGSCC_NPM: attributes #[[ATTR1]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__CGSCC_NPM: attributes #[[ATTR2]] = { noreturn }
; IS__CGSCC_NPM: attributes #[[ATTR3]] = { nounwind }
; IS__CGSCC_NPM: attributes #[[ATTR4]] = { argmemonly nofree nosync nounwind readonly }
; IS__CGSCC_NPM: attributes #[[ATTR5]] = { nounwind willreturn }
; IS__CGSCC_NPM: attributes #[[ATTR6:[0-9]+]] = { nounwind readonly willreturn }
; IS__CGSCC_NPM: attributes #[[ATTR7]] = { nofree norecurse nosync nounwind null_pointer_is_valid readnone willreturn }
; IS__CGSCC_NPM: attributes #[[ATTR8]] = { naked }
; IS__CGSCC_NPM: attributes #[[ATTR9]] = { noinline optnone }
; IS__CGSCC_NPM: attributes #[[ATTR10]] = { nofree nounwind readonly willreturn }
; IS__CGSCC_NPM: attributes #[[ATTR11]] = { willreturn }
; IS__CGSCC_NPM: attributes #[[ATTR12]] = { nofree nosync nounwind readonly }
; IS__CGSCC_NPM: attributes #[[ATTR13]] = { readonly willreturn }
;. ;.

llvm/test/Transforms/Attributor/norecurse.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals
; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=3 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM ; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=3 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=3 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=3 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM
; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM ; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM
define i32 @leaf() { define i32 @leaf() {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@leaf ; CHECK-LABEL: define {{[^@]+}}@leaf
; IS__TUNIT____-SAME: () #[[ATTR0:[0-9]+]] { ; CHECK-SAME: () #[[ATTR0:[0-9]+]] {
; IS__TUNIT____-NEXT: ret i32 1 ; CHECK-NEXT: ret i32 1
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@leaf
; IS__CGSCC____-SAME: () #[[ATTR0:[0-9]+]] {
; IS__CGSCC____-NEXT: ret i32 1
; ;
ret i32 1 ret i32 1
} }
define i32 @self_rec() { define i32 @self_rec() {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@self_rec ; CHECK-LABEL: define {{[^@]+}}@self_rec
; IS__TUNIT____-SAME: () #[[ATTR0]] { ; CHECK-SAME: () #[[ATTR0]] {
; IS__TUNIT____-NEXT: ret i32 4 ; CHECK-NEXT: ret i32 4
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@self_rec
; IS__CGSCC____-SAME: () #[[ATTR0]] {
; IS__CGSCC____-NEXT: ret i32 4
; ;
%a = call i32 @self_rec() %a = call i32 @self_rec()
ret i32 4 ret i32 4
} }
define i32 @indirect_rec() { define i32 @indirect_rec() {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@indirect_rec ; CHECK-LABEL: define {{[^@]+}}@indirect_rec
; IS__TUNIT____-SAME: () #[[ATTR0]] { ; CHECK-SAME: () #[[ATTR0]] {
; IS__TUNIT____-NEXT: ret i32 undef ; CHECK-NEXT: ret i32 undef
;
; IS__CGSCC_OPM: Function Attrs: nofree nosync nounwind readnone willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@indirect_rec
; IS__CGSCC_OPM-SAME: () #[[ATTR1:[0-9]+]] {
; IS__CGSCC_OPM-NEXT: ret i32 undef
;
; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@indirect_rec
; IS__CGSCC_NPM-SAME: () #[[ATTR0]] {
; IS__CGSCC_NPM-NEXT: ret i32 undef
; ;
%a = call i32 @indirect_rec2() %a = call i32 @indirect_rec2()
ret i32 %a ret i32 %a
} }
define i32 @indirect_rec2() { define i32 @indirect_rec2() {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@indirect_rec2 ; CHECK-LABEL: define {{[^@]+}}@indirect_rec2
; IS__TUNIT____-SAME: () #[[ATTR0]] { ; CHECK-SAME: () #[[ATTR0]] {
; IS__TUNIT____-NEXT: ret i32 undef ; CHECK-NEXT: ret i32 undef
;
; IS__CGSCC_OPM: Function Attrs: nofree nosync nounwind readnone willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@indirect_rec2
; IS__CGSCC_OPM-SAME: () #[[ATTR1]] {
; IS__CGSCC_OPM-NEXT: ret i32 undef
;
; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@indirect_rec2
; IS__CGSCC_NPM-SAME: () #[[ATTR0]] {
; IS__CGSCC_NPM-NEXT: ret i32 undef
; ;
%a = call i32 @indirect_rec() %a = call i32 @indirect_rec()
ret i32 %a ret i32 %a
} }
define i32 @extern() { define i32 @extern() {
; NOT_CGSCC_OPM: Function Attrs: nosync readnone ; CHECK: Function Attrs: nosync readnone
; NOT_CGSCC_OPM-LABEL: define {{[^@]+}}@extern ; CHECK-LABEL: define {{[^@]+}}@extern
; NOT_CGSCC_OPM-SAME: () #[[ATTR1:[0-9]+]] { ; CHECK-SAME: () #[[ATTR1:[0-9]+]] {
; NOT_CGSCC_OPM-NEXT: [[A:%.*]] = call i32 @k() ; CHECK-NEXT: [[A:%.*]] = call i32 @k()
; NOT_CGSCC_OPM-NEXT: ret i32 [[A]] ; CHECK-NEXT: ret i32 [[A]]
;
; IS__CGSCC_OPM: Function Attrs: nosync readnone
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@extern
; IS__CGSCC_OPM-SAME: () #[[ATTR2:[0-9]+]] {
; IS__CGSCC_OPM-NEXT: [[A:%.*]] = call i32 @k()
; IS__CGSCC_OPM-NEXT: ret i32 [[A]]
; ;
%a = call i32 @k() %a = call i32 @k()
ret i32 %a ret i32 %a
} }
; CHECK: Function Attrs ; CHECK: Function Attrs
; CHECK-NEXT: declare i32 @k() ; CHECK-NEXT: declare i32 @k()
declare i32 @k() readnone declare i32 @k() readnone
define void @intrinsic(i8* %dest, i8* %src, i32 %len) { define void @intrinsic(i8* %dest, i8* %src, i32 %len) {
; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind willreturn ; CHECK: Function Attrs: argmemonly nofree nosync nounwind willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@intrinsic ; CHECK-LABEL: define {{[^@]+}}@intrinsic
; IS__TUNIT____-SAME: (i8* nocapture nofree writeonly [[DEST:%.*]], i8* nocapture nofree readonly [[SRC:%.*]], i32 [[LEN:%.*]]) #[[ATTR3:[0-9]+]] { ; CHECK-SAME: (i8* nocapture nofree writeonly [[DEST:%.*]], i8* nocapture nofree readonly [[SRC:%.*]], i32 [[LEN:%.*]]) #[[ATTR3:[0-9]+]] {
; IS__TUNIT____-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* noalias nocapture nofree writeonly [[DEST]], i8* noalias nocapture nofree readonly [[SRC]], i32 [[LEN]], i1 noundef false) #[[ATTR8:[0-9]+]] ; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* noalias nocapture nofree writeonly [[DEST]], i8* noalias nocapture nofree readonly [[SRC]], i32 [[LEN]], i1 noundef false) #[[ATTR7:[0-9]+]]
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC_OPM: Function Attrs: argmemonly nofree nosync nounwind willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@intrinsic
; IS__CGSCC_OPM-SAME: (i8* nocapture nofree writeonly [[DEST:%.*]], i8* nocapture nofree readonly [[SRC:%.*]], i32 [[LEN:%.*]]) #[[ATTR4:[0-9]+]] {
; IS__CGSCC_OPM-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* noalias nocapture nofree writeonly [[DEST]], i8* noalias nocapture nofree readonly [[SRC]], i32 [[LEN]], i1 noundef false) #[[ATTR8:[0-9]+]]
; IS__CGSCC_OPM-NEXT: ret void
;
; IS__CGSCC_NPM: Function Attrs: argmemonly nofree nosync nounwind willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@intrinsic
; IS__CGSCC_NPM-SAME: (i8* nocapture nofree writeonly [[DEST:%.*]], i8* nocapture nofree readonly [[SRC:%.*]], i32 [[LEN:%.*]]) #[[ATTR3:[0-9]+]] {
; IS__CGSCC_NPM-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* noalias nocapture nofree writeonly [[DEST]], i8* noalias nocapture nofree readonly [[SRC]], i32 [[LEN]], i1 noundef false) #[[ATTR7:[0-9]+]]
; IS__CGSCC_NPM-NEXT: ret void
; ;
call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dest, i8* %src, i32 %len, i1 false) call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dest, i8* %src, i32 %len, i1 false)
ret void ret void
} }
; CHECK: Function Attrs ; CHECK: Function Attrs
; CHECK-NEXT: declare void @llvm.memcpy.p0i8.p0i8.i32 ; CHECK-NEXT: declare void @llvm.memcpy.p0i8.p0i8.i32
declare void @llvm.memcpy.p0i8.p0i8.i32(i8*, i8*, i32, i1) declare void @llvm.memcpy.p0i8.p0i8.i32(i8*, i8*, i32, i1)
define internal i32 @called_by_norecurse() { define internal i32 @called_by_norecurse() {
; IS__TUNIT____: Function Attrs: nosync readnone ; CHECK: Function Attrs: norecurse nosync readnone
; IS__TUNIT____-LABEL: define {{[^@]+}}@called_by_norecurse ; CHECK-LABEL: define {{[^@]+}}@called_by_norecurse
; IS__TUNIT____-SAME: () #[[ATTR1]] { ; CHECK-SAME: () #[[ATTR5:[0-9]+]] {
; IS__TUNIT____-NEXT: [[A:%.*]] = call i32 @k() ; CHECK-NEXT: [[A:%.*]] = call i32 @k()
; IS__TUNIT____-NEXT: ret i32 undef ; CHECK-NEXT: ret i32 undef
;
; IS__CGSCC_OPM: Function Attrs: norecurse nosync readnone
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@called_by_norecurse
; IS__CGSCC_OPM-SAME: () #[[ATTR6:[0-9]+]] {
; IS__CGSCC_OPM-NEXT: [[A:%.*]] = call i32 @k()
; IS__CGSCC_OPM-NEXT: ret i32 undef
;
; IS__CGSCC_NPM: Function Attrs: norecurse nosync readnone
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@called_by_norecurse
; IS__CGSCC_NPM-SAME: () #[[ATTR5:[0-9]+]] {
; IS__CGSCC_NPM-NEXT: [[A:%.*]] = call i32 @k()
; IS__CGSCC_NPM-NEXT: ret i32 undef
; ;
%a = call i32 @k() %a = call i32 @k()
ret i32 %a ret i32 %a
} }
define void @m() norecurse { define void @m() norecurse {
; IS__TUNIT____: Function Attrs: norecurse nosync readnone ; IS__TUNIT____: Function Attrs: norecurse nosync readnone
; IS__TUNIT____-LABEL: define {{[^@]+}}@m ; IS__TUNIT____-LABEL: define {{[^@]+}}@m
; IS__TUNIT____-SAME: () #[[ATTR5:[0-9]+]] { ; IS__TUNIT____-SAME: () #[[ATTR5]] {
; IS__TUNIT____-NEXT: [[A:%.*]] = call i32 @called_by_norecurse() #[[ATTR1]] ; IS__TUNIT____-NEXT: [[A:%.*]] = call i32 @called_by_norecurse() #[[ATTR1]]
; IS__TUNIT____-NEXT: ret void ; IS__TUNIT____-NEXT: ret void
; ;
; IS__CGSCC_OPM: Function Attrs: norecurse nosync readnone ; IS__CGSCC____: Function Attrs: norecurse nosync readnone
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@m ; IS__CGSCC____-LABEL: define {{[^@]+}}@m
; IS__CGSCC_OPM-SAME: () #[[ATTR6]] { ; IS__CGSCC____-SAME: () #[[ATTR5]] {
; IS__CGSCC_OPM-NEXT: [[A:%.*]] = call i32 @called_by_norecurse() ; IS__CGSCC____-NEXT: [[A:%.*]] = call i32 @called_by_norecurse()
; IS__CGSCC_OPM-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
;
; IS__CGSCC_NPM: Function Attrs: norecurse nosync readnone
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@m
; IS__CGSCC_NPM-SAME: () #[[ATTR5]] {
; IS__CGSCC_NPM-NEXT: [[A:%.*]] = call i32 @called_by_norecurse()
; IS__CGSCC_NPM-NEXT: ret void
; ;
%a = call i32 @called_by_norecurse() %a = call i32 @called_by_norecurse()
ret void ret void
} }
define internal i32 @called_by_norecurse_indirectly() { define internal i32 @called_by_norecurse_indirectly() {
; NOT_CGSCC_OPM: Function Attrs: nosync readnone ; CHECK: Function Attrs: norecurse nosync readnone
; NOT_CGSCC_OPM-LABEL: define {{[^@]+}}@called_by_norecurse_indirectly ; CHECK-LABEL: define {{[^@]+}}@called_by_norecurse_indirectly
; NOT_CGSCC_OPM-SAME: () #[[ATTR1]] { ; CHECK-SAME: () #[[ATTR5]] {
; NOT_CGSCC_OPM-NEXT: [[A:%.*]] = call i32 @k() ; CHECK-NEXT: [[A:%.*]] = call i32 @k()
; NOT_CGSCC_OPM-NEXT: ret i32 [[A]] ; CHECK-NEXT: ret i32 [[A]]
;
; IS__CGSCC_OPM: Function Attrs: nosync readnone
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@called_by_norecurse_indirectly
; IS__CGSCC_OPM-SAME: () #[[ATTR2]] {
; IS__CGSCC_OPM-NEXT: [[A:%.*]] = call i32 @k()
; IS__CGSCC_OPM-NEXT: ret i32 [[A]]
; ;
%a = call i32 @k() %a = call i32 @k()
ret i32 %a ret i32 %a
} }
define internal i32 @o() { define internal i32 @o() {
; IS__TUNIT____: Function Attrs: nosync readnone ; IS__TUNIT____: Function Attrs: norecurse nosync readnone
; IS__TUNIT____-LABEL: define {{[^@]+}}@o ; IS__TUNIT____-LABEL: define {{[^@]+}}@o
; IS__TUNIT____-SAME: () #[[ATTR1]] { ; IS__TUNIT____-SAME: () #[[ATTR5]] {
; IS__TUNIT____-NEXT: [[A:%.*]] = call i32 @called_by_norecurse_indirectly() #[[ATTR1]] ; IS__TUNIT____-NEXT: [[A:%.*]] = call i32 @called_by_norecurse_indirectly() #[[ATTR1]]
; IS__TUNIT____-NEXT: ret i32 [[A]] ; IS__TUNIT____-NEXT: ret i32 [[A]]
; ;
; IS__CGSCC_OPM: Function Attrs: norecurse nosync readnone ; IS__CGSCC____: Function Attrs: norecurse nosync readnone
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@o ; IS__CGSCC____-LABEL: define {{[^@]+}}@o
; IS__CGSCC_OPM-SAME: () #[[ATTR6]] { ; IS__CGSCC____-SAME: () #[[ATTR5]] {
; IS__CGSCC_OPM-NEXT: [[A:%.*]] = call i32 @called_by_norecurse_indirectly() ; IS__CGSCC____-NEXT: [[A:%.*]] = call i32 @called_by_norecurse_indirectly()
; IS__CGSCC_OPM-NEXT: ret i32 [[A]] ; IS__CGSCC____-NEXT: ret i32 [[A]]
;
; IS__CGSCC_NPM: Function Attrs: norecurse nosync readnone
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@o
; IS__CGSCC_NPM-SAME: () #[[ATTR5]] {
; IS__CGSCC_NPM-NEXT: [[A:%.*]] = call i32 @called_by_norecurse_indirectly()
; IS__CGSCC_NPM-NEXT: ret i32 [[A]]
; ;
%a = call i32 @called_by_norecurse_indirectly() %a = call i32 @called_by_norecurse_indirectly()
ret i32 %a ret i32 %a
} }
define i32 @p() norecurse { define i32 @p() norecurse {
; IS__TUNIT____: Function Attrs: norecurse nosync readnone ; IS__TUNIT____: Function Attrs: norecurse nosync readnone
; IS__TUNIT____-LABEL: define {{[^@]+}}@p ; IS__TUNIT____-LABEL: define {{[^@]+}}@p
; IS__TUNIT____-SAME: () #[[ATTR5]] { ; IS__TUNIT____-SAME: () #[[ATTR5]] {
; IS__TUNIT____-NEXT: [[A:%.*]] = call i32 @o() #[[ATTR1]] ; IS__TUNIT____-NEXT: [[A:%.*]] = call i32 @o() #[[ATTR1]]
; IS__TUNIT____-NEXT: ret i32 [[A]] ; IS__TUNIT____-NEXT: ret i32 [[A]]
; ;
; IS__CGSCC_OPM: Function Attrs: norecurse nosync readnone ; IS__CGSCC____: Function Attrs: norecurse nosync readnone
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@p ; IS__CGSCC____-LABEL: define {{[^@]+}}@p
; IS__CGSCC_OPM-SAME: () #[[ATTR6]] { ; IS__CGSCC____-SAME: () #[[ATTR5]] {
; IS__CGSCC_OPM-NEXT: [[A:%.*]] = call i32 @o() ; IS__CGSCC____-NEXT: [[A:%.*]] = call i32 @o()
; IS__CGSCC_OPM-NEXT: ret i32 [[A]] ; IS__CGSCC____-NEXT: ret i32 [[A]]
;
; IS__CGSCC_NPM: Function Attrs: norecurse nosync readnone
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@p
; IS__CGSCC_NPM-SAME: () #[[ATTR5]] {
; IS__CGSCC_NPM-NEXT: [[A:%.*]] = call i32 @o()
; IS__CGSCC_NPM-NEXT: ret i32 [[A]]
; ;
%a = call i32 @o() %a = call i32 @o()
ret i32 %a ret i32 %a
} }
define void @f(i32 %x) { define void @f(i32 %x) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; NOT_CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@f ; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@f
; IS__TUNIT____-SAME: (i32 [[X:%.*]]) #[[ATTR0]] { ; NOT_CGSCC_NPM-SAME: (i32 [[X:%.*]]) #[[ATTR0]] {
; IS__TUNIT____-NEXT: entry: ; NOT_CGSCC_NPM-NEXT: entry:
; IS__TUNIT____-NEXT: [[X_ADDR:%.*]] = alloca i32, align 4 ; NOT_CGSCC_NPM-NEXT: [[X_ADDR:%.*]] = alloca i32, align 4
; IS__TUNIT____-NEXT: store i32 [[X]], i32* [[X_ADDR]], align 4 ; NOT_CGSCC_NPM-NEXT: store i32 [[X]], i32* [[X_ADDR]], align 4
; IS__TUNIT____-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[X]], 0 ; NOT_CGSCC_NPM-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[X]], 0
; IS__TUNIT____-NEXT: br i1 [[TOBOOL]], label [[IF_THEN:%.*]], label [[IF_END:%.*]] ; NOT_CGSCC_NPM-NEXT: br i1 [[TOBOOL]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
; IS__TUNIT____: if.then: ; NOT_CGSCC_NPM: if.then:
; IS__TUNIT____-NEXT: br label [[IF_END]] ; NOT_CGSCC_NPM-NEXT: br label [[IF_END]]
; IS__TUNIT____: if.end: ; NOT_CGSCC_NPM: if.end:
; IS__TUNIT____-NEXT: ret void ; NOT_CGSCC_NPM-NEXT: ret void
;
; IS__CGSCC_OPM: Function Attrs: nofree nosync nounwind readnone willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@f
; IS__CGSCC_OPM-SAME: (i32 [[X:%.*]]) #[[ATTR1]] {
; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: [[X_ADDR:%.*]] = alloca i32, align 4
; IS__CGSCC_OPM-NEXT: store i32 [[X]], i32* [[X_ADDR]], align 4
; IS__CGSCC_OPM-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[X]], 0
; IS__CGSCC_OPM-NEXT: br i1 [[TOBOOL]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
; IS__CGSCC_OPM: if.then:
; IS__CGSCC_OPM-NEXT: br label [[IF_END]]
; IS__CGSCC_OPM: if.end:
; IS__CGSCC_OPM-NEXT: ret void
; ;
; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@f ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@f
; IS__CGSCC_NPM-SAME: (i32 [[X:%.*]]) #[[ATTR0]] { ; IS__CGSCC_NPM-SAME: (i32 [[X:%.*]]) #[[ATTR0]] {
; IS__CGSCC_NPM-NEXT: entry: ; IS__CGSCC_NPM-NEXT: entry:
; IS__CGSCC_NPM-NEXT: [[X_ADDR:%.*]] = alloca i32, align 4 ; IS__CGSCC_NPM-NEXT: [[X_ADDR:%.*]] = alloca i32, align 4
; IS__CGSCC_NPM-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[X]], 0 ; IS__CGSCC_NPM-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[X]], 0
; IS__CGSCC_NPM-NEXT: br i1 [[TOBOOL]], label [[IF_THEN:%.*]], label [[IF_END:%.*]] ; IS__CGSCC_NPM-NEXT: br i1 [[TOBOOL]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
Show All 13 Linesif.then:
call void @g() norecurse call void @g() norecurse
br label %if.end br label %if.end
if.end: if.end:
ret void ret void
} }
define void @g() norecurse { define void @g() norecurse {
; IS__TUNIT____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@g ; CHECK-LABEL: define {{[^@]+}}@g
; IS__TUNIT____-SAME: () #[[ATTR6:[0-9]+]] { ; CHECK-SAME: () #[[ATTR0]] {
; IS__TUNIT____-NEXT: entry: ; CHECK-NEXT: entry:
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@g
; IS__CGSCC____-SAME: () #[[ATTR0]] {
; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: ret void
; ;
entry: entry:
call void @f(i32 0) call void @f(i32 0)
ret void ret void
} }
define linkonce_odr i32 @leaf_redefinable() { define linkonce_odr i32 @leaf_redefinable() {
; CHECK-LABEL: define {{[^@]+}}@leaf_redefinable() { ; CHECK-LABEL: define {{[^@]+}}@leaf_redefinable() {
Show All 9 Lines
; CHECK-NEXT: [[TMP3:%.*]] = tail call i32 [[TMP0]](i32 [[TMP1]]) ; CHECK-NEXT: [[TMP3:%.*]] = tail call i32 [[TMP0]](i32 [[TMP1]])
; CHECK-NEXT: ret i32 [[TMP3]] ; CHECK-NEXT: ret i32 [[TMP3]]
; ;
%3 = tail call i32 %0(i32 %1) #2 %3 = tail call i32 %0(i32 %1) #2
ret i32 %3 ret i32 %3
} }
define i32 @eval_func2(i32 (i32)* , i32) local_unnamed_addr null_pointer_is_valid{ define i32 @eval_func2(i32 (i32)* , i32) local_unnamed_addr null_pointer_is_valid{
; NOT_CGSCC_NPM: Function Attrs: null_pointer_is_valid ; CHECK: Function Attrs: null_pointer_is_valid
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@eval_func2 ; CHECK-LABEL: define {{[^@]+}}@eval_func2
; NOT_CGSCC_NPM-SAME: (i32 (i32)* nocapture nofree noundef [[TMP0:%.*]], i32 [[TMP1:%.*]]) local_unnamed_addr #[[ATTR7:[0-9]+]] { ; CHECK-SAME: (i32 (i32)* nocapture nofree noundef [[TMP0:%.*]], i32 [[TMP1:%.*]]) local_unnamed_addr #[[ATTR6:[0-9]+]] {
; NOT_CGSCC_NPM-NEXT: [[TMP3:%.*]] = tail call i32 [[TMP0]](i32 [[TMP1]]) ; CHECK-NEXT: [[TMP3:%.*]] = tail call i32 [[TMP0]](i32 [[TMP1]])
; NOT_CGSCC_NPM-NEXT: ret i32 [[TMP3]] ; CHECK-NEXT: ret i32 [[TMP3]]
;
; IS__CGSCC_NPM: Function Attrs: null_pointer_is_valid
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@eval_func2
; IS__CGSCC_NPM-SAME: (i32 (i32)* nocapture nofree noundef [[TMP0:%.*]], i32 [[TMP1:%.*]]) local_unnamed_addr #[[ATTR6:[0-9]+]] {
; IS__CGSCC_NPM-NEXT: [[TMP3:%.*]] = tail call i32 [[TMP0]](i32 [[TMP1]])
; IS__CGSCC_NPM-NEXT: ret i32 [[TMP3]]
; ;
%3 = tail call i32 %0(i32 %1) #2 %3 = tail call i32 %0(i32 %1) #2
ret i32 %3 ret i32 %3
} }
; Call an unknown function in a dead block. ; Call an unknown function in a dead block.
declare void @unknown() declare void @unknown()
define i32 @call_unknown_in_dead_block() local_unnamed_addr { define i32 @call_unknown_in_dead_block() local_unnamed_addr {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@call_unknown_in_dead_block ; CHECK-LABEL: define {{[^@]+}}@call_unknown_in_dead_block
; IS__TUNIT____-SAME: () local_unnamed_addr #[[ATTR0]] { ; CHECK-SAME: () local_unnamed_addr #[[ATTR0]] {
; IS__TUNIT____-NEXT: ret i32 0 ; CHECK-NEXT: ret i32 0
; IS__TUNIT____: Dead: ; CHECK: Dead:
; IS__TUNIT____-NEXT: unreachable ; CHECK-NEXT: unreachable
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@call_unknown_in_dead_block
; IS__CGSCC____-SAME: () local_unnamed_addr #[[ATTR0]] {
; IS__CGSCC____-NEXT: ret i32 0
; IS__CGSCC____: Dead:
; IS__CGSCC____-NEXT: unreachable
; ;
ret i32 0 ret i32 0
Dead: Dead:
tail call void @unknown() tail call void @unknown()
ret i32 1 ret i32 1
} }
;. ;.
; IS__TUNIT____: attributes #[[ATTR0]] = { nofree nosync nounwind readnone willreturn } ; CHECK: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__TUNIT____: attributes #[[ATTR1]] = { nosync readnone } ; CHECK: attributes #[[ATTR1]] = { nosync readnone }
; IS__TUNIT____: attributes #[[ATTR2:[0-9]+]] = { readnone } ; CHECK: attributes #[[ATTR2:[0-9]+]] = { readnone }
; IS__TUNIT____: attributes #[[ATTR3]] = { argmemonly nofree nosync nounwind willreturn } ; CHECK: attributes #[[ATTR3]] = { argmemonly nofree nosync nounwind willreturn }
; IS__TUNIT____: attributes #[[ATTR4:[0-9]+]] = { argmemonly nofree nounwind willreturn } ; CHECK: attributes #[[ATTR4:[0-9]+]] = { argmemonly nofree nounwind willreturn }
; IS__TUNIT____: attributes #[[ATTR5]] = { norecurse nosync readnone } ; CHECK: attributes #[[ATTR5]] = { norecurse nosync readnone }
; IS__TUNIT____: attributes #[[ATTR6]] = { nofree norecurse nosync nounwind readnone willreturn } ; CHECK: attributes #[[ATTR6]] = { null_pointer_is_valid }
; IS__TUNIT____: attributes #[[ATTR7]] = { null_pointer_is_valid } ; CHECK: attributes #[[ATTR7]] = { willreturn }
; IS__TUNIT____: attributes #[[ATTR8]] = { willreturn }
;.
; IS__CGSCC_OPM: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR1]] = { nofree nosync nounwind readnone willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR2]] = { nosync readnone }
; IS__CGSCC_OPM: attributes #[[ATTR3:[0-9]+]] = { readnone }
; IS__CGSCC_OPM: attributes #[[ATTR4]] = { argmemonly nofree nosync nounwind willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR5:[0-9]+]] = { argmemonly nofree nounwind willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR6]] = { norecurse nosync readnone }
; IS__CGSCC_OPM: attributes #[[ATTR7]] = { null_pointer_is_valid }
; IS__CGSCC_OPM: attributes #[[ATTR8]] = { willreturn }
;.
; IS__CGSCC_NPM: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__CGSCC_NPM: attributes #[[ATTR1]] = { nosync readnone }
; IS__CGSCC_NPM: attributes #[[ATTR2:[0-9]+]] = { readnone }
; IS__CGSCC_NPM: attributes #[[ATTR3]] = { argmemonly nofree nosync nounwind willreturn }
; IS__CGSCC_NPM: attributes #[[ATTR4:[0-9]+]] = { argmemonly nofree nounwind willreturn }
; IS__CGSCC_NPM: attributes #[[ATTR5]] = { norecurse nosync readnone }
; IS__CGSCC_NPM: attributes #[[ATTR6]] = { null_pointer_is_valid }
; IS__CGSCC_NPM: attributes #[[ATTR7]] = { willreturn }
;. ;.

llvm/test/Transforms/Attributor/noreturn.ll

Show All 11 Lines
; TEST 1, singleton SCC void return type ; TEST 1, singleton SCC void return type
; ;
; void srec0() { ; void srec0() {
; return srec0(); ; return srec0();
; } ; }
; ;
define void @srec0() #0 { define void @srec0() #0 {
; IS__TUNIT____: Function Attrs: nofree noinline nosync nounwind readnone uwtable willreturn ; CHECK: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@srec0 ; CHECK-LABEL: define {{[^@]+}}@srec0
; IS__TUNIT____-SAME: () #[[ATTR0:[0-9]+]] { ; CHECK-SAME: () #[[ATTR0:[0-9]+]] {
; IS__TUNIT____-NEXT: entry: ; CHECK-NEXT: entry:
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@srec0
; IS__CGSCC____-SAME: () #[[ATTR0:[0-9]+]] {
; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: ret void
; ;
entry: entry:
call void @srec0() call void @srec0()
ret void ret void
} }
; TEST 2: singleton SCC int return type with a lot of recursive calls ; TEST 2: singleton SCC int return type with a lot of recursive calls
; ;
; int srec16(int a) { ; int srec16(int a) {
; return srec16(srec16(srec16(srec16(srec16(srec16(srec16(srec16(srec16(srec16(srec16(srec16(srec16(srec16(srec16(srec16(a)))))))))))))))); ; return srec16(srec16(srec16(srec16(srec16(srec16(srec16(srec16(srec16(srec16(srec16(srec16(srec16(srec16(srec16(srec16(a))))))))))))))));
; } ; }
; ;
define i32 @srec16(i32 %a) #0 { define i32 @srec16(i32 %a) #0 {
; IS__TUNIT____: Function Attrs: nofree noinline noreturn nosync nounwind readnone uwtable willreturn ; CHECK: Function Attrs: nofree noinline norecurse noreturn nosync nounwind readnone uwtable willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@srec16 ; CHECK-LABEL: define {{[^@]+}}@srec16
; IS__TUNIT____-SAME: (i32 [[A:%.*]]) #[[ATTR1:[0-9]+]] { ; CHECK-SAME: (i32 [[A:%.*]]) #[[ATTR1:[0-9]+]] {
; IS__TUNIT____-NEXT: entry: ; CHECK-NEXT: entry:
; IS__TUNIT____-NEXT: unreachable ; CHECK-NEXT: unreachable
; IS__TUNIT____: exit: ; CHECK: exit:
; IS__TUNIT____-NEXT: unreachable ; CHECK-NEXT: unreachable
;
; IS__CGSCC____: Function Attrs: nofree noinline norecurse noreturn nosync nounwind readnone uwtable willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@srec16
; IS__CGSCC____-SAME: (i32 [[A:%.*]]) #[[ATTR1:[0-9]+]] {
; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: unreachable
; IS__CGSCC____: exit:
; IS__CGSCC____-NEXT: unreachable
; ;
entry: entry:
%call = call i32 @srec16(i32 %a) %call = call i32 @srec16(i32 %a)
%call1 = call i32 @srec16(i32 %call) %call1 = call i32 @srec16(i32 %call)
%call2 = call i32 @srec16(i32 %call1) %call2 = call i32 @srec16(i32 %call1)
%call3 = call i32 @srec16(i32 %call2) %call3 = call i32 @srec16(i32 %call2)
%call4 = call i32 @srec16(i32 %call3) %call4 = call i32 @srec16(i32 %call3)
%call5 = call i32 @srec16(i32 %call4) %call5 = call i32 @srec16(i32 %call4)
Show All 16 Lines
; TEST 3: endless loop, no return instruction ; TEST 3: endless loop, no return instruction
; ;
; int endless_loop(int a) { ; int endless_loop(int a) {
; while (1); ; while (1);
; } ; }
; ;
define i32 @endless_loop(i32 %a) #0 { define i32 @endless_loop(i32 %a) #0 {
; IS__TUNIT____: Function Attrs: nofree noinline noreturn nosync nounwind readnone uwtable ; CHECK: Function Attrs: nofree noinline norecurse noreturn nosync nounwind readnone uwtable
; IS__TUNIT____-LABEL: define {{[^@]+}}@endless_loop ; CHECK-LABEL: define {{[^@]+}}@endless_loop
; IS__TUNIT____-SAME: (i32 [[A:%.*]]) #[[ATTR2:[0-9]+]] { ; CHECK-SAME: (i32 [[A:%.*]]) #[[ATTR2:[0-9]+]] {
; IS__TUNIT____-NEXT: entry: ; CHECK-NEXT: entry:
; IS__TUNIT____-NEXT: br label [[WHILE_BODY:%.*]] ; CHECK-NEXT: br label [[WHILE_BODY:%.*]]
; IS__TUNIT____: while.body: ; CHECK: while.body:
; IS__TUNIT____-NEXT: br label [[WHILE_BODY]] ; CHECK-NEXT: br label [[WHILE_BODY]]
;
; IS__CGSCC____: Function Attrs: nofree noinline norecurse noreturn nosync nounwind readnone uwtable
; IS__CGSCC____-LABEL: define {{[^@]+}}@endless_loop
; IS__CGSCC____-SAME: (i32 [[A:%.*]]) #[[ATTR2:[0-9]+]] {
; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: br label [[WHILE_BODY:%.*]]
; IS__CGSCC____: while.body:
; IS__CGSCC____-NEXT: br label [[WHILE_BODY]]
; ;
entry: entry:
br label %while.body br label %while.body
while.body: ; preds = %entry, %while.body while.body: ; preds = %entry, %while.body
br label %while.body br label %while.body
} }
; TEST 4: endless loop, dead return instruction ; TEST 4: endless loop, dead return instruction
; ;
; int endless_loop(int a) { ; int endless_loop(int a) {
; while (1); ; while (1);
; return a; ; return a;
; } ; }
; ;
; FIXME: no-return missing (D65243 should fix this) ; FIXME: no-return missing (D65243 should fix this)
define i32 @dead_return(i32 %a) #0 { define i32 @dead_return(i32 %a) #0 {
; IS__TUNIT____: Function Attrs: nofree noinline noreturn nosync nounwind readnone uwtable ; CHECK: Function Attrs: nofree noinline norecurse noreturn nosync nounwind readnone uwtable
; IS__TUNIT____-LABEL: define {{[^@]+}}@dead_return ; CHECK-LABEL: define {{[^@]+}}@dead_return
; IS__TUNIT____-SAME: (i32 [[A:%.*]]) #[[ATTR2]] { ; CHECK-SAME: (i32 [[A:%.*]]) #[[ATTR2]] {
; IS__TUNIT____-NEXT: entry: ; CHECK-NEXT: entry:
; IS__TUNIT____-NEXT: br label [[WHILE_BODY:%.*]] ; CHECK-NEXT: br label [[WHILE_BODY:%.*]]
; IS__TUNIT____: while.body: ; CHECK: while.body:
; IS__TUNIT____-NEXT: br label [[WHILE_BODY]] ; CHECK-NEXT: br label [[WHILE_BODY]]
; IS__TUNIT____: return: ; CHECK: return:
; IS__TUNIT____-NEXT: unreachable ; CHECK-NEXT: unreachable
;
; IS__CGSCC____: Function Attrs: nofree noinline norecurse noreturn nosync nounwind readnone uwtable
; IS__CGSCC____-LABEL: define {{[^@]+}}@dead_return
; IS__CGSCC____-SAME: (i32 [[A:%.*]]) #[[ATTR2]] {
; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: br label [[WHILE_BODY:%.*]]
; IS__CGSCC____: while.body:
; IS__CGSCC____-NEXT: br label [[WHILE_BODY]]
; IS__CGSCC____: return:
; IS__CGSCC____-NEXT: unreachable
; ;
entry: entry:
br label %while.body br label %while.body
while.body: ; preds = %entry, %while.body while.body: ; preds = %entry, %while.body
br label %while.body br label %while.body
return: ; No predecessors! return: ; No predecessors!
ret i32 %a ret i32 %a
} }
; TEST 5: all paths contain a no-return function call ; TEST 5: all paths contain a no-return function call
; ;
; int multiple_noreturn_calls(int a) { ; int multiple_noreturn_calls(int a) {
; return a == 0 ? endless_loop(a) : srec16(a); ; return a == 0 ? endless_loop(a) : srec16(a);
; } ; }
; ;
define i32 @multiple_noreturn_calls(i32 %a) #0 { define i32 @multiple_noreturn_calls(i32 %a) #0 {
; IS__TUNIT____: Function Attrs: nofree noinline noreturn nosync nounwind readnone uwtable willreturn ; CHECK: Function Attrs: nofree noinline norecurse noreturn nosync nounwind readnone uwtable willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@multiple_noreturn_calls ; CHECK-LABEL: define {{[^@]+}}@multiple_noreturn_calls
; IS__TUNIT____-SAME: (i32 [[A:%.*]]) #[[ATTR1]] { ; CHECK-SAME: (i32 [[A:%.*]]) #[[ATTR1]] {
; IS__TUNIT____-NEXT: entry: ; CHECK-NEXT: entry:
; IS__TUNIT____-NEXT: [[CMP:%.*]] = icmp eq i32 [[A]], 0 ; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[A]], 0
; IS__TUNIT____-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] ; CHECK-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
; IS__TUNIT____: cond.true: ; CHECK: cond.true:
; IS__TUNIT____-NEXT: unreachable ; CHECK-NEXT: unreachable
; IS__TUNIT____: cond.false: ; CHECK: cond.false:
; IS__TUNIT____-NEXT: unreachable ; CHECK-NEXT: unreachable
; IS__TUNIT____: cond.end: ; CHECK: cond.end:
; IS__TUNIT____-NEXT: unreachable ; CHECK-NEXT: unreachable
;
; IS__CGSCC____: Function Attrs: nofree noinline norecurse noreturn nosync nounwind readnone uwtable willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@multiple_noreturn_calls
; IS__CGSCC____-SAME: (i32 [[A:%.*]]) #[[ATTR1]] {
; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: [[CMP:%.*]] = icmp eq i32 [[A]], 0
; IS__CGSCC____-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
; IS__CGSCC____: cond.true:
; IS__CGSCC____-NEXT: unreachable
; IS__CGSCC____: cond.false:
; IS__CGSCC____-NEXT: unreachable
; IS__CGSCC____: cond.end:
; IS__CGSCC____-NEXT: unreachable
; ;
entry: entry:
%cmp = icmp eq i32 %a, 0 %cmp = icmp eq i32 %a, 0
br i1 %cmp, label %cond.true, label %cond.false br i1 %cmp, label %cond.true, label %cond.false
cond.true: ; preds = %entry cond.true: ; preds = %entry
%call = call i32 @endless_loop(i32 %a) %call = call i32 @endless_loop(i32 %a)
br label %cond.end br label %cond.end
cond.false: ; preds = %entry cond.false: ; preds = %entry
%call1 = call i32 @srec16(i32 %a) %call1 = call i32 @srec16(i32 %a)
br label %cond.end br label %cond.end
cond.end: ; preds = %cond.false, %cond.true cond.end: ; preds = %cond.false, %cond.true
%cond = phi i32 [ %call, %cond.true ], [ %call1, %cond.false ] %cond = phi i32 [ %call, %cond.true ], [ %call1, %cond.false ]
ret i32 %cond ret i32 %cond
} }
; TEST 6a: willreturn means *not* no-return or UB ; TEST 6a: willreturn means *not* no-return or UB
; FIXME: we should derive "UB" as an argument and report it to the user on request. ; FIXME: we should derive "UB" as an argument and report it to the user on request.
define i32 @endless_loop_but_willreturn() willreturn { define i32 @endless_loop_but_willreturn() willreturn {
; IS__TUNIT____: Function Attrs: nofree noreturn nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse noreturn nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@endless_loop_but_willreturn ; CHECK-LABEL: define {{[^@]+}}@endless_loop_but_willreturn
; IS__TUNIT____-SAME: () #[[ATTR3:[0-9]+]] { ; CHECK-SAME: () #[[ATTR3:[0-9]+]] {
; IS__TUNIT____-NEXT: entry: ; CHECK-NEXT: entry:
; IS__TUNIT____-NEXT: br label [[WHILE_BODY:%.*]] ; CHECK-NEXT: br label [[WHILE_BODY:%.*]]
; IS__TUNIT____: while.body: ; CHECK: while.body:
; IS__TUNIT____-NEXT: br label [[WHILE_BODY]] ; CHECK-NEXT: br label [[WHILE_BODY]]
;
; IS__CGSCC____: Function Attrs: nofree norecurse noreturn nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@endless_loop_but_willreturn
; IS__CGSCC____-SAME: () #[[ATTR3:[0-9]+]] {
; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: br label [[WHILE_BODY:%.*]]
; IS__CGSCC____: while.body:
; IS__CGSCC____-NEXT: br label [[WHILE_BODY]]
; ;
entry: entry:
br label %while.body br label %while.body
while.body: ; preds = %entry, %while.body while.body: ; preds = %entry, %while.body
br label %while.body br label %while.body
} }
; TEST 6b: willreturn means *not* no-return or UB ; TEST 6b: willreturn means *not* no-return or UB
define i32 @UB_and_willreturn() willreturn { define i32 @UB_and_willreturn() willreturn {
; IS__TUNIT____: Function Attrs: nofree noreturn nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse noreturn nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@UB_and_willreturn ; CHECK-LABEL: define {{[^@]+}}@UB_and_willreturn
; IS__TUNIT____-SAME: () #[[ATTR3]] { ; CHECK-SAME: () #[[ATTR3]] {
; IS__TUNIT____-NEXT: entry: ; CHECK-NEXT: entry:
; IS__TUNIT____-NEXT: unreachable ; CHECK-NEXT: unreachable
;
; IS__CGSCC____: Function Attrs: nofree norecurse noreturn nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@UB_and_willreturn
; IS__CGSCC____-SAME: () #[[ATTR3]] {
; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: unreachable
; ;
entry: entry:
unreachable unreachable
} }
attributes #0 = { noinline nounwind uwtable } attributes #0 = { noinline nounwind uwtable }
;. ;.
; IS__TUNIT____: attributes #[[ATTR0]] = { nofree noinline nosync nounwind readnone uwtable willreturn } ; CHECK: attributes #[[ATTR0]] = { nofree noinline norecurse nosync nounwind readnone uwtable willreturn }
; IS__TUNIT____: attributes #[[ATTR1]] = { nofree noinline noreturn nosync nounwind readnone uwtable willreturn } ; CHECK: attributes #[[ATTR1]] = { nofree noinline norecurse noreturn nosync nounwind readnone uwtable willreturn }
; IS__TUNIT____: attributes #[[ATTR2]] = { nofree noinline noreturn nosync nounwind readnone uwtable } ; CHECK: attributes #[[ATTR2]] = { nofree noinline norecurse noreturn nosync nounwind readnone uwtable }
; IS__TUNIT____: attributes #[[ATTR3]] = { nofree noreturn nosync nounwind readnone willreturn } ; CHECK: attributes #[[ATTR3]] = { nofree norecurse noreturn nosync nounwind readnone willreturn }
;.
; IS__CGSCC____: attributes #[[ATTR0]] = { nofree noinline norecurse nosync nounwind readnone uwtable willreturn }
; IS__CGSCC____: attributes #[[ATTR1]] = { nofree noinline norecurse noreturn nosync nounwind readnone uwtable willreturn }
; IS__CGSCC____: attributes #[[ATTR2]] = { nofree noinline norecurse noreturn nosync nounwind readnone uwtable }
; IS__CGSCC____: attributes #[[ATTR3]] = { nofree norecurse noreturn nosync nounwind readnone willreturn }
;. ;.

llvm/test/Transforms/Attributor/nosync.ll

Show All 26 Lines
; non-convergent and readnone implies nosync ; non-convergent and readnone implies nosync
%struct.RT = type { i8, [10 x [20 x i32]], i8 } %struct.RT = type { i8, [10 x [20 x i32]], i8 }
%struct.ST = type { i32, double, %struct.RT } %struct.ST = type { i32, double, %struct.RT }
;. ;.
; CHECK: @[[A:[a-zA-Z0-9_$"\\.-]+]] = common global i32 0, align 4 ; CHECK: @[[A:[a-zA-Z0-9_$"\\.-]+]] = common global i32 0, align 4
;. ;.
define i32* @foo(%struct.ST* %s) nounwind uwtable readnone optsize ssp { define i32* @foo(%struct.ST* %s) nounwind uwtable readnone optsize ssp {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind optsize readnone ssp uwtable willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind optsize readnone ssp uwtable willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@foo ; CHECK-LABEL: define {{[^@]+}}@foo
; IS__TUNIT____-SAME: (%struct.ST* nofree readnone "no-capture-maybe-returned" [[S:%.*]]) #[[ATTR0:[0-9]+]] { ; CHECK-SAME: (%struct.ST* nofree readnone "no-capture-maybe-returned" [[S:%.*]]) #[[ATTR0:[0-9]+]] {
; IS__TUNIT____-NEXT: entry: ; CHECK-NEXT: entry:
; IS__TUNIT____-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [[STRUCT_ST:%.*]], %struct.ST* [[S]], i64 1, i32 2, i32 1, i64 5, i64 13 ; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [[STRUCT_ST:%.*]], %struct.ST* [[S]], i64 1, i32 2, i32 1, i64 5, i64 13
; IS__TUNIT____-NEXT: ret i32* [[ARRAYIDX]] ; CHECK-NEXT: ret i32* [[ARRAYIDX]]
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind optsize readnone ssp uwtable willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@foo
; IS__CGSCC____-SAME: (%struct.ST* nofree readnone "no-capture-maybe-returned" [[S:%.*]]) #[[ATTR0:[0-9]+]] {
; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [[STRUCT_ST:%.*]], %struct.ST* [[S]], i64 1, i32 2, i32 1, i64 5, i64 13
; IS__CGSCC____-NEXT: ret i32* [[ARRAYIDX]]
; ;
entry: entry:
%arrayidx = getelementptr inbounds %struct.ST, %struct.ST* %s, i64 1, i32 2, i32 1, i64 5, i64 13 %arrayidx = getelementptr inbounds %struct.ST, %struct.ST* %s, i64 1, i32 2, i32 1, i64 5, i64 13
ret i32* %arrayidx ret i32* %arrayidx
} }
; TEST 2 ; TEST 2
; atomic load with monotonic ordering ; atomic load with monotonic ordering
▲ Show 20 Lines • Show All 150 Lines • ▼ Show 20 Lines
; TEST 11 - positive, should deduce nosync ; TEST 11 - positive, should deduce nosync
; volatile operation in same scc but dead. Call volatile_load defined in TEST 8. ; volatile operation in same scc but dead. Call volatile_load defined in TEST 8.
define i32 @scc1(i32* %0) noinline nounwind uwtable { define i32 @scc1(i32* %0) noinline nounwind uwtable {
; IS__TUNIT____: Function Attrs: argmemonly nofree noinline nounwind uwtable ; IS__TUNIT____: Function Attrs: argmemonly nofree noinline nounwind uwtable
; IS__TUNIT____-LABEL: define {{[^@]+}}@scc1 ; IS__TUNIT____-LABEL: define {{[^@]+}}@scc1
; IS__TUNIT____-SAME: (i32* nofree [[TMP0:%.*]]) #[[ATTR5:[0-9]+]] { ; IS__TUNIT____-SAME: (i32* nofree [[TMP0:%.*]]) #[[ATTR5:[0-9]+]] {
; IS__TUNIT____-NEXT: tail call void @scc2(i32* nofree [[TMP0]]) #[[ATTR7:[0-9]+]] ; IS__TUNIT____-NEXT: tail call void @scc2(i32* nofree [[TMP0]]) #[[ATTR19:[0-9]+]]
; IS__TUNIT____-NEXT: [[VAL:%.*]] = tail call i32 @volatile_load(i32* nofree align 4 [[TMP0]]) #[[ATTR7]] ; IS__TUNIT____-NEXT: [[VAL:%.*]] = tail call i32 @volatile_load(i32* nofree align 4 [[TMP0]]) #[[ATTR19]]
; IS__TUNIT____-NEXT: ret i32 [[VAL]] ; IS__TUNIT____-NEXT: ret i32 [[VAL]]
; ;
; IS__CGSCC_OPM: Function Attrs: argmemonly nofree noinline nounwind uwtable ; IS__CGSCC_OPM: Function Attrs: argmemonly nofree noinline nounwind uwtable
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@scc1 ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@scc1
; IS__CGSCC_OPM-SAME: (i32* nofree [[TMP0:%.*]]) #[[ATTR5:[0-9]+]] { ; IS__CGSCC_OPM-SAME: (i32* nofree [[TMP0:%.*]]) #[[ATTR5:[0-9]+]] {
; IS__CGSCC_OPM-NEXT: tail call void @scc2(i32* nofree [[TMP0]]) #[[ATTR19:[0-9]+]] ; IS__CGSCC_OPM-NEXT: tail call void @scc2(i32* nofree [[TMP0]]) #[[ATTR8:[0-9]+]]
; IS__CGSCC_OPM-NEXT: [[VAL:%.*]] = tail call i32 @volatile_load(i32* nofree noundef align 4 [[TMP0]]) #[[ATTR20:[0-9]+]] ; IS__CGSCC_OPM-NEXT: [[VAL:%.*]] = tail call i32 @volatile_load(i32* nofree noundef align 4 [[TMP0]]) #[[ATTR20:[0-9]+]]
; IS__CGSCC_OPM-NEXT: ret i32 [[VAL]] ; IS__CGSCC_OPM-NEXT: ret i32 [[VAL]]
; ;
; IS__CGSCC_NPM: Function Attrs: argmemonly nofree noinline nounwind uwtable ; IS__CGSCC_NPM: Function Attrs: argmemonly nofree noinline nounwind uwtable
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@scc1 ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@scc1
; IS__CGSCC_NPM-SAME: (i32* nofree [[TMP0:%.*]]) #[[ATTR5:[0-9]+]] { ; IS__CGSCC_NPM-SAME: (i32* nofree [[TMP0:%.*]]) #[[ATTR5:[0-9]+]] {
; IS__CGSCC_NPM-NEXT: tail call void @scc2(i32* nofree [[TMP0]]) #[[ATTR19:[0-9]+]] ; IS__CGSCC_NPM-NEXT: tail call void @scc2(i32* nofree [[TMP0]]) #[[ATTR19:[0-9]+]]
; IS__CGSCC_NPM-NEXT: [[VAL:%.*]] = tail call i32 @volatile_load(i32* nofree noundef align 4 [[TMP0]]) #[[ATTR14:[0-9]+]] ; IS__CGSCC_NPM-NEXT: [[VAL:%.*]] = tail call i32 @volatile_load(i32* nofree noundef align 4 [[TMP0]]) #[[ATTR14:[0-9]+]]
; IS__CGSCC_NPM-NEXT: ret i32 [[VAL]] ; IS__CGSCC_NPM-NEXT: ret i32 [[VAL]]
; ;
tail call void @scc2(i32* %0); tail call void @scc2(i32* %0);
%val = tail call i32 @volatile_load(i32* %0); %val = tail call i32 @volatile_load(i32* %0);
ret i32 %val; ret i32 %val;
} }
define void @scc2(i32* %0) noinline nounwind uwtable { define void @scc2(i32* %0) noinline nounwind uwtable {
; IS__TUNIT____: Function Attrs: argmemonly nofree noinline nounwind uwtable ; NOT_CGSCC_OPM: Function Attrs: argmemonly nofree noinline nounwind uwtable
; IS__TUNIT____-LABEL: define {{[^@]+}}@scc2 ; NOT_CGSCC_OPM-LABEL: define {{[^@]+}}@scc2
; IS__TUNIT____-SAME: (i32* nofree [[TMP0:%.*]]) #[[ATTR5]] { ; NOT_CGSCC_OPM-SAME: (i32* nofree [[TMP0:%.*]]) #[[ATTR5:[0-9]+]] {
; IS__TUNIT____-NEXT: [[TMP2:%.*]] = tail call i32 @scc1(i32* nofree [[TMP0]]) #[[ATTR7]] ; NOT_CGSCC_OPM-NEXT: [[TMP2:%.*]] = tail call i32 @scc1(i32* nofree [[TMP0]]) #[[ATTR19:[0-9]+]]
; IS__TUNIT____-NEXT: ret void ; NOT_CGSCC_OPM-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: argmemonly nofree noinline nounwind uwtable ; IS__CGSCC_OPM: Function Attrs: argmemonly nofree noinline norecurse nounwind uwtable
; IS__CGSCC____-LABEL: define {{[^@]+}}@scc2 ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@scc2
; IS__CGSCC____-SAME: (i32* nofree [[TMP0:%.*]]) #[[ATTR5:[0-9]+]] { ; IS__CGSCC_OPM-SAME: (i32* nofree [[TMP0:%.*]]) #[[ATTR6:[0-9]+]] {
; IS__CGSCC____-NEXT: [[TMP2:%.*]] = tail call i32 @scc1(i32* nofree [[TMP0]]) #[[ATTR19:[0-9]+]] ; IS__CGSCC_OPM-NEXT: [[TMP2:%.*]] = tail call i32 @scc1(i32* nofree [[TMP0]]) #[[ATTR21:[0-9]+]]
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC_OPM-NEXT: ret void
; ;
tail call i32 @scc1(i32* %0); tail call i32 @scc1(i32* %0);
ret void; ret void;
} }
; TEST 12 - fences, negative ; TEST 12 - fences, negative
; ;
; void foo1(int *a, std::atomic<bool> flag){ ; void foo1(int *a, std::atomic<bool> flag){
Show All 9 Lines
; atomic_thread_fence(std::memory_order_acquire); ; atomic_thread_fence(std::memory_order_acquire);
; int b = *a; ; int b = *a;
; } ; }
%"struct.std::atomic" = type { %"struct.std::__atomic_base" } %"struct.std::atomic" = type { %"struct.std::__atomic_base" }
%"struct.std::__atomic_base" = type { i8 } %"struct.std::__atomic_base" = type { i8 }
define void @foo1(i32* %0, %"struct.std::atomic"* %1) { define void @foo1(i32* %0, %"struct.std::atomic"* %1) {
; IS__TUNIT____: Function Attrs: nofree nounwind willreturn ; NOT_CGSCC_OPM: Function Attrs: nofree norecurse nounwind willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@foo1 ; NOT_CGSCC_OPM-LABEL: define {{[^@]+}}@foo1
; IS__TUNIT____-SAME: (i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[TMP0:%.*]], %"struct.std::atomic"* nocapture nofree nonnull writeonly dereferenceable(1) [[TMP1:%.*]]) #[[ATTR6:[0-9]+]] { ; NOT_CGSCC_OPM-SAME: (i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[TMP0:%.*]], %"struct.std::atomic"* nocapture nofree nonnull writeonly dereferenceable(1) [[TMP1:%.*]]) #[[ATTR6:[0-9]+]] {
; IS__TUNIT____-NEXT: store i32 100, i32* [[TMP0]], align 4 ; NOT_CGSCC_OPM-NEXT: store i32 100, i32* [[TMP0]], align 4
; IS__TUNIT____-NEXT: fence release ; NOT_CGSCC_OPM-NEXT: fence release
; IS__TUNIT____-NEXT: [[TMP3:%.*]] = getelementptr inbounds %"struct.std::atomic", %"struct.std::atomic"* [[TMP1]], i64 0, i32 0, i32 0 ; NOT_CGSCC_OPM-NEXT: [[TMP3:%.*]] = getelementptr inbounds %"struct.std::atomic", %"struct.std::atomic"* [[TMP1]], i64 0, i32 0, i32 0
; IS__TUNIT____-NEXT: store atomic i8 1, i8* [[TMP3]] monotonic, align 1 ; NOT_CGSCC_OPM-NEXT: store atomic i8 1, i8* [[TMP3]] monotonic, align 1
; IS__TUNIT____-NEXT: ret void ; NOT_CGSCC_OPM-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree norecurse nounwind willreturn ; IS__CGSCC_OPM: Function Attrs: nofree norecurse nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@foo1 ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@foo1
; IS__CGSCC____-SAME: (i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[TMP0:%.*]], %"struct.std::atomic"* nocapture nofree nonnull writeonly dereferenceable(1) [[TMP1:%.*]]) #[[ATTR6:[0-9]+]] { ; IS__CGSCC_OPM-SAME: (i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[TMP0:%.*]], %"struct.std::atomic"* nocapture nofree nonnull writeonly dereferenceable(1) [[TMP1:%.*]]) #[[ATTR7:[0-9]+]] {
; IS__CGSCC____-NEXT: store i32 100, i32* [[TMP0]], align 4 ; IS__CGSCC_OPM-NEXT: store i32 100, i32* [[TMP0]], align 4
; IS__CGSCC____-NEXT: fence release ; IS__CGSCC_OPM-NEXT: fence release
; IS__CGSCC____-NEXT: [[TMP3:%.*]] = getelementptr inbounds %"struct.std::atomic", %"struct.std::atomic"* [[TMP1]], i64 0, i32 0, i32 0 ; IS__CGSCC_OPM-NEXT: [[TMP3:%.*]] = getelementptr inbounds %"struct.std::atomic", %"struct.std::atomic"* [[TMP1]], i64 0, i32 0, i32 0
; IS__CGSCC____-NEXT: store atomic i8 1, i8* [[TMP3]] monotonic, align 1 ; IS__CGSCC_OPM-NEXT: store atomic i8 1, i8* [[TMP3]] monotonic, align 1
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC_OPM-NEXT: ret void
; ;
store i32 100, i32* %0, align 4 store i32 100, i32* %0, align 4
fence release fence release
%3 = getelementptr inbounds %"struct.std::atomic", %"struct.std::atomic"* %1, i64 0, i32 0, i32 0 %3 = getelementptr inbounds %"struct.std::atomic", %"struct.std::atomic"* %1, i64 0, i32 0, i32 0
store atomic i8 1, i8* %3 monotonic, align 1 store atomic i8 1, i8* %3 monotonic, align 1
ret void ret void
} }
define void @bar(i32* %0, %"struct.std::atomic"* %1) { define void @bar(i32* %0, %"struct.std::atomic"* %1) {
; IS__TUNIT____: Function Attrs: nofree nounwind ; NOT_CGSCC_OPM: Function Attrs: nofree norecurse nounwind
; IS__TUNIT____-LABEL: define {{[^@]+}}@bar ; NOT_CGSCC_OPM-LABEL: define {{[^@]+}}@bar
; IS__TUNIT____-SAME: (i32* nocapture nofree readnone [[TMP0:%.*]], %"struct.std::atomic"* nocapture nofree nonnull readonly dereferenceable(1) [[TMP1:%.*]]) #[[ATTR7]] { ; NOT_CGSCC_OPM-SAME: (i32* nocapture nofree readnone [[TMP0:%.*]], %"struct.std::atomic"* nocapture nofree nonnull readonly dereferenceable(1) [[TMP1:%.*]]) #[[ATTR7:[0-9]+]] {
; IS__TUNIT____-NEXT: [[TMP3:%.*]] = getelementptr inbounds %"struct.std::atomic", %"struct.std::atomic"* [[TMP1]], i64 0, i32 0, i32 0 ; NOT_CGSCC_OPM-NEXT: [[TMP3:%.*]] = getelementptr inbounds %"struct.std::atomic", %"struct.std::atomic"* [[TMP1]], i64 0, i32 0, i32 0
; IS__TUNIT____-NEXT: br label [[TMP4:%.*]] ; NOT_CGSCC_OPM-NEXT: br label [[TMP4:%.*]]
; IS__TUNIT____: 4: ; NOT_CGSCC_OPM: 4:
; IS__TUNIT____-NEXT: [[TMP5:%.*]] = load atomic i8, i8* [[TMP3]] monotonic, align 1 ; NOT_CGSCC_OPM-NEXT: [[TMP5:%.*]] = load atomic i8, i8* [[TMP3]] monotonic, align 1
; IS__TUNIT____-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 1 ; NOT_CGSCC_OPM-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 1
; IS__TUNIT____-NEXT: [[TMP7:%.*]] = icmp eq i8 [[TMP6]], 0 ; NOT_CGSCC_OPM-NEXT: [[TMP7:%.*]] = icmp eq i8 [[TMP6]], 0
; IS__TUNIT____-NEXT: br i1 [[TMP7]], label [[TMP4]], label [[TMP8:%.*]] ; NOT_CGSCC_OPM-NEXT: br i1 [[TMP7]], label [[TMP4]], label [[TMP8:%.*]]
; IS__TUNIT____: 8: ; NOT_CGSCC_OPM: 8:
; IS__TUNIT____-NEXT: fence acquire ; NOT_CGSCC_OPM-NEXT: fence acquire
; IS__TUNIT____-NEXT: ret void ; NOT_CGSCC_OPM-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree norecurse nounwind ; IS__CGSCC_OPM: Function Attrs: nofree norecurse nounwind
; IS__CGSCC____-LABEL: define {{[^@]+}}@bar ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@bar
; IS__CGSCC____-SAME: (i32* nocapture nofree readnone [[TMP0:%.*]], %"struct.std::atomic"* nocapture nofree nonnull readonly dereferenceable(1) [[TMP1:%.*]]) #[[ATTR7:[0-9]+]] { ; IS__CGSCC_OPM-SAME: (i32* nocapture nofree readnone [[TMP0:%.*]], %"struct.std::atomic"* nocapture nofree nonnull readonly dereferenceable(1) [[TMP1:%.*]]) #[[ATTR8]] {
; IS__CGSCC____-NEXT: [[TMP3:%.*]] = getelementptr inbounds %"struct.std::atomic", %"struct.std::atomic"* [[TMP1]], i64 0, i32 0, i32 0 ; IS__CGSCC_OPM-NEXT: [[TMP3:%.*]] = getelementptr inbounds %"struct.std::atomic", %"struct.std::atomic"* [[TMP1]], i64 0, i32 0, i32 0
; IS__CGSCC____-NEXT: br label [[TMP4:%.*]] ; IS__CGSCC_OPM-NEXT: br label [[TMP4:%.*]]
; IS__CGSCC____: 4: ; IS__CGSCC_OPM: 4:
; IS__CGSCC____-NEXT: [[TMP5:%.*]] = load atomic i8, i8* [[TMP3]] monotonic, align 1 ; IS__CGSCC_OPM-NEXT: [[TMP5:%.*]] = load atomic i8, i8* [[TMP3]] monotonic, align 1
; IS__CGSCC____-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 1 ; IS__CGSCC_OPM-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 1
; IS__CGSCC____-NEXT: [[TMP7:%.*]] = icmp eq i8 [[TMP6]], 0 ; IS__CGSCC_OPM-NEXT: [[TMP7:%.*]] = icmp eq i8 [[TMP6]], 0
; IS__CGSCC____-NEXT: br i1 [[TMP7]], label [[TMP4]], label [[TMP8:%.*]] ; IS__CGSCC_OPM-NEXT: br i1 [[TMP7]], label [[TMP4]], label [[TMP8:%.*]]
; IS__CGSCC____: 8: ; IS__CGSCC_OPM: 8:
; IS__CGSCC____-NEXT: fence acquire ; IS__CGSCC_OPM-NEXT: fence acquire
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC_OPM-NEXT: ret void
; ;
%3 = getelementptr inbounds %"struct.std::atomic", %"struct.std::atomic"* %1, i64 0, i32 0, i32 0 %3 = getelementptr inbounds %"struct.std::atomic", %"struct.std::atomic"* %1, i64 0, i32 0, i32 0
br label %4 br label %4
4: ; preds = %4, %2 4: ; preds = %4, %2
%5 = load atomic i8, i8* %3 monotonic, align 1 %5 = load atomic i8, i8* %3 monotonic, align 1
%6 = and i8 %5, 1 %6 = and i8 %5, 1
%7 = icmp eq i8 %6, 0 %7 = icmp eq i8 %6, 0
br i1 %7, label %4, label %8 br i1 %7, label %4, label %8
8: ; preds = %4 8: ; preds = %4
fence acquire fence acquire
ret void ret void
} }
; TEST 13 - Fence syncscope("singlethread") seq_cst ; TEST 13 - Fence syncscope("singlethread") seq_cst
define void @foo1_singlethread(i32* %0, %"struct.std::atomic"* %1) { define void @foo1_singlethread(i32* %0, %"struct.std::atomic"* %1) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind willreturn ; NOT_CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@foo1_singlethread ; NOT_CGSCC_OPM-LABEL: define {{[^@]+}}@foo1_singlethread
; IS__TUNIT____-SAME: (i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[TMP0:%.*]], %"struct.std::atomic"* nocapture nofree nonnull writeonly dereferenceable(1) [[TMP1:%.*]]) #[[ATTR8:[0-9]+]] { ; NOT_CGSCC_OPM-SAME: (i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[TMP0:%.*]], %"struct.std::atomic"* nocapture nofree nonnull writeonly dereferenceable(1) [[TMP1:%.*]]) #[[ATTR8:[0-9]+]] {
; IS__TUNIT____-NEXT: store i32 100, i32* [[TMP0]], align 4 ; NOT_CGSCC_OPM-NEXT: store i32 100, i32* [[TMP0]], align 4
; IS__TUNIT____-NEXT: fence syncscope("singlethread") release ; NOT_CGSCC_OPM-NEXT: fence syncscope("singlethread") release
; IS__TUNIT____-NEXT: [[TMP3:%.*]] = getelementptr inbounds %"struct.std::atomic", %"struct.std::atomic"* [[TMP1]], i64 0, i32 0, i32 0 ; NOT_CGSCC_OPM-NEXT: [[TMP3:%.*]] = getelementptr inbounds %"struct.std::atomic", %"struct.std::atomic"* [[TMP1]], i64 0, i32 0, i32 0
; IS__TUNIT____-NEXT: store atomic i8 1, i8* [[TMP3]] monotonic, align 1 ; NOT_CGSCC_OPM-NEXT: store atomic i8 1, i8* [[TMP3]] monotonic, align 1
; IS__TUNIT____-NEXT: ret void ; NOT_CGSCC_OPM-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind willreturn ; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@foo1_singlethread ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@foo1_singlethread
; IS__CGSCC____-SAME: (i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[TMP0:%.*]], %"struct.std::atomic"* nocapture nofree nonnull writeonly dereferenceable(1) [[TMP1:%.*]]) #[[ATTR8:[0-9]+]] { ; IS__CGSCC_OPM-SAME: (i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[TMP0:%.*]], %"struct.std::atomic"* nocapture nofree nonnull writeonly dereferenceable(1) [[TMP1:%.*]]) #[[ATTR9:[0-9]+]] {
; IS__CGSCC____-NEXT: store i32 100, i32* [[TMP0]], align 4 ; IS__CGSCC_OPM-NEXT: store i32 100, i32* [[TMP0]], align 4
; IS__CGSCC____-NEXT: fence syncscope("singlethread") release ; IS__CGSCC_OPM-NEXT: fence syncscope("singlethread") release
; IS__CGSCC____-NEXT: [[TMP3:%.*]] = getelementptr inbounds %"struct.std::atomic", %"struct.std::atomic"* [[TMP1]], i64 0, i32 0, i32 0 ; IS__CGSCC_OPM-NEXT: [[TMP3:%.*]] = getelementptr inbounds %"struct.std::atomic", %"struct.std::atomic"* [[TMP1]], i64 0, i32 0, i32 0
; IS__CGSCC____-NEXT: store atomic i8 1, i8* [[TMP3]] monotonic, align 1 ; IS__CGSCC_OPM-NEXT: store atomic i8 1, i8* [[TMP3]] monotonic, align 1
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC_OPM-NEXT: ret void
; ;
store i32 100, i32* %0, align 4 store i32 100, i32* %0, align 4
fence syncscope("singlethread") release fence syncscope("singlethread") release
%3 = getelementptr inbounds %"struct.std::atomic", %"struct.std::atomic"* %1, i64 0, i32 0, i32 0 %3 = getelementptr inbounds %"struct.std::atomic", %"struct.std::atomic"* %1, i64 0, i32 0, i32 0
store atomic i8 1, i8* %3 monotonic, align 1 store atomic i8 1, i8* %3 monotonic, align 1
ret void ret void
} }
define void @bar_singlethread(i32* %0, %"struct.std::atomic"* %1) { define void @bar_singlethread(i32* %0, %"struct.std::atomic"* %1) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind ; NOT_CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind
; IS__TUNIT____-LABEL: define {{[^@]+}}@bar_singlethread ; NOT_CGSCC_OPM-LABEL: define {{[^@]+}}@bar_singlethread
; IS__TUNIT____-SAME: (i32* nocapture nofree readnone [[TMP0:%.*]], %"struct.std::atomic"* nocapture nofree nonnull readonly dereferenceable(1) [[TMP1:%.*]]) #[[ATTR9:[0-9]+]] { ; NOT_CGSCC_OPM-SAME: (i32* nocapture nofree readnone [[TMP0:%.*]], %"struct.std::atomic"* nocapture nofree nonnull readonly dereferenceable(1) [[TMP1:%.*]]) #[[ATTR9:[0-9]+]] {
; IS__TUNIT____-NEXT: [[TMP3:%.*]] = getelementptr inbounds %"struct.std::atomic", %"struct.std::atomic"* [[TMP1]], i64 0, i32 0, i32 0 ; NOT_CGSCC_OPM-NEXT: [[TMP3:%.*]] = getelementptr inbounds %"struct.std::atomic", %"struct.std::atomic"* [[TMP1]], i64 0, i32 0, i32 0
; IS__TUNIT____-NEXT: br label [[TMP4:%.*]] ; NOT_CGSCC_OPM-NEXT: br label [[TMP4:%.*]]
; IS__TUNIT____: 4: ; NOT_CGSCC_OPM: 4:
; IS__TUNIT____-NEXT: [[TMP5:%.*]] = load atomic i8, i8* [[TMP3]] monotonic, align 1 ; NOT_CGSCC_OPM-NEXT: [[TMP5:%.*]] = load atomic i8, i8* [[TMP3]] monotonic, align 1
; IS__TUNIT____-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 1 ; NOT_CGSCC_OPM-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 1
; IS__TUNIT____-NEXT: [[TMP7:%.*]] = icmp eq i8 [[TMP6]], 0 ; NOT_CGSCC_OPM-NEXT: [[TMP7:%.*]] = icmp eq i8 [[TMP6]], 0
; IS__TUNIT____-NEXT: br i1 [[TMP7]], label [[TMP4]], label [[TMP8:%.*]] ; NOT_CGSCC_OPM-NEXT: br i1 [[TMP7]], label [[TMP4]], label [[TMP8:%.*]]
; IS__TUNIT____: 8: ; NOT_CGSCC_OPM: 8:
; IS__TUNIT____-NEXT: fence syncscope("singlethread") acquire ; NOT_CGSCC_OPM-NEXT: fence syncscope("singlethread") acquire
; IS__TUNIT____-NEXT: ret void ; NOT_CGSCC_OPM-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind ; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind
; IS__CGSCC____-LABEL: define {{[^@]+}}@bar_singlethread ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@bar_singlethread
; IS__CGSCC____-SAME: (i32* nocapture nofree readnone [[TMP0:%.*]], %"struct.std::atomic"* nocapture nofree nonnull readonly dereferenceable(1) [[TMP1:%.*]]) #[[ATTR9:[0-9]+]] { ; IS__CGSCC_OPM-SAME: (i32* nocapture nofree readnone [[TMP0:%.*]], %"struct.std::atomic"* nocapture nofree nonnull readonly dereferenceable(1) [[TMP1:%.*]]) #[[ATTR10:[0-9]+]] {
; IS__CGSCC____-NEXT: [[TMP3:%.*]] = getelementptr inbounds %"struct.std::atomic", %"struct.std::atomic"* [[TMP1]], i64 0, i32 0, i32 0 ; IS__CGSCC_OPM-NEXT: [[TMP3:%.*]] = getelementptr inbounds %"struct.std::atomic", %"struct.std::atomic"* [[TMP1]], i64 0, i32 0, i32 0
; IS__CGSCC____-NEXT: br label [[TMP4:%.*]] ; IS__CGSCC_OPM-NEXT: br label [[TMP4:%.*]]
; IS__CGSCC____: 4: ; IS__CGSCC_OPM: 4:
; IS__CGSCC____-NEXT: [[TMP5:%.*]] = load atomic i8, i8* [[TMP3]] monotonic, align 1 ; IS__CGSCC_OPM-NEXT: [[TMP5:%.*]] = load atomic i8, i8* [[TMP3]] monotonic, align 1
; IS__CGSCC____-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 1 ; IS__CGSCC_OPM-NEXT: [[TMP6:%.*]] = and i8 [[TMP5]], 1
; IS__CGSCC____-NEXT: [[TMP7:%.*]] = icmp eq i8 [[TMP6]], 0 ; IS__CGSCC_OPM-NEXT: [[TMP7:%.*]] = icmp eq i8 [[TMP6]], 0
; IS__CGSCC____-NEXT: br i1 [[TMP7]], label [[TMP4]], label [[TMP8:%.*]] ; IS__CGSCC_OPM-NEXT: br i1 [[TMP7]], label [[TMP4]], label [[TMP8:%.*]]
; IS__CGSCC____: 8: ; IS__CGSCC_OPM: 8:
; IS__CGSCC____-NEXT: fence syncscope("singlethread") acquire ; IS__CGSCC_OPM-NEXT: fence syncscope("singlethread") acquire
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC_OPM-NEXT: ret void
; ;
%3 = getelementptr inbounds %"struct.std::atomic", %"struct.std::atomic"* %1, i64 0, i32 0, i32 0 %3 = getelementptr inbounds %"struct.std::atomic", %"struct.std::atomic"* %1, i64 0, i32 0, i32 0
br label %4 br label %4
4: ; preds = %4, %2 4: ; preds = %4, %2
%5 = load atomic i8, i8* %3 monotonic, align 1 %5 = load atomic i8, i8* %3 monotonic, align 1
%6 = and i8 %5, 1 %6 = and i8 %5, 1
%7 = icmp eq i8 %6, 0 %7 = icmp eq i8 %6, 0
br i1 %7, label %4, label %8 br i1 %7, label %4, label %8
8: ; preds = %4 8: ; preds = %4
fence syncscope("singlethread") acquire fence syncscope("singlethread") acquire
ret void ret void
} }
declare void @llvm.memcpy(i8* %dest, i8* %src, i32 %len, i1 %isvolatile) declare void @llvm.memcpy(i8* %dest, i8* %src, i32 %len, i1 %isvolatile)
declare void @llvm.memset(i8* %dest, i8 %val, i32 %len, i1 %isvolatile) declare void @llvm.memset(i8* %dest, i8 %val, i32 %len, i1 %isvolatile)
; TEST 14 - negative, checking volatile intrinsics. ; TEST 14 - negative, checking volatile intrinsics.
; It is odd to add nocapture but a result of the llvm.memcpy nocapture. ; It is odd to add nocapture but a result of the llvm.memcpy nocapture.
; ;
define i32 @memcpy_volatile(i8* %ptr1, i8* %ptr2) { define i32 @memcpy_volatile(i8* %ptr1, i8* %ptr2) {
; IS__TUNIT____: Function Attrs: argmemonly nofree nounwind willreturn ; NOT_CGSCC_OPM: Function Attrs: argmemonly nofree nounwind willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@memcpy_volatile ; NOT_CGSCC_OPM-LABEL: define {{[^@]+}}@memcpy_volatile
; IS__TUNIT____-SAME: (i8* nocapture nofree writeonly [[PTR1:%.*]], i8* nocapture nofree readonly [[PTR2:%.*]]) #[[ATTR10:[0-9]+]] { ; NOT_CGSCC_OPM-SAME: (i8* nocapture nofree writeonly [[PTR1:%.*]], i8* nocapture nofree readonly [[PTR2:%.*]]) #[[ATTR10:[0-9]+]] {
; IS__TUNIT____-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* noalias nocapture nofree writeonly [[PTR1]], i8* noalias nocapture nofree readonly [[PTR2]], i32 noundef 8, i1 noundef true) #[[ATTR18:[0-9]+]] ; NOT_CGSCC_OPM-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* noalias nocapture nofree writeonly [[PTR1]], i8* noalias nocapture nofree readonly [[PTR2]], i32 noundef 8, i1 noundef true) #[[ATTR20:[0-9]+]]
; IS__TUNIT____-NEXT: ret i32 4 ; NOT_CGSCC_OPM-NEXT: ret i32 4
; ;
; IS__CGSCC_OPM: Function Attrs: argmemonly nofree nounwind willreturn ; IS__CGSCC_OPM: Function Attrs: argmemonly nofree nounwind willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@memcpy_volatile ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@memcpy_volatile
; IS__CGSCC_OPM-SAME: (i8* nocapture nofree writeonly [[PTR1:%.*]], i8* nocapture nofree readonly [[PTR2:%.*]]) #[[ATTR10:[0-9]+]] { ; IS__CGSCC_OPM-SAME: (i8* nocapture nofree writeonly [[PTR1:%.*]], i8* nocapture nofree readonly [[PTR2:%.*]]) #[[ATTR11:[0-9]+]] {
; IS__CGSCC_OPM-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* noalias nocapture nofree writeonly [[PTR1]], i8* noalias nocapture nofree readonly [[PTR2]], i32 noundef 8, i1 noundef true) #[[ATTR21:[0-9]+]] ; IS__CGSCC_OPM-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* noalias nocapture nofree writeonly [[PTR1]], i8* noalias nocapture nofree readonly [[PTR2]], i32 noundef 8, i1 noundef true) #[[ATTR22:[0-9]+]]
; IS__CGSCC_OPM-NEXT: ret i32 4 ; IS__CGSCC_OPM-NEXT: ret i32 4
; ;
; IS__CGSCC_NPM: Function Attrs: argmemonly nofree nounwind willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@memcpy_volatile
; IS__CGSCC_NPM-SAME: (i8* nocapture nofree writeonly [[PTR1:%.*]], i8* nocapture nofree readonly [[PTR2:%.*]]) #[[ATTR10:[0-9]+]] {
; IS__CGSCC_NPM-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* noalias nocapture nofree writeonly [[PTR1]], i8* noalias nocapture nofree readonly [[PTR2]], i32 noundef 8, i1 noundef true) #[[ATTR20:[0-9]+]]
; IS__CGSCC_NPM-NEXT: ret i32 4
;
call void @llvm.memcpy(i8* %ptr1, i8* %ptr2, i32 8, i1 1) call void @llvm.memcpy(i8* %ptr1, i8* %ptr2, i32 8, i1 1)
ret i32 4 ret i32 4
} }
; TEST 15 - positive, non-volatile intrinsic. ; TEST 15 - positive, non-volatile intrinsic.
; It is odd to add nocapture but a result of the llvm.memset nocapture. ; It is odd to add nocapture but a result of the llvm.memset nocapture.
; ;
define i32 @memset_non_volatile(i8* %ptr1, i8 %val) { define i32 @memset_non_volatile(i8* %ptr1, i8 %val) {
; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind willreturn writeonly ; NOT_CGSCC_OPM: Function Attrs: argmemonly nofree nosync nounwind willreturn writeonly
; IS__TUNIT____-LABEL: define {{[^@]+}}@memset_non_volatile ; NOT_CGSCC_OPM-LABEL: define {{[^@]+}}@memset_non_volatile
; IS__TUNIT____-SAME: (i8* nocapture nofree writeonly [[PTR1:%.*]], i8 [[VAL:%.*]]) #[[ATTR11:[0-9]+]] { ; NOT_CGSCC_OPM-SAME: (i8* nocapture nofree writeonly [[PTR1:%.*]], i8 [[VAL:%.*]]) #[[ATTR11:[0-9]+]] {
; IS__TUNIT____-NEXT: call void @llvm.memset.p0i8.i32(i8* nocapture nofree writeonly [[PTR1]], i8 [[VAL]], i32 noundef 8, i1 noundef false) #[[ATTR19:[0-9]+]] ; NOT_CGSCC_OPM-NEXT: call void @llvm.memset.p0i8.i32(i8* nocapture nofree writeonly [[PTR1]], i8 [[VAL]], i32 noundef 8, i1 noundef false) #[[ATTR21:[0-9]+]]
; IS__TUNIT____-NEXT: ret i32 4 ; NOT_CGSCC_OPM-NEXT: ret i32 4
; ;
; IS__CGSCC_OPM: Function Attrs: argmemonly nofree nosync nounwind willreturn writeonly ; IS__CGSCC_OPM: Function Attrs: argmemonly nofree nosync nounwind willreturn writeonly
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@memset_non_volatile ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@memset_non_volatile
; IS__CGSCC_OPM-SAME: (i8* nocapture nofree writeonly [[PTR1:%.*]], i8 [[VAL:%.*]]) #[[ATTR11:[0-9]+]] { ; IS__CGSCC_OPM-SAME: (i8* nocapture nofree writeonly [[PTR1:%.*]], i8 [[VAL:%.*]]) #[[ATTR12:[0-9]+]] {
; IS__CGSCC_OPM-NEXT: call void @llvm.memset.p0i8.i32(i8* nocapture nofree writeonly [[PTR1]], i8 [[VAL]], i32 noundef 8, i1 noundef false) #[[ATTR22:[0-9]+]] ; IS__CGSCC_OPM-NEXT: call void @llvm.memset.p0i8.i32(i8* nocapture nofree writeonly [[PTR1]], i8 [[VAL]], i32 noundef 8, i1 noundef false) #[[ATTR23:[0-9]+]]
; IS__CGSCC_OPM-NEXT: ret i32 4 ; IS__CGSCC_OPM-NEXT: ret i32 4
; ;
; IS__CGSCC_NPM: Function Attrs: argmemonly nofree nosync nounwind willreturn writeonly
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@memset_non_volatile
; IS__CGSCC_NPM-SAME: (i8* nocapture nofree writeonly [[PTR1:%.*]], i8 [[VAL:%.*]]) #[[ATTR11:[0-9]+]] {
; IS__CGSCC_NPM-NEXT: call void @llvm.memset.p0i8.i32(i8* nocapture nofree writeonly [[PTR1]], i8 [[VAL]], i32 noundef 8, i1 noundef false) #[[ATTR21:[0-9]+]]
; IS__CGSCC_NPM-NEXT: ret i32 4
;
call void @llvm.memset(i8* %ptr1, i8 %val, i32 8, i1 0) call void @llvm.memset(i8* %ptr1, i8 %val, i32 8, i1 0)
ret i32 4 ret i32 4
} }
; TEST 16 - negative, inline assembly. ; TEST 16 - negative, inline assembly.
define i32 @inline_asm_test(i32 %x) { define i32 @inline_asm_test(i32 %x) {
; CHECK-LABEL: define {{[^@]+}}@inline_asm_test ; CHECK-LABEL: define {{[^@]+}}@inline_asm_test
; CHECK-SAME: (i32 [[X:%.*]]) { ; CHECK-SAME: (i32 [[X:%.*]]) {
; CHECK-NEXT: [[TMP1:%.*]] = call i32 asm "bswap $0", "=r,r"(i32 [[X]]) ; CHECK-NEXT: [[TMP1:%.*]] = call i32 asm "bswap $0", "=r,r"(i32 [[X]])
; CHECK-NEXT: ret i32 4 ; CHECK-NEXT: ret i32 4
; ;
call i32 asm "bswap $0", "=r,r"(i32 %x) call i32 asm "bswap $0", "=r,r"(i32 %x)
ret i32 4 ret i32 4
} }
declare void @readnone_test() convergent readnone declare void @readnone_test() convergent readnone
; TEST 17 - negative. Convergent ; TEST 17 - negative. Convergent
define void @convergent_readnone(){ define void @convergent_readnone(){
; CHECK: Function Attrs: readnone ; NOT_CGSCC_OPM: Function Attrs: readnone
; CHECK-LABEL: define {{[^@]+}}@convergent_readnone ; NOT_CGSCC_OPM-LABEL: define {{[^@]+}}@convergent_readnone
; CHECK-SAME: () #[[ATTR13:[0-9]+]] { ; NOT_CGSCC_OPM-SAME: () #[[ATTR13:[0-9]+]] {
; CHECK-NEXT: call void @readnone_test() ; NOT_CGSCC_OPM-NEXT: call void @readnone_test()
; CHECK-NEXT: ret void ; NOT_CGSCC_OPM-NEXT: ret void
;
; IS__CGSCC_OPM: Function Attrs: readnone
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@convergent_readnone
; IS__CGSCC_OPM-SAME: () #[[ATTR14:[0-9]+]] {
; IS__CGSCC_OPM-NEXT: call void @readnone_test()
; IS__CGSCC_OPM-NEXT: ret void
; ;
call void @readnone_test() call void @readnone_test()
ret void ret void
} }
; CHECK: Function Attrs: nounwind ; CHECK: Function Attrs: nounwind
; CHECK-NEXT: declare void @llvm.x86.sse2.clflush(i8*) ; CHECK-NEXT: declare void @llvm.x86.sse2.clflush(i8*)
declare void @llvm.x86.sse2.clflush(i8*) declare void @llvm.x86.sse2.clflush(i8*)
@a = common global i32 0, align 4 @a = common global i32 0, align 4
; TEST 18 - negative. Synchronizing intrinsic ; TEST 18 - negative. Synchronizing intrinsic
define void @i_totally_sync() { define void @i_totally_sync() {
; CHECK: Function Attrs: nounwind ; NOT_CGSCC_OPM: Function Attrs: nounwind
; CHECK-LABEL: define {{[^@]+}}@i_totally_sync ; NOT_CGSCC_OPM-LABEL: define {{[^@]+}}@i_totally_sync
; CHECK-SAME: () #[[ATTR14:[0-9]+]] { ; NOT_CGSCC_OPM-SAME: () #[[ATTR14:[0-9]+]] {
; CHECK-NEXT: tail call void @llvm.x86.sse2.clflush(i8* noundef nonnull align 4 dereferenceable(4) bitcast (i32* @a to i8*)) ; NOT_CGSCC_OPM-NEXT: tail call void @llvm.x86.sse2.clflush(i8* noundef nonnull align 4 dereferenceable(4) bitcast (i32* @a to i8*))
; CHECK-NEXT: ret void ; NOT_CGSCC_OPM-NEXT: ret void
;
; IS__CGSCC_OPM: Function Attrs: nounwind
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@i_totally_sync
; IS__CGSCC_OPM-SAME: () #[[ATTR15:[0-9]+]] {
; IS__CGSCC_OPM-NEXT: tail call void @llvm.x86.sse2.clflush(i8* noundef nonnull align 4 dereferenceable(4) bitcast (i32* @a to i8*))
; IS__CGSCC_OPM-NEXT: ret void
; ;
tail call void @llvm.x86.sse2.clflush(i8* bitcast (i32* @a to i8*)) tail call void @llvm.x86.sse2.clflush(i8* bitcast (i32* @a to i8*))
ret void ret void
} }
declare float @llvm.cos(float %val) readnone declare float @llvm.cos(float %val) readnone
; TEST 19 - positive, readnone & non-convergent intrinsic. ; TEST 19 - positive, readnone & non-convergent intrinsic.
define i32 @cos_test(float %x) { define i32 @cos_test(float %x) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; NOT_CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@cos_test ; NOT_CGSCC_OPM-LABEL: define {{[^@]+}}@cos_test
; IS__TUNIT____-SAME: (float [[X:%.*]]) #[[ATTR15:[0-9]+]] { ; NOT_CGSCC_OPM-SAME: (float [[X:%.*]]) #[[ATTR15:[0-9]+]] {
; IS__TUNIT____-NEXT: ret i32 4 ; NOT_CGSCC_OPM-NEXT: ret i32 4
; ;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@cos_test ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@cos_test
; IS__CGSCC____-SAME: (float [[X:%.*]]) #[[ATTR15:[0-9]+]] { ; IS__CGSCC_OPM-SAME: (float [[X:%.*]]) #[[ATTR16:[0-9]+]] {
; IS__CGSCC____-NEXT: ret i32 4 ; IS__CGSCC_OPM-NEXT: ret i32 4
; ;
call float @llvm.cos(float %x) call float @llvm.cos(float %x)
ret i32 4 ret i32 4
} }
define float @cos_test2(float %x) { define float @cos_test2(float %x) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; NOT_CGSCC_OPM: Function Attrs: nofree nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@cos_test2 ; NOT_CGSCC_OPM-LABEL: define {{[^@]+}}@cos_test2
; IS__TUNIT____-SAME: (float [[X:%.*]]) #[[ATTR15]] { ; NOT_CGSCC_OPM-SAME: (float [[X:%.*]]) #[[ATTR16:[0-9]+]] {
; IS__TUNIT____-NEXT: [[C:%.*]] = call float @llvm.cos.f32(float [[X]]) #[[ATTR20:[0-9]+]] ; NOT_CGSCC_OPM-NEXT: [[C:%.*]] = call float @llvm.cos.f32(float [[X]]) #[[ATTR22:[0-9]+]]
; IS__TUNIT____-NEXT: ret float [[C]] ; NOT_CGSCC_OPM-NEXT: ret float [[C]]
; ;
; IS__CGSCC_OPM: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__CGSCC_OPM: Function Attrs: nofree nosync nounwind readnone willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@cos_test2 ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@cos_test2
; IS__CGSCC_OPM-SAME: (float [[X:%.*]]) #[[ATTR16:[0-9]+]] { ; IS__CGSCC_OPM-SAME: (float [[X:%.*]]) #[[ATTR17:[0-9]+]] {
; IS__CGSCC_OPM-NEXT: [[C:%.*]] = call float @llvm.cos.f32(float [[X]]) #[[ATTR23:[0-9]+]] ; IS__CGSCC_OPM-NEXT: [[C:%.*]] = call float @llvm.cos.f32(float [[X]]) #[[ATTR24:[0-9]+]]
; IS__CGSCC_OPM-NEXT: ret float [[C]] ; IS__CGSCC_OPM-NEXT: ret float [[C]]
; ;
; IS__CGSCC_NPM: Function Attrs: nofree nosync nounwind readnone willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@cos_test2
; IS__CGSCC_NPM-SAME: (float [[X:%.*]]) #[[ATTR16:[0-9]+]] {
; IS__CGSCC_NPM-NEXT: [[C:%.*]] = call float @llvm.cos.f32(float [[X]]) #[[ATTR22:[0-9]+]]
; IS__CGSCC_NPM-NEXT: ret float [[C]]
;
%c = call float @llvm.cos(float %x) %c = call float @llvm.cos(float %x)
ret float %c ret float %c
} }
;. ;.
; IS__TUNIT____: attributes #[[ATTR0]] = { nofree nosync nounwind optsize readnone ssp uwtable willreturn } ; NOT_CGSCC_OPM: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind optsize readnone ssp uwtable willreturn }
; IS__TUNIT____: attributes #[[ATTR1]] = { argmemonly nofree norecurse nosync nounwind uwtable willreturn } ; NOT_CGSCC_OPM: attributes #[[ATTR1]] = { argmemonly nofree norecurse nosync nounwind uwtable willreturn }
; IS__TUNIT____: attributes #[[ATTR2]] = { argmemonly nofree norecurse nounwind uwtable willreturn } ; NOT_CGSCC_OPM: attributes #[[ATTR2]] = { argmemonly nofree norecurse nounwind uwtable willreturn }
; IS__TUNIT____: attributes #[[ATTR3]] = { noinline nosync nounwind uwtable } ; NOT_CGSCC_OPM: attributes #[[ATTR3]] = { noinline nosync nounwind uwtable }
; IS__TUNIT____: attributes #[[ATTR4]] = { noinline nounwind uwtable } ; NOT_CGSCC_OPM: attributes #[[ATTR4]] = { noinline nounwind uwtable }
; IS__TUNIT____: attributes #[[ATTR5]] = { argmemonly nofree noinline nounwind uwtable } ; NOT_CGSCC_OPM: attributes #[[ATTR5]] = { argmemonly nofree noinline nounwind uwtable }
; IS__TUNIT____: attributes #[[ATTR6]] = { nofree nounwind willreturn } ; NOT_CGSCC_OPM: attributes #[[ATTR6]] = { nofree norecurse nounwind willreturn }
; IS__TUNIT____: attributes #[[ATTR7]] = { nofree nounwind } ; NOT_CGSCC_OPM: attributes #[[ATTR7]] = { nofree norecurse nounwind }
; IS__TUNIT____: attributes #[[ATTR8]] = { nofree nosync nounwind willreturn } ; NOT_CGSCC_OPM: attributes #[[ATTR8]] = { nofree norecurse nosync nounwind willreturn }
; IS__TUNIT____: attributes #[[ATTR9]] = { nofree nosync nounwind } ; NOT_CGSCC_OPM: attributes #[[ATTR9]] = { nofree norecurse nosync nounwind }
; IS__TUNIT____: attributes #[[ATTR10]] = { argmemonly nofree nounwind willreturn } ; NOT_CGSCC_OPM: attributes #[[ATTR10]] = { argmemonly nofree nounwind willreturn }
; IS__TUNIT____: attributes #[[ATTR11]] = { argmemonly nofree nosync nounwind willreturn writeonly } ; NOT_CGSCC_OPM: attributes #[[ATTR11]] = { argmemonly nofree nosync nounwind willreturn writeonly }
; IS__TUNIT____: attributes #[[ATTR12:[0-9]+]] = { convergent readnone } ; NOT_CGSCC_OPM: attributes #[[ATTR12:[0-9]+]] = { convergent readnone }
; IS__TUNIT____: attributes #[[ATTR13]] = { readnone } ; NOT_CGSCC_OPM: attributes #[[ATTR13]] = { readnone }
; IS__TUNIT____: attributes #[[ATTR14]] = { nounwind } ; NOT_CGSCC_OPM: attributes #[[ATTR14]] = { nounwind }
; IS__TUNIT____: attributes #[[ATTR15]] = { nofree nosync nounwind readnone willreturn } ; NOT_CGSCC_OPM: attributes #[[ATTR15]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__TUNIT____: attributes #[[ATTR16:[0-9]+]] = { argmemonly nofree nounwind willreturn writeonly } ; NOT_CGSCC_OPM: attributes #[[ATTR16]] = { nofree nosync nounwind readnone willreturn }
; IS__TUNIT____: attributes #[[ATTR17:[0-9]+]] = { nofree nosync nounwind readnone speculatable willreturn } ; NOT_CGSCC_OPM: attributes #[[ATTR17:[0-9]+]] = { argmemonly nofree nounwind willreturn writeonly }
; IS__TUNIT____: attributes #[[ATTR18]] = { willreturn } ; NOT_CGSCC_OPM: attributes #[[ATTR18:[0-9]+]] = { nofree nosync nounwind readnone speculatable willreturn }
; IS__TUNIT____: attributes #[[ATTR19]] = { willreturn writeonly } ; NOT_CGSCC_OPM: attributes #[[ATTR19]] = { nofree nounwind }
; IS__TUNIT____: attributes #[[ATTR20]] = { readnone willreturn } ; NOT_CGSCC_OPM: attributes #[[ATTR20]] = { willreturn }
; NOT_CGSCC_OPM: attributes #[[ATTR21]] = { willreturn writeonly }
; NOT_CGSCC_OPM: attributes #[[ATTR22]] = { readnone willreturn }
;. ;.
; IS__CGSCC_OPM: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind optsize readnone ssp uwtable willreturn } ; IS__CGSCC_OPM: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind optsize readnone ssp uwtable willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR1]] = { argmemonly nofree norecurse nosync nounwind uwtable willreturn } ; IS__CGSCC_OPM: attributes #[[ATTR1]] = { argmemonly nofree norecurse nosync nounwind uwtable willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR2]] = { argmemonly nofree norecurse nounwind uwtable willreturn } ; IS__CGSCC_OPM: attributes #[[ATTR2]] = { argmemonly nofree norecurse nounwind uwtable willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR3]] = { noinline nosync nounwind uwtable } ; IS__CGSCC_OPM: attributes #[[ATTR3]] = { noinline nosync nounwind uwtable }
; IS__CGSCC_OPM: attributes #[[ATTR4]] = { noinline nounwind uwtable } ; IS__CGSCC_OPM: attributes #[[ATTR4]] = { noinline nounwind uwtable }
; IS__CGSCC_OPM: attributes #[[ATTR5]] = { argmemonly nofree noinline nounwind uwtable } ; IS__CGSCC_OPM: attributes #[[ATTR5]] = { argmemonly nofree noinline nounwind uwtable }
; IS__CGSCC_OPM: attributes #[[ATTR6]] = { nofree norecurse nounwind willreturn } ; IS__CGSCC_OPM: attributes #[[ATTR6]] = { argmemonly nofree noinline norecurse nounwind uwtable }
; IS__CGSCC_OPM: attributes #[[ATTR7]] = { nofree norecurse nounwind } ; IS__CGSCC_OPM: attributes #[[ATTR7]] = { nofree norecurse nounwind willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR8]] = { nofree norecurse nosync nounwind willreturn } ; IS__CGSCC_OPM: attributes #[[ATTR8]] = { nofree norecurse nounwind }
; IS__CGSCC_OPM: attributes #[[ATTR9]] = { nofree norecurse nosync nounwind } ; IS__CGSCC_OPM: attributes #[[ATTR9]] = { nofree norecurse nosync nounwind willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR10]] = { argmemonly nofree nounwind willreturn } ; IS__CGSCC_OPM: attributes #[[ATTR10]] = { nofree norecurse nosync nounwind }
; IS__CGSCC_OPM: attributes #[[ATTR11]] = { argmemonly nofree nosync nounwind willreturn writeonly } ; IS__CGSCC_OPM: attributes #[[ATTR11]] = { argmemonly nofree nounwind willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR12:[0-9]+]] = { convergent readnone } ; IS__CGSCC_OPM: attributes #[[ATTR12]] = { argmemonly nofree nosync nounwind willreturn writeonly }
; IS__CGSCC_OPM: attributes #[[ATTR13]] = { readnone } ; IS__CGSCC_OPM: attributes #[[ATTR13:[0-9]+]] = { convergent readnone }
; IS__CGSCC_OPM: attributes #[[ATTR14]] = { nounwind } ; IS__CGSCC_OPM: attributes #[[ATTR14]] = { readnone }
; IS__CGSCC_OPM: attributes #[[ATTR15]] = { nofree norecurse nosync nounwind readnone willreturn } ; IS__CGSCC_OPM: attributes #[[ATTR15]] = { nounwind }
; IS__CGSCC_OPM: attributes #[[ATTR16]] = { nofree nosync nounwind readnone willreturn } ; IS__CGSCC_OPM: attributes #[[ATTR16]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR17:[0-9]+]] = { argmemonly nofree nounwind willreturn writeonly } ; IS__CGSCC_OPM: attributes #[[ATTR17]] = { nofree nosync nounwind readnone willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR18:[0-9]+]] = { nofree nosync nounwind readnone speculatable willreturn } ; IS__CGSCC_OPM: attributes #[[ATTR18:[0-9]+]] = { argmemonly nofree nounwind willreturn writeonly }
; IS__CGSCC_OPM: attributes #[[ATTR19]] = { nofree nounwind } ; IS__CGSCC_OPM: attributes #[[ATTR19:[0-9]+]] = { nofree nosync nounwind readnone speculatable willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR20]] = { nounwind willreturn } ; IS__CGSCC_OPM: attributes #[[ATTR20]] = { nounwind willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR21]] = { willreturn } ; IS__CGSCC_OPM: attributes #[[ATTR21]] = { nofree nounwind }
; IS__CGSCC_OPM: attributes #[[ATTR22]] = { willreturn writeonly } ; IS__CGSCC_OPM: attributes #[[ATTR22]] = { willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR23]] = { readnone willreturn } ; IS__CGSCC_OPM: attributes #[[ATTR23]] = { willreturn writeonly }
;. ; IS__CGSCC_OPM: attributes #[[ATTR24]] = { readnone willreturn }
; IS__CGSCC_NPM: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind optsize readnone ssp uwtable willreturn }
; IS__CGSCC_NPM: attributes #[[ATTR1]] = { argmemonly nofree norecurse nosync nounwind uwtable willreturn }
; IS__CGSCC_NPM: attributes #[[ATTR2]] = { argmemonly nofree norecurse nounwind uwtable willreturn }
; IS__CGSCC_NPM: attributes #[[ATTR3]] = { noinline nosync nounwind uwtable }
; IS__CGSCC_NPM: attributes #[[ATTR4]] = { noinline nounwind uwtable }
; IS__CGSCC_NPM: attributes #[[ATTR5]] = { argmemonly nofree noinline nounwind uwtable }
; IS__CGSCC_NPM: attributes #[[ATTR6]] = { nofree norecurse nounwind willreturn }
; IS__CGSCC_NPM: attributes #[[ATTR7]] = { nofree norecurse nounwind }
; IS__CGSCC_NPM: attributes #[[ATTR8]] = { nofree norecurse nosync nounwind willreturn }
; IS__CGSCC_NPM: attributes #[[ATTR9]] = { nofree norecurse nosync nounwind }
; IS__CGSCC_NPM: attributes #[[ATTR10]] = { argmemonly nofree nounwind willreturn }
; IS__CGSCC_NPM: attributes #[[ATTR11]] = { argmemonly nofree nosync nounwind willreturn writeonly }
; IS__CGSCC_NPM: attributes #[[ATTR12:[0-9]+]] = { convergent readnone }
; IS__CGSCC_NPM: attributes #[[ATTR13]] = { readnone }
; IS__CGSCC_NPM: attributes #[[ATTR14]] = { nounwind }
; IS__CGSCC_NPM: attributes #[[ATTR15]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__CGSCC_NPM: attributes #[[ATTR16]] = { nofree nosync nounwind readnone willreturn }
; IS__CGSCC_NPM: attributes #[[ATTR17:[0-9]+]] = { argmemonly nofree nounwind willreturn writeonly }
; IS__CGSCC_NPM: attributes #[[ATTR18:[0-9]+]] = { nofree nosync nounwind readnone speculatable willreturn }
; IS__CGSCC_NPM: attributes #[[ATTR19]] = { nofree nounwind }
; IS__CGSCC_NPM: attributes #[[ATTR20]] = { willreturn }
; IS__CGSCC_NPM: attributes #[[ATTR21]] = { willreturn writeonly }
; IS__CGSCC_NPM: attributes #[[ATTR22]] = { readnone willreturn }
;. ;.

llvm/test/Transforms/Attributor/nounwind.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals
; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM ; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM
; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM ; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM
; TEST 1 ; TEST 1
define i32 @foo1() { define i32 @foo1() {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@foo1 ; CHECK-LABEL: define {{[^@]+}}@foo1
; IS__TUNIT____-SAME: () #[[ATTR0:[0-9]+]] { ; CHECK-SAME: () #[[ATTR0:[0-9]+]] {
; IS__TUNIT____-NEXT: ret i32 1 ; CHECK-NEXT: ret i32 1
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@foo1
; IS__CGSCC____-SAME: () #[[ATTR0:[0-9]+]] {
; IS__CGSCC____-NEXT: ret i32 1
; ;
ret i32 1 ret i32 1
} }
; TEST 2 ; TEST 2
define i32 @scc1_foo() { define i32 @scc1_foo() {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@scc1_foo ; CHECK-LABEL: define {{[^@]+}}@scc1_foo
; IS__TUNIT____-SAME: () #[[ATTR0]] { ; CHECK-SAME: () #[[ATTR0]] {
; IS__TUNIT____-NEXT: ret i32 1 ; CHECK-NEXT: ret i32 1
;
; IS__CGSCC_OPM: Function Attrs: nofree nosync nounwind readnone willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@scc1_foo
; IS__CGSCC_OPM-SAME: () #[[ATTR1:[0-9]+]] {
; IS__CGSCC_OPM-NEXT: ret i32 1
;
; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@scc1_foo
; IS__CGSCC_NPM-SAME: () #[[ATTR0]] {
; IS__CGSCC_NPM-NEXT: ret i32 1
; ;
%1 = call i32 @scc1_bar() %1 = call i32 @scc1_bar()
ret i32 1 ret i32 1
} }
; TEST 3 ; TEST 3
define i32 @scc1_bar() { define i32 @scc1_bar() {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@scc1_bar ; CHECK-LABEL: define {{[^@]+}}@scc1_bar
; IS__TUNIT____-SAME: () #[[ATTR0]] { ; CHECK-SAME: () #[[ATTR0]] {
; IS__TUNIT____-NEXT: ret i32 1 ; CHECK-NEXT: ret i32 1
;
; IS__CGSCC_OPM: Function Attrs: nofree nosync nounwind readnone willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@scc1_bar
; IS__CGSCC_OPM-SAME: () #[[ATTR1]] {
; IS__CGSCC_OPM-NEXT: ret i32 1
;
; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@scc1_bar
; IS__CGSCC_NPM-SAME: () #[[ATTR0]] {
; IS__CGSCC_NPM-NEXT: ret i32 1
; ;
%1 = call i32 @scc1_foo() %1 = call i32 @scc1_foo()
ret i32 1 ret i32 1
} }
declare i32 @non_nounwind() declare i32 @non_nounwind()
; TEST 4 ; TEST 4
▲ Show 20 Lines • Show All 85 Lines • ▼ Show 20 Lines
declare i32 @__gxx_personality_v0(...) declare i32 @__gxx_personality_v0(...)
declare i8* @__cxa_begin_catch(i8*) declare i8* @__cxa_begin_catch(i8*)
declare void @__cxa_end_catch() declare void @__cxa_end_catch()
;. ;.
; IS__TUNIT____: attributes #[[ATTR0]] = { nofree nosync nounwind readnone willreturn } ; CHECK: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn }
;.
; IS__CGSCC_OPM: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR1]] = { nofree nosync nounwind readnone willreturn }
;.
; IS__CGSCC_NPM: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn }
;. ;.

llvm/test/Transforms/Attributor/openmp_parallel.ll

Show All 39 Lines
; IS__TUNIT_NPM-NEXT: [[A_ADDR:%.*]] = alloca float*, align 8 ; IS__TUNIT_NPM-NEXT: [[A_ADDR:%.*]] = alloca float*, align 8
; IS__TUNIT_NPM-NEXT: [[B_ADDR:%.*]] = alloca float*, align 8 ; IS__TUNIT_NPM-NEXT: [[B_ADDR:%.*]] = alloca float*, align 8
; IS__TUNIT_NPM-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 ; IS__TUNIT_NPM-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
; IS__TUNIT_NPM-NEXT: store float* [[A]], float** [[A_ADDR]], align 8 ; IS__TUNIT_NPM-NEXT: store float* [[A]], float** [[A_ADDR]], align 8
; IS__TUNIT_NPM-NEXT: store float* [[B]], float** [[B_ADDR]], align 8 ; IS__TUNIT_NPM-NEXT: store float* [[B]], float** [[B_ADDR]], align 8
; IS__TUNIT_NPM-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* noundef nonnull align 8 dereferenceable(24) @[[GLOB2]], i32 noundef 3, void (i32*, i32*, ...)* noundef bitcast (void (i32*, i32*, i32*, float**, float**)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* noalias nocapture nofree nonnull readnone align 4 dereferenceable(4) undef, float** noalias nocapture nofree noundef nonnull readonly align 8 dereferenceable(8) [[A_ADDR]], float** noalias nocapture nofree noundef nonnull readonly align 8 dereferenceable(8) [[B_ADDR]]) ; IS__TUNIT_NPM-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* noundef nonnull align 8 dereferenceable(24) @[[GLOB2]], i32 noundef 3, void (i32*, i32*, ...)* noundef bitcast (void (i32*, i32*, i32*, float**, float**)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* noalias nocapture nofree nonnull readnone align 4 dereferenceable(4) undef, float** noalias nocapture nofree noundef nonnull readonly align 8 dereferenceable(8) [[A_ADDR]], float** noalias nocapture nofree noundef nonnull readonly align 8 dereferenceable(8) [[B_ADDR]])
; IS__TUNIT_NPM-NEXT: ret void ; IS__TUNIT_NPM-NEXT: ret void
; ;
; IS__CGSCC_OPM: Function Attrs: nounwind uwtable ; IS__CGSCC_OPM: Function Attrs: norecurse nounwind uwtable
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@func ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@func
; IS__CGSCC_OPM-SAME: (float* nocapture nofree [[A:%.*]], float* nofree [[B:%.*]], i32 [[N:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] { ; IS__CGSCC_OPM-SAME: (float* nocapture nofree [[A:%.*]], float* nofree [[B:%.*]], i32 [[N:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] {
; IS__CGSCC_OPM-NEXT: entry: ; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: [[A_ADDR:%.*]] = alloca float*, align 8 ; IS__CGSCC_OPM-NEXT: [[A_ADDR:%.*]] = alloca float*, align 8
; IS__CGSCC_OPM-NEXT: [[B_ADDR:%.*]] = alloca float*, align 8 ; IS__CGSCC_OPM-NEXT: [[B_ADDR:%.*]] = alloca float*, align 8
; IS__CGSCC_OPM-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 ; IS__CGSCC_OPM-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
; IS__CGSCC_OPM-NEXT: store float* [[A]], float** [[A_ADDR]], align 8 ; IS__CGSCC_OPM-NEXT: store float* [[A]], float** [[A_ADDR]], align 8
; IS__CGSCC_OPM-NEXT: store float* [[B]], float** [[B_ADDR]], align 8 ; IS__CGSCC_OPM-NEXT: store float* [[B]], float** [[B_ADDR]], align 8
; IS__CGSCC_OPM-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* noundef nonnull align 8 dereferenceable(24) @[[GLOB2]], i32 noundef 3, void (i32*, i32*, ...)* noundef bitcast (void (i32*, i32*, i32*, float**, float**)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* noalias nocapture nofree noundef nonnull readnone align 4 dereferenceable(4) [[N_ADDR]], float** nocapture nofree noundef nonnull readonly align 8 dereferenceable(8) [[A_ADDR]], float** nocapture nofree noundef nonnull readonly align 8 dereferenceable(8) [[B_ADDR]]) ; IS__CGSCC_OPM-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* noundef nonnull align 8 dereferenceable(24) @[[GLOB2]], i32 noundef 3, void (i32*, i32*, ...)* noundef bitcast (void (i32*, i32*, i32*, float**, float**)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* noalias nocapture nofree noundef nonnull readnone align 4 dereferenceable(4) [[N_ADDR]], float** nocapture nofree noundef nonnull readonly align 8 dereferenceable(8) [[A_ADDR]], float** nocapture nofree noundef nonnull readonly align 8 dereferenceable(8) [[B_ADDR]])
; IS__CGSCC_OPM-NEXT: ret void ; IS__CGSCC_OPM-NEXT: ret void
; ;
; IS__CGSCC_NPM: Function Attrs: nounwind uwtable ; IS__CGSCC_NPM: Function Attrs: norecurse nounwind uwtable
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@func ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@func
; IS__CGSCC_NPM-SAME: (float* nocapture nofree [[A:%.*]], float* nofree [[B:%.*]], i32 [[N:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] { ; IS__CGSCC_NPM-SAME: (float* nocapture nofree [[A:%.*]], float* nofree [[B:%.*]], i32 [[N:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] {
; IS__CGSCC_NPM-NEXT: entry: ; IS__CGSCC_NPM-NEXT: entry:
; IS__CGSCC_NPM-NEXT: [[A_ADDR:%.*]] = alloca float*, align 8 ; IS__CGSCC_NPM-NEXT: [[A_ADDR:%.*]] = alloca float*, align 8
; IS__CGSCC_NPM-NEXT: [[B_ADDR:%.*]] = alloca float*, align 8 ; IS__CGSCC_NPM-NEXT: [[B_ADDR:%.*]] = alloca float*, align 8
; IS__CGSCC_NPM-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 ; IS__CGSCC_NPM-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
; IS__CGSCC_NPM-NEXT: store float* [[A]], float** [[A_ADDR]], align 8 ; IS__CGSCC_NPM-NEXT: store float* [[A]], float** [[A_ADDR]], align 8
; IS__CGSCC_NPM-NEXT: store float* [[B]], float** [[B_ADDR]], align 8 ; IS__CGSCC_NPM-NEXT: store float* [[B]], float** [[B_ADDR]], align 8
▲ Show 20 Lines • Show All 210 Lines • ▼ Show 20 Lines
attributes #2 = { nounwind } attributes #2 = { nounwind }
!llvm.module.flags = !{!0} !llvm.module.flags = !{!0}
!0 = !{i32 7, !"openmp", i32 50} !0 = !{i32 7, !"openmp", i32 50}
!1 = !{!2} !1 = !{!2}
!2 = !{i64 2, i64 -1, i64 -1, i1 true} !2 = !{i64 2, i64 -1, i64 -1, i1 true}
;. ;.
; CHECK: attributes #[[ATTR0:[0-9]+]] = { nounwind uwtable } ; IS__TUNIT____: attributes #[[ATTR0:[0-9]+]] = { nounwind uwtable }
; CHECK: attributes #[[ATTR1:[0-9]+]] = { alwaysinline nofree norecurse nounwind uwtable } ; IS__TUNIT____: attributes #[[ATTR1:[0-9]+]] = { alwaysinline nofree norecurse nounwind uwtable }
; CHECK: attributes #[[ATTR2:[0-9]+]] = { argmemonly nofree nosync nounwind willreturn } ; IS__TUNIT____: attributes #[[ATTR2:[0-9]+]] = { argmemonly nofree nosync nounwind willreturn }
;.
; IS__CGSCC____: attributes #[[ATTR0:[0-9]+]] = { norecurse nounwind uwtable }
; IS__CGSCC____: attributes #[[ATTR1:[0-9]+]] = { alwaysinline nofree norecurse nounwind uwtable }
; IS__CGSCC____: attributes #[[ATTR2:[0-9]+]] = { argmemonly nofree nosync nounwind willreturn }
;. ;.
; CHECK: [[META0:![0-9]+]] = !{i32 7, !"openmp", i32 50} ; CHECK: [[META0:![0-9]+]] = !{i32 7, !"openmp", i32 50}
; CHECK: [[META1:![0-9]+]] = !{!2} ; CHECK: [[META1:![0-9]+]] = !{!2}
; CHECK: [[META2:![0-9]+]] = !{i64 2, i64 -1, i64 -1, i1 true} ; CHECK: [[META2:![0-9]+]] = !{i64 2, i64 -1, i64 -1, i1 true}
;. ;.

llvm/test/Transforms/Attributor/potential.ll

Show All 15 Lines
; IS__CGSCC____-SAME: () #[[ATTR0:[0-9]+]] { ; IS__CGSCC____-SAME: () #[[ATTR0:[0-9]+]] {
; IS__CGSCC____-NEXT: ret i1 undef ; IS__CGSCC____-NEXT: ret i1 undef
; ;
%cmp = icmp eq i32 %c, 0 %cmp = icmp eq i32 %c, 0
ret i1 %cmp ret i1 %cmp
} }
define i1 @potential_test1(i1 %c) { define i1 @potential_test1(i1 %c) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@potential_test1 ; CHECK-LABEL: define {{[^@]+}}@potential_test1
; IS__TUNIT____-SAME: (i1 [[C:%.*]]) #[[ATTR0:[0-9]+]] { ; CHECK-SAME: (i1 [[C:%.*]]) #[[ATTR0:[0-9]+]] {
; IS__TUNIT____-NEXT: ret i1 false ; CHECK-NEXT: ret i1 false
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@potential_test1
; IS__CGSCC____-SAME: (i1 [[C:%.*]]) #[[ATTR0]] {
; IS__CGSCC____-NEXT: ret i1 false
; ;
%arg = select i1 %c, i32 -1, i32 1 %arg = select i1 %c, i32 -1, i32 1
%ret = call i1 @iszero1(i32 %arg) %ret = call i1 @iszero1(i32 %arg)
ret i1 %ret ret i1 %ret
} }
; potential-test 2 ; potential-test 2
Show All 14 Lines;
%ret = zext i1 %cmp to i32 %ret = zext i1 %cmp to i32
ret i32 %ret ret i32 %ret
} }
define internal i32 @call_with_two_values(i32 %c) { define internal i32 @call_with_two_values(i32 %c) {
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@call_with_two_values ; IS__CGSCC____-LABEL: define {{[^@]+}}@call_with_two_values
; IS__CGSCC____-SAME: () #[[ATTR0]] { ; IS__CGSCC____-SAME: () #[[ATTR0]] {
; IS__CGSCC____-NEXT: [[RET:%.*]] = add i32 0, 0
; IS__CGSCC____-NEXT: ret i32 undef ; IS__CGSCC____-NEXT: ret i32 undef
; ;
%csret1 = call i32 @iszero2(i32 %c) %csret1 = call i32 @iszero2(i32 %c)
%minusc = sub i32 0, %c %minusc = sub i32 0, %c
%csret2 = call i32 @iszero2(i32 %minusc) %csret2 = call i32 @iszero2(i32 %minusc)
%ret = add i32 %csret1, %csret2 %ret = add i32 %csret1, %csret2
ret i32 %ret ret i32 %ret
} }
define i32 @potential_test2(i1 %c) { define i32 @potential_test2(i1 %c) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@potential_test2 ; CHECK-LABEL: define {{[^@]+}}@potential_test2
; IS__TUNIT____-SAME: (i1 [[C:%.*]]) #[[ATTR0]] { ; CHECK-SAME: (i1 [[C:%.*]]) #[[ATTR0]] {
; IS__TUNIT____-NEXT: ret i32 0 ; CHECK-NEXT: ret i32 0
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@potential_test2
; IS__CGSCC____-SAME: (i1 [[C:%.*]]) #[[ATTR0]] {
; IS__CGSCC____-NEXT: ret i32 0
; ;
%csret1 = call i32 @call_with_two_values(i32 1) %csret1 = call i32 @call_with_two_values(i32 1)
%csret2 = call i32 @call_with_two_values(i32 -1) %csret2 = call i32 @call_with_two_values(i32 -1)
%ret = add i32 %csret1, %csret2 %ret = add i32 %csret1, %csret2
ret i32 %ret ret i32 %ret
} }
Show All 18 Lines;
%cmp = icmp eq i32 %c, 0 %cmp = icmp eq i32 %c, 0
%ret = zext i1 %cmp to i32 %ret = zext i1 %cmp to i32
ret i32 %ret ret i32 %ret
} }
define internal i32 @less_than_two(i32 %c) { define internal i32 @less_than_two(i32 %c) {
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@less_than_two ; IS__CGSCC____-LABEL: define {{[^@]+}}@less_than_two
; IS__CGSCC____-SAME: (i32 [[C:%.*]]) #[[ATTR0]] { ; IS__CGSCC____-SAME: () #[[ATTR0]] {
; IS__CGSCC____-NEXT: [[CMP:%.*]] = icmp slt i32 undef, 2
; IS__CGSCC____-NEXT: [[RET:%.*]] = zext i1 true to i32
; IS__CGSCC____-NEXT: ret i32 undef ; IS__CGSCC____-NEXT: ret i32 undef
; ;
%cmp = icmp slt i32 %c, 2 %cmp = icmp slt i32 %c, 2
%ret = zext i1 %cmp to i32 %ret = zext i1 %cmp to i32
ret i32 %ret ret i32 %ret
} }
define i32 @potential_test3() { define i32 @potential_test3() {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@potential_test3 ; CHECK-LABEL: define {{[^@]+}}@potential_test3
; IS__TUNIT____-SAME: () #[[ATTR0]] { ; CHECK-SAME: () #[[ATTR0]] {
; IS__TUNIT____-NEXT: ret i32 2 ; CHECK-NEXT: ret i32 2
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@potential_test3
; IS__CGSCC____-SAME: () #[[ATTR0]] {
; IS__CGSCC____-NEXT: ret i32 2
; ;
%cmp1 = call i32 @iszero3(i32 0) %cmp1 = call i32 @iszero3(i32 0)
%true1 = call i32 @less_than_two(i32 %cmp1) %true1 = call i32 @less_than_two(i32 %cmp1)
%cmp2 = call i32 @iszero3(i32 1) %cmp2 = call i32 @iszero3(i32 1)
%true2 = call i32 @less_than_two(i32 %cmp2) %true2 = call i32 @less_than_two(i32 %cmp2)
%ret = add i32 %true1, %true2 %ret = add i32 %true1, %true2
ret i32 %ret ret i32 %ret
} }
; potential-test 4,5 ; potential-test 4,5
; ;
; simplified ; simplified
; int potential_test4(int c) { return return1or3(c) == 2; } ; int potential_test4(int c) { return return1or3(c) == 2; }
; int potential_test5(int c) { return return1or3(c) == return2or4(c); } ; int potential_test5(int c) { return return1or3(c) == return2or4(c); }
; ;
; not simplified ; not simplified
; int potential_test6(int c) { return return1or3(c) == 3; } ; int potential_test6(int c) { return return1or3(c) == 3; }
; int potential_test7(int c) { return return1or3(c) == return3or4(c); } ; int potential_test7(int c) { return return1or3(c) == return3or4(c); }
define i32 @potential_test4(i32 %c) { define i32 @potential_test4(i32 %c) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@potential_test4 ; CHECK-LABEL: define {{[^@]+}}@potential_test4
; IS__TUNIT____-SAME: (i32 [[C:%.*]]) #[[ATTR0]] { ; CHECK-SAME: (i32 [[C:%.*]]) #[[ATTR0]] {
; IS__TUNIT____-NEXT: ret i32 0 ; CHECK-NEXT: ret i32 0
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@potential_test4
; IS__CGSCC____-SAME: (i32 [[C:%.*]]) #[[ATTR0]] {
; IS__CGSCC____-NEXT: ret i32 0
; ;
%csret = call i32 @return1or3(i32 %c) %csret = call i32 @return1or3(i32 %c)
%false = icmp eq i32 %csret, 2 %false = icmp eq i32 %csret, 2
%ret = zext i1 %false to i32 %ret = zext i1 %false to i32
ret i32 %ret ret i32 %ret
} }
define i32 @potential_test5(i32 %c) { define i32 @potential_test5(i32 %c) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@potential_test5 ; CHECK-LABEL: define {{[^@]+}}@potential_test5
; IS__TUNIT____-SAME: (i32 [[C:%.*]]) #[[ATTR0]] { ; CHECK-SAME: (i32 [[C:%.*]]) #[[ATTR0]] {
; IS__TUNIT____-NEXT: ret i32 0 ; CHECK-NEXT: ret i32 0
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@potential_test5
; IS__CGSCC____-SAME: (i32 [[C:%.*]]) #[[ATTR0]] {
; IS__CGSCC____-NEXT: ret i32 0
; ;
%csret1 = call i32 @return1or3(i32 %c) %csret1 = call i32 @return1or3(i32 %c)
%csret2 = call i32 @return2or4(i32 %c) %csret2 = call i32 @return2or4(i32 %c)
%false = icmp eq i32 %csret1, %csret2 %false = icmp eq i32 %csret1, %csret2
%ret = zext i1 %false to i32 %ret = zext i1 %false to i32
ret i32 %ret ret i32 %ret
} }
define i1 @potential_test6(i32 %c) { define i1 @potential_test6(i32 %c) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; IS________OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@potential_test6 ; IS________OPM-LABEL: define {{[^@]+}}@potential_test6
; IS__TUNIT____-SAME: (i32 [[C:%.*]]) #[[ATTR0]] { ; IS________OPM-SAME: (i32 [[C:%.*]]) #[[ATTR0]] {
; IS__TUNIT____-NEXT: [[CSRET1:%.*]] = call i32 @return1or3(i32 [[C]]) #[[ATTR0]], !range [[RNG0:![0-9]+]] ; IS________OPM-NEXT: [[CSRET1:%.*]] = call i32 @return1or3(i32 [[C]]) #[[ATTR2:[0-9]+]], !range [[RNG0:![0-9]+]]
; IS__TUNIT____-NEXT: [[RET:%.*]] = icmp eq i32 [[CSRET1]], 3 ; IS________OPM-NEXT: [[RET:%.*]] = icmp eq i32 [[CSRET1]], 3
; IS__TUNIT____-NEXT: ret i1 [[RET]] ; IS________OPM-NEXT: ret i1 [[RET]]
; ;
; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS________NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@potential_test6 ; IS________NPM-LABEL: define {{[^@]+}}@potential_test6
; IS__CGSCC_OPM-SAME: (i32 [[C:%.*]]) #[[ATTR0]] { ; IS________NPM-SAME: (i32 [[C:%.*]]) #[[ATTR0]] {
; IS__CGSCC_OPM-NEXT: [[CSRET1:%.*]] = call i32 @return1or3(i32 [[C]]) #[[ATTR2:[0-9]+]], !range [[RNG0:![0-9]+]] ; IS________NPM-NEXT: [[CSRET1:%.*]] = call i32 @return1or3(i32 [[C]]) #[[ATTR1:[0-9]+]], !range [[RNG0:![0-9]+]]
; IS__CGSCC_OPM-NEXT: [[RET:%.*]] = icmp eq i32 [[CSRET1]], 3 ; IS________NPM-NEXT: [[RET:%.*]] = icmp eq i32 [[CSRET1]], 3
; IS__CGSCC_OPM-NEXT: ret i1 [[RET]] ; IS________NPM-NEXT: ret i1 [[RET]]
;
; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@potential_test6
; IS__CGSCC_NPM-SAME: (i32 [[C:%.*]]) #[[ATTR0]] {
; IS__CGSCC_NPM-NEXT: [[CSRET1:%.*]] = call i32 @return1or3(i32 [[C]]) #[[ATTR1:[0-9]+]], !range [[RNG0:![0-9]+]]
; IS__CGSCC_NPM-NEXT: [[RET:%.*]] = icmp eq i32 [[CSRET1]], 3
; IS__CGSCC_NPM-NEXT: ret i1 [[RET]]
; ;
%csret1 = call i32 @return1or3(i32 %c) %csret1 = call i32 @return1or3(i32 %c)
%ret = icmp eq i32 %csret1, 3 %ret = icmp eq i32 %csret1, 3
ret i1 %ret ret i1 %ret
} }
define i1 @potential_test7(i32 %c) { define i1 @potential_test7(i32 %c) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@potential_test7 ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@potential_test7
; IS__TUNIT____-SAME: (i32 [[C:%.*]]) #[[ATTR0]] { ; IS__TUNIT_OPM-SAME: (i32 [[C:%.*]]) #[[ATTR0]] {
; IS__TUNIT____-NEXT: [[CSRET1:%.*]] = call i32 @return1or3(i32 [[C]]) #[[ATTR0]], !range [[RNG0]] ; IS__TUNIT_OPM-NEXT: [[CSRET1:%.*]] = call i32 @return1or3(i32 [[C]]) #[[ATTR2]], !range [[RNG0]]
; IS__TUNIT____-NEXT: [[CSRET2:%.*]] = call i32 @return3or4(i32 [[C]]) #[[ATTR0]], !range [[RNG1:![0-9]+]] ; IS__TUNIT_OPM-NEXT: [[CSRET2:%.*]] = call i32 @return3or4(i32 [[C]]) #[[ATTR2]], !range [[RNG1:![0-9]+]]
; IS__TUNIT____-NEXT: [[RET:%.*]] = icmp eq i32 [[CSRET1]], [[CSRET2]] ; IS__TUNIT_OPM-NEXT: [[RET:%.*]] = icmp eq i32 [[CSRET1]], [[CSRET2]]
; IS__TUNIT____-NEXT: ret i1 [[RET]] ; IS__TUNIT_OPM-NEXT: ret i1 [[RET]]
;
; IS__TUNIT_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@potential_test7
; IS__TUNIT_NPM-SAME: (i32 [[C:%.*]]) #[[ATTR0]] {
; IS__TUNIT_NPM-NEXT: [[CSRET1:%.*]] = call i32 @return1or3(i32 [[C]]) #[[ATTR1]], !range [[RNG0]]
; IS__TUNIT_NPM-NEXT: [[CSRET2:%.*]] = call i32 @return3or4(i32 [[C]]) #[[ATTR1]], !range [[RNG1:![0-9]+]]
; IS__TUNIT_NPM-NEXT: [[RET:%.*]] = icmp eq i32 [[CSRET1]], [[CSRET2]]
; IS__TUNIT_NPM-NEXT: ret i1 [[RET]]
; ;
; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@potential_test7 ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@potential_test7
; IS__CGSCC_OPM-SAME: (i32 [[C:%.*]]) #[[ATTR0]] { ; IS__CGSCC_OPM-SAME: (i32 [[C:%.*]]) #[[ATTR0]] {
; IS__CGSCC_OPM-NEXT: [[CSRET1:%.*]] = call i32 @return1or3(i32 [[C]]) #[[ATTR2]], !range [[RNG0]] ; IS__CGSCC_OPM-NEXT: [[CSRET1:%.*]] = call i32 @return1or3(i32 [[C]]) #[[ATTR2]], !range [[RNG0]]
; IS__CGSCC_OPM-NEXT: [[CSRET2:%.*]] = call i32 @return3or4(i32 [[C]]) #[[ATTR2]], !range [[RNG1:![0-9]+]] ; IS__CGSCC_OPM-NEXT: [[CSRET2:%.*]] = call i32 @return3or4(i32 [[C]]) #[[ATTR3:[0-9]+]], !range [[RNG1:![0-9]+]]
; IS__CGSCC_OPM-NEXT: [[RET:%.*]] = icmp eq i32 [[CSRET1]], [[CSRET2]] ; IS__CGSCC_OPM-NEXT: [[RET:%.*]] = icmp eq i32 [[CSRET1]], [[CSRET2]]
; IS__CGSCC_OPM-NEXT: ret i1 [[RET]] ; IS__CGSCC_OPM-NEXT: ret i1 [[RET]]
; ;
; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@potential_test7 ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@potential_test7
; IS__CGSCC_NPM-SAME: (i32 [[C:%.*]]) #[[ATTR0]] { ; IS__CGSCC_NPM-SAME: (i32 [[C:%.*]]) #[[ATTR0]] {
; IS__CGSCC_NPM-NEXT: [[CSRET1:%.*]] = call i32 @return1or3(i32 [[C]]) #[[ATTR1]], !range [[RNG0]] ; IS__CGSCC_NPM-NEXT: [[CSRET1:%.*]] = call i32 @return1or3(i32 [[C]]) #[[ATTR1]], !range [[RNG0]]
; IS__CGSCC_NPM-NEXT: [[CSRET2:%.*]] = call i32 @return3or4(i32 [[C]]) #[[ATTR1]], !range [[RNG1:![0-9]+]] ; IS__CGSCC_NPM-NEXT: [[CSRET2:%.*]] = call i32 @return3or4(i32 [[C]]) #[[ATTR2:[0-9]+]], !range [[RNG1:![0-9]+]]
; IS__CGSCC_NPM-NEXT: [[RET:%.*]] = icmp eq i32 [[CSRET1]], [[CSRET2]] ; IS__CGSCC_NPM-NEXT: [[RET:%.*]] = icmp eq i32 [[CSRET1]], [[CSRET2]]
; IS__CGSCC_NPM-NEXT: ret i1 [[RET]] ; IS__CGSCC_NPM-NEXT: ret i1 [[RET]]
; ;
%csret1 = call i32 @return1or3(i32 %c) %csret1 = call i32 @return1or3(i32 %c)
%csret2 = call i32 @return3or4(i32 %c) %csret2 = call i32 @return3or4(i32 %c)
%ret = icmp eq i32 %csret1, %csret2 %ret = icmp eq i32 %csret1, %csret2
ret i1 %ret ret i1 %ret
} }
define internal i32 @return1or3(i32 %c) { define internal i32 @return1or3(i32 %c) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@return1or3 ; CHECK-LABEL: define {{[^@]+}}@return1or3
; IS__TUNIT____-SAME: (i32 [[C:%.*]]) #[[ATTR0]] { ; CHECK-SAME: (i32 [[C:%.*]]) #[[ATTR0]] {
; IS__TUNIT____-NEXT: [[CMP:%.*]] = icmp eq i32 [[C]], 0 ; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[C]], 0
; IS__TUNIT____-NEXT: [[RET:%.*]] = select i1 [[CMP]], i32 1, i32 3 ; CHECK-NEXT: [[RET:%.*]] = select i1 [[CMP]], i32 1, i32 3
; IS__TUNIT____-NEXT: ret i32 [[RET]] ; CHECK-NEXT: ret i32 [[RET]]
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@return1or3
; IS__CGSCC____-SAME: (i32 [[C:%.*]]) #[[ATTR0]] {
; IS__CGSCC____-NEXT: [[CMP:%.*]] = icmp eq i32 [[C]], 0
; IS__CGSCC____-NEXT: [[RET:%.*]] = select i1 [[CMP]], i32 1, i32 3
; IS__CGSCC____-NEXT: ret i32 [[RET]]
; ;
%cmp = icmp eq i32 %c, 0 %cmp = icmp eq i32 %c, 0
%ret = select i1 %cmp, i32 1, i32 3 %ret = select i1 %cmp, i32 1, i32 3
ret i32 %ret ret i32 %ret
} }
define internal i32 @return2or4(i32 %c) { define internal i32 @return2or4(i32 %c) {
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@return2or4 ; IS__CGSCC____-LABEL: define {{[^@]+}}@return2or4
; IS__CGSCC____-SAME: (i32 [[C:%.*]]) #[[ATTR0]] { ; IS__CGSCC____-SAME: (i32 [[C:%.*]]) #[[ATTR0]] {
; IS__CGSCC____-NEXT: [[CMP:%.*]] = icmp eq i32 undef, 0 ; IS__CGSCC____-NEXT: [[CMP:%.*]] = icmp eq i32 undef, 0
; IS__CGSCC____-NEXT: [[RET:%.*]] = select i1 undef, i32 2, i32 4 ; IS__CGSCC____-NEXT: [[RET:%.*]] = select i1 undef, i32 2, i32 4
; IS__CGSCC____-NEXT: ret i32 undef ; IS__CGSCC____-NEXT: ret i32 undef
; ;
%cmp = icmp eq i32 %c, 0 %cmp = icmp eq i32 %c, 0
%ret = select i1 %cmp, i32 2, i32 4 %ret = select i1 %cmp, i32 2, i32 4
ret i32 %ret ret i32 %ret
} }
define internal i32 @return3or4(i32 %c) { define internal i32 @return3or4(i32 %c) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@return3or4 ; CHECK-LABEL: define {{[^@]+}}@return3or4
; IS__TUNIT____-SAME: (i32 [[C:%.*]]) #[[ATTR0]] { ; CHECK-SAME: (i32 [[C:%.*]]) #[[ATTR0]] {
; IS__TUNIT____-NEXT: [[CMP:%.*]] = icmp eq i32 [[C]], 0 ; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[C]], 0
; IS__TUNIT____-NEXT: [[RET:%.*]] = select i1 [[CMP]], i32 3, i32 4 ; CHECK-NEXT: [[RET:%.*]] = select i1 [[CMP]], i32 3, i32 4
; IS__TUNIT____-NEXT: ret i32 [[RET]] ; CHECK-NEXT: ret i32 [[RET]]
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@return3or4
; IS__CGSCC____-SAME: (i32 [[C:%.*]]) #[[ATTR0]] {
; IS__CGSCC____-NEXT: [[CMP:%.*]] = icmp eq i32 [[C]], 0
; IS__CGSCC____-NEXT: [[RET:%.*]] = select i1 [[CMP]], i32 3, i32 4
; IS__CGSCC____-NEXT: ret i32 [[RET]]
; ;
%cmp = icmp eq i32 %c, 0 %cmp = icmp eq i32 %c, 0
%ret = select i1 %cmp, i32 3, i32 4 %ret = select i1 %cmp, i32 3, i32 4
ret i32 %ret ret i32 %ret
} }
; potential-test 8 ; potential-test 8
; ;
Show All 15 Lines
; IS__CGSCC____-SAME: () #[[ATTR0]] { ; IS__CGSCC____-SAME: () #[[ATTR0]] {
; IS__CGSCC____-NEXT: ret i1 undef ; IS__CGSCC____-NEXT: ret i1 undef
; ;
%ret = call i1 @cmp_with_four(i32 %c) %ret = call i1 @cmp_with_four(i32 %c)
ret i1 %ret ret i1 %ret
} }
define i1 @potential_test8() { define i1 @potential_test8() {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@potential_test8 ; CHECK-LABEL: define {{[^@]+}}@potential_test8
; IS__TUNIT____-SAME: () #[[ATTR0]] { ; CHECK-SAME: () #[[ATTR0]] {
; IS__TUNIT____-NEXT: ret i1 false ; CHECK-NEXT: ret i1 false
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@potential_test8
; IS__CGSCC____-SAME: () #[[ATTR0]] {
; IS__CGSCC____-NEXT: ret i1 false
; ;
%res1 = call i1 @wrapper(i32 1) %res1 = call i1 @wrapper(i32 1)
%res3 = call i1 @wrapper(i32 3) %res3 = call i1 @wrapper(i32 3)
%res5 = call i1 @wrapper(i32 5) %res5 = call i1 @wrapper(i32 5)
%res13 = or i1 %res1, %res3 %res13 = or i1 %res1, %res3
%res135 = or i1 %res13, %res5 %res135 = or i1 %res13, %res5
ret i1 %res135 ret i1 %res135
} }
define i1 @potential_test9() { define i1 @potential_test9() {
; IS__TUNIT_OPM: Function Attrs: nofree nosync nounwind readnone ; IS________OPM: Function Attrs: nofree norecurse nosync nounwind readnone
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@potential_test9 ; IS________OPM-LABEL: define {{[^@]+}}@potential_test9
; IS__TUNIT_OPM-SAME: () #[[ATTR1:[0-9]+]] { ; IS________OPM-SAME: () #[[ATTR1:[0-9]+]] {
; IS__TUNIT_OPM-NEXT: entry: ; IS________OPM-NEXT: entry:
; IS__TUNIT_OPM-NEXT: br label [[COND:%.*]] ; IS________OPM-NEXT: br label [[COND:%.*]]
; IS__TUNIT_OPM: cond: ; IS________OPM: cond:
; IS__TUNIT_OPM-NEXT: [[I_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[I_1:%.*]], [[INC:%.*]] ] ; IS________OPM-NEXT: [[I_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[I_1:%.*]], [[INC:%.*]] ]
; IS__TUNIT_OPM-NEXT: [[C_0:%.*]] = phi i32 [ 1, [[ENTRY]] ], [ [[C_1:%.*]], [[INC]] ] ; IS________OPM-NEXT: [[C_0:%.*]] = phi i32 [ 1, [[ENTRY]] ], [ [[C_1:%.*]], [[INC]] ]
; IS__TUNIT_OPM-NEXT: [[CMP:%.*]] = icmp slt i32 [[I_0]], 10 ; IS________OPM-NEXT: [[CMP:%.*]] = icmp slt i32 [[I_0]], 10
; IS__TUNIT_OPM-NEXT: br i1 [[CMP]], label [[BODY:%.*]], label [[END:%.*]] ; IS________OPM-NEXT: br i1 [[CMP]], label [[BODY:%.*]], label [[END:%.*]]
; IS__TUNIT_OPM: body: ; IS________OPM: body:
; IS__TUNIT_OPM-NEXT: [[C_1]] = mul i32 [[C_0]], -1 ; IS________OPM-NEXT: [[C_1]] = mul i32 [[C_0]], -1
; IS__TUNIT_OPM-NEXT: br label [[INC]] ; IS________OPM-NEXT: br label [[INC]]
; IS__TUNIT_OPM: inc: ; IS________OPM: inc:
; IS__TUNIT_OPM-NEXT: [[I_1]] = add i32 [[I_0]], 1 ; IS________OPM-NEXT: [[I_1]] = add i32 [[I_0]], 1
; IS__TUNIT_OPM-NEXT: br label [[COND]] ; IS________OPM-NEXT: br label [[COND]]
; IS__TUNIT_OPM: end: ; IS________OPM: end:
; IS__TUNIT_OPM-NEXT: ret i1 false ; IS________OPM-NEXT: ret i1 false
; ;
; IS__TUNIT_NPM: Function Attrs: nofree nosync nounwind readnone willreturn ; IS________NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@potential_test9 ; IS________NPM-LABEL: define {{[^@]+}}@potential_test9
; IS__TUNIT_NPM-SAME: () #[[ATTR0]] { ; IS________NPM-SAME: () #[[ATTR0]] {
; IS__TUNIT_NPM-NEXT: entry: ; IS________NPM-NEXT: entry:
; IS__TUNIT_NPM-NEXT: br label [[COND:%.*]] ; IS________NPM-NEXT: br label [[COND:%.*]]
; IS__TUNIT_NPM: cond: ; IS________NPM: cond:
; IS__TUNIT_NPM-NEXT: [[I_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[I_1:%.*]], [[INC:%.*]] ] ; IS________NPM-NEXT: [[I_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[I_1:%.*]], [[INC:%.*]] ]
; IS__TUNIT_NPM-NEXT: [[C_0:%.*]] = phi i32 [ 1, [[ENTRY]] ], [ [[C_1:%.*]], [[INC]] ] ; IS________NPM-NEXT: [[C_0:%.*]] = phi i32 [ 1, [[ENTRY]] ], [ [[C_1:%.*]], [[INC]] ]
; IS__TUNIT_NPM-NEXT: [[CMP:%.*]] = icmp slt i32 [[I_0]], 10 ; IS________NPM-NEXT: [[CMP:%.*]] = icmp slt i32 [[I_0]], 10
; IS__TUNIT_NPM-NEXT: br i1 [[CMP]], label [[BODY:%.*]], label [[END:%.*]] ; IS________NPM-NEXT: br i1 [[CMP]], label [[BODY:%.*]], label [[END:%.*]]
; IS__TUNIT_NPM: body: ; IS________NPM: body:
; IS__TUNIT_NPM-NEXT: [[C_1]] = mul i32 [[C_0]], -1 ; IS________NPM-NEXT: [[C_1]] = mul i32 [[C_0]], -1
; IS__TUNIT_NPM-NEXT: br label [[INC]] ; IS________NPM-NEXT: br label [[INC]]
; IS__TUNIT_NPM: inc: ; IS________NPM: inc:
; IS__TUNIT_NPM-NEXT: [[I_1]] = add i32 [[I_0]], 1 ; IS________NPM-NEXT: [[I_1]] = add i32 [[I_0]], 1
; IS__TUNIT_NPM-NEXT: br label [[COND]] ; IS________NPM-NEXT: br label [[COND]]
; IS__TUNIT_NPM: end: ; IS________NPM: end:
; IS__TUNIT_NPM-NEXT: ret i1 false ; IS________NPM-NEXT: ret i1 false
;
; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readnone
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@potential_test9
; IS__CGSCC_OPM-SAME: () #[[ATTR1:[0-9]+]] {
; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: br label [[COND:%.*]]
; IS__CGSCC_OPM: cond:
; IS__CGSCC_OPM-NEXT: [[I_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[I_1:%.*]], [[INC:%.*]] ]
; IS__CGSCC_OPM-NEXT: [[C_0:%.*]] = phi i32 [ 1, [[ENTRY]] ], [ [[C_1:%.*]], [[INC]] ]
; IS__CGSCC_OPM-NEXT: [[CMP:%.*]] = icmp slt i32 [[I_0]], 10
; IS__CGSCC_OPM-NEXT: br i1 [[CMP]], label [[BODY:%.*]], label [[END:%.*]]
; IS__CGSCC_OPM: body:
; IS__CGSCC_OPM-NEXT: [[C_1]] = mul i32 [[C_0]], -1
; IS__CGSCC_OPM-NEXT: br label [[INC]]
; IS__CGSCC_OPM: inc:
; IS__CGSCC_OPM-NEXT: [[I_1]] = add i32 [[I_0]], 1
; IS__CGSCC_OPM-NEXT: br label [[COND]]
; IS__CGSCC_OPM: end:
; IS__CGSCC_OPM-NEXT: ret i1 false
;
; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@potential_test9
; IS__CGSCC_NPM-SAME: () #[[ATTR0]] {
; IS__CGSCC_NPM-NEXT: entry:
; IS__CGSCC_NPM-NEXT: br label [[COND:%.*]]
; IS__CGSCC_NPM: cond:
; IS__CGSCC_NPM-NEXT: [[I_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[I_1:%.*]], [[INC:%.*]] ]
; IS__CGSCC_NPM-NEXT: [[C_0:%.*]] = phi i32 [ 1, [[ENTRY]] ], [ [[C_1:%.*]], [[INC]] ]
; IS__CGSCC_NPM-NEXT: [[CMP:%.*]] = icmp slt i32 [[I_0]], 10
; IS__CGSCC_NPM-NEXT: br i1 [[CMP]], label [[BODY:%.*]], label [[END:%.*]]
; IS__CGSCC_NPM: body:
; IS__CGSCC_NPM-NEXT: [[C_1]] = mul i32 [[C_0]], -1
; IS__CGSCC_NPM-NEXT: br label [[INC]]
; IS__CGSCC_NPM: inc:
; IS__CGSCC_NPM-NEXT: [[I_1]] = add i32 [[I_0]], 1
; IS__CGSCC_NPM-NEXT: br label [[COND]]
; IS__CGSCC_NPM: end:
; IS__CGSCC_NPM-NEXT: ret i1 false
; ;
entry: entry:
br label %cond br label %cond
cond: cond:
%i.0 = phi i32 [0, %entry], [%i.1, %inc] %i.0 = phi i32 [0, %entry], [%i.1, %inc]
%c.0 = phi i32 [1, %entry], [%c.1, %inc] %c.0 = phi i32 [1, %entry], [%c.1, %inc]
%cmp = icmp slt i32 %i.0, 10 %cmp = icmp slt i32 %i.0, 10
br i1 %cmp, label %body, label %end br i1 %cmp, label %body, label %end
Show All 33 Linesa:
ret i32 1 ret i32 1
b: b:
ret i32 -1 ret i32 -1
otherwise: otherwise:
ret i32 undef ret i32 undef
} }
define i1 @potential_test10(i32 %c) { define i1 @potential_test10(i32 %c) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__TUNIT____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@potential_test10 ; IS__TUNIT____-LABEL: define {{[^@]+}}@potential_test10
; IS__TUNIT____-SAME: (i32 [[C:%.*]]) #[[ATTR0]] { ; IS__TUNIT____-SAME: (i32 [[C:%.*]]) #[[ATTR0]] {
; IS__TUNIT____-NEXT: ret i1 false ; IS__TUNIT____-NEXT: ret i1 false
; ;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@potential_test10 ; IS__CGSCC____-LABEL: define {{[^@]+}}@potential_test10
; IS__CGSCC____-SAME: (i32 [[C:%.*]]) #[[ATTR0]] { ; IS__CGSCC____-SAME: (i32 [[C:%.*]]) #[[ATTR0]] {
; IS__CGSCC____-NEXT: [[CMP:%.*]] = icmp eq i32 undef, 0 ; IS__CGSCC____-NEXT: [[CMP:%.*]] = icmp eq i32 undef, 0
; IS__CGSCC____-NEXT: ret i1 false ; IS__CGSCC____-NEXT: ret i1 false
; ;
%ret = call i32 @may_return_undef(i32 %c) %ret = call i32 @may_return_undef(i32 %c)
%cmp = icmp eq i32 %ret, 0 %cmp = icmp eq i32 %ret, 0
ret i1 %cmp ret i1 %cmp
} }
define i32 @optimize_undef_1(i1 %c) { define i32 @optimize_undef_1(i1 %c) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@optimize_undef_1 ; CHECK-LABEL: define {{[^@]+}}@optimize_undef_1
; IS__TUNIT____-SAME: (i1 [[C:%.*]]) #[[ATTR0]] { ; CHECK-SAME: (i1 [[C:%.*]]) #[[ATTR0]] {
; IS__TUNIT____-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]] ; CHECK-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]]
; IS__TUNIT____: t: ; CHECK: t:
; IS__TUNIT____-NEXT: ret i32 0 ; CHECK-NEXT: ret i32 0
; IS__TUNIT____: f: ; CHECK: f:
; IS__TUNIT____-NEXT: ret i32 1 ; CHECK-NEXT: ret i32 1
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@optimize_undef_1
; IS__CGSCC____-SAME: (i1 [[C:%.*]]) #[[ATTR0]] {
; IS__CGSCC____-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]]
; IS__CGSCC____: t:
; IS__CGSCC____-NEXT: ret i32 0
; IS__CGSCC____: f:
; IS__CGSCC____-NEXT: ret i32 1
; ;
br i1 %c, label %t, label %f br i1 %c, label %t, label %f
t: t:
ret i32 0 ret i32 0
f: f:
%undef = add i32 undef, 1 %undef = add i32 undef, 1
ret i32 %undef ret i32 %undef
} }
define i32 @optimize_undef_2(i1 %c) { define i32 @optimize_undef_2(i1 %c) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@optimize_undef_2 ; CHECK-LABEL: define {{[^@]+}}@optimize_undef_2
; IS__TUNIT____-SAME: (i1 [[C:%.*]]) #[[ATTR0]] { ; CHECK-SAME: (i1 [[C:%.*]]) #[[ATTR0]] {
; IS__TUNIT____-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]] ; CHECK-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]]
; IS__TUNIT____: t: ; CHECK: t:
; IS__TUNIT____-NEXT: ret i32 0 ; CHECK-NEXT: ret i32 0
; IS__TUNIT____: f: ; CHECK: f:
; IS__TUNIT____-NEXT: ret i32 -1 ; CHECK-NEXT: ret i32 -1
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@optimize_undef_2
; IS__CGSCC____-SAME: (i1 [[C:%.*]]) #[[ATTR0]] {
; IS__CGSCC____-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]]
; IS__CGSCC____: t:
; IS__CGSCC____-NEXT: ret i32 0
; IS__CGSCC____: f:
; IS__CGSCC____-NEXT: ret i32 -1
; ;
br i1 %c, label %t, label %f br i1 %c, label %t, label %f
t: t:
ret i32 0 ret i32 0
f: f:
%undef = sub i32 undef, 1 %undef = sub i32 undef, 1
ret i32 %undef ret i32 %undef
} }
define i32 @optimize_undef_3(i1 %c) { define i32 @optimize_undef_3(i1 %c) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@optimize_undef_3 ; CHECK-LABEL: define {{[^@]+}}@optimize_undef_3
; IS__TUNIT____-SAME: (i1 [[C:%.*]]) #[[ATTR0]] { ; CHECK-SAME: (i1 [[C:%.*]]) #[[ATTR0]] {
; IS__TUNIT____-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]] ; CHECK-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]]
; IS__TUNIT____: t: ; CHECK: t:
; IS__TUNIT____-NEXT: ret i32 0 ; CHECK-NEXT: ret i32 0
; IS__TUNIT____: f: ; CHECK: f:
; IS__TUNIT____-NEXT: ret i32 1 ; CHECK-NEXT: ret i32 1
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@optimize_undef_3
; IS__CGSCC____-SAME: (i1 [[C:%.*]]) #[[ATTR0]] {
; IS__CGSCC____-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]]
; IS__CGSCC____: t:
; IS__CGSCC____-NEXT: ret i32 0
; IS__CGSCC____: f:
; IS__CGSCC____-NEXT: ret i32 1
; ;
br i1 %c, label %t, label %f br i1 %c, label %t, label %f
t: t:
ret i32 0 ret i32 0
f: f:
%undef = icmp eq i32 undef, 0 %undef = icmp eq i32 undef, 0
%undef2 = zext i1 %undef to i32 %undef2 = zext i1 %undef to i32
ret i32 %undef2 ret i32 %undef2
} }
; FIXME: returned value can be simplified to 0 ; FIXME: returned value can be simplified to 0
define i32 @potential_test11(i1 %c) { define i32 @potential_test11(i1 %c) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; IS________OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@potential_test11 ; IS________OPM-LABEL: define {{[^@]+}}@potential_test11
; IS__TUNIT____-SAME: (i1 [[C:%.*]]) #[[ATTR0]] { ; IS________OPM-SAME: (i1 [[C:%.*]]) #[[ATTR0]] {
; IS__TUNIT____-NEXT: [[ZERO1:%.*]] = call i32 @optimize_undef_1(i1 [[C]]) #[[ATTR0]], !range [[RNG2:![0-9]+]] ; IS________OPM-NEXT: [[ZERO1:%.*]] = call i32 @optimize_undef_1(i1 [[C]]) #[[ATTR2]], !range [[RNG2:![0-9]+]]
; IS__TUNIT____-NEXT: [[ZERO2:%.*]] = call i32 @optimize_undef_2(i1 [[C]]) #[[ATTR0]], !range [[RNG3:![0-9]+]] ; IS________OPM-NEXT: [[ZERO2:%.*]] = call i32 @optimize_undef_2(i1 [[C]]) #[[ATTR2]], !range [[RNG3:![0-9]+]]
; IS__TUNIT____-NEXT: [[ZERO3:%.*]] = call i32 @optimize_undef_3(i1 [[C]]) #[[ATTR0]], !range [[RNG2]] ; IS________OPM-NEXT: [[ZERO3:%.*]] = call i32 @optimize_undef_3(i1 [[C]]) #[[ATTR2]], !range [[RNG2]]
; IS__TUNIT____-NEXT: [[ACC1:%.*]] = add i32 [[ZERO1]], [[ZERO2]] ; IS________OPM-NEXT: [[ACC1:%.*]] = add i32 [[ZERO1]], [[ZERO2]]
; IS__TUNIT____-NEXT: [[ACC2:%.*]] = add i32 [[ACC1]], [[ZERO3]] ; IS________OPM-NEXT: [[ACC2:%.*]] = add i32 [[ACC1]], [[ZERO3]]
; IS__TUNIT____-NEXT: ret i32 [[ACC2]] ; IS________OPM-NEXT: ret i32 [[ACC2]]
; ;
; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS________NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@potential_test11 ; IS________NPM-LABEL: define {{[^@]+}}@potential_test11
; IS__CGSCC_OPM-SAME: (i1 [[C:%.*]]) #[[ATTR0]] { ; IS________NPM-SAME: (i1 [[C:%.*]]) #[[ATTR0]] {
; IS__CGSCC_OPM-NEXT: [[ZERO1:%.*]] = call i32 @optimize_undef_1(i1 [[C]]) #[[ATTR2]], !range [[RNG2:![0-9]+]] ; IS________NPM-NEXT: [[ZERO1:%.*]] = call i32 @optimize_undef_1(i1 [[C]]) #[[ATTR1]], !range [[RNG2:![0-9]+]]
; IS__CGSCC_OPM-NEXT: [[ZERO2:%.*]] = call i32 @optimize_undef_2(i1 [[C]]) #[[ATTR2]], !range [[RNG3:![0-9]+]] ; IS________NPM-NEXT: [[ZERO2:%.*]] = call i32 @optimize_undef_2(i1 [[C]]) #[[ATTR1]], !range [[RNG3:![0-9]+]]
; IS__CGSCC_OPM-NEXT: [[ZERO3:%.*]] = call i32 @optimize_undef_3(i1 [[C]]) #[[ATTR2]], !range [[RNG2]] ; IS________NPM-NEXT: [[ZERO3:%.*]] = call i32 @optimize_undef_3(i1 [[C]]) #[[ATTR1]], !range [[RNG2]]
; IS__CGSCC_OPM-NEXT: [[ACC1:%.*]] = add i32 [[ZERO1]], [[ZERO2]] ; IS________NPM-NEXT: [[ACC1:%.*]] = add i32 [[ZERO1]], [[ZERO2]]
; IS__CGSCC_OPM-NEXT: [[ACC2:%.*]] = add i32 [[ACC1]], [[ZERO3]] ; IS________NPM-NEXT: [[ACC2:%.*]] = add i32 [[ACC1]], [[ZERO3]]
; IS__CGSCC_OPM-NEXT: ret i32 [[ACC2]] ; IS________NPM-NEXT: ret i32 [[ACC2]]
;
; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@potential_test11
; IS__CGSCC_NPM-SAME: (i1 [[C:%.*]]) #[[ATTR0]] {
; IS__CGSCC_NPM-NEXT: [[ZERO1:%.*]] = call i32 @optimize_undef_1(i1 [[C]]) #[[ATTR1]], !range [[RNG2:![0-9]+]]
; IS__CGSCC_NPM-NEXT: [[ZERO2:%.*]] = call i32 @optimize_undef_2(i1 [[C]]) #[[ATTR1]], !range [[RNG3:![0-9]+]]
; IS__CGSCC_NPM-NEXT: [[ZERO3:%.*]] = call i32 @optimize_undef_3(i1 [[C]]) #[[ATTR1]], !range [[RNG2]]
; IS__CGSCC_NPM-NEXT: [[ACC1:%.*]] = add i32 [[ZERO1]], [[ZERO2]]
; IS__CGSCC_NPM-NEXT: [[ACC2:%.*]] = add i32 [[ACC1]], [[ZERO3]]
; IS__CGSCC_NPM-NEXT: ret i32 [[ACC2]]
; ;
%zero1 = call i32 @optimize_undef_1(i1 %c) %zero1 = call i32 @optimize_undef_1(i1 %c)
%zero2 = call i32 @optimize_undef_2(i1 %c) %zero2 = call i32 @optimize_undef_2(i1 %c)
%zero3 = call i32 @optimize_undef_3(i1 %c) %zero3 = call i32 @optimize_undef_3(i1 %c)
%acc1 = add i32 %zero1, %zero2 %acc1 = add i32 %zero1, %zero2
%acc2 = add i32 %acc1, %zero3 %acc2 = add i32 %acc1, %zero3
ret i32 %acc2 ret i32 %acc2
} }
define i32 @optimize_poison_1(i1 %c) { define i32 @optimize_poison_1(i1 %c) {
; IS__TUNIT_OPM: Function Attrs: nofree nosync nounwind readnone willreturn ; IS________OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@optimize_poison_1 ; IS________OPM-LABEL: define {{[^@]+}}@optimize_poison_1
; IS__TUNIT_OPM-SAME: (i1 [[C:%.*]]) #[[ATTR0]] { ; IS________OPM-SAME: (i1 [[C:%.*]]) #[[ATTR0]] {
; IS__TUNIT_OPM-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]] ; IS________OPM-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]]
; IS__TUNIT_OPM: t: ; IS________OPM: t:
; IS__TUNIT_OPM-NEXT: ret i32 0 ; IS________OPM-NEXT: ret i32 0
; IS__TUNIT_OPM: f: ; IS________OPM: f:
; IS__TUNIT_OPM-NEXT: ret i32 -1 ; IS________OPM-NEXT: ret i32 -1
; ;
; IS__TUNIT_NPM: Function Attrs: nofree nosync nounwind readnone willreturn ; IS________NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@optimize_poison_1 ; IS________NPM-LABEL: define {{[^@]+}}@optimize_poison_1
; IS__TUNIT_NPM-SAME: (i1 [[C:%.*]]) #[[ATTR0]] { ; IS________NPM-SAME: (i1 [[C:%.*]]) #[[ATTR0]] {
; IS__TUNIT_NPM-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]] ; IS________NPM-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]]
; IS__TUNIT_NPM: t: ; IS________NPM: t:
; IS__TUNIT_NPM-NEXT: ret i32 0 ; IS________NPM-NEXT: ret i32 0
; IS__TUNIT_NPM: f: ; IS________NPM: f:
; IS__TUNIT_NPM-NEXT: ret i32 undef ; IS________NPM-NEXT: ret i32 undef
;
; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@optimize_poison_1
; IS__CGSCC_OPM-SAME: (i1 [[C:%.*]]) #[[ATTR0]] {
; IS__CGSCC_OPM-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]]
; IS__CGSCC_OPM: t:
; IS__CGSCC_OPM-NEXT: ret i32 0
; IS__CGSCC_OPM: f:
; IS__CGSCC_OPM-NEXT: ret i32 -1
;
; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@optimize_poison_1
; IS__CGSCC_NPM-SAME: (i1 [[C:%.*]]) #[[ATTR0]] {
; IS__CGSCC_NPM-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]]
; IS__CGSCC_NPM: t:
; IS__CGSCC_NPM-NEXT: ret i32 0
; IS__CGSCC_NPM: f:
; IS__CGSCC_NPM-NEXT: ret i32 undef
; ;
br i1 %c, label %t, label %f br i1 %c, label %t, label %f
t: t:
ret i32 0 ret i32 0
f: f:
%poison = sub nuw i32 0, 1 %poison = sub nuw i32 0, 1
ret i32 %poison ret i32 %poison
} }
; FIXME: returned value can be simplified to 0 ; FIXME: returned value can be simplified to 0
define i32 @potential_test12(i1 %c) { define i32 @potential_test12(i1 %c) {
; IS__TUNIT_OPM: Function Attrs: nofree nosync nounwind readnone willreturn ; IS________OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@potential_test12 ; IS________OPM-LABEL: define {{[^@]+}}@potential_test12
; IS__TUNIT_OPM-SAME: (i1 [[C:%.*]]) #[[ATTR0]] { ; IS________OPM-SAME: (i1 [[C:%.*]]) #[[ATTR0]] {
; IS__TUNIT_OPM-NEXT: [[ZERO:%.*]] = call noundef i32 @optimize_poison_1(i1 [[C]]) #[[ATTR0]], !range [[RNG3]] ; IS________OPM-NEXT: [[ZERO:%.*]] = call noundef i32 @optimize_poison_1(i1 [[C]]) #[[ATTR2]], !range [[RNG3]]
; IS__TUNIT_OPM-NEXT: ret i32 [[ZERO]] ; IS________OPM-NEXT: ret i32 [[ZERO]]
; ;
; IS__TUNIT_NPM: Function Attrs: nofree nosync nounwind readnone willreturn ; IS________NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@potential_test12 ; IS________NPM-LABEL: define {{[^@]+}}@potential_test12
; IS__TUNIT_NPM-SAME: (i1 [[C:%.*]]) #[[ATTR0]] { ; IS________NPM-SAME: (i1 [[C:%.*]]) #[[ATTR0]] {
; IS__TUNIT_NPM-NEXT: ret i32 0 ; IS________NPM-NEXT: ret i32 0
;
; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@potential_test12
; IS__CGSCC_OPM-SAME: (i1 [[C:%.*]]) #[[ATTR0]] {
; IS__CGSCC_OPM-NEXT: [[ZERO:%.*]] = call noundef i32 @optimize_poison_1(i1 [[C]]) #[[ATTR2]], !range [[RNG3]]
; IS__CGSCC_OPM-NEXT: ret i32 [[ZERO]]
;
; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@potential_test12
; IS__CGSCC_NPM-SAME: (i1 [[C:%.*]]) #[[ATTR0]] {
; IS__CGSCC_NPM-NEXT: ret i32 0
; ;
%zero = call i32 @optimize_poison_1(i1 %c) %zero = call i32 @optimize_poison_1(i1 %c)
ret i32 %zero ret i32 %zero
} }
; Test 13 ; Test 13
; Do not simplify %ret in the callee to `%c`. ; Do not simplify %ret in the callee to `%c`.
; The potential value of %c is {0, 1} (undef is merged). ; The potential value of %c is {0, 1} (undef is merged).
; However, we should not simplify `and i32 %c, 3` to `%c` ; However, we should not simplify `and i32 %c, 3` to `%c`
define internal i32 @potential_test13_callee(i32 %c) { define internal i32 @potential_test13_callee(i32 %c) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@potential_test13_callee ; CHECK-LABEL: define {{[^@]+}}@potential_test13_callee
; IS__TUNIT____-SAME: (i32 [[C:%.*]]) #[[ATTR0]] { ; CHECK-SAME: (i32 [[C:%.*]]) #[[ATTR0]] {
; IS__TUNIT____-NEXT: [[RET:%.*]] = and i32 [[C]], 3 ; CHECK-NEXT: [[RET:%.*]] = and i32 [[C]], 3
; IS__TUNIT____-NEXT: ret i32 [[RET]] ; CHECK-NEXT: ret i32 [[RET]]
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@potential_test13_callee
; IS__CGSCC____-SAME: (i32 [[C:%.*]]) #[[ATTR0]] {
; IS__CGSCC____-NEXT: [[RET:%.*]] = and i32 [[C]], 3
; IS__CGSCC____-NEXT: ret i32 [[RET]]
; ;
%ret = and i32 %c, 3 %ret = and i32 %c, 3
ret i32 %ret ret i32 %ret
} }
define i32 @potential_test13_caller1() { define i32 @potential_test13_caller1() {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@potential_test13_caller1 ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@potential_test13_caller1
; IS__TUNIT____-SAME: () #[[ATTR0]] { ; IS__TUNIT_OPM-SAME: () #[[ATTR0]] {
; IS__TUNIT____-NEXT: [[RET:%.*]] = call i32 @potential_test13_callee(i32 noundef 0) #[[ATTR0]], !range [[RNG2]] ; IS__TUNIT_OPM-NEXT: [[RET:%.*]] = call i32 @potential_test13_callee(i32 noundef 0) #[[ATTR2]], !range [[RNG2]]
; IS__TUNIT____-NEXT: ret i32 [[RET]] ; IS__TUNIT_OPM-NEXT: ret i32 [[RET]]
;
; IS__TUNIT_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@potential_test13_caller1
; IS__TUNIT_NPM-SAME: () #[[ATTR0]] {
; IS__TUNIT_NPM-NEXT: [[RET:%.*]] = call i32 @potential_test13_callee(i32 noundef 0) #[[ATTR1]], !range [[RNG2]]
; IS__TUNIT_NPM-NEXT: ret i32 [[RET]]
; ;
; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@potential_test13_caller1 ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@potential_test13_caller1
; IS__CGSCC_OPM-SAME: () #[[ATTR0]] { ; IS__CGSCC_OPM-SAME: () #[[ATTR0]] {
; IS__CGSCC_OPM-NEXT: [[RET:%.*]] = call i32 @potential_test13_callee(i32 noundef 0) #[[ATTR2]], !range [[RNG2]] ; IS__CGSCC_OPM-NEXT: [[RET:%.*]] = call i32 @potential_test13_callee(i32 noundef 0) #[[ATTR3]], !range [[RNG2]]
; IS__CGSCC_OPM-NEXT: ret i32 [[RET]] ; IS__CGSCC_OPM-NEXT: ret i32 [[RET]]
; ;
; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@potential_test13_caller1 ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@potential_test13_caller1
; IS__CGSCC_NPM-SAME: () #[[ATTR0]] { ; IS__CGSCC_NPM-SAME: () #[[ATTR0]] {
; IS__CGSCC_NPM-NEXT: [[RET:%.*]] = call i32 @potential_test13_callee(i32 noundef 0) #[[ATTR1]], !range [[RNG2]] ; IS__CGSCC_NPM-NEXT: [[RET:%.*]] = call i32 @potential_test13_callee(i32 noundef 0) #[[ATTR2]], !range [[RNG2]]
; IS__CGSCC_NPM-NEXT: ret i32 [[RET]] ; IS__CGSCC_NPM-NEXT: ret i32 [[RET]]
; ;
%ret = call i32 @potential_test13_callee(i32 0) %ret = call i32 @potential_test13_callee(i32 0)
ret i32 %ret ret i32 %ret
} }
define i32 @potential_test13_caller2() { define i32 @potential_test13_caller2() {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@potential_test13_caller2 ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@potential_test13_caller2
; IS__TUNIT____-SAME: () #[[ATTR0]] { ; IS__TUNIT_OPM-SAME: () #[[ATTR0]] {
; IS__TUNIT____-NEXT: [[RET:%.*]] = call i32 @potential_test13_callee(i32 noundef 1) #[[ATTR0]], !range [[RNG2]] ; IS__TUNIT_OPM-NEXT: [[RET:%.*]] = call i32 @potential_test13_callee(i32 noundef 1) #[[ATTR2]], !range [[RNG2]]
; IS__TUNIT____-NEXT: ret i32 [[RET]] ; IS__TUNIT_OPM-NEXT: ret i32 [[RET]]
;
; IS__TUNIT_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@potential_test13_caller2
; IS__TUNIT_NPM-SAME: () #[[ATTR0]] {
; IS__TUNIT_NPM-NEXT: [[RET:%.*]] = call i32 @potential_test13_callee(i32 noundef 1) #[[ATTR1]], !range [[RNG2]]
; IS__TUNIT_NPM-NEXT: ret i32 [[RET]]
; ;
; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@potential_test13_caller2 ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@potential_test13_caller2
; IS__CGSCC_OPM-SAME: () #[[ATTR0]] { ; IS__CGSCC_OPM-SAME: () #[[ATTR0]] {
; IS__CGSCC_OPM-NEXT: [[RET:%.*]] = call i32 @potential_test13_callee(i32 noundef 1) #[[ATTR2]], !range [[RNG2]] ; IS__CGSCC_OPM-NEXT: [[RET:%.*]] = call i32 @potential_test13_callee(i32 noundef 1) #[[ATTR3]], !range [[RNG2]]
; IS__CGSCC_OPM-NEXT: ret i32 [[RET]] ; IS__CGSCC_OPM-NEXT: ret i32 [[RET]]
; ;
; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@potential_test13_caller2 ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@potential_test13_caller2
; IS__CGSCC_NPM-SAME: () #[[ATTR0]] { ; IS__CGSCC_NPM-SAME: () #[[ATTR0]] {
; IS__CGSCC_NPM-NEXT: [[RET:%.*]] = call i32 @potential_test13_callee(i32 noundef 1) #[[ATTR1]], !range [[RNG2]] ; IS__CGSCC_NPM-NEXT: [[RET:%.*]] = call i32 @potential_test13_callee(i32 noundef 1) #[[ATTR2]], !range [[RNG2]]
; IS__CGSCC_NPM-NEXT: ret i32 [[RET]] ; IS__CGSCC_NPM-NEXT: ret i32 [[RET]]
; ;
%ret = call i32 @potential_test13_callee(i32 1) %ret = call i32 @potential_test13_callee(i32 1)
ret i32 %ret ret i32 %ret
} }
define i32 @potential_test13_caller3() { define i32 @potential_test13_caller3() {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@potential_test13_caller3 ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@potential_test13_caller3
; IS__TUNIT____-SAME: () #[[ATTR0]] { ; IS__TUNIT_OPM-SAME: () #[[ATTR0]] {
; IS__TUNIT____-NEXT: [[RET:%.*]] = call i32 @potential_test13_callee(i32 undef) #[[ATTR0]], !range [[RNG2]] ; IS__TUNIT_OPM-NEXT: [[RET:%.*]] = call i32 @potential_test13_callee(i32 undef) #[[ATTR2]], !range [[RNG2]]
; IS__TUNIT____-NEXT: ret i32 [[RET]] ; IS__TUNIT_OPM-NEXT: ret i32 [[RET]]
;
; IS__TUNIT_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@potential_test13_caller3
; IS__TUNIT_NPM-SAME: () #[[ATTR0]] {
; IS__TUNIT_NPM-NEXT: [[RET:%.*]] = call i32 @potential_test13_callee(i32 undef) #[[ATTR1]], !range [[RNG2]]
; IS__TUNIT_NPM-NEXT: ret i32 [[RET]]
; ;
; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@potential_test13_caller3 ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@potential_test13_caller3
; IS__CGSCC_OPM-SAME: () #[[ATTR0]] { ; IS__CGSCC_OPM-SAME: () #[[ATTR0]] {
; IS__CGSCC_OPM-NEXT: [[RET:%.*]] = call i32 @potential_test13_callee(i32 undef) #[[ATTR2]], !range [[RNG2]] ; IS__CGSCC_OPM-NEXT: [[RET:%.*]] = call i32 @potential_test13_callee(i32 undef) #[[ATTR3]], !range [[RNG2]]
; IS__CGSCC_OPM-NEXT: ret i32 [[RET]] ; IS__CGSCC_OPM-NEXT: ret i32 [[RET]]
; ;
; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@potential_test13_caller3 ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@potential_test13_caller3
; IS__CGSCC_NPM-SAME: () #[[ATTR0]] { ; IS__CGSCC_NPM-SAME: () #[[ATTR0]] {
; IS__CGSCC_NPM-NEXT: [[RET:%.*]] = call i32 @potential_test13_callee(i32 undef) #[[ATTR1]], !range [[RNG2]] ; IS__CGSCC_NPM-NEXT: [[RET:%.*]] = call i32 @potential_test13_callee(i32 undef) #[[ATTR2]], !range [[RNG2]]
; IS__CGSCC_NPM-NEXT: ret i32 [[RET]] ; IS__CGSCC_NPM-NEXT: ret i32 [[RET]]
; ;
%ret = call i32 @potential_test13_callee(i32 undef) %ret = call i32 @potential_test13_callee(i32 undef)
ret i32 %ret ret i32 %ret
} }
define i1 @potential_test14(i1 %c0, i1 %c1, i1 %c2, i1 %c3) { define i1 @potential_test14(i1 %c0, i1 %c1, i1 %c2, i1 %c3) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@potential_test14 ; CHECK-LABEL: define {{[^@]+}}@potential_test14
; IS__TUNIT____-SAME: (i1 [[C0:%.*]], i1 [[C1:%.*]], i1 [[C2:%.*]], i1 [[C3:%.*]]) #[[ATTR0]] { ; CHECK-SAME: (i1 [[C0:%.*]], i1 [[C1:%.*]], i1 [[C2:%.*]], i1 [[C3:%.*]]) #[[ATTR0]] {
; IS__TUNIT____-NEXT: [[X0:%.*]] = select i1 [[C0]], i32 0, i32 1 ; CHECK-NEXT: [[X0:%.*]] = select i1 [[C0]], i32 0, i32 1
; IS__TUNIT____-NEXT: [[X1:%.*]] = select i1 [[C1]], i32 [[X0]], i32 undef ; CHECK-NEXT: [[X1:%.*]] = select i1 [[C1]], i32 [[X0]], i32 undef
; IS__TUNIT____-NEXT: [[Y2:%.*]] = select i1 [[C2]], i32 0, i32 7 ; CHECK-NEXT: [[Y2:%.*]] = select i1 [[C2]], i32 0, i32 7
; IS__TUNIT____-NEXT: [[Z3:%.*]] = select i1 [[C3]], i32 [[X1]], i32 [[Y2]] ; CHECK-NEXT: [[Z3:%.*]] = select i1 [[C3]], i32 [[X1]], i32 [[Y2]]
; IS__TUNIT____-NEXT: [[RET:%.*]] = icmp slt i32 [[Z3]], 7 ; CHECK-NEXT: [[RET:%.*]] = icmp slt i32 [[Z3]], 7
; IS__TUNIT____-NEXT: ret i1 [[RET]] ; CHECK-NEXT: ret i1 [[RET]]
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@potential_test14
; IS__CGSCC____-SAME: (i1 [[C0:%.*]], i1 [[C1:%.*]], i1 [[C2:%.*]], i1 [[C3:%.*]]) #[[ATTR0]] {
; IS__CGSCC____-NEXT: [[X0:%.*]] = select i1 [[C0]], i32 0, i32 1
; IS__CGSCC____-NEXT: [[X1:%.*]] = select i1 [[C1]], i32 [[X0]], i32 undef
; IS__CGSCC____-NEXT: [[Y2:%.*]] = select i1 [[C2]], i32 0, i32 7
; IS__CGSCC____-NEXT: [[Z3:%.*]] = select i1 [[C3]], i32 [[X1]], i32 [[Y2]]
; IS__CGSCC____-NEXT: [[RET:%.*]] = icmp slt i32 [[Z3]], 7
; IS__CGSCC____-NEXT: ret i1 [[RET]]
; ;
%x0 = select i1 %c0, i32 0, i32 1 %x0 = select i1 %c0, i32 0, i32 1
%x1 = select i1 %c1, i32 %x0, i32 undef %x1 = select i1 %c1, i32 %x0, i32 undef
%y2 = select i1 %c2, i32 0, i32 7 %y2 = select i1 %c2, i32 0, i32 7
%z3 = select i1 %c3, i32 %x1, i32 %y2 %z3 = select i1 %c3, i32 %x1, i32 %y2
%ret = icmp slt i32 %z3, 7 %ret = icmp slt i32 %z3, 7
ret i1 %ret ret i1 %ret
} }
define i1 @potential_test15(i1 %c0, i1 %c1) { define i1 @potential_test15(i1 %c0, i1 %c1) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@potential_test15 ; CHECK-LABEL: define {{[^@]+}}@potential_test15
; IS__TUNIT____-SAME: (i1 [[C0:%.*]], i1 [[C1:%.*]]) #[[ATTR0]] { ; CHECK-SAME: (i1 [[C0:%.*]], i1 [[C1:%.*]]) #[[ATTR0]] {
; IS__TUNIT____-NEXT: ret i1 false ; CHECK-NEXT: ret i1 false
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@potential_test15
; IS__CGSCC____-SAME: (i1 [[C0:%.*]], i1 [[C1:%.*]]) #[[ATTR0]] {
; IS__CGSCC____-NEXT: ret i1 false
; ;
%x0 = select i1 %c0, i32 0, i32 1 %x0 = select i1 %c0, i32 0, i32 1
%x1 = select i1 %c1, i32 %x0, i32 undef %x1 = select i1 %c1, i32 %x0, i32 undef
%ret = icmp eq i32 %x1, 7 %ret = icmp eq i32 %x1, 7
ret i1 %ret ret i1 %ret
} }
define i1 @potential_test16(i1 %c0, i1 %c1) { define i1 @potential_test16(i1 %c0, i1 %c1) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@potential_test16 ; CHECK-LABEL: define {{[^@]+}}@potential_test16
; IS__TUNIT____-SAME: (i1 [[C0:%.*]], i1 [[C1:%.*]]) #[[ATTR0]] { ; CHECK-SAME: (i1 [[C0:%.*]], i1 [[C1:%.*]]) #[[ATTR0]] {
; IS__TUNIT____-NEXT: ret i1 false ; CHECK-NEXT: ret i1 false
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@potential_test16
; IS__CGSCC____-SAME: (i1 [[C0:%.*]], i1 [[C1:%.*]]) #[[ATTR0]] {
; IS__CGSCC____-NEXT: ret i1 false
; ;
%x0 = select i1 %c0, i32 0, i32 undef %x0 = select i1 %c0, i32 0, i32 undef
%x1 = select i1 %c1, i32 %x0, i32 1 %x1 = select i1 %c1, i32 %x0, i32 1
%ret = icmp eq i32 %x1, 7 %ret = icmp eq i32 %x1, 7
ret i1 %ret ret i1 %ret
} }
;. ;.
; IS__TUNIT_OPM: attributes #[[ATTR0]] = { nofree nosync nounwind readnone willreturn } ; IS__TUNIT_OPM: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__TUNIT_OPM: attributes #[[ATTR1]] = { nofree nosync nounwind readnone } ; IS__TUNIT_OPM: attributes #[[ATTR1]] = { nofree norecurse nosync nounwind readnone }
; IS__TUNIT_OPM: attributes #[[ATTR2]] = { nofree nosync nounwind readnone willreturn }
;. ;.
; IS__TUNIT_NPM: attributes #[[ATTR0]] = { nofree nosync nounwind readnone willreturn } ; IS__TUNIT_NPM: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__TUNIT_NPM: attributes #[[ATTR1]] = { nofree nosync nounwind readnone willreturn }
;. ;.
; IS__CGSCC_OPM: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn } ; IS__CGSCC_OPM: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR1]] = { nofree norecurse nosync nounwind readnone } ; IS__CGSCC_OPM: attributes #[[ATTR1]] = { nofree norecurse nosync nounwind readnone }
; IS__CGSCC_OPM: attributes #[[ATTR2]] = { readnone willreturn } ; IS__CGSCC_OPM: attributes #[[ATTR2]] = { readnone willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR3]] = { nounwind readnone willreturn }
;. ;.
; IS__CGSCC_NPM: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn } ; IS__CGSCC_NPM: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__CGSCC_NPM: attributes #[[ATTR1]] = { readnone willreturn } ; IS__CGSCC_NPM: attributes #[[ATTR1]] = { readnone willreturn }
; IS__CGSCC_NPM: attributes #[[ATTR2]] = { nounwind readnone willreturn }
;. ;.
; CHECK: [[META0:![0-9]+]] = !{i32 1, i32 4} ; CHECK: [[META0:![0-9]+]] = !{i32 1, i32 4}
; CHECK: [[META1:![0-9]+]] = !{i32 3, i32 5} ; CHECK: [[META1:![0-9]+]] = !{i32 3, i32 5}
; CHECK: [[META2:![0-9]+]] = !{i32 0, i32 2} ; CHECK: [[META2:![0-9]+]] = !{i32 0, i32 2}
; CHECK: [[META3:![0-9]+]] = !{i32 -1, i32 1} ; CHECK: [[META3:![0-9]+]] = !{i32 -1, i32 1}
;. ;.

llvm/test/Transforms/Attributor/range.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals
; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=21 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM ; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=22 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=20 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=20 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM
; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM ; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM
; FIXME: CGSCC is not looking at callees and calleers even though it could be allowed. ; FIXME: CGSCC is not looking at callees and calleers even though it could be allowed.
define i32 @test0(i32* %p) { define i32 @test0(i32* %p) {
; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind readonly willreturn ; CHECK: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@test0 ; CHECK-LABEL: define {{[^@]+}}@test0
; IS__TUNIT____-SAME: (i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[P:%.*]]) #[[ATTR0:[0-9]+]] { ; CHECK-SAME: (i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[P:%.*]]) #[[ATTR0:[0-9]+]] {
; IS__TUNIT____-NEXT: [[A:%.*]] = load i32, i32* [[P]], align 4, !range [[RNG0:![0-9]+]] ; CHECK-NEXT: [[A:%.*]] = load i32, i32* [[P]], align 4, !range [[RNG0:![0-9]+]]
; IS__TUNIT____-NEXT: ret i32 [[A]] ; CHECK-NEXT: ret i32 [[A]]
;
; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@test0
; IS__CGSCC____-SAME: (i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[P:%.*]]) #[[ATTR0:[0-9]+]] {
; IS__CGSCC____-NEXT: [[A:%.*]] = load i32, i32* [[P]], align 4, !range [[RNG0:![0-9]+]]
; IS__CGSCC____-NEXT: ret i32 [[A]]
; ;
%a = load i32, i32* %p, !range !0 %a = load i32, i32* %p, !range !0
ret i32 %a ret i32 %a
} }
define i32 @test0-range-check(i32* %p) { define i32 @test0-range-check(i32* %p) {
; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind readonly willreturn ; IS__TUNIT____: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@test0-range-check ; IS__TUNIT____-LABEL: define {{[^@]+}}@test0-range-check
; IS__TUNIT____-SAME: (i32* nocapture nofree readonly align 4 [[P:%.*]]) #[[ATTR0]] { ; IS__TUNIT____-SAME: (i32* nocapture nofree readonly align 4 [[P:%.*]]) #[[ATTR0]] {
; IS__TUNIT____-NEXT: [[A:%.*]] = tail call i32 @test0(i32* nocapture nofree readonly align 4 [[P]]) #[[ATTR3:[0-9]+]], !range [[RNG0]] ; IS__TUNIT____-NEXT: [[A:%.*]] = tail call i32 @test0(i32* nocapture nofree readonly align 4 [[P]]) #[[ATTR3:[0-9]+]], !range [[RNG0]]
; IS__TUNIT____-NEXT: ret i32 [[A]] ; IS__TUNIT____-NEXT: ret i32 [[A]]
; ;
; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn ; IS__CGSCC_OPM: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@test0-range-check ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@test0-range-check
; IS__CGSCC____-SAME: (i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[P:%.*]]) #[[ATTR0]] { ; IS__CGSCC_OPM-SAME: (i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[P:%.*]]) #[[ATTR0]] {
; IS__CGSCC____-NEXT: [[A:%.*]] = tail call i32 @test0(i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[P]]) #[[ATTR3:[0-9]+]], !range [[RNG0]] ; IS__CGSCC_OPM-NEXT: [[A:%.*]] = tail call i32 @test0(i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[P]]) #[[ATTR4:[0-9]+]], !range [[RNG0]]
; IS__CGSCC____-NEXT: ret i32 [[A]] ; IS__CGSCC_OPM-NEXT: ret i32 [[A]]
;
; IS__CGSCC_NPM: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@test0-range-check
; IS__CGSCC_NPM-SAME: (i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[P:%.*]]) #[[ATTR0]] {
; IS__CGSCC_NPM-NEXT: [[A:%.*]] = tail call i32 @test0(i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[P]]) #[[ATTR3:[0-9]+]], !range [[RNG0]]
; IS__CGSCC_NPM-NEXT: ret i32 [[A]]
; ;
%a = tail call i32 @test0(i32* %p) %a = tail call i32 @test0(i32* %p)
ret i32 %a ret i32 %a
} }
declare void @use3-dummy(i1, i1, i1) declare void @use3-dummy(i1, i1, i1)
define void @use3(i1, i1, i1) { define void @use3(i1, i1, i1) {
; CHECK-LABEL: define {{[^@]+}}@use3 ; CHECK-LABEL: define {{[^@]+}}@use3
▲ Show 20 Lines • Show All 50 Lines • ▼ Show 20 Lines
; IS__TUNIT____-NEXT: tail call void @use3(i1 [[CMP_SLT_4]], i1 noundef false, i1 noundef false) ; IS__TUNIT____-NEXT: tail call void @use3(i1 [[CMP_SLT_4]], i1 noundef false, i1 noundef false)
; IS__TUNIT____-NEXT: [[CMP_LTE_3:%.*]] = icmp sle i32 [[RET]], 8 ; IS__TUNIT____-NEXT: [[CMP_LTE_3:%.*]] = icmp sle i32 [[RET]], 8
; IS__TUNIT____-NEXT: [[CMP_LTE_4:%.*]] = icmp sle i32 [[RET]], 1 ; IS__TUNIT____-NEXT: [[CMP_LTE_4:%.*]] = icmp sle i32 [[RET]], 1
; IS__TUNIT____-NEXT: [[CMP_LTE_5:%.*]] = icmp sle i32 [[RET]], 0 ; IS__TUNIT____-NEXT: [[CMP_LTE_5:%.*]] = icmp sle i32 [[RET]], 0
; IS__TUNIT____-NEXT: tail call void @use3(i1 noundef true, i1 noundef true, i1 [[CMP_LTE_3]]) ; IS__TUNIT____-NEXT: tail call void @use3(i1 noundef true, i1 noundef true, i1 [[CMP_LTE_3]])
; IS__TUNIT____-NEXT: tail call void @use3(i1 [[CMP_LTE_4]], i1 [[CMP_LTE_5]], i1 noundef false) ; IS__TUNIT____-NEXT: tail call void @use3(i1 [[CMP_LTE_4]], i1 [[CMP_LTE_5]], i1 noundef false)
; IS__TUNIT____-NEXT: ret void ; IS__TUNIT____-NEXT: ret void
; ;
; IS__CGSCC____-LABEL: define {{[^@]+}}@test0-icmp-check ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@test0-icmp-check
; IS__CGSCC____-SAME: (i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[P:%.*]]) { ; IS__CGSCC_OPM-SAME: (i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[P:%.*]]) {
; IS__CGSCC____-NEXT: [[RET:%.*]] = tail call i32 @test0(i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[P]]) #[[ATTR3]], !range [[RNG0]] ; IS__CGSCC_OPM-NEXT: [[RET:%.*]] = tail call i32 @test0(i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[P]]) #[[ATTR4]], !range [[RNG0]]
; IS__CGSCC____-NEXT: [[CMP_EQ_2:%.*]] = icmp eq i32 [[RET]], 9 ; IS__CGSCC_OPM-NEXT: [[CMP_EQ_2:%.*]] = icmp eq i32 [[RET]], 9
; IS__CGSCC____-NEXT: [[CMP_EQ_3:%.*]] = icmp eq i32 [[RET]], 8 ; IS__CGSCC_OPM-NEXT: [[CMP_EQ_3:%.*]] = icmp eq i32 [[RET]], 8
; IS__CGSCC____-NEXT: [[CMP_EQ_4:%.*]] = icmp eq i32 [[RET]], 1 ; IS__CGSCC_OPM-NEXT: [[CMP_EQ_4:%.*]] = icmp eq i32 [[RET]], 1
; IS__CGSCC____-NEXT: [[CMP_EQ_5:%.*]] = icmp eq i32 [[RET]], 0 ; IS__CGSCC_OPM-NEXT: [[CMP_EQ_5:%.*]] = icmp eq i32 [[RET]], 0
; IS__CGSCC____-NEXT: tail call void @use3(i1 noundef false, i1 [[CMP_EQ_2]], i1 [[CMP_EQ_3]]) ; IS__CGSCC_OPM-NEXT: tail call void @use3(i1 noundef false, i1 [[CMP_EQ_2]], i1 [[CMP_EQ_3]])
; IS__CGSCC____-NEXT: tail call void @use3(i1 [[CMP_EQ_4]], i1 [[CMP_EQ_5]], i1 noundef false) ; IS__CGSCC_OPM-NEXT: tail call void @use3(i1 [[CMP_EQ_4]], i1 [[CMP_EQ_5]], i1 noundef false)
; IS__CGSCC____-NEXT: [[CMP_NE_2:%.*]] = icmp ne i32 [[RET]], 9 ; IS__CGSCC_OPM-NEXT: [[CMP_NE_2:%.*]] = icmp ne i32 [[RET]], 9
; IS__CGSCC____-NEXT: [[CMP_NE_3:%.*]] = icmp ne i32 [[RET]], 8 ; IS__CGSCC_OPM-NEXT: [[CMP_NE_3:%.*]] = icmp ne i32 [[RET]], 8
; IS__CGSCC____-NEXT: [[CMP_NE_4:%.*]] = icmp ne i32 [[RET]], 1 ; IS__CGSCC_OPM-NEXT: [[CMP_NE_4:%.*]] = icmp ne i32 [[RET]], 1
; IS__CGSCC____-NEXT: [[CMP_NE_5:%.*]] = icmp ne i32 [[RET]], 0 ; IS__CGSCC_OPM-NEXT: [[CMP_NE_5:%.*]] = icmp ne i32 [[RET]], 0
; IS__CGSCC____-NEXT: tail call void @use3(i1 noundef true, i1 [[CMP_NE_2]], i1 [[CMP_NE_3]]) ; IS__CGSCC_OPM-NEXT: tail call void @use3(i1 noundef true, i1 [[CMP_NE_2]], i1 [[CMP_NE_3]])
; IS__CGSCC____-NEXT: tail call void @use3(i1 [[CMP_NE_4]], i1 [[CMP_NE_5]], i1 noundef true) ; IS__CGSCC_OPM-NEXT: tail call void @use3(i1 [[CMP_NE_4]], i1 [[CMP_NE_5]], i1 noundef true)
; IS__CGSCC____-NEXT: [[CMP_UGT_3:%.*]] = icmp ugt i32 [[RET]], 8 ; IS__CGSCC_OPM-NEXT: [[CMP_UGT_3:%.*]] = icmp ugt i32 [[RET]], 8
; IS__CGSCC____-NEXT: [[CMP_UGT_4:%.*]] = icmp ugt i32 [[RET]], 1 ; IS__CGSCC_OPM-NEXT: [[CMP_UGT_4:%.*]] = icmp ugt i32 [[RET]], 1
; IS__CGSCC____-NEXT: [[CMP_UGT_5:%.*]] = icmp ugt i32 [[RET]], 0 ; IS__CGSCC_OPM-NEXT: [[CMP_UGT_5:%.*]] = icmp ugt i32 [[RET]], 0
; IS__CGSCC____-NEXT: tail call void @use3(i1 noundef false, i1 noundef false, i1 [[CMP_UGT_3]]) ; IS__CGSCC_OPM-NEXT: tail call void @use3(i1 noundef false, i1 noundef false, i1 [[CMP_UGT_3]])
; IS__CGSCC____-NEXT: tail call void @use3(i1 [[CMP_UGT_4]], i1 [[CMP_UGT_5]], i1 noundef false) ; IS__CGSCC_OPM-NEXT: tail call void @use3(i1 [[CMP_UGT_4]], i1 [[CMP_UGT_5]], i1 noundef false)
; IS__CGSCC____-NEXT: [[CMP_UGE_2:%.*]] = icmp uge i32 [[RET]], 9 ; IS__CGSCC_OPM-NEXT: [[CMP_UGE_2:%.*]] = icmp uge i32 [[RET]], 9
; IS__CGSCC____-NEXT: [[CMP_UGE_3:%.*]] = icmp uge i32 [[RET]], 8 ; IS__CGSCC_OPM-NEXT: [[CMP_UGE_3:%.*]] = icmp uge i32 [[RET]], 8
; IS__CGSCC____-NEXT: [[CMP_UGE_4:%.*]] = icmp uge i32 [[RET]], 1 ; IS__CGSCC_OPM-NEXT: [[CMP_UGE_4:%.*]] = icmp uge i32 [[RET]], 1
; IS__CGSCC____-NEXT: tail call void @use3(i1 noundef false, i1 [[CMP_UGE_2]], i1 [[CMP_UGE_3]]) ; IS__CGSCC_OPM-NEXT: tail call void @use3(i1 noundef false, i1 [[CMP_UGE_2]], i1 [[CMP_UGE_3]])
; IS__CGSCC____-NEXT: tail call void @use3(i1 [[CMP_UGE_4]], i1 noundef true, i1 noundef false) ; IS__CGSCC_OPM-NEXT: tail call void @use3(i1 [[CMP_UGE_4]], i1 noundef true, i1 noundef false)
; IS__CGSCC____-NEXT: [[CMP_SGT_3:%.*]] = icmp sgt i32 [[RET]], 8 ; IS__CGSCC_OPM-NEXT: [[CMP_SGT_3:%.*]] = icmp sgt i32 [[RET]], 8
; IS__CGSCC____-NEXT: [[CMP_SGT_4:%.*]] = icmp sgt i32 [[RET]], 1 ; IS__CGSCC_OPM-NEXT: [[CMP_SGT_4:%.*]] = icmp sgt i32 [[RET]], 1
; IS__CGSCC____-NEXT: [[CMP_SGT_5:%.*]] = icmp sgt i32 [[RET]], 0 ; IS__CGSCC_OPM-NEXT: [[CMP_SGT_5:%.*]] = icmp sgt i32 [[RET]], 0
; IS__CGSCC____-NEXT: tail call void @use3(i1 noundef false, i1 noundef false, i1 [[CMP_SGT_3]]) ; IS__CGSCC_OPM-NEXT: tail call void @use3(i1 noundef false, i1 noundef false, i1 [[CMP_SGT_3]])
; IS__CGSCC____-NEXT: tail call void @use3(i1 [[CMP_SGT_4]], i1 [[CMP_SGT_5]], i1 noundef true) ; IS__CGSCC_OPM-NEXT: tail call void @use3(i1 [[CMP_SGT_4]], i1 [[CMP_SGT_5]], i1 noundef true)
; IS__CGSCC____-NEXT: [[CMP_GTE_2:%.*]] = icmp sge i32 [[RET]], 9 ; IS__CGSCC_OPM-NEXT: [[CMP_GTE_2:%.*]] = icmp sge i32 [[RET]], 9
; IS__CGSCC____-NEXT: [[CMP_GTE_3:%.*]] = icmp sge i32 [[RET]], 8 ; IS__CGSCC_OPM-NEXT: [[CMP_GTE_3:%.*]] = icmp sge i32 [[RET]], 8
; IS__CGSCC____-NEXT: [[CMP_GTE_4:%.*]] = icmp sge i32 [[RET]], 1 ; IS__CGSCC_OPM-NEXT: [[CMP_GTE_4:%.*]] = icmp sge i32 [[RET]], 1
; IS__CGSCC____-NEXT: tail call void @use3(i1 noundef false, i1 [[CMP_GTE_2]], i1 [[CMP_GTE_3]]) ; IS__CGSCC_OPM-NEXT: tail call void @use3(i1 noundef false, i1 [[CMP_GTE_2]], i1 [[CMP_GTE_3]])
; IS__CGSCC____-NEXT: tail call void @use3(i1 [[CMP_GTE_4]], i1 noundef true, i1 noundef true) ; IS__CGSCC_OPM-NEXT: tail call void @use3(i1 [[CMP_GTE_4]], i1 noundef true, i1 noundef true)
; IS__CGSCC____-NEXT: [[CMP_SLT_2:%.*]] = icmp slt i32 [[RET]], 9 ; IS__CGSCC_OPM-NEXT: [[CMP_SLT_2:%.*]] = icmp slt i32 [[RET]], 9
; IS__CGSCC____-NEXT: [[CMP_SLT_3:%.*]] = icmp slt i32 [[RET]], 8 ; IS__CGSCC_OPM-NEXT: [[CMP_SLT_3:%.*]] = icmp slt i32 [[RET]], 8
; IS__CGSCC____-NEXT: [[CMP_SLT_4:%.*]] = icmp slt i32 [[RET]], 1 ; IS__CGSCC_OPM-NEXT: [[CMP_SLT_4:%.*]] = icmp slt i32 [[RET]], 1
; IS__CGSCC____-NEXT: tail call void @use3(i1 noundef true, i1 [[CMP_SLT_2]], i1 [[CMP_SLT_3]]) ; IS__CGSCC_OPM-NEXT: tail call void @use3(i1 noundef true, i1 [[CMP_SLT_2]], i1 [[CMP_SLT_3]])
; IS__CGSCC____-NEXT: tail call void @use3(i1 [[CMP_SLT_4]], i1 noundef false, i1 noundef false) ; IS__CGSCC_OPM-NEXT: tail call void @use3(i1 [[CMP_SLT_4]], i1 noundef false, i1 noundef false)
; IS__CGSCC____-NEXT: [[CMP_LTE_3:%.*]] = icmp sle i32 [[RET]], 8 ; IS__CGSCC_OPM-NEXT: [[CMP_LTE_3:%.*]] = icmp sle i32 [[RET]], 8
; IS__CGSCC____-NEXT: [[CMP_LTE_4:%.*]] = icmp sle i32 [[RET]], 1 ; IS__CGSCC_OPM-NEXT: [[CMP_LTE_4:%.*]] = icmp sle i32 [[RET]], 1
; IS__CGSCC____-NEXT: [[CMP_LTE_5:%.*]] = icmp sle i32 [[RET]], 0 ; IS__CGSCC_OPM-NEXT: [[CMP_LTE_5:%.*]] = icmp sle i32 [[RET]], 0
; IS__CGSCC____-NEXT: tail call void @use3(i1 noundef true, i1 noundef true, i1 [[CMP_LTE_3]]) ; IS__CGSCC_OPM-NEXT: tail call void @use3(i1 noundef true, i1 noundef true, i1 [[CMP_LTE_3]])
; IS__CGSCC____-NEXT: tail call void @use3(i1 [[CMP_LTE_4]], i1 [[CMP_LTE_5]], i1 noundef false) ; IS__CGSCC_OPM-NEXT: tail call void @use3(i1 [[CMP_LTE_4]], i1 [[CMP_LTE_5]], i1 noundef false)
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC_OPM-NEXT: ret void
;
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@test0-icmp-check
; IS__CGSCC_NPM-SAME: (i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[P:%.*]]) {
; IS__CGSCC_NPM-NEXT: [[RET:%.*]] = tail call i32 @test0(i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[P]]) #[[ATTR3]], !range [[RNG0]]
; IS__CGSCC_NPM-NEXT: [[CMP_EQ_2:%.*]] = icmp eq i32 [[RET]], 9
; IS__CGSCC_NPM-NEXT: [[CMP_EQ_3:%.*]] = icmp eq i32 [[RET]], 8
; IS__CGSCC_NPM-NEXT: [[CMP_EQ_4:%.*]] = icmp eq i32 [[RET]], 1
; IS__CGSCC_NPM-NEXT: [[CMP_EQ_5:%.*]] = icmp eq i32 [[RET]], 0
; IS__CGSCC_NPM-NEXT: tail call void @use3(i1 noundef false, i1 [[CMP_EQ_2]], i1 [[CMP_EQ_3]])
; IS__CGSCC_NPM-NEXT: tail call void @use3(i1 [[CMP_EQ_4]], i1 [[CMP_EQ_5]], i1 noundef false)
; IS__CGSCC_NPM-NEXT: [[CMP_NE_2:%.*]] = icmp ne i32 [[RET]], 9
; IS__CGSCC_NPM-NEXT: [[CMP_NE_3:%.*]] = icmp ne i32 [[RET]], 8
; IS__CGSCC_NPM-NEXT: [[CMP_NE_4:%.*]] = icmp ne i32 [[RET]], 1
; IS__CGSCC_NPM-NEXT: [[CMP_NE_5:%.*]] = icmp ne i32 [[RET]], 0
; IS__CGSCC_NPM-NEXT: tail call void @use3(i1 noundef true, i1 [[CMP_NE_2]], i1 [[CMP_NE_3]])
; IS__CGSCC_NPM-NEXT: tail call void @use3(i1 [[CMP_NE_4]], i1 [[CMP_NE_5]], i1 noundef true)
; IS__CGSCC_NPM-NEXT: [[CMP_UGT_3:%.*]] = icmp ugt i32 [[RET]], 8
; IS__CGSCC_NPM-NEXT: [[CMP_UGT_4:%.*]] = icmp ugt i32 [[RET]], 1
; IS__CGSCC_NPM-NEXT: [[CMP_UGT_5:%.*]] = icmp ugt i32 [[RET]], 0
; IS__CGSCC_NPM-NEXT: tail call void @use3(i1 noundef false, i1 noundef false, i1 [[CMP_UGT_3]])
; IS__CGSCC_NPM-NEXT: tail call void @use3(i1 [[CMP_UGT_4]], i1 [[CMP_UGT_5]], i1 noundef false)
; IS__CGSCC_NPM-NEXT: [[CMP_UGE_2:%.*]] = icmp uge i32 [[RET]], 9
; IS__CGSCC_NPM-NEXT: [[CMP_UGE_3:%.*]] = icmp uge i32 [[RET]], 8
; IS__CGSCC_NPM-NEXT: [[CMP_UGE_4:%.*]] = icmp uge i32 [[RET]], 1
; IS__CGSCC_NPM-NEXT: tail call void @use3(i1 noundef false, i1 [[CMP_UGE_2]], i1 [[CMP_UGE_3]])
; IS__CGSCC_NPM-NEXT: tail call void @use3(i1 [[CMP_UGE_4]], i1 noundef true, i1 noundef false)
; IS__CGSCC_NPM-NEXT: [[CMP_SGT_3:%.*]] = icmp sgt i32 [[RET]], 8
; IS__CGSCC_NPM-NEXT: [[CMP_SGT_4:%.*]] = icmp sgt i32 [[RET]], 1
; IS__CGSCC_NPM-NEXT: [[CMP_SGT_5:%.*]] = icmp sgt i32 [[RET]], 0
; IS__CGSCC_NPM-NEXT: tail call void @use3(i1 noundef false, i1 noundef false, i1 [[CMP_SGT_3]])
; IS__CGSCC_NPM-NEXT: tail call void @use3(i1 [[CMP_SGT_4]], i1 [[CMP_SGT_5]], i1 noundef true)
; IS__CGSCC_NPM-NEXT: [[CMP_GTE_2:%.*]] = icmp sge i32 [[RET]], 9
; IS__CGSCC_NPM-NEXT: [[CMP_GTE_3:%.*]] = icmp sge i32 [[RET]], 8
; IS__CGSCC_NPM-NEXT: [[CMP_GTE_4:%.*]] = icmp sge i32 [[RET]], 1
; IS__CGSCC_NPM-NEXT: tail call void @use3(i1 noundef false, i1 [[CMP_GTE_2]], i1 [[CMP_GTE_3]])
; IS__CGSCC_NPM-NEXT: tail call void @use3(i1 [[CMP_GTE_4]], i1 noundef true, i1 noundef true)
; IS__CGSCC_NPM-NEXT: [[CMP_SLT_2:%.*]] = icmp slt i32 [[RET]], 9
; IS__CGSCC_NPM-NEXT: [[CMP_SLT_3:%.*]] = icmp slt i32 [[RET]], 8
; IS__CGSCC_NPM-NEXT: [[CMP_SLT_4:%.*]] = icmp slt i32 [[RET]], 1
; IS__CGSCC_NPM-NEXT: tail call void @use3(i1 noundef true, i1 [[CMP_SLT_2]], i1 [[CMP_SLT_3]])
; IS__CGSCC_NPM-NEXT: tail call void @use3(i1 [[CMP_SLT_4]], i1 noundef false, i1 noundef false)
; IS__CGSCC_NPM-NEXT: [[CMP_LTE_3:%.*]] = icmp sle i32 [[RET]], 8
; IS__CGSCC_NPM-NEXT: [[CMP_LTE_4:%.*]] = icmp sle i32 [[RET]], 1
; IS__CGSCC_NPM-NEXT: [[CMP_LTE_5:%.*]] = icmp sle i32 [[RET]], 0
; IS__CGSCC_NPM-NEXT: tail call void @use3(i1 noundef true, i1 noundef true, i1 [[CMP_LTE_3]])
; IS__CGSCC_NPM-NEXT: tail call void @use3(i1 [[CMP_LTE_4]], i1 [[CMP_LTE_5]], i1 noundef false)
; IS__CGSCC_NPM-NEXT: ret void
; ;
%ret = tail call i32 @test0(i32 *%p) %ret = tail call i32 @test0(i32 *%p)
; ret = [0, 10), eq ; ret = [0, 10), eq
%cmp-eq-1 = icmp eq i32 %ret, 10 %cmp-eq-1 = icmp eq i32 %ret, 10
%cmp-eq-2 = icmp eq i32 %ret, 9 %cmp-eq-2 = icmp eq i32 %ret, 9
%cmp-eq-3 = icmp eq i32 %ret, 8 %cmp-eq-3 = icmp eq i32 %ret, 8
%cmp-eq-4 = icmp eq i32 %ret, 1 %cmp-eq-4 = icmp eq i32 %ret, 1
▲ Show 20 Lines • Show All 70 Lines • ▼ Show 20 Lines;
%cmp-lte-5 = icmp sle i32 %ret, 0 %cmp-lte-5 = icmp sle i32 %ret, 0
%cmp-lte-6 = icmp sle i32 %ret, -1 %cmp-lte-6 = icmp sle i32 %ret, -1
tail call void @use3(i1 %cmp-lte-1, i1 %cmp-lte-2, i1 %cmp-lte-3) tail call void @use3(i1 %cmp-lte-1, i1 %cmp-lte-2, i1 %cmp-lte-3)
tail call void @use3(i1 %cmp-lte-4, i1 %cmp-lte-5, i1 %cmp-lte-6) tail call void @use3(i1 %cmp-lte-4, i1 %cmp-lte-5, i1 %cmp-lte-6)
ret void ret void
} }
define i32 @test1(i32* %p) { define i32 @test1(i32* %p) {
; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind readonly willreturn ; CHECK: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@test1 ; CHECK-LABEL: define {{[^@]+}}@test1
; IS__TUNIT____-SAME: (i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[P:%.*]]) #[[ATTR0]] { ; CHECK-SAME: (i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[P:%.*]]) #[[ATTR0]] {
; IS__TUNIT____-NEXT: [[LOAD_10_100:%.*]] = load i32, i32* [[P]], align 4, !range [[RNG1:![0-9]+]] ; CHECK-NEXT: [[LOAD_10_100:%.*]] = load i32, i32* [[P]], align 4, !range [[RNG1:![0-9]+]]
; IS__TUNIT____-NEXT: [[ADD_10_THEN_20_110:%.*]] = add i32 [[LOAD_10_100]], 10 ; CHECK-NEXT: [[ADD_10_THEN_20_110:%.*]] = add i32 [[LOAD_10_100]], 10
; IS__TUNIT____-NEXT: [[MUL_10_THEN_200_1091:%.*]] = mul i32 [[ADD_10_THEN_20_110]], 10 ; CHECK-NEXT: [[MUL_10_THEN_200_1091:%.*]] = mul i32 [[ADD_10_THEN_20_110]], 10
; IS__TUNIT____-NEXT: ret i32 [[MUL_10_THEN_200_1091]] ; CHECK-NEXT: ret i32 [[MUL_10_THEN_200_1091]]
;
; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@test1
; IS__CGSCC____-SAME: (i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[P:%.*]]) #[[ATTR0]] {
; IS__CGSCC____-NEXT: [[LOAD_10_100:%.*]] = load i32, i32* [[P]], align 4, !range [[RNG1:![0-9]+]]
; IS__CGSCC____-NEXT: [[ADD_10_THEN_20_110:%.*]] = add i32 [[LOAD_10_100]], 10
; IS__CGSCC____-NEXT: [[MUL_10_THEN_200_1091:%.*]] = mul i32 [[ADD_10_THEN_20_110]], 10
; IS__CGSCC____-NEXT: ret i32 [[MUL_10_THEN_200_1091]]
; ;
%load-10-100 = load i32, i32* %p, !range !1 %load-10-100 = load i32, i32* %p, !range !1
%add-10-then-20-110 = add i32 %load-10-100, 10 %add-10-then-20-110 = add i32 %load-10-100, 10
%mul-10-then-200-1091 = mul i32 %add-10-then-20-110, 10 %mul-10-then-200-1091 = mul i32 %add-10-then-20-110, 10
ret i32 %mul-10-then-200-1091 ret i32 %mul-10-then-200-1091
} }
define i1 @test1-check(i32* %p) { define i1 @test1-check(i32* %p) {
; ;
; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind readonly willreturn ; IS__TUNIT____: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@test1-check ; IS__TUNIT____-LABEL: define {{[^@]+}}@test1-check
; IS__TUNIT____-SAME: (i32* nocapture nofree readonly align 4 [[P:%.*]]) #[[ATTR0]] { ; IS__TUNIT____-SAME: (i32* nocapture nofree readonly align 4 [[P:%.*]]) #[[ATTR0]] {
; IS__TUNIT____-NEXT: [[RES:%.*]] = tail call i32 @test1(i32* nocapture nofree readonly align 4 [[P]]) #[[ATTR3]], !range [[RNG2:![0-9]+]] ; IS__TUNIT____-NEXT: [[RES:%.*]] = tail call i32 @test1(i32* nocapture nofree readonly align 4 [[P]]) #[[ATTR3]], !range [[RNG2:![0-9]+]]
; IS__TUNIT____-NEXT: [[CMP:%.*]] = icmp eq i32 [[RES]], 500 ; IS__TUNIT____-NEXT: [[CMP:%.*]] = icmp eq i32 [[RES]], 500
; IS__TUNIT____-NEXT: ret i1 [[CMP]] ; IS__TUNIT____-NEXT: ret i1 [[CMP]]
; ;
; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn ; IS__CGSCC_OPM: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@test1-check ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@test1-check
; IS__CGSCC____-SAME: (i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[P:%.*]]) #[[ATTR0]] { ; IS__CGSCC_OPM-SAME: (i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[P:%.*]]) #[[ATTR0]] {
; IS__CGSCC____-NEXT: [[RES:%.*]] = tail call i32 @test1(i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[P]]) #[[ATTR3]], !range [[RNG2:![0-9]+]] ; IS__CGSCC_OPM-NEXT: [[RES:%.*]] = tail call i32 @test1(i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[P]]) #[[ATTR4]], !range [[RNG2:![0-9]+]]
; IS__CGSCC____-NEXT: [[CMP:%.*]] = icmp eq i32 [[RES]], 500 ; IS__CGSCC_OPM-NEXT: [[CMP:%.*]] = icmp eq i32 [[RES]], 500
; IS__CGSCC____-NEXT: ret i1 [[CMP]] ; IS__CGSCC_OPM-NEXT: ret i1 [[CMP]]
;
; IS__CGSCC_NPM: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@test1-check
; IS__CGSCC_NPM-SAME: (i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[P:%.*]]) #[[ATTR0]] {
; IS__CGSCC_NPM-NEXT: [[RES:%.*]] = tail call i32 @test1(i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[P]]) #[[ATTR3]], !range [[RNG2:![0-9]+]]
; IS__CGSCC_NPM-NEXT: [[CMP:%.*]] = icmp eq i32 [[RES]], 500
; IS__CGSCC_NPM-NEXT: ret i1 [[CMP]]
; ;
%res = tail call i32 @test1(i32* %p) %res = tail call i32 @test1(i32* %p)
%cmp = icmp eq i32 %res, 500 %cmp = icmp eq i32 %res, 500
ret i1 %cmp ret i1 %cmp
} }
; TEST2 ; TEST2
; int test2(int *p) { return *p == 0 ? 4 : 3; } ; int test2(int *p) { return *p == 0 ? 4 : 3; }
; int test2_check(int *p) { ; int test2_check(int *p) {
; int call = test2(p); ; int call = test2(p);
; if (call == 5) { ; if (call == 5) {
; // dead block ; // dead block
; return 2; ; return 2;
; } else { ; } else {
; return 3; ; return 3;
; } ; }
; } ; }
define i32 @test2(i32* %p) { define i32 @test2(i32* %p) {
; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind readonly willreturn ; CHECK: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@test2 ; CHECK-LABEL: define {{[^@]+}}@test2
; IS__TUNIT____-SAME: (i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[P:%.*]]) #[[ATTR0]] { ; CHECK-SAME: (i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[P:%.*]]) #[[ATTR0]] {
; IS__TUNIT____-NEXT: entry: ; CHECK-NEXT: entry:
; IS__TUNIT____-NEXT: [[TMP0:%.*]] = load i32, i32* [[P]], align 4 ; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[P]], align 4
; IS__TUNIT____-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[TMP0]], 0 ; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[TMP0]], 0
; IS__TUNIT____-NEXT: [[COND:%.*]] = select i1 [[TOBOOL]], i32 4, i32 3 ; CHECK-NEXT: [[COND:%.*]] = select i1 [[TOBOOL]], i32 4, i32 3
; IS__TUNIT____-NEXT: ret i32 [[COND]] ; CHECK-NEXT: ret i32 [[COND]]
;
; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@test2
; IS__CGSCC____-SAME: (i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[P:%.*]]) #[[ATTR0]] {
; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: [[TMP0:%.*]] = load i32, i32* [[P]], align 4
; IS__CGSCC____-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[TMP0]], 0
; IS__CGSCC____-NEXT: [[COND:%.*]] = select i1 [[TOBOOL]], i32 4, i32 3
; IS__CGSCC____-NEXT: ret i32 [[COND]]
; ;
entry: entry:
%0 = load i32, i32* %p, align 4 %0 = load i32, i32* %p, align 4
%tobool = icmp eq i32 %0, 0 %tobool = icmp eq i32 %0, 0
%cond = select i1 %tobool, i32 4, i32 3 %cond = select i1 %tobool, i32 4, i32 3
ret i32 %cond ret i32 %cond
} }
define i32 @test2_check(i32* %p) { define i32 @test2_check(i32* %p) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__TUNIT____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@test2_check ; IS__TUNIT____-LABEL: define {{[^@]+}}@test2_check
; IS__TUNIT____-SAME: (i32* nocapture nofree readnone align 4 [[P:%.*]]) #[[ATTR1:[0-9]+]] { ; IS__TUNIT____-SAME: (i32* nocapture nofree readnone align 4 [[P:%.*]]) #[[ATTR1:[0-9]+]] {
; IS__TUNIT____-NEXT: entry: ; IS__TUNIT____-NEXT: entry:
; IS__TUNIT____-NEXT: br label [[IF_THEN:%.*]] ; IS__TUNIT____-NEXT: br label [[IF_THEN:%.*]]
; IS__TUNIT____: if.then: ; IS__TUNIT____: if.then:
; IS__TUNIT____-NEXT: br label [[RETURN:%.*]] ; IS__TUNIT____-NEXT: br label [[RETURN:%.*]]
; IS__TUNIT____: if.end: ; IS__TUNIT____: if.end:
; IS__TUNIT____-NEXT: unreachable ; IS__TUNIT____-NEXT: unreachable
▲ Show 20 Lines • Show All 51 Lines • ▼ Show 20 Lines
; }else { ; }else {
; return; ; return;
; } ; }
; } ; }
declare dso_local void @unkown() declare dso_local void @unkown()
define internal i32 @r1(i32) local_unnamed_addr { define internal i32 @r1(i32) local_unnamed_addr {
; IS__TUNIT_OPM: Function Attrs: nofree nosync nounwind readnone ; IS________OPM: Function Attrs: nofree norecurse nosync nounwind readnone
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@r1 ; IS________OPM-LABEL: define {{[^@]+}}@r1
; IS__TUNIT_OPM-SAME: () local_unnamed_addr #[[ATTR2:[0-9]+]] { ; IS________OPM-SAME: () local_unnamed_addr #[[ATTR2:[0-9]+]] {
; IS__TUNIT_OPM-NEXT: br label [[TMP4:%.*]] ; IS________OPM-NEXT: br label [[TMP4:%.*]]
; IS__TUNIT_OPM: 1: ; IS________OPM: 1:
; IS__TUNIT_OPM-NEXT: [[TMP2:%.*]] = icmp sgt i32 [[TMP7:%.*]], 10000 ; IS________OPM-NEXT: [[TMP2:%.*]] = icmp sgt i32 [[TMP7:%.*]], 10000
; IS__TUNIT_OPM-NEXT: br i1 [[TMP2]], label [[TMP3:%.*]], label [[F:%.*]] ; IS________OPM-NEXT: br i1 [[TMP2]], label [[TMP3:%.*]], label [[F:%.*]]
; IS__TUNIT_OPM: 3: ; IS________OPM: 3:
; IS__TUNIT_OPM-NEXT: ret i32 20 ; IS________OPM-NEXT: ret i32 20
; IS__TUNIT_OPM: f: ; IS________OPM: f:
; IS__TUNIT_OPM-NEXT: ret i32 10 ; IS________OPM-NEXT: ret i32 10
; IS__TUNIT_OPM: 4: ; IS________OPM: 4:
; IS__TUNIT_OPM-NEXT: [[TMP5:%.*]] = phi i32 [ 0, [[TMP0:%.*]] ], [ [[TMP8:%.*]], [[TMP4]] ] ; IS________OPM-NEXT: [[TMP5:%.*]] = phi i32 [ 0, [[TMP0:%.*]] ], [ [[TMP8:%.*]], [[TMP4]] ]
; IS__TUNIT_OPM-NEXT: [[TMP6:%.*]] = phi i32 [ 0, [[TMP0]] ], [ [[TMP7]], [[TMP4]] ] ; IS________OPM-NEXT: [[TMP6:%.*]] = phi i32 [ 0, [[TMP0]] ], [ [[TMP7]], [[TMP4]] ]
; IS__TUNIT_OPM-NEXT: [[TMP7]] = add nuw nsw i32 [[TMP5]], [[TMP6]] ; IS________OPM-NEXT: [[TMP7]] = add nuw nsw i32 [[TMP5]], [[TMP6]]
; IS__TUNIT_OPM-NEXT: [[TMP8]] = add nuw nsw i32 [[TMP5]], 1 ; IS________OPM-NEXT: [[TMP8]] = add nuw nsw i32 [[TMP5]], 1
; IS__TUNIT_OPM-NEXT: [[TMP9:%.*]] = icmp eq i32 [[TMP8]], 100 ; IS________OPM-NEXT: [[TMP9:%.*]] = icmp eq i32 [[TMP8]], 100
; IS__TUNIT_OPM-NEXT: br i1 [[TMP9]], label [[TMP1:%.*]], label [[TMP4]] ; IS________OPM-NEXT: br i1 [[TMP9]], label [[TMP1:%.*]], label [[TMP4]]
;
; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readnone
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@r1
; IS__CGSCC_OPM-SAME: () local_unnamed_addr #[[ATTR2:[0-9]+]] {
; IS__CGSCC_OPM-NEXT: br label [[TMP4:%.*]]
; IS__CGSCC_OPM: 1:
; IS__CGSCC_OPM-NEXT: [[TMP2:%.*]] = icmp sgt i32 [[TMP7:%.*]], 10000
; IS__CGSCC_OPM-NEXT: br i1 [[TMP2]], label [[TMP3:%.*]], label [[F:%.*]]
; IS__CGSCC_OPM: 3:
; IS__CGSCC_OPM-NEXT: ret i32 20
; IS__CGSCC_OPM: f:
; IS__CGSCC_OPM-NEXT: ret i32 10
; IS__CGSCC_OPM: 4:
; IS__CGSCC_OPM-NEXT: [[TMP5:%.*]] = phi i32 [ 0, [[TMP0:%.*]] ], [ [[TMP8:%.*]], [[TMP4]] ]
; IS__CGSCC_OPM-NEXT: [[TMP6:%.*]] = phi i32 [ 0, [[TMP0]] ], [ [[TMP7]], [[TMP4]] ]
; IS__CGSCC_OPM-NEXT: [[TMP7]] = add nuw nsw i32 [[TMP5]], [[TMP6]]
; IS__CGSCC_OPM-NEXT: [[TMP8]] = add nuw nsw i32 [[TMP5]], 1
; IS__CGSCC_OPM-NEXT: [[TMP9:%.*]] = icmp eq i32 [[TMP8]], 100
; IS__CGSCC_OPM-NEXT: br i1 [[TMP9]], label [[TMP1:%.*]], label [[TMP4]]
; ;
; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@r1 ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@r1
; IS__CGSCC_NPM-SAME: () local_unnamed_addr #[[ATTR1]] { ; IS__CGSCC_NPM-SAME: () local_unnamed_addr #[[ATTR1]] {
; IS__CGSCC_NPM-NEXT: br label [[TMP3:%.*]] ; IS__CGSCC_NPM-NEXT: br label [[TMP3:%.*]]
; IS__CGSCC_NPM: 1: ; IS__CGSCC_NPM: 1:
; IS__CGSCC_NPM-NEXT: br label [[F:%.*]] ; IS__CGSCC_NPM-NEXT: br label [[F:%.*]]
; IS__CGSCC_NPM: 2: ; IS__CGSCC_NPM: 2:
Show All 24 Lines5: ; preds = %5, %1
%9 = add nuw nsw i32 %6, 1 %9 = add nuw nsw i32 %6, 1
%10 = icmp eq i32 %9, 100 %10 = icmp eq i32 %9, 100
br i1 %10, label %2, label %5 br i1 %10, label %2, label %5
} }
define void @f1(i32){ define void @f1(i32){
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@f1 ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@f1
; IS__TUNIT_OPM-SAME: (i32 [[TMP0:%.*]]) { ; IS__TUNIT_OPM-SAME: (i32 [[TMP0:%.*]]) {
; IS__TUNIT_OPM-NEXT: [[TMP2:%.*]] = tail call i32 @r1() #[[ATTR2]] ; IS__TUNIT_OPM-NEXT: [[TMP2:%.*]] = tail call i32 @r1() #[[ATTR4:[0-9]+]]
; IS__TUNIT_OPM-NEXT: [[TMP3:%.*]] = icmp sgt i32 [[TMP2]], 15 ; IS__TUNIT_OPM-NEXT: [[TMP3:%.*]] = icmp sgt i32 [[TMP2]], 15
; IS__TUNIT_OPM-NEXT: br i1 [[TMP3]], label [[TMP4:%.*]], label [[TMP5:%.*]] ; IS__TUNIT_OPM-NEXT: br i1 [[TMP3]], label [[TMP4:%.*]], label [[TMP5:%.*]]
; IS__TUNIT_OPM: 4: ; IS__TUNIT_OPM: 4:
; IS__TUNIT_OPM-NEXT: tail call void @unkown() ; IS__TUNIT_OPM-NEXT: tail call void @unkown()
; IS__TUNIT_OPM-NEXT: br label [[TMP5]] ; IS__TUNIT_OPM-NEXT: br label [[TMP5]]
; IS__TUNIT_OPM: 5: ; IS__TUNIT_OPM: 5:
; IS__TUNIT_OPM-NEXT: ret void ; IS__TUNIT_OPM-NEXT: ret void
; ;
; IS__TUNIT_NPM: Function Attrs: nofree nosync nounwind readnone willreturn ; IS________NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@f1 ; IS________NPM-LABEL: define {{[^@]+}}@f1
; IS__TUNIT_NPM-SAME: (i32 [[TMP0:%.*]]) #[[ATTR1]] { ; IS________NPM-SAME: (i32 [[TMP0:%.*]]) #[[ATTR1]] {
; IS__TUNIT_NPM-NEXT: br label [[TMP3:%.*]] ; IS________NPM-NEXT: br label [[TMP3:%.*]]
; IS__TUNIT_NPM: 2: ; IS________NPM: 2:
; IS__TUNIT_NPM-NEXT: unreachable ; IS________NPM-NEXT: unreachable
; IS__TUNIT_NPM: 3: ; IS________NPM: 3:
; IS__TUNIT_NPM-NEXT: ret void ; IS________NPM-NEXT: ret void
; ;
; IS__CGSCC_OPM: Function Attrs: norecurse
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@f1 ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@f1
; IS__CGSCC_OPM-SAME: (i32 [[TMP0:%.*]]) { ; IS__CGSCC_OPM-SAME: (i32 [[TMP0:%.*]]) #[[ATTR3:[0-9]+]] {
; IS__CGSCC_OPM-NEXT: [[TMP2:%.*]] = tail call i32 @r1() #[[ATTR4:[0-9]+]], !range [[RNG3:![0-9]+]] ; IS__CGSCC_OPM-NEXT: [[TMP2:%.*]] = tail call i32 @r1() #[[ATTR5:[0-9]+]], !range [[RNG3:![0-9]+]]
; IS__CGSCC_OPM-NEXT: [[TMP3:%.*]] = icmp sgt i32 [[TMP2]], 15 ; IS__CGSCC_OPM-NEXT: [[TMP3:%.*]] = icmp sgt i32 [[TMP2]], 15
; IS__CGSCC_OPM-NEXT: br i1 [[TMP3]], label [[TMP4:%.*]], label [[TMP5:%.*]] ; IS__CGSCC_OPM-NEXT: br i1 [[TMP3]], label [[TMP4:%.*]], label [[TMP5:%.*]]
; IS__CGSCC_OPM: 4: ; IS__CGSCC_OPM: 4:
; IS__CGSCC_OPM-NEXT: tail call void @unkown() ; IS__CGSCC_OPM-NEXT: tail call void @unkown()
; IS__CGSCC_OPM-NEXT: br label [[TMP5]] ; IS__CGSCC_OPM-NEXT: br label [[TMP5]]
; IS__CGSCC_OPM: 5: ; IS__CGSCC_OPM: 5:
; IS__CGSCC_OPM-NEXT: ret void ; IS__CGSCC_OPM-NEXT: ret void
; ;
; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@f1
; IS__CGSCC_NPM-SAME: (i32 [[TMP0:%.*]]) #[[ATTR1]] {
; IS__CGSCC_NPM-NEXT: br label [[TMP3:%.*]]
; IS__CGSCC_NPM: 2:
; IS__CGSCC_NPM-NEXT: unreachable
; IS__CGSCC_NPM: 3:
; IS__CGSCC_NPM-NEXT: ret void
;
%2 = tail call i32 @r1(i32 %0) %2 = tail call i32 @r1(i32 %0)
%3 = icmp sgt i32 %2, 15 %3 = icmp sgt i32 %2, 15
br i1 %3, label %4, label %5 br i1 %3, label %4, label %5
4: ; preds = %1 4: ; preds = %1
tail call void @unkown() tail call void @unkown()
br label %5 br label %5
5: ; preds = %1, %4 5: ; preds = %1, %4
ret void ret void
} }
; TEST4 LVI test ; TEST4 LVI test
; f1 ; f1
; int test4-f1(int u){ ; int test4-f1(int u){
; if(u>=0) { ; if(u>=0) {
; return u; ; return u;
; }else{ ; }else{
; return 0; ; return 0;
; } ; }
; } ; }
define dso_local i32 @test4-f1(i32 %u) { define dso_local i32 @test4-f1(i32 %u) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@test4-f1 ; CHECK-LABEL: define {{[^@]+}}@test4-f1
; IS__TUNIT____-SAME: (i32 [[U:%.*]]) #[[ATTR1]] { ; CHECK-SAME: (i32 [[U:%.*]]) #[[ATTR1:[0-9]+]] {
; IS__TUNIT____-NEXT: entry: ; CHECK-NEXT: entry:
; IS__TUNIT____-NEXT: [[CMP:%.*]] = icmp sgt i32 [[U]], -1 ; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[U]], -1
; IS__TUNIT____-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[RETURN:%.*]] ; CHECK-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[RETURN:%.*]]
; IS__TUNIT____: if.then: ; CHECK: if.then:
; IS__TUNIT____-NEXT: br label [[RETURN]] ; CHECK-NEXT: br label [[RETURN]]
; IS__TUNIT____: return: ; CHECK: return:
; IS__TUNIT____-NEXT: [[RETVAL_0:%.*]] = phi i32 [ [[U]], [[IF_THEN]] ], [ 0, [[ENTRY:%.*]] ] ; CHECK-NEXT: [[RETVAL_0:%.*]] = phi i32 [ [[U]], [[IF_THEN]] ], [ 0, [[ENTRY:%.*]] ]
; IS__TUNIT____-NEXT: ret i32 [[RETVAL_0]] ; CHECK-NEXT: ret i32 [[RETVAL_0]]
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@test4-f1
; IS__CGSCC____-SAME: (i32 [[U:%.*]]) #[[ATTR1]] {
; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: [[CMP:%.*]] = icmp sgt i32 [[U]], -1
; IS__CGSCC____-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[RETURN:%.*]]
; IS__CGSCC____: if.then:
; IS__CGSCC____-NEXT: br label [[RETURN]]
; IS__CGSCC____: return:
; IS__CGSCC____-NEXT: [[RETVAL_0:%.*]] = phi i32 [ [[U]], [[IF_THEN]] ], [ 0, [[ENTRY:%.*]] ]
; IS__CGSCC____-NEXT: ret i32 [[RETVAL_0]]
; ;
; FIXME: RETVAL_0 >= 0 ; FIXME: RETVAL_0 >= 0
entry: entry:
%cmp = icmp sgt i32 %u, -1 %cmp = icmp sgt i32 %u, -1
br i1 %cmp, label %if.then, label %return br i1 %cmp, label %if.then, label %return
if.then: ; preds = %entry if.then: ; preds = %entry
br label %return br label %return
return: ; preds = %entry, %if.then return: ; preds = %entry, %if.then
%retval.0 = phi i32 [ %u, %if.then ], [ 0, %entry ] %retval.0 = phi i32 [ %u, %if.then ], [ 0, %entry ]
ret i32 %retval.0 ret i32 %retval.0
} }
define dso_local i32 @test4-g1(i32 %u) { define dso_local i32 @test4-g1(i32 %u) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@test4-g1 ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@test4-g1
; IS__TUNIT____-SAME: (i32 [[U:%.*]]) #[[ATTR1]] { ; IS__TUNIT_OPM-SAME: (i32 [[U:%.*]]) #[[ATTR1]] {
; IS__TUNIT____-NEXT: entry: ; IS__TUNIT_OPM-NEXT: entry:
; IS__TUNIT____-NEXT: [[CALL:%.*]] = tail call i32 @test4-f1(i32 [[U]]) #[[ATTR1]] ; IS__TUNIT_OPM-NEXT: [[CALL:%.*]] = tail call i32 @test4-f1(i32 [[U]]) #[[ATTR5:[0-9]+]]
; IS__TUNIT____-NEXT: ret i32 [[CALL]] ; IS__TUNIT_OPM-NEXT: ret i32 [[CALL]]
;
; IS________NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS________NPM-LABEL: define {{[^@]+}}@test4-g1
; IS________NPM-SAME: (i32 [[U:%.*]]) #[[ATTR1]] {
; IS________NPM-NEXT: entry:
; IS________NPM-NEXT: [[CALL:%.*]] = tail call i32 @test4-f1(i32 [[U]]) #[[ATTR4:[0-9]+]]
; IS________NPM-NEXT: ret i32 [[CALL]]
; ;
; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@test4-g1 ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@test4-g1
; IS__CGSCC_OPM-SAME: (i32 [[U:%.*]]) #[[ATTR1]] { ; IS__CGSCC_OPM-SAME: (i32 [[U:%.*]]) #[[ATTR1]] {
; IS__CGSCC_OPM-NEXT: entry: ; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: [[CALL:%.*]] = tail call i32 @test4-f1(i32 [[U]]) #[[ATTR5:[0-9]+]] ; IS__CGSCC_OPM-NEXT: [[CALL:%.*]] = tail call i32 @test4-f1(i32 [[U]]) #[[ATTR6:[0-9]+]]
; IS__CGSCC_OPM-NEXT: ret i32 [[CALL]] ; IS__CGSCC_OPM-NEXT: ret i32 [[CALL]]
; ;
; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@test4-g1
; IS__CGSCC_NPM-SAME: (i32 [[U:%.*]]) #[[ATTR1]] {
; IS__CGSCC_NPM-NEXT: entry:
; IS__CGSCC_NPM-NEXT: [[CALL:%.*]] = tail call i32 @test4-f1(i32 [[U]]) #[[ATTR4:[0-9]+]]
; IS__CGSCC_NPM-NEXT: ret i32 [[CALL]]
;
; FIXME: %call should have range [0, inf] ; FIXME: %call should have range [0, inf]
entry: entry:
%call = tail call i32 @test4-f1(i32 %u) %call = tail call i32 @test4-f1(i32 %u)
ret i32 %call ret i32 %call
} }
; f2 ; f2
; int test4-f1(int u){ ; int test4-f1(int u){
; if(u>-1) { ; if(u>-1) {
; return u+1; ; return u+1;
; }else{ ; }else{
; return 1; ; return 1;
; } ; }
; } ; }
define dso_local i32 @test4-f2(i32 %u) { define dso_local i32 @test4-f2(i32 %u) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@test4-f2 ; CHECK-LABEL: define {{[^@]+}}@test4-f2
; IS__TUNIT____-SAME: (i32 [[U:%.*]]) #[[ATTR1]] { ; CHECK-SAME: (i32 [[U:%.*]]) #[[ATTR1]] {
; IS__TUNIT____-NEXT: entry: ; CHECK-NEXT: entry:
; IS__TUNIT____-NEXT: [[CMP:%.*]] = icmp sgt i32 [[U]], -1 ; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[U]], -1
; IS__TUNIT____-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]] ; CHECK-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]]
; IS__TUNIT____: if.then: ; CHECK: if.then:
; IS__TUNIT____-NEXT: [[ADD:%.*]] = add nuw nsw i32 [[U]], 1 ; CHECK-NEXT: [[ADD:%.*]] = add nuw nsw i32 [[U]], 1
; IS__TUNIT____-NEXT: br label [[RETURN:%.*]] ; CHECK-NEXT: br label [[RETURN:%.*]]
; IS__TUNIT____: if.else: ; CHECK: if.else:
; IS__TUNIT____-NEXT: br label [[RETURN]] ; CHECK-NEXT: br label [[RETURN]]
; IS__TUNIT____: return: ; CHECK: return:
; IS__TUNIT____-NEXT: [[RETVAL_0:%.*]] = phi i32 [ [[ADD]], [[IF_THEN]] ], [ 1, [[IF_ELSE]] ] ; CHECK-NEXT: [[RETVAL_0:%.*]] = phi i32 [ [[ADD]], [[IF_THEN]] ], [ 1, [[IF_ELSE]] ]
; IS__TUNIT____-NEXT: ret i32 [[RETVAL_0]] ; CHECK-NEXT: ret i32 [[RETVAL_0]]
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@test4-f2
; IS__CGSCC____-SAME: (i32 [[U:%.*]]) #[[ATTR1]] {
; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: [[CMP:%.*]] = icmp sgt i32 [[U]], -1
; IS__CGSCC____-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]]
; IS__CGSCC____: if.then:
; IS__CGSCC____-NEXT: [[ADD:%.*]] = add nuw nsw i32 [[U]], 1
; IS__CGSCC____-NEXT: br label [[RETURN:%.*]]
; IS__CGSCC____: if.else:
; IS__CGSCC____-NEXT: br label [[RETURN]]
; IS__CGSCC____: return:
; IS__CGSCC____-NEXT: [[RETVAL_0:%.*]] = phi i32 [ [[ADD]], [[IF_THEN]] ], [ 1, [[IF_ELSE]] ]
; IS__CGSCC____-NEXT: ret i32 [[RETVAL_0]]
; ;
entry: entry:
%cmp = icmp sgt i32 %u, -1 %cmp = icmp sgt i32 %u, -1
br i1 %cmp, label %if.then, label %if.else br i1 %cmp, label %if.then, label %if.else
if.then: ; preds = %entry if.then: ; preds = %entry
%add = add nuw nsw i32 %u, 1 %add = add nuw nsw i32 %u, 1
br label %return br label %return
if.else: ; preds = %entry if.else: ; preds = %entry
br label %return br label %return
return: ; preds = %if.else, %if.then return: ; preds = %if.else, %if.then
%retval.0 = phi i32 [ %add, %if.then ], [ 1, %if.else ] %retval.0 = phi i32 [ %add, %if.then ], [ 1, %if.else ]
ret i32 %retval.0 ret i32 %retval.0
} }
define dso_local i32 @test4-g2(i32 %u) { define dso_local i32 @test4-g2(i32 %u) {
; IS__TUNIT_OPM: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@test4-g2 ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@test4-g2
; IS__TUNIT_OPM-SAME: (i32 [[U:%.*]]) #[[ATTR1]] { ; IS__TUNIT_OPM-SAME: (i32 [[U:%.*]]) #[[ATTR1]] {
; IS__TUNIT_OPM-NEXT: entry: ; IS__TUNIT_OPM-NEXT: entry:
; IS__TUNIT_OPM-NEXT: [[CALL:%.*]] = tail call i32 @test4-f2(i32 [[U]]) #[[ATTR1]] ; IS__TUNIT_OPM-NEXT: [[CALL:%.*]] = tail call i32 @test4-f2(i32 [[U]]) #[[ATTR5]]
; IS__TUNIT_OPM-NEXT: ret i32 [[CALL]] ; IS__TUNIT_OPM-NEXT: ret i32 [[CALL]]
; ;
; IS__TUNIT_NPM: Function Attrs: nofree nosync nounwind readnone willreturn ; IS________NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@test4-g2 ; IS________NPM-LABEL: define {{[^@]+}}@test4-g2
; IS__TUNIT_NPM-SAME: (i32 [[U:%.*]]) #[[ATTR1]] { ; IS________NPM-SAME: (i32 [[U:%.*]]) #[[ATTR1]] {
; IS__TUNIT_NPM-NEXT: entry: ; IS________NPM-NEXT: entry:
; IS__TUNIT_NPM-NEXT: [[CALL:%.*]] = tail call i32 @test4-f2(i32 [[U]]) #[[ATTR1]], !range [[RNG3:![0-9]+]] ; IS________NPM-NEXT: [[CALL:%.*]] = tail call i32 @test4-f2(i32 [[U]]) #[[ATTR4]], !range [[RNG3:![0-9]+]]
; IS__TUNIT_NPM-NEXT: ret i32 [[CALL]] ; IS________NPM-NEXT: ret i32 [[CALL]]
; ;
; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@test4-g2 ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@test4-g2
; IS__CGSCC_OPM-SAME: (i32 [[U:%.*]]) #[[ATTR1]] { ; IS__CGSCC_OPM-SAME: (i32 [[U:%.*]]) #[[ATTR1]] {
; IS__CGSCC_OPM-NEXT: entry: ; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: [[CALL:%.*]] = tail call i32 @test4-f2(i32 [[U]]) #[[ATTR5]] ; IS__CGSCC_OPM-NEXT: [[CALL:%.*]] = tail call i32 @test4-f2(i32 [[U]]) #[[ATTR6]]
; IS__CGSCC_OPM-NEXT: ret i32 [[CALL]] ; IS__CGSCC_OPM-NEXT: ret i32 [[CALL]]
; ;
; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@test4-g2
; IS__CGSCC_NPM-SAME: (i32 [[U:%.*]]) #[[ATTR1]] {
; IS__CGSCC_NPM-NEXT: entry:
; IS__CGSCC_NPM-NEXT: [[CALL:%.*]] = tail call i32 @test4-f2(i32 [[U]]) #[[ATTR4]], !range [[RNG3:![0-9]+]]
; IS__CGSCC_NPM-NEXT: ret i32 [[CALL]]
;
entry: entry:
%call = tail call i32 @test4-f2(i32 %u) %call = tail call i32 @test4-f2(i32 %u)
ret i32 %call ret i32 %call
} }
define dso_local i32 @test-5() { define dso_local i32 @test-5() {
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@test-5() { ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@test-5() {
; IS__TUNIT_OPM-NEXT: entry: ; IS__TUNIT_OPM-NEXT: entry:
▲ Show 20 Lines • Show All 82 Lines • ▼ Show 20 Lines
; Examples taken from https://llvm.discourse.group/t/impossible-condition-optimization/461/1 ; Examples taken from https://llvm.discourse.group/t/impossible-condition-optimization/461/1
; ;
; The important part is that we return a constant (false) ; The important part is that we return a constant (false)
; ;
; { ; {
; FIXME: All but the return is not needed anymore ; FIXME: All but the return is not needed anymore
define dso_local zeroext i1 @phi(i32 %arg) { define dso_local zeroext i1 @phi(i32 %arg) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@phi ; CHECK-LABEL: define {{[^@]+}}@phi
; IS__TUNIT____-SAME: (i32 [[ARG:%.*]]) #[[ATTR1]] { ; CHECK-SAME: (i32 [[ARG:%.*]]) #[[ATTR1]] {
; IS__TUNIT____-NEXT: bb: ; CHECK-NEXT: bb:
; IS__TUNIT____-NEXT: [[TMP:%.*]] = icmp sgt i32 [[ARG]], 5 ; CHECK-NEXT: [[TMP:%.*]] = icmp sgt i32 [[ARG]], 5
; IS__TUNIT____-NEXT: br i1 [[TMP]], label [[BB1:%.*]], label [[BB2:%.*]] ; CHECK-NEXT: br i1 [[TMP]], label [[BB1:%.*]], label [[BB2:%.*]]
; IS__TUNIT____: bb1: ; CHECK: bb1:
; IS__TUNIT____-NEXT: br label [[BB3:%.*]] ; CHECK-NEXT: br label [[BB3:%.*]]
; IS__TUNIT____: bb2: ; CHECK: bb2:
; IS__TUNIT____-NEXT: br label [[BB3]] ; CHECK-NEXT: br label [[BB3]]
; IS__TUNIT____: bb3: ; CHECK: bb3:
; IS__TUNIT____-NEXT: [[TMP4:%.*]] = icmp sgt i32 [[ARG]], 10 ; CHECK-NEXT: [[TMP4:%.*]] = icmp sgt i32 [[ARG]], 10
; IS__TUNIT____-NEXT: br i1 [[TMP4]], label [[BB5:%.*]], label [[BB7:%.*]] ; CHECK-NEXT: br i1 [[TMP4]], label [[BB5:%.*]], label [[BB7:%.*]]
; IS__TUNIT____: bb5: ; CHECK: bb5:
; IS__TUNIT____-NEXT: br label [[BB9:%.*]] ; CHECK-NEXT: br label [[BB9:%.*]]
; IS__TUNIT____: bb7: ; CHECK: bb7:
; IS__TUNIT____-NEXT: br label [[BB9]] ; CHECK-NEXT: br label [[BB9]]
; IS__TUNIT____: bb9: ; CHECK: bb9:
; IS__TUNIT____-NEXT: br label [[BB12:%.*]] ; CHECK-NEXT: br label [[BB12:%.*]]
; IS__TUNIT____: bb11: ; CHECK: bb11:
; IS__TUNIT____-NEXT: unreachable ; CHECK-NEXT: unreachable
; IS__TUNIT____: bb12: ; CHECK: bb12:
; IS__TUNIT____-NEXT: br label [[BB13:%.*]] ; CHECK-NEXT: br label [[BB13:%.*]]
; IS__TUNIT____: bb13: ; CHECK: bb13:
; IS__TUNIT____-NEXT: ret i1 false ; CHECK-NEXT: ret i1 false
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@phi
; IS__CGSCC____-SAME: (i32 [[ARG:%.*]]) #[[ATTR1]] {
; IS__CGSCC____-NEXT: bb:
; IS__CGSCC____-NEXT: [[TMP:%.*]] = icmp sgt i32 [[ARG]], 5
; IS__CGSCC____-NEXT: br i1 [[TMP]], label [[BB1:%.*]], label [[BB2:%.*]]
; IS__CGSCC____: bb1:
; IS__CGSCC____-NEXT: br label [[BB3:%.*]]
; IS__CGSCC____: bb2:
; IS__CGSCC____-NEXT: br label [[BB3]]
; IS__CGSCC____: bb3:
; IS__CGSCC____-NEXT: [[TMP4:%.*]] = icmp sgt i32 [[ARG]], 10
; IS__CGSCC____-NEXT: br i1 [[TMP4]], label [[BB5:%.*]], label [[BB7:%.*]]
; IS__CGSCC____: bb5:
; IS__CGSCC____-NEXT: br label [[BB9:%.*]]
; IS__CGSCC____: bb7:
; IS__CGSCC____-NEXT: br label [[BB9]]
; IS__CGSCC____: bb9:
; IS__CGSCC____-NEXT: br label [[BB12:%.*]]
; IS__CGSCC____: bb11:
; IS__CGSCC____-NEXT: unreachable
; IS__CGSCC____: bb12:
; IS__CGSCC____-NEXT: br label [[BB13:%.*]]
; IS__CGSCC____: bb13:
; IS__CGSCC____-NEXT: ret i1 false
; ;
bb: bb:
%tmp = icmp sgt i32 %arg, 5 %tmp = icmp sgt i32 %arg, 5
br i1 %tmp, label %bb1, label %bb2 br i1 %tmp, label %bb1, label %bb2
bb1: ; preds = %bb bb1: ; preds = %bb
br label %bb3 br label %bb3
Show All 25 Linesbb12: ; preds = %bb9
br label %bb13 br label %bb13
bb13: ; preds = %bb12, %bb11 bb13: ; preds = %bb12, %bb11
%.0 = phi i1 [ true, %bb11 ], [ false, %bb12 ] %.0 = phi i1 [ true, %bb11 ], [ false, %bb12 ]
ret i1 %.0 ret i1 %.0
} }
define dso_local i1 @select(i32 %a) local_unnamed_addr #0 { define dso_local i1 @select(i32 %a) local_unnamed_addr #0 {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@select ; CHECK-LABEL: define {{[^@]+}}@select
; IS__TUNIT____-SAME: (i32 [[A:%.*]]) local_unnamed_addr #[[ATTR1]] { ; CHECK-SAME: (i32 [[A:%.*]]) local_unnamed_addr #[[ATTR1]] {
; IS__TUNIT____-NEXT: entry: ; CHECK-NEXT: entry:
; IS__TUNIT____-NEXT: ret i1 false ; CHECK-NEXT: ret i1 false
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@select
; IS__CGSCC____-SAME: (i32 [[A:%.*]]) local_unnamed_addr #[[ATTR1]] {
; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: ret i1 false
; ;
entry: entry:
%cmp = icmp sgt i32 %a, 5 %cmp = icmp sgt i32 %a, 5
%. = select i1 %cmp, i32 1, i32 2 %. = select i1 %cmp, i32 1, i32 2
%cmp1 = icmp sgt i32 %a, 10 %cmp1 = icmp sgt i32 %a, 10
%y.0.v = select i1 %cmp1, i32 1, i32 2 %y.0.v = select i1 %cmp1, i32 1, i32 2
%y.0 = add nuw nsw i32 %., %y.0.v %y.0 = add nuw nsw i32 %., %y.0.v
%cmp6 = icmp eq i32 %y.0, 5 %cmp6 = icmp eq i32 %y.0, 5
ret i1 %cmp6 ret i1 %cmp6
} }
define dso_local i32 @select_zext(i32 %a) local_unnamed_addr #0 { define dso_local i32 @select_zext(i32 %a) local_unnamed_addr #0 {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@select_zext ; CHECK-LABEL: define {{[^@]+}}@select_zext
; IS__TUNIT____-SAME: (i32 [[A:%.*]]) local_unnamed_addr #[[ATTR1]] { ; CHECK-SAME: (i32 [[A:%.*]]) local_unnamed_addr #[[ATTR1]] {
; IS__TUNIT____-NEXT: entry: ; CHECK-NEXT: entry:
; IS__TUNIT____-NEXT: ret i32 0 ; CHECK-NEXT: ret i32 0
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@select_zext
; IS__CGSCC____-SAME: (i32 [[A:%.*]]) local_unnamed_addr #[[ATTR1]] {
; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: ret i32 0
; ;
entry: entry:
%cmp = icmp sgt i32 %a, 5 %cmp = icmp sgt i32 %a, 5
%. = select i1 %cmp, i32 1, i32 2 %. = select i1 %cmp, i32 1, i32 2
%cmp1 = icmp sgt i32 %a, 10 %cmp1 = icmp sgt i32 %a, 10
%y.0.v = select i1 %cmp1, i32 1, i32 2 %y.0.v = select i1 %cmp1, i32 1, i32 2
%y.0 = add nuw nsw i32 %., %y.0.v %y.0 = add nuw nsw i32 %., %y.0.v
%cmp6 = icmp eq i32 %y.0, 5 %cmp6 = icmp eq i32 %y.0, 5
%.13 = zext i1 %cmp6 to i32 %.13 = zext i1 %cmp6 to i32
ret i32 %.13 ret i32 %.13
} }
define dso_local i64 @select_int2ptr_bitcast_ptr2int(i32 %a) local_unnamed_addr #0 { define dso_local i64 @select_int2ptr_bitcast_ptr2int(i32 %a) local_unnamed_addr #0 {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@select_int2ptr_bitcast_ptr2int ; CHECK-LABEL: define {{[^@]+}}@select_int2ptr_bitcast_ptr2int
; IS__TUNIT____-SAME: (i32 [[A:%.*]]) local_unnamed_addr #[[ATTR1]] { ; CHECK-SAME: (i32 [[A:%.*]]) local_unnamed_addr #[[ATTR1]] {
; IS__TUNIT____-NEXT: entry: ; CHECK-NEXT: entry:
; IS__TUNIT____-NEXT: ret i64 0 ; CHECK-NEXT: ret i64 0
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@select_int2ptr_bitcast_ptr2int
; IS__CGSCC____-SAME: (i32 [[A:%.*]]) local_unnamed_addr #[[ATTR1]] {
; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: ret i64 0
; ;
entry: entry:
%cmp = icmp sgt i32 %a, 5 %cmp = icmp sgt i32 %a, 5
%. = select i1 %cmp, i32 1, i32 2 %. = select i1 %cmp, i32 1, i32 2
%cmp1 = icmp sgt i32 %a, 10 %cmp1 = icmp sgt i32 %a, 10
%y.0.v = select i1 %cmp1, i32 1, i32 2 %y.0.v = select i1 %cmp1, i32 1, i32 2
%y.0 = add nuw nsw i32 %., %y.0.v %y.0 = add nuw nsw i32 %., %y.0.v
%cmp6 = icmp eq i32 %y.0, 5 %cmp6 = icmp eq i32 %y.0, 5
%i2p = inttoptr i1 %cmp6 to i1* %i2p = inttoptr i1 %cmp6 to i1*
%bc = bitcast i1* %i2p to i32* %bc = bitcast i1* %i2p to i32*
%p2i = ptrtoint i32* %bc to i64 %p2i = ptrtoint i32* %bc to i64
ret i64 %p2i ret i64 %p2i
} }
; } ; }
define i1 @f_fcmp(float %a, float %b) { define i1 @f_fcmp(float %a, float %b) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@f_fcmp ; CHECK-LABEL: define {{[^@]+}}@f_fcmp
; IS__TUNIT____-SAME: (float [[A:%.*]], float [[B:%.*]]) #[[ATTR1]] { ; CHECK-SAME: (float [[A:%.*]], float [[B:%.*]]) #[[ATTR1]] {
; IS__TUNIT____-NEXT: [[R:%.*]] = fcmp uge float [[A]], [[B]] ; CHECK-NEXT: [[R:%.*]] = fcmp uge float [[A]], [[B]]
; IS__TUNIT____-NEXT: [[S:%.*]] = select i1 [[R]], i1 [[R]], i1 false ; CHECK-NEXT: [[S:%.*]] = select i1 [[R]], i1 [[R]], i1 false
; IS__TUNIT____-NEXT: ret i1 [[S]] ; CHECK-NEXT: ret i1 [[S]]
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@f_fcmp
; IS__CGSCC____-SAME: (float [[A:%.*]], float [[B:%.*]]) #[[ATTR1]] {
; IS__CGSCC____-NEXT: [[R:%.*]] = fcmp uge float [[A]], [[B]]
; IS__CGSCC____-NEXT: [[S:%.*]] = select i1 [[R]], i1 [[R]], i1 false
; IS__CGSCC____-NEXT: ret i1 [[S]]
; ;
%r = fcmp uge float %a, %b %r = fcmp uge float %a, %b
%s = select i1 %r, i1 %r, i1 0 %s = select i1 %r, i1 %r, i1 0
ret i1 %s ret i1 %s
} }
define i1 @d_fcmp(double %a, double %b) { define i1 @d_fcmp(double %a, double %b) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@d_fcmp ; CHECK-LABEL: define {{[^@]+}}@d_fcmp
; IS__TUNIT____-SAME: (double [[A:%.*]], double [[B:%.*]]) #[[ATTR1]] { ; CHECK-SAME: (double [[A:%.*]], double [[B:%.*]]) #[[ATTR1]] {
; IS__TUNIT____-NEXT: [[R:%.*]] = fcmp oeq double [[A]], [[B]] ; CHECK-NEXT: [[R:%.*]] = fcmp oeq double [[A]], [[B]]
; IS__TUNIT____-NEXT: [[S:%.*]] = select i1 [[R]], i1 [[R]], i1 false ; CHECK-NEXT: [[S:%.*]] = select i1 [[R]], i1 [[R]], i1 false
; IS__TUNIT____-NEXT: ret i1 [[S]] ; CHECK-NEXT: ret i1 [[S]]
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@d_fcmp
; IS__CGSCC____-SAME: (double [[A:%.*]], double [[B:%.*]]) #[[ATTR1]] {
; IS__CGSCC____-NEXT: [[R:%.*]] = fcmp oeq double [[A]], [[B]]
; IS__CGSCC____-NEXT: [[S:%.*]] = select i1 [[R]], i1 [[R]], i1 false
; IS__CGSCC____-NEXT: ret i1 [[S]]
; ;
%r = fcmp oeq double %a, %b %r = fcmp oeq double %a, %b
%s = select i1 %r, i1 %r, i1 0 %s = select i1 %r, i1 %r, i1 0
ret i1 %s ret i1 %s
} }
define i1 @dp_icmp(double* %a, double* %b) { define i1 @dp_icmp(double* %a, double* %b) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@dp_icmp ; CHECK-LABEL: define {{[^@]+}}@dp_icmp
; IS__TUNIT____-SAME: (double* nofree readnone [[A:%.*]], double* nofree readnone [[B:%.*]]) #[[ATTR1]] { ; CHECK-SAME: (double* nofree readnone [[A:%.*]], double* nofree readnone [[B:%.*]]) #[[ATTR1]] {
; IS__TUNIT____-NEXT: [[R:%.*]] = icmp sge double* [[A]], [[B]] ; CHECK-NEXT: [[R:%.*]] = icmp sge double* [[A]], [[B]]
; IS__TUNIT____-NEXT: [[S:%.*]] = select i1 [[R]], i1 [[R]], i1 false ; CHECK-NEXT: [[S:%.*]] = select i1 [[R]], i1 [[R]], i1 false
; IS__TUNIT____-NEXT: ret i1 [[S]] ; CHECK-NEXT: ret i1 [[S]]
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@dp_icmp
; IS__CGSCC____-SAME: (double* nofree readnone [[A:%.*]], double* nofree readnone [[B:%.*]]) #[[ATTR1]] {
; IS__CGSCC____-NEXT: [[R:%.*]] = icmp sge double* [[A]], [[B]]
; IS__CGSCC____-NEXT: [[S:%.*]] = select i1 [[R]], i1 [[R]], i1 false
; IS__CGSCC____-NEXT: ret i1 [[S]]
; ;
%r = icmp sge double* %a, %b %r = icmp sge double* %a, %b
%s = select i1 %r, i1 %r, i1 0 %s = select i1 %r, i1 %r, i1 0
ret i1 %s ret i1 %s
} }
define i1 @ip_icmp(i8* %a, i8* %b) { define i1 @ip_icmp(i8* %a, i8* %b) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@ip_icmp ; CHECK-LABEL: define {{[^@]+}}@ip_icmp
; IS__TUNIT____-SAME: (i8* nofree readnone [[A:%.*]], i8* nofree readnone [[B:%.*]]) #[[ATTR1]] { ; CHECK-SAME: (i8* nofree readnone [[A:%.*]], i8* nofree readnone [[B:%.*]]) #[[ATTR1]] {
; IS__TUNIT____-NEXT: [[R:%.*]] = icmp ult i8* [[A]], [[B]] ; CHECK-NEXT: [[R:%.*]] = icmp ult i8* [[A]], [[B]]
; IS__TUNIT____-NEXT: [[S:%.*]] = select i1 [[R]], i1 [[R]], i1 false ; CHECK-NEXT: [[S:%.*]] = select i1 [[R]], i1 [[R]], i1 false
; IS__TUNIT____-NEXT: ret i1 [[S]] ; CHECK-NEXT: ret i1 [[S]]
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@ip_icmp
; IS__CGSCC____-SAME: (i8* nofree readnone [[A:%.*]], i8* nofree readnone [[B:%.*]]) #[[ATTR1]] {
; IS__CGSCC____-NEXT: [[R:%.*]] = icmp ult i8* [[A]], [[B]]
; IS__CGSCC____-NEXT: [[S:%.*]] = select i1 [[R]], i1 [[R]], i1 false
; IS__CGSCC____-NEXT: ret i1 [[S]]
; ;
%r = icmp ult i8* %a, %b %r = icmp ult i8* %a, %b
%s = select i1 %r, i1 %r, i1 0 %s = select i1 %r, i1 %r, i1 0
ret i1 %s ret i1 %s
} }
define i1 @fcmp_caller(float %fa, float %fb, double %da, double %db, double* %dpa, double* %dpb, i8* %ipa, i8* %ipb) { define i1 @fcmp_caller(float %fa, float %fb, double %da, double %db, double* %dpa, double* %dpb, i8* %ipa, i8* %ipb) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@fcmp_caller ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@fcmp_caller
; IS__TUNIT____-SAME: (float [[FA:%.*]], float [[FB:%.*]], double [[DA:%.*]], double [[DB:%.*]], double* nofree readnone [[DPA:%.*]], double* nofree readnone [[DPB:%.*]], i8* nofree readnone [[IPA:%.*]], i8* nofree readnone [[IPB:%.*]]) #[[ATTR1]] { ; IS__TUNIT_OPM-SAME: (float [[FA:%.*]], float [[FB:%.*]], double [[DA:%.*]], double [[DB:%.*]], double* nofree readnone [[DPA:%.*]], double* nofree readnone [[DPB:%.*]], i8* nofree readnone [[IPA:%.*]], i8* nofree readnone [[IPB:%.*]]) #[[ATTR1]] {
; IS__TUNIT____-NEXT: [[R1:%.*]] = call i1 @f_fcmp(float [[FA]], float [[FB]]) #[[ATTR1]] ; IS__TUNIT_OPM-NEXT: [[R1:%.*]] = call i1 @f_fcmp(float [[FA]], float [[FB]]) #[[ATTR5]]
; IS__TUNIT____-NEXT: [[R2:%.*]] = call i1 @d_fcmp(double [[DA]], double [[DB]]) #[[ATTR1]] ; IS__TUNIT_OPM-NEXT: [[R2:%.*]] = call i1 @d_fcmp(double [[DA]], double [[DB]]) #[[ATTR5]]
; IS__TUNIT____-NEXT: [[R3:%.*]] = call i1 @dp_icmp(double* noalias nofree readnone [[DPA]], double* noalias nofree readnone [[DPB]]) #[[ATTR1]] ; IS__TUNIT_OPM-NEXT: [[R3:%.*]] = call i1 @dp_icmp(double* noalias nofree readnone [[DPA]], double* noalias nofree readnone [[DPB]]) #[[ATTR5]]
; IS__TUNIT____-NEXT: [[R4:%.*]] = call i1 @ip_icmp(i8* noalias nofree readnone [[IPA]], i8* noalias nofree readnone [[IPB]]) #[[ATTR1]] ; IS__TUNIT_OPM-NEXT: [[R4:%.*]] = call i1 @ip_icmp(i8* noalias nofree readnone [[IPA]], i8* noalias nofree readnone [[IPB]]) #[[ATTR5]]
; IS__TUNIT____-NEXT: [[O1:%.*]] = or i1 [[R1]], [[R2]] ; IS__TUNIT_OPM-NEXT: [[O1:%.*]] = or i1 [[R1]], [[R2]]
; IS__TUNIT____-NEXT: [[O2:%.*]] = or i1 [[R3]], [[R4]] ; IS__TUNIT_OPM-NEXT: [[O2:%.*]] = or i1 [[R3]], [[R4]]
; IS__TUNIT____-NEXT: [[O3:%.*]] = or i1 [[O1]], [[O2]] ; IS__TUNIT_OPM-NEXT: [[O3:%.*]] = or i1 [[O1]], [[O2]]
; IS__TUNIT____-NEXT: ret i1 [[O3]] ; IS__TUNIT_OPM-NEXT: ret i1 [[O3]]
;
; IS________NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS________NPM-LABEL: define {{[^@]+}}@fcmp_caller
; IS________NPM-SAME: (float [[FA:%.*]], float [[FB:%.*]], double [[DA:%.*]], double [[DB:%.*]], double* nofree readnone [[DPA:%.*]], double* nofree readnone [[DPB:%.*]], i8* nofree readnone [[IPA:%.*]], i8* nofree readnone [[IPB:%.*]]) #[[ATTR1]] {
; IS________NPM-NEXT: [[R1:%.*]] = call i1 @f_fcmp(float [[FA]], float [[FB]]) #[[ATTR4]]
; IS________NPM-NEXT: [[R2:%.*]] = call i1 @d_fcmp(double [[DA]], double [[DB]]) #[[ATTR4]]
; IS________NPM-NEXT: [[R3:%.*]] = call i1 @dp_icmp(double* noalias nofree readnone [[DPA]], double* noalias nofree readnone [[DPB]]) #[[ATTR4]]
; IS________NPM-NEXT: [[R4:%.*]] = call i1 @ip_icmp(i8* noalias nofree readnone [[IPA]], i8* noalias nofree readnone [[IPB]]) #[[ATTR4]]
; IS________NPM-NEXT: [[O1:%.*]] = or i1 [[R1]], [[R2]]
; IS________NPM-NEXT: [[O2:%.*]] = or i1 [[R3]], [[R4]]
; IS________NPM-NEXT: [[O3:%.*]] = or i1 [[O1]], [[O2]]
; IS________NPM-NEXT: ret i1 [[O3]]
; ;
; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@fcmp_caller ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@fcmp_caller
; IS__CGSCC_OPM-SAME: (float [[FA:%.*]], float [[FB:%.*]], double [[DA:%.*]], double [[DB:%.*]], double* nofree readnone [[DPA:%.*]], double* nofree readnone [[DPB:%.*]], i8* nofree readnone [[IPA:%.*]], i8* nofree readnone [[IPB:%.*]]) #[[ATTR1]] { ; IS__CGSCC_OPM-SAME: (float [[FA:%.*]], float [[FB:%.*]], double [[DA:%.*]], double [[DB:%.*]], double* nofree readnone [[DPA:%.*]], double* nofree readnone [[DPB:%.*]], i8* nofree readnone [[IPA:%.*]], i8* nofree readnone [[IPB:%.*]]) #[[ATTR1]] {
; IS__CGSCC_OPM-NEXT: [[R1:%.*]] = call i1 @f_fcmp(float [[FA]], float [[FB]]) #[[ATTR5]] ; IS__CGSCC_OPM-NEXT: [[R1:%.*]] = call i1 @f_fcmp(float [[FA]], float [[FB]]) #[[ATTR6]]
; IS__CGSCC_OPM-NEXT: [[R2:%.*]] = call i1 @d_fcmp(double [[DA]], double [[DB]]) #[[ATTR5]] ; IS__CGSCC_OPM-NEXT: [[R2:%.*]] = call i1 @d_fcmp(double [[DA]], double [[DB]]) #[[ATTR6]]
; IS__CGSCC_OPM-NEXT: [[R3:%.*]] = call i1 @dp_icmp(double* noalias nofree readnone [[DPA]], double* noalias nofree readnone [[DPB]]) #[[ATTR5]] ; IS__CGSCC_OPM-NEXT: [[R3:%.*]] = call i1 @dp_icmp(double* noalias nofree readnone [[DPA]], double* noalias nofree readnone [[DPB]]) #[[ATTR6]]
; IS__CGSCC_OPM-NEXT: [[R4:%.*]] = call i1 @ip_icmp(i8* noalias nofree readnone [[IPA]], i8* noalias nofree readnone [[IPB]]) #[[ATTR5]] ; IS__CGSCC_OPM-NEXT: [[R4:%.*]] = call i1 @ip_icmp(i8* noalias nofree readnone [[IPA]], i8* noalias nofree readnone [[IPB]]) #[[ATTR6]]
; IS__CGSCC_OPM-NEXT: [[O1:%.*]] = or i1 [[R1]], [[R2]] ; IS__CGSCC_OPM-NEXT: [[O1:%.*]] = or i1 [[R1]], [[R2]]
; IS__CGSCC_OPM-NEXT: [[O2:%.*]] = or i1 [[R3]], [[R4]] ; IS__CGSCC_OPM-NEXT: [[O2:%.*]] = or i1 [[R3]], [[R4]]
; IS__CGSCC_OPM-NEXT: [[O3:%.*]] = or i1 [[O1]], [[O2]] ; IS__CGSCC_OPM-NEXT: [[O3:%.*]] = or i1 [[O1]], [[O2]]
; IS__CGSCC_OPM-NEXT: ret i1 [[O3]] ; IS__CGSCC_OPM-NEXT: ret i1 [[O3]]
; ;
; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@fcmp_caller
; IS__CGSCC_NPM-SAME: (float [[FA:%.*]], float [[FB:%.*]], double [[DA:%.*]], double [[DB:%.*]], double* nofree readnone [[DPA:%.*]], double* nofree readnone [[DPB:%.*]], i8* nofree readnone [[IPA:%.*]], i8* nofree readnone [[IPB:%.*]]) #[[ATTR1]] {
; IS__CGSCC_NPM-NEXT: [[R1:%.*]] = call i1 @f_fcmp(float [[FA]], float [[FB]]) #[[ATTR4]]
; IS__CGSCC_NPM-NEXT: [[R2:%.*]] = call i1 @d_fcmp(double [[DA]], double [[DB]]) #[[ATTR4]]
; IS__CGSCC_NPM-NEXT: [[R3:%.*]] = call i1 @dp_icmp(double* noalias nofree readnone [[DPA]], double* noalias nofree readnone [[DPB]]) #[[ATTR4]]
; IS__CGSCC_NPM-NEXT: [[R4:%.*]] = call i1 @ip_icmp(i8* noalias nofree readnone [[IPA]], i8* noalias nofree readnone [[IPB]]) #[[ATTR4]]
; IS__CGSCC_NPM-NEXT: [[O1:%.*]] = or i1 [[R1]], [[R2]]
; IS__CGSCC_NPM-NEXT: [[O2:%.*]] = or i1 [[R3]], [[R4]]
; IS__CGSCC_NPM-NEXT: [[O3:%.*]] = or i1 [[O1]], [[O2]]
; IS__CGSCC_NPM-NEXT: ret i1 [[O3]]
;
%r1 = call i1 @f_fcmp(float %fa, float %fb) %r1 = call i1 @f_fcmp(float %fa, float %fb)
%r2 = call i1 @d_fcmp(double %da, double %db) %r2 = call i1 @d_fcmp(double %da, double %db)
%r3 = call i1 @dp_icmp(double* %dpa, double* %dpb) %r3 = call i1 @dp_icmp(double* %dpa, double* %dpb)
%r4 = call i1 @ip_icmp(i8* %ipa, i8* %ipb) %r4 = call i1 @ip_icmp(i8* %ipa, i8* %ipb)
%o1 = or i1 %r1, %r2 %o1 = or i1 %r1, %r2
%o2 = or i1 %r3, %r4 %o2 = or i1 %r3, %r4
%o3 = or i1 %o1, %o2 %o3 = or i1 %o1, %o2
ret i1 %o3 ret i1 %o3
} }
define i8 @ret_two() { define i8 @ret_two() {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@ret_two ; CHECK-LABEL: define {{[^@]+}}@ret_two
; IS__TUNIT____-SAME: () #[[ATTR1]] { ; CHECK-SAME: () #[[ATTR1]] {
; IS__TUNIT____-NEXT: ret i8 2 ; CHECK-NEXT: ret i8 2
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@ret_two
; IS__CGSCC____-SAME: () #[[ATTR1]] {
; IS__CGSCC____-NEXT: ret i8 2
; ;
ret i8 2 ret i8 2
} }
define i8 @ret_undef() { define i8 @ret_undef() {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@ret_undef ; CHECK-LABEL: define {{[^@]+}}@ret_undef
; IS__TUNIT____-SAME: () #[[ATTR1]] { ; CHECK-SAME: () #[[ATTR1]] {
; IS__TUNIT____-NEXT: ret i8 undef ; CHECK-NEXT: ret i8 undef
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@ret_undef
; IS__CGSCC____-SAME: () #[[ATTR1]] {
; IS__CGSCC____-NEXT: ret i8 undef
; ;
ret i8 undef ret i8 undef
} }
; Verify we collapse undef to a value and return something non-undef here. ; Verify we collapse undef to a value and return something non-undef here.
define i8 @undef_collapse_1() { define i8 @undef_collapse_1() {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@undef_collapse_1 ; CHECK-LABEL: define {{[^@]+}}@undef_collapse_1
; IS__TUNIT____-SAME: () #[[ATTR1]] { ; CHECK-SAME: () #[[ATTR1]] {
; IS__TUNIT____-NEXT: ret i8 0 ; CHECK-NEXT: ret i8 0
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@undef_collapse_1
; IS__CGSCC____-SAME: () #[[ATTR1]] {
; IS__CGSCC____-NEXT: ret i8 0
; ;
%c = call i8 @ret_undef() %c = call i8 @ret_undef()
%s = shl i8 %c, 2 %s = shl i8 %c, 2
ret i8 %s ret i8 %s
} }
; Verify we collapse undef to a value and return something non-undef here. ; Verify we collapse undef to a value and return something non-undef here.
define i8 @undef_collapse_2() { define i8 @undef_collapse_2() {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@undef_collapse_2 ; CHECK-LABEL: define {{[^@]+}}@undef_collapse_2
; IS__TUNIT____-SAME: () #[[ATTR1]] { ; CHECK-SAME: () #[[ATTR1]] {
; IS__TUNIT____-NEXT: ret i8 0 ; CHECK-NEXT: ret i8 0
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@undef_collapse_2
; IS__CGSCC____-SAME: () #[[ATTR1]] {
; IS__CGSCC____-NEXT: ret i8 0
; ;
%c = call i8 @ret_two() %c = call i8 @ret_two()
%s = shl i8 undef, %c %s = shl i8 undef, %c
ret i8 %s ret i8 %s
} }
define i8 @undef_collapse_caller() { define i8 @undef_collapse_caller() {
; ;
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@undef_collapse_caller ; CHECK-LABEL: define {{[^@]+}}@undef_collapse_caller
; IS__TUNIT____-SAME: () #[[ATTR1]] { ; CHECK-SAME: () #[[ATTR1]] {
; IS__TUNIT____-NEXT: ret i8 0 ; CHECK-NEXT: ret i8 0
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@undef_collapse_caller
; IS__CGSCC____-SAME: () #[[ATTR1]] {
; IS__CGSCC____-NEXT: ret i8 0
; ;
%c1 = call i8 @undef_collapse_1() %c1 = call i8 @undef_collapse_1()
%c2 = call i8 @undef_collapse_2() %c2 = call i8 @undef_collapse_2()
%a = add i8 %c1, %c2 %a = add i8 %c1, %c2
ret i8 %a ret i8 %a
} }
define i32 @ret1or2(i1 %c) { define i32 @ret1or2(i1 %c) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@ret1or2 ; CHECK-LABEL: define {{[^@]+}}@ret1or2
; IS__TUNIT____-SAME: (i1 [[C:%.*]]) #[[ATTR1]] { ; CHECK-SAME: (i1 [[C:%.*]]) #[[ATTR1]] {
; IS__TUNIT____-NEXT: [[S:%.*]] = select i1 [[C]], i32 1, i32 2 ; CHECK-NEXT: [[S:%.*]] = select i1 [[C]], i32 1, i32 2
; IS__TUNIT____-NEXT: ret i32 [[S]] ; CHECK-NEXT: ret i32 [[S]]
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@ret1or2
; IS__CGSCC____-SAME: (i1 [[C:%.*]]) #[[ATTR1]] {
; IS__CGSCC____-NEXT: [[S:%.*]] = select i1 [[C]], i32 1, i32 2
; IS__CGSCC____-NEXT: ret i32 [[S]]
; ;
%s = select i1 %c, i32 1, i32 2 %s = select i1 %c, i32 1, i32 2
ret i32 %s ret i32 %s
} }
define i1 @callee_range_1(i1 %c1, i1 %c2, i1 %c3) { define i1 @callee_range_1(i1 %c1, i1 %c2, i1 %c3) {
; ;
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@callee_range_1 ; CHECK-LABEL: define {{[^@]+}}@callee_range_1
; IS__TUNIT____-SAME: (i1 [[C1:%.*]], i1 [[C2:%.*]], i1 [[C3:%.*]]) #[[ATTR1]] { ; CHECK-SAME: (i1 [[C1:%.*]], i1 [[C2:%.*]], i1 [[C3:%.*]]) #[[ATTR1]] {
; IS__TUNIT____-NEXT: ret i1 true ; CHECK-NEXT: ret i1 true
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@callee_range_1
; IS__CGSCC____-SAME: (i1 [[C1:%.*]], i1 [[C2:%.*]], i1 [[C3:%.*]]) #[[ATTR1]] {
; IS__CGSCC____-NEXT: ret i1 true
; ;
%r1 = call i32 @ret1or2(i1 %c1) %r1 = call i32 @ret1or2(i1 %c1)
%r2 = call i32 @ret1or2(i1 %c2) %r2 = call i32 @ret1or2(i1 %c2)
%indirection = select i1 %c3, i32 %r1, i32 %r2 %indirection = select i1 %c3, i32 %r1, i32 %r2
%a = add i32 %r1, %indirection %a = add i32 %r1, %indirection
%i1 = icmp sle i32 %a, 4 %i1 = icmp sle i32 %a, 4
%i2 = icmp sge i32 %a, 2 %i2 = icmp sge i32 %a, 2
%f = and i1 %i1, %i2 %f = and i1 %i1, %i2
ret i1 %f ret i1 %f
} }
define i1 @callee_range_2(i1 %c1, i1 %c2) { define i1 @callee_range_2(i1 %c1, i1 %c2) {
; ;
; IS__TUNIT_OPM: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@callee_range_2 ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@callee_range_2
; IS__TUNIT_OPM-SAME: (i1 [[C1:%.*]], i1 [[C2:%.*]]) #[[ATTR1]] { ; IS__TUNIT_OPM-SAME: (i1 [[C1:%.*]], i1 [[C2:%.*]]) #[[ATTR1]] {
; IS__TUNIT_OPM-NEXT: [[R1:%.*]] = call i32 @ret1or2(i1 [[C1]]) #[[ATTR1]], !range [[RNG4:![0-9]+]] ; IS__TUNIT_OPM-NEXT: [[R1:%.*]] = call i32 @ret1or2(i1 [[C1]]) #[[ATTR5]], !range [[RNG4:![0-9]+]]
; IS__TUNIT_OPM-NEXT: [[R2:%.*]] = call i32 @ret1or2(i1 [[C2]]) #[[ATTR1]], !range [[RNG4]] ; IS__TUNIT_OPM-NEXT: [[R2:%.*]] = call i32 @ret1or2(i1 [[C2]]) #[[ATTR5]], !range [[RNG4]]
; IS__TUNIT_OPM-NEXT: [[A:%.*]] = add i32 [[R1]], [[R2]] ; IS__TUNIT_OPM-NEXT: [[A:%.*]] = add i32 [[R1]], [[R2]]
; IS__TUNIT_OPM-NEXT: [[I1:%.*]] = icmp sle i32 [[A]], 3 ; IS__TUNIT_OPM-NEXT: [[I1:%.*]] = icmp sle i32 [[A]], 3
; IS__TUNIT_OPM-NEXT: [[F:%.*]] = and i1 [[I1]], true ; IS__TUNIT_OPM-NEXT: [[F:%.*]] = and i1 [[I1]], true
; IS__TUNIT_OPM-NEXT: ret i1 [[F]] ; IS__TUNIT_OPM-NEXT: ret i1 [[F]]
; ;
; IS__TUNIT_NPM: Function Attrs: nofree nosync nounwind readnone willreturn ; IS________NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@callee_range_2 ; IS________NPM-LABEL: define {{[^@]+}}@callee_range_2
; IS__TUNIT_NPM-SAME: (i1 [[C1:%.*]], i1 [[C2:%.*]]) #[[ATTR1]] { ; IS________NPM-SAME: (i1 [[C1:%.*]], i1 [[C2:%.*]]) #[[ATTR1]] {
; IS__TUNIT_NPM-NEXT: [[R1:%.*]] = call i32 @ret1or2(i1 [[C1]]) #[[ATTR1]], !range [[RNG5:![0-9]+]] ; IS________NPM-NEXT: [[R1:%.*]] = call i32 @ret1or2(i1 [[C1]]) #[[ATTR4]], !range [[RNG5:![0-9]+]]
; IS__TUNIT_NPM-NEXT: [[R2:%.*]] = call i32 @ret1or2(i1 [[C2]]) #[[ATTR1]], !range [[RNG5]] ; IS________NPM-NEXT: [[R2:%.*]] = call i32 @ret1or2(i1 [[C2]]) #[[ATTR4]], !range [[RNG5]]
; IS__TUNIT_NPM-NEXT: [[A:%.*]] = add i32 [[R1]], [[R2]] ; IS________NPM-NEXT: [[A:%.*]] = add i32 [[R1]], [[R2]]
; IS__TUNIT_NPM-NEXT: [[I1:%.*]] = icmp sle i32 [[A]], 3 ; IS________NPM-NEXT: [[I1:%.*]] = icmp sle i32 [[A]], 3
; IS__TUNIT_NPM-NEXT: ret i1 [[I1]] ; IS________NPM-NEXT: ret i1 [[I1]]
; ;
; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@callee_range_2 ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@callee_range_2
; IS__CGSCC_OPM-SAME: (i1 [[C1:%.*]], i1 [[C2:%.*]]) #[[ATTR1]] { ; IS__CGSCC_OPM-SAME: (i1 [[C1:%.*]], i1 [[C2:%.*]]) #[[ATTR1]] {
; IS__CGSCC_OPM-NEXT: [[R1:%.*]] = call i32 @ret1or2(i1 [[C1]]) #[[ATTR5]], !range [[RNG5:![0-9]+]] ; IS__CGSCC_OPM-NEXT: [[R1:%.*]] = call i32 @ret1or2(i1 [[C1]]) #[[ATTR6]], !range [[RNG5:![0-9]+]]
; IS__CGSCC_OPM-NEXT: [[R2:%.*]] = call i32 @ret1or2(i1 [[C2]]) #[[ATTR5]], !range [[RNG5]] ; IS__CGSCC_OPM-NEXT: [[R2:%.*]] = call i32 @ret1or2(i1 [[C2]]) #[[ATTR6]], !range [[RNG5]]
; IS__CGSCC_OPM-NEXT: [[A:%.*]] = add i32 [[R1]], [[R2]] ; IS__CGSCC_OPM-NEXT: [[A:%.*]] = add i32 [[R1]], [[R2]]
; IS__CGSCC_OPM-NEXT: [[I1:%.*]] = icmp sle i32 [[A]], 3 ; IS__CGSCC_OPM-NEXT: [[I1:%.*]] = icmp sle i32 [[A]], 3
; IS__CGSCC_OPM-NEXT: [[F:%.*]] = and i1 [[I1]], true ; IS__CGSCC_OPM-NEXT: [[F:%.*]] = and i1 [[I1]], true
; IS__CGSCC_OPM-NEXT: ret i1 [[F]] ; IS__CGSCC_OPM-NEXT: ret i1 [[F]]
; ;
; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@callee_range_2
; IS__CGSCC_NPM-SAME: (i1 [[C1:%.*]], i1 [[C2:%.*]]) #[[ATTR1]] {
; IS__CGSCC_NPM-NEXT: [[R1:%.*]] = call i32 @ret1or2(i1 [[C1]]) #[[ATTR4]], !range [[RNG5:![0-9]+]]
; IS__CGSCC_NPM-NEXT: [[R2:%.*]] = call i32 @ret1or2(i1 [[C2]]) #[[ATTR4]], !range [[RNG5]]
; IS__CGSCC_NPM-NEXT: [[A:%.*]] = add i32 [[R1]], [[R2]]
; IS__CGSCC_NPM-NEXT: [[I1:%.*]] = icmp sle i32 [[A]], 3
; IS__CGSCC_NPM-NEXT: ret i1 [[I1]]
;
%r1 = call i32 @ret1or2(i1 %c1) %r1 = call i32 @ret1or2(i1 %c1)
%r2 = call i32 @ret1or2(i1 %c2) %r2 = call i32 @ret1or2(i1 %c2)
%a = add i32 %r1, %r2 %a = add i32 %r1, %r2
%i1 = icmp sle i32 %a, 3 %i1 = icmp sle i32 %a, 3
%i2 = icmp sge i32 %a, 2 %i2 = icmp sge i32 %a, 2
%f = and i1 %i1, %i2 %f = and i1 %i1, %i2
ret i1 %f ret i1 %f
} }
define i32 @ret100() { define i32 @ret100() {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@ret100 ; CHECK-LABEL: define {{[^@]+}}@ret100
; IS__TUNIT____-SAME: () #[[ATTR1]] { ; CHECK-SAME: () #[[ATTR1]] {
; IS__TUNIT____-NEXT: ret i32 100 ; CHECK-NEXT: ret i32 100
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@ret100
; IS__CGSCC____-SAME: () #[[ATTR1]] {
; IS__CGSCC____-NEXT: ret i32 100
; ;
ret i32 100 ret i32 100
} }
define i1 @ctx_adjustment(i32 %V) { define i1 @ctx_adjustment(i32 %V) {
; ;
; IS__TUNIT_OPM: Function Attrs: nofree nosync nounwind readnone willreturn ; IS________OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@ctx_adjustment ; IS________OPM-LABEL: define {{[^@]+}}@ctx_adjustment
; IS__TUNIT_OPM-SAME: (i32 [[V:%.*]]) #[[ATTR1]] { ; IS________OPM-SAME: (i32 [[V:%.*]]) #[[ATTR1]] {
; IS__TUNIT_OPM-NEXT: [[C1:%.*]] = icmp sge i32 [[V]], 100 ; IS________OPM-NEXT: [[C1:%.*]] = icmp sge i32 [[V]], 100
; IS__TUNIT_OPM-NEXT: br i1 [[C1]], label [[IF_TRUE:%.*]], label [[IF_FALSE:%.*]] ; IS________OPM-NEXT: br i1 [[C1]], label [[IF_TRUE:%.*]], label [[IF_FALSE:%.*]]
; IS__TUNIT_OPM: if.true: ; IS________OPM: if.true:
; IS__TUNIT_OPM-NEXT: br label [[END:%.*]] ; IS________OPM-NEXT: br label [[END:%.*]]
; IS__TUNIT_OPM: if.false: ; IS________OPM: if.false:
; IS__TUNIT_OPM-NEXT: br label [[END]] ; IS________OPM-NEXT: br label [[END]]
; IS__TUNIT_OPM: end: ; IS________OPM: end:
; IS__TUNIT_OPM-NEXT: [[PHI:%.*]] = phi i32 [ [[V]], [[IF_TRUE]] ], [ 100, [[IF_FALSE]] ] ; IS________OPM-NEXT: [[PHI:%.*]] = phi i32 [ [[V]], [[IF_TRUE]] ], [ 100, [[IF_FALSE]] ]
; IS__TUNIT_OPM-NEXT: [[C2:%.*]] = icmp sge i32 [[PHI]], 100 ; IS________OPM-NEXT: [[C2:%.*]] = icmp sge i32 [[PHI]], 100
; IS__TUNIT_OPM-NEXT: ret i1 [[C2]] ; IS________OPM-NEXT: ret i1 [[C2]]
; ;
; IS__TUNIT_NPM: Function Attrs: nofree nosync nounwind readnone willreturn ; IS________NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@ctx_adjustment ; IS________NPM-LABEL: define {{[^@]+}}@ctx_adjustment
; IS__TUNIT_NPM-SAME: (i32 [[V:%.*]]) #[[ATTR1]] { ; IS________NPM-SAME: (i32 [[V:%.*]]) #[[ATTR1]] {
; IS__TUNIT_NPM-NEXT: [[C1:%.*]] = icmp sge i32 [[V]], 100 ; IS________NPM-NEXT: [[C1:%.*]] = icmp sge i32 [[V]], 100
; IS__TUNIT_NPM-NEXT: br i1 [[C1]], label [[IF_TRUE:%.*]], label [[IF_FALSE:%.*]] ; IS________NPM-NEXT: br i1 [[C1]], label [[IF_TRUE:%.*]], label [[IF_FALSE:%.*]]
; IS__TUNIT_NPM: if.true: ; IS________NPM: if.true:
; IS__TUNIT_NPM-NEXT: br label [[END:%.*]] ; IS________NPM-NEXT: br label [[END:%.*]]
; IS__TUNIT_NPM: if.false: ; IS________NPM: if.false:
; IS__TUNIT_NPM-NEXT: br label [[END]] ; IS________NPM-NEXT: br label [[END]]
; IS__TUNIT_NPM: end: ; IS________NPM: end:
; IS__TUNIT_NPM-NEXT: ret i1 true ; IS________NPM-NEXT: ret i1 true
;
; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@ctx_adjustment
; IS__CGSCC_OPM-SAME: (i32 [[V:%.*]]) #[[ATTR1]] {
; IS__CGSCC_OPM-NEXT: [[C1:%.*]] = icmp sge i32 [[V]], 100
; IS__CGSCC_OPM-NEXT: br i1 [[C1]], label [[IF_TRUE:%.*]], label [[IF_FALSE:%.*]]
; IS__CGSCC_OPM: if.true:
; IS__CGSCC_OPM-NEXT: br label [[END:%.*]]
; IS__CGSCC_OPM: if.false:
; IS__CGSCC_OPM-NEXT: br label [[END]]
; IS__CGSCC_OPM: end:
; IS__CGSCC_OPM-NEXT: [[PHI:%.*]] = phi i32 [ [[V]], [[IF_TRUE]] ], [ 100, [[IF_FALSE]] ]
; IS__CGSCC_OPM-NEXT: [[C2:%.*]] = icmp sge i32 [[PHI]], 100
; IS__CGSCC_OPM-NEXT: ret i1 [[C2]]
;
; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@ctx_adjustment
; IS__CGSCC_NPM-SAME: (i32 [[V:%.*]]) #[[ATTR1]] {
; IS__CGSCC_NPM-NEXT: [[C1:%.*]] = icmp sge i32 [[V]], 100
; IS__CGSCC_NPM-NEXT: br i1 [[C1]], label [[IF_TRUE:%.*]], label [[IF_FALSE:%.*]]
; IS__CGSCC_NPM: if.true:
; IS__CGSCC_NPM-NEXT: br label [[END:%.*]]
; IS__CGSCC_NPM: if.false:
; IS__CGSCC_NPM-NEXT: br label [[END]]
; IS__CGSCC_NPM: end:
; IS__CGSCC_NPM-NEXT: ret i1 true
; ;
%c1 = icmp sge i32 %V, 100 %c1 = icmp sge i32 %V, 100
br i1 %c1, label %if.true, label %if.false br i1 %c1, label %if.true, label %if.false
if.true: if.true:
br label %end br label %end
if.false: if.false:
%call = call i32 @ret100() %call = call i32 @ret100()
br label %end br label %end
end: end:
%phi = phi i32 [ %V, %if.true ], [ %call, %if.false ] %phi = phi i32 [ %V, %if.true ], [ %call, %if.false ]
%c2 = icmp sge i32 %phi, 100 %c2 = icmp sge i32 %phi, 100
ret i1 %c2 ret i1 %c2
} }
define i32 @func(i1 %c) { define i32 @func(i1 %c) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@func ; CHECK-LABEL: define {{[^@]+}}@func
; IS__TUNIT____-SAME: (i1 [[C:%.*]]) #[[ATTR1]] { ; CHECK-SAME: (i1 [[C:%.*]]) #[[ATTR1]] {
; IS__TUNIT____-NEXT: [[RET:%.*]] = select i1 [[C]], i32 0, i32 1 ; CHECK-NEXT: [[RET:%.*]] = select i1 [[C]], i32 0, i32 1
; IS__TUNIT____-NEXT: ret i32 [[RET]] ; CHECK-NEXT: ret i32 [[RET]]
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@func
; IS__CGSCC____-SAME: (i1 [[C:%.*]]) #[[ATTR1]] {
; IS__CGSCC____-NEXT: [[RET:%.*]] = select i1 [[C]], i32 0, i32 1
; IS__CGSCC____-NEXT: ret i32 [[RET]]
; ;
%ret = select i1 %c, i32 0, i32 1 %ret = select i1 %c, i32 0, i32 1
ret i32 %ret ret i32 %ret
} }
define i32 @simplify_callsite_argument(i1 %d) { define i32 @simplify_callsite_argument(i1 %d) {
; IS__TUNIT_OPM: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@simplify_callsite_argument ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@simplify_callsite_argument
; IS__TUNIT_OPM-SAME: (i1 [[D:%.*]]) #[[ATTR1]] { ; IS__TUNIT_OPM-SAME: (i1 [[D:%.*]]) #[[ATTR1]] {
; IS__TUNIT_OPM-NEXT: [[C:%.*]] = select i1 [[D]], i1 true, i1 false ; IS__TUNIT_OPM-NEXT: [[C:%.*]] = select i1 [[D]], i1 true, i1 false
; IS__TUNIT_OPM-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]] ; IS__TUNIT_OPM-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]]
; IS__TUNIT_OPM: t: ; IS__TUNIT_OPM: t:
; IS__TUNIT_OPM-NEXT: [[RET1:%.*]] = call noundef i32 @func(i1 noundef [[C]]) #[[ATTR1]], !range [[RNG3]] ; IS__TUNIT_OPM-NEXT: [[RET1:%.*]] = call noundef i32 @func(i1 noundef [[C]]) #[[ATTR5]], !range [[RNG3]]
; IS__TUNIT_OPM-NEXT: ret i32 [[RET1]] ; IS__TUNIT_OPM-NEXT: ret i32 [[RET1]]
; IS__TUNIT_OPM: f: ; IS__TUNIT_OPM: f:
; IS__TUNIT_OPM-NEXT: [[RET2:%.*]] = call noundef i32 @func(i1 noundef false) #[[ATTR1]], !range [[RNG3]] ; IS__TUNIT_OPM-NEXT: [[RET2:%.*]] = call noundef i32 @func(i1 noundef false) #[[ATTR5]], !range [[RNG3]]
; IS__TUNIT_OPM-NEXT: ret i32 [[RET2]] ; IS__TUNIT_OPM-NEXT: ret i32 [[RET2]]
; ;
; IS__TUNIT_NPM: Function Attrs: nofree nosync nounwind readnone willreturn ; IS________NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@simplify_callsite_argument ; IS________NPM-LABEL: define {{[^@]+}}@simplify_callsite_argument
; IS__TUNIT_NPM-SAME: (i1 [[D:%.*]]) #[[ATTR1]] { ; IS________NPM-SAME: (i1 [[D:%.*]]) #[[ATTR1]] {
; IS__TUNIT_NPM-NEXT: [[C:%.*]] = select i1 [[D]], i1 true, i1 false ; IS________NPM-NEXT: [[C:%.*]] = select i1 [[D]], i1 true, i1 false
; IS__TUNIT_NPM-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]] ; IS________NPM-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]]
; IS__TUNIT_NPM: t: ; IS________NPM: t:
; IS__TUNIT_NPM-NEXT: [[RET1:%.*]] = call noundef i32 @func(i1 noundef true) #[[ATTR1]], !range [[RNG4]] ; IS________NPM-NEXT: [[RET1:%.*]] = call noundef i32 @func(i1 noundef true) #[[ATTR4]], !range [[RNG4]]
; IS__TUNIT_NPM-NEXT: ret i32 [[RET1]] ; IS________NPM-NEXT: ret i32 [[RET1]]
; IS__TUNIT_NPM: f: ; IS________NPM: f:
; IS__TUNIT_NPM-NEXT: [[RET2:%.*]] = call noundef i32 @func(i1 noundef false) #[[ATTR1]], !range [[RNG4]] ; IS________NPM-NEXT: [[RET2:%.*]] = call noundef i32 @func(i1 noundef false) #[[ATTR4]], !range [[RNG4]]
; IS__TUNIT_NPM-NEXT: ret i32 [[RET2]] ; IS________NPM-NEXT: ret i32 [[RET2]]
; ;
; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@simplify_callsite_argument ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@simplify_callsite_argument
; IS__CGSCC_OPM-SAME: (i1 [[D:%.*]]) #[[ATTR1]] { ; IS__CGSCC_OPM-SAME: (i1 [[D:%.*]]) #[[ATTR1]] {
; IS__CGSCC_OPM-NEXT: [[C:%.*]] = select i1 [[D]], i1 true, i1 false ; IS__CGSCC_OPM-NEXT: [[C:%.*]] = select i1 [[D]], i1 true, i1 false
; IS__CGSCC_OPM-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]] ; IS__CGSCC_OPM-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]]
; IS__CGSCC_OPM: t: ; IS__CGSCC_OPM: t:
; IS__CGSCC_OPM-NEXT: [[RET1:%.*]] = call noundef i32 @func(i1 noundef [[C]]) #[[ATTR5]], !range [[RNG4]] ; IS__CGSCC_OPM-NEXT: [[RET1:%.*]] = call noundef i32 @func(i1 noundef [[C]]) #[[ATTR6]], !range [[RNG4]]
; IS__CGSCC_OPM-NEXT: ret i32 [[RET1]] ; IS__CGSCC_OPM-NEXT: ret i32 [[RET1]]
; IS__CGSCC_OPM: f: ; IS__CGSCC_OPM: f:
; IS__CGSCC_OPM-NEXT: [[RET2:%.*]] = call noundef i32 @func(i1 noundef false) #[[ATTR5]], !range [[RNG4]] ; IS__CGSCC_OPM-NEXT: [[RET2:%.*]] = call noundef i32 @func(i1 noundef false) #[[ATTR6]], !range [[RNG4]]
; IS__CGSCC_OPM-NEXT: ret i32 [[RET2]] ; IS__CGSCC_OPM-NEXT: ret i32 [[RET2]]
; ;
; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@simplify_callsite_argument
; IS__CGSCC_NPM-SAME: (i1 [[D:%.*]]) #[[ATTR1]] {
; IS__CGSCC_NPM-NEXT: [[C:%.*]] = select i1 [[D]], i1 true, i1 false
; IS__CGSCC_NPM-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]]
; IS__CGSCC_NPM: t:
; IS__CGSCC_NPM-NEXT: [[RET1:%.*]] = call noundef i32 @func(i1 noundef true) #[[ATTR4]], !range [[RNG4]]
; IS__CGSCC_NPM-NEXT: ret i32 [[RET1]]
; IS__CGSCC_NPM: f:
; IS__CGSCC_NPM-NEXT: [[RET2:%.*]] = call noundef i32 @func(i1 noundef false) #[[ATTR4]], !range [[RNG4]]
; IS__CGSCC_NPM-NEXT: ret i32 [[RET2]]
;
%c = select i1 %d, i1 true, i1 false %c = select i1 %d, i1 true, i1 false
br i1 %c, label %t, label %f br i1 %c, label %t, label %f
t: t:
%ret1 = call i32 @func(i1 %c) %ret1 = call i32 @func(i1 %c)
ret i32 %ret1 ret i32 %ret1
f: f:
%ret2 = call i32 @func(i1 false) %ret2 = call i32 @func(i1 false)
ret i32 %ret2 ret i32 %ret2
Show All 9 Lines
; ;
%shrinked = udiv i32 %arg, 65536 %shrinked = udiv i32 %arg, 65536
ret i32 %shrinked ret i32 %shrinked
} }
define internal i1 @is_less_than_65536(i32 %arg) { define internal i1 @is_less_than_65536(i32 %arg) {
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@is_less_than_65536 ; IS__CGSCC____-LABEL: define {{[^@]+}}@is_less_than_65536
; IS__CGSCC____-SAME: (i32 [[ARG:%.*]]) #[[ATTR1]] { ; IS__CGSCC____-SAME: () #[[ATTR1]] {
; IS__CGSCC____-NEXT: [[CMP:%.*]] = icmp ult i32 undef, 65536
; IS__CGSCC____-NEXT: ret i1 undef ; IS__CGSCC____-NEXT: ret i1 undef
; ;
%cmp = icmp ult i32 %arg, 65536 %cmp = icmp ult i32 %arg, 65536
ret i1 %cmp ret i1 %cmp
} }
define i1 @check_divided_range(i32 %arg) { define i1 @check_divided_range(i32 %arg) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@check_divided_range ; CHECK-LABEL: define {{[^@]+}}@check_divided_range
; IS__TUNIT____-SAME: (i32 [[ARG:%.*]]) #[[ATTR1]] { ; CHECK-SAME: (i32 [[ARG:%.*]]) #[[ATTR1]] {
; IS__TUNIT____-NEXT: ret i1 true ; CHECK-NEXT: ret i1 true
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@check_divided_range
; IS__CGSCC____-SAME: (i32 [[ARG:%.*]]) #[[ATTR1]] {
; IS__CGSCC____-NEXT: ret i1 true
; ;
%csret1 = call i32 @less_than_65536(i32 0) %csret1 = call i32 @less_than_65536(i32 0)
%csret2 = call i32 @less_than_65536(i32 %arg) %csret2 = call i32 @less_than_65536(i32 %arg)
%true1 = call i1 @is_less_than_65536(i32 %csret1) %true1 = call i1 @is_less_than_65536(i32 %csret1)
%true2 = call i1 @is_less_than_65536(i32 %csret2) %true2 = call i1 @is_less_than_65536(i32 %csret2)
%ret = and i1 %true1, %true2 %ret = and i1 %true1, %true2
ret i1 %ret ret i1 %ret
} }
Show All 16 Lines
; IS__CGSCC____-SAME: () #[[ATTR1]] { ; IS__CGSCC____-SAME: () #[[ATTR1]] {
; IS__CGSCC____-NEXT: ret i1 undef ; IS__CGSCC____-NEXT: ret i1 undef
; ;
%cmp = icmp slt i32 %c, 3 %cmp = icmp slt i32 %c, 3
ret i1 %cmp ret i1 %cmp
} }
define i1 @check_casted_range(i1 %c) { define i1 @check_casted_range(i1 %c) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@check_casted_range ; CHECK-LABEL: define {{[^@]+}}@check_casted_range
; IS__TUNIT____-SAME: (i1 [[C:%.*]]) #[[ATTR1]] { ; CHECK-SAME: (i1 [[C:%.*]]) #[[ATTR1]] {
; IS__TUNIT____-NEXT: ret i1 true ; CHECK-NEXT: ret i1 true
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@check_casted_range
; IS__CGSCC____-SAME: (i1 [[C:%.*]]) #[[ATTR1]] {
; IS__CGSCC____-NEXT: ret i1 true
; ;
%csret1 = call i32 @cast_and_return(i1 true) %csret1 = call i32 @cast_and_return(i1 true)
%csret2 = call i32 @cast_and_return(i1 %c) %csret2 = call i32 @cast_and_return(i1 %c)
%add = add i32 %csret1, %csret2 %add = add i32 %csret1, %csret2
%ret = call i1 @is_less_than_3(i32 %add) %ret = call i1 @is_less_than_3(i32 %add)
ret i1 %ret ret i1 %ret
} }
▲ Show 20 Lines • Show All 58 Lines • ▼ Show 20 Lines
; IS__CGSCC____-SAME: () #[[ATTR1]] { ; IS__CGSCC____-SAME: () #[[ATTR1]] {
; IS__CGSCC____-NEXT: ret i1 undef ; IS__CGSCC____-NEXT: ret i1 undef
; ;
%cmp = icmp slt i32 %c, 100 %cmp = icmp slt i32 %c, 100
ret i1 %cmp ret i1 %cmp
} }
define i1 @propagate_range1(i32 %c){ define i1 @propagate_range1(i32 %c){
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@propagate_range1 ; CHECK-LABEL: define {{[^@]+}}@propagate_range1
; IS__TUNIT____-SAME: (i32 [[C:%.*]]) #[[ATTR1]] { ; CHECK-SAME: (i32 [[C:%.*]]) #[[ATTR1]] {
; IS__TUNIT____-NEXT: ret i1 true ; CHECK-NEXT: ret i1 true
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@propagate_range1
; IS__CGSCC____-SAME: (i32 [[C:%.*]]) #[[ATTR1]] {
; IS__CGSCC____-NEXT: ret i1 true
; ;
%csret = call i32 @less_than_100_1(i32 %c) %csret = call i32 @less_than_100_1(i32 %c)
%true = call i1 @is_less_than_100_1(i32 %csret) %true = call i1 @is_less_than_100_1(i32 %csret)
ret i1 %true ret i1 %true
} }
define internal i32 @less_than_100_2(i32 %c) { define internal i32 @less_than_100_2(i32 %c) {
; ;
▲ Show 20 Lines • Show All 50 Lines • ▼ Show 20 Lines
otherwise: otherwise:
ret i32 99 ret i32 99
} }
define internal i1 @is_less_than_100_2(i32 %c) { define internal i1 @is_less_than_100_2(i32 %c) {
; ;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@is_less_than_100_2 ; IS__CGSCC____-LABEL: define {{[^@]+}}@is_less_than_100_2
; IS__CGSCC____-SAME: (i32 [[C:%.*]]) #[[ATTR1]] { ; IS__CGSCC____-SAME: () #[[ATTR1]] {
; IS__CGSCC____-NEXT: [[CMP:%.*]] = icmp slt i32 undef, 100
; IS__CGSCC____-NEXT: ret i1 undef ; IS__CGSCC____-NEXT: ret i1 undef
; ;
%cmp = icmp slt i32 %c, 100 %cmp = icmp slt i32 %c, 100
ret i1 %cmp ret i1 %cmp
} }
define i1 @propagate_range2(i32 %c) { define i1 @propagate_range2(i32 %c) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@propagate_range2 ; CHECK-LABEL: define {{[^@]+}}@propagate_range2
; IS__TUNIT____-SAME: (i32 [[C:%.*]]) #[[ATTR1]] { ; CHECK-SAME: (i32 [[C:%.*]]) #[[ATTR1]] {
; IS__TUNIT____-NEXT: ret i1 true ; CHECK-NEXT: ret i1 true
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@propagate_range2
; IS__CGSCC____-SAME: (i32 [[C:%.*]]) #[[ATTR1]] {
; IS__CGSCC____-NEXT: ret i1 true
; ;
%csret1 = call i32 @less_than_100_2(i32 0) %csret1 = call i32 @less_than_100_2(i32 0)
%true1 = call i1 @is_less_than_100_2(i32 %csret1) %true1 = call i1 @is_less_than_100_2(i32 %csret1)
%csret2 = call i32 @less_than_100_2(i32 %c) %csret2 = call i32 @less_than_100_2(i32 %c)
%true2 = call i1 @is_less_than_100_2(i32 %csret2) %true2 = call i1 @is_less_than_100_2(i32 %csret2)
%true = and i1 %true1, %true2 %true = and i1 %true1, %true2
ret i1 %true ret i1 %true
} }
define internal i1 @non_zero(i8 %v) { define internal i1 @non_zero(i8 %v) {
; IS__TUNIT_OPM: Function Attrs: nofree nosync nounwind readnone willreturn ; IS________OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@non_zero ; IS________OPM-LABEL: define {{[^@]+}}@non_zero
; IS__TUNIT_OPM-SAME: (i8 [[V:%.*]]) #[[ATTR1]] { ; IS________OPM-SAME: (i8 [[V:%.*]]) #[[ATTR1]] {
; IS__TUNIT_OPM-NEXT: [[R:%.*]] = icmp ne i8 [[V]], 0 ; IS________OPM-NEXT: [[R:%.*]] = icmp ne i8 [[V]], 0
; IS__TUNIT_OPM-NEXT: ret i1 [[R]] ; IS________OPM-NEXT: ret i1 [[R]]
;
; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@non_zero
; IS__CGSCC_OPM-SAME: (i8 [[V:%.*]]) #[[ATTR1]] {
; IS__CGSCC_OPM-NEXT: [[R:%.*]] = icmp ne i8 [[V]], 0
; IS__CGSCC_OPM-NEXT: ret i1 [[R]]
; ;
; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@non_zero ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@non_zero
; IS__CGSCC_NPM-SAME: () #[[ATTR1]] { ; IS__CGSCC_NPM-SAME: () #[[ATTR1]] {
; IS__CGSCC_NPM-NEXT: ret i1 undef ; IS__CGSCC_NPM-NEXT: ret i1 undef
; ;
%r = icmp ne i8 %v, 0 %r = icmp ne i8 %v, 0
ret i1 %r ret i1 %r
} }
; Avoid range metadata for %l below ; Avoid range metadata for %l below
define i1 @context(i8* %p) { define i1 @context(i8* %p) {
; IS__TUNIT_OPM: Function Attrs: argmemonly nofree nosync nounwind readonly willreturn ; IS__TUNIT_OPM: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@context ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@context
; IS__TUNIT_OPM-SAME: (i8* nocapture nofree noundef nonnull readonly dereferenceable(1) [[P:%.*]]) #[[ATTR0]] { ; IS__TUNIT_OPM-SAME: (i8* nocapture nofree noundef nonnull readonly dereferenceable(1) [[P:%.*]]) #[[ATTR0]] {
; IS__TUNIT_OPM-NEXT: [[L:%.*]] = load i8, i8* [[P]], align 1 ; IS__TUNIT_OPM-NEXT: [[L:%.*]] = load i8, i8* [[P]], align 1
; IS__TUNIT_OPM-NEXT: [[C:%.*]] = icmp slt i8 0, [[L]] ; IS__TUNIT_OPM-NEXT: [[C:%.*]] = icmp slt i8 0, [[L]]
; IS__TUNIT_OPM-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]] ; IS__TUNIT_OPM-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]]
; IS__TUNIT_OPM: t: ; IS__TUNIT_OPM: t:
; IS__TUNIT_OPM-NEXT: [[R:%.*]] = call i1 @non_zero(i8 [[L]]) #[[ATTR1]] ; IS__TUNIT_OPM-NEXT: [[R:%.*]] = call i1 @non_zero(i8 [[L]]) #[[ATTR5]]
; IS__TUNIT_OPM-NEXT: ret i1 [[R]] ; IS__TUNIT_OPM-NEXT: ret i1 [[R]]
; IS__TUNIT_OPM: f: ; IS__TUNIT_OPM: f:
; IS__TUNIT_OPM-NEXT: ret i1 false ; IS__TUNIT_OPM-NEXT: ret i1 false
; ;
; IS__TUNIT_NPM: Function Attrs: argmemonly nofree nosync nounwind readonly willreturn ; IS________NPM: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@context ; IS________NPM-LABEL: define {{[^@]+}}@context
; IS__TUNIT_NPM-SAME: (i8* nocapture nofree noundef nonnull readonly dereferenceable(1) [[P:%.*]]) #[[ATTR0]] { ; IS________NPM-SAME: (i8* nocapture nofree noundef nonnull readonly dereferenceable(1) [[P:%.*]]) #[[ATTR0]] {
; IS__TUNIT_NPM-NEXT: [[L:%.*]] = load i8, i8* [[P]], align 1 ; IS________NPM-NEXT: [[L:%.*]] = load i8, i8* [[P]], align 1
; IS__TUNIT_NPM-NEXT: [[C:%.*]] = icmp slt i8 0, [[L]] ; IS________NPM-NEXT: [[C:%.*]] = icmp slt i8 0, [[L]]
; IS__TUNIT_NPM-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]] ; IS________NPM-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]]
; IS__TUNIT_NPM: t: ; IS________NPM: t:
; IS__TUNIT_NPM-NEXT: ret i1 true ; IS________NPM-NEXT: ret i1 true
; IS__TUNIT_NPM: f: ; IS________NPM: f:
; IS__TUNIT_NPM-NEXT: ret i1 false ; IS________NPM-NEXT: ret i1 false
; ;
; IS__CGSCC_OPM: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn ; IS__CGSCC_OPM: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@context ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@context
; IS__CGSCC_OPM-SAME: (i8* nocapture nofree noundef nonnull readonly dereferenceable(1) [[P:%.*]]) #[[ATTR0]] { ; IS__CGSCC_OPM-SAME: (i8* nocapture nofree noundef nonnull readonly dereferenceable(1) [[P:%.*]]) #[[ATTR0]] {
; IS__CGSCC_OPM-NEXT: [[L:%.*]] = load i8, i8* [[P]], align 1 ; IS__CGSCC_OPM-NEXT: [[L:%.*]] = load i8, i8* [[P]], align 1
; IS__CGSCC_OPM-NEXT: [[C:%.*]] = icmp slt i8 0, [[L]] ; IS__CGSCC_OPM-NEXT: [[C:%.*]] = icmp slt i8 0, [[L]]
; IS__CGSCC_OPM-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]] ; IS__CGSCC_OPM-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]]
; IS__CGSCC_OPM: t: ; IS__CGSCC_OPM: t:
; IS__CGSCC_OPM-NEXT: [[R:%.*]] = call i1 @non_zero(i8 [[L]]) #[[ATTR5]] ; IS__CGSCC_OPM-NEXT: [[R:%.*]] = call i1 @non_zero(i8 [[L]]) #[[ATTR7:[0-9]+]]
; IS__CGSCC_OPM-NEXT: ret i1 [[R]] ; IS__CGSCC_OPM-NEXT: ret i1 [[R]]
; IS__CGSCC_OPM: f: ; IS__CGSCC_OPM: f:
; IS__CGSCC_OPM-NEXT: ret i1 false ; IS__CGSCC_OPM-NEXT: ret i1 false
; ;
; IS__CGSCC_NPM: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@context
; IS__CGSCC_NPM-SAME: (i8* nocapture nofree noundef nonnull readonly dereferenceable(1) [[P:%.*]]) #[[ATTR0]] {
; IS__CGSCC_NPM-NEXT: [[L:%.*]] = load i8, i8* [[P]], align 1
; IS__CGSCC_NPM-NEXT: [[C:%.*]] = icmp slt i8 0, [[L]]
; IS__CGSCC_NPM-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]]
; IS__CGSCC_NPM: t:
; IS__CGSCC_NPM-NEXT: ret i1 true
; IS__CGSCC_NPM: f:
; IS__CGSCC_NPM-NEXT: ret i1 false
;
%l = load i8, i8* %p %l = load i8, i8* %p
%c = icmp slt i8 0, %l %c = icmp slt i8 0, %l
br i1 %c, label %t, label %f br i1 %c, label %t, label %f
t: t:
%r = call i1 @non_zero(i8 %l) %r = call i1 @non_zero(i8 %l)
ret i1 %r ret i1 %r
f: f:
ret i1 false ret i1 false
▲ Show 20 Lines • Show All 58 Lines • ▼ Show 20 Lines
bb2: ; preds = %bb bb2: ; preds = %bb
br label %bb3 br label %bb3
bb3: ; preds = %bb2, %bb1 bb3: ; preds = %bb2, %bb1
ret void ret void
} }
define i1 @loop_1(i32 %N) { define i1 @loop_1(i32 %N) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone
; IS__TUNIT____-LABEL: define {{[^@]+}}@loop_1 ; CHECK-LABEL: define {{[^@]+}}@loop_1
; IS__TUNIT____-SAME: (i32 [[N:%.*]]) #[[ATTR2:[0-9]+]] { ; CHECK-SAME: (i32 [[N:%.*]]) #[[ATTR2:[0-9]+]] {
; IS__TUNIT____-NEXT: entry: ; CHECK-NEXT: entry:
; IS__TUNIT____-NEXT: br label [[HEADER:%.*]] ; CHECK-NEXT: br label [[HEADER:%.*]]
; IS__TUNIT____: header: ; CHECK: header:
; IS__TUNIT____-NEXT: [[I:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[AND:%.*]], [[HEADER]] ] ; CHECK-NEXT: [[I:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[AND:%.*]], [[HEADER]] ]
; IS__TUNIT____-NEXT: [[INC:%.*]] = add i32 [[I]], 1 ; CHECK-NEXT: [[INC:%.*]] = add i32 [[I]], 1
; IS__TUNIT____-NEXT: [[AND]] = and i32 [[INC]], 9999 ; CHECK-NEXT: [[AND]] = and i32 [[INC]], 9999
; IS__TUNIT____-NEXT: [[CMP:%.*]] = icmp ne i32 [[N]], [[AND]] ; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[N]], [[AND]]
; IS__TUNIT____-NEXT: br i1 [[CMP]], label [[HEADER]], label [[EXIT:%.*]] ; CHECK-NEXT: br i1 [[CMP]], label [[HEADER]], label [[EXIT:%.*]]
; IS__TUNIT____: exit: ; CHECK: exit:
; IS__TUNIT____-NEXT: [[R:%.*]] = icmp sle i32 [[I]], 5 ; CHECK-NEXT: [[R:%.*]] = icmp sle i32 [[I]], 5
; IS__TUNIT____-NEXT: ret i1 [[R]] ; CHECK-NEXT: ret i1 [[R]]
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone
; IS__CGSCC____-LABEL: define {{[^@]+}}@loop_1
; IS__CGSCC____-SAME: (i32 [[N:%.*]]) #[[ATTR2:[0-9]+]] {
; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: br label [[HEADER:%.*]]
; IS__CGSCC____: header:
; IS__CGSCC____-NEXT: [[I:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[AND:%.*]], [[HEADER]] ]
; IS__CGSCC____-NEXT: [[INC:%.*]] = add i32 [[I]], 1
; IS__CGSCC____-NEXT: [[AND]] = and i32 [[INC]], 9999
; IS__CGSCC____-NEXT: [[CMP:%.*]] = icmp ne i32 [[N]], [[AND]]
; IS__CGSCC____-NEXT: br i1 [[CMP]], label [[HEADER]], label [[EXIT:%.*]]
; IS__CGSCC____: exit:
; IS__CGSCC____-NEXT: [[R:%.*]] = icmp sle i32 [[I]], 5
; IS__CGSCC____-NEXT: ret i1 [[R]]
; ;
entry: entry:
br label %header br label %header
header: header:
%i = phi i32 [0, %entry], [%and, %header] %i = phi i32 [0, %entry], [%and, %header]
%inc = add i32 %i, 1 %inc = add i32 %i, 1
%and = and i32 %inc, 9999 %and = and i32 %inc, 9999
%cmp = icmp ne i32 %N, %and %cmp = icmp ne i32 %N, %and
br i1 %cmp, label %header, label %exit br i1 %cmp, label %header, label %exit
exit: exit:
%r = icmp sle i32 %i, 5 %r = icmp sle i32 %i, 5
ret i1 %r ret i1 %r
} }
declare void @ham(i32) declare void @ham(i32)
declare void @barney(i32 signext, i32 signext) declare void @barney(i32 signext, i32 signext)
!0 = !{i32 0, i32 10} !0 = !{i32 0, i32 10}
!1 = !{i32 10, i32 100} !1 = !{i32 10, i32 100}
;. ;.
; IS__TUNIT____: attributes #[[ATTR0]] = { argmemonly nofree nosync nounwind readonly willreturn } ; IS__TUNIT_OPM: attributes #[[ATTR0]] = { argmemonly nofree norecurse nosync nounwind readonly willreturn }
; IS__TUNIT____: attributes #[[ATTR1]] = { nofree nosync nounwind readnone willreturn } ; IS__TUNIT_OPM: attributes #[[ATTR1]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__TUNIT____: attributes #[[ATTR2]] = { nofree nosync nounwind readnone } ; IS__TUNIT_OPM: attributes #[[ATTR2]] = { nofree norecurse nosync nounwind readnone }
; IS__TUNIT____: attributes #[[ATTR3]] = { nofree nosync nounwind readonly willreturn } ; IS__TUNIT_OPM: attributes #[[ATTR3]] = { nofree nosync nounwind readonly willreturn }
; IS__TUNIT_OPM: attributes #[[ATTR4]] = { nofree nosync nounwind readnone }
; IS__TUNIT_OPM: attributes #[[ATTR5]] = { nofree nosync nounwind readnone willreturn }
;.
; IS__TUNIT_NPM: attributes #[[ATTR0]] = { argmemonly nofree norecurse nosync nounwind readonly willreturn }
; IS__TUNIT_NPM: attributes #[[ATTR1]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__TUNIT_NPM: attributes #[[ATTR2]] = { nofree norecurse nosync nounwind readnone }
; IS__TUNIT_NPM: attributes #[[ATTR3]] = { nofree nosync nounwind readonly willreturn }
; IS__TUNIT_NPM: attributes #[[ATTR4]] = { nofree nosync nounwind readnone willreturn }
;. ;.
; IS__CGSCC_OPM: attributes #[[ATTR0]] = { argmemonly nofree norecurse nosync nounwind readonly willreturn } ; IS__CGSCC_OPM: attributes #[[ATTR0]] = { argmemonly nofree norecurse nosync nounwind readonly willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR1]] = { nofree norecurse nosync nounwind readnone willreturn } ; IS__CGSCC_OPM: attributes #[[ATTR1]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR2]] = { nofree norecurse nosync nounwind readnone } ; IS__CGSCC_OPM: attributes #[[ATTR2]] = { nofree norecurse nosync nounwind readnone }
; IS__CGSCC_OPM: attributes #[[ATTR3]] = { readonly willreturn } ; IS__CGSCC_OPM: attributes #[[ATTR3]] = { norecurse }
; IS__CGSCC_OPM: attributes #[[ATTR4]] = { nounwind readnone } ; IS__CGSCC_OPM: attributes #[[ATTR4]] = { readonly willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR5]] = { readnone willreturn } ; IS__CGSCC_OPM: attributes #[[ATTR5]] = { nounwind readnone }
; IS__CGSCC_OPM: attributes #[[ATTR6]] = { readnone willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR7]] = { nounwind readnone willreturn }
;. ;.
; IS__CGSCC_NPM: attributes #[[ATTR0]] = { argmemonly nofree norecurse nosync nounwind readonly willreturn } ; IS__CGSCC_NPM: attributes #[[ATTR0]] = { argmemonly nofree norecurse nosync nounwind readonly willreturn }
; IS__CGSCC_NPM: attributes #[[ATTR1]] = { nofree norecurse nosync nounwind readnone willreturn } ; IS__CGSCC_NPM: attributes #[[ATTR1]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__CGSCC_NPM: attributes #[[ATTR2]] = { nofree norecurse nosync nounwind readnone } ; IS__CGSCC_NPM: attributes #[[ATTR2]] = { nofree norecurse nosync nounwind readnone }
; IS__CGSCC_NPM: attributes #[[ATTR3]] = { readonly willreturn } ; IS__CGSCC_NPM: attributes #[[ATTR3]] = { readonly willreturn }
; IS__CGSCC_NPM: attributes #[[ATTR4]] = { readnone willreturn } ; IS__CGSCC_NPM: attributes #[[ATTR4]] = { readnone willreturn }
;. ;.
; IS__TUNIT_OPM: [[RNG0]] = !{i32 0, i32 10} ; IS__TUNIT_OPM: [[RNG0]] = !{i32 0, i32 10}
; IS__TUNIT_OPM: [[RNG1]] = !{i32 10, i32 100} ; IS__TUNIT_OPM: [[RNG1]] = !{i32 10, i32 100}
; IS__TUNIT_OPM: [[RNG2]] = !{i32 200, i32 1091} ; IS__TUNIT_OPM: [[RNG2]] = !{i32 200, i32 1091}
; IS__TUNIT_OPM: [[RNG3]] = !{i32 0, i32 2} ; IS__TUNIT_OPM: [[RNG3]] = !{i32 0, i32 2}
; IS__TUNIT_OPM: [[RNG4]] = !{i32 1, i32 3} ; IS__TUNIT_OPM: [[RNG4]] = !{i32 1, i32 3}
;. ;.
; IS________NPM: [[RNG0]] = !{i32 0, i32 10} ; IS________NPM: [[RNG0]] = !{i32 0, i32 10}
; IS________NPM: [[RNG1]] = !{i32 10, i32 100} ; IS________NPM: [[RNG1]] = !{i32 10, i32 100}
; IS________NPM: [[RNG2]] = !{i32 200, i32 1091} ; IS________NPM: [[RNG2]] = !{i32 200, i32 1091}
; IS________NPM: [[META3:![0-9]+]] = !{i32 1, i32 -2147483648} ; IS________NPM: [[RNG3]] = !{i32 1, i32 -2147483648}
; IS________NPM: [[RNG4]] = !{i32 0, i32 2} ; IS________NPM: [[RNG4]] = !{i32 0, i32 2}
; IS________NPM: [[META5:![0-9]+]] = !{i32 1, i32 3} ; IS________NPM: [[RNG5]] = !{i32 1, i32 3}
;. ;.
; IS__CGSCC_OPM: [[RNG0]] = !{i32 0, i32 10} ; IS__CGSCC_OPM: [[RNG0]] = !{i32 0, i32 10}
; IS__CGSCC_OPM: [[RNG1]] = !{i32 10, i32 100} ; IS__CGSCC_OPM: [[RNG1]] = !{i32 10, i32 100}
; IS__CGSCC_OPM: [[RNG2]] = !{i32 200, i32 1091} ; IS__CGSCC_OPM: [[RNG2]] = !{i32 200, i32 1091}
; IS__CGSCC_OPM: [[RNG3]] = !{i32 10, i32 21} ; IS__CGSCC_OPM: [[RNG3]] = !{i32 10, i32 21}
; IS__CGSCC_OPM: [[RNG4]] = !{i32 0, i32 2} ; IS__CGSCC_OPM: [[RNG4]] = !{i32 0, i32 2}
; IS__CGSCC_OPM: [[RNG5]] = !{i32 1, i32 3} ; IS__CGSCC_OPM: [[RNG5]] = !{i32 1, i32 3}
;. ;.

llvm/test/Transforms/Attributor/read_write_returned_arguments_scc.ll

Show All 33 Lines
; ;
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
define i32* @external_ret2_nrw(i32* %n0, i32* %r0, i32* %w0) { define i32* @external_ret2_nrw(i32* %n0, i32* %r0, i32* %w0) {
; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind ; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind
; IS__TUNIT____-LABEL: define {{[^@]+}}@external_ret2_nrw ; IS__TUNIT____-LABEL: define {{[^@]+}}@external_ret2_nrw
; IS__TUNIT____-SAME: (i32* nofree [[N0:%.*]], i32* nofree [[R0:%.*]], i32* nofree [[W0:%.*]]) #[[ATTR0:[0-9]+]] { ; IS__TUNIT____-SAME: (i32* nofree [[N0:%.*]], i32* nofree [[R0:%.*]], i32* nofree [[W0:%.*]]) #[[ATTR0:[0-9]+]] {
; IS__TUNIT____-NEXT: entry: ; IS__TUNIT____-NEXT: entry:
; IS__TUNIT____-NEXT: [[CALL:%.*]] = call i32* @internal_ret0_nw(i32* nofree [[N0]], i32* nofree [[W0]]) #[[ATTR2:[0-9]+]] ; IS__TUNIT____-NEXT: [[CALL:%.*]] = call i32* @internal_ret0_nw(i32* nofree [[N0]], i32* nofree [[W0]]) #[[ATTR3:[0-9]+]]
; IS__TUNIT____-NEXT: [[CALL1:%.*]] = call i32* @internal_ret1_rrw(i32* nofree align 4 [[R0]], i32* nofree [[R0]], i32* nofree [[W0]]) #[[ATTR2]] ; IS__TUNIT____-NEXT: [[CALL1:%.*]] = call i32* @internal_ret1_rrw(i32* nofree align 4 [[R0]], i32* nofree [[R0]], i32* nofree [[W0]]) #[[ATTR3]]
; IS__TUNIT____-NEXT: [[CALL2:%.*]] = call i32* @external_sink_ret2_nrw(i32* nofree [[N0]], i32* nocapture nofree readonly align 4 [[R0]], i32* nofree writeonly "no-capture-maybe-returned" [[W0]]) #[[ATTR2]] ; IS__TUNIT____-NEXT: [[CALL2:%.*]] = call i32* @external_sink_ret2_nrw(i32* nofree [[N0]], i32* nocapture nofree readonly align 4 [[R0]], i32* nofree writeonly "no-capture-maybe-returned" [[W0]]) #[[ATTR3]]
; IS__TUNIT____-NEXT: [[CALL3:%.*]] = call i32* @internal_ret1_rw(i32* nofree align 4 [[R0]], i32* nofree [[W0]]) #[[ATTR2]] ; IS__TUNIT____-NEXT: [[CALL3:%.*]] = call i32* @internal_ret1_rw(i32* nofree align 4 [[R0]], i32* nofree [[W0]]) #[[ATTR3]]
; IS__TUNIT____-NEXT: ret i32* [[CALL3]] ; IS__TUNIT____-NEXT: ret i32* [[CALL3]]
; ;
; IS__CGSCC____: Function Attrs: argmemonly nofree nosync nounwind ; IS__CGSCC____: Function Attrs: argmemonly nofree nosync nounwind
; IS__CGSCC____-LABEL: define {{[^@]+}}@external_ret2_nrw ; IS__CGSCC____-LABEL: define {{[^@]+}}@external_ret2_nrw
; IS__CGSCC____-SAME: (i32* nofree [[N0:%.*]], i32* nofree [[R0:%.*]], i32* nofree [[W0:%.*]]) #[[ATTR0:[0-9]+]] { ; IS__CGSCC____-SAME: (i32* nofree [[N0:%.*]], i32* nofree [[R0:%.*]], i32* nofree [[W0:%.*]]) #[[ATTR0:[0-9]+]] {
; IS__CGSCC____-NEXT: entry: ; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: [[CALL:%.*]] = call i32* @internal_ret0_nw(i32* nofree [[N0]], i32* nofree [[W0]]) #[[ATTR2:[0-9]+]] ; IS__CGSCC____-NEXT: [[CALL:%.*]] = call i32* @internal_ret0_nw(i32* nofree [[N0]], i32* nofree [[W0]]) #[[ATTR3:[0-9]+]]
; IS__CGSCC____-NEXT: [[CALL1:%.*]] = call i32* @internal_ret1_rrw(i32* nofree align 4 [[R0]], i32* nofree align 4 [[R0]], i32* nofree [[W0]]) #[[ATTR2]] ; IS__CGSCC____-NEXT: [[CALL1:%.*]] = call i32* @internal_ret1_rrw(i32* nofree align 4 [[R0]], i32* nofree align 4 [[R0]], i32* nofree [[W0]]) #[[ATTR3]]
; IS__CGSCC____-NEXT: [[CALL2:%.*]] = call i32* @external_sink_ret2_nrw(i32* nofree [[N0]], i32* nocapture nofree readonly align 4 [[R0]], i32* nofree writeonly "no-capture-maybe-returned" [[W0]]) #[[ATTR3:[0-9]+]] ; IS__CGSCC____-NEXT: [[CALL2:%.*]] = call i32* @external_sink_ret2_nrw(i32* nofree [[N0]], i32* nocapture nofree readonly align 4 [[R0]], i32* nofree writeonly "no-capture-maybe-returned" [[W0]]) #[[ATTR4:[0-9]+]]
; IS__CGSCC____-NEXT: [[CALL3:%.*]] = call i32* @internal_ret1_rw(i32* nofree align 4 [[R0]], i32* nofree [[W0]]) #[[ATTR2]] ; IS__CGSCC____-NEXT: [[CALL3:%.*]] = call i32* @internal_ret1_rw(i32* nofree align 4 [[R0]], i32* nofree [[W0]]) #[[ATTR3]]
; IS__CGSCC____-NEXT: ret i32* [[CALL3]] ; IS__CGSCC____-NEXT: ret i32* [[CALL3]]
; ;
entry: entry:
%call = call i32* @internal_ret0_nw(i32* %n0, i32* %w0) %call = call i32* @internal_ret0_nw(i32* %n0, i32* %w0)
%call1 = call i32* @internal_ret1_rrw(i32* %r0, i32* %r0, i32* %w0) %call1 = call i32* @internal_ret1_rrw(i32* %r0, i32* %r0, i32* %w0)
%call2 = call i32* @external_sink_ret2_nrw(i32* %n0, i32* %r0, i32* %w0) %call2 = call i32* @external_sink_ret2_nrw(i32* %n0, i32* %r0, i32* %w0)
%call3 = call i32* @internal_ret1_rw(i32* %r0, i32* %w0) %call3 = call i32* @internal_ret1_rw(i32* %r0, i32* %w0)
ret i32* %call3 ret i32* %call3
Show All 9 Lines
; IS__TUNIT____-NEXT: [[TOBOOL:%.*]] = icmp ne i32* [[N0]], null ; IS__TUNIT____-NEXT: [[TOBOOL:%.*]] = icmp ne i32* [[N0]], null
; IS__TUNIT____-NEXT: br i1 [[TOBOOL]], label [[IF_END:%.*]], label [[IF_THEN:%.*]] ; IS__TUNIT____-NEXT: br i1 [[TOBOOL]], label [[IF_END:%.*]], label [[IF_THEN:%.*]]
; IS__TUNIT____: if.then: ; IS__TUNIT____: if.then:
; IS__TUNIT____-NEXT: br label [[RETURN:%.*]] ; IS__TUNIT____-NEXT: br label [[RETURN:%.*]]
; IS__TUNIT____: if.end: ; IS__TUNIT____: if.end:
; IS__TUNIT____-NEXT: store i32 3, i32* [[R0]], align 4 ; IS__TUNIT____-NEXT: store i32 3, i32* [[R0]], align 4
; IS__TUNIT____-NEXT: store i32 5, i32* [[R1]], align 4 ; IS__TUNIT____-NEXT: store i32 5, i32* [[R1]], align 4
; IS__TUNIT____-NEXT: store i32 1, i32* [[W0]], align 4 ; IS__TUNIT____-NEXT: store i32 1, i32* [[W0]], align 4
; IS__TUNIT____-NEXT: [[CALL:%.*]] = call i32* @internal_ret1_rrw(i32* nofree noundef nonnull align 4 dereferenceable(4) [[R0]], i32* nofree noundef nonnull align 4 dereferenceable(4) [[R1]], i32* nofree nonnull align 4 dereferenceable(4) [[W0]]) #[[ATTR2]] ; IS__TUNIT____-NEXT: [[CALL:%.*]] = call i32* @internal_ret1_rrw(i32* nofree noundef nonnull align 4 dereferenceable(4) [[R0]], i32* nofree noundef nonnull align 4 dereferenceable(4) [[R1]], i32* nofree nonnull align 4 dereferenceable(4) [[W0]]) #[[ATTR3]]
; IS__TUNIT____-NEXT: [[CALL1:%.*]] = call i32* @external_ret2_nrw(i32* nofree [[N0]], i32* nofree noundef nonnull align 4 dereferenceable(4) [[R0]], i32* nofree nonnull align 4 dereferenceable(4) [[W0]]) #[[ATTR2]] ; IS__TUNIT____-NEXT: [[CALL1:%.*]] = call i32* @external_ret2_nrw(i32* nofree [[N0]], i32* nofree noundef nonnull align 4 dereferenceable(4) [[R0]], i32* nofree nonnull align 4 dereferenceable(4) [[W0]]) #[[ATTR3]]
; IS__TUNIT____-NEXT: [[CALL2:%.*]] = call i32* @external_ret2_nrw(i32* nofree [[N0]], i32* nofree noundef nonnull align 4 dereferenceable(4) [[R1]], i32* nofree nonnull align 4 dereferenceable(4) [[W0]]) #[[ATTR2]] ; IS__TUNIT____-NEXT: [[CALL2:%.*]] = call i32* @external_ret2_nrw(i32* nofree [[N0]], i32* nofree noundef nonnull align 4 dereferenceable(4) [[R1]], i32* nofree nonnull align 4 dereferenceable(4) [[W0]]) #[[ATTR3]]
; IS__TUNIT____-NEXT: [[CALL3:%.*]] = call i32* @external_sink_ret2_nrw(i32* nofree [[N0]], i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[R0]], i32* nofree nonnull writeonly align 4 dereferenceable(4) "no-capture-maybe-returned" [[W0]]) #[[ATTR2]] ; IS__TUNIT____-NEXT: [[CALL3:%.*]] = call i32* @external_sink_ret2_nrw(i32* nofree [[N0]], i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[R0]], i32* nofree nonnull writeonly align 4 dereferenceable(4) "no-capture-maybe-returned" [[W0]]) #[[ATTR3]]
; IS__TUNIT____-NEXT: [[CALL4:%.*]] = call i32* @external_sink_ret2_nrw(i32* nofree [[N0]], i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[R1]], i32* nofree nonnull writeonly align 4 dereferenceable(4) "no-capture-maybe-returned" [[W0]]) #[[ATTR2]] ; IS__TUNIT____-NEXT: [[CALL4:%.*]] = call i32* @external_sink_ret2_nrw(i32* nofree [[N0]], i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[R1]], i32* nofree nonnull writeonly align 4 dereferenceable(4) "no-capture-maybe-returned" [[W0]]) #[[ATTR3]]
; IS__TUNIT____-NEXT: [[CALL5:%.*]] = call i32* @internal_ret0_nw(i32* nofree [[N0]], i32* nofree nonnull align 4 dereferenceable(4) [[W0]]) #[[ATTR2]] ; IS__TUNIT____-NEXT: [[CALL5:%.*]] = call i32* @internal_ret0_nw(i32* nofree [[N0]], i32* nofree nonnull align 4 dereferenceable(4) [[W0]]) #[[ATTR3]]
; IS__TUNIT____-NEXT: br label [[RETURN]] ; IS__TUNIT____-NEXT: br label [[RETURN]]
; IS__TUNIT____: return: ; IS__TUNIT____: return:
; IS__TUNIT____-NEXT: [[RETVAL_0:%.*]] = phi i32* [ [[N0]], [[IF_END]] ], [ [[N0]], [[IF_THEN]] ] ; IS__TUNIT____-NEXT: [[RETVAL_0:%.*]] = phi i32* [ [[N0]], [[IF_END]] ], [ [[N0]], [[IF_THEN]] ]
; IS__TUNIT____-NEXT: ret i32* [[N0]] ; IS__TUNIT____-NEXT: ret i32* [[N0]]
; ;
; IS__CGSCC____: Function Attrs: argmemonly nofree nosync nounwind ; IS__CGSCC____: Function Attrs: argmemonly nofree nosync nounwind
; IS__CGSCC____-LABEL: define {{[^@]+}}@internal_ret0_nw ; IS__CGSCC____-LABEL: define {{[^@]+}}@internal_ret0_nw
; IS__CGSCC____-SAME: (i32* nofree returned [[N0:%.*]], i32* nofree [[W0:%.*]]) #[[ATTR0]] { ; IS__CGSCC____-SAME: (i32* nofree returned [[N0:%.*]], i32* nofree [[W0:%.*]]) #[[ATTR0]] {
; IS__CGSCC____-NEXT: entry: ; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: [[R0:%.*]] = alloca i32, align 4 ; IS__CGSCC____-NEXT: [[R0:%.*]] = alloca i32, align 4
; IS__CGSCC____-NEXT: [[R1:%.*]] = alloca i32, align 4 ; IS__CGSCC____-NEXT: [[R1:%.*]] = alloca i32, align 4
; IS__CGSCC____-NEXT: [[TOBOOL:%.*]] = icmp ne i32* [[N0]], null ; IS__CGSCC____-NEXT: [[TOBOOL:%.*]] = icmp ne i32* [[N0]], null
; IS__CGSCC____-NEXT: br i1 [[TOBOOL]], label [[IF_END:%.*]], label [[IF_THEN:%.*]] ; IS__CGSCC____-NEXT: br i1 [[TOBOOL]], label [[IF_END:%.*]], label [[IF_THEN:%.*]]
; IS__CGSCC____: if.then: ; IS__CGSCC____: if.then:
; IS__CGSCC____-NEXT: br label [[RETURN:%.*]] ; IS__CGSCC____-NEXT: br label [[RETURN:%.*]]
; IS__CGSCC____: if.end: ; IS__CGSCC____: if.end:
; IS__CGSCC____-NEXT: store i32 3, i32* [[R0]], align 4 ; IS__CGSCC____-NEXT: store i32 3, i32* [[R0]], align 4
; IS__CGSCC____-NEXT: store i32 5, i32* [[R1]], align 4 ; IS__CGSCC____-NEXT: store i32 5, i32* [[R1]], align 4
; IS__CGSCC____-NEXT: store i32 1, i32* [[W0]], align 4 ; IS__CGSCC____-NEXT: store i32 1, i32* [[W0]], align 4
; IS__CGSCC____-NEXT: [[CALL:%.*]] = call i32* @internal_ret1_rrw(i32* nofree noundef nonnull align 4 dereferenceable(4) [[R0]], i32* nofree noundef nonnull align 4 dereferenceable(4) [[R1]], i32* nofree nonnull align 4 dereferenceable(4) [[W0]]) #[[ATTR2]] ; IS__CGSCC____-NEXT: [[CALL:%.*]] = call i32* @internal_ret1_rrw(i32* nofree noundef nonnull align 4 dereferenceable(4) [[R0]], i32* nofree noundef nonnull align 4 dereferenceable(4) [[R1]], i32* nofree nonnull align 4 dereferenceable(4) [[W0]]) #[[ATTR3]]
; IS__CGSCC____-NEXT: [[CALL1:%.*]] = call i32* @external_ret2_nrw(i32* nofree [[N0]], i32* nofree noundef nonnull align 4 dereferenceable(4) [[R0]], i32* nofree nonnull align 4 dereferenceable(4) [[W0]]) #[[ATTR2]] ; IS__CGSCC____-NEXT: [[CALL1:%.*]] = call i32* @external_ret2_nrw(i32* nofree [[N0]], i32* nofree noundef nonnull align 4 dereferenceable(4) [[R0]], i32* nofree nonnull align 4 dereferenceable(4) [[W0]]) #[[ATTR3]]
; IS__CGSCC____-NEXT: [[CALL2:%.*]] = call i32* @external_ret2_nrw(i32* nofree [[N0]], i32* nofree noundef nonnull align 4 dereferenceable(4) [[R1]], i32* nofree nonnull align 4 dereferenceable(4) [[W0]]) #[[ATTR2]] ; IS__CGSCC____-NEXT: [[CALL2:%.*]] = call i32* @external_ret2_nrw(i32* nofree [[N0]], i32* nofree noundef nonnull align 4 dereferenceable(4) [[R1]], i32* nofree nonnull align 4 dereferenceable(4) [[W0]]) #[[ATTR3]]
; IS__CGSCC____-NEXT: [[CALL3:%.*]] = call i32* @external_sink_ret2_nrw(i32* nofree [[N0]], i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[R0]], i32* nofree nonnull writeonly align 4 dereferenceable(4) "no-capture-maybe-returned" [[W0]]) #[[ATTR3]] ; IS__CGSCC____-NEXT: [[CALL3:%.*]] = call i32* @external_sink_ret2_nrw(i32* nofree [[N0]], i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[R0]], i32* nofree nonnull writeonly align 4 dereferenceable(4) "no-capture-maybe-returned" [[W0]]) #[[ATTR4]]
; IS__CGSCC____-NEXT: [[CALL4:%.*]] = call i32* @external_sink_ret2_nrw(i32* nofree [[N0]], i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[R1]], i32* nofree nonnull writeonly align 4 dereferenceable(4) "no-capture-maybe-returned" [[W0]]) #[[ATTR3]] ; IS__CGSCC____-NEXT: [[CALL4:%.*]] = call i32* @external_sink_ret2_nrw(i32* nofree [[N0]], i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[R1]], i32* nofree nonnull writeonly align 4 dereferenceable(4) "no-capture-maybe-returned" [[W0]]) #[[ATTR4]]
; IS__CGSCC____-NEXT: [[CALL5:%.*]] = call i32* @internal_ret0_nw(i32* nofree [[N0]], i32* nofree nonnull align 4 dereferenceable(4) [[W0]]) #[[ATTR2]] ; IS__CGSCC____-NEXT: [[CALL5:%.*]] = call i32* @internal_ret0_nw(i32* nofree [[N0]], i32* nofree nonnull align 4 dereferenceable(4) [[W0]]) #[[ATTR3]]
; IS__CGSCC____-NEXT: br label [[RETURN]] ; IS__CGSCC____-NEXT: br label [[RETURN]]
; IS__CGSCC____: return: ; IS__CGSCC____: return:
; IS__CGSCC____-NEXT: [[RETVAL_0:%.*]] = phi i32* [ [[N0]], [[IF_END]] ], [ [[N0]], [[IF_THEN]] ] ; IS__CGSCC____-NEXT: [[RETVAL_0:%.*]] = phi i32* [ [[N0]], [[IF_END]] ], [ [[N0]], [[IF_THEN]] ]
; IS__CGSCC____-NEXT: ret i32* [[N0]] ; IS__CGSCC____-NEXT: ret i32* [[N0]]
; ;
entry: entry:
%r0 = alloca i32, align 4 %r0 = alloca i32, align 4
%r1 = alloca i32, align 4 %r1 = alloca i32, align 4
Show All 26 Lines
; IS__TUNIT____-SAME: (i32* nofree noundef nonnull align 4 dereferenceable(4) [[R0:%.*]], i32* nofree [[R1:%.*]], i32* nofree [[W0:%.*]]) #[[ATTR0]] { ; IS__TUNIT____-SAME: (i32* nofree noundef nonnull align 4 dereferenceable(4) [[R0:%.*]], i32* nofree [[R1:%.*]], i32* nofree [[W0:%.*]]) #[[ATTR0]] {
; IS__TUNIT____-NEXT: entry: ; IS__TUNIT____-NEXT: entry:
; IS__TUNIT____-NEXT: [[TMP0:%.*]] = load i32, i32* [[R0]], align 4 ; IS__TUNIT____-NEXT: [[TMP0:%.*]] = load i32, i32* [[R0]], align 4
; IS__TUNIT____-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP0]], 0 ; IS__TUNIT____-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP0]], 0
; IS__TUNIT____-NEXT: br i1 [[TOBOOL]], label [[IF_END:%.*]], label [[IF_THEN:%.*]] ; IS__TUNIT____-NEXT: br i1 [[TOBOOL]], label [[IF_END:%.*]], label [[IF_THEN:%.*]]
; IS__TUNIT____: if.then: ; IS__TUNIT____: if.then:
; IS__TUNIT____-NEXT: br label [[RETURN:%.*]] ; IS__TUNIT____-NEXT: br label [[RETURN:%.*]]
; IS__TUNIT____: if.end: ; IS__TUNIT____: if.end:
; IS__TUNIT____-NEXT: [[CALL:%.*]] = call i32* @internal_ret1_rw(i32* nofree noundef nonnull align 4 dereferenceable(4) [[R0]], i32* nofree [[W0]]) #[[ATTR2]] ; IS__TUNIT____-NEXT: [[CALL:%.*]] = call i32* @internal_ret1_rw(i32* nofree noundef nonnull align 4 dereferenceable(4) [[R0]], i32* nofree [[W0]]) #[[ATTR3]]
; IS__TUNIT____-NEXT: [[TMP1:%.*]] = load i32, i32* [[R0]], align 4 ; IS__TUNIT____-NEXT: [[TMP1:%.*]] = load i32, i32* [[R0]], align 4
; IS__TUNIT____-NEXT: [[TMP2:%.*]] = load i32, i32* [[R1]], align 4 ; IS__TUNIT____-NEXT: [[TMP2:%.*]] = load i32, i32* [[R1]], align 4
; IS__TUNIT____-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP1]], [[TMP2]] ; IS__TUNIT____-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP1]], [[TMP2]]
; IS__TUNIT____-NEXT: store i32 [[ADD]], i32* [[W0]], align 4 ; IS__TUNIT____-NEXT: store i32 [[ADD]], i32* [[W0]], align 4
; IS__TUNIT____-NEXT: [[CALL1:%.*]] = call i32* @internal_ret1_rw(i32* nofree nonnull align 4 dereferenceable(4) [[R1]], i32* nofree nonnull align 4 dereferenceable(4) [[W0]]) #[[ATTR2]] ; IS__TUNIT____-NEXT: [[CALL1:%.*]] = call i32* @internal_ret1_rw(i32* nofree nonnull align 4 dereferenceable(4) [[R1]], i32* nofree nonnull align 4 dereferenceable(4) [[W0]]) #[[ATTR3]]
; IS__TUNIT____-NEXT: [[CALL2:%.*]] = call i32* @internal_ret0_nw(i32* nofree noundef nonnull align 4 dereferenceable(4) [[R0]], i32* nofree nonnull align 4 dereferenceable(4) [[W0]]) #[[ATTR2]] ; IS__TUNIT____-NEXT: [[CALL2:%.*]] = call i32* @internal_ret0_nw(i32* nofree noundef nonnull align 4 dereferenceable(4) [[R0]], i32* nofree nonnull align 4 dereferenceable(4) [[W0]]) #[[ATTR3]]
; IS__TUNIT____-NEXT: [[CALL3:%.*]] = call i32* @internal_ret0_nw(i32* nofree nonnull align 4 dereferenceable(4) [[W0]], i32* nofree nonnull align 4 dereferenceable(4) [[W0]]) #[[ATTR2]] ; IS__TUNIT____-NEXT: [[CALL3:%.*]] = call i32* @internal_ret0_nw(i32* nofree nonnull align 4 dereferenceable(4) [[W0]], i32* nofree nonnull align 4 dereferenceable(4) [[W0]]) #[[ATTR3]]
; IS__TUNIT____-NEXT: [[CALL4:%.*]] = call i32* @external_ret2_nrw(i32* nofree noundef nonnull align 4 dereferenceable(4) [[R0]], i32* nofree nonnull align 4 dereferenceable(4) [[R1]], i32* nofree nonnull align 4 dereferenceable(4) [[W0]]) #[[ATTR2]] ; IS__TUNIT____-NEXT: [[CALL4:%.*]] = call i32* @external_ret2_nrw(i32* nofree noundef nonnull align 4 dereferenceable(4) [[R0]], i32* nofree nonnull align 4 dereferenceable(4) [[R1]], i32* nofree nonnull align 4 dereferenceable(4) [[W0]]) #[[ATTR3]]
; IS__TUNIT____-NEXT: [[CALL5:%.*]] = call i32* @external_ret2_nrw(i32* nofree nonnull align 4 dereferenceable(4) [[R1]], i32* nofree noundef nonnull align 4 dereferenceable(4) [[R0]], i32* nofree nonnull align 4 dereferenceable(4) [[W0]]) #[[ATTR2]] ; IS__TUNIT____-NEXT: [[CALL5:%.*]] = call i32* @external_ret2_nrw(i32* nofree nonnull align 4 dereferenceable(4) [[R1]], i32* nofree noundef nonnull align 4 dereferenceable(4) [[R0]], i32* nofree nonnull align 4 dereferenceable(4) [[W0]]) #[[ATTR3]]
; IS__TUNIT____-NEXT: [[CALL6:%.*]] = call i32* @external_sink_ret2_nrw(i32* nofree noundef nonnull align 4 dereferenceable(4) [[R0]], i32* nocapture nofree nonnull readonly align 4 dereferenceable(4) [[R1]], i32* nofree nonnull writeonly align 4 dereferenceable(4) "no-capture-maybe-returned" [[W0]]) #[[ATTR2]] ; IS__TUNIT____-NEXT: [[CALL6:%.*]] = call i32* @external_sink_ret2_nrw(i32* nofree noundef nonnull align 4 dereferenceable(4) [[R0]], i32* nocapture nofree nonnull readonly align 4 dereferenceable(4) [[R1]], i32* nofree nonnull writeonly align 4 dereferenceable(4) "no-capture-maybe-returned" [[W0]]) #[[ATTR3]]
; IS__TUNIT____-NEXT: [[CALL7:%.*]] = call i32* @external_sink_ret2_nrw(i32* nofree nonnull align 4 dereferenceable(4) [[R1]], i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[R0]], i32* nofree nonnull writeonly align 4 dereferenceable(4) "no-capture-maybe-returned" [[W0]]) #[[ATTR2]] ; IS__TUNIT____-NEXT: [[CALL7:%.*]] = call i32* @external_sink_ret2_nrw(i32* nofree nonnull align 4 dereferenceable(4) [[R1]], i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[R0]], i32* nofree nonnull writeonly align 4 dereferenceable(4) "no-capture-maybe-returned" [[W0]]) #[[ATTR3]]
; IS__TUNIT____-NEXT: [[CALL8:%.*]] = call i32* @internal_ret0_nw(i32* nofree nonnull align 4 dereferenceable(4) [[R1]], i32* nofree nonnull align 4 dereferenceable(4) [[W0]]) #[[ATTR2]] ; IS__TUNIT____-NEXT: [[CALL8:%.*]] = call i32* @internal_ret0_nw(i32* nofree nonnull align 4 dereferenceable(4) [[R1]], i32* nofree nonnull align 4 dereferenceable(4) [[W0]]) #[[ATTR3]]
; IS__TUNIT____-NEXT: br label [[RETURN]] ; IS__TUNIT____-NEXT: br label [[RETURN]]
; IS__TUNIT____: return: ; IS__TUNIT____: return:
; IS__TUNIT____-NEXT: [[RETVAL_0:%.*]] = phi i32* [ [[CALL8]], [[IF_END]] ], [ [[R1]], [[IF_THEN]] ] ; IS__TUNIT____-NEXT: [[RETVAL_0:%.*]] = phi i32* [ [[CALL8]], [[IF_END]] ], [ [[R1]], [[IF_THEN]] ]
; IS__TUNIT____-NEXT: ret i32* undef ; IS__TUNIT____-NEXT: ret i32* undef
; ;
; IS__CGSCC____: Function Attrs: argmemonly nofree nosync nounwind ; IS__CGSCC____: Function Attrs: argmemonly nofree nosync nounwind
; IS__CGSCC____-LABEL: define {{[^@]+}}@internal_ret1_rrw ; IS__CGSCC____-LABEL: define {{[^@]+}}@internal_ret1_rrw
; IS__CGSCC____-SAME: (i32* nofree noundef nonnull align 4 dereferenceable(4) [[R0:%.*]], i32* nofree align 4 [[R1:%.*]], i32* nofree [[W0:%.*]]) #[[ATTR0]] { ; IS__CGSCC____-SAME: (i32* nofree noundef nonnull align 4 dereferenceable(4) [[R0:%.*]], i32* nofree align 4 [[R1:%.*]], i32* nofree [[W0:%.*]]) #[[ATTR0]] {
; IS__CGSCC____-NEXT: entry: ; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: [[TMP0:%.*]] = load i32, i32* [[R0]], align 4 ; IS__CGSCC____-NEXT: [[TMP0:%.*]] = load i32, i32* [[R0]], align 4
; IS__CGSCC____-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP0]], 0 ; IS__CGSCC____-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP0]], 0
; IS__CGSCC____-NEXT: br i1 [[TOBOOL]], label [[IF_END:%.*]], label [[IF_THEN:%.*]] ; IS__CGSCC____-NEXT: br i1 [[TOBOOL]], label [[IF_END:%.*]], label [[IF_THEN:%.*]]
; IS__CGSCC____: if.then: ; IS__CGSCC____: if.then:
; IS__CGSCC____-NEXT: br label [[RETURN:%.*]] ; IS__CGSCC____-NEXT: br label [[RETURN:%.*]]
; IS__CGSCC____: if.end: ; IS__CGSCC____: if.end:
; IS__CGSCC____-NEXT: [[CALL:%.*]] = call i32* @internal_ret1_rw(i32* nofree noundef nonnull align 4 dereferenceable(4) [[R0]], i32* nofree [[W0]]) #[[ATTR2]] ; IS__CGSCC____-NEXT: [[CALL:%.*]] = call i32* @internal_ret1_rw(i32* nofree noundef nonnull align 4 dereferenceable(4) [[R0]], i32* nofree [[W0]]) #[[ATTR3]]
; IS__CGSCC____-NEXT: [[TMP1:%.*]] = load i32, i32* [[R0]], align 4 ; IS__CGSCC____-NEXT: [[TMP1:%.*]] = load i32, i32* [[R0]], align 4
; IS__CGSCC____-NEXT: [[TMP2:%.*]] = load i32, i32* [[R1]], align 4 ; IS__CGSCC____-NEXT: [[TMP2:%.*]] = load i32, i32* [[R1]], align 4
; IS__CGSCC____-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP1]], [[TMP2]] ; IS__CGSCC____-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP1]], [[TMP2]]
; IS__CGSCC____-NEXT: store i32 [[ADD]], i32* [[W0]], align 4 ; IS__CGSCC____-NEXT: store i32 [[ADD]], i32* [[W0]], align 4
; IS__CGSCC____-NEXT: [[CALL1:%.*]] = call i32* @internal_ret1_rw(i32* nofree nonnull align 4 dereferenceable(4) [[R1]], i32* nofree nonnull align 4 dereferenceable(4) [[W0]]) #[[ATTR2]] ; IS__CGSCC____-NEXT: [[CALL1:%.*]] = call i32* @internal_ret1_rw(i32* nofree nonnull align 4 dereferenceable(4) [[R1]], i32* nofree nonnull align 4 dereferenceable(4) [[W0]]) #[[ATTR3]]
; IS__CGSCC____-NEXT: [[CALL2:%.*]] = call i32* @internal_ret0_nw(i32* nofree noundef nonnull align 4 dereferenceable(4) [[R0]], i32* nofree nonnull align 4 dereferenceable(4) [[W0]]) #[[ATTR2]] ; IS__CGSCC____-NEXT: [[CALL2:%.*]] = call i32* @internal_ret0_nw(i32* nofree noundef nonnull align 4 dereferenceable(4) [[R0]], i32* nofree nonnull align 4 dereferenceable(4) [[W0]]) #[[ATTR3]]
; IS__CGSCC____-NEXT: [[CALL3:%.*]] = call i32* @internal_ret0_nw(i32* nofree nonnull align 4 dereferenceable(4) [[W0]], i32* nofree nonnull align 4 dereferenceable(4) [[W0]]) #[[ATTR2]] ; IS__CGSCC____-NEXT: [[CALL3:%.*]] = call i32* @internal_ret0_nw(i32* nofree nonnull align 4 dereferenceable(4) [[W0]], i32* nofree nonnull align 4 dereferenceable(4) [[W0]]) #[[ATTR3]]
; IS__CGSCC____-NEXT: [[CALL4:%.*]] = call i32* @external_ret2_nrw(i32* nofree noundef nonnull align 4 dereferenceable(4) [[R0]], i32* nofree nonnull align 4 dereferenceable(4) [[R1]], i32* nofree nonnull align 4 dereferenceable(4) [[W0]]) #[[ATTR2]] ; IS__CGSCC____-NEXT: [[CALL4:%.*]] = call i32* @external_ret2_nrw(i32* nofree noundef nonnull align 4 dereferenceable(4) [[R0]], i32* nofree nonnull align 4 dereferenceable(4) [[R1]], i32* nofree nonnull align 4 dereferenceable(4) [[W0]]) #[[ATTR3]]
; IS__CGSCC____-NEXT: [[CALL5:%.*]] = call i32* @external_ret2_nrw(i32* nofree nonnull align 4 dereferenceable(4) [[R1]], i32* nofree noundef nonnull align 4 dereferenceable(4) [[R0]], i32* nofree nonnull align 4 dereferenceable(4) [[W0]]) #[[ATTR2]] ; IS__CGSCC____-NEXT: [[CALL5:%.*]] = call i32* @external_ret2_nrw(i32* nofree nonnull align 4 dereferenceable(4) [[R1]], i32* nofree noundef nonnull align 4 dereferenceable(4) [[R0]], i32* nofree nonnull align 4 dereferenceable(4) [[W0]]) #[[ATTR3]]
; IS__CGSCC____-NEXT: [[CALL6:%.*]] = call i32* @external_sink_ret2_nrw(i32* nofree noundef nonnull align 4 dereferenceable(4) [[R0]], i32* nocapture nofree nonnull readonly align 4 dereferenceable(4) [[R1]], i32* nofree nonnull writeonly align 4 dereferenceable(4) "no-capture-maybe-returned" [[W0]]) #[[ATTR3]] ; IS__CGSCC____-NEXT: [[CALL6:%.*]] = call i32* @external_sink_ret2_nrw(i32* nofree noundef nonnull align 4 dereferenceable(4) [[R0]], i32* nocapture nofree nonnull readonly align 4 dereferenceable(4) [[R1]], i32* nofree nonnull writeonly align 4 dereferenceable(4) "no-capture-maybe-returned" [[W0]]) #[[ATTR4]]
; IS__CGSCC____-NEXT: [[CALL7:%.*]] = call i32* @external_sink_ret2_nrw(i32* nofree nonnull align 4 dereferenceable(4) [[R1]], i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[R0]], i32* nofree nonnull writeonly align 4 dereferenceable(4) "no-capture-maybe-returned" [[W0]]) #[[ATTR3]] ; IS__CGSCC____-NEXT: [[CALL7:%.*]] = call i32* @external_sink_ret2_nrw(i32* nofree nonnull align 4 dereferenceable(4) [[R1]], i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[R0]], i32* nofree nonnull writeonly align 4 dereferenceable(4) "no-capture-maybe-returned" [[W0]]) #[[ATTR4]]
; IS__CGSCC____-NEXT: [[CALL8:%.*]] = call i32* @internal_ret0_nw(i32* nofree nonnull align 4 dereferenceable(4) [[R1]], i32* nofree nonnull align 4 dereferenceable(4) [[W0]]) #[[ATTR2]] ; IS__CGSCC____-NEXT: [[CALL8:%.*]] = call i32* @internal_ret0_nw(i32* nofree nonnull align 4 dereferenceable(4) [[R1]], i32* nofree nonnull align 4 dereferenceable(4) [[W0]]) #[[ATTR3]]
; IS__CGSCC____-NEXT: br label [[RETURN]] ; IS__CGSCC____-NEXT: br label [[RETURN]]
; IS__CGSCC____: return: ; IS__CGSCC____: return:
; IS__CGSCC____-NEXT: [[RETVAL_0:%.*]] = phi i32* [ [[R1]], [[IF_END]] ], [ [[R1]], [[IF_THEN]] ] ; IS__CGSCC____-NEXT: [[RETVAL_0:%.*]] = phi i32* [ [[R1]], [[IF_END]] ], [ [[R1]], [[IF_THEN]] ]
; IS__CGSCC____-NEXT: ret i32* undef ; IS__CGSCC____-NEXT: ret i32* undef
; ;
entry: entry:
%0 = load i32, i32* %r0, align 4 %0 = load i32, i32* %r0, align 4
%tobool = icmp ne i32 %0, 0 %tobool = icmp ne i32 %0, 0
Show All 19 Linesif.end: ; preds = %entry
br label %return br label %return
return: ; preds = %if.end, %if.then return: ; preds = %if.end, %if.then
%retval.0 = phi i32* [ %call8, %if.end ], [ %r1, %if.then ] %retval.0 = phi i32* [ %call8, %if.end ], [ %r1, %if.then ]
ret i32* %retval.0 ret i32* %retval.0
} }
define i32* @external_sink_ret2_nrw(i32* %n0, i32* %r0, i32* %w0) { define i32* @external_sink_ret2_nrw(i32* %n0, i32* %r0, i32* %w0) {
; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind willreturn ; CHECK: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@external_sink_ret2_nrw ; CHECK-LABEL: define {{[^@]+}}@external_sink_ret2_nrw
; IS__TUNIT____-SAME: (i32* nofree [[N0:%.*]], i32* nocapture nofree readonly [[R0:%.*]], i32* nofree returned writeonly "no-capture-maybe-returned" [[W0:%.*]]) #[[ATTR1:[0-9]+]] { ; CHECK-SAME: (i32* nofree [[N0:%.*]], i32* nocapture nofree readonly [[R0:%.*]], i32* nofree returned writeonly "no-capture-maybe-returned" [[W0:%.*]]) #[[ATTR1:[0-9]+]] {
; IS__TUNIT____-NEXT: entry: ; CHECK-NEXT: entry:
; IS__TUNIT____-NEXT: [[TOBOOL:%.*]] = icmp ne i32* [[N0]], null ; CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i32* [[N0]], null
; IS__TUNIT____-NEXT: br i1 [[TOBOOL]], label [[IF_END:%.*]], label [[IF_THEN:%.*]] ; CHECK-NEXT: br i1 [[TOBOOL]], label [[IF_END:%.*]], label [[IF_THEN:%.*]]
; IS__TUNIT____: if.then: ; CHECK: if.then:
; IS__TUNIT____-NEXT: br label [[RETURN:%.*]] ; CHECK-NEXT: br label [[RETURN:%.*]]
; IS__TUNIT____: if.end: ; CHECK: if.end:
; IS__TUNIT____-NEXT: [[TMP0:%.*]] = load i32, i32* [[R0]], align 4 ; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[R0]], align 4
; IS__TUNIT____-NEXT: store i32 [[TMP0]], i32* [[W0]], align 4 ; CHECK-NEXT: store i32 [[TMP0]], i32* [[W0]], align 4
; IS__TUNIT____-NEXT: br label [[RETURN]] ; CHECK-NEXT: br label [[RETURN]]
; IS__TUNIT____: return: ; CHECK: return:
; IS__TUNIT____-NEXT: ret i32* [[W0]] ; CHECK-NEXT: ret i32* [[W0]]
;
; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@external_sink_ret2_nrw
; IS__CGSCC____-SAME: (i32* nofree [[N0:%.*]], i32* nocapture nofree readonly [[R0:%.*]], i32* nofree returned writeonly "no-capture-maybe-returned" [[W0:%.*]]) #[[ATTR1:[0-9]+]] {
; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: [[TOBOOL:%.*]] = icmp ne i32* [[N0]], null
; IS__CGSCC____-NEXT: br i1 [[TOBOOL]], label [[IF_END:%.*]], label [[IF_THEN:%.*]]
; IS__CGSCC____: if.then:
; IS__CGSCC____-NEXT: br label [[RETURN:%.*]]
; IS__CGSCC____: if.end:
; IS__CGSCC____-NEXT: [[TMP0:%.*]] = load i32, i32* [[R0]], align 4
; IS__CGSCC____-NEXT: store i32 [[TMP0]], i32* [[W0]], align 4
; IS__CGSCC____-NEXT: br label [[RETURN]]
; IS__CGSCC____: return:
; IS__CGSCC____-NEXT: ret i32* [[W0]]
; ;
entry: entry:
%tobool = icmp ne i32* %n0, null %tobool = icmp ne i32* %n0, null
br i1 %tobool, label %if.end, label %if.then br i1 %tobool, label %if.end, label %if.then
if.then: ; preds = %entry if.then: ; preds = %entry
br label %return br label %return
Show All 12 Lines
; IS__TUNIT____-SAME: (i32* nofree noundef nonnull align 4 dereferenceable(4) [[R0:%.*]], i32* nofree [[W0:%.*]]) #[[ATTR0]] { ; IS__TUNIT____-SAME: (i32* nofree noundef nonnull align 4 dereferenceable(4) [[R0:%.*]], i32* nofree [[W0:%.*]]) #[[ATTR0]] {
; IS__TUNIT____-NEXT: entry: ; IS__TUNIT____-NEXT: entry:
; IS__TUNIT____-NEXT: [[TMP0:%.*]] = load i32, i32* [[R0]], align 4 ; IS__TUNIT____-NEXT: [[TMP0:%.*]] = load i32, i32* [[R0]], align 4
; IS__TUNIT____-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP0]], 0 ; IS__TUNIT____-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP0]], 0
; IS__TUNIT____-NEXT: br i1 [[TOBOOL]], label [[IF_END:%.*]], label [[IF_THEN:%.*]] ; IS__TUNIT____-NEXT: br i1 [[TOBOOL]], label [[IF_END:%.*]], label [[IF_THEN:%.*]]
; IS__TUNIT____: if.then: ; IS__TUNIT____: if.then:
; IS__TUNIT____-NEXT: br label [[RETURN:%.*]] ; IS__TUNIT____-NEXT: br label [[RETURN:%.*]]
; IS__TUNIT____: if.end: ; IS__TUNIT____: if.end:
; IS__TUNIT____-NEXT: [[CALL:%.*]] = call i32* @internal_ret1_rrw(i32* nofree noundef nonnull align 4 dereferenceable(4) [[R0]], i32* nofree noundef nonnull align 4 dereferenceable(4) [[R0]], i32* nofree [[W0]]) #[[ATTR2]] ; IS__TUNIT____-NEXT: [[CALL:%.*]] = call i32* @internal_ret1_rrw(i32* nofree noundef nonnull align 4 dereferenceable(4) [[R0]], i32* nofree noundef nonnull align 4 dereferenceable(4) [[R0]], i32* nofree [[W0]]) #[[ATTR3]]
; IS__TUNIT____-NEXT: [[TMP1:%.*]] = load i32, i32* [[R0]], align 4 ; IS__TUNIT____-NEXT: [[TMP1:%.*]] = load i32, i32* [[R0]], align 4
; IS__TUNIT____-NEXT: store i32 [[TMP1]], i32* [[W0]], align 4 ; IS__TUNIT____-NEXT: store i32 [[TMP1]], i32* [[W0]], align 4
; IS__TUNIT____-NEXT: [[CALL1:%.*]] = call i32* @internal_ret0_nw(i32* nofree noundef nonnull align 4 dereferenceable(4) [[R0]], i32* nofree nonnull align 4 dereferenceable(4) [[W0]]) #[[ATTR2]] ; IS__TUNIT____-NEXT: [[CALL1:%.*]] = call i32* @internal_ret0_nw(i32* nofree noundef nonnull align 4 dereferenceable(4) [[R0]], i32* nofree nonnull align 4 dereferenceable(4) [[W0]]) #[[ATTR3]]
; IS__TUNIT____-NEXT: [[CALL2:%.*]] = call i32* @internal_ret0_nw(i32* nofree nonnull align 4 dereferenceable(4) [[W0]], i32* nofree nonnull align 4 dereferenceable(4) [[W0]]) #[[ATTR2]] ; IS__TUNIT____-NEXT: [[CALL2:%.*]] = call i32* @internal_ret0_nw(i32* nofree nonnull align 4 dereferenceable(4) [[W0]], i32* nofree nonnull align 4 dereferenceable(4) [[W0]]) #[[ATTR3]]
; IS__TUNIT____-NEXT: [[CALL3:%.*]] = call i32* @external_sink_ret2_nrw(i32* nofree noundef nonnull align 4 dereferenceable(4) [[R0]], i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[R0]], i32* nofree nonnull writeonly align 4 dereferenceable(4) "no-capture-maybe-returned" [[W0]]) #[[ATTR2]] ; IS__TUNIT____-NEXT: [[CALL3:%.*]] = call i32* @external_sink_ret2_nrw(i32* nofree noundef nonnull align 4 dereferenceable(4) [[R0]], i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[R0]], i32* nofree nonnull writeonly align 4 dereferenceable(4) "no-capture-maybe-returned" [[W0]]) #[[ATTR3]]
; IS__TUNIT____-NEXT: [[CALL4:%.*]] = call i32* @external_ret2_nrw(i32* nofree noundef nonnull align 4 dereferenceable(4) [[R0]], i32* nofree noundef nonnull align 4 dereferenceable(4) [[R0]], i32* nofree nonnull align 4 dereferenceable(4) [[W0]]) #[[ATTR2]] ; IS__TUNIT____-NEXT: [[CALL4:%.*]] = call i32* @external_ret2_nrw(i32* nofree noundef nonnull align 4 dereferenceable(4) [[R0]], i32* nofree noundef nonnull align 4 dereferenceable(4) [[R0]], i32* nofree nonnull align 4 dereferenceable(4) [[W0]]) #[[ATTR3]]
; IS__TUNIT____-NEXT: br label [[RETURN]] ; IS__TUNIT____-NEXT: br label [[RETURN]]
; IS__TUNIT____: return: ; IS__TUNIT____: return:
; IS__TUNIT____-NEXT: [[RETVAL_0:%.*]] = phi i32* [ [[CALL4]], [[IF_END]] ], [ [[W0]], [[IF_THEN]] ] ; IS__TUNIT____-NEXT: [[RETVAL_0:%.*]] = phi i32* [ [[CALL4]], [[IF_END]] ], [ [[W0]], [[IF_THEN]] ]
; IS__TUNIT____-NEXT: ret i32* [[RETVAL_0]] ; IS__TUNIT____-NEXT: ret i32* [[RETVAL_0]]
; ;
; IS__CGSCC____: Function Attrs: argmemonly nofree nosync nounwind ; IS__CGSCC____: Function Attrs: argmemonly nofree nosync nounwind
; IS__CGSCC____-LABEL: define {{[^@]+}}@internal_ret1_rw ; IS__CGSCC____-LABEL: define {{[^@]+}}@internal_ret1_rw
; IS__CGSCC____-SAME: (i32* nofree noundef nonnull align 4 dereferenceable(4) [[R0:%.*]], i32* nofree [[W0:%.*]]) #[[ATTR0]] { ; IS__CGSCC____-SAME: (i32* nofree noundef nonnull align 4 dereferenceable(4) [[R0:%.*]], i32* nofree [[W0:%.*]]) #[[ATTR0]] {
; IS__CGSCC____-NEXT: entry: ; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: [[TMP0:%.*]] = load i32, i32* [[R0]], align 4 ; IS__CGSCC____-NEXT: [[TMP0:%.*]] = load i32, i32* [[R0]], align 4
; IS__CGSCC____-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP0]], 0 ; IS__CGSCC____-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP0]], 0
; IS__CGSCC____-NEXT: br i1 [[TOBOOL]], label [[IF_END:%.*]], label [[IF_THEN:%.*]] ; IS__CGSCC____-NEXT: br i1 [[TOBOOL]], label [[IF_END:%.*]], label [[IF_THEN:%.*]]
; IS__CGSCC____: if.then: ; IS__CGSCC____: if.then:
; IS__CGSCC____-NEXT: br label [[RETURN:%.*]] ; IS__CGSCC____-NEXT: br label [[RETURN:%.*]]
; IS__CGSCC____: if.end: ; IS__CGSCC____: if.end:
; IS__CGSCC____-NEXT: [[CALL:%.*]] = call i32* @internal_ret1_rrw(i32* nofree noundef nonnull align 4 dereferenceable(4) [[R0]], i32* nofree noundef nonnull align 4 dereferenceable(4) [[R0]], i32* nofree [[W0]]) #[[ATTR2]] ; IS__CGSCC____-NEXT: [[CALL:%.*]] = call i32* @internal_ret1_rrw(i32* nofree noundef nonnull align 4 dereferenceable(4) [[R0]], i32* nofree noundef nonnull align 4 dereferenceable(4) [[R0]], i32* nofree [[W0]]) #[[ATTR3]]
; IS__CGSCC____-NEXT: [[TMP1:%.*]] = load i32, i32* [[R0]], align 4 ; IS__CGSCC____-NEXT: [[TMP1:%.*]] = load i32, i32* [[R0]], align 4
; IS__CGSCC____-NEXT: store i32 [[TMP1]], i32* [[W0]], align 4 ; IS__CGSCC____-NEXT: store i32 [[TMP1]], i32* [[W0]], align 4
; IS__CGSCC____-NEXT: [[CALL1:%.*]] = call i32* @internal_ret0_nw(i32* nofree noundef nonnull align 4 dereferenceable(4) [[R0]], i32* nofree nonnull align 4 dereferenceable(4) [[W0]]) #[[ATTR2]] ; IS__CGSCC____-NEXT: [[CALL1:%.*]] = call i32* @internal_ret0_nw(i32* nofree noundef nonnull align 4 dereferenceable(4) [[R0]], i32* nofree nonnull align 4 dereferenceable(4) [[W0]]) #[[ATTR3]]
; IS__CGSCC____-NEXT: [[CALL2:%.*]] = call i32* @internal_ret0_nw(i32* nofree nonnull align 4 dereferenceable(4) [[W0]], i32* nofree nonnull align 4 dereferenceable(4) [[W0]]) #[[ATTR2]] ; IS__CGSCC____-NEXT: [[CALL2:%.*]] = call i32* @internal_ret0_nw(i32* nofree nonnull align 4 dereferenceable(4) [[W0]], i32* nofree nonnull align 4 dereferenceable(4) [[W0]]) #[[ATTR3]]
; IS__CGSCC____-NEXT: [[CALL3:%.*]] = call i32* @external_sink_ret2_nrw(i32* nofree noundef nonnull align 4 dereferenceable(4) [[R0]], i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[R0]], i32* nofree nonnull writeonly align 4 dereferenceable(4) "no-capture-maybe-returned" [[W0]]) #[[ATTR4:[0-9]+]] ; IS__CGSCC____-NEXT: [[CALL3:%.*]] = call i32* @external_sink_ret2_nrw(i32* nofree noundef nonnull align 4 dereferenceable(4) [[R0]], i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[R0]], i32* nofree nonnull writeonly align 4 dereferenceable(4) "no-capture-maybe-returned" [[W0]]) #[[ATTR5:[0-9]+]]
; IS__CGSCC____-NEXT: [[CALL4:%.*]] = call i32* @external_ret2_nrw(i32* nofree noundef nonnull align 4 dereferenceable(4) [[R0]], i32* nofree noundef nonnull align 4 dereferenceable(4) [[R0]], i32* nofree nonnull align 4 dereferenceable(4) [[W0]]) #[[ATTR2]] ; IS__CGSCC____-NEXT: [[CALL4:%.*]] = call i32* @external_ret2_nrw(i32* nofree noundef nonnull align 4 dereferenceable(4) [[R0]], i32* nofree noundef nonnull align 4 dereferenceable(4) [[R0]], i32* nofree nonnull align 4 dereferenceable(4) [[W0]]) #[[ATTR3]]
; IS__CGSCC____-NEXT: br label [[RETURN]] ; IS__CGSCC____-NEXT: br label [[RETURN]]
; IS__CGSCC____: return: ; IS__CGSCC____: return:
; IS__CGSCC____-NEXT: [[RETVAL_0:%.*]] = phi i32* [ [[CALL4]], [[IF_END]] ], [ [[W0]], [[IF_THEN]] ] ; IS__CGSCC____-NEXT: [[RETVAL_0:%.*]] = phi i32* [ [[CALL4]], [[IF_END]] ], [ [[W0]], [[IF_THEN]] ]
; IS__CGSCC____-NEXT: ret i32* [[RETVAL_0]] ; IS__CGSCC____-NEXT: ret i32* [[RETVAL_0]]
; ;
entry: entry:
%0 = load i32, i32* %r0, align 4 %0 = load i32, i32* %r0, align 4
%tobool = icmp ne i32 %0, 0 %tobool = icmp ne i32 %0, 0
Show All 13 Linesif.end: ; preds = %entry
br label %return br label %return
return: ; preds = %if.end, %if.then return: ; preds = %if.end, %if.then
%retval.0 = phi i32* [ %call4, %if.end ], [ %w0, %if.then ] %retval.0 = phi i32* [ %call4, %if.end ], [ %w0, %if.then ]
ret i32* %retval.0 ret i32* %retval.0
} }
define i32* @external_source_ret2_nrw(i32* %n0, i32* %r0, i32* %w0) { define i32* @external_source_ret2_nrw(i32* %n0, i32* %r0, i32* %w0) {
; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind ; IS__TUNIT____: Function Attrs: argmemonly nofree norecurse nosync nounwind
; IS__TUNIT____-LABEL: define {{[^@]+}}@external_source_ret2_nrw ; IS__TUNIT____-LABEL: define {{[^@]+}}@external_source_ret2_nrw
; IS__TUNIT____-SAME: (i32* nofree [[N0:%.*]], i32* nofree [[R0:%.*]], i32* nofree [[W0:%.*]]) #[[ATTR0]] { ; IS__TUNIT____-SAME: (i32* nofree [[N0:%.*]], i32* nofree [[R0:%.*]], i32* nofree [[W0:%.*]]) #[[ATTR2:[0-9]+]] {
; IS__TUNIT____-NEXT: entry: ; IS__TUNIT____-NEXT: entry:
; IS__TUNIT____-NEXT: [[CALL:%.*]] = call i32* @external_sink_ret2_nrw(i32* nofree [[N0]], i32* nocapture nofree readonly [[R0]], i32* nofree writeonly "no-capture-maybe-returned" [[W0]]) #[[ATTR3:[0-9]+]] ; IS__TUNIT____-NEXT: [[CALL:%.*]] = call i32* @external_sink_ret2_nrw(i32* nofree [[N0]], i32* nocapture nofree readonly [[R0]], i32* nofree writeonly "no-capture-maybe-returned" [[W0]]) #[[ATTR4:[0-9]+]]
; IS__TUNIT____-NEXT: [[CALL1:%.*]] = call i32* @external_ret2_nrw(i32* nofree [[N0]], i32* nofree [[R0]], i32* nofree [[W0]]) #[[ATTR2]] ; IS__TUNIT____-NEXT: [[CALL1:%.*]] = call i32* @external_ret2_nrw(i32* nofree [[N0]], i32* nofree [[R0]], i32* nofree [[W0]]) #[[ATTR3]]
; IS__TUNIT____-NEXT: ret i32* [[CALL1]] ; IS__TUNIT____-NEXT: ret i32* [[CALL1]]
; ;
; IS__CGSCC____: Function Attrs: argmemonly nofree nosync nounwind ; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind
; IS__CGSCC____-LABEL: define {{[^@]+}}@external_source_ret2_nrw ; IS__CGSCC____-LABEL: define {{[^@]+}}@external_source_ret2_nrw
; IS__CGSCC____-SAME: (i32* nofree [[N0:%.*]], i32* nofree [[R0:%.*]], i32* nofree [[W0:%.*]]) #[[ATTR0]] { ; IS__CGSCC____-SAME: (i32* nofree [[N0:%.*]], i32* nofree [[R0:%.*]], i32* nofree [[W0:%.*]]) #[[ATTR2:[0-9]+]] {
; IS__CGSCC____-NEXT: entry: ; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: [[CALL:%.*]] = call i32* @external_sink_ret2_nrw(i32* nofree [[N0]], i32* nocapture nofree readonly [[R0]], i32* nofree writeonly "no-capture-maybe-returned" [[W0]]) #[[ATTR4]] ; IS__CGSCC____-NEXT: [[CALL:%.*]] = call i32* @external_sink_ret2_nrw(i32* nofree [[N0]], i32* nocapture nofree readonly [[R0]], i32* nofree writeonly "no-capture-maybe-returned" [[W0]]) #[[ATTR5]]
; IS__CGSCC____-NEXT: [[CALL1:%.*]] = call i32* @external_ret2_nrw(i32* nofree [[N0]], i32* nofree [[R0]], i32* nofree [[W0]]) #[[ATTR3]] ; IS__CGSCC____-NEXT: [[CALL1:%.*]] = call i32* @external_ret2_nrw(i32* nofree [[N0]], i32* nofree [[R0]], i32* nofree [[W0]]) #[[ATTR4]]
; IS__CGSCC____-NEXT: ret i32* [[CALL1]] ; IS__CGSCC____-NEXT: ret i32* [[CALL1]]
; ;
entry: entry:
%call = call i32* @external_sink_ret2_nrw(i32* %n0, i32* %r0, i32* %w0) %call = call i32* @external_sink_ret2_nrw(i32* %n0, i32* %r0, i32* %w0)
%call1 = call i32* @external_ret2_nrw(i32* %n0, i32* %r0, i32* %w0) %call1 = call i32* @external_ret2_nrw(i32* %n0, i32* %r0, i32* %w0)
ret i32* %call1 ret i32* %call1
} }
; Verify that we see only expected attribute sets, the above lines only check ; Verify that we see only expected attribute sets, the above lines only check
; for a subset relation. ; for a subset relation.
;. ;.
; IS__TUNIT____: attributes #[[ATTR0]] = { argmemonly nofree nosync nounwind } ; IS__TUNIT____: attributes #[[ATTR0]] = { argmemonly nofree nosync nounwind }
; IS__TUNIT____: attributes #[[ATTR1]] = { argmemonly nofree nosync nounwind willreturn } ; IS__TUNIT____: attributes #[[ATTR1]] = { argmemonly nofree norecurse nosync nounwind willreturn }
; IS__TUNIT____: attributes #[[ATTR2]] = { nofree nosync nounwind } ; IS__TUNIT____: attributes #[[ATTR2]] = { argmemonly nofree norecurse nosync nounwind }
; IS__TUNIT____: attributes #[[ATTR3]] = { nofree nosync nounwind willreturn } ; IS__TUNIT____: attributes #[[ATTR3]] = { nofree nosync nounwind }
; IS__TUNIT____: attributes #[[ATTR4]] = { nofree nosync nounwind willreturn }
;. ;.
; IS__CGSCC____: attributes #[[ATTR0]] = { argmemonly nofree nosync nounwind } ; IS__CGSCC____: attributes #[[ATTR0]] = { argmemonly nofree nosync nounwind }
; IS__CGSCC____: attributes #[[ATTR1]] = { argmemonly nofree norecurse nosync nounwind willreturn } ; IS__CGSCC____: attributes #[[ATTR1]] = { argmemonly nofree norecurse nosync nounwind willreturn }
; IS__CGSCC____: attributes #[[ATTR2]] = { nofree nosync nounwind } ; IS__CGSCC____: attributes #[[ATTR2]] = { argmemonly nofree norecurse nosync nounwind }
; IS__CGSCC____: attributes #[[ATTR3]] = { nounwind } ; IS__CGSCC____: attributes #[[ATTR3]] = { nofree nosync nounwind }
; IS__CGSCC____: attributes #[[ATTR4]] = { nounwind willreturn } ; IS__CGSCC____: attributes #[[ATTR4]] = { nounwind }
; IS__CGSCC____: attributes #[[ATTR5]] = { nounwind willreturn }
;. ;.

llvm/test/Transforms/Attributor/readattrs.ll

Show All 22 Lines
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
call void (i8*, i8*, ...) @test1_1(i8* %x1_2, i8* %y1_2, i8* %z1_2) call void (i8*, i8*, ...) @test1_1(i8* %x1_2, i8* %y1_2, i8* %z1_2)
store i32 0, i32* @x store i32 0, i32* @x
ret void ret void
} }
define i8* @test2(i8* %p) { define i8* @test2(i8* %p) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind willreturn writeonly ; CHECK: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly
; IS__TUNIT____-LABEL: define {{[^@]+}}@test2 ; CHECK-LABEL: define {{[^@]+}}@test2
; IS__TUNIT____-SAME: (i8* nofree readnone returned "no-capture-maybe-returned" [[P:%.*]]) #[[ATTR0:[0-9]+]] { ; CHECK-SAME: (i8* nofree readnone returned "no-capture-maybe-returned" [[P:%.*]]) #[[ATTR0:[0-9]+]] {
; IS__TUNIT____-NEXT: store i32 0, i32* @x, align 4 ; CHECK-NEXT: store i32 0, i32* @x, align 4
; IS__TUNIT____-NEXT: ret i8* [[P]] ; CHECK-NEXT: ret i8* [[P]]
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC____-LABEL: define {{[^@]+}}@test2
; IS__CGSCC____-SAME: (i8* nofree readnone returned "no-capture-maybe-returned" [[P:%.*]]) #[[ATTR0:[0-9]+]] {
; IS__CGSCC____-NEXT: store i32 0, i32* @x, align 4
; IS__CGSCC____-NEXT: ret i8* [[P]]
; ;
store i32 0, i32* @x store i32 0, i32* @x
ret i8* %p ret i8* %p
} }
define i1 @test3(i8* %p, i8* %q) { define i1 @test3(i8* %p, i8* %q) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@test3 ; CHECK-LABEL: define {{[^@]+}}@test3
; IS__TUNIT____-SAME: (i8* nofree readnone [[P:%.*]], i8* nofree readnone [[Q:%.*]]) #[[ATTR1:[0-9]+]] { ; CHECK-SAME: (i8* nofree readnone [[P:%.*]], i8* nofree readnone [[Q:%.*]]) #[[ATTR1:[0-9]+]] {
; IS__TUNIT____-NEXT: [[A:%.*]] = icmp ult i8* [[P]], [[Q]] ; CHECK-NEXT: [[A:%.*]] = icmp ult i8* [[P]], [[Q]]
; IS__TUNIT____-NEXT: ret i1 [[A]] ; CHECK-NEXT: ret i1 [[A]]
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@test3
; IS__CGSCC____-SAME: (i8* nofree readnone [[P:%.*]], i8* nofree readnone [[Q:%.*]]) #[[ATTR1:[0-9]+]] {
; IS__CGSCC____-NEXT: [[A:%.*]] = icmp ult i8* [[P]], [[Q]]
; IS__CGSCC____-NEXT: ret i1 [[A]]
; ;
%A = icmp ult i8* %p, %q %A = icmp ult i8* %p, %q
ret i1 %A ret i1 %A
} }
declare void @test4_1(i8* nocapture) readonly declare void @test4_1(i8* nocapture) readonly
define void @test4_2(i8* %p) { define void @test4_2(i8* %p) {
; CHECK: Function Attrs: readonly ; CHECK: Function Attrs: readonly
; CHECK-LABEL: define {{[^@]+}}@test4_2 ; CHECK-LABEL: define {{[^@]+}}@test4_2
; CHECK-SAME: (i8* nocapture readonly [[P:%.*]]) #[[ATTR2:[0-9]+]] { ; CHECK-SAME: (i8* nocapture readonly [[P:%.*]]) #[[ATTR2:[0-9]+]] {
; CHECK-NEXT: call void @test4_1(i8* nocapture readonly [[P]]) #[[ATTR2]] ; CHECK-NEXT: call void @test4_1(i8* nocapture readonly [[P]]) #[[ATTR2]]
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
call void @test4_1(i8* %p) call void @test4_1(i8* %p)
ret void ret void
} }
; Missed optz'n: we could make %q readnone, but don't break test6! ; Missed optz'n: we could make %q readnone, but don't break test6!
define void @test5(i8** %p, i8* %q) { define void @test5(i8** %p, i8* %q) {
; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind willreturn writeonly ; CHECK: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__TUNIT____-LABEL: define {{[^@]+}}@test5 ; CHECK-LABEL: define {{[^@]+}}@test5
; IS__TUNIT____-SAME: (i8** nocapture nofree noundef nonnull writeonly align 8 dereferenceable(8) [[P:%.*]], i8* nofree writeonly [[Q:%.*]]) #[[ATTR3:[0-9]+]] { ; CHECK-SAME: (i8** nocapture nofree noundef nonnull writeonly align 8 dereferenceable(8) [[P:%.*]], i8* nofree writeonly [[Q:%.*]]) #[[ATTR3:[0-9]+]] {
; IS__TUNIT____-NEXT: store i8* [[Q]], i8** [[P]], align 8 ; CHECK-NEXT: store i8* [[Q]], i8** [[P]], align 8
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC____-LABEL: define {{[^@]+}}@test5
; IS__CGSCC____-SAME: (i8** nocapture nofree noundef nonnull writeonly align 8 dereferenceable(8) [[P:%.*]], i8* nofree writeonly [[Q:%.*]]) #[[ATTR3:[0-9]+]] {
; IS__CGSCC____-NEXT: store i8* [[Q]], i8** [[P]], align 8
; IS__CGSCC____-NEXT: ret void
; ;
store i8* %q, i8** %p store i8* %q, i8** %p
ret void ret void
} }
declare void @test6_1() declare void @test6_1()
; This is not a missed optz'n. ; This is not a missed optz'n.
define void @test6_2(i8** %p, i8* %q) { define void @test6_2(i8** %p, i8* %q) {
; CHECK-LABEL: define {{[^@]+}}@test6_2 ; CHECK-LABEL: define {{[^@]+}}@test6_2
; CHECK-SAME: (i8** nocapture nofree noundef nonnull writeonly align 8 dereferenceable(8) [[P:%.*]], i8* nofree [[Q:%.*]]) { ; CHECK-SAME: (i8** nocapture nofree noundef nonnull writeonly align 8 dereferenceable(8) [[P:%.*]], i8* nofree [[Q:%.*]]) {
; CHECK-NEXT: store i8* [[Q]], i8** [[P]], align 8 ; CHECK-NEXT: store i8* [[Q]], i8** [[P]], align 8
; CHECK-NEXT: call void @test6_1() ; CHECK-NEXT: call void @test6_1()
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
store i8* %q, i8** %p store i8* %q, i8** %p
call void @test6_1() call void @test6_1()
ret void ret void
} }
; inalloca parameters are always considered written ; inalloca parameters are always considered written
define void @test7_1(i32* inalloca(i32) %a) { define void @test7_1(i32* inalloca(i32) %a) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@test7_1 ; CHECK-LABEL: define {{[^@]+}}@test7_1
; IS__TUNIT____-SAME: (i32* nocapture nofree nonnull writeonly inalloca(i32) dereferenceable(4) [[A:%.*]]) #[[ATTR1]] { ; CHECK-SAME: (i32* nocapture nofree nonnull writeonly inalloca(i32) dereferenceable(4) [[A:%.*]]) #[[ATTR1]] {
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@test7_1
; IS__CGSCC____-SAME: (i32* nocapture nofree nonnull writeonly inalloca(i32) dereferenceable(4) [[A:%.*]]) #[[ATTR1]] {
; IS__CGSCC____-NEXT: ret void
; ;
ret void ret void
} }
define i32* @test8_1(i32* %p) { define i32* @test8_1(i32* %p) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@test8_1 ; CHECK-LABEL: define {{[^@]+}}@test8_1
; IS__TUNIT____-SAME: (i32* nofree readnone returned "no-capture-maybe-returned" [[P:%.*]]) #[[ATTR1]] { ; CHECK-SAME: (i32* nofree readnone returned "no-capture-maybe-returned" [[P:%.*]]) #[[ATTR1]] {
; IS__TUNIT____-NEXT: entry: ; CHECK-NEXT: entry:
; IS__TUNIT____-NEXT: ret i32* [[P]] ; CHECK-NEXT: ret i32* [[P]]
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@test8_1
; IS__CGSCC____-SAME: (i32* nofree readnone returned "no-capture-maybe-returned" [[P:%.*]]) #[[ATTR1]] {
; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: ret i32* [[P]]
; ;
entry: entry:
ret i32* %p ret i32* %p
} }
define void @test8_2(i32* %p) { define void @test8_2(i32* %p) {
; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind willreturn writeonly ; CHECK: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__TUNIT____-LABEL: define {{[^@]+}}@test8_2 ; CHECK-LABEL: define {{[^@]+}}@test8_2
; IS__TUNIT____-SAME: (i32* nocapture nofree writeonly [[P:%.*]]) #[[ATTR3]] { ; CHECK-SAME: (i32* nocapture nofree writeonly [[P:%.*]]) #[[ATTR3]] {
; IS__TUNIT____-NEXT: entry: ; CHECK-NEXT: entry:
; IS__TUNIT____-NEXT: store i32 10, i32* [[P]], align 4 ; CHECK-NEXT: store i32 10, i32* [[P]], align 4
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC____-LABEL: define {{[^@]+}}@test8_2
; IS__CGSCC____-SAME: (i32* nocapture nofree writeonly [[P:%.*]]) #[[ATTR3]] {
; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: store i32 10, i32* [[P]], align 4
; IS__CGSCC____-NEXT: ret void
; ;
entry: entry:
%call = call i32* @test8_1(i32* %p) %call = call i32* @test8_1(i32* %p)
store i32 10, i32* %call, align 4 store i32 10, i32* %call, align 4
ret void ret void
} }
; CHECK: declare void @llvm.masked.scatter ; CHECK: declare void @llvm.masked.scatter
declare void @llvm.masked.scatter.v4i32.v4p0i32(<4 x i32>%val, <4 x i32*>, i32, <4 x i1>) declare void @llvm.masked.scatter.v4i32.v4p0i32(<4 x i32>%val, <4 x i32*>, i32, <4 x i1>)
; CHECK-NOT: readnone ; CHECK-NOT: readnone
; CHECK-NOT: readonly ; CHECK-NOT: readonly
define void @test9(<4 x i32*> %ptrs, <4 x i32>%val) { define void @test9(<4 x i32*> %ptrs, <4 x i32>%val) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind willreturn writeonly ; CHECK: Function Attrs: nofree nosync nounwind willreturn writeonly
; IS__TUNIT____-LABEL: define {{[^@]+}}@test9 ; CHECK-LABEL: define {{[^@]+}}@test9
; IS__TUNIT____-SAME: (<4 x i32*> [[PTRS:%.*]], <4 x i32> [[VAL:%.*]]) #[[ATTR0]] { ; CHECK-SAME: (<4 x i32*> [[PTRS:%.*]], <4 x i32> [[VAL:%.*]]) #[[ATTR4:[0-9]+]] {
; IS__TUNIT____-NEXT: call void @llvm.masked.scatter.v4i32.v4p0i32(<4 x i32> [[VAL]], <4 x i32*> [[PTRS]], i32 noundef 4, <4 x i1> noundef <i1 true, i1 false, i1 true, i1 false>) #[[ATTR10:[0-9]+]] ; CHECK-NEXT: call void @llvm.masked.scatter.v4i32.v4p0i32(<4 x i32> [[VAL]], <4 x i32*> [[PTRS]], i32 noundef 4, <4 x i1> noundef <i1 true, i1 false, i1 true, i1 false>) #[[ATTR11:[0-9]+]]
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: nofree nosync nounwind willreturn writeonly
; IS__CGSCC____-LABEL: define {{[^@]+}}@test9
; IS__CGSCC____-SAME: (<4 x i32*> [[PTRS:%.*]], <4 x i32> [[VAL:%.*]]) #[[ATTR4:[0-9]+]] {
; IS__CGSCC____-NEXT: call void @llvm.masked.scatter.v4i32.v4p0i32(<4 x i32> [[VAL]], <4 x i32*> [[PTRS]], i32 noundef 4, <4 x i1> noundef <i1 true, i1 false, i1 true, i1 false>) #[[ATTR11:[0-9]+]]
; IS__CGSCC____-NEXT: ret void
; ;
call void @llvm.masked.scatter.v4i32.v4p0i32(<4 x i32>%val, <4 x i32*> %ptrs, i32 4, <4 x i1><i1 true, i1 false, i1 true, i1 false>) call void @llvm.masked.scatter.v4i32.v4p0i32(<4 x i32>%val, <4 x i32*> %ptrs, i32 4, <4 x i1><i1 true, i1 false, i1 true, i1 false>)
ret void ret void
} }
; CHECK: declare <4 x i32> @llvm.masked.gather ; CHECK: declare <4 x i32> @llvm.masked.gather
declare <4 x i32> @llvm.masked.gather.v4i32.v4p0i32(<4 x i32*>, i32, <4 x i1>, <4 x i32>) declare <4 x i32> @llvm.masked.gather.v4i32.v4p0i32(<4 x i32*>, i32, <4 x i1>, <4 x i32>)
define <4 x i32> @test10(<4 x i32*> %ptrs) { define <4 x i32> @test10(<4 x i32*> %ptrs) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readonly willreturn ; CHECK: Function Attrs: nofree nosync nounwind readonly willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@test10 ; CHECK-LABEL: define {{[^@]+}}@test10
; IS__TUNIT____-SAME: (<4 x i32*> [[PTRS:%.*]]) #[[ATTR4:[0-9]+]] { ; CHECK-SAME: (<4 x i32*> [[PTRS:%.*]]) #[[ATTR5:[0-9]+]] {
; IS__TUNIT____-NEXT: [[RES:%.*]] = call <4 x i32> @llvm.masked.gather.v4i32.v4p0i32(<4 x i32*> [[PTRS]], i32 noundef 4, <4 x i1> noundef <i1 true, i1 false, i1 true, i1 false>, <4 x i32> undef) #[[ATTR11:[0-9]+]] ; CHECK-NEXT: [[RES:%.*]] = call <4 x i32> @llvm.masked.gather.v4i32.v4p0i32(<4 x i32*> [[PTRS]], i32 noundef 4, <4 x i1> noundef <i1 true, i1 false, i1 true, i1 false>, <4 x i32> undef) #[[ATTR12:[0-9]+]]
; IS__TUNIT____-NEXT: ret <4 x i32> [[RES]] ; CHECK-NEXT: ret <4 x i32> [[RES]]
;
; IS__CGSCC____: Function Attrs: nofree nosync nounwind readonly willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@test10
; IS__CGSCC____-SAME: (<4 x i32*> [[PTRS:%.*]]) #[[ATTR5:[0-9]+]] {
; IS__CGSCC____-NEXT: [[RES:%.*]] = call <4 x i32> @llvm.masked.gather.v4i32.v4p0i32(<4 x i32*> [[PTRS]], i32 noundef 4, <4 x i1> noundef <i1 true, i1 false, i1 true, i1 false>, <4 x i32> undef) #[[ATTR12:[0-9]+]]
; IS__CGSCC____-NEXT: ret <4 x i32> [[RES]]
; ;
%res = call <4 x i32> @llvm.masked.gather.v4i32.v4p0i32(<4 x i32*> %ptrs, i32 4, <4 x i1><i1 true, i1 false, i1 true, i1 false>, <4 x i32>undef) %res = call <4 x i32> @llvm.masked.gather.v4i32.v4p0i32(<4 x i32*> %ptrs, i32 4, <4 x i1><i1 true, i1 false, i1 true, i1 false>, <4 x i32>undef)
ret <4 x i32> %res ret <4 x i32> %res
} }
; CHECK: declare <4 x i32> @test11_1 ; CHECK: declare <4 x i32> @test11_1
declare <4 x i32> @test11_1(<4 x i32*>) argmemonly nounwind readonly declare <4 x i32> @test11_1(<4 x i32*>) argmemonly nounwind readonly
define <4 x i32> @test11_2(<4 x i32*> %ptrs) { define <4 x i32> @test11_2(<4 x i32*> %ptrs) {
; IS__TUNIT____: Function Attrs: argmemonly nounwind readonly ; CHECK: Function Attrs: argmemonly nounwind readonly
; IS__TUNIT____-LABEL: define {{[^@]+}}@test11_2 ; CHECK-LABEL: define {{[^@]+}}@test11_2
; IS__TUNIT____-SAME: (<4 x i32*> [[PTRS:%.*]]) #[[ATTR5:[0-9]+]] { ; CHECK-SAME: (<4 x i32*> [[PTRS:%.*]]) #[[ATTR6:[0-9]+]] {
; IS__TUNIT____-NEXT: [[RES:%.*]] = call <4 x i32> @test11_1(<4 x i32*> [[PTRS]]) #[[ATTR9:[0-9]+]] ; CHECK-NEXT: [[RES:%.*]] = call <4 x i32> @test11_1(<4 x i32*> [[PTRS]]) #[[ATTR10:[0-9]+]]
; IS__TUNIT____-NEXT: ret <4 x i32> [[RES]] ; CHECK-NEXT: ret <4 x i32> [[RES]]
;
; IS__CGSCC____: Function Attrs: argmemonly nounwind readonly
; IS__CGSCC____-LABEL: define {{[^@]+}}@test11_2
; IS__CGSCC____-SAME: (<4 x i32*> [[PTRS:%.*]]) #[[ATTR6:[0-9]+]] {
; IS__CGSCC____-NEXT: [[RES:%.*]] = call <4 x i32> @test11_1(<4 x i32*> [[PTRS]]) #[[ATTR10:[0-9]+]]
; IS__CGSCC____-NEXT: ret <4 x i32> [[RES]]
; ;
%res = call <4 x i32> @test11_1(<4 x i32*> %ptrs) %res = call <4 x i32> @test11_1(<4 x i32*> %ptrs)
ret <4 x i32> %res ret <4 x i32> %res
} }
declare <4 x i32> @test12_1(<4 x i32*>) argmemonly nounwind declare <4 x i32> @test12_1(<4 x i32*>) argmemonly nounwind
; CHECK-NOT: readnone ; CHECK-NOT: readnone
define <4 x i32> @test12_2(<4 x i32*> %ptrs) { define <4 x i32> @test12_2(<4 x i32*> %ptrs) {
; IS__TUNIT____: Function Attrs: argmemonly nounwind ; CHECK: Function Attrs: argmemonly nounwind
; IS__TUNIT____-LABEL: define {{[^@]+}}@test12_2 ; CHECK-LABEL: define {{[^@]+}}@test12_2
; IS__TUNIT____-SAME: (<4 x i32*> [[PTRS:%.*]]) #[[ATTR6:[0-9]+]] { ; CHECK-SAME: (<4 x i32*> [[PTRS:%.*]]) #[[ATTR7:[0-9]+]] {
; IS__TUNIT____-NEXT: [[RES:%.*]] = call <4 x i32> @test12_1(<4 x i32*> [[PTRS]]) #[[ATTR12:[0-9]+]] ; CHECK-NEXT: [[RES:%.*]] = call <4 x i32> @test12_1(<4 x i32*> [[PTRS]]) #[[ATTR13:[0-9]+]]
; IS__TUNIT____-NEXT: ret <4 x i32> [[RES]] ; CHECK-NEXT: ret <4 x i32> [[RES]]
;
; IS__CGSCC____: Function Attrs: argmemonly nounwind
; IS__CGSCC____-LABEL: define {{[^@]+}}@test12_2
; IS__CGSCC____-SAME: (<4 x i32*> [[PTRS:%.*]]) #[[ATTR7:[0-9]+]] {
; IS__CGSCC____-NEXT: [[RES:%.*]] = call <4 x i32> @test12_1(<4 x i32*> [[PTRS]]) #[[ATTR13:[0-9]+]]
; IS__CGSCC____-NEXT: ret <4 x i32> [[RES]]
; ;
%res = call <4 x i32> @test12_1(<4 x i32*> %ptrs) %res = call <4 x i32> @test12_1(<4 x i32*> %ptrs)
ret <4 x i32> %res ret <4 x i32> %res
} }
define i32 @volatile_load(i32* %p) { define i32 @volatile_load(i32* %p) {
; IS__TUNIT____: Function Attrs: argmemonly nofree nounwind willreturn ; CHECK: Function Attrs: argmemonly nofree norecurse nounwind willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@volatile_load ; CHECK-LABEL: define {{[^@]+}}@volatile_load
; IS__TUNIT____-SAME: (i32* nofree noundef align 4 [[P:%.*]]) #[[ATTR7:[0-9]+]] { ; CHECK-SAME: (i32* nofree noundef align 4 [[P:%.*]]) #[[ATTR8:[0-9]+]] {
; IS__TUNIT____-NEXT: [[LOAD:%.*]] = load volatile i32, i32* [[P]], align 4 ; CHECK-NEXT: [[LOAD:%.*]] = load volatile i32, i32* [[P]], align 4
; IS__TUNIT____-NEXT: ret i32 [[LOAD]] ; CHECK-NEXT: ret i32 [[LOAD]]
;
; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@volatile_load
; IS__CGSCC____-SAME: (i32* nofree noundef align 4 [[P:%.*]]) #[[ATTR8:[0-9]+]] {
; IS__CGSCC____-NEXT: [[LOAD:%.*]] = load volatile i32, i32* [[P]], align 4
; IS__CGSCC____-NEXT: ret i32 [[LOAD]]
; ;
%load = load volatile i32, i32* %p %load = load volatile i32, i32* %p
ret i32 %load ret i32 %load
} }
declare void @escape_readnone_ptr(i8** %addr, i8* readnone %ptr) declare void @escape_readnone_ptr(i8** %addr, i8* readnone %ptr)
declare void @escape_readonly_ptr(i8** %addr, i8* readonly %ptr) declare void @escape_readonly_ptr(i8** %addr, i8* readonly %ptr)
▲ Show 20 Lines • Show All 46 Lines • ▼ Show 20 Lines
; CHECK-NEXT: call void @escape_i8(i8* nonnull dereferenceable(1) [[WRITTEN]]) ; CHECK-NEXT: call void @escape_i8(i8* nonnull dereferenceable(1) [[WRITTEN]])
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
call void @escape_i8(i8* %written) call void @escape_i8(i8* %written)
ret void ret void
} }
define void @byval_not_readonly_2(i8* byval(i8) %written) readonly { define void @byval_not_readonly_2(i8* byval(i8) %written) readonly {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@byval_not_readonly_2 ; CHECK-LABEL: define {{[^@]+}}@byval_not_readonly_2
; IS__TUNIT____-SAME: (i8* noalias nocapture nofree noundef nonnull writeonly byval(i8) dereferenceable(1) [[WRITTEN:%.*]]) #[[ATTR1]] { ; CHECK-SAME: (i8* noalias nocapture nofree noundef nonnull writeonly byval(i8) dereferenceable(1) [[WRITTEN:%.*]]) #[[ATTR1]] {
; IS__TUNIT____-NEXT: store i8 0, i8* [[WRITTEN]], align 1 ; CHECK-NEXT: store i8 0, i8* [[WRITTEN]], align 1
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@byval_not_readonly_2
; IS__CGSCC____-SAME: (i8* noalias nocapture nofree noundef nonnull writeonly byval(i8) dereferenceable(1) [[WRITTEN:%.*]]) #[[ATTR1]] {
; IS__CGSCC____-NEXT: store i8 0, i8* [[WRITTEN]], align 1
; IS__CGSCC____-NEXT: ret void
; ;
store i8 0, i8* %written store i8 0, i8* %written
ret void ret void
} }
define void @byval_not_readnone_1(i8* byval(i8) %written) readnone { define void @byval_not_readnone_1(i8* byval(i8) %written) readnone {
; IS__TUNIT____: Function Attrs: readnone ; CHECK: Function Attrs: readnone
; IS__TUNIT____-LABEL: define {{[^@]+}}@byval_not_readnone_1 ; CHECK-LABEL: define {{[^@]+}}@byval_not_readnone_1
; IS__TUNIT____-SAME: (i8* noalias nonnull byval(i8) dereferenceable(1) [[WRITTEN:%.*]]) #[[ATTR8:[0-9]+]] { ; CHECK-SAME: (i8* noalias nonnull byval(i8) dereferenceable(1) [[WRITTEN:%.*]]) #[[ATTR9:[0-9]+]] {
; IS__TUNIT____-NEXT: call void @escape_i8(i8* nonnull dereferenceable(1) [[WRITTEN]]) ; CHECK-NEXT: call void @escape_i8(i8* nonnull dereferenceable(1) [[WRITTEN]])
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: readnone
; IS__CGSCC____-LABEL: define {{[^@]+}}@byval_not_readnone_1
; IS__CGSCC____-SAME: (i8* noalias nonnull byval(i8) dereferenceable(1) [[WRITTEN:%.*]]) #[[ATTR9:[0-9]+]] {
; IS__CGSCC____-NEXT: call void @escape_i8(i8* nonnull dereferenceable(1) [[WRITTEN]])
; IS__CGSCC____-NEXT: ret void
; ;
call void @escape_i8(i8* %written) call void @escape_i8(i8* %written)
ret void ret void
} }
define void @byval_not_readnone_2(i8* byval(i8) %written) readnone { define void @byval_not_readnone_2(i8* byval(i8) %written) readnone {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@byval_not_readnone_2 ; CHECK-LABEL: define {{[^@]+}}@byval_not_readnone_2
; IS__TUNIT____-SAME: (i8* noalias nocapture nofree noundef nonnull writeonly byval(i8) dereferenceable(1) [[WRITTEN:%.*]]) #[[ATTR1]] { ; CHECK-SAME: (i8* noalias nocapture nofree noundef nonnull writeonly byval(i8) dereferenceable(1) [[WRITTEN:%.*]]) #[[ATTR1]] {
; IS__TUNIT____-NEXT: store i8 0, i8* [[WRITTEN]], align 1 ; CHECK-NEXT: store i8 0, i8* [[WRITTEN]], align 1
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@byval_not_readnone_2
; IS__CGSCC____-SAME: (i8* noalias nocapture nofree noundef nonnull writeonly byval(i8) dereferenceable(1) [[WRITTEN:%.*]]) #[[ATTR1]] {
; IS__CGSCC____-NEXT: store i8 0, i8* [[WRITTEN]], align 1
; IS__CGSCC____-NEXT: ret void
; ;
store i8 0, i8* %written store i8 0, i8* %written
ret void ret void
} }
define void @byval_no_fnarg(i8* byval(i8) %written) { define void @byval_no_fnarg(i8* byval(i8) %written) {
; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind willreturn writeonly ; CHECK: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__TUNIT____-LABEL: define {{[^@]+}}@byval_no_fnarg ; CHECK-LABEL: define {{[^@]+}}@byval_no_fnarg
; IS__TUNIT____-SAME: (i8* noalias nocapture nofree noundef nonnull writeonly byval(i8) dereferenceable(1) [[WRITTEN:%.*]]) #[[ATTR3]] { ; CHECK-SAME: (i8* noalias nocapture nofree noundef nonnull writeonly byval(i8) dereferenceable(1) [[WRITTEN:%.*]]) #[[ATTR3]] {
; IS__TUNIT____-NEXT: store i8 0, i8* [[WRITTEN]], align 1 ; CHECK-NEXT: store i8 0, i8* [[WRITTEN]], align 1
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC____-LABEL: define {{[^@]+}}@byval_no_fnarg
; IS__CGSCC____-SAME: (i8* noalias nocapture nofree noundef nonnull writeonly byval(i8) dereferenceable(1) [[WRITTEN:%.*]]) #[[ATTR3]] {
; IS__CGSCC____-NEXT: store i8 0, i8* [[WRITTEN]], align 1
; IS__CGSCC____-NEXT: ret void
; ;
store i8 0, i8* %written store i8 0, i8* %written
ret void ret void
} }
define void @testbyval(i8* %read_only) { define void @testbyval(i8* %read_only) {
; IS__TUNIT____-LABEL: define {{[^@]+}}@testbyval ; IS__TUNIT____-LABEL: define {{[^@]+}}@testbyval
; IS__TUNIT____-SAME: (i8* nocapture readonly [[READ_ONLY:%.*]]) { ; IS__TUNIT____-SAME: (i8* nocapture readonly [[READ_ONLY:%.*]]) {
; IS__TUNIT____-NEXT: call void @byval_not_readonly_1(i8* nocapture readonly byval(i8) [[READ_ONLY]]) #[[ATTR2]] ; IS__TUNIT____-NEXT: call void @byval_not_readonly_1(i8* nocapture readonly byval(i8) [[READ_ONLY]]) #[[ATTR2]]
; IS__TUNIT____-NEXT: call void @byval_not_readnone_1(i8* noalias nocapture readnone byval(i8) [[READ_ONLY]]) ; IS__TUNIT____-NEXT: call void @byval_not_readnone_1(i8* noalias nocapture readnone byval(i8) [[READ_ONLY]])
; IS__TUNIT____-NEXT: call void @byval_no_fnarg(i8* nocapture nofree readonly byval(i8) [[READ_ONLY]]) #[[ATTR13:[0-9]+]] ; IS__TUNIT____-NEXT: call void @byval_no_fnarg(i8* nocapture nofree readonly byval(i8) [[READ_ONLY]]) #[[ATTR14:[0-9]+]]
; IS__TUNIT____-NEXT: ret void ; IS__TUNIT____-NEXT: ret void
; ;
; IS__CGSCC____-LABEL: define {{[^@]+}}@testbyval ; IS__CGSCC____-LABEL: define {{[^@]+}}@testbyval
; IS__CGSCC____-SAME: (i8* nocapture noundef nonnull readonly dereferenceable(1) [[READ_ONLY:%.*]]) { ; IS__CGSCC____-SAME: (i8* nocapture noundef nonnull readonly dereferenceable(1) [[READ_ONLY:%.*]]) {
; IS__CGSCC____-NEXT: call void @byval_not_readonly_1(i8* noalias nocapture noundef nonnull readonly byval(i8) dereferenceable(1) [[READ_ONLY]]) #[[ATTR2]] ; IS__CGSCC____-NEXT: call void @byval_not_readonly_1(i8* noalias nocapture noundef nonnull readonly byval(i8) dereferenceable(1) [[READ_ONLY]]) #[[ATTR2]]
; IS__CGSCC____-NEXT: call void @byval_not_readnone_1(i8* noalias nocapture noundef nonnull readnone byval(i8) dereferenceable(1) [[READ_ONLY]]) ; IS__CGSCC____-NEXT: call void @byval_not_readnone_1(i8* noalias nocapture noundef nonnull readnone byval(i8) dereferenceable(1) [[READ_ONLY]])
; IS__CGSCC____-NEXT: call void @byval_no_fnarg(i8* noalias nocapture nofree noundef nonnull readnone byval(i8) dereferenceable(1) [[READ_ONLY]]) #[[ATTR14:[0-9]+]] ; IS__CGSCC____-NEXT: call void @byval_no_fnarg(i8* noalias nocapture nofree noundef nonnull readnone byval(i8) dereferenceable(1) [[READ_ONLY]]) #[[ATTR14:[0-9]+]]
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
call void @byval_not_readonly_1(i8* byval(i8) %read_only) call void @byval_not_readonly_1(i8* byval(i8) %read_only)
call void @byval_not_readonly_2(i8* byval(i8) %read_only) call void @byval_not_readonly_2(i8* byval(i8) %read_only)
call void @byval_not_readnone_1(i8* byval(i8) %read_only) call void @byval_not_readnone_1(i8* byval(i8) %read_only)
call void @byval_not_readnone_2(i8* byval(i8) %read_only) call void @byval_not_readnone_2(i8* byval(i8) %read_only)
call void @byval_no_fnarg(i8* byval(i8) %read_only) call void @byval_no_fnarg(i8* byval(i8) %read_only)
ret void ret void
} }
;} ;}
declare i8* @maybe_returned_ptr(i8* readonly %ptr) readonly nounwind declare i8* @maybe_returned_ptr(i8* readonly %ptr) readonly nounwind
declare i8 @maybe_returned_val(i8* %ptr) readonly nounwind declare i8 @maybe_returned_val(i8* %ptr) readonly nounwind
declare void @val_use(i8 %ptr) readonly nounwind declare void @val_use(i8 %ptr) readonly nounwind
define void @ptr_uses(i8* %ptr) { define void @ptr_uses(i8* %ptr) {
; IS__TUNIT____: Function Attrs: nounwind readonly ; CHECK: Function Attrs: nounwind readonly
; IS__TUNIT____-LABEL: define {{[^@]+}}@ptr_uses ; CHECK-LABEL: define {{[^@]+}}@ptr_uses
; IS__TUNIT____-SAME: (i8* nocapture readonly [[PTR:%.*]]) #[[ATTR9]] { ; CHECK-SAME: (i8* nocapture readonly [[PTR:%.*]]) #[[ATTR10]] {
; IS__TUNIT____-NEXT: [[CALL_PTR:%.*]] = call i8* @maybe_returned_ptr(i8* readonly [[PTR]]) #[[ATTR9]] ; CHECK-NEXT: [[CALL_PTR:%.*]] = call i8* @maybe_returned_ptr(i8* readonly [[PTR]]) #[[ATTR10]]
; IS__TUNIT____-NEXT: [[CALL_VAL:%.*]] = call i8 @maybe_returned_val(i8* readonly [[CALL_PTR]]) #[[ATTR9]] ; CHECK-NEXT: [[CALL_VAL:%.*]] = call i8 @maybe_returned_val(i8* readonly [[CALL_PTR]]) #[[ATTR10]]
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: nounwind readonly
; IS__CGSCC____-LABEL: define {{[^@]+}}@ptr_uses
; IS__CGSCC____-SAME: (i8* nocapture readonly [[PTR:%.*]]) #[[ATTR10]] {
; IS__CGSCC____-NEXT: [[CALL_PTR:%.*]] = call i8* @maybe_returned_ptr(i8* readonly [[PTR]]) #[[ATTR10]]
; IS__CGSCC____-NEXT: [[CALL_VAL:%.*]] = call i8 @maybe_returned_val(i8* readonly [[CALL_PTR]]) #[[ATTR10]]
; IS__CGSCC____-NEXT: ret void
; ;
%call_ptr = call i8* @maybe_returned_ptr(i8* %ptr) %call_ptr = call i8* @maybe_returned_ptr(i8* %ptr)
%call_val = call i8 @maybe_returned_val(i8* %call_ptr) %call_val = call i8 @maybe_returned_val(i8* %call_ptr)
call void @val_use(i8 %call_val) call void @val_use(i8 %call_val)
ret void ret void
} }
define void @ptr_use_chain(i8* %ptr) { define void @ptr_use_chain(i8* %ptr) {
Show All 21 Lines;
%abc8 = bitcast i8* %abc7 to i32* %abc8 = bitcast i8* %abc7 to i32*
%abc9 = bitcast i32* %abc8 to i8* %abc9 = bitcast i32* %abc8 to i8*
call void @escape_i8(i8* %abc9) call void @escape_i8(i8* %abc9)
ret void ret void
} }
@constant_mem = external dso_local constant i32, align 4 @constant_mem = external dso_local constant i32, align 4
define i32 @read_only_constant_mem() { define i32 @read_only_constant_mem() {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@read_only_constant_mem ; CHECK-LABEL: define {{[^@]+}}@read_only_constant_mem
; IS__TUNIT____-SAME: () #[[ATTR1]] { ; CHECK-SAME: () #[[ATTR1]] {
; IS__TUNIT____-NEXT: [[L:%.*]] = load i32, i32* @constant_mem, align 4 ; CHECK-NEXT: [[L:%.*]] = load i32, i32* @constant_mem, align 4
; IS__TUNIT____-NEXT: ret i32 [[L]] ; CHECK-NEXT: ret i32 [[L]]
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@read_only_constant_mem
; IS__CGSCC____-SAME: () #[[ATTR1]] {
; IS__CGSCC____-NEXT: [[L:%.*]] = load i32, i32* @constant_mem, align 4
; IS__CGSCC____-NEXT: ret i32 [[L]]
; ;
%l = load i32, i32* @constant_mem %l = load i32, i32* @constant_mem
ret i32 %l ret i32 %l
} }
;. ;.
; IS__TUNIT____: attributes #[[ATTR0]] = { nofree nosync nounwind willreturn writeonly } ; CHECK: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind willreturn writeonly }
; IS__TUNIT____: attributes #[[ATTR1]] = { nofree nosync nounwind readnone willreturn } ; CHECK: attributes #[[ATTR1]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__TUNIT____: attributes #[[ATTR2]] = { readonly } ; CHECK: attributes #[[ATTR2]] = { readonly }
; IS__TUNIT____: attributes #[[ATTR3]] = { argmemonly nofree nosync nounwind willreturn writeonly } ; CHECK: attributes #[[ATTR3]] = { argmemonly nofree norecurse nosync nounwind willreturn writeonly }
; IS__TUNIT____: attributes #[[ATTR4]] = { nofree nosync nounwind readonly willreturn } ; CHECK: attributes #[[ATTR4]] = { nofree nosync nounwind willreturn writeonly }
; IS__TUNIT____: attributes #[[ATTR5]] = { argmemonly nounwind readonly } ; CHECK: attributes #[[ATTR5]] = { nofree nosync nounwind readonly willreturn }
; IS__TUNIT____: attributes #[[ATTR6]] = { argmemonly nounwind } ; CHECK: attributes #[[ATTR6]] = { argmemonly nounwind readonly }
; IS__TUNIT____: attributes #[[ATTR7]] = { argmemonly nofree nounwind willreturn } ; CHECK: attributes #[[ATTR7]] = { argmemonly nounwind }
; IS__TUNIT____: attributes #[[ATTR8]] = { readnone } ; CHECK: attributes #[[ATTR8]] = { argmemonly nofree norecurse nounwind willreturn }
; IS__TUNIT____: attributes #[[ATTR9]] = { nounwind readonly } ; CHECK: attributes #[[ATTR9]] = { readnone }
; IS__TUNIT____: attributes #[[ATTR10]] = { willreturn writeonly } ; CHECK: attributes #[[ATTR10]] = { nounwind readonly }
; IS__TUNIT____: attributes #[[ATTR11]] = { readonly willreturn } ; CHECK: attributes #[[ATTR11]] = { willreturn writeonly }
; IS__TUNIT____: attributes #[[ATTR12]] = { nounwind } ; CHECK: attributes #[[ATTR12]] = { readonly willreturn }
; IS__TUNIT____: attributes #[[ATTR13]] = { nounwind writeonly } ; CHECK: attributes #[[ATTR13]] = { nounwind }
;. ; CHECK: attributes #[[ATTR14:[0-9]+]] = { nounwind writeonly }
; IS__CGSCC____: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind willreturn writeonly }
; IS__CGSCC____: attributes #[[ATTR1]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__CGSCC____: attributes #[[ATTR2]] = { readonly }
; IS__CGSCC____: attributes #[[ATTR3]] = { argmemonly nofree norecurse nosync nounwind willreturn writeonly }
; IS__CGSCC____: attributes #[[ATTR4]] = { nofree nosync nounwind willreturn writeonly }
; IS__CGSCC____: attributes #[[ATTR5]] = { nofree nosync nounwind readonly willreturn }
; IS__CGSCC____: attributes #[[ATTR6]] = { argmemonly nounwind readonly }
; IS__CGSCC____: attributes #[[ATTR7]] = { argmemonly nounwind }
; IS__CGSCC____: attributes #[[ATTR8]] = { argmemonly nofree norecurse nounwind willreturn }
; IS__CGSCC____: attributes #[[ATTR9]] = { readnone }
; IS__CGSCC____: attributes #[[ATTR10]] = { nounwind readonly }
; IS__CGSCC____: attributes #[[ATTR11]] = { willreturn writeonly }
; IS__CGSCC____: attributes #[[ATTR12]] = { readonly willreturn }
; IS__CGSCC____: attributes #[[ATTR13]] = { nounwind }
; IS__CGSCC____: attributes #[[ATTR14]] = { nounwind writeonly }
;. ;.

llvm/test/Transforms/Attributor/returned.ll

Show All 37 Lines
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
;. ;.
; CHECK: @[[G:[a-zA-Z0-9_$"\\.-]+]] = external global i8 ; CHECK: @[[G:[a-zA-Z0-9_$"\\.-]+]] = external global i8
; CHECK: @[[_ZTI1X:[a-zA-Z0-9_$"\\.-]+]] = external dso_local constant { i8*, i8* }, align 8 ; CHECK: @[[_ZTI1X:[a-zA-Z0-9_$"\\.-]+]] = external dso_local constant { i8*, i8* }, align 8
; CHECK: @[[_ZTI1Y:[a-zA-Z0-9_$"\\.-]+]] = external dso_local constant { i8*, i8*, i8* }, align 8 ; CHECK: @[[_ZTI1Y:[a-zA-Z0-9_$"\\.-]+]] = external dso_local constant { i8*, i8*, i8* }, align 8
;. ;.
define i32 @sink_r0(i32 %r) #0 { define i32 @sink_r0(i32 %r) #0 {
; IS__TUNIT____: Function Attrs: nofree noinline nosync nounwind readnone uwtable willreturn ; CHECK: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@sink_r0 ; CHECK-LABEL: define {{[^@]+}}@sink_r0
; IS__TUNIT____-SAME: (i32 returned [[R:%.*]]) #[[ATTR0:[0-9]+]] { ; CHECK-SAME: (i32 returned [[R:%.*]]) #[[ATTR0:[0-9]+]] {
; IS__TUNIT____-NEXT: entry: ; CHECK-NEXT: entry:
; IS__TUNIT____-NEXT: ret i32 [[R]] ; CHECK-NEXT: ret i32 [[R]]
;
; IS__CGSCC____: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@sink_r0
; IS__CGSCC____-SAME: (i32 returned [[R:%.*]]) #[[ATTR0:[0-9]+]] {
; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: ret i32 [[R]]
; ;
entry: entry:
ret i32 %r ret i32 %r
} }
define i32 @scc_r1(i32 %a, i32 %r, i32 %b) #0 { define i32 @scc_r1(i32 %a, i32 %r, i32 %b) #0 {
; IS__TUNIT____: Function Attrs: nofree noinline nosync nounwind readnone uwtable ; IS__TUNIT____: Function Attrs: nofree noinline nosync nounwind readnone uwtable
; IS__TUNIT____-LABEL: define {{[^@]+}}@scc_r1 ; IS__TUNIT____-LABEL: define {{[^@]+}}@scc_r1
; IS__TUNIT____-SAME: (i32 [[A:%.*]], i32 returned [[R:%.*]], i32 [[B:%.*]]) #[[ATTR1:[0-9]+]] { ; IS__TUNIT____-SAME: (i32 [[A:%.*]], i32 returned [[R:%.*]], i32 [[B:%.*]]) #[[ATTR1:[0-9]+]] {
; IS__TUNIT____-NEXT: entry: ; IS__TUNIT____-NEXT: entry:
; IS__TUNIT____-NEXT: [[CALL1:%.*]] = call i32 @scc_r2(i32 [[R]], i32 [[A]], i32 [[R]]) #[[ATTR6:[0-9]+]] ; IS__TUNIT____-NEXT: [[CALL1:%.*]] = call i32 @scc_r2(i32 [[R]], i32 [[A]], i32 [[R]]) #[[ATTR9:[0-9]+]]
; IS__TUNIT____-NEXT: ret i32 [[R]] ; IS__TUNIT____-NEXT: ret i32 [[R]]
; ;
; IS__CGSCC____: Function Attrs: nofree noinline nosync nounwind readnone uwtable willreturn ; IS__CGSCC_OPM: Function Attrs: nofree noinline nosync nounwind readnone uwtable willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@scc_r1 ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@scc_r1
; IS__CGSCC____-SAME: (i32 [[A:%.*]], i32 returned [[R:%.*]], i32 [[B:%.*]]) #[[ATTR1:[0-9]+]] { ; IS__CGSCC_OPM-SAME: (i32 [[A:%.*]], i32 returned [[R:%.*]], i32 [[B:%.*]]) #[[ATTR1:[0-9]+]] {
; IS__CGSCC____-NEXT: entry: ; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC____-NEXT: [[CALL1:%.*]] = call i32 @scc_r2(i32 [[R]], i32 [[A]], i32 [[R]]) #[[ATTR7:[0-9]+]] ; IS__CGSCC_OPM-NEXT: [[CALL1:%.*]] = call i32 @scc_r2(i32 [[R]], i32 [[A]], i32 [[R]]) #[[ATTR10:[0-9]+]]
; IS__CGSCC____-NEXT: ret i32 [[R]] ; IS__CGSCC_OPM-NEXT: ret i32 [[R]]
;
; IS__CGSCC_NPM: Function Attrs: nofree noinline nosync nounwind readnone uwtable willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@scc_r1
; IS__CGSCC_NPM-SAME: (i32 [[A:%.*]], i32 returned [[R:%.*]], i32 [[B:%.*]]) #[[ATTR1:[0-9]+]] {
; IS__CGSCC_NPM-NEXT: entry:
; IS__CGSCC_NPM-NEXT: [[CALL1:%.*]] = call i32 @scc_r2(i32 [[R]], i32 [[A]], i32 [[R]]) #[[ATTR9:[0-9]+]]
; IS__CGSCC_NPM-NEXT: ret i32 [[R]]
; ;
entry: entry:
%call = call i32 @sink_r0(i32 %r) %call = call i32 @sink_r0(i32 %r)
%call1 = call i32 @scc_r2(i32 %r, i32 %a, i32 %call) %call1 = call i32 @scc_r2(i32 %r, i32 %a, i32 %call)
ret i32 %call1 ret i32 %call1
} }
define i32 @scc_r2(i32 %a, i32 %b, i32 %r) #0 { define i32 @scc_r2(i32 %a, i32 %b, i32 %r) #0 {
; IS__TUNIT____: Function Attrs: nofree noinline nosync nounwind readnone uwtable ; IS__TUNIT____: Function Attrs: nofree noinline nosync nounwind readnone uwtable
; IS__TUNIT____-LABEL: define {{[^@]+}}@scc_r2 ; IS__TUNIT____-LABEL: define {{[^@]+}}@scc_r2
; IS__TUNIT____-SAME: (i32 [[A:%.*]], i32 [[B:%.*]], i32 returned [[R:%.*]]) #[[ATTR1]] { ; IS__TUNIT____-SAME: (i32 [[A:%.*]], i32 [[B:%.*]], i32 returned [[R:%.*]]) #[[ATTR1]] {
; IS__TUNIT____-NEXT: entry: ; IS__TUNIT____-NEXT: entry:
; IS__TUNIT____-NEXT: [[CMP:%.*]] = icmp sgt i32 [[A]], [[B]] ; IS__TUNIT____-NEXT: [[CMP:%.*]] = icmp sgt i32 [[A]], [[B]]
; IS__TUNIT____-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_END:%.*]] ; IS__TUNIT____-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
; IS__TUNIT____: if.then: ; IS__TUNIT____: if.then:
; IS__TUNIT____-NEXT: [[CALL1:%.*]] = call i32 @scc_r2(i32 [[B]], i32 [[A]], i32 [[R]]) #[[ATTR6]] ; IS__TUNIT____-NEXT: [[CALL1:%.*]] = call i32 @scc_r2(i32 [[B]], i32 [[A]], i32 [[R]]) #[[ATTR9]]
; IS__TUNIT____-NEXT: br label [[RETURN:%.*]] ; IS__TUNIT____-NEXT: br label [[RETURN:%.*]]
; IS__TUNIT____: if.end: ; IS__TUNIT____: if.end:
; IS__TUNIT____-NEXT: [[CMP2:%.*]] = icmp slt i32 [[A]], [[B]] ; IS__TUNIT____-NEXT: [[CMP2:%.*]] = icmp slt i32 [[A]], [[B]]
; IS__TUNIT____-NEXT: br i1 [[CMP2]], label [[IF_THEN3:%.*]], label [[IF_END12:%.*]] ; IS__TUNIT____-NEXT: br i1 [[CMP2]], label [[IF_THEN3:%.*]], label [[IF_END12:%.*]]
; IS__TUNIT____: if.then3: ; IS__TUNIT____: if.then3:
; IS__TUNIT____-NEXT: [[CALL5:%.*]] = call i32 @scc_r1(i32 [[A]], i32 [[B]], i32 undef) #[[ATTR6]] ; IS__TUNIT____-NEXT: [[CALL5:%.*]] = call i32 @scc_r1(i32 [[A]], i32 [[B]], i32 undef) #[[ATTR9]]
; IS__TUNIT____-NEXT: [[CALL6:%.*]] = call i32 @scc_r2(i32 [[R]], i32 [[R]], i32 [[R]]) #[[ATTR6]] ; IS__TUNIT____-NEXT: [[CALL6:%.*]] = call i32 @scc_r2(i32 [[R]], i32 [[R]], i32 [[R]]) #[[ATTR9]]
; IS__TUNIT____-NEXT: [[CALL7:%.*]] = call i32 @scc_r1(i32 [[A]], i32 [[R]], i32 undef) #[[ATTR6]] ; IS__TUNIT____-NEXT: [[CALL7:%.*]] = call i32 @scc_r1(i32 [[A]], i32 [[R]], i32 undef) #[[ATTR9]]
; IS__TUNIT____-NEXT: [[CALL8:%.*]] = call i32 @scc_r2(i32 [[A]], i32 [[B]], i32 [[R]]) #[[ATTR6]] ; IS__TUNIT____-NEXT: [[CALL8:%.*]] = call i32 @scc_r2(i32 [[A]], i32 [[B]], i32 [[R]]) #[[ATTR9]]
; IS__TUNIT____-NEXT: [[CALL9:%.*]] = call i32 @scc_r2(i32 [[B]], i32 [[R]], i32 [[R]]) #[[ATTR6]] ; IS__TUNIT____-NEXT: [[CALL9:%.*]] = call i32 @scc_r2(i32 [[B]], i32 [[R]], i32 [[R]]) #[[ATTR9]]
; IS__TUNIT____-NEXT: [[CALL11:%.*]] = call i32 @scc_r1(i32 [[B]], i32 [[R]], i32 undef) #[[ATTR6]] ; IS__TUNIT____-NEXT: [[CALL11:%.*]] = call i32 @scc_r1(i32 [[B]], i32 [[R]], i32 undef) #[[ATTR9]]
; IS__TUNIT____-NEXT: br label [[RETURN]] ; IS__TUNIT____-NEXT: br label [[RETURN]]
; IS__TUNIT____: if.end12: ; IS__TUNIT____: if.end12:
; IS__TUNIT____-NEXT: [[CMP13:%.*]] = icmp eq i32 [[A]], [[B]] ; IS__TUNIT____-NEXT: [[CMP13:%.*]] = icmp eq i32 [[A]], [[B]]
; IS__TUNIT____-NEXT: br i1 [[CMP13]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] ; IS__TUNIT____-NEXT: br i1 [[CMP13]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
; IS__TUNIT____: cond.true: ; IS__TUNIT____: cond.true:
; IS__TUNIT____-NEXT: br label [[COND_END:%.*]] ; IS__TUNIT____-NEXT: br label [[COND_END:%.*]]
; IS__TUNIT____: cond.false: ; IS__TUNIT____: cond.false:
; IS__TUNIT____-NEXT: [[CALL14:%.*]] = call i32 @scc_r2(i32 [[A]], i32 [[B]], i32 [[R]]) #[[ATTR6]] ; IS__TUNIT____-NEXT: [[CALL14:%.*]] = call i32 @scc_r2(i32 [[A]], i32 [[B]], i32 [[R]]) #[[ATTR9]]
; IS__TUNIT____-NEXT: br label [[COND_END]] ; IS__TUNIT____-NEXT: br label [[COND_END]]
; IS__TUNIT____: cond.end: ; IS__TUNIT____: cond.end:
; IS__TUNIT____-NEXT: [[COND:%.*]] = phi i32 [ [[R]], [[COND_TRUE]] ], [ [[R]], [[COND_FALSE]] ] ; IS__TUNIT____-NEXT: [[COND:%.*]] = phi i32 [ [[R]], [[COND_TRUE]] ], [ [[R]], [[COND_FALSE]] ]
; IS__TUNIT____-NEXT: br label [[RETURN]] ; IS__TUNIT____-NEXT: br label [[RETURN]]
; IS__TUNIT____: return: ; IS__TUNIT____: return:
; IS__TUNIT____-NEXT: [[RETVAL_0:%.*]] = phi i32 [ [[R]], [[IF_THEN]] ], [ [[R]], [[IF_THEN3]] ], [ [[COND]], [[COND_END]] ] ; IS__TUNIT____-NEXT: [[RETVAL_0:%.*]] = phi i32 [ [[R]], [[IF_THEN]] ], [ [[R]], [[IF_THEN3]] ], [ [[COND]], [[COND_END]] ]
; IS__TUNIT____-NEXT: ret i32 [[R]] ; IS__TUNIT____-NEXT: ret i32 [[R]]
; ;
; IS__CGSCC____: Function Attrs: nofree noinline nosync nounwind readnone uwtable willreturn ; IS__CGSCC_OPM: Function Attrs: nofree noinline nosync nounwind readnone uwtable willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@scc_r2 ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@scc_r2
; IS__CGSCC____-SAME: (i32 [[A:%.*]], i32 [[B:%.*]], i32 returned [[R:%.*]]) #[[ATTR1]] { ; IS__CGSCC_OPM-SAME: (i32 [[A:%.*]], i32 [[B:%.*]], i32 returned [[R:%.*]]) #[[ATTR1]] {
; IS__CGSCC____-NEXT: entry: ; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC____-NEXT: [[CMP:%.*]] = icmp sgt i32 [[A]], [[B]] ; IS__CGSCC_OPM-NEXT: [[CMP:%.*]] = icmp sgt i32 [[A]], [[B]]
; IS__CGSCC____-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_END:%.*]] ; IS__CGSCC_OPM-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
; IS__CGSCC____: if.then: ; IS__CGSCC_OPM: if.then:
; IS__CGSCC____-NEXT: [[CALL1:%.*]] = call i32 @scc_r2(i32 [[B]], i32 [[A]], i32 [[R]]) #[[ATTR7]] ; IS__CGSCC_OPM-NEXT: [[CALL1:%.*]] = call i32 @scc_r2(i32 [[B]], i32 [[A]], i32 [[R]]) #[[ATTR10]]
; IS__CGSCC____-NEXT: br label [[RETURN:%.*]] ; IS__CGSCC_OPM-NEXT: br label [[RETURN:%.*]]
; IS__CGSCC____: if.end: ; IS__CGSCC_OPM: if.end:
; IS__CGSCC____-NEXT: [[CMP2:%.*]] = icmp slt i32 [[A]], [[B]] ; IS__CGSCC_OPM-NEXT: [[CMP2:%.*]] = icmp slt i32 [[A]], [[B]]
; IS__CGSCC____-NEXT: br i1 [[CMP2]], label [[IF_THEN3:%.*]], label [[IF_END12:%.*]] ; IS__CGSCC_OPM-NEXT: br i1 [[CMP2]], label [[IF_THEN3:%.*]], label [[IF_END12:%.*]]
; IS__CGSCC____: if.then3: ; IS__CGSCC_OPM: if.then3:
; IS__CGSCC____-NEXT: [[CALL5:%.*]] = call i32 @scc_r1(i32 [[A]], i32 [[B]], i32 undef) #[[ATTR7]] ; IS__CGSCC_OPM-NEXT: [[CALL5:%.*]] = call i32 @scc_r1(i32 [[A]], i32 [[B]], i32 undef) #[[ATTR10]]
; IS__CGSCC____-NEXT: [[CALL6:%.*]] = call i32 @scc_r2(i32 [[R]], i32 [[R]], i32 [[R]]) #[[ATTR7]] ; IS__CGSCC_OPM-NEXT: [[CALL6:%.*]] = call i32 @scc_r2(i32 [[R]], i32 [[R]], i32 [[R]]) #[[ATTR10]]
; IS__CGSCC____-NEXT: [[CALL7:%.*]] = call i32 @scc_r1(i32 [[A]], i32 [[R]], i32 undef) #[[ATTR7]] ; IS__CGSCC_OPM-NEXT: [[CALL7:%.*]] = call i32 @scc_r1(i32 [[A]], i32 [[R]], i32 undef) #[[ATTR10]]
; IS__CGSCC____-NEXT: [[CALL8:%.*]] = call i32 @scc_r2(i32 [[A]], i32 [[B]], i32 [[R]]) #[[ATTR7]] ; IS__CGSCC_OPM-NEXT: [[CALL8:%.*]] = call i32 @scc_r2(i32 [[A]], i32 [[B]], i32 [[R]]) #[[ATTR10]]
; IS__CGSCC____-NEXT: [[CALL9:%.*]] = call i32 @scc_r2(i32 [[B]], i32 [[R]], i32 [[R]]) #[[ATTR7]] ; IS__CGSCC_OPM-NEXT: [[CALL9:%.*]] = call i32 @scc_r2(i32 [[B]], i32 [[R]], i32 [[R]]) #[[ATTR10]]
; IS__CGSCC____-NEXT: [[CALL11:%.*]] = call i32 @scc_r1(i32 [[B]], i32 [[R]], i32 undef) #[[ATTR7]] ; IS__CGSCC_OPM-NEXT: [[CALL11:%.*]] = call i32 @scc_r1(i32 [[B]], i32 [[R]], i32 undef) #[[ATTR10]]
; IS__CGSCC____-NEXT: br label [[RETURN]] ; IS__CGSCC_OPM-NEXT: br label [[RETURN]]
; IS__CGSCC____: if.end12: ; IS__CGSCC_OPM: if.end12:
; IS__CGSCC____-NEXT: [[CMP13:%.*]] = icmp eq i32 [[A]], [[B]] ; IS__CGSCC_OPM-NEXT: [[CMP13:%.*]] = icmp eq i32 [[A]], [[B]]
; IS__CGSCC____-NEXT: br i1 [[CMP13]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] ; IS__CGSCC_OPM-NEXT: br i1 [[CMP13]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
; IS__CGSCC____: cond.true: ; IS__CGSCC_OPM: cond.true:
; IS__CGSCC____-NEXT: br label [[COND_END:%.*]] ; IS__CGSCC_OPM-NEXT: br label [[COND_END:%.*]]
; IS__CGSCC____: cond.false: ; IS__CGSCC_OPM: cond.false:
; IS__CGSCC____-NEXT: [[CALL14:%.*]] = call i32 @scc_r2(i32 [[A]], i32 [[B]], i32 [[R]]) #[[ATTR7]] ; IS__CGSCC_OPM-NEXT: [[CALL14:%.*]] = call i32 @scc_r2(i32 [[A]], i32 [[B]], i32 [[R]]) #[[ATTR10]]
; IS__CGSCC____-NEXT: br label [[COND_END]] ; IS__CGSCC_OPM-NEXT: br label [[COND_END]]
; IS__CGSCC____: cond.end: ; IS__CGSCC_OPM: cond.end:
; IS__CGSCC____-NEXT: [[COND:%.*]] = phi i32 [ [[R]], [[COND_TRUE]] ], [ [[R]], [[COND_FALSE]] ] ; IS__CGSCC_OPM-NEXT: [[COND:%.*]] = phi i32 [ [[R]], [[COND_TRUE]] ], [ [[R]], [[COND_FALSE]] ]
; IS__CGSCC____-NEXT: br label [[RETURN]] ; IS__CGSCC_OPM-NEXT: br label [[RETURN]]
; IS__CGSCC____: return: ; IS__CGSCC_OPM: return:
; IS__CGSCC____-NEXT: [[RETVAL_0:%.*]] = phi i32 [ [[R]], [[IF_THEN]] ], [ [[R]], [[IF_THEN3]] ], [ [[COND]], [[COND_END]] ] ; IS__CGSCC_OPM-NEXT: [[RETVAL_0:%.*]] = phi i32 [ [[R]], [[IF_THEN]] ], [ [[R]], [[IF_THEN3]] ], [ [[COND]], [[COND_END]] ]
; IS__CGSCC____-NEXT: ret i32 [[R]] ; IS__CGSCC_OPM-NEXT: ret i32 [[R]]
;
; IS__CGSCC_NPM: Function Attrs: nofree noinline nosync nounwind readnone uwtable willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@scc_r2
; IS__CGSCC_NPM-SAME: (i32 [[A:%.*]], i32 [[B:%.*]], i32 returned [[R:%.*]]) #[[ATTR1]] {
; IS__CGSCC_NPM-NEXT: entry:
; IS__CGSCC_NPM-NEXT: [[CMP:%.*]] = icmp sgt i32 [[A]], [[B]]
; IS__CGSCC_NPM-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
; IS__CGSCC_NPM: if.then:
; IS__CGSCC_NPM-NEXT: [[CALL1:%.*]] = call i32 @scc_r2(i32 [[B]], i32 [[A]], i32 [[R]]) #[[ATTR9]]
; IS__CGSCC_NPM-NEXT: br label [[RETURN:%.*]]
; IS__CGSCC_NPM: if.end:
; IS__CGSCC_NPM-NEXT: [[CMP2:%.*]] = icmp slt i32 [[A]], [[B]]
; IS__CGSCC_NPM-NEXT: br i1 [[CMP2]], label [[IF_THEN3:%.*]], label [[IF_END12:%.*]]
; IS__CGSCC_NPM: if.then3:
; IS__CGSCC_NPM-NEXT: [[CALL5:%.*]] = call i32 @scc_r1(i32 [[A]], i32 [[B]], i32 undef) #[[ATTR9]]
; IS__CGSCC_NPM-NEXT: [[CALL6:%.*]] = call i32 @scc_r2(i32 [[R]], i32 [[R]], i32 [[R]]) #[[ATTR9]]
; IS__CGSCC_NPM-NEXT: [[CALL7:%.*]] = call i32 @scc_r1(i32 [[A]], i32 [[R]], i32 undef) #[[ATTR9]]
; IS__CGSCC_NPM-NEXT: [[CALL8:%.*]] = call i32 @scc_r2(i32 [[A]], i32 [[B]], i32 [[R]]) #[[ATTR9]]
; IS__CGSCC_NPM-NEXT: [[CALL9:%.*]] = call i32 @scc_r2(i32 [[B]], i32 [[R]], i32 [[R]]) #[[ATTR9]]
; IS__CGSCC_NPM-NEXT: [[CALL11:%.*]] = call i32 @scc_r1(i32 [[B]], i32 [[R]], i32 undef) #[[ATTR9]]
; IS__CGSCC_NPM-NEXT: br label [[RETURN]]
; IS__CGSCC_NPM: if.end12:
; IS__CGSCC_NPM-NEXT: [[CMP13:%.*]] = icmp eq i32 [[A]], [[B]]
; IS__CGSCC_NPM-NEXT: br i1 [[CMP13]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
; IS__CGSCC_NPM: cond.true:
; IS__CGSCC_NPM-NEXT: br label [[COND_END:%.*]]
; IS__CGSCC_NPM: cond.false:
; IS__CGSCC_NPM-NEXT: [[CALL14:%.*]] = call i32 @scc_r2(i32 [[A]], i32 [[B]], i32 [[R]]) #[[ATTR9]]
; IS__CGSCC_NPM-NEXT: br label [[COND_END]]
; IS__CGSCC_NPM: cond.end:
; IS__CGSCC_NPM-NEXT: [[COND:%.*]] = phi i32 [ [[R]], [[COND_TRUE]] ], [ [[R]], [[COND_FALSE]] ]
; IS__CGSCC_NPM-NEXT: br label [[RETURN]]
; IS__CGSCC_NPM: return:
; IS__CGSCC_NPM-NEXT: [[RETVAL_0:%.*]] = phi i32 [ [[R]], [[IF_THEN]] ], [ [[R]], [[IF_THEN3]] ], [ [[COND]], [[COND_END]] ]
; IS__CGSCC_NPM-NEXT: ret i32 [[R]]
; ;
entry: entry:
%cmp = icmp sgt i32 %a, %b %cmp = icmp sgt i32 %a, %b
br i1 %cmp, label %if.then, label %if.end br i1 %cmp, label %if.then, label %if.end
if.then: ; preds = %entry if.then: ; preds = %entry
%call = call i32 @sink_r0(i32 %r) %call = call i32 @sink_r0(i32 %r)
%call1 = call i32 @scc_r2(i32 %b, i32 %a, i32 %call) %call1 = call i32 @scc_r2(i32 %b, i32 %a, i32 %call)
Show All 30 Linescond.end: ; preds = %cond.false, %cond.true
br label %return br label %return
return: ; preds = %cond.end, %if.then3, %if.then return: ; preds = %cond.end, %if.then3, %if.then
%retval.0 = phi i32 [ %call1, %if.then ], [ %call11, %if.then3 ], [ %cond, %cond.end ] %retval.0 = phi i32 [ %call1, %if.then ], [ %call11, %if.then3 ], [ %cond, %cond.end ]
ret i32 %retval.0 ret i32 %retval.0
} }
define i32 @scc_rX(i32 %a, i32 %b, i32 %r) #0 { define i32 @scc_rX(i32 %a, i32 %b, i32 %r) #0 {
; IS__TUNIT____: Function Attrs: nofree noinline nosync nounwind readnone uwtable ; IS__TUNIT____: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable
; IS__TUNIT____-LABEL: define {{[^@]+}}@scc_rX ; IS__TUNIT____-LABEL: define {{[^@]+}}@scc_rX
; IS__TUNIT____-SAME: (i32 [[A:%.*]], i32 [[B:%.*]], i32 [[R:%.*]]) #[[ATTR1]] { ; IS__TUNIT____-SAME: (i32 [[A:%.*]], i32 [[B:%.*]], i32 [[R:%.*]]) #[[ATTR2:[0-9]+]] {
; IS__TUNIT____-NEXT: entry: ; IS__TUNIT____-NEXT: entry:
; IS__TUNIT____-NEXT: [[CMP:%.*]] = icmp sgt i32 [[A]], [[B]] ; IS__TUNIT____-NEXT: [[CMP:%.*]] = icmp sgt i32 [[A]], [[B]]
; IS__TUNIT____-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_END:%.*]] ; IS__TUNIT____-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
; IS__TUNIT____: if.then: ; IS__TUNIT____: if.then:
; IS__TUNIT____-NEXT: [[CALL1:%.*]] = call i32 @scc_r2(i32 [[B]], i32 [[A]], i32 [[R]]) #[[ATTR6]] ; IS__TUNIT____-NEXT: [[CALL1:%.*]] = call i32 @scc_r2(i32 [[B]], i32 [[A]], i32 [[R]]) #[[ATTR9]]
; IS__TUNIT____-NEXT: br label [[RETURN:%.*]] ; IS__TUNIT____-NEXT: br label [[RETURN:%.*]]
; IS__TUNIT____: if.end: ; IS__TUNIT____: if.end:
; IS__TUNIT____-NEXT: [[CMP2:%.*]] = icmp slt i32 [[A]], [[B]] ; IS__TUNIT____-NEXT: [[CMP2:%.*]] = icmp slt i32 [[A]], [[B]]
; IS__TUNIT____-NEXT: br i1 [[CMP2]], label [[IF_THEN3:%.*]], label [[IF_END12:%.*]] ; IS__TUNIT____-NEXT: br i1 [[CMP2]], label [[IF_THEN3:%.*]], label [[IF_END12:%.*]]
; IS__TUNIT____: if.then3: ; IS__TUNIT____: if.then3:
; IS__TUNIT____-NEXT: [[CALL5:%.*]] = call i32 @scc_r1(i32 [[A]], i32 [[B]], i32 undef) #[[ATTR6]] ; IS__TUNIT____-NEXT: [[CALL5:%.*]] = call i32 @scc_r1(i32 [[A]], i32 [[B]], i32 undef) #[[ATTR9]]
; IS__TUNIT____-NEXT: [[CALL6:%.*]] = call i32 @scc_r2(i32 [[R]], i32 [[R]], i32 [[R]]) #[[ATTR6]] ; IS__TUNIT____-NEXT: [[CALL6:%.*]] = call i32 @scc_r2(i32 [[R]], i32 [[R]], i32 [[R]]) #[[ATTR9]]
; IS__TUNIT____-NEXT: [[CALL7:%.*]] = call i32 @scc_r1(i32 [[A]], i32 [[R]], i32 undef) #[[ATTR6]] ; IS__TUNIT____-NEXT: [[CALL7:%.*]] = call i32 @scc_r1(i32 [[A]], i32 [[R]], i32 undef) #[[ATTR9]]
; IS__TUNIT____-NEXT: [[CALL8:%.*]] = call i32 @scc_r1(i32 [[A]], i32 [[B]], i32 undef) #[[ATTR6]] ; IS__TUNIT____-NEXT: [[CALL8:%.*]] = call i32 @scc_r1(i32 [[A]], i32 [[B]], i32 undef) #[[ATTR9]]
; IS__TUNIT____-NEXT: [[CALL9:%.*]] = call i32 @scc_r2(i32 [[B]], i32 [[R]], i32 [[B]]) #[[ATTR6]] ; IS__TUNIT____-NEXT: [[CALL9:%.*]] = call i32 @scc_r2(i32 [[B]], i32 [[R]], i32 [[B]]) #[[ATTR9]]
; IS__TUNIT____-NEXT: [[CALL11:%.*]] = call i32 @scc_r1(i32 [[B]], i32 [[B]], i32 undef) #[[ATTR6]] ; IS__TUNIT____-NEXT: [[CALL11:%.*]] = call i32 @scc_r1(i32 [[B]], i32 [[B]], i32 undef) #[[ATTR9]]
; IS__TUNIT____-NEXT: br label [[RETURN]] ; IS__TUNIT____-NEXT: br label [[RETURN]]
; IS__TUNIT____: if.end12: ; IS__TUNIT____: if.end12:
; IS__TUNIT____-NEXT: [[CMP13:%.*]] = icmp eq i32 [[A]], [[B]] ; IS__TUNIT____-NEXT: [[CMP13:%.*]] = icmp eq i32 [[A]], [[B]]
; IS__TUNIT____-NEXT: br i1 [[CMP13]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] ; IS__TUNIT____-NEXT: br i1 [[CMP13]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
; IS__TUNIT____: cond.true: ; IS__TUNIT____: cond.true:
; IS__TUNIT____-NEXT: br label [[COND_END:%.*]] ; IS__TUNIT____-NEXT: br label [[COND_END:%.*]]
; IS__TUNIT____: cond.false: ; IS__TUNIT____: cond.false:
; IS__TUNIT____-NEXT: [[CALL14:%.*]] = call i32 @scc_r2(i32 [[A]], i32 [[B]], i32 [[R]]) #[[ATTR6]] ; IS__TUNIT____-NEXT: [[CALL14:%.*]] = call i32 @scc_r2(i32 [[A]], i32 [[B]], i32 [[R]]) #[[ATTR9]]
; IS__TUNIT____-NEXT: br label [[COND_END]] ; IS__TUNIT____-NEXT: br label [[COND_END]]
; IS__TUNIT____: cond.end: ; IS__TUNIT____: cond.end:
; IS__TUNIT____-NEXT: [[COND:%.*]] = phi i32 [ [[R]], [[COND_TRUE]] ], [ [[R]], [[COND_FALSE]] ] ; IS__TUNIT____-NEXT: [[COND:%.*]] = phi i32 [ [[R]], [[COND_TRUE]] ], [ [[R]], [[COND_FALSE]] ]
; IS__TUNIT____-NEXT: br label [[RETURN]] ; IS__TUNIT____-NEXT: br label [[RETURN]]
; IS__TUNIT____: return: ; IS__TUNIT____: return:
; IS__TUNIT____-NEXT: [[RETVAL_0:%.*]] = phi i32 [ [[R]], [[IF_THEN]] ], [ [[B]], [[IF_THEN3]] ], [ [[COND]], [[COND_END]] ] ; IS__TUNIT____-NEXT: [[RETVAL_0:%.*]] = phi i32 [ [[R]], [[IF_THEN]] ], [ [[B]], [[IF_THEN3]] ], [ [[COND]], [[COND_END]] ]
; IS__TUNIT____-NEXT: ret i32 [[RETVAL_0]] ; IS__TUNIT____-NEXT: ret i32 [[RETVAL_0]]
; ;
; IS__CGSCC____: Function Attrs: nofree noinline nosync nounwind readnone uwtable willreturn ; IS__CGSCC____: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@scc_rX ; IS__CGSCC____-LABEL: define {{[^@]+}}@scc_rX
; IS__CGSCC____-SAME: (i32 [[A:%.*]], i32 [[B:%.*]], i32 [[R:%.*]]) #[[ATTR1]] { ; IS__CGSCC____-SAME: (i32 [[A:%.*]], i32 [[B:%.*]], i32 [[R:%.*]]) #[[ATTR0]] {
; IS__CGSCC____-NEXT: entry: ; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: [[CMP:%.*]] = icmp sgt i32 [[A]], [[B]] ; IS__CGSCC____-NEXT: [[CMP:%.*]] = icmp sgt i32 [[A]], [[B]]
; IS__CGSCC____-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_END:%.*]] ; IS__CGSCC____-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
; IS__CGSCC____: if.then: ; IS__CGSCC____: if.then:
; IS__CGSCC____-NEXT: br label [[RETURN:%.*]] ; IS__CGSCC____-NEXT: br label [[RETURN:%.*]]
; IS__CGSCC____: if.end: ; IS__CGSCC____: if.end:
; IS__CGSCC____-NEXT: [[CMP2:%.*]] = icmp slt i32 [[A]], [[B]] ; IS__CGSCC____-NEXT: [[CMP2:%.*]] = icmp slt i32 [[A]], [[B]]
; IS__CGSCC____-NEXT: br i1 [[CMP2]], label [[IF_THEN3:%.*]], label [[IF_END12:%.*]] ; IS__CGSCC____-NEXT: br i1 [[CMP2]], label [[IF_THEN3:%.*]], label [[IF_END12:%.*]]
▲ Show 20 Lines • Show All 74 Lines • ▼ Show 20 Lines
; __attribute__((noinline)) double* ptr_scc_r2(double* a, double* b, double* r) { ; __attribute__((noinline)) double* ptr_scc_r2(double* a, double* b, double* r) {
; if (a > b) ; if (a > b)
; return ptr_scc_r2(b, a, ptr_sink_r0(r)); ; return ptr_scc_r2(b, a, ptr_sink_r0(r));
; if (a < b) ; if (a < b)
; return ptr_scc_r1(ptr_sink_r0(b), ptr_scc_r2(ptr_scc_r1(a, b, r), ptr_scc_r1(a, ptr_scc_r2(r, r, r), r), ptr_scc_r2(a, b, r)), ptr_scc_r1(a, b, r)); ; return ptr_scc_r1(ptr_sink_r0(b), ptr_scc_r2(ptr_scc_r1(a, b, r), ptr_scc_r1(a, ptr_scc_r2(r, r, r), r), ptr_scc_r2(a, b, r)), ptr_scc_r1(a, b, r));
; return a == b ? r : ptr_scc_r2(a, b, r); ; return a == b ? r : ptr_scc_r2(a, b, r);
; } ; }
define double* @ptr_sink_r0(double* %r) #0 { define double* @ptr_sink_r0(double* %r) #0 {
; IS__TUNIT____: Function Attrs: nofree noinline nosync nounwind readnone uwtable willreturn ; CHECK: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@ptr_sink_r0 ; CHECK-LABEL: define {{[^@]+}}@ptr_sink_r0
; IS__TUNIT____-SAME: (double* nofree readnone returned "no-capture-maybe-returned" [[R:%.*]]) #[[ATTR0]] { ; CHECK-SAME: (double* nofree readnone returned "no-capture-maybe-returned" [[R:%.*]]) #[[ATTR0]] {
; IS__TUNIT____-NEXT: entry: ; CHECK-NEXT: entry:
; IS__TUNIT____-NEXT: ret double* [[R]] ; CHECK-NEXT: ret double* [[R]]
;
; IS__CGSCC____: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@ptr_sink_r0
; IS__CGSCC____-SAME: (double* nofree readnone returned "no-capture-maybe-returned" [[R:%.*]]) #[[ATTR0]] {
; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: ret double* [[R]]
; ;
entry: entry:
ret double* %r ret double* %r
} }
define double* @ptr_scc_r1(double* %a, double* %r, double* %b) #0 { define double* @ptr_scc_r1(double* %a, double* %r, double* %b) #0 {
; IS__TUNIT____: Function Attrs: nofree noinline nosync nounwind readnone uwtable ; IS__TUNIT____: Function Attrs: nofree noinline nosync nounwind readnone uwtable
; IS__TUNIT____-LABEL: define {{[^@]+}}@ptr_scc_r1 ; IS__TUNIT____-LABEL: define {{[^@]+}}@ptr_scc_r1
; IS__TUNIT____-SAME: (double* nocapture nofree readnone [[A:%.*]], double* nofree readnone returned "no-capture-maybe-returned" [[R:%.*]], double* nocapture nofree readnone [[B:%.*]]) #[[ATTR1]] { ; IS__TUNIT____-SAME: (double* nocapture nofree readnone [[A:%.*]], double* nofree readnone returned "no-capture-maybe-returned" [[R:%.*]], double* nocapture nofree readnone [[B:%.*]]) #[[ATTR1]] {
; IS__TUNIT____-NEXT: entry: ; IS__TUNIT____-NEXT: entry:
; IS__TUNIT____-NEXT: [[CALL1:%.*]] = call double* @ptr_scc_r2(double* noalias nocapture nofree readnone [[R]], double* noalias nocapture nofree readnone [[A]], double* noalias nofree readnone "no-capture-maybe-returned" [[R]]) #[[ATTR6]] ; IS__TUNIT____-NEXT: [[CALL1:%.*]] = call double* @ptr_scc_r2(double* noalias nocapture nofree readnone [[R]], double* noalias nocapture nofree readnone [[A]], double* noalias nofree readnone "no-capture-maybe-returned" [[R]]) #[[ATTR9]]
; IS__TUNIT____-NEXT: ret double* [[R]] ; IS__TUNIT____-NEXT: ret double* [[R]]
; ;
; IS__CGSCC____: Function Attrs: nofree noinline nosync nounwind readnone uwtable ; IS__CGSCC_OPM: Function Attrs: nofree noinline nosync nounwind readnone uwtable
; IS__CGSCC____-LABEL: define {{[^@]+}}@ptr_scc_r1 ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@ptr_scc_r1
; IS__CGSCC____-SAME: (double* nocapture nofree readnone [[A:%.*]], double* nofree readnone returned "no-capture-maybe-returned" [[R:%.*]], double* nocapture nofree readnone [[B:%.*]]) #[[ATTR2:[0-9]+]] { ; IS__CGSCC_OPM-SAME: (double* nocapture nofree readnone [[A:%.*]], double* nofree readnone returned "no-capture-maybe-returned" [[R:%.*]], double* nocapture nofree readnone [[B:%.*]]) #[[ATTR2:[0-9]+]] {
; IS__CGSCC____-NEXT: entry: ; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC____-NEXT: [[CALL1:%.*]] = call double* @ptr_scc_r2(double* noalias nocapture nofree readnone [[R]], double* noalias nocapture nofree readnone [[A]], double* noalias nofree readnone "no-capture-maybe-returned" [[R]]) #[[ATTR7]] ; IS__CGSCC_OPM-NEXT: [[CALL1:%.*]] = call double* @ptr_scc_r2(double* noalias nocapture nofree readnone [[R]], double* noalias nocapture nofree readnone [[A]], double* noalias nofree readnone "no-capture-maybe-returned" [[R]]) #[[ATTR10]]
; IS__CGSCC____-NEXT: ret double* [[R]] ; IS__CGSCC_OPM-NEXT: ret double* [[R]]
;
; IS__CGSCC_NPM: Function Attrs: nofree noinline nosync nounwind readnone uwtable
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@ptr_scc_r1
; IS__CGSCC_NPM-SAME: (double* nocapture nofree readnone [[A:%.*]], double* nofree readnone returned "no-capture-maybe-returned" [[R:%.*]], double* nocapture nofree readnone [[B:%.*]]) #[[ATTR2:[0-9]+]] {
; IS__CGSCC_NPM-NEXT: entry:
; IS__CGSCC_NPM-NEXT: [[CALL1:%.*]] = call double* @ptr_scc_r2(double* noalias nocapture nofree readnone [[R]], double* noalias nocapture nofree readnone [[A]], double* noalias nofree readnone "no-capture-maybe-returned" [[R]]) #[[ATTR9]]
; IS__CGSCC_NPM-NEXT: ret double* [[R]]
; ;
entry: entry:
%call = call double* @ptr_sink_r0(double* %r) %call = call double* @ptr_sink_r0(double* %r)
%call1 = call double* @ptr_scc_r2(double* %r, double* %a, double* %call) %call1 = call double* @ptr_scc_r2(double* %r, double* %a, double* %call)
ret double* %call1 ret double* %call1
} }
define double* @ptr_scc_r2(double* %a, double* %b, double* %r) #0 { define double* @ptr_scc_r2(double* %a, double* %b, double* %r) #0 {
; IS__TUNIT____: Function Attrs: nofree noinline nosync nounwind readnone uwtable ; IS__TUNIT____: Function Attrs: nofree noinline nosync nounwind readnone uwtable
; IS__TUNIT____-LABEL: define {{[^@]+}}@ptr_scc_r2 ; IS__TUNIT____-LABEL: define {{[^@]+}}@ptr_scc_r2
; IS__TUNIT____-SAME: (double* nocapture nofree readnone [[A:%.*]], double* nocapture nofree readnone [[B:%.*]], double* nofree readnone returned "no-capture-maybe-returned" [[R:%.*]]) #[[ATTR1]] { ; IS__TUNIT____-SAME: (double* nocapture nofree readnone [[A:%.*]], double* nocapture nofree readnone [[B:%.*]], double* nofree readnone returned "no-capture-maybe-returned" [[R:%.*]]) #[[ATTR1]] {
; IS__TUNIT____-NEXT: entry: ; IS__TUNIT____-NEXT: entry:
; IS__TUNIT____-NEXT: [[CMP:%.*]] = icmp ugt double* [[A]], [[B]] ; IS__TUNIT____-NEXT: [[CMP:%.*]] = icmp ugt double* [[A]], [[B]]
; IS__TUNIT____-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_END:%.*]] ; IS__TUNIT____-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
; IS__TUNIT____: if.then: ; IS__TUNIT____: if.then:
; IS__TUNIT____-NEXT: [[CALL1:%.*]] = call double* @ptr_scc_r2(double* noalias nocapture nofree readnone [[B]], double* noalias nocapture nofree readnone [[A]], double* noalias nofree readnone "no-capture-maybe-returned" [[R]]) #[[ATTR6]] ; IS__TUNIT____-NEXT: [[CALL1:%.*]] = call double* @ptr_scc_r2(double* noalias nocapture nofree readnone [[B]], double* noalias nocapture nofree readnone [[A]], double* noalias nofree readnone "no-capture-maybe-returned" [[R]]) #[[ATTR9]]
; IS__TUNIT____-NEXT: br label [[RETURN:%.*]] ; IS__TUNIT____-NEXT: br label [[RETURN:%.*]]
; IS__TUNIT____: if.end: ; IS__TUNIT____: if.end:
; IS__TUNIT____-NEXT: [[CMP2:%.*]] = icmp ult double* [[A]], [[B]] ; IS__TUNIT____-NEXT: [[CMP2:%.*]] = icmp ult double* [[A]], [[B]]
; IS__TUNIT____-NEXT: br i1 [[CMP2]], label [[IF_THEN3:%.*]], label [[IF_END12:%.*]] ; IS__TUNIT____-NEXT: br i1 [[CMP2]], label [[IF_THEN3:%.*]], label [[IF_END12:%.*]]
; IS__TUNIT____: if.then3: ; IS__TUNIT____: if.then3:
; IS__TUNIT____-NEXT: [[CALL5:%.*]] = call double* @ptr_scc_r1(double* noalias nocapture nofree readnone [[A]], double* noalias nofree readnone "no-capture-maybe-returned" [[B]], double* noalias nocapture nofree readnone undef) #[[ATTR6]] ; IS__TUNIT____-NEXT: [[CALL5:%.*]] = call double* @ptr_scc_r1(double* noalias nocapture nofree readnone [[A]], double* noalias nofree readnone "no-capture-maybe-returned" [[B]], double* noalias nocapture nofree readnone undef) #[[ATTR9]]
; IS__TUNIT____-NEXT: [[CALL6:%.*]] = call double* @ptr_scc_r2(double* noalias nocapture nofree readnone [[R]], double* noalias nocapture nofree readnone [[R]], double* noalias nofree readnone "no-capture-maybe-returned" [[R]]) #[[ATTR6]] ; IS__TUNIT____-NEXT: [[CALL6:%.*]] = call double* @ptr_scc_r2(double* noalias nocapture nofree readnone [[R]], double* noalias nocapture nofree readnone [[R]], double* noalias nofree readnone "no-capture-maybe-returned" [[R]]) #[[ATTR9]]
; IS__TUNIT____-NEXT: [[CALL7:%.*]] = call double* @ptr_scc_r1(double* noalias nocapture nofree readnone [[A]], double* noalias nofree readnone "no-capture-maybe-returned" [[R]], double* noalias nocapture nofree readnone undef) #[[ATTR6]] ; IS__TUNIT____-NEXT: [[CALL7:%.*]] = call double* @ptr_scc_r1(double* noalias nocapture nofree readnone [[A]], double* noalias nofree readnone "no-capture-maybe-returned" [[R]], double* noalias nocapture nofree readnone undef) #[[ATTR9]]
; IS__TUNIT____-NEXT: [[CALL8:%.*]] = call double* @ptr_scc_r2(double* noalias nocapture nofree readnone [[A]], double* noalias nocapture nofree readnone [[B]], double* noalias nofree readnone "no-capture-maybe-returned" [[R]]) #[[ATTR6]] ; IS__TUNIT____-NEXT: [[CALL8:%.*]] = call double* @ptr_scc_r2(double* noalias nocapture nofree readnone [[A]], double* noalias nocapture nofree readnone [[B]], double* noalias nofree readnone "no-capture-maybe-returned" [[R]]) #[[ATTR9]]
; IS__TUNIT____-NEXT: [[CALL9:%.*]] = call double* @ptr_scc_r2(double* noalias nocapture nofree readnone [[B]], double* noalias nocapture nofree readnone [[R]], double* noalias nofree readnone "no-capture-maybe-returned" [[R]]) #[[ATTR6]] ; IS__TUNIT____-NEXT: [[CALL9:%.*]] = call double* @ptr_scc_r2(double* noalias nocapture nofree readnone [[B]], double* noalias nocapture nofree readnone [[R]], double* noalias nofree readnone "no-capture-maybe-returned" [[R]]) #[[ATTR9]]
; IS__TUNIT____-NEXT: [[CALL11:%.*]] = call double* @ptr_scc_r1(double* noalias nocapture nofree readnone [[B]], double* noalias nofree readnone "no-capture-maybe-returned" [[R]], double* noalias nocapture nofree readnone undef) #[[ATTR6]] ; IS__TUNIT____-NEXT: [[CALL11:%.*]] = call double* @ptr_scc_r1(double* noalias nocapture nofree readnone [[B]], double* noalias nofree readnone "no-capture-maybe-returned" [[R]], double* noalias nocapture nofree readnone undef) #[[ATTR9]]
; IS__TUNIT____-NEXT: br label [[RETURN]] ; IS__TUNIT____-NEXT: br label [[RETURN]]
; IS__TUNIT____: if.end12: ; IS__TUNIT____: if.end12:
; IS__TUNIT____-NEXT: [[CMP13:%.*]] = icmp eq double* [[A]], [[B]] ; IS__TUNIT____-NEXT: [[CMP13:%.*]] = icmp eq double* [[A]], [[B]]
; IS__TUNIT____-NEXT: br i1 [[CMP13]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] ; IS__TUNIT____-NEXT: br i1 [[CMP13]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
; IS__TUNIT____: cond.true: ; IS__TUNIT____: cond.true:
; IS__TUNIT____-NEXT: br label [[COND_END:%.*]] ; IS__TUNIT____-NEXT: br label [[COND_END:%.*]]
; IS__TUNIT____: cond.false: ; IS__TUNIT____: cond.false:
; IS__TUNIT____-NEXT: [[CALL14:%.*]] = call double* @ptr_scc_r2(double* noalias nocapture nofree readnone [[A]], double* noalias nocapture nofree readnone [[B]], double* noalias nofree readnone "no-capture-maybe-returned" [[R]]) #[[ATTR6]] ; IS__TUNIT____-NEXT: [[CALL14:%.*]] = call double* @ptr_scc_r2(double* noalias nocapture nofree readnone [[A]], double* noalias nocapture nofree readnone [[B]], double* noalias nofree readnone "no-capture-maybe-returned" [[R]]) #[[ATTR9]]
; IS__TUNIT____-NEXT: br label [[COND_END]] ; IS__TUNIT____-NEXT: br label [[COND_END]]
; IS__TUNIT____: cond.end: ; IS__TUNIT____: cond.end:
; IS__TUNIT____-NEXT: [[COND:%.*]] = phi double* [ [[R]], [[COND_TRUE]] ], [ [[R]], [[COND_FALSE]] ] ; IS__TUNIT____-NEXT: [[COND:%.*]] = phi double* [ [[R]], [[COND_TRUE]] ], [ [[R]], [[COND_FALSE]] ]
; IS__TUNIT____-NEXT: br label [[RETURN]] ; IS__TUNIT____-NEXT: br label [[RETURN]]
; IS__TUNIT____: return: ; IS__TUNIT____: return:
; IS__TUNIT____-NEXT: [[RETVAL_0:%.*]] = phi double* [ [[R]], [[IF_THEN]] ], [ [[R]], [[IF_THEN3]] ], [ [[COND]], [[COND_END]] ] ; IS__TUNIT____-NEXT: [[RETVAL_0:%.*]] = phi double* [ [[R]], [[IF_THEN]] ], [ [[R]], [[IF_THEN3]] ], [ [[COND]], [[COND_END]] ]
; IS__TUNIT____-NEXT: ret double* [[R]] ; IS__TUNIT____-NEXT: ret double* [[R]]
; ;
; IS__CGSCC____: Function Attrs: nofree noinline nosync nounwind readnone uwtable ; IS__CGSCC_OPM: Function Attrs: nofree noinline nosync nounwind readnone uwtable
; IS__CGSCC____-LABEL: define {{[^@]+}}@ptr_scc_r2 ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@ptr_scc_r2
; IS__CGSCC____-SAME: (double* nocapture nofree readnone [[A:%.*]], double* nocapture nofree readnone [[B:%.*]], double* nofree readnone returned "no-capture-maybe-returned" [[R:%.*]]) #[[ATTR2]] { ; IS__CGSCC_OPM-SAME: (double* nocapture nofree readnone [[A:%.*]], double* nocapture nofree readnone [[B:%.*]], double* nofree readnone returned "no-capture-maybe-returned" [[R:%.*]]) #[[ATTR2]] {
; IS__CGSCC____-NEXT: entry: ; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC____-NEXT: [[CMP:%.*]] = icmp ugt double* [[A]], [[B]] ; IS__CGSCC_OPM-NEXT: [[CMP:%.*]] = icmp ugt double* [[A]], [[B]]
; IS__CGSCC____-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_END:%.*]] ; IS__CGSCC_OPM-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
; IS__CGSCC____: if.then: ; IS__CGSCC_OPM: if.then:
; IS__CGSCC____-NEXT: [[CALL1:%.*]] = call double* @ptr_scc_r2(double* noalias nocapture nofree readnone [[B]], double* noalias nocapture nofree readnone [[A]], double* noalias nofree readnone "no-capture-maybe-returned" [[R]]) #[[ATTR7]] ; IS__CGSCC_OPM-NEXT: [[CALL1:%.*]] = call double* @ptr_scc_r2(double* noalias nocapture nofree readnone [[B]], double* noalias nocapture nofree readnone [[A]], double* noalias nofree readnone "no-capture-maybe-returned" [[R]]) #[[ATTR10]]
; IS__CGSCC____-NEXT: br label [[RETURN:%.*]] ; IS__CGSCC_OPM-NEXT: br label [[RETURN:%.*]]
; IS__CGSCC____: if.end: ; IS__CGSCC_OPM: if.end:
; IS__CGSCC____-NEXT: [[CMP2:%.*]] = icmp ult double* [[A]], [[B]] ; IS__CGSCC_OPM-NEXT: [[CMP2:%.*]] = icmp ult double* [[A]], [[B]]
; IS__CGSCC____-NEXT: br i1 [[CMP2]], label [[IF_THEN3:%.*]], label [[IF_END12:%.*]] ; IS__CGSCC_OPM-NEXT: br i1 [[CMP2]], label [[IF_THEN3:%.*]], label [[IF_END12:%.*]]
; IS__CGSCC____: if.then3: ; IS__CGSCC_OPM: if.then3:
; IS__CGSCC____-NEXT: [[CALL5:%.*]] = call double* @ptr_scc_r1(double* noalias nocapture nofree readnone [[A]], double* noalias nofree readnone "no-capture-maybe-returned" [[B]], double* noalias nocapture nofree readnone undef) #[[ATTR7]] ; IS__CGSCC_OPM-NEXT: [[CALL5:%.*]] = call double* @ptr_scc_r1(double* noalias nocapture nofree readnone [[A]], double* noalias nofree readnone "no-capture-maybe-returned" [[B]], double* noalias nocapture nofree readnone undef) #[[ATTR10]]
; IS__CGSCC____-NEXT: [[CALL6:%.*]] = call double* @ptr_scc_r2(double* noalias nocapture nofree readnone [[R]], double* noalias nocapture nofree readnone [[R]], double* noalias nofree readnone "no-capture-maybe-returned" [[R]]) #[[ATTR7]] ; IS__CGSCC_OPM-NEXT: [[CALL6:%.*]] = call double* @ptr_scc_r2(double* noalias nocapture nofree readnone [[R]], double* noalias nocapture nofree readnone [[R]], double* noalias nofree readnone "no-capture-maybe-returned" [[R]]) #[[ATTR10]]
; IS__CGSCC____-NEXT: [[CALL7:%.*]] = call double* @ptr_scc_r1(double* noalias nocapture nofree readnone [[A]], double* noalias nofree readnone "no-capture-maybe-returned" [[R]], double* noalias nocapture nofree readnone undef) #[[ATTR7]] ; IS__CGSCC_OPM-NEXT: [[CALL7:%.*]] = call double* @ptr_scc_r1(double* noalias nocapture nofree readnone [[A]], double* noalias nofree readnone "no-capture-maybe-returned" [[R]], double* noalias nocapture nofree readnone undef) #[[ATTR10]]
; IS__CGSCC____-NEXT: [[CALL8:%.*]] = call double* @ptr_scc_r2(double* noalias nocapture nofree readnone [[A]], double* noalias nocapture nofree readnone [[B]], double* noalias nofree readnone "no-capture-maybe-returned" [[R]]) #[[ATTR7]] ; IS__CGSCC_OPM-NEXT: [[CALL8:%.*]] = call double* @ptr_scc_r2(double* noalias nocapture nofree readnone [[A]], double* noalias nocapture nofree readnone [[B]], double* noalias nofree readnone "no-capture-maybe-returned" [[R]]) #[[ATTR10]]
; IS__CGSCC____-NEXT: [[CALL9:%.*]] = call double* @ptr_scc_r2(double* noalias nocapture nofree readnone [[B]], double* noalias nocapture nofree readnone [[R]], double* noalias nofree readnone "no-capture-maybe-returned" [[R]]) #[[ATTR7]] ; IS__CGSCC_OPM-NEXT: [[CALL9:%.*]] = call double* @ptr_scc_r2(double* noalias nocapture nofree readnone [[B]], double* noalias nocapture nofree readnone [[R]], double* noalias nofree readnone "no-capture-maybe-returned" [[R]]) #[[ATTR10]]
; IS__CGSCC____-NEXT: [[CALL11:%.*]] = call double* @ptr_scc_r1(double* noalias nocapture nofree readnone [[B]], double* noalias nofree readnone "no-capture-maybe-returned" [[R]], double* noalias nocapture nofree readnone undef) #[[ATTR7]] ; IS__CGSCC_OPM-NEXT: [[CALL11:%.*]] = call double* @ptr_scc_r1(double* noalias nocapture nofree readnone [[B]], double* noalias nofree readnone "no-capture-maybe-returned" [[R]], double* noalias nocapture nofree readnone undef) #[[ATTR10]]
; IS__CGSCC____-NEXT: br label [[RETURN]] ; IS__CGSCC_OPM-NEXT: br label [[RETURN]]
; IS__CGSCC____: if.end12: ; IS__CGSCC_OPM: if.end12:
; IS__CGSCC____-NEXT: [[CMP13:%.*]] = icmp eq double* [[A]], [[B]] ; IS__CGSCC_OPM-NEXT: [[CMP13:%.*]] = icmp eq double* [[A]], [[B]]
; IS__CGSCC____-NEXT: br i1 [[CMP13]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] ; IS__CGSCC_OPM-NEXT: br i1 [[CMP13]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
; IS__CGSCC____: cond.true: ; IS__CGSCC_OPM: cond.true:
; IS__CGSCC____-NEXT: br label [[COND_END:%.*]] ; IS__CGSCC_OPM-NEXT: br label [[COND_END:%.*]]
; IS__CGSCC____: cond.false: ; IS__CGSCC_OPM: cond.false:
; IS__CGSCC____-NEXT: [[CALL14:%.*]] = call double* @ptr_scc_r2(double* noalias nocapture nofree readnone [[A]], double* noalias nocapture nofree readnone [[B]], double* noalias nofree readnone "no-capture-maybe-returned" [[R]]) #[[ATTR7]] ; IS__CGSCC_OPM-NEXT: [[CALL14:%.*]] = call double* @ptr_scc_r2(double* noalias nocapture nofree readnone [[A]], double* noalias nocapture nofree readnone [[B]], double* noalias nofree readnone "no-capture-maybe-returned" [[R]]) #[[ATTR10]]
; IS__CGSCC____-NEXT: br label [[COND_END]] ; IS__CGSCC_OPM-NEXT: br label [[COND_END]]
; IS__CGSCC____: cond.end: ; IS__CGSCC_OPM: cond.end:
; IS__CGSCC____-NEXT: [[COND:%.*]] = phi double* [ [[R]], [[COND_TRUE]] ], [ [[R]], [[COND_FALSE]] ] ; IS__CGSCC_OPM-NEXT: [[COND:%.*]] = phi double* [ [[R]], [[COND_TRUE]] ], [ [[R]], [[COND_FALSE]] ]
; IS__CGSCC____-NEXT: br label [[RETURN]] ; IS__CGSCC_OPM-NEXT: br label [[RETURN]]
; IS__CGSCC____: return: ; IS__CGSCC_OPM: return:
; IS__CGSCC____-NEXT: [[RETVAL_0:%.*]] = phi double* [ [[R]], [[IF_THEN]] ], [ [[R]], [[IF_THEN3]] ], [ [[COND]], [[COND_END]] ] ; IS__CGSCC_OPM-NEXT: [[RETVAL_0:%.*]] = phi double* [ [[R]], [[IF_THEN]] ], [ [[R]], [[IF_THEN3]] ], [ [[COND]], [[COND_END]] ]
; IS__CGSCC____-NEXT: ret double* [[R]] ; IS__CGSCC_OPM-NEXT: ret double* [[R]]
;
; IS__CGSCC_NPM: Function Attrs: nofree noinline nosync nounwind readnone uwtable
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@ptr_scc_r2
; IS__CGSCC_NPM-SAME: (double* nocapture nofree readnone [[A:%.*]], double* nocapture nofree readnone [[B:%.*]], double* nofree readnone returned "no-capture-maybe-returned" [[R:%.*]]) #[[ATTR2]] {
; IS__CGSCC_NPM-NEXT: entry:
; IS__CGSCC_NPM-NEXT: [[CMP:%.*]] = icmp ugt double* [[A]], [[B]]
; IS__CGSCC_NPM-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
; IS__CGSCC_NPM: if.then:
; IS__CGSCC_NPM-NEXT: [[CALL1:%.*]] = call double* @ptr_scc_r2(double* noalias nocapture nofree readnone [[B]], double* noalias nocapture nofree readnone [[A]], double* noalias nofree readnone "no-capture-maybe-returned" [[R]]) #[[ATTR9]]
; IS__CGSCC_NPM-NEXT: br label [[RETURN:%.*]]
; IS__CGSCC_NPM: if.end:
; IS__CGSCC_NPM-NEXT: [[CMP2:%.*]] = icmp ult double* [[A]], [[B]]
; IS__CGSCC_NPM-NEXT: br i1 [[CMP2]], label [[IF_THEN3:%.*]], label [[IF_END12:%.*]]
; IS__CGSCC_NPM: if.then3:
; IS__CGSCC_NPM-NEXT: [[CALL5:%.*]] = call double* @ptr_scc_r1(double* noalias nocapture nofree readnone [[A]], double* noalias nofree readnone "no-capture-maybe-returned" [[B]], double* noalias nocapture nofree readnone undef) #[[ATTR9]]
; IS__CGSCC_NPM-NEXT: [[CALL6:%.*]] = call double* @ptr_scc_r2(double* noalias nocapture nofree readnone [[R]], double* noalias nocapture nofree readnone [[R]], double* noalias nofree readnone "no-capture-maybe-returned" [[R]]) #[[ATTR9]]
; IS__CGSCC_NPM-NEXT: [[CALL7:%.*]] = call double* @ptr_scc_r1(double* noalias nocapture nofree readnone [[A]], double* noalias nofree readnone "no-capture-maybe-returned" [[R]], double* noalias nocapture nofree readnone undef) #[[ATTR9]]
; IS__CGSCC_NPM-NEXT: [[CALL8:%.*]] = call double* @ptr_scc_r2(double* noalias nocapture nofree readnone [[A]], double* noalias nocapture nofree readnone [[B]], double* noalias nofree readnone "no-capture-maybe-returned" [[R]]) #[[ATTR9]]
; IS__CGSCC_NPM-NEXT: [[CALL9:%.*]] = call double* @ptr_scc_r2(double* noalias nocapture nofree readnone [[B]], double* noalias nocapture nofree readnone [[R]], double* noalias nofree readnone "no-capture-maybe-returned" [[R]]) #[[ATTR9]]
; IS__CGSCC_NPM-NEXT: [[CALL11:%.*]] = call double* @ptr_scc_r1(double* noalias nocapture nofree readnone [[B]], double* noalias nofree readnone "no-capture-maybe-returned" [[R]], double* noalias nocapture nofree readnone undef) #[[ATTR9]]
; IS__CGSCC_NPM-NEXT: br label [[RETURN]]
; IS__CGSCC_NPM: if.end12:
; IS__CGSCC_NPM-NEXT: [[CMP13:%.*]] = icmp eq double* [[A]], [[B]]
; IS__CGSCC_NPM-NEXT: br i1 [[CMP13]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
; IS__CGSCC_NPM: cond.true:
; IS__CGSCC_NPM-NEXT: br label [[COND_END:%.*]]
; IS__CGSCC_NPM: cond.false:
; IS__CGSCC_NPM-NEXT: [[CALL14:%.*]] = call double* @ptr_scc_r2(double* noalias nocapture nofree readnone [[A]], double* noalias nocapture nofree readnone [[B]], double* noalias nofree readnone "no-capture-maybe-returned" [[R]]) #[[ATTR9]]
; IS__CGSCC_NPM-NEXT: br label [[COND_END]]
; IS__CGSCC_NPM: cond.end:
; IS__CGSCC_NPM-NEXT: [[COND:%.*]] = phi double* [ [[R]], [[COND_TRUE]] ], [ [[R]], [[COND_FALSE]] ]
; IS__CGSCC_NPM-NEXT: br label [[RETURN]]
; IS__CGSCC_NPM: return:
; IS__CGSCC_NPM-NEXT: [[RETVAL_0:%.*]] = phi double* [ [[R]], [[IF_THEN]] ], [ [[R]], [[IF_THEN3]] ], [ [[COND]], [[COND_END]] ]
; IS__CGSCC_NPM-NEXT: ret double* [[R]]
; ;
entry: entry:
%cmp = icmp ugt double* %a, %b %cmp = icmp ugt double* %a, %b
br i1 %cmp, label %if.then, label %if.end br i1 %cmp, label %if.then, label %if.end
if.then: ; preds = %entry if.then: ; preds = %entry
%call = call double* @ptr_sink_r0(double* %r) %call = call double* @ptr_sink_r0(double* %r)
%call1 = call double* @ptr_scc_r2(double* %b, double* %a, double* %call) %call1 = call double* @ptr_scc_r2(double* %b, double* %a, double* %call)
Show All 37 Lines
; TEST a no-return singleton SCC ; TEST a no-return singleton SCC
; ;
; int* rt0(int *a) { ; int* rt0(int *a) {
; return *a ? a : rt0(a); ; return *a ? a : rt0(a);
; } ; }
; ;
define i32* @rt0(i32* %a) #0 { define i32* @rt0(i32* %a) #0 {
; IS__TUNIT____: Function Attrs: argmemonly nofree noinline nosync nounwind readonly uwtable ; NOT_CGSCC_OPM: Function Attrs: argmemonly nofree noinline nosync nounwind readonly uwtable
; IS__TUNIT____-LABEL: define {{[^@]+}}@rt0 ; NOT_CGSCC_OPM-LABEL: define {{[^@]+}}@rt0
; IS__TUNIT____-SAME: (i32* nofree noundef nonnull readonly returned align 4 dereferenceable(4) "no-capture-maybe-returned" [[A:%.*]]) #[[ATTR2:[0-9]+]] { ; NOT_CGSCC_OPM-SAME: (i32* nofree noundef nonnull readonly returned align 4 dereferenceable(4) "no-capture-maybe-returned" [[A:%.*]]) #[[ATTR3:[0-9]+]] {
; IS__TUNIT____-NEXT: entry: ; NOT_CGSCC_OPM-NEXT: entry:
; IS__TUNIT____-NEXT: [[CALL:%.*]] = call i32* @rt0(i32* nofree noundef nonnull readonly align 4 dereferenceable(4) "no-capture-maybe-returned" [[A]]) #[[ATTR7:[0-9]+]] ; NOT_CGSCC_OPM-NEXT: [[CALL:%.*]] = call i32* @rt0(i32* nofree noundef nonnull readonly align 4 dereferenceable(4) "no-capture-maybe-returned" [[A]]) #[[ATTR10:[0-9]+]]
; IS__TUNIT____-NEXT: ret i32* [[A]] ; NOT_CGSCC_OPM-NEXT: ret i32* [[A]]
; ;
; IS__CGSCC____: Function Attrs: argmemonly nofree noinline nosync nounwind readonly uwtable ; IS__CGSCC_OPM: Function Attrs: argmemonly nofree noinline nosync nounwind readonly uwtable
; IS__CGSCC____-LABEL: define {{[^@]+}}@rt0 ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@rt0
; IS__CGSCC____-SAME: (i32* nofree noundef nonnull readonly returned align 4 dereferenceable(4) "no-capture-maybe-returned" [[A:%.*]]) #[[ATTR3:[0-9]+]] { ; IS__CGSCC_OPM-SAME: (i32* nofree noundef nonnull readonly returned align 4 dereferenceable(4) "no-capture-maybe-returned" [[A:%.*]]) #[[ATTR3:[0-9]+]] {
; IS__CGSCC____-NEXT: entry: ; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC____-NEXT: [[CALL:%.*]] = call i32* @rt0(i32* nofree noundef nonnull readonly align 4 dereferenceable(4) "no-capture-maybe-returned" [[A]]) #[[ATTR8:[0-9]+]] ; IS__CGSCC_OPM-NEXT: [[CALL:%.*]] = call i32* @rt0(i32* nofree noundef nonnull readonly align 4 dereferenceable(4) "no-capture-maybe-returned" [[A]]) #[[ATTR11:[0-9]+]]
; IS__CGSCC____-NEXT: ret i32* [[A]] ; IS__CGSCC_OPM-NEXT: ret i32* [[A]]
; ;
entry: entry:
%v = load i32, i32* %a, align 4 %v = load i32, i32* %a, align 4
%tobool = icmp ne i32 %v, 0 %tobool = icmp ne i32 %v, 0
%call = call i32* @rt0(i32* %a) %call = call i32* @rt0(i32* %a)
%sel = select i1 %tobool, i32* %a, i32* %call %sel = select i1 %tobool, i32* %a, i32* %call
ret i32* %sel ret i32* %sel
} }
; TEST a no-return singleton SCC ; TEST a no-return singleton SCC
; ;
; int* rt1(int *a) { ; int* rt1(int *a) {
; return *a ? undef : rt1(a); ; return *a ? undef : rt1(a);
; } ; }
; ;
define i32* @rt1(i32* %a) #0 { define i32* @rt1(i32* %a) #0 {
; IS__TUNIT____: Function Attrs: nofree noinline nosync nounwind readnone uwtable willreturn ; CHECK: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@rt1 ; CHECK-LABEL: define {{[^@]+}}@rt1
; IS__TUNIT____-SAME: (i32* nocapture nofree nonnull readnone align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR0]] { ; CHECK-SAME: (i32* nocapture nofree nonnull readnone align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR0]] {
; IS__TUNIT____-NEXT: entry: ; CHECK-NEXT: entry:
; IS__TUNIT____-NEXT: ret i32* undef ; CHECK-NEXT: ret i32* undef
;
; IS__CGSCC____: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@rt1
; IS__CGSCC____-SAME: (i32* nocapture nofree nonnull readnone align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR0]] {
; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: ret i32* undef
; ;
entry: entry:
%v = load i32, i32* %a, align 4 %v = load i32, i32* %a, align 4
%tobool = icmp ne i32 %v, 0 %tobool = icmp ne i32 %v, 0
%call = call i32* @rt1(i32* %a) %call = call i32* @rt1(i32* %a)
%sel = select i1 %tobool, i32* undef, i32* %call %sel = select i1 %tobool, i32* undef, i32* %call
ret i32* %sel ret i32* %sel
} }
; TEST another SCC test ; TEST another SCC test
; ;
define i32* @rt2_helper(i32* %a) #0 { define i32* @rt2_helper(i32* %a) #0 {
; IS__TUNIT____: Function Attrs: nofree noinline nosync nounwind readnone uwtable ; IS__TUNIT____: Function Attrs: nofree noinline nosync nounwind readnone uwtable
; IS__TUNIT____-LABEL: define {{[^@]+}}@rt2_helper ; IS__TUNIT____-LABEL: define {{[^@]+}}@rt2_helper
; IS__TUNIT____-SAME: (i32* nofree readnone returned [[A:%.*]]) #[[ATTR1]] { ; IS__TUNIT____-SAME: (i32* nofree readnone returned [[A:%.*]]) #[[ATTR1]] {
; IS__TUNIT____-NEXT: entry: ; IS__TUNIT____-NEXT: entry:
; IS__TUNIT____-NEXT: [[CALL:%.*]] = call i32* @rt2(i32* noalias nofree readnone [[A]], i32* noalias nofree readnone "no-capture-maybe-returned" [[A]]) #[[ATTR6]] ; IS__TUNIT____-NEXT: [[CALL:%.*]] = call i32* @rt2(i32* noalias nofree readnone [[A]], i32* noalias nofree readnone "no-capture-maybe-returned" [[A]]) #[[ATTR9]]
; IS__TUNIT____-NEXT: ret i32* [[A]] ; IS__TUNIT____-NEXT: ret i32* [[A]]
; ;
; IS__CGSCC____: Function Attrs: nofree noinline nosync nounwind readnone uwtable ; IS__CGSCC_OPM: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable
; IS__CGSCC____-LABEL: define {{[^@]+}}@rt2_helper ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@rt2_helper
; IS__CGSCC____-SAME: (i32* nofree readnone returned [[A:%.*]]) #[[ATTR2]] { ; IS__CGSCC_OPM-SAME: (i32* nofree readnone returned [[A:%.*]]) #[[ATTR4:[0-9]+]] {
; IS__CGSCC____-NEXT: entry: ; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC____-NEXT: [[CALL:%.*]] = call i32* @rt2(i32* noalias nofree readnone [[A]], i32* noalias nofree readnone "no-capture-maybe-returned" [[A]]) #[[ATTR7]] ; IS__CGSCC_OPM-NEXT: [[CALL:%.*]] = call i32* @rt2(i32* noalias nofree readnone [[A]], i32* noalias nofree readnone "no-capture-maybe-returned" [[A]]) #[[ATTR10]]
; IS__CGSCC____-NEXT: ret i32* [[A]] ; IS__CGSCC_OPM-NEXT: ret i32* [[A]]
;
; IS__CGSCC_NPM: Function Attrs: nofree noinline nosync nounwind readnone uwtable
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@rt2_helper
; IS__CGSCC_NPM-SAME: (i32* nofree readnone returned [[A:%.*]]) #[[ATTR2]] {
; IS__CGSCC_NPM-NEXT: entry:
; IS__CGSCC_NPM-NEXT: [[CALL:%.*]] = call i32* @rt2(i32* noalias nofree readnone [[A]], i32* noalias nofree readnone "no-capture-maybe-returned" [[A]]) #[[ATTR9]]
; IS__CGSCC_NPM-NEXT: ret i32* [[A]]
; ;
entry: entry:
%call = call i32* @rt2(i32* %a, i32* %a) %call = call i32* @rt2(i32* %a, i32* %a)
ret i32* %call ret i32* %call
} }
define i32* @rt2(i32* %a, i32 *%b) #0 { define i32* @rt2(i32* %a, i32 *%b) #0 {
; IS__TUNIT____: Function Attrs: nofree noinline nosync nounwind readnone uwtable ; IS__TUNIT____: Function Attrs: nofree noinline nosync nounwind readnone uwtable
; IS__TUNIT____-LABEL: define {{[^@]+}}@rt2 ; IS__TUNIT____-LABEL: define {{[^@]+}}@rt2
; IS__TUNIT____-SAME: (i32* nofree readnone [[A:%.*]], i32* nofree readnone "no-capture-maybe-returned" [[B:%.*]]) #[[ATTR1]] { ; IS__TUNIT____-SAME: (i32* nofree readnone [[A:%.*]], i32* nofree readnone "no-capture-maybe-returned" [[B:%.*]]) #[[ATTR1]] {
; IS__TUNIT____-NEXT: entry: ; IS__TUNIT____-NEXT: entry:
; IS__TUNIT____-NEXT: [[CMP:%.*]] = icmp eq i32* [[A]], null ; IS__TUNIT____-NEXT: [[CMP:%.*]] = icmp eq i32* [[A]], null
; IS__TUNIT____-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_END:%.*]] ; IS__TUNIT____-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
; IS__TUNIT____: if.then: ; IS__TUNIT____: if.then:
; IS__TUNIT____-NEXT: [[CALL:%.*]] = call i32* @rt2_helper(i32* noalias nofree readnone [[A]]) #[[ATTR6]] ; IS__TUNIT____-NEXT: [[CALL:%.*]] = call i32* @rt2_helper(i32* noalias nofree readnone [[A]]) #[[ATTR9]]
; IS__TUNIT____-NEXT: br label [[IF_END]] ; IS__TUNIT____-NEXT: br label [[IF_END]]
; IS__TUNIT____: if.end: ; IS__TUNIT____: if.end:
; IS__TUNIT____-NEXT: [[SEL:%.*]] = phi i32* [ [[B]], [[ENTRY:%.*]] ], [ [[A]], [[IF_THEN]] ] ; IS__TUNIT____-NEXT: [[SEL:%.*]] = phi i32* [ [[B]], [[ENTRY:%.*]] ], [ [[A]], [[IF_THEN]] ]
; IS__TUNIT____-NEXT: ret i32* [[SEL]] ; IS__TUNIT____-NEXT: ret i32* [[SEL]]
; ;
; IS__CGSCC____: Function Attrs: nofree noinline nosync nounwind readnone uwtable ; IS__CGSCC_OPM: Function Attrs: nofree noinline nosync nounwind readnone uwtable
; IS__CGSCC____-LABEL: define {{[^@]+}}@rt2 ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@rt2
; IS__CGSCC____-SAME: (i32* nofree readnone [[A:%.*]], i32* nofree readnone "no-capture-maybe-returned" [[B:%.*]]) #[[ATTR2]] { ; IS__CGSCC_OPM-SAME: (i32* nofree readnone [[A:%.*]], i32* nofree readnone "no-capture-maybe-returned" [[B:%.*]]) #[[ATTR2]] {
; IS__CGSCC____-NEXT: entry: ; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC____-NEXT: [[CMP:%.*]] = icmp eq i32* [[A]], null ; IS__CGSCC_OPM-NEXT: [[CMP:%.*]] = icmp eq i32* [[A]], null
; IS__CGSCC____-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_END:%.*]] ; IS__CGSCC_OPM-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
; IS__CGSCC____: if.then: ; IS__CGSCC_OPM: if.then:
; IS__CGSCC____-NEXT: [[CALL:%.*]] = call i32* @rt2_helper(i32* noalias nofree readnone [[A]]) #[[ATTR7]] ; IS__CGSCC_OPM-NEXT: [[CALL:%.*]] = call i32* @rt2_helper(i32* noalias nofree readnone [[A]]) #[[ATTR12:[0-9]+]]
; IS__CGSCC____-NEXT: br label [[IF_END]] ; IS__CGSCC_OPM-NEXT: br label [[IF_END]]
; IS__CGSCC____: if.end: ; IS__CGSCC_OPM: if.end:
; IS__CGSCC____-NEXT: [[SEL:%.*]] = phi i32* [ [[B]], [[ENTRY:%.*]] ], [ [[A]], [[IF_THEN]] ] ; IS__CGSCC_OPM-NEXT: [[SEL:%.*]] = phi i32* [ [[B]], [[ENTRY:%.*]] ], [ [[A]], [[IF_THEN]] ]
; IS__CGSCC____-NEXT: ret i32* [[SEL]] ; IS__CGSCC_OPM-NEXT: ret i32* [[SEL]]
;
; IS__CGSCC_NPM: Function Attrs: nofree noinline nosync nounwind readnone uwtable
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@rt2
; IS__CGSCC_NPM-SAME: (i32* nofree readnone [[A:%.*]], i32* nofree readnone "no-capture-maybe-returned" [[B:%.*]]) #[[ATTR2]] {
; IS__CGSCC_NPM-NEXT: entry:
; IS__CGSCC_NPM-NEXT: [[CMP:%.*]] = icmp eq i32* [[A]], null
; IS__CGSCC_NPM-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
; IS__CGSCC_NPM: if.then:
; IS__CGSCC_NPM-NEXT: [[CALL:%.*]] = call i32* @rt2_helper(i32* noalias nofree readnone [[A]]) #[[ATTR9]]
; IS__CGSCC_NPM-NEXT: br label [[IF_END]]
; IS__CGSCC_NPM: if.end:
; IS__CGSCC_NPM-NEXT: [[SEL:%.*]] = phi i32* [ [[B]], [[ENTRY:%.*]] ], [ [[A]], [[IF_THEN]] ]
; IS__CGSCC_NPM-NEXT: ret i32* [[SEL]]
; ;
entry: entry:
%cmp = icmp eq i32* %a, null %cmp = icmp eq i32* %a, null
br i1 %cmp, label %if.then, label %if.end br i1 %cmp, label %if.then, label %if.end
if.then: if.then:
%call = call i32* @rt2_helper(i32* %a) %call = call i32* @rt2_helper(i32* %a)
br label %if.end br label %if.end
if.end: if.end:
%sel = phi i32* [ %b, %entry], [%call, %if.then] %sel = phi i32* [ %b, %entry], [%call, %if.then]
ret i32* %sel ret i32* %sel
} }
; TEST another SCC test ; TEST another SCC test
; ;
define i32* @rt3_helper(i32* %a, i32* %b) #0 { define i32* @rt3_helper(i32* %a, i32* %b) #0 {
; IS__TUNIT____: Function Attrs: nofree noinline nosync nounwind readnone uwtable ; IS__TUNIT____: Function Attrs: nofree noinline nosync nounwind readnone uwtable
; IS__TUNIT____-LABEL: define {{[^@]+}}@rt3_helper ; IS__TUNIT____-LABEL: define {{[^@]+}}@rt3_helper
; IS__TUNIT____-SAME: (i32* nocapture nofree readnone [[A:%.*]], i32* nofree readnone returned "no-capture-maybe-returned" [[B:%.*]]) #[[ATTR1]] { ; IS__TUNIT____-SAME: (i32* nocapture nofree readnone [[A:%.*]], i32* nofree readnone returned "no-capture-maybe-returned" [[B:%.*]]) #[[ATTR1]] {
; IS__TUNIT____-NEXT: entry: ; IS__TUNIT____-NEXT: entry:
; IS__TUNIT____-NEXT: [[CALL:%.*]] = call i32* @rt3(i32* noalias nocapture nofree readnone [[A]], i32* noalias nofree readnone "no-capture-maybe-returned" [[B]]) #[[ATTR6]] ; IS__TUNIT____-NEXT: [[CALL:%.*]] = call i32* @rt3(i32* noalias nocapture nofree readnone [[A]], i32* noalias nofree readnone "no-capture-maybe-returned" [[B]]) #[[ATTR9]]
; IS__TUNIT____-NEXT: ret i32* [[B]] ; IS__TUNIT____-NEXT: ret i32* [[B]]
; ;
; IS__CGSCC____: Function Attrs: nofree noinline nosync nounwind readnone uwtable ; IS__CGSCC_OPM: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable
; IS__CGSCC____-LABEL: define {{[^@]+}}@rt3_helper ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@rt3_helper
; IS__CGSCC____-SAME: (i32* nocapture nofree readnone [[A:%.*]], i32* nofree readnone returned "no-capture-maybe-returned" [[B:%.*]]) #[[ATTR2]] { ; IS__CGSCC_OPM-SAME: (i32* nocapture nofree readnone [[A:%.*]], i32* nofree readnone returned "no-capture-maybe-returned" [[B:%.*]]) #[[ATTR4]] {
; IS__CGSCC____-NEXT: entry: ; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC____-NEXT: [[CALL:%.*]] = call i32* @rt3(i32* noalias nocapture nofree readnone [[A]], i32* noalias nofree readnone "no-capture-maybe-returned" [[B]]) #[[ATTR7]] ; IS__CGSCC_OPM-NEXT: [[CALL:%.*]] = call i32* @rt3(i32* noalias nocapture nofree readnone [[A]], i32* noalias nofree readnone "no-capture-maybe-returned" [[B]]) #[[ATTR10]]
; IS__CGSCC____-NEXT: ret i32* [[B]] ; IS__CGSCC_OPM-NEXT: ret i32* [[B]]
;
; IS__CGSCC_NPM: Function Attrs: nofree noinline nosync nounwind readnone uwtable
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@rt3_helper
; IS__CGSCC_NPM-SAME: (i32* nocapture nofree readnone [[A:%.*]], i32* nofree readnone returned "no-capture-maybe-returned" [[B:%.*]]) #[[ATTR2]] {
; IS__CGSCC_NPM-NEXT: entry:
; IS__CGSCC_NPM-NEXT: [[CALL:%.*]] = call i32* @rt3(i32* noalias nocapture nofree readnone [[A]], i32* noalias nofree readnone "no-capture-maybe-returned" [[B]]) #[[ATTR9]]
; IS__CGSCC_NPM-NEXT: ret i32* [[B]]
; ;
entry: entry:
%call = call i32* @rt3(i32* %a, i32* %b) %call = call i32* @rt3(i32* %a, i32* %b)
ret i32* %call ret i32* %call
} }
define i32* @rt3(i32* %a, i32 *%b) #0 { define i32* @rt3(i32* %a, i32 *%b) #0 {
; IS__TUNIT____: Function Attrs: nofree noinline nosync nounwind readnone uwtable ; IS__TUNIT____: Function Attrs: nofree noinline nosync nounwind readnone uwtable
; IS__TUNIT____-LABEL: define {{[^@]+}}@rt3 ; IS__TUNIT____-LABEL: define {{[^@]+}}@rt3
; IS__TUNIT____-SAME: (i32* nocapture nofree readnone [[A:%.*]], i32* nofree readnone returned "no-capture-maybe-returned" [[B:%.*]]) #[[ATTR1]] { ; IS__TUNIT____-SAME: (i32* nocapture nofree readnone [[A:%.*]], i32* nofree readnone returned "no-capture-maybe-returned" [[B:%.*]]) #[[ATTR1]] {
; IS__TUNIT____-NEXT: entry: ; IS__TUNIT____-NEXT: entry:
; IS__TUNIT____-NEXT: [[CMP:%.*]] = icmp eq i32* [[A]], null ; IS__TUNIT____-NEXT: [[CMP:%.*]] = icmp eq i32* [[A]], null
; IS__TUNIT____-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_END:%.*]] ; IS__TUNIT____-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
; IS__TUNIT____: if.then: ; IS__TUNIT____: if.then:
; IS__TUNIT____-NEXT: [[CALL:%.*]] = call i32* @rt3_helper(i32* noalias nocapture nofree readnone [[A]], i32* noalias nofree readnone "no-capture-maybe-returned" [[B]]) #[[ATTR6]] ; IS__TUNIT____-NEXT: [[CALL:%.*]] = call i32* @rt3_helper(i32* noalias nocapture nofree readnone [[A]], i32* noalias nofree readnone "no-capture-maybe-returned" [[B]]) #[[ATTR9]]
; IS__TUNIT____-NEXT: br label [[IF_END]] ; IS__TUNIT____-NEXT: br label [[IF_END]]
; IS__TUNIT____: if.end: ; IS__TUNIT____: if.end:
; IS__TUNIT____-NEXT: [[SEL:%.*]] = phi i32* [ [[B]], [[ENTRY:%.*]] ], [ [[B]], [[IF_THEN]] ] ; IS__TUNIT____-NEXT: [[SEL:%.*]] = phi i32* [ [[B]], [[ENTRY:%.*]] ], [ [[B]], [[IF_THEN]] ]
; IS__TUNIT____-NEXT: ret i32* [[B]] ; IS__TUNIT____-NEXT: ret i32* [[B]]
; ;
; IS__CGSCC____: Function Attrs: nofree noinline nosync nounwind readnone uwtable ; IS__CGSCC_OPM: Function Attrs: nofree noinline nosync nounwind readnone uwtable
; IS__CGSCC____-LABEL: define {{[^@]+}}@rt3 ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@rt3
; IS__CGSCC____-SAME: (i32* nocapture nofree readnone [[A:%.*]], i32* nofree readnone returned "no-capture-maybe-returned" [[B:%.*]]) #[[ATTR2]] { ; IS__CGSCC_OPM-SAME: (i32* nocapture nofree readnone [[A:%.*]], i32* nofree readnone returned "no-capture-maybe-returned" [[B:%.*]]) #[[ATTR2]] {
; IS__CGSCC____-NEXT: entry: ; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC____-NEXT: [[CMP:%.*]] = icmp eq i32* [[A]], null ; IS__CGSCC_OPM-NEXT: [[CMP:%.*]] = icmp eq i32* [[A]], null
; IS__CGSCC____-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_END:%.*]] ; IS__CGSCC_OPM-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
; IS__CGSCC____: if.then: ; IS__CGSCC_OPM: if.then:
; IS__CGSCC____-NEXT: [[CALL:%.*]] = call i32* @rt3_helper(i32* noalias nocapture nofree readnone [[A]], i32* noalias nofree readnone "no-capture-maybe-returned" [[B]]) #[[ATTR7]] ; IS__CGSCC_OPM-NEXT: [[CALL:%.*]] = call i32* @rt3_helper(i32* noalias nocapture nofree readnone [[A]], i32* noalias nofree readnone "no-capture-maybe-returned" [[B]]) #[[ATTR12]]
; IS__CGSCC____-NEXT: br label [[IF_END]] ; IS__CGSCC_OPM-NEXT: br label [[IF_END]]
; IS__CGSCC____: if.end: ; IS__CGSCC_OPM: if.end:
; IS__CGSCC____-NEXT: [[SEL:%.*]] = phi i32* [ [[B]], [[ENTRY:%.*]] ], [ [[B]], [[IF_THEN]] ] ; IS__CGSCC_OPM-NEXT: [[SEL:%.*]] = phi i32* [ [[B]], [[ENTRY:%.*]] ], [ [[B]], [[IF_THEN]] ]
; IS__CGSCC____-NEXT: ret i32* [[B]] ; IS__CGSCC_OPM-NEXT: ret i32* [[B]]
;
; IS__CGSCC_NPM: Function Attrs: nofree noinline nosync nounwind readnone uwtable
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@rt3
; IS__CGSCC_NPM-SAME: (i32* nocapture nofree readnone [[A:%.*]], i32* nofree readnone returned "no-capture-maybe-returned" [[B:%.*]]) #[[ATTR2]] {
; IS__CGSCC_NPM-NEXT: entry:
; IS__CGSCC_NPM-NEXT: [[CMP:%.*]] = icmp eq i32* [[A]], null
; IS__CGSCC_NPM-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
; IS__CGSCC_NPM: if.then:
; IS__CGSCC_NPM-NEXT: [[CALL:%.*]] = call i32* @rt3_helper(i32* noalias nocapture nofree readnone [[A]], i32* noalias nofree readnone "no-capture-maybe-returned" [[B]]) #[[ATTR9]]
; IS__CGSCC_NPM-NEXT: br label [[IF_END]]
; IS__CGSCC_NPM: if.end:
; IS__CGSCC_NPM-NEXT: [[SEL:%.*]] = phi i32* [ [[B]], [[ENTRY:%.*]] ], [ [[B]], [[IF_THEN]] ]
; IS__CGSCC_NPM-NEXT: ret i32* [[B]]
; ;
entry: entry:
%cmp = icmp eq i32* %a, null %cmp = icmp eq i32* %a, null
br i1 %cmp, label %if.then, label %if.end br i1 %cmp, label %if.then, label %if.end
if.then: if.then:
%call = call i32* @rt3_helper(i32* %a, i32* %b) %call = call i32* @rt3_helper(i32* %a, i32* %b)
br label %if.end br label %if.end
Show All 10 Lines
; int* calls_unknown_fn(int *r) { ; int* calls_unknown_fn(int *r) {
; unknown_fn(&calls_unknown_fn); ; unknown_fn(&calls_unknown_fn);
; return r; ; return r;
; } ; }
; ;
declare void @unknown_fn(i32* (i32*)*) #0 declare void @unknown_fn(i32* (i32*)*) #0
define i32* @calls_unknown_fn(i32* %r) #0 { define i32* @calls_unknown_fn(i32* %r) #0 {
; IS__TUNIT____: Function Attrs: noinline nounwind uwtable ; NOT_CGSCC_OPM: Function Attrs: noinline nounwind uwtable
; IS__TUNIT____-LABEL: define {{[^@]+}}@calls_unknown_fn ; NOT_CGSCC_OPM-LABEL: define {{[^@]+}}@calls_unknown_fn
; IS__TUNIT____-SAME: (i32* nofree readnone returned "no-capture-maybe-returned" [[R:%.*]]) #[[ATTR3:[0-9]+]] { ; NOT_CGSCC_OPM-SAME: (i32* nofree readnone returned "no-capture-maybe-returned" [[R:%.*]]) #[[ATTR4:[0-9]+]] {
; IS__TUNIT____-NEXT: tail call void @unknown_fn(i32* (i32*)* noundef nonnull @calls_unknown_fn) #[[ATTR8:[0-9]+]] ; NOT_CGSCC_OPM-NEXT: tail call void @unknown_fn(i32* (i32*)* noundef nonnull @calls_unknown_fn) #[[ATTR11:[0-9]+]]
; IS__TUNIT____-NEXT: ret i32* [[R]] ; NOT_CGSCC_OPM-NEXT: ret i32* [[R]]
; ;
; IS__CGSCC____: Function Attrs: noinline nounwind uwtable ; IS__CGSCC_OPM: Function Attrs: noinline nounwind uwtable
; IS__CGSCC____-LABEL: define {{[^@]+}}@calls_unknown_fn ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@calls_unknown_fn
; IS__CGSCC____-SAME: (i32* nofree readnone returned "no-capture-maybe-returned" [[R:%.*]]) #[[ATTR4:[0-9]+]] { ; IS__CGSCC_OPM-SAME: (i32* nofree readnone returned "no-capture-maybe-returned" [[R:%.*]]) #[[ATTR5:[0-9]+]] {
; IS__CGSCC____-NEXT: tail call void @unknown_fn(i32* (i32*)* noundef nonnull @calls_unknown_fn) #[[ATTR9:[0-9]+]] ; IS__CGSCC_OPM-NEXT: tail call void @unknown_fn(i32* (i32*)* noundef nonnull @calls_unknown_fn) #[[ATTR13:[0-9]+]]
; IS__CGSCC____-NEXT: ret i32* [[R]] ; IS__CGSCC_OPM-NEXT: ret i32* [[R]]
; ;
tail call void @unknown_fn(i32* (i32*)* nonnull @calls_unknown_fn) tail call void @unknown_fn(i32* (i32*)* nonnull @calls_unknown_fn)
ret i32* %r ret i32* %r
} }
; TEST call to a function that might be redifined at link time ; TEST call to a function that might be redifined at link time
; ;
; int *maybe_redefined_fn(int *r) { ; int *maybe_redefined_fn(int *r) {
; return r; ; return r;
; } ; }
; ;
; int *calls_maybe_redefined_fn(int *r) { ; int *calls_maybe_redefined_fn(int *r) {
; maybe_redefined_fn(r); ; maybe_redefined_fn(r);
; return r; ; return r;
; } ; }
; ;
; Verify the maybe-redefined function is not annotated: ; Verify the maybe-redefined function is not annotated:
; ;
define linkonce_odr i32* @maybe_redefined_fn(i32* %r) #0 { define linkonce_odr i32* @maybe_redefined_fn(i32* %r) #0 {
; IS__TUNIT____: Function Attrs: noinline nounwind uwtable ; NOT_CGSCC_OPM: Function Attrs: noinline nounwind uwtable
; IS__TUNIT____-LABEL: define {{[^@]+}}@maybe_redefined_fn ; NOT_CGSCC_OPM-LABEL: define {{[^@]+}}@maybe_redefined_fn
; IS__TUNIT____-SAME: (i32* [[R:%.*]]) #[[ATTR3]] { ; NOT_CGSCC_OPM-SAME: (i32* [[R:%.*]]) #[[ATTR4]] {
; IS__TUNIT____-NEXT: entry: ; NOT_CGSCC_OPM-NEXT: entry:
; IS__TUNIT____-NEXT: ret i32* [[R]] ; NOT_CGSCC_OPM-NEXT: ret i32* [[R]]
; ;
; IS__CGSCC____: Function Attrs: noinline nounwind uwtable ; IS__CGSCC_OPM: Function Attrs: noinline nounwind uwtable
; IS__CGSCC____-LABEL: define {{[^@]+}}@maybe_redefined_fn ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@maybe_redefined_fn
; IS__CGSCC____-SAME: (i32* [[R:%.*]]) #[[ATTR4]] { ; IS__CGSCC_OPM-SAME: (i32* [[R:%.*]]) #[[ATTR5]] {
; IS__CGSCC____-NEXT: entry: ; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC____-NEXT: ret i32* [[R]] ; IS__CGSCC_OPM-NEXT: ret i32* [[R]]
; ;
entry: entry:
ret i32* %r ret i32* %r
} }
define i32* @calls_maybe_redefined_fn(i32* %r) #0 { define i32* @calls_maybe_redefined_fn(i32* %r) #0 {
; IS__TUNIT____: Function Attrs: noinline nounwind uwtable ; NOT_CGSCC_OPM: Function Attrs: noinline norecurse nounwind uwtable
; IS__TUNIT____-LABEL: define {{[^@]+}}@calls_maybe_redefined_fn ; NOT_CGSCC_OPM-LABEL: define {{[^@]+}}@calls_maybe_redefined_fn
; IS__TUNIT____-SAME: (i32* returned [[R:%.*]]) #[[ATTR3]] { ; NOT_CGSCC_OPM-SAME: (i32* returned [[R:%.*]]) #[[ATTR5:[0-9]+]] {
; IS__TUNIT____-NEXT: entry: ; NOT_CGSCC_OPM-NEXT: entry:
; IS__TUNIT____-NEXT: [[CALL:%.*]] = call i32* @maybe_redefined_fn(i32* [[R]]) #[[ATTR8]] ; NOT_CGSCC_OPM-NEXT: [[CALL:%.*]] = call i32* @maybe_redefined_fn(i32* [[R]]) #[[ATTR11]]
; IS__TUNIT____-NEXT: ret i32* [[R]] ; NOT_CGSCC_OPM-NEXT: ret i32* [[R]]
; ;
; IS__CGSCC____: Function Attrs: noinline nounwind uwtable ; IS__CGSCC_OPM: Function Attrs: noinline norecurse nounwind uwtable
; IS__CGSCC____-LABEL: define {{[^@]+}}@calls_maybe_redefined_fn ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@calls_maybe_redefined_fn
; IS__CGSCC____-SAME: (i32* returned [[R:%.*]]) #[[ATTR4]] { ; IS__CGSCC_OPM-SAME: (i32* returned [[R:%.*]]) #[[ATTR6:[0-9]+]] {
; IS__CGSCC____-NEXT: entry: ; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC____-NEXT: [[CALL:%.*]] = call i32* @maybe_redefined_fn(i32* [[R]]) #[[ATTR9]] ; IS__CGSCC_OPM-NEXT: [[CALL:%.*]] = call i32* @maybe_redefined_fn(i32* [[R]]) #[[ATTR13]]
; IS__CGSCC____-NEXT: ret i32* [[R]] ; IS__CGSCC_OPM-NEXT: ret i32* [[R]]
; ;
entry: entry:
%call = call i32* @maybe_redefined_fn(i32* %r) %call = call i32* @maybe_redefined_fn(i32* %r)
ret i32* %r ret i32* %r
} }
; TEST return call to a function that might be redifined at link time ; TEST return call to a function that might be redifined at link time
; ;
; int *maybe_redefined_fn2(int *r) { ; int *maybe_redefined_fn2(int *r) {
; return r; ; return r;
; } ; }
; ;
; int *calls_maybe_redefined_fn2(int *r) { ; int *calls_maybe_redefined_fn2(int *r) {
; return maybe_redefined_fn2(r); ; return maybe_redefined_fn2(r);
; } ; }
; ;
; Verify the maybe-redefined function is not annotated: ; Verify the maybe-redefined function is not annotated:
; ;
define linkonce_odr i32* @maybe_redefined_fn2(i32* %r) #0 { define linkonce_odr i32* @maybe_redefined_fn2(i32* %r) #0 {
; IS__TUNIT____: Function Attrs: noinline nounwind uwtable ; NOT_CGSCC_OPM: Function Attrs: noinline nounwind uwtable
; IS__TUNIT____-LABEL: define {{[^@]+}}@maybe_redefined_fn2 ; NOT_CGSCC_OPM-LABEL: define {{[^@]+}}@maybe_redefined_fn2
; IS__TUNIT____-SAME: (i32* [[R:%.*]]) #[[ATTR3]] { ; NOT_CGSCC_OPM-SAME: (i32* [[R:%.*]]) #[[ATTR4]] {
; IS__TUNIT____-NEXT: entry: ; NOT_CGSCC_OPM-NEXT: entry:
; IS__TUNIT____-NEXT: ret i32* [[R]] ; NOT_CGSCC_OPM-NEXT: ret i32* [[R]]
; ;
; IS__CGSCC____: Function Attrs: noinline nounwind uwtable ; IS__CGSCC_OPM: Function Attrs: noinline nounwind uwtable
; IS__CGSCC____-LABEL: define {{[^@]+}}@maybe_redefined_fn2 ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@maybe_redefined_fn2
; IS__CGSCC____-SAME: (i32* [[R:%.*]]) #[[ATTR4]] { ; IS__CGSCC_OPM-SAME: (i32* [[R:%.*]]) #[[ATTR5]] {
; IS__CGSCC____-NEXT: entry: ; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC____-NEXT: ret i32* [[R]] ; IS__CGSCC_OPM-NEXT: ret i32* [[R]]
; ;
entry: entry:
ret i32* %r ret i32* %r
} }
define i32* @calls_maybe_redefined_fn2(i32* %r) #0 { define i32* @calls_maybe_redefined_fn2(i32* %r) #0 {
; IS__TUNIT____: Function Attrs: noinline nounwind uwtable ; NOT_CGSCC_OPM: Function Attrs: noinline norecurse nounwind uwtable
; IS__TUNIT____-LABEL: define {{[^@]+}}@calls_maybe_redefined_fn2 ; NOT_CGSCC_OPM-LABEL: define {{[^@]+}}@calls_maybe_redefined_fn2
; IS__TUNIT____-SAME: (i32* [[R:%.*]]) #[[ATTR3]] { ; NOT_CGSCC_OPM-SAME: (i32* [[R:%.*]]) #[[ATTR5]] {
; IS__TUNIT____-NEXT: entry: ; NOT_CGSCC_OPM-NEXT: entry:
; IS__TUNIT____-NEXT: [[CALL:%.*]] = call i32* @maybe_redefined_fn2(i32* [[R]]) #[[ATTR8]] ; NOT_CGSCC_OPM-NEXT: [[CALL:%.*]] = call i32* @maybe_redefined_fn2(i32* [[R]]) #[[ATTR11]]
; IS__TUNIT____-NEXT: ret i32* [[CALL]] ; NOT_CGSCC_OPM-NEXT: ret i32* [[CALL]]
; ;
; IS__CGSCC____: Function Attrs: noinline nounwind uwtable ; IS__CGSCC_OPM: Function Attrs: noinline norecurse nounwind uwtable
; IS__CGSCC____-LABEL: define {{[^@]+}}@calls_maybe_redefined_fn2 ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@calls_maybe_redefined_fn2
; IS__CGSCC____-SAME: (i32* [[R:%.*]]) #[[ATTR4]] { ; IS__CGSCC_OPM-SAME: (i32* [[R:%.*]]) #[[ATTR6]] {
; IS__CGSCC____-NEXT: entry: ; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC____-NEXT: [[CALL:%.*]] = call i32* @maybe_redefined_fn2(i32* [[R]]) #[[ATTR9]] ; IS__CGSCC_OPM-NEXT: [[CALL:%.*]] = call i32* @maybe_redefined_fn2(i32* [[R]]) #[[ATTR13]]
; IS__CGSCC____-NEXT: ret i32* [[CALL]] ; IS__CGSCC_OPM-NEXT: ret i32* [[CALL]]
; ;
entry: entry:
%call = call i32* @maybe_redefined_fn2(i32* %r) %call = call i32* @maybe_redefined_fn2(i32* %r)
ret i32* %call ret i32* %call
} }
; TEST returned argument goes through select and phi ; TEST returned argument goes through select and phi
; ;
; double select_and_phi(double b) { ; double select_and_phi(double b) {
; double x = b; ; double x = b;
; if (b > 0) ; if (b > 0)
; x = b; ; x = b;
; return b == 0? b : x; ; return b == 0? b : x;
; } ; }
; ;
define double @select_and_phi(double %b) #0 { define double @select_and_phi(double %b) #0 {
; IS__TUNIT____: Function Attrs: nofree noinline nosync nounwind readnone uwtable willreturn ; CHECK: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@select_and_phi ; CHECK-LABEL: define {{[^@]+}}@select_and_phi
; IS__TUNIT____-SAME: (double returned [[B:%.*]]) #[[ATTR0]] { ; CHECK-SAME: (double returned [[B:%.*]]) #[[ATTR0]] {
; IS__TUNIT____-NEXT: entry: ; CHECK-NEXT: entry:
; IS__TUNIT____-NEXT: [[CMP:%.*]] = fcmp ogt double [[B]], 0.000000e+00 ; CHECK-NEXT: [[CMP:%.*]] = fcmp ogt double [[B]], 0.000000e+00
; IS__TUNIT____-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_END:%.*]] ; CHECK-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
; IS__TUNIT____: if.then: ; CHECK: if.then:
; IS__TUNIT____-NEXT: br label [[IF_END]] ; CHECK-NEXT: br label [[IF_END]]
; IS__TUNIT____: if.end: ; CHECK: if.end:
; IS__TUNIT____-NEXT: ret double [[B]] ; CHECK-NEXT: ret double [[B]]
;
; IS__CGSCC____: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@select_and_phi
; IS__CGSCC____-SAME: (double returned [[B:%.*]]) #[[ATTR0]] {
; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: [[CMP:%.*]] = fcmp ogt double [[B]], 0.000000e+00
; IS__CGSCC____-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
; IS__CGSCC____: if.then:
; IS__CGSCC____-NEXT: br label [[IF_END]]
; IS__CGSCC____: if.end:
; IS__CGSCC____-NEXT: ret double [[B]]
; ;
entry: entry:
%cmp = fcmp ogt double %b, 0.000000e+00 %cmp = fcmp ogt double %b, 0.000000e+00
br i1 %cmp, label %if.then, label %if.end br i1 %cmp, label %if.then, label %if.end
if.then: ; preds = %entry if.then: ; preds = %entry
br label %if.end br label %if.end
Show All 18 Lines
; IS__TUNIT____: Function Attrs: nofree noinline nosync nounwind readnone uwtable ; IS__TUNIT____: Function Attrs: nofree noinline nosync nounwind readnone uwtable
; IS__TUNIT____-LABEL: define {{[^@]+}}@recursion_select_and_phi ; IS__TUNIT____-LABEL: define {{[^@]+}}@recursion_select_and_phi
; IS__TUNIT____-SAME: (i32 [[A:%.*]], double returned [[B:%.*]]) #[[ATTR1]] { ; IS__TUNIT____-SAME: (i32 [[A:%.*]], double returned [[B:%.*]]) #[[ATTR1]] {
; IS__TUNIT____-NEXT: entry: ; IS__TUNIT____-NEXT: entry:
; IS__TUNIT____-NEXT: [[DEC:%.*]] = add nsw i32 [[A]], -1 ; IS__TUNIT____-NEXT: [[DEC:%.*]] = add nsw i32 [[A]], -1
; IS__TUNIT____-NEXT: [[CMP:%.*]] = icmp sgt i32 [[A]], 0 ; IS__TUNIT____-NEXT: [[CMP:%.*]] = icmp sgt i32 [[A]], 0
; IS__TUNIT____-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_END:%.*]] ; IS__TUNIT____-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
; IS__TUNIT____: if.then: ; IS__TUNIT____: if.then:
; IS__TUNIT____-NEXT: [[CALL:%.*]] = call double @recursion_select_and_phi(i32 [[DEC]], double [[B]]) #[[ATTR6]] ; IS__TUNIT____-NEXT: [[CALL:%.*]] = call double @recursion_select_and_phi(i32 [[DEC]], double [[B]]) #[[ATTR9]]
; IS__TUNIT____-NEXT: br label [[IF_END]] ; IS__TUNIT____-NEXT: br label [[IF_END]]
; IS__TUNIT____: if.end: ; IS__TUNIT____: if.end:
; IS__TUNIT____-NEXT: ret double [[B]] ; IS__TUNIT____-NEXT: ret double [[B]]
; ;
; IS__CGSCC____: Function Attrs: nofree noinline nosync nounwind readnone uwtable ; IS__CGSCC_OPM: Function Attrs: nofree noinline nosync nounwind readnone uwtable
; IS__CGSCC____-LABEL: define {{[^@]+}}@recursion_select_and_phi ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@recursion_select_and_phi
; IS__CGSCC____-SAME: (i32 [[A:%.*]], double returned [[B:%.*]]) #[[ATTR2]] { ; IS__CGSCC_OPM-SAME: (i32 [[A:%.*]], double returned [[B:%.*]]) #[[ATTR2]] {
; IS__CGSCC____-NEXT: entry: ; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC____-NEXT: [[DEC:%.*]] = add nsw i32 [[A]], -1 ; IS__CGSCC_OPM-NEXT: [[DEC:%.*]] = add nsw i32 [[A]], -1
; IS__CGSCC____-NEXT: [[CMP:%.*]] = icmp sgt i32 [[A]], 0 ; IS__CGSCC_OPM-NEXT: [[CMP:%.*]] = icmp sgt i32 [[A]], 0
; IS__CGSCC____-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_END:%.*]] ; IS__CGSCC_OPM-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
; IS__CGSCC____: if.then: ; IS__CGSCC_OPM: if.then:
; IS__CGSCC____-NEXT: [[CALL:%.*]] = call double @recursion_select_and_phi(i32 [[DEC]], double [[B]]) #[[ATTR7]] ; IS__CGSCC_OPM-NEXT: [[CALL:%.*]] = call double @recursion_select_and_phi(i32 [[DEC]], double [[B]]) #[[ATTR10]]
; IS__CGSCC____-NEXT: br label [[IF_END]] ; IS__CGSCC_OPM-NEXT: br label [[IF_END]]
; IS__CGSCC____: if.end: ; IS__CGSCC_OPM: if.end:
; IS__CGSCC____-NEXT: ret double [[B]] ; IS__CGSCC_OPM-NEXT: ret double [[B]]
;
; IS__CGSCC_NPM: Function Attrs: nofree noinline nosync nounwind readnone uwtable
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@recursion_select_and_phi
; IS__CGSCC_NPM-SAME: (i32 [[A:%.*]], double returned [[B:%.*]]) #[[ATTR2]] {
; IS__CGSCC_NPM-NEXT: entry:
; IS__CGSCC_NPM-NEXT: [[DEC:%.*]] = add nsw i32 [[A]], -1
; IS__CGSCC_NPM-NEXT: [[CMP:%.*]] = icmp sgt i32 [[A]], 0
; IS__CGSCC_NPM-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
; IS__CGSCC_NPM: if.then:
; IS__CGSCC_NPM-NEXT: [[CALL:%.*]] = call double @recursion_select_and_phi(i32 [[DEC]], double [[B]]) #[[ATTR9]]
; IS__CGSCC_NPM-NEXT: br label [[IF_END]]
; IS__CGSCC_NPM: if.end:
; IS__CGSCC_NPM-NEXT: ret double [[B]]
; ;
entry: entry:
%dec = add nsw i32 %a, -1 %dec = add nsw i32 %a, -1
%cmp = icmp sgt i32 %a, 0 %cmp = icmp sgt i32 %a, 0
br i1 %cmp, label %if.then, label %if.end br i1 %cmp, label %if.then, label %if.end
if.then: ; preds = %entry if.then: ; preds = %entry
%call = call double @recursion_select_and_phi(i32 %dec, double %b) %call = call double @recursion_select_and_phi(i32 %dec, double %b)
Show All 9 Lines
; TEST returned argument goes through bitcasts ; TEST returned argument goes through bitcasts
; ;
; double* bitcast(int* b) { ; double* bitcast(int* b) {
; return (double*)b; ; return (double*)b;
; } ; }
; ;
define double* @bitcast(i32* %b) #0 { define double* @bitcast(i32* %b) #0 {
; IS__TUNIT____: Function Attrs: nofree noinline nosync nounwind readnone uwtable willreturn ; CHECK: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@bitcast ; CHECK-LABEL: define {{[^@]+}}@bitcast
; IS__TUNIT____-SAME: (i32* nofree readnone "no-capture-maybe-returned" [[B:%.*]]) #[[ATTR0]] { ; CHECK-SAME: (i32* nofree readnone "no-capture-maybe-returned" [[B:%.*]]) #[[ATTR0]] {
; IS__TUNIT____-NEXT: entry: ; CHECK-NEXT: entry:
; IS__TUNIT____-NEXT: [[BC0:%.*]] = bitcast i32* [[B]] to double* ; CHECK-NEXT: [[BC0:%.*]] = bitcast i32* [[B]] to double*
; IS__TUNIT____-NEXT: ret double* [[BC0]] ; CHECK-NEXT: ret double* [[BC0]]
;
; IS__CGSCC____: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@bitcast
; IS__CGSCC____-SAME: (i32* nofree readnone "no-capture-maybe-returned" [[B:%.*]]) #[[ATTR0]] {
; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: [[BC0:%.*]] = bitcast i32* [[B]] to double*
; IS__CGSCC____-NEXT: ret double* [[BC0]]
; ;
entry: entry:
%bc0 = bitcast i32* %b to double* %bc0 = bitcast i32* %b to double*
ret double* %bc0 ret double* %bc0
} }
; TEST returned argument goes through select and phi interleaved with bitcasts ; TEST returned argument goes through select and phi interleaved with bitcasts
; ;
; double* bitcasts_select_and_phi(int* b) { ; double* bitcasts_select_and_phi(int* b) {
; double* x = b; ; double* x = b;
; if (b == 0) ; if (b == 0)
; x = b; ; x = b;
; return b != 0 ? b : x; ; return b != 0 ? b : x;
; } ; }
; ;
define double* @bitcasts_select_and_phi(i32* %b) #0 { define double* @bitcasts_select_and_phi(i32* %b) #0 {
; IS__TUNIT____: Function Attrs: nofree noinline nosync nounwind readnone uwtable willreturn ; CHECK: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@bitcasts_select_and_phi ; CHECK-LABEL: define {{[^@]+}}@bitcasts_select_and_phi
; IS__TUNIT____-SAME: (i32* nofree readnone [[B:%.*]]) #[[ATTR0]] { ; CHECK-SAME: (i32* nofree readnone [[B:%.*]]) #[[ATTR0]] {
; IS__TUNIT____-NEXT: entry: ; CHECK-NEXT: entry:
; IS__TUNIT____-NEXT: [[BC0:%.*]] = bitcast i32* [[B]] to double* ; CHECK-NEXT: [[BC0:%.*]] = bitcast i32* [[B]] to double*
; IS__TUNIT____-NEXT: [[CMP:%.*]] = icmp eq double* [[BC0]], null ; CHECK-NEXT: [[CMP:%.*]] = icmp eq double* [[BC0]], null
; IS__TUNIT____-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_END:%.*]] ; CHECK-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
; IS__TUNIT____: if.then: ; CHECK: if.then:
; IS__TUNIT____-NEXT: [[BC1:%.*]] = bitcast i32* [[B]] to double* ; CHECK-NEXT: [[BC1:%.*]] = bitcast i32* [[B]] to double*
; IS__TUNIT____-NEXT: br label [[IF_END]] ; CHECK-NEXT: br label [[IF_END]]
; IS__TUNIT____: if.end: ; CHECK: if.end:
; IS__TUNIT____-NEXT: [[PHI:%.*]] = phi double* [ [[BC1]], [[IF_THEN]] ], [ [[BC0]], [[ENTRY:%.*]] ] ; CHECK-NEXT: [[PHI:%.*]] = phi double* [ [[BC1]], [[IF_THEN]] ], [ [[BC0]], [[ENTRY:%.*]] ]
; IS__TUNIT____-NEXT: [[BC2:%.*]] = bitcast double* [[PHI]] to i8* ; CHECK-NEXT: [[BC2:%.*]] = bitcast double* [[PHI]] to i8*
; IS__TUNIT____-NEXT: [[BC3:%.*]] = bitcast i32* [[B]] to i8* ; CHECK-NEXT: [[BC3:%.*]] = bitcast i32* [[B]] to i8*
; IS__TUNIT____-NEXT: [[CMP2:%.*]] = icmp ne double* [[BC0]], null ; CHECK-NEXT: [[CMP2:%.*]] = icmp ne double* [[BC0]], null
; IS__TUNIT____-NEXT: [[SEL:%.*]] = select i1 [[CMP2]], i8* [[BC2]], i8* [[BC3]] ; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP2]], i8* [[BC2]], i8* [[BC3]]
; IS__TUNIT____-NEXT: [[BC4:%.*]] = bitcast i8* [[SEL]] to double* ; CHECK-NEXT: [[BC4:%.*]] = bitcast i8* [[SEL]] to double*
; IS__TUNIT____-NEXT: ret double* [[BC4]] ; CHECK-NEXT: ret double* [[BC4]]
;
; IS__CGSCC____: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@bitcasts_select_and_phi
; IS__CGSCC____-SAME: (i32* nofree readnone [[B:%.*]]) #[[ATTR0]] {
; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: [[BC0:%.*]] = bitcast i32* [[B]] to double*
; IS__CGSCC____-NEXT: [[CMP:%.*]] = icmp eq double* [[BC0]], null
; IS__CGSCC____-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
; IS__CGSCC____: if.then:
; IS__CGSCC____-NEXT: [[BC1:%.*]] = bitcast i32* [[B]] to double*
; IS__CGSCC____-NEXT: br label [[IF_END]]
; IS__CGSCC____: if.end:
; IS__CGSCC____-NEXT: [[PHI:%.*]] = phi double* [ [[BC1]], [[IF_THEN]] ], [ [[BC0]], [[ENTRY:%.*]] ]
; IS__CGSCC____-NEXT: [[BC2:%.*]] = bitcast double* [[PHI]] to i8*
; IS__CGSCC____-NEXT: [[BC3:%.*]] = bitcast i32* [[B]] to i8*
; IS__CGSCC____-NEXT: [[CMP2:%.*]] = icmp ne double* [[BC0]], null
; IS__CGSCC____-NEXT: [[SEL:%.*]] = select i1 [[CMP2]], i8* [[BC2]], i8* [[BC3]]
; IS__CGSCC____-NEXT: [[BC4:%.*]] = bitcast i8* [[SEL]] to double*
; IS__CGSCC____-NEXT: ret double* [[BC4]]
; ;
entry: entry:
%bc0 = bitcast i32* %b to double* %bc0 = bitcast i32* %b to double*
%cmp = icmp eq double* %bc0, null %cmp = icmp eq double* %bc0, null
br i1 %cmp, label %if.then, label %if.end br i1 %cmp, label %if.then, label %if.end
if.then: ; preds = %entry if.then: ; preds = %entry
%bc1 = bitcast i32* %b to double* %bc1 = bitcast i32* %b to double*
Show All 16 Lines
; if (b == 0) ; if (b == 0)
; return (double*)b; ; return (double*)b;
; if (b == 0) ; if (b == 0)
; return (double*)b; ; return (double*)b;
; /* return undef */ ; /* return undef */
; } ; }
; ;
define double* @ret_arg_arg_undef(i32* %b) #0 { define double* @ret_arg_arg_undef(i32* %b) #0 {
; IS__TUNIT____: Function Attrs: nofree noinline nosync nounwind readnone uwtable willreturn ; CHECK: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@ret_arg_arg_undef ; CHECK-LABEL: define {{[^@]+}}@ret_arg_arg_undef
; IS__TUNIT____-SAME: (i32* nofree readnone [[B:%.*]]) #[[ATTR0]] { ; CHECK-SAME: (i32* nofree readnone [[B:%.*]]) #[[ATTR0]] {
; IS__TUNIT____-NEXT: entry: ; CHECK-NEXT: entry:
; IS__TUNIT____-NEXT: [[BC0:%.*]] = bitcast i32* [[B]] to double* ; CHECK-NEXT: [[BC0:%.*]] = bitcast i32* [[B]] to double*
; IS__TUNIT____-NEXT: [[CMP:%.*]] = icmp eq double* [[BC0]], null ; CHECK-NEXT: [[CMP:%.*]] = icmp eq double* [[BC0]], null
; IS__TUNIT____-NEXT: br i1 [[CMP]], label [[RET_ARG0:%.*]], label [[IF_END:%.*]] ; CHECK-NEXT: br i1 [[CMP]], label [[RET_ARG0:%.*]], label [[IF_END:%.*]]
; IS__TUNIT____: ret_arg0: ; CHECK: ret_arg0:
; IS__TUNIT____-NEXT: [[BC1:%.*]] = bitcast i32* [[B]] to double* ; CHECK-NEXT: [[BC1:%.*]] = bitcast i32* [[B]] to double*
; IS__TUNIT____-NEXT: ret double* [[BC1]] ; CHECK-NEXT: ret double* [[BC1]]
; IS__TUNIT____: if.end: ; CHECK: if.end:
; IS__TUNIT____-NEXT: br i1 [[CMP]], label [[RET_ARG1:%.*]], label [[RET_UNDEF:%.*]] ; CHECK-NEXT: br i1 [[CMP]], label [[RET_ARG1:%.*]], label [[RET_UNDEF:%.*]]
; IS__TUNIT____: ret_arg1: ; CHECK: ret_arg1:
; IS__TUNIT____-NEXT: ret double* [[BC0]] ; CHECK-NEXT: ret double* [[BC0]]
; IS__TUNIT____: ret_undef: ; CHECK: ret_undef:
; IS__TUNIT____-NEXT: ret double* undef ; CHECK-NEXT: ret double* undef
;
; IS__CGSCC____: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@ret_arg_arg_undef
; IS__CGSCC____-SAME: (i32* nofree readnone [[B:%.*]]) #[[ATTR0]] {
; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: [[BC0:%.*]] = bitcast i32* [[B]] to double*
; IS__CGSCC____-NEXT: [[CMP:%.*]] = icmp eq double* [[BC0]], null
; IS__CGSCC____-NEXT: br i1 [[CMP]], label [[RET_ARG0:%.*]], label [[IF_END:%.*]]
; IS__CGSCC____: ret_arg0:
; IS__CGSCC____-NEXT: [[BC1:%.*]] = bitcast i32* [[B]] to double*
; IS__CGSCC____-NEXT: ret double* [[BC1]]
; IS__CGSCC____: if.end:
; IS__CGSCC____-NEXT: br i1 [[CMP]], label [[RET_ARG1:%.*]], label [[RET_UNDEF:%.*]]
; IS__CGSCC____: ret_arg1:
; IS__CGSCC____-NEXT: ret double* [[BC0]]
; IS__CGSCC____: ret_undef:
; IS__CGSCC____-NEXT: ret double* undef
; ;
entry: entry:
%bc0 = bitcast i32* %b to double* %bc0 = bitcast i32* %b to double*
%cmp = icmp eq double* %bc0, null %cmp = icmp eq double* %bc0, null
br i1 %cmp, label %ret_arg0, label %if.end br i1 %cmp, label %ret_arg0, label %if.end
ret_arg0: ret_arg0:
%bc1 = bitcast i32* %b to double* %bc1 = bitcast i32* %b to double*
Show All 16 Lines
; if (b == 0) ; if (b == 0)
; return (double*)b; ; return (double*)b;
; if (b == 0) ; if (b == 0)
; return (double*)b; ; return (double*)b;
; /* return undef */ ; /* return undef */
; } ; }
; ;
define double* @ret_undef_arg_arg(i32* %b) #0 { define double* @ret_undef_arg_arg(i32* %b) #0 {
; IS__TUNIT____: Function Attrs: nofree noinline nosync nounwind readnone uwtable willreturn ; CHECK: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@ret_undef_arg_arg ; CHECK-LABEL: define {{[^@]+}}@ret_undef_arg_arg
; IS__TUNIT____-SAME: (i32* nofree readnone [[B:%.*]]) #[[ATTR0]] { ; CHECK-SAME: (i32* nofree readnone [[B:%.*]]) #[[ATTR0]] {
; IS__TUNIT____-NEXT: entry: ; CHECK-NEXT: entry:
; IS__TUNIT____-NEXT: [[BC0:%.*]] = bitcast i32* [[B]] to double* ; CHECK-NEXT: [[BC0:%.*]] = bitcast i32* [[B]] to double*
; IS__TUNIT____-NEXT: [[CMP:%.*]] = icmp eq double* [[BC0]], null ; CHECK-NEXT: [[CMP:%.*]] = icmp eq double* [[BC0]], null
; IS__TUNIT____-NEXT: br i1 [[CMP]], label [[RET_UNDEF:%.*]], label [[IF_END:%.*]] ; CHECK-NEXT: br i1 [[CMP]], label [[RET_UNDEF:%.*]], label [[IF_END:%.*]]
; IS__TUNIT____: ret_undef: ; CHECK: ret_undef:
; IS__TUNIT____-NEXT: ret double* undef ; CHECK-NEXT: ret double* undef
; IS__TUNIT____: if.end: ; CHECK: if.end:
; IS__TUNIT____-NEXT: br i1 [[CMP]], label [[RET_ARG0:%.*]], label [[RET_ARG1:%.*]] ; CHECK-NEXT: br i1 [[CMP]], label [[RET_ARG0:%.*]], label [[RET_ARG1:%.*]]
; IS__TUNIT____: ret_arg0: ; CHECK: ret_arg0:
; IS__TUNIT____-NEXT: ret double* [[BC0]] ; CHECK-NEXT: ret double* [[BC0]]
; IS__TUNIT____: ret_arg1: ; CHECK: ret_arg1:
; IS__TUNIT____-NEXT: [[BC1:%.*]] = bitcast i32* [[B]] to double* ; CHECK-NEXT: [[BC1:%.*]] = bitcast i32* [[B]] to double*
; IS__TUNIT____-NEXT: ret double* [[BC1]] ; CHECK-NEXT: ret double* [[BC1]]
;
; IS__CGSCC____: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@ret_undef_arg_arg
; IS__CGSCC____-SAME: (i32* nofree readnone [[B:%.*]]) #[[ATTR0]] {
; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: [[BC0:%.*]] = bitcast i32* [[B]] to double*
; IS__CGSCC____-NEXT: [[CMP:%.*]] = icmp eq double* [[BC0]], null
; IS__CGSCC____-NEXT: br i1 [[CMP]], label [[RET_UNDEF:%.*]], label [[IF_END:%.*]]
; IS__CGSCC____: ret_undef:
; IS__CGSCC____-NEXT: ret double* undef
; IS__CGSCC____: if.end:
; IS__CGSCC____-NEXT: br i1 [[CMP]], label [[RET_ARG0:%.*]], label [[RET_ARG1:%.*]]
; IS__CGSCC____: ret_arg0:
; IS__CGSCC____-NEXT: ret double* [[BC0]]
; IS__CGSCC____: ret_arg1:
; IS__CGSCC____-NEXT: [[BC1:%.*]] = bitcast i32* [[B]] to double*
; IS__CGSCC____-NEXT: ret double* [[BC1]]
; ;
entry: entry:
%bc0 = bitcast i32* %b to double* %bc0 = bitcast i32* %b to double*
%cmp = icmp eq double* %bc0, null %cmp = icmp eq double* %bc0, null
br i1 %cmp, label %ret_undef, label %if.end br i1 %cmp, label %ret_undef, label %if.end
ret_undef: ret_undef:
ret double *undef ret double *undef
Show All 16 Lines
; if (b == 0) ; if (b == 0)
; /* return undef */ ; /* return undef */
; if (b == 0) ; if (b == 0)
; return (double*)b; ; return (double*)b;
; /* return undef */ ; /* return undef */
; } ; }
; ;
define double* @ret_undef_arg_undef(i32* %b) #0 { define double* @ret_undef_arg_undef(i32* %b) #0 {
; IS__TUNIT____: Function Attrs: nofree noinline nosync nounwind readnone uwtable willreturn ; CHECK: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@ret_undef_arg_undef ; CHECK-LABEL: define {{[^@]+}}@ret_undef_arg_undef
; IS__TUNIT____-SAME: (i32* nofree readnone [[B:%.*]]) #[[ATTR0]] { ; CHECK-SAME: (i32* nofree readnone [[B:%.*]]) #[[ATTR0]] {
; IS__TUNIT____-NEXT: entry: ; CHECK-NEXT: entry:
; IS__TUNIT____-NEXT: [[BC0:%.*]] = bitcast i32* [[B]] to double* ; CHECK-NEXT: [[BC0:%.*]] = bitcast i32* [[B]] to double*
; IS__TUNIT____-NEXT: [[CMP:%.*]] = icmp eq double* [[BC0]], null ; CHECK-NEXT: [[CMP:%.*]] = icmp eq double* [[BC0]], null
; IS__TUNIT____-NEXT: br i1 [[CMP]], label [[RET_UNDEF0:%.*]], label [[IF_END:%.*]] ; CHECK-NEXT: br i1 [[CMP]], label [[RET_UNDEF0:%.*]], label [[IF_END:%.*]]
; IS__TUNIT____: ret_undef0: ; CHECK: ret_undef0:
; IS__TUNIT____-NEXT: ret double* undef ; CHECK-NEXT: ret double* undef
; IS__TUNIT____: if.end: ; CHECK: if.end:
; IS__TUNIT____-NEXT: br i1 [[CMP]], label [[RET_ARG:%.*]], label [[RET_UNDEF1:%.*]] ; CHECK-NEXT: br i1 [[CMP]], label [[RET_ARG:%.*]], label [[RET_UNDEF1:%.*]]
; IS__TUNIT____: ret_arg: ; CHECK: ret_arg:
; IS__TUNIT____-NEXT: ret double* [[BC0]] ; CHECK-NEXT: ret double* [[BC0]]
; IS__TUNIT____: ret_undef1: ; CHECK: ret_undef1:
; IS__TUNIT____-NEXT: ret double* undef ; CHECK-NEXT: ret double* undef
;
; IS__CGSCC____: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@ret_undef_arg_undef
; IS__CGSCC____-SAME: (i32* nofree readnone [[B:%.*]]) #[[ATTR0]] {
; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: [[BC0:%.*]] = bitcast i32* [[B]] to double*
; IS__CGSCC____-NEXT: [[CMP:%.*]] = icmp eq double* [[BC0]], null
; IS__CGSCC____-NEXT: br i1 [[CMP]], label [[RET_UNDEF0:%.*]], label [[IF_END:%.*]]
; IS__CGSCC____: ret_undef0:
; IS__CGSCC____-NEXT: ret double* undef
; IS__CGSCC____: if.end:
; IS__CGSCC____-NEXT: br i1 [[CMP]], label [[RET_ARG:%.*]], label [[RET_UNDEF1:%.*]]
; IS__CGSCC____: ret_arg:
; IS__CGSCC____-NEXT: ret double* [[BC0]]
; IS__CGSCC____: ret_undef1:
; IS__CGSCC____-NEXT: ret double* undef
; ;
entry: entry:
%bc0 = bitcast i32* %b to double* %bc0 = bitcast i32* %b to double*
%cmp = icmp eq double* %bc0, null %cmp = icmp eq double* %bc0, null
br i1 %cmp, label %ret_undef0, label %if.end br i1 %cmp, label %ret_undef0, label %if.end
ret_undef0: ret_undef0:
ret double *undef ret double *undef
Show All 16 Lines
; return unknown(); ; return unknown();
; } ; }
; ;
; Verify we do not assume b is returned ; Verify we do not assume b is returned
; ;
declare i32* @unknown(i32*) declare i32* @unknown(i32*)
define i32* @ret_arg_or_unknown(i32* %b) #0 { define i32* @ret_arg_or_unknown(i32* %b) #0 {
; IS__TUNIT____: Function Attrs: noinline nounwind uwtable ; NOT_CGSCC_OPM: Function Attrs: noinline nounwind uwtable
; IS__TUNIT____-LABEL: define {{[^@]+}}@ret_arg_or_unknown ; NOT_CGSCC_OPM-LABEL: define {{[^@]+}}@ret_arg_or_unknown
; IS__TUNIT____-SAME: (i32* [[B:%.*]]) #[[ATTR3]] { ; NOT_CGSCC_OPM-SAME: (i32* [[B:%.*]]) #[[ATTR4]] {
; IS__TUNIT____-NEXT: entry: ; NOT_CGSCC_OPM-NEXT: entry:
; IS__TUNIT____-NEXT: [[CMP:%.*]] = icmp eq i32* [[B]], null ; NOT_CGSCC_OPM-NEXT: [[CMP:%.*]] = icmp eq i32* [[B]], null
; IS__TUNIT____-NEXT: br i1 [[CMP]], label [[RET_ARG:%.*]], label [[RET_UNKNOWN:%.*]] ; NOT_CGSCC_OPM-NEXT: br i1 [[CMP]], label [[RET_ARG:%.*]], label [[RET_UNKNOWN:%.*]]
; IS__TUNIT____: ret_arg: ; NOT_CGSCC_OPM: ret_arg:
; IS__TUNIT____-NEXT: ret i32* [[B]] ; NOT_CGSCC_OPM-NEXT: ret i32* [[B]]
; IS__TUNIT____: ret_unknown: ; NOT_CGSCC_OPM: ret_unknown:
; IS__TUNIT____-NEXT: [[CALL:%.*]] = call i32* @unknown(i32* [[B]]) ; NOT_CGSCC_OPM-NEXT: [[CALL:%.*]] = call i32* @unknown(i32* [[B]])
; IS__TUNIT____-NEXT: ret i32* [[CALL]] ; NOT_CGSCC_OPM-NEXT: ret i32* [[CALL]]
; ;
; IS__CGSCC____: Function Attrs: noinline nounwind uwtable ; IS__CGSCC_OPM: Function Attrs: noinline nounwind uwtable
; IS__CGSCC____-LABEL: define {{[^@]+}}@ret_arg_or_unknown ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@ret_arg_or_unknown
; IS__CGSCC____-SAME: (i32* [[B:%.*]]) #[[ATTR4]] { ; IS__CGSCC_OPM-SAME: (i32* [[B:%.*]]) #[[ATTR5]] {
; IS__CGSCC____-NEXT: entry: ; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC____-NEXT: [[CMP:%.*]] = icmp eq i32* [[B]], null ; IS__CGSCC_OPM-NEXT: [[CMP:%.*]] = icmp eq i32* [[B]], null
; IS__CGSCC____-NEXT: br i1 [[CMP]], label [[RET_ARG:%.*]], label [[RET_UNKNOWN:%.*]] ; IS__CGSCC_OPM-NEXT: br i1 [[CMP]], label [[RET_ARG:%.*]], label [[RET_UNKNOWN:%.*]]
; IS__CGSCC____: ret_arg: ; IS__CGSCC_OPM: ret_arg:
; IS__CGSCC____-NEXT: ret i32* [[B]] ; IS__CGSCC_OPM-NEXT: ret i32* [[B]]
; IS__CGSCC____: ret_unknown: ; IS__CGSCC_OPM: ret_unknown:
; IS__CGSCC____-NEXT: [[CALL:%.*]] = call i32* @unknown(i32* [[B]]) ; IS__CGSCC_OPM-NEXT: [[CALL:%.*]] = call i32* @unknown(i32* [[B]])
; IS__CGSCC____-NEXT: ret i32* [[CALL]] ; IS__CGSCC_OPM-NEXT: ret i32* [[CALL]]
; ;
entry: entry:
%cmp = icmp eq i32* %b, null %cmp = icmp eq i32* %b, null
br i1 %cmp, label %ret_arg, label %ret_unknown br i1 %cmp, label %ret_arg, label %ret_unknown
ret_arg: ret_arg:
ret i32* %b ret i32* %b
ret_unknown: ret_unknown:
%call = call i32* @unknown(i32* %b) %call = call i32* @unknown(i32* %b)
ret i32* %call ret i32* %call
} }
define i32* @ret_arg_or_unknown_through_phi(i32* %b) #0 { define i32* @ret_arg_or_unknown_through_phi(i32* %b) #0 {
; IS__TUNIT____: Function Attrs: noinline nounwind uwtable ; NOT_CGSCC_OPM: Function Attrs: noinline nounwind uwtable
; IS__TUNIT____-LABEL: define {{[^@]+}}@ret_arg_or_unknown_through_phi ; NOT_CGSCC_OPM-LABEL: define {{[^@]+}}@ret_arg_or_unknown_through_phi
; IS__TUNIT____-SAME: (i32* [[B:%.*]]) #[[ATTR3]] { ; NOT_CGSCC_OPM-SAME: (i32* [[B:%.*]]) #[[ATTR4]] {
; IS__TUNIT____-NEXT: entry: ; NOT_CGSCC_OPM-NEXT: entry:
; IS__TUNIT____-NEXT: [[CMP:%.*]] = icmp eq i32* [[B]], null ; NOT_CGSCC_OPM-NEXT: [[CMP:%.*]] = icmp eq i32* [[B]], null
; IS__TUNIT____-NEXT: br i1 [[CMP]], label [[RET_ARG:%.*]], label [[RET_UNKNOWN:%.*]] ; NOT_CGSCC_OPM-NEXT: br i1 [[CMP]], label [[RET_ARG:%.*]], label [[RET_UNKNOWN:%.*]]
; IS__TUNIT____: ret_arg: ; NOT_CGSCC_OPM: ret_arg:
; IS__TUNIT____-NEXT: br label [[R:%.*]] ; NOT_CGSCC_OPM-NEXT: br label [[R:%.*]]
; IS__TUNIT____: ret_unknown: ; NOT_CGSCC_OPM: ret_unknown:
; IS__TUNIT____-NEXT: [[CALL:%.*]] = call i32* @unknown(i32* [[B]]) ; NOT_CGSCC_OPM-NEXT: [[CALL:%.*]] = call i32* @unknown(i32* [[B]])
; IS__TUNIT____-NEXT: br label [[R]] ; NOT_CGSCC_OPM-NEXT: br label [[R]]
; IS__TUNIT____: r: ; NOT_CGSCC_OPM: r:
; IS__TUNIT____-NEXT: [[PHI:%.*]] = phi i32* [ [[B]], [[RET_ARG]] ], [ [[CALL]], [[RET_UNKNOWN]] ] ; NOT_CGSCC_OPM-NEXT: [[PHI:%.*]] = phi i32* [ [[B]], [[RET_ARG]] ], [ [[CALL]], [[RET_UNKNOWN]] ]
; IS__TUNIT____-NEXT: ret i32* [[PHI]] ; NOT_CGSCC_OPM-NEXT: ret i32* [[PHI]]
; ;
; IS__CGSCC____: Function Attrs: noinline nounwind uwtable ; IS__CGSCC_OPM: Function Attrs: noinline nounwind uwtable
; IS__CGSCC____-LABEL: define {{[^@]+}}@ret_arg_or_unknown_through_phi ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@ret_arg_or_unknown_through_phi
; IS__CGSCC____-SAME: (i32* [[B:%.*]]) #[[ATTR4]] { ; IS__CGSCC_OPM-SAME: (i32* [[B:%.*]]) #[[ATTR5]] {
; IS__CGSCC____-NEXT: entry: ; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC____-NEXT: [[CMP:%.*]] = icmp eq i32* [[B]], null ; IS__CGSCC_OPM-NEXT: [[CMP:%.*]] = icmp eq i32* [[B]], null
; IS__CGSCC____-NEXT: br i1 [[CMP]], label [[RET_ARG:%.*]], label [[RET_UNKNOWN:%.*]] ; IS__CGSCC_OPM-NEXT: br i1 [[CMP]], label [[RET_ARG:%.*]], label [[RET_UNKNOWN:%.*]]
; IS__CGSCC____: ret_arg: ; IS__CGSCC_OPM: ret_arg:
; IS__CGSCC____-NEXT: br label [[R:%.*]] ; IS__CGSCC_OPM-NEXT: br label [[R:%.*]]
; IS__CGSCC____: ret_unknown: ; IS__CGSCC_OPM: ret_unknown:
; IS__CGSCC____-NEXT: [[CALL:%.*]] = call i32* @unknown(i32* [[B]]) ; IS__CGSCC_OPM-NEXT: [[CALL:%.*]] = call i32* @unknown(i32* [[B]])
; IS__CGSCC____-NEXT: br label [[R]] ; IS__CGSCC_OPM-NEXT: br label [[R]]
; IS__CGSCC____: r: ; IS__CGSCC_OPM: r:
; IS__CGSCC____-NEXT: [[PHI:%.*]] = phi i32* [ [[B]], [[RET_ARG]] ], [ [[CALL]], [[RET_UNKNOWN]] ] ; IS__CGSCC_OPM-NEXT: [[PHI:%.*]] = phi i32* [ [[B]], [[RET_ARG]] ], [ [[CALL]], [[RET_UNKNOWN]] ]
; IS__CGSCC____-NEXT: ret i32* [[PHI]] ; IS__CGSCC_OPM-NEXT: ret i32* [[PHI]]
; ;
entry: entry:
%cmp = icmp eq i32* %b, null %cmp = icmp eq i32* %b, null
br i1 %cmp, label %ret_arg, label %ret_unknown br i1 %cmp, label %ret_arg, label %ret_unknown
ret_arg: ret_arg:
br label %r br label %r
ret_unknown: ret_unknown:
%call = call i32* @unknown(i32* %b) %call = call i32* @unknown(i32* %b)
br label %r br label %r
r: r:
%phi = phi i32* [ %b, %ret_arg ], [ %call, %ret_unknown ] %phi = phi i32* [ %b, %ret_arg ], [ %call, %ret_unknown ]
ret i32* %phi ret i32* %phi
} }
; TEST inconsistent IR in dead code. ; TEST inconsistent IR in dead code.
; ;
define i32 @deadblockcall1(i32 %A) #0 { define i32 @deadblockcall1(i32 %A) #0 {
; IS__TUNIT____: Function Attrs: nofree noinline nosync nounwind readnone uwtable willreturn ; CHECK: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@deadblockcall1 ; CHECK-LABEL: define {{[^@]+}}@deadblockcall1
; IS__TUNIT____-SAME: (i32 returned [[A:%.*]]) #[[ATTR0]] { ; CHECK-SAME: (i32 returned [[A:%.*]]) #[[ATTR0]] {
; IS__TUNIT____-NEXT: entry: ; CHECK-NEXT: entry:
; IS__TUNIT____-NEXT: ret i32 [[A]] ; CHECK-NEXT: ret i32 [[A]]
; IS__TUNIT____: unreachableblock: ; CHECK: unreachableblock:
; IS__TUNIT____-NEXT: unreachable ; CHECK-NEXT: unreachable
;
; IS__CGSCC____: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@deadblockcall1
; IS__CGSCC____-SAME: (i32 returned [[A:%.*]]) #[[ATTR0]] {
; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: ret i32 [[A]]
; IS__CGSCC____: unreachableblock:
; IS__CGSCC____-NEXT: unreachable
; ;
entry: entry:
ret i32 %A ret i32 %A
unreachableblock: unreachableblock:
%B = call i32 @deadblockcall1(i32 %B) %B = call i32 @deadblockcall1(i32 %B)
ret i32 %B ret i32 %B
} }
declare i32 @deadblockcall_helper(i32 returned %A); declare i32 @deadblockcall_helper(i32 returned %A);
define i32 @deadblockcall2(i32 %A) #0 { define i32 @deadblockcall2(i32 %A) #0 {
; IS__TUNIT____: Function Attrs: nofree noinline nosync nounwind readnone uwtable willreturn ; CHECK: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@deadblockcall2 ; CHECK-LABEL: define {{[^@]+}}@deadblockcall2
; IS__TUNIT____-SAME: (i32 returned [[A:%.*]]) #[[ATTR0]] { ; CHECK-SAME: (i32 returned [[A:%.*]]) #[[ATTR0]] {
; IS__TUNIT____-NEXT: entry: ; CHECK-NEXT: entry:
; IS__TUNIT____-NEXT: ret i32 [[A]] ; CHECK-NEXT: ret i32 [[A]]
; IS__TUNIT____: unreachableblock1: ; CHECK: unreachableblock1:
; IS__TUNIT____-NEXT: unreachable ; CHECK-NEXT: unreachable
; IS__TUNIT____: unreachableblock2: ; CHECK: unreachableblock2:
; IS__TUNIT____-NEXT: unreachable ; CHECK-NEXT: unreachable
;
; IS__CGSCC____: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@deadblockcall2
; IS__CGSCC____-SAME: (i32 returned [[A:%.*]]) #[[ATTR0]] {
; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: ret i32 [[A]]
; IS__CGSCC____: unreachableblock1:
; IS__CGSCC____-NEXT: unreachable
; IS__CGSCC____: unreachableblock2:
; IS__CGSCC____-NEXT: unreachable
; ;
entry: entry:
ret i32 %A ret i32 %A
unreachableblock1: unreachableblock1:
%B = call i32 @deadblockcall_helper(i32 %B) %B = call i32 @deadblockcall_helper(i32 %B)
ret i32 %B ret i32 %B
unreachableblock2: unreachableblock2:
%C = call i32 @deadblockcall1(i32 %C) %C = call i32 @deadblockcall1(i32 %C)
ret i32 %C ret i32 %C
} }
define i32 @deadblockphi1(i32 %A) #0 { define i32 @deadblockphi1(i32 %A) #0 {
; IS__TUNIT____: Function Attrs: nofree noinline nosync nounwind readnone uwtable willreturn ; CHECK: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@deadblockphi1 ; CHECK-LABEL: define {{[^@]+}}@deadblockphi1
; IS__TUNIT____-SAME: (i32 returned [[A:%.*]]) #[[ATTR0]] { ; CHECK-SAME: (i32 returned [[A:%.*]]) #[[ATTR0]] {
; IS__TUNIT____-NEXT: entry: ; CHECK-NEXT: entry:
; IS__TUNIT____-NEXT: br label [[R:%.*]] ; CHECK-NEXT: br label [[R:%.*]]
; IS__TUNIT____: unreachableblock1: ; CHECK: unreachableblock1:
; IS__TUNIT____-NEXT: unreachable ; CHECK-NEXT: unreachable
; IS__TUNIT____: unreachableblock2: ; CHECK: unreachableblock2:
; IS__TUNIT____-NEXT: unreachable ; CHECK-NEXT: unreachable
; IS__TUNIT____: r: ; CHECK: r:
; IS__TUNIT____-NEXT: ret i32 [[A]] ; CHECK-NEXT: ret i32 [[A]]
;
; IS__CGSCC____: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@deadblockphi1
; IS__CGSCC____-SAME: (i32 returned [[A:%.*]]) #[[ATTR0]] {
; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: br label [[R:%.*]]
; IS__CGSCC____: unreachableblock1:
; IS__CGSCC____-NEXT: unreachable
; IS__CGSCC____: unreachableblock2:
; IS__CGSCC____-NEXT: unreachable
; IS__CGSCC____: r:
; IS__CGSCC____-NEXT: ret i32 [[A]]
; ;
entry: entry:
br label %r br label %r
unreachableblock1: unreachableblock1:
%B = call i32 @deadblockcall_helper(i32 %B) %B = call i32 @deadblockcall_helper(i32 %B)
ret i32 %B ret i32 %B
unreachableblock2: unreachableblock2:
%C = call i32 @deadblockcall1(i32 %C) %C = call i32 @deadblockcall1(i32 %C)
br label %r br label %r
r: r:
%PHI = phi i32 [%A, %entry], [%C, %unreachableblock2] %PHI = phi i32 [%A, %entry], [%C, %unreachableblock2]
ret i32 %PHI ret i32 %PHI
} }
define i32 @deadblockphi2(i32 %A) #0 { define i32 @deadblockphi2(i32 %A) #0 {
; IS__TUNIT____: Function Attrs: nofree noinline nosync nounwind readnone uwtable willreturn ; CHECK: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@deadblockphi2 ; CHECK-LABEL: define {{[^@]+}}@deadblockphi2
; IS__TUNIT____-SAME: (i32 returned [[A:%.*]]) #[[ATTR0]] { ; CHECK-SAME: (i32 returned [[A:%.*]]) #[[ATTR0]] {
; IS__TUNIT____-NEXT: entry: ; CHECK-NEXT: entry:
; IS__TUNIT____-NEXT: br label [[R:%.*]] ; CHECK-NEXT: br label [[R:%.*]]
; IS__TUNIT____: unreachableblock1: ; CHECK: unreachableblock1:
; IS__TUNIT____-NEXT: unreachable ; CHECK-NEXT: unreachable
; IS__TUNIT____: unreachableblock2: ; CHECK: unreachableblock2:
; IS__TUNIT____-NEXT: unreachable ; CHECK-NEXT: unreachable
; IS__TUNIT____: unreachableblock3: ; CHECK: unreachableblock3:
; IS__TUNIT____-NEXT: unreachable ; CHECK-NEXT: unreachable
; IS__TUNIT____: r: ; CHECK: r:
; IS__TUNIT____-NEXT: ret i32 [[A]] ; CHECK-NEXT: ret i32 [[A]]
;
; IS__CGSCC____: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@deadblockphi2
; IS__CGSCC____-SAME: (i32 returned [[A:%.*]]) #[[ATTR0]] {
; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: br label [[R:%.*]]
; IS__CGSCC____: unreachableblock1:
; IS__CGSCC____-NEXT: unreachable
; IS__CGSCC____: unreachableblock2:
; IS__CGSCC____-NEXT: unreachable
; IS__CGSCC____: unreachableblock3:
; IS__CGSCC____-NEXT: unreachable
; IS__CGSCC____: r:
; IS__CGSCC____-NEXT: ret i32 [[A]]
; ;
entry: entry:
br label %r br label %r
unreachableblock1: unreachableblock1:
%B = call i32 @deadblockcall_helper(i32 %B) %B = call i32 @deadblockcall_helper(i32 %B)
br label %unreachableblock3 br label %unreachableblock3
unreachableblock2: unreachableblock2:
%C = call i32 @deadblockcall1(i32 %C) %C = call i32 @deadblockcall1(i32 %C)
br label %unreachableblock3 br label %unreachableblock3
unreachableblock3: unreachableblock3:
%PHI1 = phi i32 [%B, %unreachableblock1], [%C, %unreachableblock2] %PHI1 = phi i32 [%B, %unreachableblock1], [%C, %unreachableblock2]
br label %r br label %r
r: r:
%PHI2 = phi i32 [%A, %entry], [%PHI1, %unreachableblock3] %PHI2 = phi i32 [%A, %entry], [%PHI1, %unreachableblock3]
ret i32 %PHI2 ret i32 %PHI2
} }
declare void @noreturn() noreturn; declare void @noreturn() noreturn;
define i32 @deadblockphi3(i32 %A, i1 %c) #0 { define i32 @deadblockphi3(i32 %A, i1 %c) #0 {
; IS__TUNIT____: Function Attrs: noinline nounwind uwtable ; NOT_CGSCC_OPM: Function Attrs: noinline nounwind uwtable
; IS__TUNIT____-LABEL: define {{[^@]+}}@deadblockphi3 ; NOT_CGSCC_OPM-LABEL: define {{[^@]+}}@deadblockphi3
; IS__TUNIT____-SAME: (i32 returned [[A:%.*]], i1 [[C:%.*]]) #[[ATTR3]] { ; NOT_CGSCC_OPM-SAME: (i32 returned [[A:%.*]], i1 [[C:%.*]]) #[[ATTR4]] {
; IS__TUNIT____-NEXT: entry: ; NOT_CGSCC_OPM-NEXT: entry:
; IS__TUNIT____-NEXT: br i1 [[C]], label [[R:%.*]], label [[UNREACHABLECALL:%.*]] ; NOT_CGSCC_OPM-NEXT: br i1 [[C]], label [[R:%.*]], label [[UNREACHABLECALL:%.*]]
; IS__TUNIT____: unreachablecall: ; NOT_CGSCC_OPM: unreachablecall:
; IS__TUNIT____-NEXT: call void @noreturn() #[[ATTR4:[0-9]+]] ; NOT_CGSCC_OPM-NEXT: call void @noreturn() #[[ATTR6:[0-9]+]]
; IS__TUNIT____-NEXT: unreachable ; NOT_CGSCC_OPM-NEXT: unreachable
; IS__TUNIT____: unreachableblock2: ; NOT_CGSCC_OPM: unreachableblock2:
; IS__TUNIT____-NEXT: unreachable ; NOT_CGSCC_OPM-NEXT: unreachable
; IS__TUNIT____: unreachableblock3: ; NOT_CGSCC_OPM: unreachableblock3:
; IS__TUNIT____-NEXT: unreachable ; NOT_CGSCC_OPM-NEXT: unreachable
; IS__TUNIT____: r: ; NOT_CGSCC_OPM: r:
; IS__TUNIT____-NEXT: ret i32 [[A]] ; NOT_CGSCC_OPM-NEXT: ret i32 [[A]]
; ;
; IS__CGSCC____: Function Attrs: noinline nounwind uwtable ; IS__CGSCC_OPM: Function Attrs: noinline nounwind uwtable
; IS__CGSCC____-LABEL: define {{[^@]+}}@deadblockphi3 ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@deadblockphi3
; IS__CGSCC____-SAME: (i32 returned [[A:%.*]], i1 [[C:%.*]]) #[[ATTR4]] { ; IS__CGSCC_OPM-SAME: (i32 returned [[A:%.*]], i1 [[C:%.*]]) #[[ATTR5]] {
; IS__CGSCC____-NEXT: entry: ; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC____-NEXT: br i1 [[C]], label [[R:%.*]], label [[UNREACHABLECALL:%.*]] ; IS__CGSCC_OPM-NEXT: br i1 [[C]], label [[R:%.*]], label [[UNREACHABLECALL:%.*]]
; IS__CGSCC____: unreachablecall: ; IS__CGSCC_OPM: unreachablecall:
; IS__CGSCC____-NEXT: call void @noreturn() #[[ATTR5:[0-9]+]] ; IS__CGSCC_OPM-NEXT: call void @noreturn() #[[ATTR7:[0-9]+]]
; IS__CGSCC____-NEXT: unreachable ; IS__CGSCC_OPM-NEXT: unreachable
; IS__CGSCC____: unreachableblock2: ; IS__CGSCC_OPM: unreachableblock2:
; IS__CGSCC____-NEXT: unreachable ; IS__CGSCC_OPM-NEXT: unreachable
; IS__CGSCC____: unreachableblock3: ; IS__CGSCC_OPM: unreachableblock3:
; IS__CGSCC____-NEXT: unreachable ; IS__CGSCC_OPM-NEXT: unreachable
; IS__CGSCC____: r: ; IS__CGSCC_OPM: r:
; IS__CGSCC____-NEXT: ret i32 [[A]] ; IS__CGSCC_OPM-NEXT: ret i32 [[A]]
; ;
entry: entry:
br i1 %c, label %r, label %unreachablecall br i1 %c, label %r, label %unreachablecall
unreachablecall: unreachablecall:
call void @noreturn(); call void @noreturn();
%B = call i32 @deadblockcall_helper(i32 0) %B = call i32 @deadblockcall_helper(i32 0)
br label %unreachableblock3 br label %unreachableblock3
unreachableblock2: unreachableblock2:
▲ Show 20 Lines • Show All 41 Lines • ▼ Show 20 Lines
; ;
ret i32* %a ret i32* %a
} }
; We can use the alignment information of the weak function non_exact_3 argument ; We can use the alignment information of the weak function non_exact_3 argument
; because it was given to us and not derived. ; because it was given to us and not derived.
; We can use the return information of the weak function non_exact_4. ; We can use the return information of the weak function non_exact_4.
; FIXME: %c2 and %c3 should be replaced but not %c0 or %c1! ; FIXME: %c2 and %c3 should be replaced but not %c0 or %c1!
define i32 @exact(i32* align 8 %a, i32* align 8 %b) { define i32 @exact(i32* align 8 %a, i32* align 8 %b) {
; CHECK-LABEL: define {{[^@]+}}@exact ; NOT_CGSCC_OPM: Function Attrs: norecurse
; CHECK-SAME: (i32* align 8 [[A:%.*]], i32* align 8 [[B:%.*]]) { ; NOT_CGSCC_OPM-LABEL: define {{[^@]+}}@exact
; CHECK-NEXT: [[C0:%.*]] = call i32 @non_exact_0() ; NOT_CGSCC_OPM-SAME: (i32* align 8 [[A:%.*]], i32* align 8 [[B:%.*]]) #[[ATTR7:[0-9]+]] {
; CHECK-NEXT: [[C1:%.*]] = call i32 @non_exact_1(i32 noundef 1) ; NOT_CGSCC_OPM-NEXT: [[C0:%.*]] = call i32 @non_exact_0()
; CHECK-NEXT: [[C2:%.*]] = call i32 @non_exact_2(i32 noundef 2) ; NOT_CGSCC_OPM-NEXT: [[C1:%.*]] = call i32 @non_exact_1(i32 noundef 1)
; CHECK-NEXT: [[C3:%.*]] = call align 32 i32* @non_exact_3(i32* align 32 [[A]]) ; NOT_CGSCC_OPM-NEXT: [[C2:%.*]] = call i32 @non_exact_2(i32 noundef 2)
; CHECK-NEXT: [[C4:%.*]] = call align 16 i32* @non_exact_4(i32* align 32 [[B]]) ; NOT_CGSCC_OPM-NEXT: [[C3:%.*]] = call align 32 i32* @non_exact_3(i32* align 32 [[A]])
; CHECK-NEXT: [[C3L:%.*]] = load i32, i32* [[A]], align 32 ; NOT_CGSCC_OPM-NEXT: [[C4:%.*]] = call align 16 i32* @non_exact_4(i32* align 32 [[B]])
; CHECK-NEXT: [[C4L:%.*]] = load i32, i32* [[C4]], align 16 ; NOT_CGSCC_OPM-NEXT: [[C3L:%.*]] = load i32, i32* [[A]], align 32
; CHECK-NEXT: [[ADD1:%.*]] = add i32 [[C0]], [[C1]] ; NOT_CGSCC_OPM-NEXT: [[C4L:%.*]] = load i32, i32* [[C4]], align 16
; CHECK-NEXT: [[ADD2:%.*]] = add i32 [[ADD1]], 2 ; NOT_CGSCC_OPM-NEXT: [[ADD1:%.*]] = add i32 [[C0]], [[C1]]
; CHECK-NEXT: [[ADD3:%.*]] = add i32 [[ADD2]], [[C3L]] ; NOT_CGSCC_OPM-NEXT: [[ADD2:%.*]] = add i32 [[ADD1]], 2
; CHECK-NEXT: [[ADD4:%.*]] = add i32 [[ADD3]], [[C4L]] ; NOT_CGSCC_OPM-NEXT: [[ADD3:%.*]] = add i32 [[ADD2]], [[C3L]]
; CHECK-NEXT: ret i32 [[ADD4]] ; NOT_CGSCC_OPM-NEXT: [[ADD4:%.*]] = add i32 [[ADD3]], [[C4L]]
; NOT_CGSCC_OPM-NEXT: ret i32 [[ADD4]]
;
; IS__CGSCC_OPM: Function Attrs: norecurse
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@exact
; IS__CGSCC_OPM-SAME: (i32* align 8 [[A:%.*]], i32* align 8 [[B:%.*]]) #[[ATTR8:[0-9]+]] {
; IS__CGSCC_OPM-NEXT: [[C0:%.*]] = call i32 @non_exact_0()
; IS__CGSCC_OPM-NEXT: [[C1:%.*]] = call i32 @non_exact_1(i32 noundef 1)
; IS__CGSCC_OPM-NEXT: [[C2:%.*]] = call i32 @non_exact_2(i32 noundef 2)
; IS__CGSCC_OPM-NEXT: [[C3:%.*]] = call align 32 i32* @non_exact_3(i32* align 32 [[A]])
; IS__CGSCC_OPM-NEXT: [[C4:%.*]] = call align 16 i32* @non_exact_4(i32* align 32 [[B]])
; IS__CGSCC_OPM-NEXT: [[C3L:%.*]] = load i32, i32* [[A]], align 32
; IS__CGSCC_OPM-NEXT: [[C4L:%.*]] = load i32, i32* [[C4]], align 16
; IS__CGSCC_OPM-NEXT: [[ADD1:%.*]] = add i32 [[C0]], [[C1]]
; IS__CGSCC_OPM-NEXT: [[ADD2:%.*]] = add i32 [[ADD1]], 2
; IS__CGSCC_OPM-NEXT: [[ADD3:%.*]] = add i32 [[ADD2]], [[C3L]]
; IS__CGSCC_OPM-NEXT: [[ADD4:%.*]] = add i32 [[ADD3]], [[C4L]]
; IS__CGSCC_OPM-NEXT: ret i32 [[ADD4]]
; ;
%c0 = call i32 @non_exact_0() %c0 = call i32 @non_exact_0()
%c1 = call i32 @non_exact_1(i32 1) %c1 = call i32 @non_exact_1(i32 1)
%c2 = call i32 @non_exact_2(i32 2) %c2 = call i32 @non_exact_2(i32 2)
%c3 = call i32* @non_exact_3(i32* %a) %c3 = call i32* @non_exact_3(i32* %a)
%c4 = call i32* @non_exact_4(i32* %b) %c4 = call i32* @non_exact_4(i32* %b)
%c3l = load i32, i32* %c3 %c3l = load i32, i32* %c3
%c4l = load i32, i32* %c4 %c4l = load i32, i32* %c4
%add1 = add i32 %c0, %c1 %add1 = add i32 %c0, %c1
%add2 = add i32 %add1, %c2 %add2 = add i32 %add1, %c2
%add3 = add i32 %add2, %c3l %add3 = add i32 %add2, %c3l
%add4 = add i32 %add3, %c4l %add4 = add i32 %add3, %c4l
ret i32 %add4 ret i32 %add4
} }
@G = external global i8 @G = external global i8
define i32* @ret_const() #0 { define i32* @ret_const() #0 {
; IS__TUNIT____: Function Attrs: nofree noinline nosync nounwind readnone uwtable willreturn ; CHECK: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@ret_const ; CHECK-LABEL: define {{[^@]+}}@ret_const
; IS__TUNIT____-SAME: () #[[ATTR0]] { ; CHECK-SAME: () #[[ATTR0]] {
; IS__TUNIT____-NEXT: ret i32* bitcast (i8* @G to i32*) ; CHECK-NEXT: ret i32* bitcast (i8* @G to i32*)
;
; IS__CGSCC____: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@ret_const
; IS__CGSCC____-SAME: () #[[ATTR0]] {
; IS__CGSCC____-NEXT: ret i32* bitcast (i8* @G to i32*)
; ;
%bc = bitcast i8* @G to i32* %bc = bitcast i8* @G to i32*
ret i32* %bc ret i32* %bc
} }
define i32* @use_const() #0 { define i32* @use_const() #0 {
; IS__TUNIT____: Function Attrs: nofree noinline nosync nounwind readnone uwtable willreturn ; CHECK: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@use_const ; CHECK-LABEL: define {{[^@]+}}@use_const
; IS__TUNIT____-SAME: () #[[ATTR0]] { ; CHECK-SAME: () #[[ATTR0]] {
; IS__TUNIT____-NEXT: ret i32* bitcast (i8* @G to i32*) ; CHECK-NEXT: ret i32* bitcast (i8* @G to i32*)
;
; IS__CGSCC____: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@use_const
; IS__CGSCC____-SAME: () #[[ATTR0]] {
; IS__CGSCC____-NEXT: ret i32* bitcast (i8* @G to i32*)
; ;
%c = call i32* @ret_const() %c = call i32* @ret_const()
ret i32* %c ret i32* %c
} }
define i32* @dont_use_const() #0 { define i32* @dont_use_const() #0 {
; IS__TUNIT____: Function Attrs: nofree noinline nosync nounwind readnone uwtable willreturn ; CHECK: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@dont_use_const ; CHECK-LABEL: define {{[^@]+}}@dont_use_const
; IS__TUNIT____-SAME: () #[[ATTR0]] { ; CHECK-SAME: () #[[ATTR0]] {
; IS__TUNIT____-NEXT: ret i32* bitcast (i8* @G to i32*) ; CHECK-NEXT: ret i32* bitcast (i8* @G to i32*)
;
; IS__CGSCC____: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@dont_use_const
; IS__CGSCC____-SAME: () #[[ATTR0]] {
; IS__CGSCC____-NEXT: ret i32* bitcast (i8* @G to i32*)
; ;
%c = musttail call i32* @ret_const() %c = musttail call i32* @ret_const()
ret i32* %c ret i32* %c
} }
; UTC_ARGS: --disable ; UTC_ARGS: --disable
; ;
; Verify we do not derive constraints for @_Z3fooP1X as if it was returning `null`. ; Verify we do not derive constraints for @_Z3fooP1X as if it was returning `null`.
Show All 34 Lines
} }
declare dso_local i8* @__dynamic_cast(i8*, i8*, i8*, i64) declare dso_local i8* @__dynamic_cast(i8*, i8*, i8*, i64)
; UTC_ARGS: --enable ; UTC_ARGS: --enable
attributes #0 = { noinline nounwind uwtable } attributes #0 = { noinline nounwind uwtable }
;. ;.
; IS__TUNIT____: attributes #[[ATTR0]] = { nofree noinline nosync nounwind readnone uwtable willreturn } ; IS__TUNIT____: attributes #[[ATTR0]] = { nofree noinline norecurse nosync nounwind readnone uwtable willreturn }
; IS__TUNIT____: attributes #[[ATTR1]] = { nofree noinline nosync nounwind readnone uwtable } ; IS__TUNIT____: attributes #[[ATTR1]] = { nofree noinline nosync nounwind readnone uwtable }
; IS__TUNIT____: attributes #[[ATTR2]] = { argmemonly nofree noinline nosync nounwind readonly uwtable } ; IS__TUNIT____: attributes #[[ATTR2]] = { nofree noinline norecurse nosync nounwind readnone uwtable }
; IS__TUNIT____: attributes #[[ATTR3]] = { noinline nounwind uwtable } ; IS__TUNIT____: attributes #[[ATTR3]] = { argmemonly nofree noinline nosync nounwind readonly uwtable }
; IS__TUNIT____: attributes #[[ATTR4]] = { noreturn } ; IS__TUNIT____: attributes #[[ATTR4]] = { noinline nounwind uwtable }
; IS__TUNIT____: attributes #[[ATTR5:[0-9]+]] = { nofree nosync nounwind readnone willreturn } ; IS__TUNIT____: attributes #[[ATTR5]] = { noinline norecurse nounwind uwtable }
; IS__TUNIT____: attributes #[[ATTR6]] = { nofree nosync nounwind readnone } ; IS__TUNIT____: attributes #[[ATTR6]] = { noreturn }
; IS__TUNIT____: attributes #[[ATTR7]] = { nofree nosync nounwind readonly } ; IS__TUNIT____: attributes #[[ATTR7]] = { norecurse }
; IS__TUNIT____: attributes #[[ATTR8]] = { nounwind } ; IS__TUNIT____: attributes #[[ATTR8:[0-9]+]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__TUNIT____: attributes #[[ATTR9:[0-9]+]] = { nounwind readnone } ; IS__TUNIT____: attributes #[[ATTR9]] = { nofree nosync nounwind readnone }
; IS__TUNIT____: attributes #[[ATTR10]] = { nofree nosync nounwind readonly }
; IS__TUNIT____: attributes #[[ATTR11]] = { nounwind }
; IS__TUNIT____: attributes #[[ATTR12:[0-9]+]] = { nounwind readnone }
;.
; IS__CGSCC_OPM: attributes #[[ATTR0]] = { nofree noinline norecurse nosync nounwind readnone uwtable willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR1]] = { nofree noinline nosync nounwind readnone uwtable willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR2]] = { nofree noinline nosync nounwind readnone uwtable }
; IS__CGSCC_OPM: attributes #[[ATTR3]] = { argmemonly nofree noinline nosync nounwind readonly uwtable }
; IS__CGSCC_OPM: attributes #[[ATTR4]] = { nofree noinline norecurse nosync nounwind readnone uwtable }
; IS__CGSCC_OPM: attributes #[[ATTR5]] = { noinline nounwind uwtable }
; IS__CGSCC_OPM: attributes #[[ATTR6]] = { noinline norecurse nounwind uwtable }
; IS__CGSCC_OPM: attributes #[[ATTR7]] = { noreturn }
; IS__CGSCC_OPM: attributes #[[ATTR8]] = { norecurse }
; IS__CGSCC_OPM: attributes #[[ATTR9:[0-9]+]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR10]] = { nofree nosync nounwind readnone }
; IS__CGSCC_OPM: attributes #[[ATTR11]] = { nofree nosync nounwind readonly }
; IS__CGSCC_OPM: attributes #[[ATTR12]] = { nofree norecurse nosync nounwind readnone }
; IS__CGSCC_OPM: attributes #[[ATTR13]] = { nounwind }
; IS__CGSCC_OPM: attributes #[[ATTR14:[0-9]+]] = { nounwind readnone }
;. ;.
; IS__CGSCC____: attributes #[[ATTR0]] = { nofree noinline norecurse nosync nounwind readnone uwtable willreturn } ; IS__CGSCC_NPM: attributes #[[ATTR0]] = { nofree noinline norecurse nosync nounwind readnone uwtable willreturn }
; IS__CGSCC____: attributes #[[ATTR1]] = { nofree noinline nosync nounwind readnone uwtable willreturn } ; IS__CGSCC_NPM: attributes #[[ATTR1]] = { nofree noinline nosync nounwind readnone uwtable willreturn }
; IS__CGSCC____: attributes #[[ATTR2]] = { nofree noinline nosync nounwind readnone uwtable } ; IS__CGSCC_NPM: attributes #[[ATTR2]] = { nofree noinline nosync nounwind readnone uwtable }
; IS__CGSCC____: attributes #[[ATTR3]] = { argmemonly nofree noinline nosync nounwind readonly uwtable } ; IS__CGSCC_NPM: attributes #[[ATTR3]] = { argmemonly nofree noinline nosync nounwind readonly uwtable }
; IS__CGSCC____: attributes #[[ATTR4]] = { noinline nounwind uwtable } ; IS__CGSCC_NPM: attributes #[[ATTR4]] = { noinline nounwind uwtable }
; IS__CGSCC____: attributes #[[ATTR5]] = { noreturn } ; IS__CGSCC_NPM: attributes #[[ATTR5]] = { noinline norecurse nounwind uwtable }
; IS__CGSCC____: attributes #[[ATTR6:[0-9]+]] = { nofree norecurse nosync nounwind readnone willreturn } ; IS__CGSCC_NPM: attributes #[[ATTR6]] = { noreturn }
; IS__CGSCC____: attributes #[[ATTR7]] = { nofree nosync nounwind readnone } ; IS__CGSCC_NPM: attributes #[[ATTR7]] = { norecurse }
; IS__CGSCC____: attributes #[[ATTR8]] = { nofree nosync nounwind readonly } ; IS__CGSCC_NPM: attributes #[[ATTR8:[0-9]+]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__CGSCC____: attributes #[[ATTR9]] = { nounwind } ; IS__CGSCC_NPM: attributes #[[ATTR9]] = { nofree nosync nounwind readnone }
; IS__CGSCC_NPM: attributes #[[ATTR10]] = { nofree nosync nounwind readonly }
; IS__CGSCC_NPM: attributes #[[ATTR11]] = { nounwind }
; IS__CGSCC_NPM: attributes #[[ATTR12:[0-9]+]] = { nounwind readnone }
;. ;.

llvm/test/Transforms/Attributor/undefined_behavior.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals
; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM ; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM
; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM ; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
; Test cases specifically designed for the "undefined behavior" abstract function attribute. ; Test cases specifically designed for the "undefined behavior" abstract function attribute.
; We want to verify that whenever undefined behavior is assumed, the code becomes unreachable. ; We want to verify that whenever undefined behavior is assumed, the code becomes unreachable.
; We use FIXME's to indicate problems and missing attributes. ; We use FIXME's to indicate problems and missing attributes.
; -- Load tests -- ; -- Load tests --
define void @load_wholly_unreachable() { define void @load_wholly_unreachable() {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@load_wholly_unreachable ; CHECK-LABEL: define {{[^@]+}}@load_wholly_unreachable
; IS__TUNIT____-SAME: () #[[ATTR0:[0-9]+]] { ; CHECK-SAME: () #[[ATTR0:[0-9]+]] {
; IS__TUNIT____-NEXT: unreachable ; CHECK-NEXT: unreachable
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@load_wholly_unreachable
; IS__CGSCC____-SAME: () #[[ATTR0:[0-9]+]] {
; IS__CGSCC____-NEXT: unreachable
; ;
%a = load i32, i32* null %a = load i32, i32* null
ret void ret void
} }
define void @loads_wholly_unreachable() { define void @loads_wholly_unreachable() {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@loads_wholly_unreachable ; CHECK-LABEL: define {{[^@]+}}@loads_wholly_unreachable
; IS__TUNIT____-SAME: () #[[ATTR0]] { ; CHECK-SAME: () #[[ATTR0]] {
; IS__TUNIT____-NEXT: unreachable ; CHECK-NEXT: unreachable
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@loads_wholly_unreachable
; IS__CGSCC____-SAME: () #[[ATTR0]] {
; IS__CGSCC____-NEXT: unreachable
; ;
%a = load i32, i32* null %a = load i32, i32* null
%b = load i32, i32* null %b = load i32, i32* null
ret void ret void
} }
define void @load_single_bb_unreachable(i1 %cond) { define void @load_single_bb_unreachable(i1 %cond) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@load_single_bb_unreachable ; CHECK-LABEL: define {{[^@]+}}@load_single_bb_unreachable
; IS__TUNIT____-SAME: (i1 [[COND:%.*]]) #[[ATTR0]] { ; CHECK-SAME: (i1 [[COND:%.*]]) #[[ATTR0]] {
; IS__TUNIT____-NEXT: br i1 [[COND]], label [[T:%.*]], label [[E:%.*]] ; CHECK-NEXT: br i1 [[COND]], label [[T:%.*]], label [[E:%.*]]
; IS__TUNIT____: t: ; CHECK: t:
; IS__TUNIT____-NEXT: unreachable ; CHECK-NEXT: unreachable
; IS__TUNIT____: e: ; CHECK: e:
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@load_single_bb_unreachable
; IS__CGSCC____-SAME: (i1 [[COND:%.*]]) #[[ATTR0]] {
; IS__CGSCC____-NEXT: br i1 [[COND]], label [[T:%.*]], label [[E:%.*]]
; IS__CGSCC____: t:
; IS__CGSCC____-NEXT: unreachable
; IS__CGSCC____: e:
; IS__CGSCC____-NEXT: ret void
; ;
br i1 %cond, label %t, label %e br i1 %cond, label %t, label %e
t: t:
%b = load i32, i32* null %b = load i32, i32* null
br label %e br label %e
e: e:
ret void ret void
} }
; Note that while the load is removed (because it's unused), the block ; Note that while the load is removed (because it's unused), the block
; is not changed to unreachable ; is not changed to unreachable
define void @load_null_pointer_is_defined() null_pointer_is_valid { define void @load_null_pointer_is_defined() null_pointer_is_valid {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind null_pointer_is_valid readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind null_pointer_is_valid readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@load_null_pointer_is_defined ; CHECK-LABEL: define {{[^@]+}}@load_null_pointer_is_defined
; IS__TUNIT____-SAME: () #[[ATTR1:[0-9]+]] { ; CHECK-SAME: () #[[ATTR1:[0-9]+]] {
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind null_pointer_is_valid readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@load_null_pointer_is_defined
; IS__CGSCC____-SAME: () #[[ATTR1:[0-9]+]] {
; IS__CGSCC____-NEXT: ret void
; ;
%a = load i32, i32* null %a = load i32, i32* null
ret void ret void
} }
define internal i32* @ret_null() { define internal i32* @ret_null() {
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@ret_null ; IS__CGSCC____-LABEL: define {{[^@]+}}@ret_null
; IS__CGSCC____-SAME: () #[[ATTR0]] { ; IS__CGSCC____-SAME: () #[[ATTR0]] {
; IS__CGSCC____-NEXT: ret i32* undef ; IS__CGSCC____-NEXT: ret i32* undef
; ;
ret i32* null ret i32* null
} }
define void @load_null_propagated() { define void @load_null_propagated() {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@load_null_propagated ; CHECK-LABEL: define {{[^@]+}}@load_null_propagated
; IS__TUNIT____-SAME: () #[[ATTR0]] { ; CHECK-SAME: () #[[ATTR0]] {
; IS__TUNIT____-NEXT: unreachable ; CHECK-NEXT: unreachable
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@load_null_propagated
; IS__CGSCC____-SAME: () #[[ATTR0]] {
; IS__CGSCC____-NEXT: unreachable
; ;
%ptr = call i32* @ret_null() %ptr = call i32* @ret_null()
%a = load i32, i32* %ptr %a = load i32, i32* %ptr
ret void ret void
} }
; -- Store tests -- ; -- Store tests --
define void @store_wholly_unreachable() { define void @store_wholly_unreachable() {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@store_wholly_unreachable ; CHECK-LABEL: define {{[^@]+}}@store_wholly_unreachable
; IS__TUNIT____-SAME: () #[[ATTR0]] { ; CHECK-SAME: () #[[ATTR0]] {
; IS__TUNIT____-NEXT: unreachable ; CHECK-NEXT: unreachable
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@store_wholly_unreachable
; IS__CGSCC____-SAME: () #[[ATTR0]] {
; IS__CGSCC____-NEXT: unreachable
; ;
store i32 5, i32* null store i32 5, i32* null
ret void ret void
} }
define void @store_wholly_unreachable_volatile() { define void @store_wholly_unreachable_volatile() {
; IS__TUNIT____: Function Attrs: nofree nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@store_wholly_unreachable_volatile ; CHECK-LABEL: define {{[^@]+}}@store_wholly_unreachable_volatile
; IS__TUNIT____-SAME: () #[[ATTR2:[0-9]+]] { ; CHECK-SAME: () #[[ATTR2:[0-9]+]] {
; IS__TUNIT____-NEXT: store volatile i32 5, i32* null, align 4294967296 ; CHECK-NEXT: store volatile i32 5, i32* null, align 4294967296
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: nofree norecurse nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@store_wholly_unreachable_volatile
; IS__CGSCC____-SAME: () #[[ATTR2:[0-9]+]] {
; IS__CGSCC____-NEXT: store volatile i32 5, i32* null, align 4294967296
; IS__CGSCC____-NEXT: ret void
; ;
store volatile i32 5, i32* null store volatile i32 5, i32* null
ret void ret void
} }
define void @store_single_bb_unreachable(i1 %cond) { define void @store_single_bb_unreachable(i1 %cond) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@store_single_bb_unreachable ; CHECK-LABEL: define {{[^@]+}}@store_single_bb_unreachable
; IS__TUNIT____-SAME: (i1 [[COND:%.*]]) #[[ATTR0]] { ; CHECK-SAME: (i1 [[COND:%.*]]) #[[ATTR0]] {
; IS__TUNIT____-NEXT: br i1 [[COND]], label [[T:%.*]], label [[E:%.*]] ; CHECK-NEXT: br i1 [[COND]], label [[T:%.*]], label [[E:%.*]]
; IS__TUNIT____: t: ; CHECK: t:
; IS__TUNIT____-NEXT: unreachable ; CHECK-NEXT: unreachable
; IS__TUNIT____: e: ; CHECK: e:
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@store_single_bb_unreachable
; IS__CGSCC____-SAME: (i1 [[COND:%.*]]) #[[ATTR0]] {
; IS__CGSCC____-NEXT: br i1 [[COND]], label [[T:%.*]], label [[E:%.*]]
; IS__CGSCC____: t:
; IS__CGSCC____-NEXT: unreachable
; IS__CGSCC____: e:
; IS__CGSCC____-NEXT: ret void
; ;
br i1 %cond, label %t, label %e br i1 %cond, label %t, label %e
t: t:
store i32 5, i32* null store i32 5, i32* null
br label %e br label %e
e: e:
ret void ret void
} }
define void @store_null_pointer_is_defined() null_pointer_is_valid { define void @store_null_pointer_is_defined() null_pointer_is_valid {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind null_pointer_is_valid willreturn writeonly ; CHECK: Function Attrs: nofree norecurse nosync nounwind null_pointer_is_valid willreturn writeonly
; IS__TUNIT____-LABEL: define {{[^@]+}}@store_null_pointer_is_defined ; CHECK-LABEL: define {{[^@]+}}@store_null_pointer_is_defined
; IS__TUNIT____-SAME: () #[[ATTR3:[0-9]+]] { ; CHECK-SAME: () #[[ATTR3:[0-9]+]] {
; IS__TUNIT____-NEXT: store i32 5, i32* null, align 4294967296 ; CHECK-NEXT: store i32 5, i32* null, align 4294967296
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind null_pointer_is_valid willreturn writeonly
; IS__CGSCC____-LABEL: define {{[^@]+}}@store_null_pointer_is_defined
; IS__CGSCC____-SAME: () #[[ATTR3:[0-9]+]] {
; IS__CGSCC____-NEXT: store i32 5, i32* null, align 4294967296
; IS__CGSCC____-NEXT: ret void
; ;
store i32 5, i32* null store i32 5, i32* null
ret void ret void
} }
define void @store_null_propagated() { define void @store_null_propagated() {
; ATTRIBUTOR-LABEL: @store_null_propagated( ; ATTRIBUTOR-LABEL: @store_null_propagated(
; ATTRIBUTOR-NEXT: unreachable ; ATTRIBUTOR-NEXT: unreachable
; ;
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@store_null_propagated ; CHECK-LABEL: define {{[^@]+}}@store_null_propagated
; IS__TUNIT____-SAME: () #[[ATTR0]] { ; CHECK-SAME: () #[[ATTR0]] {
; IS__TUNIT____-NEXT: unreachable ; CHECK-NEXT: unreachable
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@store_null_propagated
; IS__CGSCC____-SAME: () #[[ATTR0]] {
; IS__CGSCC____-NEXT: unreachable
; ;
%ptr = call i32* @ret_null() %ptr = call i32* @ret_null()
store i32 5, i32* %ptr store i32 5, i32* %ptr
ret void ret void
} }
; -- AtomicRMW tests -- ; -- AtomicRMW tests --
define void @atomicrmw_wholly_unreachable() { define void @atomicrmw_wholly_unreachable() {
; IS__TUNIT____: Function Attrs: nofree nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@atomicrmw_wholly_unreachable ; CHECK-LABEL: define {{[^@]+}}@atomicrmw_wholly_unreachable
; IS__TUNIT____-SAME: () #[[ATTR2]] { ; CHECK-SAME: () #[[ATTR2]] {
; IS__TUNIT____-NEXT: unreachable ; CHECK-NEXT: unreachable
;
; IS__CGSCC____: Function Attrs: nofree norecurse nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@atomicrmw_wholly_unreachable
; IS__CGSCC____-SAME: () #[[ATTR2]] {
; IS__CGSCC____-NEXT: unreachable
; ;
%a = atomicrmw add i32* null, i32 1 acquire %a = atomicrmw add i32* null, i32 1 acquire
ret void ret void
} }
define void @atomicrmw_single_bb_unreachable(i1 %cond) { define void @atomicrmw_single_bb_unreachable(i1 %cond) {
; IS__TUNIT____: Function Attrs: nofree nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@atomicrmw_single_bb_unreachable ; CHECK-LABEL: define {{[^@]+}}@atomicrmw_single_bb_unreachable
; IS__TUNIT____-SAME: (i1 [[COND:%.*]]) #[[ATTR2]] { ; CHECK-SAME: (i1 [[COND:%.*]]) #[[ATTR2]] {
; IS__TUNIT____-NEXT: br i1 [[COND]], label [[T:%.*]], label [[E:%.*]] ; CHECK-NEXT: br i1 [[COND]], label [[T:%.*]], label [[E:%.*]]
; IS__TUNIT____: t: ; CHECK: t:
; IS__TUNIT____-NEXT: unreachable ; CHECK-NEXT: unreachable
; IS__TUNIT____: e: ; CHECK: e:
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: nofree norecurse nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@atomicrmw_single_bb_unreachable
; IS__CGSCC____-SAME: (i1 [[COND:%.*]]) #[[ATTR2]] {
; IS__CGSCC____-NEXT: br i1 [[COND]], label [[T:%.*]], label [[E:%.*]]
; IS__CGSCC____: t:
; IS__CGSCC____-NEXT: unreachable
; IS__CGSCC____: e:
; IS__CGSCC____-NEXT: ret void
; ;
br i1 %cond, label %t, label %e br i1 %cond, label %t, label %e
t: t:
%a = atomicrmw add i32* null, i32 1 acquire %a = atomicrmw add i32* null, i32 1 acquire
br label %e br label %e
e: e:
ret void ret void
} }
define void @atomicrmw_null_pointer_is_defined() null_pointer_is_valid { define void @atomicrmw_null_pointer_is_defined() null_pointer_is_valid {
; IS__TUNIT____: Function Attrs: nofree nounwind null_pointer_is_valid willreturn ; CHECK: Function Attrs: nofree norecurse nounwind null_pointer_is_valid willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@atomicrmw_null_pointer_is_defined ; CHECK-LABEL: define {{[^@]+}}@atomicrmw_null_pointer_is_defined
; IS__TUNIT____-SAME: () #[[ATTR4:[0-9]+]] { ; CHECK-SAME: () #[[ATTR4:[0-9]+]] {
; IS__TUNIT____-NEXT: [[A:%.*]] = atomicrmw add i32* null, i32 1 acquire, align 4 ; CHECK-NEXT: [[A:%.*]] = atomicrmw add i32* null, i32 1 acquire, align 4
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: nofree norecurse nounwind null_pointer_is_valid willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@atomicrmw_null_pointer_is_defined
; IS__CGSCC____-SAME: () #[[ATTR4:[0-9]+]] {
; IS__CGSCC____-NEXT: [[A:%.*]] = atomicrmw add i32* null, i32 1 acquire, align 4
; IS__CGSCC____-NEXT: ret void
; ;
%a = atomicrmw add i32* null, i32 1 acquire %a = atomicrmw add i32* null, i32 1 acquire
ret void ret void
} }
define void @atomicrmw_null_propagated() { define void @atomicrmw_null_propagated() {
; ATTRIBUTOR-LABEL: @atomicrmw_null_propagated( ; ATTRIBUTOR-LABEL: @atomicrmw_null_propagated(
; ATTRIBUTOR-NEXT: unreachable ; ATTRIBUTOR-NEXT: unreachable
; ;
; IS__TUNIT____: Function Attrs: nofree nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@atomicrmw_null_propagated ; CHECK-LABEL: define {{[^@]+}}@atomicrmw_null_propagated
; IS__TUNIT____-SAME: () #[[ATTR2]] { ; CHECK-SAME: () #[[ATTR2]] {
; IS__TUNIT____-NEXT: unreachable ; CHECK-NEXT: unreachable
;
; IS__CGSCC____: Function Attrs: nofree norecurse nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@atomicrmw_null_propagated
; IS__CGSCC____-SAME: () #[[ATTR2]] {
; IS__CGSCC____-NEXT: unreachable
; ;
%ptr = call i32* @ret_null() %ptr = call i32* @ret_null()
%a = atomicrmw add i32* %ptr, i32 1 acquire %a = atomicrmw add i32* %ptr, i32 1 acquire
ret void ret void
} }
; -- AtomicCmpXchg tests -- ; -- AtomicCmpXchg tests --
define void @atomiccmpxchg_wholly_unreachable() { define void @atomiccmpxchg_wholly_unreachable() {
; IS__TUNIT____: Function Attrs: nofree nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@atomiccmpxchg_wholly_unreachable ; CHECK-LABEL: define {{[^@]+}}@atomiccmpxchg_wholly_unreachable
; IS__TUNIT____-SAME: () #[[ATTR2]] { ; CHECK-SAME: () #[[ATTR2]] {
; IS__TUNIT____-NEXT: unreachable ; CHECK-NEXT: unreachable
;
; IS__CGSCC____: Function Attrs: nofree norecurse nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@atomiccmpxchg_wholly_unreachable
; IS__CGSCC____-SAME: () #[[ATTR2]] {
; IS__CGSCC____-NEXT: unreachable
; ;
%a = cmpxchg i32* null, i32 2, i32 3 acq_rel monotonic %a = cmpxchg i32* null, i32 2, i32 3 acq_rel monotonic
ret void ret void
} }
define void @atomiccmpxchg_single_bb_unreachable(i1 %cond) { define void @atomiccmpxchg_single_bb_unreachable(i1 %cond) {
; IS__TUNIT____: Function Attrs: nofree nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@atomiccmpxchg_single_bb_unreachable ; CHECK-LABEL: define {{[^@]+}}@atomiccmpxchg_single_bb_unreachable
; IS__TUNIT____-SAME: (i1 [[COND:%.*]]) #[[ATTR2]] { ; CHECK-SAME: (i1 [[COND:%.*]]) #[[ATTR2]] {
; IS__TUNIT____-NEXT: br i1 [[COND]], label [[T:%.*]], label [[E:%.*]] ; CHECK-NEXT: br i1 [[COND]], label [[T:%.*]], label [[E:%.*]]
; IS__TUNIT____: t: ; CHECK: t:
; IS__TUNIT____-NEXT: unreachable ; CHECK-NEXT: unreachable
; IS__TUNIT____: e: ; CHECK: e:
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: nofree norecurse nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@atomiccmpxchg_single_bb_unreachable
; IS__CGSCC____-SAME: (i1 [[COND:%.*]]) #[[ATTR2]] {
; IS__CGSCC____-NEXT: br i1 [[COND]], label [[T:%.*]], label [[E:%.*]]
; IS__CGSCC____: t:
; IS__CGSCC____-NEXT: unreachable
; IS__CGSCC____: e:
; IS__CGSCC____-NEXT: ret void
; ;
br i1 %cond, label %t, label %e br i1 %cond, label %t, label %e
t: t:
%a = cmpxchg i32* null, i32 2, i32 3 acq_rel monotonic %a = cmpxchg i32* null, i32 2, i32 3 acq_rel monotonic
br label %e br label %e
e: e:
ret void ret void
} }
define void @atomiccmpxchg_null_pointer_is_defined() null_pointer_is_valid { define void @atomiccmpxchg_null_pointer_is_defined() null_pointer_is_valid {
; IS__TUNIT____: Function Attrs: nofree nounwind null_pointer_is_valid willreturn ; CHECK: Function Attrs: nofree norecurse nounwind null_pointer_is_valid willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@atomiccmpxchg_null_pointer_is_defined ; CHECK-LABEL: define {{[^@]+}}@atomiccmpxchg_null_pointer_is_defined
; IS__TUNIT____-SAME: () #[[ATTR4]] { ; CHECK-SAME: () #[[ATTR4]] {
; IS__TUNIT____-NEXT: [[A:%.*]] = cmpxchg i32* null, i32 2, i32 3 acq_rel monotonic, align 4 ; CHECK-NEXT: [[A:%.*]] = cmpxchg i32* null, i32 2, i32 3 acq_rel monotonic, align 4
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: nofree norecurse nounwind null_pointer_is_valid willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@atomiccmpxchg_null_pointer_is_defined
; IS__CGSCC____-SAME: () #[[ATTR4]] {
; IS__CGSCC____-NEXT: [[A:%.*]] = cmpxchg i32* null, i32 2, i32 3 acq_rel monotonic, align 4
; IS__CGSCC____-NEXT: ret void
; ;
%a = cmpxchg i32* null, i32 2, i32 3 acq_rel monotonic %a = cmpxchg i32* null, i32 2, i32 3 acq_rel monotonic
ret void ret void
} }
define void @atomiccmpxchg_null_propagated() { define void @atomiccmpxchg_null_propagated() {
; ATTRIBUTOR-LABEL: @atomiccmpxchg_null_propagated( ; ATTRIBUTOR-LABEL: @atomiccmpxchg_null_propagated(
; ATTRIBUTOR-NEXT: unreachable ; ATTRIBUTOR-NEXT: unreachable
; ;
; IS__TUNIT____: Function Attrs: nofree nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@atomiccmpxchg_null_propagated ; CHECK-LABEL: define {{[^@]+}}@atomiccmpxchg_null_propagated
; IS__TUNIT____-SAME: () #[[ATTR2]] { ; CHECK-SAME: () #[[ATTR2]] {
; IS__TUNIT____-NEXT: unreachable ; CHECK-NEXT: unreachable
;
; IS__CGSCC____: Function Attrs: nofree norecurse nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@atomiccmpxchg_null_propagated
; IS__CGSCC____-SAME: () #[[ATTR2]] {
; IS__CGSCC____-NEXT: unreachable
; ;
%ptr = call i32* @ret_null() %ptr = call i32* @ret_null()
%a = cmpxchg i32* %ptr, i32 2, i32 3 acq_rel monotonic %a = cmpxchg i32* %ptr, i32 2, i32 3 acq_rel monotonic
ret void ret void
} }
; -- Conditional branching tests -- ; -- Conditional branching tests --
; Note: The unreachable on %t and %e is _not_ from AAUndefinedBehavior ; Note: The unreachable on %t and %e is _not_ from AAUndefinedBehavior
define i32 @cond_br_on_undef() { define i32 @cond_br_on_undef() {
; IS__TUNIT____: Function Attrs: nofree noreturn nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse noreturn nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@cond_br_on_undef ; CHECK-LABEL: define {{[^@]+}}@cond_br_on_undef
; IS__TUNIT____-SAME: () #[[ATTR5:[0-9]+]] { ; CHECK-SAME: () #[[ATTR5:[0-9]+]] {
; IS__TUNIT____-NEXT: unreachable ; CHECK-NEXT: unreachable
; IS__TUNIT____: t: ; CHECK: t:
; IS__TUNIT____-NEXT: unreachable ; CHECK-NEXT: unreachable
; IS__TUNIT____: e: ; CHECK: e:
; IS__TUNIT____-NEXT: unreachable ; CHECK-NEXT: unreachable
;
; IS__CGSCC____: Function Attrs: nofree norecurse noreturn nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@cond_br_on_undef
; IS__CGSCC____-SAME: () #[[ATTR5:[0-9]+]] {
; IS__CGSCC____-NEXT: unreachable
; IS__CGSCC____: t:
; IS__CGSCC____-NEXT: unreachable
; IS__CGSCC____: e:
; IS__CGSCC____-NEXT: unreachable
; ;
br i1 undef, label %t, label %e br i1 undef, label %t, label %e
t: t:
ret i32 1 ret i32 1
e: e:
ret i32 2 ret i32 2
} }
; More complicated branching ; More complicated branching
; Valid branch - verify that this is not converted ; Valid branch - verify that this is not converted
; to unreachable. ; to unreachable.
define void @cond_br_on_undef2(i1 %cond) { define void @cond_br_on_undef2(i1 %cond) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@cond_br_on_undef2 ; CHECK-LABEL: define {{[^@]+}}@cond_br_on_undef2
; IS__TUNIT____-SAME: (i1 [[COND:%.*]]) #[[ATTR0]] { ; CHECK-SAME: (i1 [[COND:%.*]]) #[[ATTR0]] {
; IS__TUNIT____-NEXT: br i1 [[COND]], label [[T1:%.*]], label [[E1:%.*]] ; CHECK-NEXT: br i1 [[COND]], label [[T1:%.*]], label [[E1:%.*]]
; IS__TUNIT____: t1: ; CHECK: t1:
; IS__TUNIT____-NEXT: unreachable ; CHECK-NEXT: unreachable
; IS__TUNIT____: t2: ; CHECK: t2:
; IS__TUNIT____-NEXT: unreachable ; CHECK-NEXT: unreachable
; IS__TUNIT____: e2: ; CHECK: e2:
; IS__TUNIT____-NEXT: unreachable ; CHECK-NEXT: unreachable
; IS__TUNIT____: e1: ; CHECK: e1:
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@cond_br_on_undef2
; IS__CGSCC____-SAME: (i1 [[COND:%.*]]) #[[ATTR0]] {
; IS__CGSCC____-NEXT: br i1 [[COND]], label [[T1:%.*]], label [[E1:%.*]]
; IS__CGSCC____: t1:
; IS__CGSCC____-NEXT: unreachable
; IS__CGSCC____: t2:
; IS__CGSCC____-NEXT: unreachable
; IS__CGSCC____: e2:
; IS__CGSCC____-NEXT: unreachable
; IS__CGSCC____: e1:
; IS__CGSCC____-NEXT: ret void
; ;
br i1 %cond, label %t1, label %e1 br i1 %cond, label %t1, label %e1
t1: t1:
br i1 undef, label %t2, label %e2 br i1 undef, label %t2, label %e2
t2: t2:
ret void ret void
e2: e2:
ret void ret void
e1: e1:
ret void ret void
} }
define i1 @ret_undef() { define i1 @ret_undef() {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@ret_undef ; CHECK-LABEL: define {{[^@]+}}@ret_undef
; IS__TUNIT____-SAME: () #[[ATTR0]] { ; CHECK-SAME: () #[[ATTR0]] {
; IS__TUNIT____-NEXT: ret i1 undef ; CHECK-NEXT: ret i1 undef
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@ret_undef
; IS__CGSCC____-SAME: () #[[ATTR0]] {
; IS__CGSCC____-NEXT: ret i1 undef
; ;
ret i1 undef ret i1 undef
} }
define void @cond_br_on_undef_interproc() { define void @cond_br_on_undef_interproc() {
; IS__TUNIT____: Function Attrs: nofree noreturn nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse noreturn nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@cond_br_on_undef_interproc ; CHECK-LABEL: define {{[^@]+}}@cond_br_on_undef_interproc
; IS__TUNIT____-SAME: () #[[ATTR5]] { ; CHECK-SAME: () #[[ATTR5]] {
; IS__TUNIT____-NEXT: unreachable ; CHECK-NEXT: unreachable
; IS__TUNIT____: t: ; CHECK: t:
; IS__TUNIT____-NEXT: unreachable ; CHECK-NEXT: unreachable
; IS__TUNIT____: e: ; CHECK: e:
; IS__TUNIT____-NEXT: unreachable ; CHECK-NEXT: unreachable
;
; IS__CGSCC____: Function Attrs: nofree norecurse noreturn nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@cond_br_on_undef_interproc
; IS__CGSCC____-SAME: () #[[ATTR5]] {
; IS__CGSCC____-NEXT: unreachable
; IS__CGSCC____: t:
; IS__CGSCC____-NEXT: unreachable
; IS__CGSCC____: e:
; IS__CGSCC____-NEXT: unreachable
; ;
%cond = call i1 @ret_undef() %cond = call i1 @ret_undef()
br i1 %cond, label %t, label %e br i1 %cond, label %t, label %e
t: t:
ret void ret void
e: e:
ret void ret void
} }
define i1 @ret_undef2() { define i1 @ret_undef2() {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@ret_undef2 ; CHECK-LABEL: define {{[^@]+}}@ret_undef2
; IS__TUNIT____-SAME: () #[[ATTR0]] { ; CHECK-SAME: () #[[ATTR0]] {
; IS__TUNIT____-NEXT: br i1 true, label [[T:%.*]], label [[E:%.*]] ; CHECK-NEXT: br i1 true, label [[T:%.*]], label [[E:%.*]]
; IS__TUNIT____: t: ; CHECK: t:
; IS__TUNIT____-NEXT: ret i1 undef ; CHECK-NEXT: ret i1 undef
; IS__TUNIT____: e: ; CHECK: e:
; IS__TUNIT____-NEXT: unreachable ; CHECK-NEXT: unreachable
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@ret_undef2
; IS__CGSCC____-SAME: () #[[ATTR0]] {
; IS__CGSCC____-NEXT: br i1 true, label [[T:%.*]], label [[E:%.*]]
; IS__CGSCC____: t:
; IS__CGSCC____-NEXT: ret i1 undef
; IS__CGSCC____: e:
; IS__CGSCC____-NEXT: unreachable
; ;
br i1 true, label %t, label %e br i1 true, label %t, label %e
t: t:
ret i1 undef ret i1 undef
e: e:
ret i1 undef ret i1 undef
} }
; More complicated interproc deduction of undef ; More complicated interproc deduction of undef
define void @cond_br_on_undef_interproc2() { define void @cond_br_on_undef_interproc2() {
; IS__TUNIT____: Function Attrs: nofree noreturn nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse noreturn nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@cond_br_on_undef_interproc2 ; CHECK-LABEL: define {{[^@]+}}@cond_br_on_undef_interproc2
; IS__TUNIT____-SAME: () #[[ATTR5]] { ; CHECK-SAME: () #[[ATTR5]] {
; IS__TUNIT____-NEXT: unreachable ; CHECK-NEXT: unreachable
; IS__TUNIT____: t: ; CHECK: t:
; IS__TUNIT____-NEXT: unreachable ; CHECK-NEXT: unreachable
; IS__TUNIT____: e: ; CHECK: e:
; IS__TUNIT____-NEXT: unreachable ; CHECK-NEXT: unreachable
;
; IS__CGSCC____: Function Attrs: nofree norecurse noreturn nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@cond_br_on_undef_interproc2
; IS__CGSCC____-SAME: () #[[ATTR5]] {
; IS__CGSCC____-NEXT: unreachable
; IS__CGSCC____: t:
; IS__CGSCC____-NEXT: unreachable
; IS__CGSCC____: e:
; IS__CGSCC____-NEXT: unreachable
; ;
%cond = call i1 @ret_undef2() %cond = call i1 @ret_undef2()
br i1 %cond, label %t, label %e br i1 %cond, label %t, label %e
t: t:
ret void ret void
e: e:
ret void ret void
} }
; Branch on undef that depends on propagation of ; Branch on undef that depends on propagation of
; undef of a previous instruction. ; undef of a previous instruction.
define i32 @cond_br_on_undef3() { define i32 @cond_br_on_undef3() {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@cond_br_on_undef3 ; CHECK-LABEL: define {{[^@]+}}@cond_br_on_undef3
; IS__TUNIT____-SAME: () #[[ATTR0]] { ; CHECK-SAME: () #[[ATTR0]] {
; IS__TUNIT____-NEXT: br label [[T:%.*]] ; CHECK-NEXT: br label [[T:%.*]]
; IS__TUNIT____: t: ; CHECK: t:
; IS__TUNIT____-NEXT: ret i32 1 ; CHECK-NEXT: ret i32 1
; IS__TUNIT____: e: ; CHECK: e:
; IS__TUNIT____-NEXT: unreachable ; CHECK-NEXT: unreachable
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@cond_br_on_undef3
; IS__CGSCC____-SAME: () #[[ATTR0]] {
; IS__CGSCC____-NEXT: br label [[T:%.*]]
; IS__CGSCC____: t:
; IS__CGSCC____-NEXT: ret i32 1
; IS__CGSCC____: e:
; IS__CGSCC____-NEXT: unreachable
; ;
%cond = icmp ne i32 1, undef %cond = icmp ne i32 1, undef
br i1 %cond, label %t, label %e br i1 %cond, label %t, label %e
t: t:
ret i32 1 ret i32 1
e: e:
ret i32 2 ret i32 2
} }
; Branch on undef because of uninitialized value. ; Branch on undef because of uninitialized value.
; FIXME: Currently it doesn't propagate the undef. ; FIXME: Currently it doesn't propagate the undef.
define i32 @cond_br_on_undef_uninit() { define i32 @cond_br_on_undef_uninit() {
; IS__TUNIT____: Function Attrs: nofree noreturn nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse noreturn nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@cond_br_on_undef_uninit ; CHECK-LABEL: define {{[^@]+}}@cond_br_on_undef_uninit
; IS__TUNIT____-SAME: () #[[ATTR5]] { ; CHECK-SAME: () #[[ATTR5]] {
; IS__TUNIT____-NEXT: unreachable ; CHECK-NEXT: unreachable
; IS__TUNIT____: t: ; CHECK: t:
; IS__TUNIT____-NEXT: unreachable ; CHECK-NEXT: unreachable
; IS__TUNIT____: e: ; CHECK: e:
; IS__TUNIT____-NEXT: unreachable ; CHECK-NEXT: unreachable
;
; IS__CGSCC____: Function Attrs: nofree norecurse noreturn nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@cond_br_on_undef_uninit
; IS__CGSCC____-SAME: () #[[ATTR5]] {
; IS__CGSCC____-NEXT: unreachable
; IS__CGSCC____: t:
; IS__CGSCC____-NEXT: unreachable
; IS__CGSCC____: e:
; IS__CGSCC____-NEXT: unreachable
; ;
%alloc = alloca i1 %alloc = alloca i1
%cond = load i1, i1* %alloc %cond = load i1, i1* %alloc
br i1 %cond, label %t, label %e br i1 %cond, label %t, label %e
t: t:
ret i32 1 ret i32 1
e: e:
ret i32 2 ret i32 2
Show All 22 Lines
T: T:
ret i32 %A.0 ret i32 %A.0
F: F:
ret i32 1 ret i32 1
} }
define i32 @foo() { define i32 @foo() {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@foo ; CHECK-LABEL: define {{[^@]+}}@foo
; IS__TUNIT____-SAME: () #[[ATTR0]] { ; CHECK-SAME: () #[[ATTR0]] {
; IS__TUNIT____-NEXT: ret i32 1 ; CHECK-NEXT: ret i32 1
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@foo
; IS__CGSCC____-SAME: () #[[ATTR0]] {
; IS__CGSCC____-NEXT: ret i32 1
; ;
%X = call i32 @callee(i1 false, i32* null) %X = call i32 @callee(i1 false, i32* null)
ret i32 %X ret i32 %X
} }
; Tests for nonnull noundef attribute violation. ; Tests for nonnull noundef attribute violation.
; ;
; Tests for argument position ; Tests for argument position
define void @arg_nonnull_1(i32* nonnull %a) { define void @arg_nonnull_1(i32* nonnull %a) {
; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind willreturn writeonly ; CHECK: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__TUNIT____-LABEL: define {{[^@]+}}@arg_nonnull_1 ; CHECK-LABEL: define {{[^@]+}}@arg_nonnull_1
; IS__TUNIT____-SAME: (i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR6:[0-9]+]] { ; CHECK-SAME: (i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR6:[0-9]+]] {
; IS__TUNIT____-NEXT: store i32 0, i32* [[A]], align 4 ; CHECK-NEXT: store i32 0, i32* [[A]], align 4
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC____-LABEL: define {{[^@]+}}@arg_nonnull_1
; IS__CGSCC____-SAME: (i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR6:[0-9]+]] {
; IS__CGSCC____-NEXT: store i32 0, i32* [[A]], align 4
; IS__CGSCC____-NEXT: ret void
; ;
store i32 0, i32* %a store i32 0, i32* %a
ret void ret void
} }
define void @arg_nonnull_1_noundef_1(i32* nonnull noundef %a) { define void @arg_nonnull_1_noundef_1(i32* nonnull noundef %a) {
; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind willreturn writeonly ; CHECK: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__TUNIT____-LABEL: define {{[^@]+}}@arg_nonnull_1_noundef_1 ; CHECK-LABEL: define {{[^@]+}}@arg_nonnull_1_noundef_1
; IS__TUNIT____-SAME: (i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR6]] { ; CHECK-SAME: (i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR6]] {
; IS__TUNIT____-NEXT: store i32 0, i32* [[A]], align 4 ; CHECK-NEXT: store i32 0, i32* [[A]], align 4
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC____-LABEL: define {{[^@]+}}@arg_nonnull_1_noundef_1
; IS__CGSCC____-SAME: (i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR6]] {
; IS__CGSCC____-NEXT: store i32 0, i32* [[A]], align 4
; IS__CGSCC____-NEXT: ret void
; ;
store i32 0, i32* %a store i32 0, i32* %a
ret void ret void
} }
define void @arg_nonnull_12(i32* nonnull %a, i32* nonnull %b, i32* %c) { define void @arg_nonnull_12(i32* nonnull %a, i32* nonnull %b, i32* %c) {
; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind willreturn writeonly ; CHECK: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__TUNIT____-LABEL: define {{[^@]+}}@arg_nonnull_12 ; CHECK-LABEL: define {{[^@]+}}@arg_nonnull_12
; IS__TUNIT____-SAME: (i32* nocapture nofree nonnull writeonly [[A:%.*]], i32* nocapture nofree nonnull writeonly [[B:%.*]], i32* nofree writeonly [[C:%.*]]) #[[ATTR6]] { ; CHECK-SAME: (i32* nocapture nofree nonnull writeonly [[A:%.*]], i32* nocapture nofree nonnull writeonly [[B:%.*]], i32* nofree writeonly [[C:%.*]]) #[[ATTR6]] {
; IS__TUNIT____-NEXT: [[D:%.*]] = icmp eq i32* [[C]], null ; CHECK-NEXT: [[D:%.*]] = icmp eq i32* [[C]], null
; IS__TUNIT____-NEXT: br i1 [[D]], label [[T:%.*]], label [[F:%.*]] ; CHECK-NEXT: br i1 [[D]], label [[T:%.*]], label [[F:%.*]]
; IS__TUNIT____: t: ; CHECK: t:
; IS__TUNIT____-NEXT: store i32 0, i32* [[A]], align 4 ; CHECK-NEXT: store i32 0, i32* [[A]], align 4
; IS__TUNIT____-NEXT: br label [[RET:%.*]] ; CHECK-NEXT: br label [[RET:%.*]]
; IS__TUNIT____: f: ; CHECK: f:
; IS__TUNIT____-NEXT: store i32 1, i32* [[B]], align 4 ; CHECK-NEXT: store i32 1, i32* [[B]], align 4
; IS__TUNIT____-NEXT: br label [[RET]] ; CHECK-NEXT: br label [[RET]]
; IS__TUNIT____: ret: ; CHECK: ret:
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC____-LABEL: define {{[^@]+}}@arg_nonnull_12
; IS__CGSCC____-SAME: (i32* nocapture nofree nonnull writeonly [[A:%.*]], i32* nocapture nofree nonnull writeonly [[B:%.*]], i32* nofree writeonly [[C:%.*]]) #[[ATTR6]] {
; IS__CGSCC____-NEXT: [[D:%.*]] = icmp eq i32* [[C]], null
; IS__CGSCC____-NEXT: br i1 [[D]], label [[T:%.*]], label [[F:%.*]]
; IS__CGSCC____: t:
; IS__CGSCC____-NEXT: store i32 0, i32* [[A]], align 4
; IS__CGSCC____-NEXT: br label [[RET:%.*]]
; IS__CGSCC____: f:
; IS__CGSCC____-NEXT: store i32 1, i32* [[B]], align 4
; IS__CGSCC____-NEXT: br label [[RET]]
; IS__CGSCC____: ret:
; IS__CGSCC____-NEXT: ret void
; ;
%d = icmp eq i32* %c, null %d = icmp eq i32* %c, null
br i1 %d, label %t, label %f br i1 %d, label %t, label %f
t: t:
store i32 0, i32* %a store i32 0, i32* %a
br label %ret br label %ret
f: f:
store i32 1, i32* %b store i32 1, i32* %b
br label %ret br label %ret
ret: ret:
ret void ret void
} }
define void @arg_nonnull_12_noundef_2(i32* nonnull %a, i32* noundef nonnull %b, i32* %c) { define void @arg_nonnull_12_noundef_2(i32* nonnull %a, i32* noundef nonnull %b, i32* %c) {
; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind willreturn writeonly ; CHECK: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__TUNIT____-LABEL: define {{[^@]+}}@arg_nonnull_12_noundef_2 ; CHECK-LABEL: define {{[^@]+}}@arg_nonnull_12_noundef_2
; IS__TUNIT____-SAME: (i32* nocapture nofree nonnull writeonly [[A:%.*]], i32* nocapture nofree noundef nonnull writeonly [[B:%.*]], i32* nofree writeonly [[C:%.*]]) #[[ATTR6]] { ; CHECK-SAME: (i32* nocapture nofree nonnull writeonly [[A:%.*]], i32* nocapture nofree noundef nonnull writeonly [[B:%.*]], i32* nofree writeonly [[C:%.*]]) #[[ATTR6]] {
; IS__TUNIT____-NEXT: [[D:%.*]] = icmp eq i32* [[C]], null ; CHECK-NEXT: [[D:%.*]] = icmp eq i32* [[C]], null
; IS__TUNIT____-NEXT: br i1 [[D]], label [[T:%.*]], label [[F:%.*]] ; CHECK-NEXT: br i1 [[D]], label [[T:%.*]], label [[F:%.*]]
; IS__TUNIT____: t: ; CHECK: t:
; IS__TUNIT____-NEXT: store i32 0, i32* [[A]], align 4 ; CHECK-NEXT: store i32 0, i32* [[A]], align 4
; IS__TUNIT____-NEXT: br label [[RET:%.*]] ; CHECK-NEXT: br label [[RET:%.*]]
; IS__TUNIT____: f: ; CHECK: f:
; IS__TUNIT____-NEXT: store i32 1, i32* [[B]], align 4 ; CHECK-NEXT: store i32 1, i32* [[B]], align 4
; IS__TUNIT____-NEXT: br label [[RET]] ; CHECK-NEXT: br label [[RET]]
; IS__TUNIT____: ret: ; CHECK: ret:
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC____-LABEL: define {{[^@]+}}@arg_nonnull_12_noundef_2
; IS__CGSCC____-SAME: (i32* nocapture nofree nonnull writeonly [[A:%.*]], i32* nocapture nofree noundef nonnull writeonly [[B:%.*]], i32* nofree writeonly [[C:%.*]]) #[[ATTR6]] {
; IS__CGSCC____-NEXT: [[D:%.*]] = icmp eq i32* [[C]], null
; IS__CGSCC____-NEXT: br i1 [[D]], label [[T:%.*]], label [[F:%.*]]
; IS__CGSCC____: t:
; IS__CGSCC____-NEXT: store i32 0, i32* [[A]], align 4
; IS__CGSCC____-NEXT: br label [[RET:%.*]]
; IS__CGSCC____: f:
; IS__CGSCC____-NEXT: store i32 1, i32* [[B]], align 4
; IS__CGSCC____-NEXT: br label [[RET]]
; IS__CGSCC____: ret:
; IS__CGSCC____-NEXT: ret void
; ;
%d = icmp eq i32* %c, null %d = icmp eq i32* %c, null
br i1 %d, label %t, label %f br i1 %d, label %t, label %f
t: t:
store i32 0, i32* %a store i32 0, i32* %a
br label %ret br label %ret
f: f:
store i32 1, i32* %b store i32 1, i32* %b
br label %ret br label %ret
ret: ret:
ret void ret void
} }
; Pass null directly to argument with nonnull attribute ; Pass null directly to argument with nonnull attribute
define void @arg_nonnull_violation1_1() { define void @arg_nonnull_violation1_1() {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@arg_nonnull_violation1_1 ; CHECK-LABEL: define {{[^@]+}}@arg_nonnull_violation1_1
; IS__TUNIT____-SAME: () #[[ATTR0]] { ; CHECK-SAME: () #[[ATTR0]] {
; IS__TUNIT____-NEXT: unreachable ; CHECK-NEXT: unreachable
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@arg_nonnull_violation1_1
; IS__CGSCC____-SAME: () #[[ATTR0]] {
; IS__CGSCC____-NEXT: unreachable
; ;
call void @arg_nonnull_1(i32* null) call void @arg_nonnull_1(i32* null)
ret void ret void
} }
define void @arg_nonnull_violation1_2() { define void @arg_nonnull_violation1_2() {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@arg_nonnull_violation1_2 ; CHECK-LABEL: define {{[^@]+}}@arg_nonnull_violation1_2
; IS__TUNIT____-SAME: () #[[ATTR0]] { ; CHECK-SAME: () #[[ATTR0]] {
; IS__TUNIT____-NEXT: unreachable ; CHECK-NEXT: unreachable
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@arg_nonnull_violation1_2
; IS__CGSCC____-SAME: () #[[ATTR0]] {
; IS__CGSCC____-NEXT: unreachable
; ;
call void @arg_nonnull_1_noundef_1(i32* null) call void @arg_nonnull_1_noundef_1(i32* null)
ret void ret void
} }
; A case that depends on value simplification ; A case that depends on value simplification
define void @arg_nonnull_violation2_1(i1 %c) { define void @arg_nonnull_violation2_1(i1 %c) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@arg_nonnull_violation2_1 ; CHECK-LABEL: define {{[^@]+}}@arg_nonnull_violation2_1
; IS__TUNIT____-SAME: (i1 [[C:%.*]]) #[[ATTR0]] { ; CHECK-SAME: (i1 [[C:%.*]]) #[[ATTR0]] {
; IS__TUNIT____-NEXT: unreachable ; CHECK-NEXT: unreachable
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@arg_nonnull_violation2_1
; IS__CGSCC____-SAME: (i1 [[C:%.*]]) #[[ATTR0]] {
; IS__CGSCC____-NEXT: unreachable
; ;
%null = getelementptr i32, i32* null, i32 0 %null = getelementptr i32, i32* null, i32 0
%mustnull = select i1 %c, i32* null, i32* %null %mustnull = select i1 %c, i32* null, i32* %null
call void @arg_nonnull_1(i32* %mustnull) call void @arg_nonnull_1(i32* %mustnull)
ret void ret void
} }
define void @arg_nonnull_violation2_2(i1 %c) { define void @arg_nonnull_violation2_2(i1 %c) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@arg_nonnull_violation2_2 ; CHECK-LABEL: define {{[^@]+}}@arg_nonnull_violation2_2
; IS__TUNIT____-SAME: (i1 [[C:%.*]]) #[[ATTR0]] { ; CHECK-SAME: (i1 [[C:%.*]]) #[[ATTR0]] {
; IS__TUNIT____-NEXT: unreachable ; CHECK-NEXT: unreachable
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@arg_nonnull_violation2_2
; IS__CGSCC____-SAME: (i1 [[C:%.*]]) #[[ATTR0]] {
; IS__CGSCC____-NEXT: unreachable
; ;
%null = getelementptr i32, i32* null, i32 0 %null = getelementptr i32, i32* null, i32 0
%mustnull = select i1 %c, i32* null, i32* %null %mustnull = select i1 %c, i32* null, i32* %null
call void @arg_nonnull_1_noundef_1(i32* %mustnull) call void @arg_nonnull_1_noundef_1(i32* %mustnull)
ret void ret void
} }
; Cases for single and multiple violation at a callsite ; Cases for single and multiple violation at a callsite
define void @arg_nonnull_violation3_1(i1 %c) { define void @arg_nonnull_violation3_1(i1 %c) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@arg_nonnull_violation3_1 ; CHECK-LABEL: define {{[^@]+}}@arg_nonnull_violation3_1
; IS__TUNIT____-SAME: (i1 [[C:%.*]]) #[[ATTR0]] { ; CHECK-SAME: (i1 [[C:%.*]]) #[[ATTR0]] {
; IS__TUNIT____-NEXT: [[PTR:%.*]] = alloca i32, align 4 ; CHECK-NEXT: [[PTR:%.*]] = alloca i32, align 4
; IS__TUNIT____-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]] ; CHECK-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]]
; IS__TUNIT____: t: ; CHECK: t:
; IS__TUNIT____-NEXT: call void @arg_nonnull_12(i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[PTR]], i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[PTR]], i32* nofree noundef nonnull writeonly align 4 dereferenceable(4) [[PTR]]) #[[ATTR7:[0-9]+]] ; CHECK-NEXT: call void @arg_nonnull_12(i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[PTR]], i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[PTR]], i32* nofree noundef nonnull writeonly align 4 dereferenceable(4) [[PTR]]) #[[ATTR7:[0-9]+]]
; IS__TUNIT____-NEXT: call void @arg_nonnull_12(i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[PTR]], i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[PTR]], i32* noalias nocapture nofree noundef writeonly align 4294967296 null) #[[ATTR7]] ; CHECK-NEXT: call void @arg_nonnull_12(i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[PTR]], i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[PTR]], i32* noalias nocapture nofree noundef writeonly align 4294967296 null) #[[ATTR7]]
; IS__TUNIT____-NEXT: unreachable ; CHECK-NEXT: unreachable
; IS__TUNIT____: f: ; CHECK: f:
; IS__TUNIT____-NEXT: unreachable ; CHECK-NEXT: unreachable
; IS__TUNIT____: ret: ; CHECK: ret:
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@arg_nonnull_violation3_1
; IS__CGSCC____-SAME: (i1 [[C:%.*]]) #[[ATTR0]] {
; IS__CGSCC____-NEXT: [[PTR:%.*]] = alloca i32, align 4
; IS__CGSCC____-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]]
; IS__CGSCC____: t:
; IS__CGSCC____-NEXT: call void @arg_nonnull_12(i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[PTR]], i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[PTR]], i32* nofree noundef nonnull writeonly align 4 dereferenceable(4) [[PTR]]) #[[ATTR7:[0-9]+]]
; IS__CGSCC____-NEXT: call void @arg_nonnull_12(i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[PTR]], i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[PTR]], i32* noalias nocapture nofree noundef writeonly align 4294967296 null) #[[ATTR7]]
; IS__CGSCC____-NEXT: unreachable
; IS__CGSCC____: f:
; IS__CGSCC____-NEXT: unreachable
; IS__CGSCC____: ret:
; IS__CGSCC____-NEXT: ret void
; ;
%ptr = alloca i32 %ptr = alloca i32
br i1 %c, label %t, label %f br i1 %c, label %t, label %f
t: t:
call void @arg_nonnull_12(i32* %ptr, i32* %ptr, i32* %ptr) call void @arg_nonnull_12(i32* %ptr, i32* %ptr, i32* %ptr)
call void @arg_nonnull_12(i32* %ptr, i32* %ptr, i32* null) call void @arg_nonnull_12(i32* %ptr, i32* %ptr, i32* null)
call void @arg_nonnull_12(i32* %ptr, i32* null, i32* %ptr) call void @arg_nonnull_12(i32* %ptr, i32* null, i32* %ptr)
call void @arg_nonnull_12(i32* %ptr, i32* null, i32* null) call void @arg_nonnull_12(i32* %ptr, i32* null, i32* null)
br label %ret br label %ret
f: f:
call void @arg_nonnull_12(i32* null, i32* %ptr, i32* %ptr) call void @arg_nonnull_12(i32* null, i32* %ptr, i32* %ptr)
call void @arg_nonnull_12(i32* null, i32* %ptr, i32* null) call void @arg_nonnull_12(i32* null, i32* %ptr, i32* null)
call void @arg_nonnull_12(i32* null, i32* null, i32* %ptr) call void @arg_nonnull_12(i32* null, i32* null, i32* %ptr)
call void @arg_nonnull_12(i32* null, i32* null, i32* null) call void @arg_nonnull_12(i32* null, i32* null, i32* null)
br label %ret br label %ret
ret: ret:
ret void ret void
} }
define void @arg_nonnull_violation3_2(i1 %c) { define void @arg_nonnull_violation3_2(i1 %c) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@arg_nonnull_violation3_2 ; CHECK-LABEL: define {{[^@]+}}@arg_nonnull_violation3_2
; IS__TUNIT____-SAME: (i1 [[C:%.*]]) #[[ATTR0]] { ; CHECK-SAME: (i1 [[C:%.*]]) #[[ATTR0]] {
; IS__TUNIT____-NEXT: [[PTR:%.*]] = alloca i32, align 4 ; CHECK-NEXT: [[PTR:%.*]] = alloca i32, align 4
; IS__TUNIT____-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]] ; CHECK-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]]
; IS__TUNIT____: t: ; CHECK: t:
; IS__TUNIT____-NEXT: call void @arg_nonnull_12_noundef_2(i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[PTR]], i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[PTR]], i32* nofree noundef nonnull writeonly align 4 dereferenceable(4) [[PTR]]) #[[ATTR7]] ; CHECK-NEXT: call void @arg_nonnull_12_noundef_2(i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[PTR]], i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[PTR]], i32* nofree noundef nonnull writeonly align 4 dereferenceable(4) [[PTR]]) #[[ATTR7]]
; IS__TUNIT____-NEXT: call void @arg_nonnull_12_noundef_2(i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[PTR]], i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[PTR]], i32* noalias nocapture nofree noundef writeonly align 4294967296 null) #[[ATTR7]] ; CHECK-NEXT: call void @arg_nonnull_12_noundef_2(i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[PTR]], i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[PTR]], i32* noalias nocapture nofree noundef writeonly align 4294967296 null) #[[ATTR7]]
; IS__TUNIT____-NEXT: unreachable ; CHECK-NEXT: unreachable
; IS__TUNIT____: f: ; CHECK: f:
; IS__TUNIT____-NEXT: unreachable ; CHECK-NEXT: unreachable
; IS__TUNIT____: ret: ; CHECK: ret:
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@arg_nonnull_violation3_2
; IS__CGSCC____-SAME: (i1 [[C:%.*]]) #[[ATTR0]] {
; IS__CGSCC____-NEXT: [[PTR:%.*]] = alloca i32, align 4
; IS__CGSCC____-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]]
; IS__CGSCC____: t:
; IS__CGSCC____-NEXT: call void @arg_nonnull_12_noundef_2(i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[PTR]], i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[PTR]], i32* nofree noundef nonnull writeonly align 4 dereferenceable(4) [[PTR]]) #[[ATTR7]]
; IS__CGSCC____-NEXT: call void @arg_nonnull_12_noundef_2(i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[PTR]], i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[PTR]], i32* noalias nocapture nofree noundef writeonly align 4294967296 null) #[[ATTR7]]
; IS__CGSCC____-NEXT: unreachable
; IS__CGSCC____: f:
; IS__CGSCC____-NEXT: unreachable
; IS__CGSCC____: ret:
; IS__CGSCC____-NEXT: ret void
; ;
%ptr = alloca i32 %ptr = alloca i32
br i1 %c, label %t, label %f br i1 %c, label %t, label %f
t: t:
call void @arg_nonnull_12_noundef_2(i32* %ptr, i32* %ptr, i32* %ptr) call void @arg_nonnull_12_noundef_2(i32* %ptr, i32* %ptr, i32* %ptr)
call void @arg_nonnull_12_noundef_2(i32* %ptr, i32* %ptr, i32* null) call void @arg_nonnull_12_noundef_2(i32* %ptr, i32* %ptr, i32* null)
call void @arg_nonnull_12_noundef_2(i32* %ptr, i32* null, i32* %ptr) call void @arg_nonnull_12_noundef_2(i32* %ptr, i32* null, i32* %ptr)
call void @arg_nonnull_12_noundef_2(i32* %ptr, i32* null, i32* null) call void @arg_nonnull_12_noundef_2(i32* %ptr, i32* null, i32* null)
br label %ret br label %ret
f: f:
call void @arg_nonnull_12_noundef_2(i32* null, i32* %ptr, i32* %ptr) call void @arg_nonnull_12_noundef_2(i32* null, i32* %ptr, i32* %ptr)
call void @arg_nonnull_12_noundef_2(i32* null, i32* %ptr, i32* null) call void @arg_nonnull_12_noundef_2(i32* null, i32* %ptr, i32* null)
call void @arg_nonnull_12_noundef_2(i32* null, i32* null, i32* %ptr) call void @arg_nonnull_12_noundef_2(i32* null, i32* null, i32* %ptr)
call void @arg_nonnull_12_noundef_2(i32* null, i32* null, i32* null) call void @arg_nonnull_12_noundef_2(i32* null, i32* null, i32* null)
br label %ret br label %ret
ret: ret:
ret void ret void
} }
; Tests for returned position ; Tests for returned position
define nonnull i32* @returned_nonnnull(i32 %c) { define nonnull i32* @returned_nonnnull(i32 %c) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@returned_nonnnull ; CHECK-LABEL: define {{[^@]+}}@returned_nonnnull
; IS__TUNIT____-SAME: (i32 [[C:%.*]]) #[[ATTR0]] { ; CHECK-SAME: (i32 [[C:%.*]]) #[[ATTR0]] {
; IS__TUNIT____-NEXT: switch i32 [[C]], label [[ONDEFAULT:%.*]] [ ; CHECK-NEXT: switch i32 [[C]], label [[ONDEFAULT:%.*]] [
; IS__TUNIT____-NEXT: i32 0, label [[ONZERO:%.*]] ; CHECK-NEXT: i32 0, label [[ONZERO:%.*]]
; IS__TUNIT____-NEXT: i32 1, label [[ONONE:%.*]] ; CHECK-NEXT: i32 1, label [[ONONE:%.*]]
; IS__TUNIT____-NEXT: ] ; CHECK-NEXT: ]
; IS__TUNIT____: onzero: ; CHECK: onzero:
; IS__TUNIT____-NEXT: [[PTR:%.*]] = alloca i32, align 4 ; CHECK-NEXT: [[PTR:%.*]] = alloca i32, align 4
; IS__TUNIT____-NEXT: ret i32* [[PTR]] ; CHECK-NEXT: ret i32* [[PTR]]
; IS__TUNIT____: onone: ; CHECK: onone:
; IS__TUNIT____-NEXT: ret i32* null ; CHECK-NEXT: ret i32* null
; IS__TUNIT____: ondefault: ; CHECK: ondefault:
; IS__TUNIT____-NEXT: ret i32* undef ; CHECK-NEXT: ret i32* undef
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@returned_nonnnull
; IS__CGSCC____-SAME: (i32 [[C:%.*]]) #[[ATTR0]] {
; IS__CGSCC____-NEXT: switch i32 [[C]], label [[ONDEFAULT:%.*]] [
; IS__CGSCC____-NEXT: i32 0, label [[ONZERO:%.*]]
; IS__CGSCC____-NEXT: i32 1, label [[ONONE:%.*]]
; IS__CGSCC____-NEXT: ]
; IS__CGSCC____: onzero:
; IS__CGSCC____-NEXT: [[PTR:%.*]] = alloca i32, align 4
; IS__CGSCC____-NEXT: ret i32* [[PTR]]
; IS__CGSCC____: onone:
; IS__CGSCC____-NEXT: ret i32* null
; IS__CGSCC____: ondefault:
; IS__CGSCC____-NEXT: ret i32* undef
; ;
switch i32 %c, label %ondefault [ i32 0, label %onzero switch i32 %c, label %ondefault [ i32 0, label %onzero
i32 1, label %onone ] i32 1, label %onone ]
onzero: onzero:
%ptr = alloca i32 %ptr = alloca i32
ret i32* %ptr ret i32* %ptr
onone: onone:
ret i32* null ret i32* null
ondefault: ondefault:
ret i32* undef ret i32* undef
} }
define noundef i32* @returned_noundef(i32 %c) { define noundef i32* @returned_noundef(i32 %c) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@returned_noundef ; CHECK-LABEL: define {{[^@]+}}@returned_noundef
; IS__TUNIT____-SAME: (i32 [[C:%.*]]) #[[ATTR0]] { ; CHECK-SAME: (i32 [[C:%.*]]) #[[ATTR0]] {
; IS__TUNIT____-NEXT: switch i32 [[C]], label [[ONDEFAULT:%.*]] [ ; CHECK-NEXT: switch i32 [[C]], label [[ONDEFAULT:%.*]] [
; IS__TUNIT____-NEXT: i32 0, label [[ONZERO:%.*]] ; CHECK-NEXT: i32 0, label [[ONZERO:%.*]]
; IS__TUNIT____-NEXT: i32 1, label [[ONONE:%.*]] ; CHECK-NEXT: i32 1, label [[ONONE:%.*]]
; IS__TUNIT____-NEXT: ] ; CHECK-NEXT: ]
; IS__TUNIT____: onzero: ; CHECK: onzero:
; IS__TUNIT____-NEXT: [[PTR:%.*]] = alloca i32, align 4 ; CHECK-NEXT: [[PTR:%.*]] = alloca i32, align 4
; IS__TUNIT____-NEXT: ret i32* [[PTR]] ; CHECK-NEXT: ret i32* [[PTR]]
; IS__TUNIT____: onone: ; CHECK: onone:
; IS__TUNIT____-NEXT: ret i32* null ; CHECK-NEXT: ret i32* null
; IS__TUNIT____: ondefault: ; CHECK: ondefault:
; IS__TUNIT____-NEXT: unreachable ; CHECK-NEXT: unreachable
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@returned_noundef
; IS__CGSCC____-SAME: (i32 [[C:%.*]]) #[[ATTR0]] {
; IS__CGSCC____-NEXT: switch i32 [[C]], label [[ONDEFAULT:%.*]] [
; IS__CGSCC____-NEXT: i32 0, label [[ONZERO:%.*]]
; IS__CGSCC____-NEXT: i32 1, label [[ONONE:%.*]]
; IS__CGSCC____-NEXT: ]
; IS__CGSCC____: onzero:
; IS__CGSCC____-NEXT: [[PTR:%.*]] = alloca i32, align 4
; IS__CGSCC____-NEXT: ret i32* [[PTR]]
; IS__CGSCC____: onone:
; IS__CGSCC____-NEXT: ret i32* null
; IS__CGSCC____: ondefault:
; IS__CGSCC____-NEXT: unreachable
; ;
switch i32 %c, label %ondefault [ i32 0, label %onzero switch i32 %c, label %ondefault [ i32 0, label %onzero
i32 1, label %onone ] i32 1, label %onone ]
onzero: onzero:
%ptr = alloca i32 %ptr = alloca i32
ret i32* %ptr ret i32* %ptr
onone: onone:
ret i32* null ret i32* null
ondefault: ondefault:
ret i32* undef ret i32* undef
} }
define nonnull noundef i32* @returned_nonnnull_noundef(i32 %c) { define nonnull noundef i32* @returned_nonnnull_noundef(i32 %c) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@returned_nonnnull_noundef ; CHECK-LABEL: define {{[^@]+}}@returned_nonnnull_noundef
; IS__TUNIT____-SAME: (i32 [[C:%.*]]) #[[ATTR0]] { ; CHECK-SAME: (i32 [[C:%.*]]) #[[ATTR0]] {
; IS__TUNIT____-NEXT: switch i32 [[C]], label [[ONDEFAULT:%.*]] [ ; CHECK-NEXT: switch i32 [[C]], label [[ONDEFAULT:%.*]] [
; IS__TUNIT____-NEXT: i32 0, label [[ONZERO:%.*]] ; CHECK-NEXT: i32 0, label [[ONZERO:%.*]]
; IS__TUNIT____-NEXT: i32 1, label [[ONONE:%.*]] ; CHECK-NEXT: i32 1, label [[ONONE:%.*]]
; IS__TUNIT____-NEXT: ] ; CHECK-NEXT: ]
; IS__TUNIT____: onzero: ; CHECK: onzero:
; IS__TUNIT____-NEXT: [[PTR:%.*]] = alloca i32, align 4 ; CHECK-NEXT: [[PTR:%.*]] = alloca i32, align 4
; IS__TUNIT____-NEXT: ret i32* [[PTR]] ; CHECK-NEXT: ret i32* [[PTR]]
; IS__TUNIT____: onone: ; CHECK: onone:
; IS__TUNIT____-NEXT: unreachable ; CHECK-NEXT: unreachable
; IS__TUNIT____: ondefault: ; CHECK: ondefault:
; IS__TUNIT____-NEXT: unreachable ; CHECK-NEXT: unreachable
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@returned_nonnnull_noundef
; IS__CGSCC____-SAME: (i32 [[C:%.*]]) #[[ATTR0]] {
; IS__CGSCC____-NEXT: switch i32 [[C]], label [[ONDEFAULT:%.*]] [
; IS__CGSCC____-NEXT: i32 0, label [[ONZERO:%.*]]
; IS__CGSCC____-NEXT: i32 1, label [[ONONE:%.*]]
; IS__CGSCC____-NEXT: ]
; IS__CGSCC____: onzero:
; IS__CGSCC____-NEXT: [[PTR:%.*]] = alloca i32, align 4
; IS__CGSCC____-NEXT: ret i32* [[PTR]]
; IS__CGSCC____: onone:
; IS__CGSCC____-NEXT: unreachable
; IS__CGSCC____: ondefault:
; IS__CGSCC____-NEXT: unreachable
; ;
switch i32 %c, label %ondefault [ i32 0, label %onzero switch i32 %c, label %ondefault [ i32 0, label %onzero
i32 1, label %onone ] i32 1, label %onone ]
onzero: onzero:
%ptr = alloca i32 %ptr = alloca i32
ret i32* %ptr ret i32* %ptr
onone: onone:
ret i32* null ret i32* null
ondefault: ondefault:
ret i32* undef ret i32* undef
} }
define noundef i32 @returned_nonnnull_noundef_int() { define noundef i32 @returned_nonnnull_noundef_int() {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@returned_nonnnull_noundef_int ; CHECK-LABEL: define {{[^@]+}}@returned_nonnnull_noundef_int
; IS__TUNIT____-SAME: () #[[ATTR0]] { ; CHECK-SAME: () #[[ATTR0]] {
; IS__TUNIT____-NEXT: ret i32 0 ; CHECK-NEXT: ret i32 0
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@returned_nonnnull_noundef_int
; IS__CGSCC____-SAME: () #[[ATTR0]] {
; IS__CGSCC____-NEXT: ret i32 0
; ;
ret i32 0 ret i32 0
} }
declare void @callee_int_arg(i32) declare void @callee_int_arg(i32)
define void @callsite_noundef_1() { define void @callsite_noundef_1() {
; CHECK-LABEL: define {{[^@]+}}@callsite_noundef_1() { ; CHECK-LABEL: define {{[^@]+}}@callsite_noundef_1() {
Show All 10 Lines
; CHECK-LABEL: define {{[^@]+}}@callsite_noundef_2() { ; CHECK-LABEL: define {{[^@]+}}@callsite_noundef_2() {
; CHECK-NEXT: unreachable ; CHECK-NEXT: unreachable
; ;
call void @callee_ptr_arg(i32* noundef undef) call void @callee_ptr_arg(i32* noundef undef)
ret void ret void
} }
define i32 @argument_noundef1(i32 noundef %c) { define i32 @argument_noundef1(i32 noundef %c) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@argument_noundef1 ; CHECK-LABEL: define {{[^@]+}}@argument_noundef1
; IS__TUNIT____-SAME: (i32 noundef returned [[C:%.*]]) #[[ATTR0]] { ; CHECK-SAME: (i32 noundef returned [[C:%.*]]) #[[ATTR0]] {
; IS__TUNIT____-NEXT: ret i32 [[C]] ; CHECK-NEXT: ret i32 [[C]]
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@argument_noundef1
; IS__CGSCC____-SAME: (i32 noundef returned [[C:%.*]]) #[[ATTR0]] {
; IS__CGSCC____-NEXT: ret i32 [[C]]
; ;
ret i32 %c ret i32 %c
} }
define i32 @violate_noundef_nonpointer() { define i32 @violate_noundef_nonpointer() {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@violate_noundef_nonpointer ; CHECK-LABEL: define {{[^@]+}}@violate_noundef_nonpointer
; IS__TUNIT____-SAME: () #[[ATTR0]] { ; CHECK-SAME: () #[[ATTR0]] {
; IS__TUNIT____-NEXT: ret i32 undef ; CHECK-NEXT: ret i32 undef
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@violate_noundef_nonpointer
; IS__CGSCC____-SAME: () #[[ATTR0]] {
; IS__CGSCC____-NEXT: ret i32 undef
; ;
%ret = call i32 @argument_noundef1(i32 undef) %ret = call i32 @argument_noundef1(i32 undef)
ret i32 %ret ret i32 %ret
} }
define i32* @argument_noundef2(i32* noundef %c) { define i32* @argument_noundef2(i32* noundef %c) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@argument_noundef2 ; CHECK-LABEL: define {{[^@]+}}@argument_noundef2
; IS__TUNIT____-SAME: (i32* nofree noundef readnone returned "no-capture-maybe-returned" [[C:%.*]]) #[[ATTR0]] { ; CHECK-SAME: (i32* nofree noundef readnone returned "no-capture-maybe-returned" [[C:%.*]]) #[[ATTR0]] {
; IS__TUNIT____-NEXT: ret i32* [[C]] ; CHECK-NEXT: ret i32* [[C]]
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@argument_noundef2
; IS__CGSCC____-SAME: (i32* nofree noundef readnone returned "no-capture-maybe-returned" [[C:%.*]]) #[[ATTR0]] {
; IS__CGSCC____-NEXT: ret i32* [[C]]
; ;
ret i32* %c ret i32* %c
} }
define i32* @violate_noundef_pointer() { define i32* @violate_noundef_pointer() {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@violate_noundef_pointer ; CHECK-LABEL: define {{[^@]+}}@violate_noundef_pointer
; IS__TUNIT____-SAME: () #[[ATTR0]] { ; CHECK-SAME: () #[[ATTR0]] {
; IS__TUNIT____-NEXT: ret i32* undef ; CHECK-NEXT: ret i32* undef
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@violate_noundef_pointer
; IS__CGSCC____-SAME: () #[[ATTR0]] {
; IS__CGSCC____-NEXT: ret i32* undef
; ;
%ret = call i32* @argument_noundef2(i32* undef) %ret = call i32* @argument_noundef2(i32* undef)
ret i32* %ret ret i32* %ret
} }
;. ;.
; IS__TUNIT____: attributes #[[ATTR0]] = { nofree nosync nounwind readnone willreturn } ; IS__TUNIT____: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__TUNIT____: attributes #[[ATTR1]] = { nofree nosync nounwind null_pointer_is_valid readnone willreturn } ; IS__TUNIT____: attributes #[[ATTR1]] = { nofree norecurse nosync nounwind null_pointer_is_valid readnone willreturn }
; IS__TUNIT____: attributes #[[ATTR2]] = { nofree nounwind readnone willreturn } ; IS__TUNIT____: attributes #[[ATTR2]] = { nofree norecurse nounwind readnone willreturn }
; IS__TUNIT____: attributes #[[ATTR3]] = { nofree nosync nounwind null_pointer_is_valid willreturn writeonly } ; IS__TUNIT____: attributes #[[ATTR3]] = { nofree norecurse nosync nounwind null_pointer_is_valid willreturn writeonly }
; IS__TUNIT____: attributes #[[ATTR4]] = { nofree nounwind null_pointer_is_valid willreturn } ; IS__TUNIT____: attributes #[[ATTR4]] = { nofree norecurse nounwind null_pointer_is_valid willreturn }
; IS__TUNIT____: attributes #[[ATTR5]] = { nofree noreturn nosync nounwind readnone willreturn } ; IS__TUNIT____: attributes #[[ATTR5]] = { nofree norecurse noreturn nosync nounwind readnone willreturn }
; IS__TUNIT____: attributes #[[ATTR6]] = { argmemonly nofree nosync nounwind willreturn writeonly } ; IS__TUNIT____: attributes #[[ATTR6]] = { argmemonly nofree norecurse nosync nounwind willreturn writeonly }
; IS__TUNIT____: attributes #[[ATTR7]] = { nofree nosync nounwind willreturn writeonly } ; IS__TUNIT____: attributes #[[ATTR7]] = { nofree nosync nounwind willreturn writeonly }
;. ;.
; IS__CGSCC____: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn } ; IS__CGSCC____: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__CGSCC____: attributes #[[ATTR1]] = { nofree norecurse nosync nounwind null_pointer_is_valid readnone willreturn } ; IS__CGSCC____: attributes #[[ATTR1]] = { nofree norecurse nosync nounwind null_pointer_is_valid readnone willreturn }
; IS__CGSCC____: attributes #[[ATTR2]] = { nofree norecurse nounwind readnone willreturn } ; IS__CGSCC____: attributes #[[ATTR2]] = { nofree norecurse nounwind readnone willreturn }
; IS__CGSCC____: attributes #[[ATTR3]] = { nofree norecurse nosync nounwind null_pointer_is_valid willreturn writeonly } ; IS__CGSCC____: attributes #[[ATTR3]] = { nofree norecurse nosync nounwind null_pointer_is_valid willreturn writeonly }
; IS__CGSCC____: attributes #[[ATTR4]] = { nofree norecurse nounwind null_pointer_is_valid willreturn } ; IS__CGSCC____: attributes #[[ATTR4]] = { nofree norecurse nounwind null_pointer_is_valid willreturn }
; IS__CGSCC____: attributes #[[ATTR5]] = { nofree norecurse noreturn nosync nounwind readnone willreturn } ; IS__CGSCC____: attributes #[[ATTR5]] = { nofree norecurse noreturn nosync nounwind readnone willreturn }
; IS__CGSCC____: attributes #[[ATTR6]] = { argmemonly nofree norecurse nosync nounwind willreturn writeonly } ; IS__CGSCC____: attributes #[[ATTR6]] = { argmemonly nofree norecurse nosync nounwind willreturn writeonly }
; IS__CGSCC____: attributes #[[ATTR7]] = { nounwind willreturn writeonly } ; IS__CGSCC____: attributes #[[ATTR7]] = { nounwind willreturn writeonly }
;. ;.

llvm/test/Transforms/Attributor/value-simplify-instances.ll

Show All 9 Lines
; Make sure we do *not* return true. ; Make sure we do *not* return true.
;. ;.
; CHECK: @[[G1:[a-zA-Z0-9_$"\\.-]+]] = private global i1* undef ; CHECK: @[[G1:[a-zA-Z0-9_$"\\.-]+]] = private global i1* undef
; CHECK: @[[G2:[a-zA-Z0-9_$"\\.-]+]] = private global i1* undef ; CHECK: @[[G2:[a-zA-Z0-9_$"\\.-]+]] = private global i1* undef
; CHECK: @[[G3:[a-zA-Z0-9_$"\\.-]+]] = private global i1 undef ; CHECK: @[[G3:[a-zA-Z0-9_$"\\.-]+]] = private global i1 undef
;. ;.
define internal i1 @recursive_inst_comparator(i1* %a, i1* %b) { define internal i1 @recursive_inst_comparator(i1* %a, i1* %b) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@recursive_inst_comparator ; CHECK-LABEL: define {{[^@]+}}@recursive_inst_comparator
; IS__TUNIT____-SAME: (i1* noalias nofree readnone [[A:%.*]], i1* noalias nofree readnone [[B:%.*]]) #[[ATTR0:[0-9]+]] { ; CHECK-SAME: (i1* noalias nofree readnone [[A:%.*]], i1* noalias nofree readnone [[B:%.*]]) #[[ATTR0:[0-9]+]] {
; IS__TUNIT____-NEXT: [[CMP:%.*]] = icmp eq i1* [[A]], [[B]] ; CHECK-NEXT: [[CMP:%.*]] = icmp eq i1* [[A]], [[B]]
; IS__TUNIT____-NEXT: ret i1 [[CMP]] ; CHECK-NEXT: ret i1 [[CMP]]
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@recursive_inst_comparator
; IS__CGSCC____-SAME: (i1* noalias nofree readnone [[A:%.*]], i1* noalias nofree readnone [[B:%.*]]) #[[ATTR0:[0-9]+]] {
; IS__CGSCC____-NEXT: [[CMP:%.*]] = icmp eq i1* [[A]], [[B]]
; IS__CGSCC____-NEXT: ret i1 [[CMP]]
; ;
%cmp = icmp eq i1* %a, %b %cmp = icmp eq i1* %a, %b
ret i1 %cmp ret i1 %cmp
} }
define internal i1 @recursive_inst_generator(i1 %c, i1* %p) { define internal i1 @recursive_inst_generator(i1 %c, i1* %p) {
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@recursive_inst_generator ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@recursive_inst_generator
; IS__TUNIT_OPM-SAME: (i1 [[C:%.*]], i1* nofree [[P:%.*]]) { ; IS__TUNIT_OPM-SAME: (i1 [[C:%.*]], i1* nofree [[P:%.*]]) {
; IS__TUNIT_OPM-NEXT: [[A:%.*]] = call i1* @geti1Ptr() ; IS__TUNIT_OPM-NEXT: [[A:%.*]] = call i1* @geti1Ptr()
; IS__TUNIT_OPM-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]] ; IS__TUNIT_OPM-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]]
; IS__TUNIT_OPM: t: ; IS__TUNIT_OPM: t:
; IS__TUNIT_OPM-NEXT: [[R1:%.*]] = call i1 @recursive_inst_comparator(i1* noalias nofree readnone [[A]], i1* noalias nofree readnone [[P]]) #[[ATTR4:[0-9]+]] ; IS__TUNIT_OPM-NEXT: [[R1:%.*]] = call i1 @recursive_inst_comparator(i1* noalias nofree readnone [[A]], i1* noalias nofree readnone [[P]]) #[[ATTR6:[0-9]+]]
; IS__TUNIT_OPM-NEXT: ret i1 [[R1]] ; IS__TUNIT_OPM-NEXT: ret i1 [[R1]]
; IS__TUNIT_OPM: f: ; IS__TUNIT_OPM: f:
; IS__TUNIT_OPM-NEXT: [[R2:%.*]] = call i1 @recursive_inst_generator(i1 noundef true, i1* nofree [[A]]) ; IS__TUNIT_OPM-NEXT: [[R2:%.*]] = call i1 @recursive_inst_generator(i1 noundef true, i1* nofree [[A]])
; IS__TUNIT_OPM-NEXT: ret i1 [[R2]] ; IS__TUNIT_OPM-NEXT: ret i1 [[R2]]
; ;
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@recursive_inst_generator ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@recursive_inst_generator
; IS__TUNIT_NPM-SAME: (i1 [[C:%.*]], i1* nofree [[P:%.*]]) { ; IS__TUNIT_NPM-SAME: (i1 [[C:%.*]], i1* nofree [[P:%.*]]) {
; IS__TUNIT_NPM-NEXT: [[A:%.*]] = call i1* @geti1Ptr() ; IS__TUNIT_NPM-NEXT: [[A:%.*]] = call i1* @geti1Ptr()
; IS__TUNIT_NPM-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]] ; IS__TUNIT_NPM-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]]
; IS__TUNIT_NPM: t: ; IS__TUNIT_NPM: t:
; IS__TUNIT_NPM-NEXT: [[R1:%.*]] = call i1 @recursive_inst_comparator(i1* noalias nofree readnone [[A]], i1* noalias nofree readnone [[A]]) #[[ATTR4:[0-9]+]] ; IS__TUNIT_NPM-NEXT: [[R1:%.*]] = call i1 @recursive_inst_comparator(i1* noalias nofree readnone [[A]], i1* noalias nofree readnone [[A]]) #[[ATTR6:[0-9]+]]
; IS__TUNIT_NPM-NEXT: ret i1 [[R1]] ; IS__TUNIT_NPM-NEXT: ret i1 [[R1]]
; IS__TUNIT_NPM: f: ; IS__TUNIT_NPM: f:
; IS__TUNIT_NPM-NEXT: [[R2:%.*]] = call i1 @recursive_inst_generator(i1 noundef true, i1* nofree [[A]]) ; IS__TUNIT_NPM-NEXT: [[R2:%.*]] = call i1 @recursive_inst_generator(i1 noundef true, i1* nofree [[A]])
; IS__TUNIT_NPM-NEXT: ret i1 [[R2]] ; IS__TUNIT_NPM-NEXT: ret i1 [[R2]]
; ;
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@recursive_inst_generator ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@recursive_inst_generator
; IS__CGSCC_OPM-SAME: (i1 [[C:%.*]], i1* nofree [[P:%.*]]) { ; IS__CGSCC_OPM-SAME: (i1 [[C:%.*]], i1* nofree [[P:%.*]]) {
; IS__CGSCC_OPM-NEXT: [[A:%.*]] = call i1* @geti1Ptr() ; IS__CGSCC_OPM-NEXT: [[A:%.*]] = call i1* @geti1Ptr()
; IS__CGSCC_OPM-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]] ; IS__CGSCC_OPM-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]]
; IS__CGSCC_OPM: t: ; IS__CGSCC_OPM: t:
; IS__CGSCC_OPM-NEXT: [[R1:%.*]] = call i1 @recursive_inst_comparator(i1* noalias nofree readnone [[A]], i1* noalias nofree readnone [[P]]) ; IS__CGSCC_OPM-NEXT: [[R1:%.*]] = call i1 @recursive_inst_comparator(i1* noalias nofree readnone [[A]], i1* noalias nofree readnone [[P]]) #[[ATTR7:[0-9]+]]
; IS__CGSCC_OPM-NEXT: ret i1 [[R1]] ; IS__CGSCC_OPM-NEXT: ret i1 [[R1]]
; IS__CGSCC_OPM: f: ; IS__CGSCC_OPM: f:
; IS__CGSCC_OPM-NEXT: [[R2:%.*]] = call i1 @recursive_inst_generator(i1 noundef true, i1* nofree [[A]]) ; IS__CGSCC_OPM-NEXT: [[R2:%.*]] = call i1 @recursive_inst_generator(i1 noundef true, i1* nofree [[A]])
; IS__CGSCC_OPM-NEXT: ret i1 [[R2]] ; IS__CGSCC_OPM-NEXT: ret i1 [[R2]]
; ;
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@recursive_inst_generator ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@recursive_inst_generator
; IS__CGSCC_NPM-SAME: (i1 [[C:%.*]]) { ; IS__CGSCC_NPM-SAME: (i1 [[C:%.*]]) {
; IS__CGSCC_NPM-NEXT: [[A:%.*]] = call i1* @geti1Ptr() ; IS__CGSCC_NPM-NEXT: [[A:%.*]] = call i1* @geti1Ptr()
; IS__CGSCC_NPM-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]] ; IS__CGSCC_NPM-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]]
; IS__CGSCC_NPM: t: ; IS__CGSCC_NPM: t:
; IS__CGSCC_NPM-NEXT: [[R1:%.*]] = call i1 @recursive_inst_comparator(i1* noalias nofree readnone [[A]], i1* noalias nofree readnone [[A]]) ; IS__CGSCC_NPM-NEXT: [[R1:%.*]] = call i1 @recursive_inst_comparator(i1* noalias nofree readnone [[A]], i1* noalias nofree readnone [[A]]) #[[ATTR7:[0-9]+]]
; IS__CGSCC_NPM-NEXT: ret i1 [[R1]] ; IS__CGSCC_NPM-NEXT: ret i1 [[R1]]
; IS__CGSCC_NPM: f: ; IS__CGSCC_NPM: f:
; IS__CGSCC_NPM-NEXT: [[R2:%.*]] = call i1 @recursive_inst_generator(i1 noundef true) ; IS__CGSCC_NPM-NEXT: [[R2:%.*]] = call i1 @recursive_inst_generator(i1 noundef true)
; IS__CGSCC_NPM-NEXT: ret i1 [[R2]] ; IS__CGSCC_NPM-NEXT: ret i1 [[R2]]
; ;
%a = call i1* @geti1Ptr() %a = call i1* @geti1Ptr()
br i1 %c, label %t, label %f br i1 %c, label %t, label %f
t: t:
%r1 = call i1 @recursive_inst_comparator(i1* %a, i1* %p) %r1 = call i1 @recursive_inst_comparator(i1* %a, i1* %p)
ret i1 %r1 ret i1 %r1
f: f:
%r2 = call i1 @recursive_inst_generator(i1 true, i1* %a) %r2 = call i1 @recursive_inst_generator(i1 true, i1* %a)
ret i1 %r2 ret i1 %r2
} }
; FIXME: This should *not* return true. ; FIXME: This should *not* return true.
define i1 @recursive_inst_generator_caller(i1 %c) { define i1 @recursive_inst_generator_caller(i1 %c) {
; NOT_CGSCC_NPM-LABEL: define {{[^@]+}}@recursive_inst_generator_caller ; IS__TUNIT____-LABEL: define {{[^@]+}}@recursive_inst_generator_caller
; NOT_CGSCC_NPM-SAME: (i1 [[C:%.*]]) { ; IS__TUNIT____-SAME: (i1 [[C:%.*]]) {
; NOT_CGSCC_NPM-NEXT: [[CALL:%.*]] = call i1 @recursive_inst_generator(i1 [[C]], i1* undef) ; IS__TUNIT____-NEXT: [[CALL:%.*]] = call i1 @recursive_inst_generator(i1 [[C]], i1* undef)
; NOT_CGSCC_NPM-NEXT: ret i1 [[CALL]] ; IS__TUNIT____-NEXT: ret i1 [[CALL]]
; ;
; IS__CGSCC_OPM: Function Attrs: norecurse
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@recursive_inst_generator_caller
; IS__CGSCC_OPM-SAME: (i1 [[C:%.*]]) #[[ATTR1:[0-9]+]] {
; IS__CGSCC_OPM-NEXT: [[CALL:%.*]] = call i1 @recursive_inst_generator(i1 [[C]], i1* undef)
; IS__CGSCC_OPM-NEXT: ret i1 [[CALL]]
;
; IS__CGSCC_NPM: Function Attrs: norecurse
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@recursive_inst_generator_caller ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@recursive_inst_generator_caller
; IS__CGSCC_NPM-SAME: (i1 [[C:%.*]]) { ; IS__CGSCC_NPM-SAME: (i1 [[C:%.*]]) #[[ATTR1:[0-9]+]] {
; IS__CGSCC_NPM-NEXT: [[CALL:%.*]] = call i1 @recursive_inst_generator(i1 [[C]]) ; IS__CGSCC_NPM-NEXT: [[CALL:%.*]] = call i1 @recursive_inst_generator(i1 [[C]])
; IS__CGSCC_NPM-NEXT: ret i1 [[CALL]] ; IS__CGSCC_NPM-NEXT: ret i1 [[CALL]]
; ;
%call = call i1 @recursive_inst_generator(i1 %c, i1* undef) %call = call i1 @recursive_inst_generator(i1 %c, i1* undef)
ret i1 %call ret i1 %call
} }
; Make sure we do *not* return true. ; Make sure we do *not* return true.
Show All 27 Lines
; CHECK-NEXT: ret i1 [[CALL]] ; CHECK-NEXT: ret i1 [[CALL]]
; ;
%call = call i1 @recursive_inst_compare(i1 %c, i1* undef) %call = call i1 @recursive_inst_compare(i1 %c, i1* undef)
ret i1 %call ret i1 %call
} }
; Make sure we do *not* return true. ; Make sure we do *not* return true.
define internal i1 @recursive_alloca_compare(i1 %c, i1* %p) { define internal i1 @recursive_alloca_compare(i1 %c, i1* %p) {
; CHECK: Function Attrs: nofree nosync nounwind readnone ; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone
; CHECK-LABEL: define {{[^@]+}}@recursive_alloca_compare ; IS__TUNIT____-LABEL: define {{[^@]+}}@recursive_alloca_compare
; CHECK-SAME: (i1 [[C:%.*]], i1* noalias nofree nonnull readnone [[P:%.*]]) #[[ATTR1:[0-9]+]] { ; IS__TUNIT____-SAME: (i1 [[C:%.*]], i1* noalias nofree nonnull readnone [[P:%.*]]) #[[ATTR1:[0-9]+]] {
; CHECK-NEXT: [[A:%.*]] = alloca i1, align 1 ; IS__TUNIT____-NEXT: [[A:%.*]] = alloca i1, align 1
; CHECK-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]] ; IS__TUNIT____-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]]
; CHECK: t: ; IS__TUNIT____: t:
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i1* [[A]], [[P]] ; IS__TUNIT____-NEXT: [[CMP:%.*]] = icmp eq i1* [[A]], [[P]]
; CHECK-NEXT: ret i1 [[CMP]] ; IS__TUNIT____-NEXT: ret i1 [[CMP]]
; CHECK: f: ; IS__TUNIT____: f:
; CHECK-NEXT: [[CALL:%.*]] = call i1 @recursive_alloca_compare(i1 noundef true, i1* noalias nofree noundef nonnull readnone dereferenceable(1) [[A]]) #[[ATTR1]] ; IS__TUNIT____-NEXT: [[CALL:%.*]] = call i1 @recursive_alloca_compare(i1 noundef true, i1* noalias nofree noundef nonnull readnone dereferenceable(1) [[A]]) #[[ATTR1]]
; CHECK-NEXT: ret i1 [[CALL]] ; IS__TUNIT____-NEXT: ret i1 [[CALL]]
;
; IS__CGSCC____: Function Attrs: nofree nosync nounwind readnone
; IS__CGSCC____-LABEL: define {{[^@]+}}@recursive_alloca_compare
; IS__CGSCC____-SAME: (i1 [[C:%.*]], i1* noalias nofree nonnull readnone [[P:%.*]]) #[[ATTR2:[0-9]+]] {
; IS__CGSCC____-NEXT: [[A:%.*]] = alloca i1, align 1
; IS__CGSCC____-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]]
; IS__CGSCC____: t:
; IS__CGSCC____-NEXT: [[CMP:%.*]] = icmp eq i1* [[A]], [[P]]
; IS__CGSCC____-NEXT: ret i1 [[CMP]]
; IS__CGSCC____: f:
; IS__CGSCC____-NEXT: [[CALL:%.*]] = call i1 @recursive_alloca_compare(i1 noundef true, i1* noalias nofree noundef nonnull readnone dereferenceable(1) [[A]]) #[[ATTR2]]
; IS__CGSCC____-NEXT: ret i1 [[CALL]]
; ;
%a = alloca i1 %a = alloca i1
br i1 %c, label %t, label %f br i1 %c, label %t, label %f
t: t:
%cmp = icmp eq i1* %a, %p %cmp = icmp eq i1* %a, %p
ret i1 %cmp ret i1 %cmp
f: f:
%call = call i1 @recursive_alloca_compare(i1 true, i1* %a) %call = call i1 @recursive_alloca_compare(i1 true, i1* %a)
ret i1 %call ret i1 %call
} }
; FIXME: This should *not* return true. ; FIXME: This should *not* return true.
define i1 @recursive_alloca_compare_caller(i1 %c) { define i1 @recursive_alloca_compare_caller(i1 %c) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone ; IS__TUNIT____: Function Attrs: nofree norecurse nosync nounwind readnone
; IS__TUNIT____-LABEL: define {{[^@]+}}@recursive_alloca_compare_caller ; IS__TUNIT____-LABEL: define {{[^@]+}}@recursive_alloca_compare_caller
; IS__TUNIT____-SAME: (i1 [[C:%.*]]) #[[ATTR1]] { ; IS__TUNIT____-SAME: (i1 [[C:%.*]]) #[[ATTR2:[0-9]+]] {
; IS__TUNIT____-NEXT: [[CALL:%.*]] = call i1 @recursive_alloca_compare(i1 [[C]], i1* undef) #[[ATTR1]] ; IS__TUNIT____-NEXT: [[CALL:%.*]] = call i1 @recursive_alloca_compare(i1 [[C]], i1* undef) #[[ATTR1]]
; IS__TUNIT____-NEXT: ret i1 [[CALL]] ; IS__TUNIT____-NEXT: ret i1 [[CALL]]
; ;
; IS__CGSCC____: Function Attrs: nofree nosync nounwind readnone ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone
; IS__CGSCC____-LABEL: define {{[^@]+}}@recursive_alloca_compare_caller ; IS__CGSCC____-LABEL: define {{[^@]+}}@recursive_alloca_compare_caller
; IS__CGSCC____-SAME: (i1 [[C:%.*]]) #[[ATTR1]] { ; IS__CGSCC____-SAME: (i1 [[C:%.*]]) #[[ATTR3:[0-9]+]] {
; IS__CGSCC____-NEXT: [[CALL:%.*]] = call i1 @recursive_alloca_compare(i1 [[C]], i1* undef) #[[ATTR4:[0-9]+]] ; IS__CGSCC____-NEXT: [[CALL:%.*]] = call i1 @recursive_alloca_compare(i1 [[C]], i1* undef) #[[ATTR7:[0-9]+]]
; IS__CGSCC____-NEXT: ret i1 [[CALL]] ; IS__CGSCC____-NEXT: ret i1 [[CALL]]
; ;
%call = call i1 @recursive_alloca_compare(i1 %c, i1* undef) %call = call i1 @recursive_alloca_compare(i1 %c, i1* undef)
ret i1 %call ret i1 %call
} }
; Make sure we do *not* simplify this to return 0 or 1, return 42 is ok though. ; Make sure we do *not* simplify this to return 0 or 1, return 42 is ok though.
define internal i8 @recursive_alloca_load_return(i1 %c, i8* %p, i8 %v) { define internal i8 @recursive_alloca_load_return(i1 %c, i8* %p, i8 %v) {
; CHECK: Function Attrs: argmemonly nofree nosync nounwind ; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind
; CHECK-LABEL: define {{[^@]+}}@recursive_alloca_load_return ; IS__TUNIT____-LABEL: define {{[^@]+}}@recursive_alloca_load_return
; CHECK-SAME: (i1 [[C:%.*]], i8* nocapture nofree nonnull readonly [[P:%.*]], i8 noundef [[V:%.*]]) #[[ATTR2:[0-9]+]] { ; IS__TUNIT____-SAME: (i1 [[C:%.*]], i8* nocapture nofree nonnull readonly [[P:%.*]], i8 noundef [[V:%.*]]) #[[ATTR3:[0-9]+]] {
; CHECK-NEXT: [[A:%.*]] = alloca i8, align 1 ; IS__TUNIT____-NEXT: [[A:%.*]] = alloca i8, align 1
; CHECK-NEXT: store i8 [[V]], i8* [[A]], align 1 ; IS__TUNIT____-NEXT: store i8 [[V]], i8* [[A]], align 1
; CHECK-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]] ; IS__TUNIT____-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]]
; CHECK: t: ; IS__TUNIT____: t:
; CHECK-NEXT: store i8 0, i8* [[A]], align 1 ; IS__TUNIT____-NEXT: store i8 0, i8* [[A]], align 1
; CHECK-NEXT: [[L:%.*]] = load i8, i8* [[P]], align 1 ; IS__TUNIT____-NEXT: [[L:%.*]] = load i8, i8* [[P]], align 1
; CHECK-NEXT: ret i8 [[L]] ; IS__TUNIT____-NEXT: ret i8 [[L]]
; CHECK: f: ; IS__TUNIT____: f:
; CHECK-NEXT: [[CALL:%.*]] = call i8 @recursive_alloca_load_return(i1 noundef true, i8* noalias nocapture nofree noundef nonnull readonly dereferenceable(1) [[A]], i8 noundef 1) #[[ATTR3:[0-9]+]] ; IS__TUNIT____-NEXT: [[CALL:%.*]] = call i8 @recursive_alloca_load_return(i1 noundef true, i8* noalias nocapture nofree noundef nonnull readonly dereferenceable(1) [[A]], i8 noundef 1) #[[ATTR4:[0-9]+]]
; CHECK-NEXT: ret i8 [[CALL]] ; IS__TUNIT____-NEXT: ret i8 [[CALL]]
;
; IS__CGSCC____: Function Attrs: argmemonly nofree nosync nounwind
; IS__CGSCC____-LABEL: define {{[^@]+}}@recursive_alloca_load_return
; IS__CGSCC____-SAME: (i1 [[C:%.*]], i8* nocapture nofree nonnull readonly [[P:%.*]], i8 noundef [[V:%.*]]) #[[ATTR4:[0-9]+]] {
; IS__CGSCC____-NEXT: [[A:%.*]] = alloca i8, align 1
; IS__CGSCC____-NEXT: store i8 [[V]], i8* [[A]], align 1
; IS__CGSCC____-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]]
; IS__CGSCC____: t:
; IS__CGSCC____-NEXT: store i8 0, i8* [[A]], align 1
; IS__CGSCC____-NEXT: [[L:%.*]] = load i8, i8* [[P]], align 1
; IS__CGSCC____-NEXT: ret i8 [[L]]
; IS__CGSCC____: f:
; IS__CGSCC____-NEXT: [[CALL:%.*]] = call i8 @recursive_alloca_load_return(i1 noundef true, i8* noalias nocapture nofree noundef nonnull readonly dereferenceable(1) [[A]], i8 noundef 1) #[[ATTR5:[0-9]+]]
; IS__CGSCC____-NEXT: ret i8 [[CALL]]
; ;
%a = alloca i8 %a = alloca i8
store i8 %v, i8* %a store i8 %v, i8* %a
br i1 %c, label %t, label %f br i1 %c, label %t, label %f
t: t:
store i8 0, i8* %a store i8 0, i8* %a
%l = load i8, i8* %p %l = load i8, i8* %p
ret i8 %l ret i8 %l
f: f:
%call = call i8 @recursive_alloca_load_return(i1 true, i8* %a, i8 1) %call = call i8 @recursive_alloca_load_return(i1 true, i8* %a, i8 1)
ret i8 %call ret i8 %call
} }
define i8 @recursive_alloca_load_return_caller(i1 %c) { define i8 @recursive_alloca_load_return_caller(i1 %c) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone ; IS__TUNIT____: Function Attrs: nofree norecurse nosync nounwind readnone
; IS__TUNIT____-LABEL: define {{[^@]+}}@recursive_alloca_load_return_caller ; IS__TUNIT____-LABEL: define {{[^@]+}}@recursive_alloca_load_return_caller
; IS__TUNIT____-SAME: (i1 [[C:%.*]]) #[[ATTR1]] { ; IS__TUNIT____-SAME: (i1 [[C:%.*]]) #[[ATTR2]] {
; IS__TUNIT____-NEXT: [[CALL:%.*]] = call i8 @recursive_alloca_load_return(i1 [[C]], i8* undef, i8 noundef 42) #[[ATTR3]] ; IS__TUNIT____-NEXT: [[CALL:%.*]] = call i8 @recursive_alloca_load_return(i1 [[C]], i8* undef, i8 noundef 42) #[[ATTR4]]
; IS__TUNIT____-NEXT: ret i8 [[CALL]] ; IS__TUNIT____-NEXT: ret i8 [[CALL]]
; ;
; IS__CGSCC____: Function Attrs: nofree nosync nounwind readnone ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone
; IS__CGSCC____-LABEL: define {{[^@]+}}@recursive_alloca_load_return_caller ; IS__CGSCC____-LABEL: define {{[^@]+}}@recursive_alloca_load_return_caller
; IS__CGSCC____-SAME: (i1 [[C:%.*]]) #[[ATTR1]] { ; IS__CGSCC____-SAME: (i1 [[C:%.*]]) #[[ATTR3]] {
; IS__CGSCC____-NEXT: [[CALL:%.*]] = call i8 @recursive_alloca_load_return(i1 [[C]], i8* undef, i8 noundef 42) #[[ATTR5:[0-9]+]] ; IS__CGSCC____-NEXT: [[CALL:%.*]] = call i8 @recursive_alloca_load_return(i1 [[C]], i8* undef, i8 noundef 42) #[[ATTR8:[0-9]+]]
; IS__CGSCC____-NEXT: ret i8 [[CALL]] ; IS__CGSCC____-NEXT: ret i8 [[CALL]]
; ;
%call = call i8 @recursive_alloca_load_return(i1 %c, i8* undef, i8 42) %call = call i8 @recursive_alloca_load_return(i1 %c, i8* undef, i8 42)
ret i8 %call ret i8 %call
} }
@G1 = private global i1* undef @G1 = private global i1* undef
@G2 = private global i1* undef @G2 = private global i1* undef
@G3 = private global i1 undef @G3 = private global i1 undef
; Make sure we do *not* return true. ; Make sure we do *not* return true.
define internal i1 @recursive_alloca_compare_global1(i1 %c) { define internal i1 @recursive_alloca_compare_global1(i1 %c) {
; CHECK: Function Attrs: nofree nosync nounwind ; IS__TUNIT____: Function Attrs: nofree nosync nounwind
; CHECK-LABEL: define {{[^@]+}}@recursive_alloca_compare_global1 ; IS__TUNIT____-LABEL: define {{[^@]+}}@recursive_alloca_compare_global1
; CHECK-SAME: (i1 [[C:%.*]]) #[[ATTR3]] { ; IS__TUNIT____-SAME: (i1 [[C:%.*]]) #[[ATTR4]] {
; CHECK-NEXT: [[A:%.*]] = alloca i1, align 1 ; IS__TUNIT____-NEXT: [[A:%.*]] = alloca i1, align 1
; CHECK-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]] ; IS__TUNIT____-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]]
; CHECK: t: ; IS__TUNIT____: t:
; CHECK-NEXT: [[P:%.*]] = load i1*, i1** @G1, align 8 ; IS__TUNIT____-NEXT: [[P:%.*]] = load i1*, i1** @G1, align 8
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i1* [[A]], [[P]] ; IS__TUNIT____-NEXT: [[CMP:%.*]] = icmp eq i1* [[A]], [[P]]
; CHECK-NEXT: ret i1 [[CMP]] ; IS__TUNIT____-NEXT: ret i1 [[CMP]]
; CHECK: f: ; IS__TUNIT____: f:
; CHECK-NEXT: store i1* [[A]], i1** @G1, align 8 ; IS__TUNIT____-NEXT: store i1* [[A]], i1** @G1, align 8
; CHECK-NEXT: [[CALL:%.*]] = call i1 @recursive_alloca_compare_global1(i1 noundef true) #[[ATTR3]] ; IS__TUNIT____-NEXT: [[CALL:%.*]] = call i1 @recursive_alloca_compare_global1(i1 noundef true) #[[ATTR4]]
; CHECK-NEXT: ret i1 [[CALL]] ; IS__TUNIT____-NEXT: ret i1 [[CALL]]
;
; IS__CGSCC____: Function Attrs: nofree nosync nounwind
; IS__CGSCC____-LABEL: define {{[^@]+}}@recursive_alloca_compare_global1
; IS__CGSCC____-SAME: (i1 [[C:%.*]]) #[[ATTR5]] {
; IS__CGSCC____-NEXT: [[A:%.*]] = alloca i1, align 1
; IS__CGSCC____-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]]
; IS__CGSCC____: t:
; IS__CGSCC____-NEXT: [[P:%.*]] = load i1*, i1** @G1, align 8
; IS__CGSCC____-NEXT: [[CMP:%.*]] = icmp eq i1* [[A]], [[P]]
; IS__CGSCC____-NEXT: ret i1 [[CMP]]
; IS__CGSCC____: f:
; IS__CGSCC____-NEXT: store i1* [[A]], i1** @G1, align 8
; IS__CGSCC____-NEXT: [[CALL:%.*]] = call i1 @recursive_alloca_compare_global1(i1 noundef true) #[[ATTR5]]
; IS__CGSCC____-NEXT: ret i1 [[CALL]]
; ;
%a = alloca i1 %a = alloca i1
br i1 %c, label %t, label %f br i1 %c, label %t, label %f
t: t:
%p = load i1*, i1** @G1 %p = load i1*, i1** @G1
%cmp = icmp eq i1* %a, %p %cmp = icmp eq i1* %a, %p
ret i1 %cmp ret i1 %cmp
f: f:
store i1* %a, i1** @G1 store i1* %a, i1** @G1
%call = call i1 @recursive_alloca_compare_global1(i1 true) %call = call i1 @recursive_alloca_compare_global1(i1 true)
ret i1 %call ret i1 %call
} }
; FIXME: This should *not* return true. ; FIXME: This should *not* return true.
define i1 @recursive_alloca_compare_caller_global1(i1 %c) { define i1 @recursive_alloca_compare_caller_global1(i1 %c) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind ; IS__TUNIT____: Function Attrs: nofree norecurse nosync nounwind
; IS__TUNIT____-LABEL: define {{[^@]+}}@recursive_alloca_compare_caller_global1 ; IS__TUNIT____-LABEL: define {{[^@]+}}@recursive_alloca_compare_caller_global1
; IS__TUNIT____-SAME: (i1 [[C:%.*]]) #[[ATTR3]] { ; IS__TUNIT____-SAME: (i1 [[C:%.*]]) #[[ATTR5:[0-9]+]] {
; IS__TUNIT____-NEXT: [[CALL:%.*]] = call i1 @recursive_alloca_compare_global1(i1 [[C]]) #[[ATTR3]] ; IS__TUNIT____-NEXT: [[CALL:%.*]] = call i1 @recursive_alloca_compare_global1(i1 [[C]]) #[[ATTR4]]
; IS__TUNIT____-NEXT: ret i1 [[CALL]] ; IS__TUNIT____-NEXT: ret i1 [[CALL]]
; ;
; IS__CGSCC____: Function Attrs: nofree nosync nounwind ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind
; IS__CGSCC____-LABEL: define {{[^@]+}}@recursive_alloca_compare_caller_global1 ; IS__CGSCC____-LABEL: define {{[^@]+}}@recursive_alloca_compare_caller_global1
; IS__CGSCC____-SAME: (i1 [[C:%.*]]) #[[ATTR3]] { ; IS__CGSCC____-SAME: (i1 [[C:%.*]]) #[[ATTR6:[0-9]+]] {
; IS__CGSCC____-NEXT: [[CALL:%.*]] = call i1 @recursive_alloca_compare_global1(i1 [[C]]) #[[ATTR5]] ; IS__CGSCC____-NEXT: [[CALL:%.*]] = call i1 @recursive_alloca_compare_global1(i1 [[C]]) #[[ATTR8]]
; IS__CGSCC____-NEXT: ret i1 [[CALL]] ; IS__CGSCC____-NEXT: ret i1 [[CALL]]
; ;
%call = call i1 @recursive_alloca_compare_global1(i1 %c) %call = call i1 @recursive_alloca_compare_global1(i1 %c)
ret i1 %call ret i1 %call
} }
define internal i1 @recursive_alloca_compare_global2(i1 %c) { define internal i1 @recursive_alloca_compare_global2(i1 %c) {
; CHECK: Function Attrs: nofree nosync nounwind ; IS__TUNIT____: Function Attrs: nofree nosync nounwind
; CHECK-LABEL: define {{[^@]+}}@recursive_alloca_compare_global2 ; IS__TUNIT____-LABEL: define {{[^@]+}}@recursive_alloca_compare_global2
; CHECK-SAME: (i1 [[C:%.*]]) #[[ATTR3]] { ; IS__TUNIT____-SAME: (i1 [[C:%.*]]) #[[ATTR4]] {
; CHECK-NEXT: [[A:%.*]] = alloca i1, align 1 ; IS__TUNIT____-NEXT: [[A:%.*]] = alloca i1, align 1
; CHECK-NEXT: [[P:%.*]] = load i1*, i1** @G2, align 8 ; IS__TUNIT____-NEXT: [[P:%.*]] = load i1*, i1** @G2, align 8
; CHECK-NEXT: store i1* [[A]], i1** @G2, align 8 ; IS__TUNIT____-NEXT: store i1* [[A]], i1** @G2, align 8
; CHECK-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]] ; IS__TUNIT____-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]]
; CHECK: t: ; IS__TUNIT____: t:
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i1* [[A]], [[P]] ; IS__TUNIT____-NEXT: [[CMP:%.*]] = icmp eq i1* [[A]], [[P]]
; CHECK-NEXT: ret i1 [[CMP]] ; IS__TUNIT____-NEXT: ret i1 [[CMP]]
; CHECK: f: ; IS__TUNIT____: f:
; CHECK-NEXT: [[CALL:%.*]] = call i1 @recursive_alloca_compare_global2(i1 noundef true) #[[ATTR3]] ; IS__TUNIT____-NEXT: [[CALL:%.*]] = call i1 @recursive_alloca_compare_global2(i1 noundef true) #[[ATTR4]]
; CHECK-NEXT: ret i1 [[CALL]] ; IS__TUNIT____-NEXT: ret i1 [[CALL]]
;
; IS__CGSCC____: Function Attrs: nofree nosync nounwind
; IS__CGSCC____-LABEL: define {{[^@]+}}@recursive_alloca_compare_global2
; IS__CGSCC____-SAME: (i1 [[C:%.*]]) #[[ATTR5]] {
; IS__CGSCC____-NEXT: [[A:%.*]] = alloca i1, align 1
; IS__CGSCC____-NEXT: [[P:%.*]] = load i1*, i1** @G2, align 8
; IS__CGSCC____-NEXT: store i1* [[A]], i1** @G2, align 8
; IS__CGSCC____-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]]
; IS__CGSCC____: t:
; IS__CGSCC____-NEXT: [[CMP:%.*]] = icmp eq i1* [[A]], [[P]]
; IS__CGSCC____-NEXT: ret i1 [[CMP]]
; IS__CGSCC____: f:
; IS__CGSCC____-NEXT: [[CALL:%.*]] = call i1 @recursive_alloca_compare_global2(i1 noundef true) #[[ATTR5]]
; IS__CGSCC____-NEXT: ret i1 [[CALL]]
; ;
%a = alloca i1 %a = alloca i1
%p = load i1*, i1** @G2 %p = load i1*, i1** @G2
store i1* %a, i1** @G2 store i1* %a, i1** @G2
br i1 %c, label %t, label %f br i1 %c, label %t, label %f
t: t:
%cmp = icmp eq i1* %a, %p %cmp = icmp eq i1* %a, %p
ret i1 %cmp ret i1 %cmp
f: f:
%call = call i1 @recursive_alloca_compare_global2(i1 true) %call = call i1 @recursive_alloca_compare_global2(i1 true)
ret i1 %call ret i1 %call
} }
; FIXME: This should *not* return true. ; FIXME: This should *not* return true.
define i1 @recursive_alloca_compare_caller_global2(i1 %c) { define i1 @recursive_alloca_compare_caller_global2(i1 %c) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind ; IS__TUNIT____: Function Attrs: nofree norecurse nosync nounwind
; IS__TUNIT____-LABEL: define {{[^@]+}}@recursive_alloca_compare_caller_global2 ; IS__TUNIT____-LABEL: define {{[^@]+}}@recursive_alloca_compare_caller_global2
; IS__TUNIT____-SAME: (i1 [[C:%.*]]) #[[ATTR3]] { ; IS__TUNIT____-SAME: (i1 [[C:%.*]]) #[[ATTR5]] {
; IS__TUNIT____-NEXT: [[CALL:%.*]] = call i1 @recursive_alloca_compare_global2(i1 [[C]]) #[[ATTR3]] ; IS__TUNIT____-NEXT: [[CALL:%.*]] = call i1 @recursive_alloca_compare_global2(i1 [[C]]) #[[ATTR4]]
; IS__TUNIT____-NEXT: ret i1 [[CALL]] ; IS__TUNIT____-NEXT: ret i1 [[CALL]]
; ;
; IS__CGSCC____: Function Attrs: nofree nosync nounwind ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind
; IS__CGSCC____-LABEL: define {{[^@]+}}@recursive_alloca_compare_caller_global2 ; IS__CGSCC____-LABEL: define {{[^@]+}}@recursive_alloca_compare_caller_global2
; IS__CGSCC____-SAME: (i1 [[C:%.*]]) #[[ATTR3]] { ; IS__CGSCC____-SAME: (i1 [[C:%.*]]) #[[ATTR6]] {
; IS__CGSCC____-NEXT: [[CALL:%.*]] = call i1 @recursive_alloca_compare_global2(i1 [[C]]) #[[ATTR5]] ; IS__CGSCC____-NEXT: [[CALL:%.*]] = call i1 @recursive_alloca_compare_global2(i1 [[C]]) #[[ATTR8]]
; IS__CGSCC____-NEXT: ret i1 [[CALL]] ; IS__CGSCC____-NEXT: ret i1 [[CALL]]
; ;
%call = call i1 @recursive_alloca_compare_global2(i1 %c) %call = call i1 @recursive_alloca_compare_global2(i1 %c)
ret i1 %call ret i1 %call
} }
define internal i1 @recursive_inst_compare_global3(i1 %c) { define internal i1 @recursive_inst_compare_global3(i1 %c) {
; ;
; CHECK: Function Attrs: nofree nosync nounwind ; IS__TUNIT____: Function Attrs: nofree nosync nounwind
; CHECK-LABEL: define {{[^@]+}}@recursive_inst_compare_global3 ; IS__TUNIT____-LABEL: define {{[^@]+}}@recursive_inst_compare_global3
; CHECK-SAME: (i1 [[C:%.*]]) #[[ATTR3]] { ; IS__TUNIT____-SAME: (i1 [[C:%.*]]) #[[ATTR4]] {
; CHECK-NEXT: [[P:%.*]] = load i1, i1* @G3, align 1 ; IS__TUNIT____-NEXT: [[P:%.*]] = load i1, i1* @G3, align 1
; CHECK-NEXT: store i1 [[C]], i1* @G3, align 1 ; IS__TUNIT____-NEXT: store i1 [[C]], i1* @G3, align 1
; CHECK-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]] ; IS__TUNIT____-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]]
; CHECK: t: ; IS__TUNIT____: t:
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i1 [[C]], [[P]] ; IS__TUNIT____-NEXT: [[CMP:%.*]] = icmp eq i1 [[C]], [[P]]
; CHECK-NEXT: ret i1 [[CMP]] ; IS__TUNIT____-NEXT: ret i1 [[CMP]]
; CHECK: f: ; IS__TUNIT____: f:
; CHECK-NEXT: [[CALL:%.*]] = call i1 @recursive_inst_compare_global3(i1 noundef true) #[[ATTR3]] ; IS__TUNIT____-NEXT: [[CALL:%.*]] = call i1 @recursive_inst_compare_global3(i1 noundef true) #[[ATTR4]]
; CHECK-NEXT: ret i1 [[CALL]] ; IS__TUNIT____-NEXT: ret i1 [[CALL]]
;
; IS__CGSCC____: Function Attrs: nofree nosync nounwind
; IS__CGSCC____-LABEL: define {{[^@]+}}@recursive_inst_compare_global3
; IS__CGSCC____-SAME: (i1 [[C:%.*]]) #[[ATTR5]] {
; IS__CGSCC____-NEXT: [[P:%.*]] = load i1, i1* @G3, align 1
; IS__CGSCC____-NEXT: store i1 [[C]], i1* @G3, align 1
; IS__CGSCC____-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]]
; IS__CGSCC____: t:
; IS__CGSCC____-NEXT: [[CMP:%.*]] = icmp eq i1 [[C]], [[P]]
; IS__CGSCC____-NEXT: ret i1 [[CMP]]
; IS__CGSCC____: f:
; IS__CGSCC____-NEXT: [[CALL:%.*]] = call i1 @recursive_inst_compare_global3(i1 noundef true) #[[ATTR5]]
; IS__CGSCC____-NEXT: ret i1 [[CALL]]
; ;
%p = load i1, i1* @G3 %p = load i1, i1* @G3
store i1 %c, i1* @G3 store i1 %c, i1* @G3
br i1 %c, label %t, label %f br i1 %c, label %t, label %f
t: t:
%cmp = icmp eq i1 %c, %p %cmp = icmp eq i1 %c, %p
ret i1 %cmp ret i1 %cmp
f: f:
%call = call i1 @recursive_inst_compare_global3(i1 true) %call = call i1 @recursive_inst_compare_global3(i1 true)
ret i1 %call ret i1 %call
} }
; FIXME: This should *not* return true. ; FIXME: This should *not* return true.
define i1 @recursive_inst_compare_caller_global3(i1 %c) { define i1 @recursive_inst_compare_caller_global3(i1 %c) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind ; IS__TUNIT____: Function Attrs: nofree norecurse nosync nounwind
; IS__TUNIT____-LABEL: define {{[^@]+}}@recursive_inst_compare_caller_global3 ; IS__TUNIT____-LABEL: define {{[^@]+}}@recursive_inst_compare_caller_global3
; IS__TUNIT____-SAME: (i1 [[C:%.*]]) #[[ATTR3]] { ; IS__TUNIT____-SAME: (i1 [[C:%.*]]) #[[ATTR5]] {
; IS__TUNIT____-NEXT: [[CALL:%.*]] = call i1 @recursive_inst_compare_global3(i1 [[C]]) #[[ATTR3]] ; IS__TUNIT____-NEXT: [[CALL:%.*]] = call i1 @recursive_inst_compare_global3(i1 [[C]]) #[[ATTR4]]
; IS__TUNIT____-NEXT: ret i1 [[CALL]] ; IS__TUNIT____-NEXT: ret i1 [[CALL]]
; ;
; IS__CGSCC____: Function Attrs: nofree nosync nounwind ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind
; IS__CGSCC____-LABEL: define {{[^@]+}}@recursive_inst_compare_caller_global3 ; IS__CGSCC____-LABEL: define {{[^@]+}}@recursive_inst_compare_caller_global3
; IS__CGSCC____-SAME: (i1 [[C:%.*]]) #[[ATTR3]] { ; IS__CGSCC____-SAME: (i1 [[C:%.*]]) #[[ATTR6]] {
; IS__CGSCC____-NEXT: [[CALL:%.*]] = call i1 @recursive_inst_compare_global3(i1 [[C]]) #[[ATTR5]] ; IS__CGSCC____-NEXT: [[CALL:%.*]] = call i1 @recursive_inst_compare_global3(i1 [[C]]) #[[ATTR8]]
; IS__CGSCC____-NEXT: ret i1 [[CALL]] ; IS__CGSCC____-NEXT: ret i1 [[CALL]]
; ;
%call = call i1 @recursive_inst_compare_global3(i1 %c) %call = call i1 @recursive_inst_compare_global3(i1 %c)
ret i1 %call ret i1 %call
} }
;. ;.
; IS__TUNIT____: attributes #[[ATTR0]] = { nofree nosync nounwind readnone willreturn } ; IS__TUNIT____: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__TUNIT____: attributes #[[ATTR1]] = { nofree nosync nounwind readnone } ; IS__TUNIT____: attributes #[[ATTR1]] = { nofree nosync nounwind readnone }
; IS__TUNIT____: attributes #[[ATTR2]] = { argmemonly nofree nosync nounwind } ; IS__TUNIT____: attributes #[[ATTR2]] = { nofree norecurse nosync nounwind readnone }
; IS__TUNIT____: attributes #[[ATTR3]] = { nofree nosync nounwind } ; IS__TUNIT____: attributes #[[ATTR3]] = { argmemonly nofree nosync nounwind }
; IS__TUNIT____: attributes #[[ATTR4:[0-9]+]] = { nounwind readnone } ; IS__TUNIT____: attributes #[[ATTR4]] = { nofree nosync nounwind }
; IS__TUNIT____: attributes #[[ATTR5]] = { nofree norecurse nosync nounwind }
; IS__TUNIT____: attributes #[[ATTR6:[0-9]+]] = { nounwind readnone }
;. ;.
; IS__CGSCC____: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn } ; IS__CGSCC____: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__CGSCC____: attributes #[[ATTR1]] = { nofree nosync nounwind readnone } ; IS__CGSCC____: attributes #[[ATTR1:[0-9]+]] = { norecurse }
; IS__CGSCC____: attributes #[[ATTR2]] = { argmemonly nofree nosync nounwind } ; IS__CGSCC____: attributes #[[ATTR2]] = { nofree nosync nounwind readnone }
; IS__CGSCC____: attributes #[[ATTR3]] = { nofree nosync nounwind } ; IS__CGSCC____: attributes #[[ATTR3]] = { nofree norecurse nosync nounwind readnone }
; IS__CGSCC____: attributes #[[ATTR4]] = { nounwind readnone } ; IS__CGSCC____: attributes #[[ATTR4]] = { argmemonly nofree nosync nounwind }
; IS__CGSCC____: attributes #[[ATTR5]] = { nounwind } ; IS__CGSCC____: attributes #[[ATTR5]] = { nofree nosync nounwind }
; IS__CGSCC____: attributes #[[ATTR6]] = { nofree norecurse nosync nounwind }
; IS__CGSCC____: attributes #[[ATTR7]] = { nounwind readnone }
; IS__CGSCC____: attributes #[[ATTR8]] = { nounwind }
;. ;.

llvm/test/Transforms/Attributor/value-simplify-pointer-info.ll

  • This file is larger than 256 KB, so syntax highlighting is disabled by default.
Show First 20 Lines • Show All 51 Lines • ▼ Show 20 Lines
; CHECK: @[[A2:[a-zA-Z0-9_$"\\.-]+]] = internal global i32 0 ; CHECK: @[[A2:[a-zA-Z0-9_$"\\.-]+]] = internal global i32 0
; CHECK: @[[A3:[a-zA-Z0-9_$"\\.-]+]] = internal global i32 undef ; CHECK: @[[A3:[a-zA-Z0-9_$"\\.-]+]] = internal global i32 undef
; CHECK: @[[BYTES1:[a-zA-Z0-9_$"\\.-]+]] = internal global i32 undef ; CHECK: @[[BYTES1:[a-zA-Z0-9_$"\\.-]+]] = internal global i32 undef
; CHECK: @[[BYTES2:[a-zA-Z0-9_$"\\.-]+]] = internal global i32 undef ; CHECK: @[[BYTES2:[a-zA-Z0-9_$"\\.-]+]] = internal global i32 undef
; CHECK: @[[REC_STORAGE:[a-zA-Z0-9_$"\\.-]+]] = internal global i32 undef ; CHECK: @[[REC_STORAGE:[a-zA-Z0-9_$"\\.-]+]] = internal global i32 undef
; CHECK: @[[GLOBAL:[a-zA-Z0-9_$"\\.-]+]] = internal global [[STRUCT_STY:%.*]] zeroinitializer, align 8 ; CHECK: @[[GLOBAL:[a-zA-Z0-9_$"\\.-]+]] = internal global [[STRUCT_STY:%.*]] zeroinitializer, align 8
;. ;.
define void @write_arg(i32* %p, i32 %v) { define void @write_arg(i32* %p, i32 %v) {
; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind willreturn writeonly ; CHECK: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__TUNIT____-LABEL: define {{[^@]+}}@write_arg ; CHECK-LABEL: define {{[^@]+}}@write_arg
; IS__TUNIT____-SAME: (i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[P:%.*]], i32 [[V:%.*]]) #[[ATTR0:[0-9]+]] { ; CHECK-SAME: (i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[P:%.*]], i32 [[V:%.*]]) #[[ATTR0:[0-9]+]] {
; IS__TUNIT____-NEXT: entry: ; CHECK-NEXT: entry:
; IS__TUNIT____-NEXT: store i32 [[V]], i32* [[P]], align 4, !tbaa [[TBAA3:![0-9]+]] ; CHECK-NEXT: store i32 [[V]], i32* [[P]], align 4, !tbaa [[TBAA3:![0-9]+]]
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC____-LABEL: define {{[^@]+}}@write_arg
; IS__CGSCC____-SAME: (i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[P:%.*]], i32 [[V:%.*]]) #[[ATTR0:[0-9]+]] {
; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: store i32 [[V]], i32* [[P]], align 4, !tbaa [[TBAA3:![0-9]+]]
; IS__CGSCC____-NEXT: ret void
; ;
entry: entry:
store i32 %v, i32* %p, align 4, !tbaa !3 store i32 %v, i32* %p, align 4, !tbaa !3
ret void ret void
} }
define void @write_random(i32* %p) { define void @write_random(i32* %p) {
; CHECK-LABEL: define {{[^@]+}}@write_random ; CHECK-LABEL: define {{[^@]+}}@write_random
; CHECK-SAME: (i32* nocapture nofree writeonly [[P:%.*]]) { ; CHECK-SAME: (i32* nocapture nofree writeonly [[P:%.*]]) {
; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: [[CALL:%.*]] = call i32 (...) @random() ; CHECK-NEXT: [[CALL:%.*]] = call i32 (...) @random()
; CHECK-NEXT: store i32 [[CALL]], i32* [[P]], align 4, !tbaa [[TBAA3:![0-9]+]] ; CHECK-NEXT: store i32 [[CALL]], i32* [[P]], align 4, !tbaa [[TBAA3]]
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
entry: entry:
%call = call i32 (...) @random() %call = call i32 (...) @random()
store i32 %call, i32* %p, align 4, !tbaa !3 store i32 %call, i32* %p, align 4, !tbaa !3
ret void ret void
} }
Show All 18 Lines
; } ; }
define void @local_alloca_simplifiable_1(%struct.S* noalias sret(%struct.S) align 4 %agg.result) { define void @local_alloca_simplifiable_1(%struct.S* noalias sret(%struct.S) align 4 %agg.result) {
; IS__TUNIT_OPM: Function Attrs: argmemonly nofree nosync nounwind willreturn ; IS__TUNIT_OPM: Function Attrs: argmemonly nofree nosync nounwind willreturn
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@local_alloca_simplifiable_1 ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@local_alloca_simplifiable_1
; IS__TUNIT_OPM-SAME: (%struct.S* noalias nocapture nofree nonnull writeonly sret([[STRUCT_S:%.*]]) align 4 dereferenceable(24) [[AGG_RESULT:%.*]]) #[[ATTR1:[0-9]+]] { ; IS__TUNIT_OPM-SAME: (%struct.S* noalias nocapture nofree nonnull writeonly sret([[STRUCT_S:%.*]]) align 4 dereferenceable(24) [[AGG_RESULT:%.*]]) #[[ATTR1:[0-9]+]] {
; IS__TUNIT_OPM-NEXT: entry: ; IS__TUNIT_OPM-NEXT: entry:
; IS__TUNIT_OPM-NEXT: [[S:%.*]] = alloca [[STRUCT_S]], align 4 ; IS__TUNIT_OPM-NEXT: [[S:%.*]] = alloca [[STRUCT_S]], align 4
; IS__TUNIT_OPM-NEXT: [[I:%.*]] = bitcast %struct.S* [[S]] to i8* ; IS__TUNIT_OPM-NEXT: [[I:%.*]] = bitcast %struct.S* [[S]] to i8*
; IS__TUNIT_OPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 24, i8* nocapture nofree noundef nonnull align 4 dereferenceable(24) [[I]]) #[[ATTR11:[0-9]+]] ; IS__TUNIT_OPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 24, i8* nocapture nofree noundef nonnull align 4 dereferenceable(24) [[I]]) #[[ATTR14:[0-9]+]]
; IS__TUNIT_OPM-NEXT: [[F1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 3 ; IS__TUNIT_OPM-NEXT: [[F1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 3
; IS__TUNIT_OPM-NEXT: [[F2:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 4 ; IS__TUNIT_OPM-NEXT: [[F2:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 4
; IS__TUNIT_OPM-NEXT: [[F3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 5 ; IS__TUNIT_OPM-NEXT: [[F3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 5
; IS__TUNIT_OPM-NEXT: [[I1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 0 ; IS__TUNIT_OPM-NEXT: [[I1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 0
; IS__TUNIT_OPM-NEXT: call void @write_arg(i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(24) [[I1]], i32 noundef 1) #[[ATTR5:[0-9]+]] ; IS__TUNIT_OPM-NEXT: call void @write_arg(i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(24) [[I1]], i32 noundef 1) #[[ATTR15:[0-9]+]]
; IS__TUNIT_OPM-NEXT: [[I2:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 1 ; IS__TUNIT_OPM-NEXT: [[I2:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 1
; IS__TUNIT_OPM-NEXT: call void @write_arg(i32* nocapture nofree nonnull writeonly align 4 dereferenceable(20) [[I2]], i32 noundef 2) #[[ATTR5]] ; IS__TUNIT_OPM-NEXT: call void @write_arg(i32* nocapture nofree nonnull writeonly align 4 dereferenceable(20) [[I2]], i32 noundef 2) #[[ATTR15]]
; IS__TUNIT_OPM-NEXT: [[I3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 2 ; IS__TUNIT_OPM-NEXT: [[I3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 2
; IS__TUNIT_OPM-NEXT: call void @write_arg(i32* nocapture nofree nonnull writeonly align 4 dereferenceable(16) [[I3]], i32 noundef 3) #[[ATTR5]] ; IS__TUNIT_OPM-NEXT: call void @write_arg(i32* nocapture nofree nonnull writeonly align 4 dereferenceable(16) [[I3]], i32 noundef 3) #[[ATTR15]]
; IS__TUNIT_OPM-NEXT: [[F12:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 3 ; IS__TUNIT_OPM-NEXT: [[F12:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 3
; IS__TUNIT_OPM-NEXT: store float 0x3FF19999A0000000, float* [[F12]], align 4, !tbaa [[TBAA7:![0-9]+]] ; IS__TUNIT_OPM-NEXT: store float 0x3FF19999A0000000, float* [[F12]], align 4, !tbaa [[TBAA7:![0-9]+]]
; IS__TUNIT_OPM-NEXT: [[MUL:%.*]] = fmul float 0x40019999A0000000, 2.000000e+00 ; IS__TUNIT_OPM-NEXT: [[MUL:%.*]] = fmul float 0x40019999A0000000, 2.000000e+00
; IS__TUNIT_OPM-NEXT: [[F24:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 4 ; IS__TUNIT_OPM-NEXT: [[F24:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 4
; IS__TUNIT_OPM-NEXT: store float [[MUL]], float* [[F24]], align 4, !tbaa [[TBAA10:![0-9]+]] ; IS__TUNIT_OPM-NEXT: store float [[MUL]], float* [[F24]], align 4, !tbaa [[TBAA10:![0-9]+]]
; IS__TUNIT_OPM-NEXT: [[ADD:%.*]] = fadd float 0x400A666660000000, 0x3FF19999A0000000 ; IS__TUNIT_OPM-NEXT: [[ADD:%.*]] = fadd float 0x400A666660000000, 0x3FF19999A0000000
; IS__TUNIT_OPM-NEXT: [[F37:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 5 ; IS__TUNIT_OPM-NEXT: [[F37:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 5
; IS__TUNIT_OPM-NEXT: store float [[ADD]], float* [[F37]], align 4, !tbaa [[TBAA11:![0-9]+]] ; IS__TUNIT_OPM-NEXT: store float [[ADD]], float* [[F37]], align 4, !tbaa [[TBAA11:![0-9]+]]
; IS__TUNIT_OPM-NEXT: [[I19:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 0 ; IS__TUNIT_OPM-NEXT: [[I19:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 0
; IS__TUNIT_OPM-NEXT: store i32 1, i32* [[I19]], align 4, !tbaa [[TBAA12:![0-9]+]] ; IS__TUNIT_OPM-NEXT: store i32 1, i32* [[I19]], align 4, !tbaa [[TBAA12:![0-9]+]]
; IS__TUNIT_OPM-NEXT: [[MUL11:%.*]] = shl nsw i32 2, 1 ; IS__TUNIT_OPM-NEXT: [[MUL11:%.*]] = shl nsw i32 2, 1
; IS__TUNIT_OPM-NEXT: [[I212:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 1 ; IS__TUNIT_OPM-NEXT: [[I212:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 1
; IS__TUNIT_OPM-NEXT: store i32 [[MUL11]], i32* [[I212]], align 4, !tbaa [[TBAA13:![0-9]+]] ; IS__TUNIT_OPM-NEXT: store i32 [[MUL11]], i32* [[I212]], align 4, !tbaa [[TBAA13:![0-9]+]]
; IS__TUNIT_OPM-NEXT: [[ADD15:%.*]] = add nsw i32 3, 1 ; IS__TUNIT_OPM-NEXT: [[ADD15:%.*]] = add nsw i32 3, 1
; IS__TUNIT_OPM-NEXT: [[I316:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 2 ; IS__TUNIT_OPM-NEXT: [[I316:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 2
; IS__TUNIT_OPM-NEXT: store i32 [[ADD15]], i32* [[I316]], align 4, !tbaa [[TBAA14:![0-9]+]] ; IS__TUNIT_OPM-NEXT: store i32 [[ADD15]], i32* [[I316]], align 4, !tbaa [[TBAA14:![0-9]+]]
; IS__TUNIT_OPM-NEXT: [[I12:%.*]] = bitcast %struct.S* [[S]] to i8* ; IS__TUNIT_OPM-NEXT: [[I12:%.*]] = bitcast %struct.S* [[S]] to i8*
; IS__TUNIT_OPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 24, i8* nocapture nofree noundef nonnull align 4 dereferenceable(24) [[I12]]) #[[ATTR11]] ; IS__TUNIT_OPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 24, i8* nocapture nofree noundef nonnull align 4 dereferenceable(24) [[I12]]) #[[ATTR14]]
; IS__TUNIT_OPM-NEXT: ret void ; IS__TUNIT_OPM-NEXT: ret void
; ;
; IS__TUNIT_NPM: Function Attrs: argmemonly nofree nosync nounwind willreturn ; IS__TUNIT_NPM: Function Attrs: argmemonly nofree nosync nounwind willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@local_alloca_simplifiable_1 ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@local_alloca_simplifiable_1
; IS__TUNIT_NPM-SAME: (%struct.S* noalias nocapture nofree nonnull writeonly sret([[STRUCT_S:%.*]]) align 4 dereferenceable(24) [[AGG_RESULT:%.*]]) #[[ATTR1:[0-9]+]] { ; IS__TUNIT_NPM-SAME: (%struct.S* noalias nocapture nofree nonnull writeonly sret([[STRUCT_S:%.*]]) align 4 dereferenceable(24) [[AGG_RESULT:%.*]]) #[[ATTR1:[0-9]+]] {
; IS__TUNIT_NPM-NEXT: entry: ; IS__TUNIT_NPM-NEXT: entry:
; IS__TUNIT_NPM-NEXT: [[S:%.*]] = alloca [[STRUCT_S]], align 4 ; IS__TUNIT_NPM-NEXT: [[S:%.*]] = alloca [[STRUCT_S]], align 4
; IS__TUNIT_NPM-NEXT: [[I:%.*]] = bitcast %struct.S* [[S]] to i8* ; IS__TUNIT_NPM-NEXT: [[I:%.*]] = bitcast %struct.S* [[S]] to i8*
; IS__TUNIT_NPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 24, i8* nocapture nofree noundef nonnull align 4 dereferenceable(24) [[I]]) #[[ATTR9:[0-9]+]] ; IS__TUNIT_NPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 24, i8* nocapture nofree noundef nonnull align 4 dereferenceable(24) [[I]]) #[[ATTR11:[0-9]+]]
; IS__TUNIT_NPM-NEXT: [[F1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 3 ; IS__TUNIT_NPM-NEXT: [[F1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 3
; IS__TUNIT_NPM-NEXT: [[F2:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 4 ; IS__TUNIT_NPM-NEXT: [[F2:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 4
; IS__TUNIT_NPM-NEXT: [[F3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 5 ; IS__TUNIT_NPM-NEXT: [[F3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 5
; IS__TUNIT_NPM-NEXT: [[I1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 0 ; IS__TUNIT_NPM-NEXT: [[I1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 0
; IS__TUNIT_NPM-NEXT: call void @write_arg(i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(24) [[I1]], i32 noundef 1) #[[ATTR4:[0-9]+]] ; IS__TUNIT_NPM-NEXT: call void @write_arg(i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(24) [[I1]], i32 noundef 1) #[[ATTR12:[0-9]+]]
; IS__TUNIT_NPM-NEXT: [[I2:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 1 ; IS__TUNIT_NPM-NEXT: [[I2:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 1
; IS__TUNIT_NPM-NEXT: call void @write_arg(i32* nocapture nofree nonnull writeonly align 4 dereferenceable(20) [[I2]], i32 noundef 2) #[[ATTR4]] ; IS__TUNIT_NPM-NEXT: call void @write_arg(i32* nocapture nofree nonnull writeonly align 4 dereferenceable(20) [[I2]], i32 noundef 2) #[[ATTR12]]
; IS__TUNIT_NPM-NEXT: [[I3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 2 ; IS__TUNIT_NPM-NEXT: [[I3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 2
; IS__TUNIT_NPM-NEXT: call void @write_arg(i32* nocapture nofree nonnull writeonly align 4 dereferenceable(16) [[I3]], i32 noundef 3) #[[ATTR4]] ; IS__TUNIT_NPM-NEXT: call void @write_arg(i32* nocapture nofree nonnull writeonly align 4 dereferenceable(16) [[I3]], i32 noundef 3) #[[ATTR12]]
; IS__TUNIT_NPM-NEXT: [[F12:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 3 ; IS__TUNIT_NPM-NEXT: [[F12:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 3
; IS__TUNIT_NPM-NEXT: store float 0x3FF19999A0000000, float* [[F12]], align 4, !tbaa [[TBAA7:![0-9]+]] ; IS__TUNIT_NPM-NEXT: store float 0x3FF19999A0000000, float* [[F12]], align 4, !tbaa [[TBAA7:![0-9]+]]
; IS__TUNIT_NPM-NEXT: [[MUL:%.*]] = fmul float 0x40019999A0000000, 2.000000e+00 ; IS__TUNIT_NPM-NEXT: [[MUL:%.*]] = fmul float 0x40019999A0000000, 2.000000e+00
; IS__TUNIT_NPM-NEXT: [[F24:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 4 ; IS__TUNIT_NPM-NEXT: [[F24:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 4
; IS__TUNIT_NPM-NEXT: store float [[MUL]], float* [[F24]], align 4, !tbaa [[TBAA10:![0-9]+]] ; IS__TUNIT_NPM-NEXT: store float [[MUL]], float* [[F24]], align 4, !tbaa [[TBAA10:![0-9]+]]
; IS__TUNIT_NPM-NEXT: [[ADD:%.*]] = fadd float 0x400A666660000000, 0x3FF19999A0000000 ; IS__TUNIT_NPM-NEXT: [[ADD:%.*]] = fadd float 0x400A666660000000, 0x3FF19999A0000000
; IS__TUNIT_NPM-NEXT: [[F37:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 5 ; IS__TUNIT_NPM-NEXT: [[F37:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 5
; IS__TUNIT_NPM-NEXT: store float [[ADD]], float* [[F37]], align 4, !tbaa [[TBAA11:![0-9]+]] ; IS__TUNIT_NPM-NEXT: store float [[ADD]], float* [[F37]], align 4, !tbaa [[TBAA11:![0-9]+]]
; IS__TUNIT_NPM-NEXT: [[I19:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 0 ; IS__TUNIT_NPM-NEXT: [[I19:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 0
; IS__TUNIT_NPM-NEXT: store i32 1, i32* [[I19]], align 4, !tbaa [[TBAA12:![0-9]+]] ; IS__TUNIT_NPM-NEXT: store i32 1, i32* [[I19]], align 4, !tbaa [[TBAA12:![0-9]+]]
; IS__TUNIT_NPM-NEXT: [[MUL11:%.*]] = shl nsw i32 2, 1 ; IS__TUNIT_NPM-NEXT: [[MUL11:%.*]] = shl nsw i32 2, 1
; IS__TUNIT_NPM-NEXT: [[I212:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 1 ; IS__TUNIT_NPM-NEXT: [[I212:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 1
; IS__TUNIT_NPM-NEXT: store i32 [[MUL11]], i32* [[I212]], align 4, !tbaa [[TBAA13:![0-9]+]] ; IS__TUNIT_NPM-NEXT: store i32 [[MUL11]], i32* [[I212]], align 4, !tbaa [[TBAA13:![0-9]+]]
; IS__TUNIT_NPM-NEXT: [[ADD15:%.*]] = add nsw i32 3, 1 ; IS__TUNIT_NPM-NEXT: [[ADD15:%.*]] = add nsw i32 3, 1
; IS__TUNIT_NPM-NEXT: [[I316:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 2 ; IS__TUNIT_NPM-NEXT: [[I316:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 2
; IS__TUNIT_NPM-NEXT: store i32 [[ADD15]], i32* [[I316]], align 4, !tbaa [[TBAA14:![0-9]+]] ; IS__TUNIT_NPM-NEXT: store i32 [[ADD15]], i32* [[I316]], align 4, !tbaa [[TBAA14:![0-9]+]]
; IS__TUNIT_NPM-NEXT: [[I12:%.*]] = bitcast %struct.S* [[S]] to i8* ; IS__TUNIT_NPM-NEXT: [[I12:%.*]] = bitcast %struct.S* [[S]] to i8*
; IS__TUNIT_NPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 24, i8* nocapture nofree noundef nonnull align 4 dereferenceable(24) [[I12]]) #[[ATTR9]] ; IS__TUNIT_NPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 24, i8* nocapture nofree noundef nonnull align 4 dereferenceable(24) [[I12]]) #[[ATTR11]]
; IS__TUNIT_NPM-NEXT: ret void ; IS__TUNIT_NPM-NEXT: ret void
; ;
; IS__CGSCC_OPM: Function Attrs: argmemonly nofree nosync nounwind willreturn ; IS__CGSCC_OPM: Function Attrs: argmemonly nofree nosync nounwind willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@local_alloca_simplifiable_1 ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@local_alloca_simplifiable_1
; IS__CGSCC_OPM-SAME: (%struct.S* noalias nocapture nofree nonnull writeonly sret([[STRUCT_S:%.*]]) align 4 dereferenceable(24) [[AGG_RESULT:%.*]]) #[[ATTR1:[0-9]+]] { ; IS__CGSCC_OPM-SAME: (%struct.S* noalias nocapture nofree nonnull writeonly sret([[STRUCT_S:%.*]]) align 4 dereferenceable(24) [[AGG_RESULT:%.*]]) #[[ATTR1:[0-9]+]] {
; IS__CGSCC_OPM-NEXT: entry: ; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: [[S:%.*]] = alloca [[STRUCT_S]], align 4 ; IS__CGSCC_OPM-NEXT: [[S:%.*]] = alloca [[STRUCT_S]], align 4
; IS__CGSCC_OPM-NEXT: [[I:%.*]] = bitcast %struct.S* [[S]] to i8* ; IS__CGSCC_OPM-NEXT: [[I:%.*]] = bitcast %struct.S* [[S]] to i8*
▲ Show 20 Lines • Show All 190 Lines • ▼ Show 20 Lines
; IS__TUNIT_OPM-NEXT: br label [[FOR_INC22]] ; IS__TUNIT_OPM-NEXT: br label [[FOR_INC22]]
; IS__TUNIT_OPM: for.inc22: ; IS__TUNIT_OPM: for.inc22:
; IS__TUNIT_OPM-NEXT: [[INDVARS_IV_NEXT8]] = add nuw nsw i64 [[INDVARS_IV7]], 1 ; IS__TUNIT_OPM-NEXT: [[INDVARS_IV_NEXT8]] = add nuw nsw i64 [[INDVARS_IV7]], 1
; IS__TUNIT_OPM-NEXT: br label [[FOR_COND13]], !llvm.loop [[LOOP18:![0-9]+]] ; IS__TUNIT_OPM-NEXT: br label [[FOR_COND13]], !llvm.loop [[LOOP18:![0-9]+]]
; IS__TUNIT_OPM: for.end24: ; IS__TUNIT_OPM: for.end24:
; IS__TUNIT_OPM-NEXT: [[ARRAYIDX25:%.*]] = getelementptr inbounds [1024 x i8], [1024 x i8]* [[BYTES]], i64 0, i64 1023 ; IS__TUNIT_OPM-NEXT: [[ARRAYIDX25:%.*]] = getelementptr inbounds [1024 x i8], [1024 x i8]* [[BYTES]], i64 0, i64 1023
; IS__TUNIT_OPM-NEXT: [[ARRAYIDX26:%.*]] = getelementptr inbounds [1024 x i8], [1024 x i8]* [[BYTES]], i64 0, i64 500 ; IS__TUNIT_OPM-NEXT: [[ARRAYIDX26:%.*]] = getelementptr inbounds [1024 x i8], [1024 x i8]* [[BYTES]], i64 0, i64 500
; IS__TUNIT_OPM-NEXT: [[I22:%.*]] = bitcast i8* [[ARRAYIDX26]] to i32* ; IS__TUNIT_OPM-NEXT: [[I22:%.*]] = bitcast i8* [[ARRAYIDX26]] to i32*
; IS__TUNIT_OPM-NEXT: call void @write_arg(i32* nocapture nofree nonnull writeonly align 4 dereferenceable(524) [[I22]], i32 noundef 0) #[[ATTR6:[0-9]+]] ; IS__TUNIT_OPM-NEXT: call void @write_arg(i32* nocapture nofree nonnull writeonly align 4 dereferenceable(524) [[I22]], i32 noundef 0) #[[ATTR16:[0-9]+]]
; IS__TUNIT_OPM-NEXT: br label [[FOR_COND28:%.*]] ; IS__TUNIT_OPM-NEXT: br label [[FOR_COND28:%.*]]
; IS__TUNIT_OPM: for.cond28: ; IS__TUNIT_OPM: for.cond28:
; IS__TUNIT_OPM-NEXT: [[INDVARS_IV12:%.*]] = phi i64 [ [[INDVARS_IV_NEXT13:%.*]], [[FOR_INC36:%.*]] ], [ 0, [[FOR_END24]] ] ; IS__TUNIT_OPM-NEXT: [[INDVARS_IV12:%.*]] = phi i64 [ [[INDVARS_IV_NEXT13:%.*]], [[FOR_INC36:%.*]] ], [ 0, [[FOR_END24]] ]
; IS__TUNIT_OPM-NEXT: [[EXITCOND14:%.*]] = icmp ne i64 [[INDVARS_IV12]], 1024 ; IS__TUNIT_OPM-NEXT: [[EXITCOND14:%.*]] = icmp ne i64 [[INDVARS_IV12]], 1024
; IS__TUNIT_OPM-NEXT: br i1 [[EXITCOND14]], label [[FOR_BODY31:%.*]], label [[FOR_COND_CLEANUP30:%.*]] ; IS__TUNIT_OPM-NEXT: br i1 [[EXITCOND14]], label [[FOR_BODY31:%.*]], label [[FOR_COND_CLEANUP30:%.*]]
; IS__TUNIT_OPM: for.cond.cleanup30: ; IS__TUNIT_OPM: for.cond.cleanup30:
; IS__TUNIT_OPM-NEXT: br label [[FOR_END38:%.*]] ; IS__TUNIT_OPM-NEXT: br label [[FOR_END38:%.*]]
; IS__TUNIT_OPM: for.body31: ; IS__TUNIT_OPM: for.body31:
Show All 9 Lines
; IS__TUNIT_OPM-NEXT: ret void ; IS__TUNIT_OPM-NEXT: ret void
; ;
; IS__TUNIT_NPM: Function Attrs: nofree nosync nounwind willreturn ; IS__TUNIT_NPM: Function Attrs: nofree nosync nounwind willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@local_alloca_simplifiable_2 ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@local_alloca_simplifiable_2
; IS__TUNIT_NPM-SAME: () #[[ATTR2:[0-9]+]] { ; IS__TUNIT_NPM-SAME: () #[[ATTR2:[0-9]+]] {
; IS__TUNIT_NPM-NEXT: entry: ; IS__TUNIT_NPM-NEXT: entry:
; IS__TUNIT_NPM-NEXT: [[BYTES:%.*]] = alloca [1024 x i8], align 16 ; IS__TUNIT_NPM-NEXT: [[BYTES:%.*]] = alloca [1024 x i8], align 16
; IS__TUNIT_NPM-NEXT: [[I:%.*]] = getelementptr inbounds [1024 x i8], [1024 x i8]* [[BYTES]], i64 0, i64 0 ; IS__TUNIT_NPM-NEXT: [[I:%.*]] = getelementptr inbounds [1024 x i8], [1024 x i8]* [[BYTES]], i64 0, i64 0
; IS__TUNIT_NPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 1024, i8* nocapture nofree noundef nonnull align 16 dereferenceable(1024) [[I]]) #[[ATTR9]] ; IS__TUNIT_NPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 1024, i8* nocapture nofree noundef nonnull align 16 dereferenceable(1024) [[I]]) #[[ATTR11]]
; IS__TUNIT_NPM-NEXT: br label [[FOR_COND:%.*]] ; IS__TUNIT_NPM-NEXT: br label [[FOR_COND:%.*]]
; IS__TUNIT_NPM: for.cond: ; IS__TUNIT_NPM: for.cond:
; IS__TUNIT_NPM-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[FOR_INC:%.*]] ], [ 0, [[ENTRY:%.*]] ] ; IS__TUNIT_NPM-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[FOR_INC:%.*]] ], [ 0, [[ENTRY:%.*]] ]
; IS__TUNIT_NPM-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV]], 100 ; IS__TUNIT_NPM-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV]], 100
; IS__TUNIT_NPM-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY:%.*]], label [[FOR_COND_CLEANUP:%.*]] ; IS__TUNIT_NPM-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY:%.*]], label [[FOR_COND_CLEANUP:%.*]]
; IS__TUNIT_NPM: for.cond.cleanup: ; IS__TUNIT_NPM: for.cond.cleanup:
; IS__TUNIT_NPM-NEXT: br label [[FOR_END:%.*]] ; IS__TUNIT_NPM-NEXT: br label [[FOR_END:%.*]]
; IS__TUNIT_NPM: for.body: ; IS__TUNIT_NPM: for.body:
Show All 36 Lines
; IS__TUNIT_NPM-NEXT: br label [[FOR_INC22]] ; IS__TUNIT_NPM-NEXT: br label [[FOR_INC22]]
; IS__TUNIT_NPM: for.inc22: ; IS__TUNIT_NPM: for.inc22:
; IS__TUNIT_NPM-NEXT: [[INDVARS_IV_NEXT8]] = add nuw nsw i64 [[INDVARS_IV7]], 1 ; IS__TUNIT_NPM-NEXT: [[INDVARS_IV_NEXT8]] = add nuw nsw i64 [[INDVARS_IV7]], 1
; IS__TUNIT_NPM-NEXT: br label [[FOR_COND13]], !llvm.loop [[LOOP18:![0-9]+]] ; IS__TUNIT_NPM-NEXT: br label [[FOR_COND13]], !llvm.loop [[LOOP18:![0-9]+]]
; IS__TUNIT_NPM: for.end24: ; IS__TUNIT_NPM: for.end24:
; IS__TUNIT_NPM-NEXT: [[ARRAYIDX25:%.*]] = getelementptr inbounds [1024 x i8], [1024 x i8]* [[BYTES]], i64 0, i64 1023 ; IS__TUNIT_NPM-NEXT: [[ARRAYIDX25:%.*]] = getelementptr inbounds [1024 x i8], [1024 x i8]* [[BYTES]], i64 0, i64 1023
; IS__TUNIT_NPM-NEXT: [[ARRAYIDX26:%.*]] = getelementptr inbounds [1024 x i8], [1024 x i8]* [[BYTES]], i64 0, i64 500 ; IS__TUNIT_NPM-NEXT: [[ARRAYIDX26:%.*]] = getelementptr inbounds [1024 x i8], [1024 x i8]* [[BYTES]], i64 0, i64 500
; IS__TUNIT_NPM-NEXT: [[I22:%.*]] = bitcast i8* [[ARRAYIDX26]] to i32* ; IS__TUNIT_NPM-NEXT: [[I22:%.*]] = bitcast i8* [[ARRAYIDX26]] to i32*
; IS__TUNIT_NPM-NEXT: call void @write_arg(i32* nocapture nofree nonnull writeonly align 4 dereferenceable(524) [[I22]], i32 noundef 0) #[[ATTR4]] ; IS__TUNIT_NPM-NEXT: call void @write_arg(i32* nocapture nofree nonnull writeonly align 4 dereferenceable(524) [[I22]], i32 noundef 0) #[[ATTR12]]
; IS__TUNIT_NPM-NEXT: br label [[FOR_COND28:%.*]] ; IS__TUNIT_NPM-NEXT: br label [[FOR_COND28:%.*]]
; IS__TUNIT_NPM: for.cond28: ; IS__TUNIT_NPM: for.cond28:
; IS__TUNIT_NPM-NEXT: [[INDVARS_IV12:%.*]] = phi i64 [ [[INDVARS_IV_NEXT13:%.*]], [[FOR_INC36:%.*]] ], [ 0, [[FOR_END24]] ] ; IS__TUNIT_NPM-NEXT: [[INDVARS_IV12:%.*]] = phi i64 [ [[INDVARS_IV_NEXT13:%.*]], [[FOR_INC36:%.*]] ], [ 0, [[FOR_END24]] ]
; IS__TUNIT_NPM-NEXT: [[EXITCOND14:%.*]] = icmp ne i64 [[INDVARS_IV12]], 1024 ; IS__TUNIT_NPM-NEXT: [[EXITCOND14:%.*]] = icmp ne i64 [[INDVARS_IV12]], 1024
; IS__TUNIT_NPM-NEXT: br i1 [[EXITCOND14]], label [[FOR_BODY31:%.*]], label [[FOR_COND_CLEANUP30:%.*]] ; IS__TUNIT_NPM-NEXT: br i1 [[EXITCOND14]], label [[FOR_BODY31:%.*]], label [[FOR_COND_CLEANUP30:%.*]]
; IS__TUNIT_NPM: for.cond.cleanup30: ; IS__TUNIT_NPM: for.cond.cleanup30:
; IS__TUNIT_NPM-NEXT: br label [[FOR_END38:%.*]] ; IS__TUNIT_NPM-NEXT: br label [[FOR_END38:%.*]]
; IS__TUNIT_NPM: for.body31: ; IS__TUNIT_NPM: for.body31:
; IS__TUNIT_NPM-NEXT: [[ARRAYIDX35:%.*]] = getelementptr inbounds [1024 x i8], [1024 x i8]* @globalBytes, i64 0, i64 [[INDVARS_IV12]] ; IS__TUNIT_NPM-NEXT: [[ARRAYIDX35:%.*]] = getelementptr inbounds [1024 x i8], [1024 x i8]* @globalBytes, i64 0, i64 [[INDVARS_IV12]]
; IS__TUNIT_NPM-NEXT: store i8 0, i8* [[ARRAYIDX35]], align 1, !tbaa [[TBAA19:![0-9]+]] ; IS__TUNIT_NPM-NEXT: store i8 0, i8* [[ARRAYIDX35]], align 1, !tbaa [[TBAA19:![0-9]+]]
; IS__TUNIT_NPM-NEXT: br label [[FOR_INC36]] ; IS__TUNIT_NPM-NEXT: br label [[FOR_INC36]]
; IS__TUNIT_NPM: for.inc36: ; IS__TUNIT_NPM: for.inc36:
; IS__TUNIT_NPM-NEXT: [[INDVARS_IV_NEXT13]] = add nuw nsw i64 [[INDVARS_IV12]], 1 ; IS__TUNIT_NPM-NEXT: [[INDVARS_IV_NEXT13]] = add nuw nsw i64 [[INDVARS_IV12]], 1
; IS__TUNIT_NPM-NEXT: br label [[FOR_COND28]], !llvm.loop [[LOOP20:![0-9]+]] ; IS__TUNIT_NPM-NEXT: br label [[FOR_COND28]], !llvm.loop [[LOOP20:![0-9]+]]
; IS__TUNIT_NPM: for.end38: ; IS__TUNIT_NPM: for.end38:
; IS__TUNIT_NPM-NEXT: [[I24:%.*]] = getelementptr inbounds [1024 x i8], [1024 x i8]* [[BYTES]], i64 0, i64 0 ; IS__TUNIT_NPM-NEXT: [[I24:%.*]] = getelementptr inbounds [1024 x i8], [1024 x i8]* [[BYTES]], i64 0, i64 0
; IS__TUNIT_NPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 1024, i8* nocapture nofree noundef nonnull align 16 dereferenceable(1024) [[I24]]) #[[ATTR9]] ; IS__TUNIT_NPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 1024, i8* nocapture nofree noundef nonnull align 16 dereferenceable(1024) [[I24]]) #[[ATTR11]]
; IS__TUNIT_NPM-NEXT: ret void ; IS__TUNIT_NPM-NEXT: ret void
; ;
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@local_alloca_simplifiable_2() { ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@local_alloca_simplifiable_2() {
; IS__CGSCC_OPM-NEXT: entry: ; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: [[BYTES:%.*]] = alloca [1024 x i8], align 16 ; IS__CGSCC_OPM-NEXT: [[BYTES:%.*]] = alloca [1024 x i8], align 16
; IS__CGSCC_OPM-NEXT: [[I:%.*]] = getelementptr inbounds [1024 x i8], [1024 x i8]* [[BYTES]], i64 0, i64 0 ; IS__CGSCC_OPM-NEXT: [[I:%.*]] = getelementptr inbounds [1024 x i8], [1024 x i8]* [[BYTES]], i64 0, i64 0
; IS__CGSCC_OPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 1024, i8* nocapture nofree noundef nonnull align 16 dereferenceable(1024) [[I]]) ; IS__CGSCC_OPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 1024, i8* nocapture nofree noundef nonnull align 16 dereferenceable(1024) [[I]])
; IS__CGSCC_OPM-NEXT: br label [[FOR_COND:%.*]] ; IS__CGSCC_OPM-NEXT: br label [[FOR_COND:%.*]]
▲ Show 20 Lines • Show All 263 Lines • ▼ Show 20 Lines
; int local_alloca_simplifiable_3() { ; int local_alloca_simplifiable_3() {
; int A = 1; ; int A = 1;
; // split ; // split
; A = 2; ; A = 2;
; return A; ; return A;
; } ; }
; ;
define i32 @local_alloca_simplifiable_3() { define i32 @local_alloca_simplifiable_3() {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@local_alloca_simplifiable_3 ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@local_alloca_simplifiable_3
; IS__TUNIT____-SAME: () #[[ATTR3:[0-9]+]] { ; IS__TUNIT_OPM-SAME: () #[[ATTR3:[0-9]+]] {
; IS__TUNIT____-NEXT: [[A:%.*]] = alloca i32, align 4 ; IS__TUNIT_OPM-NEXT: [[A:%.*]] = alloca i32, align 4
; IS__TUNIT____-NEXT: store i32 1, i32* [[A]], align 4 ; IS__TUNIT_OPM-NEXT: store i32 1, i32* [[A]], align 4
; IS__TUNIT____-NEXT: br label [[SPLIT:%.*]] ; IS__TUNIT_OPM-NEXT: br label [[SPLIT:%.*]]
; IS__TUNIT____: split: ; IS__TUNIT_OPM: split:
; IS__TUNIT____-NEXT: store i32 2, i32* [[A]], align 4 ; IS__TUNIT_OPM-NEXT: store i32 2, i32* [[A]], align 4
; IS__TUNIT____-NEXT: [[L:%.*]] = load i32, i32* [[A]], align 4 ; IS__TUNIT_OPM-NEXT: [[L:%.*]] = load i32, i32* [[A]], align 4
; IS__TUNIT____-NEXT: ret i32 [[L]] ; IS__TUNIT_OPM-NEXT: ret i32 [[L]]
;
; IS__TUNIT_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@local_alloca_simplifiable_3
; IS__TUNIT_NPM-SAME: () #[[ATTR3:[0-9]+]] {
; IS__TUNIT_NPM-NEXT: br label [[SPLIT:%.*]]
; IS__TUNIT_NPM: split:
; IS__TUNIT_NPM-NEXT: ret i32 2
; ;
; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@local_alloca_simplifiable_3 ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@local_alloca_simplifiable_3
; IS__CGSCC_OPM-SAME: () #[[ATTR2:[0-9]+]] { ; IS__CGSCC_OPM-SAME: () #[[ATTR2:[0-9]+]] {
; IS__CGSCC_OPM-NEXT: [[A:%.*]] = alloca i32, align 4 ; IS__CGSCC_OPM-NEXT: [[A:%.*]] = alloca i32, align 4
; IS__CGSCC_OPM-NEXT: store i32 1, i32* [[A]], align 4 ; IS__CGSCC_OPM-NEXT: store i32 1, i32* [[A]], align 4
; IS__CGSCC_OPM-NEXT: br label [[SPLIT:%.*]] ; IS__CGSCC_OPM-NEXT: br label [[SPLIT:%.*]]
; IS__CGSCC_OPM: split: ; IS__CGSCC_OPM: split:
Show All 17 Linessplit:
ret i32 %l ret i32 %l
} }
; int local_alloca_simplifiable_4() { ; int local_alloca_simplifiable_4() {
; int A; ; int A;
; return A; ; return A;
; } ; }
; ;
define i32 @local_alloca_simplifiable_4() { define i32 @local_alloca_simplifiable_4() {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__TUNIT____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@local_alloca_simplifiable_4 ; IS__TUNIT____-LABEL: define {{[^@]+}}@local_alloca_simplifiable_4
; IS__TUNIT____-SAME: () #[[ATTR3]] { ; IS__TUNIT____-SAME: () #[[ATTR3:[0-9]+]] {
; IS__TUNIT____-NEXT: ret i32 undef ; IS__TUNIT____-NEXT: ret i32 undef
; ;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@local_alloca_simplifiable_4 ; IS__CGSCC____-LABEL: define {{[^@]+}}@local_alloca_simplifiable_4
; IS__CGSCC____-SAME: () #[[ATTR2:[0-9]+]] { ; IS__CGSCC____-SAME: () #[[ATTR2:[0-9]+]] {
; IS__CGSCC____-NEXT: ret i32 undef ; IS__CGSCC____-NEXT: ret i32 undef
; ;
%A = alloca i32, align 4 %A = alloca i32, align 4
Show All 9 Lines
; } ; }
define i32 @multi_obj_simplifiable_1(i32 %cnd) { define i32 @multi_obj_simplifiable_1(i32 %cnd) {
; IS__TUNIT_OPM: Function Attrs: nofree nosync nounwind willreturn ; IS__TUNIT_OPM: Function Attrs: nofree nosync nounwind willreturn
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@multi_obj_simplifiable_1 ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@multi_obj_simplifiable_1
; IS__TUNIT_OPM-SAME: (i32 [[CND:%.*]]) #[[ATTR4:[0-9]+]] { ; IS__TUNIT_OPM-SAME: (i32 [[CND:%.*]]) #[[ATTR4:[0-9]+]] {
; IS__TUNIT_OPM-NEXT: entry: ; IS__TUNIT_OPM-NEXT: entry:
; IS__TUNIT_OPM-NEXT: [[L:%.*]] = alloca i32, align 4 ; IS__TUNIT_OPM-NEXT: [[L:%.*]] = alloca i32, align 4
; IS__TUNIT_OPM-NEXT: [[I:%.*]] = bitcast i32* [[L]] to i8* ; IS__TUNIT_OPM-NEXT: [[I:%.*]] = bitcast i32* [[L]] to i8*
; IS__TUNIT_OPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I]]) #[[ATTR11]] ; IS__TUNIT_OPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I]]) #[[ATTR14]]
; IS__TUNIT_OPM-NEXT: [[TOBOOL_NOT:%.*]] = icmp eq i32 [[CND]], 0 ; IS__TUNIT_OPM-NEXT: [[TOBOOL_NOT:%.*]] = icmp eq i32 [[CND]], 0
; IS__TUNIT_OPM-NEXT: br i1 [[TOBOOL_NOT]], label [[COND_FALSE:%.*]], label [[COND_TRUE:%.*]] ; IS__TUNIT_OPM-NEXT: br i1 [[TOBOOL_NOT]], label [[COND_FALSE:%.*]], label [[COND_TRUE:%.*]]
; IS__TUNIT_OPM: cond.true: ; IS__TUNIT_OPM: cond.true:
; IS__TUNIT_OPM-NEXT: br label [[COND_END:%.*]] ; IS__TUNIT_OPM-NEXT: br label [[COND_END:%.*]]
; IS__TUNIT_OPM: cond.false: ; IS__TUNIT_OPM: cond.false:
; IS__TUNIT_OPM-NEXT: br label [[COND_END]] ; IS__TUNIT_OPM-NEXT: br label [[COND_END]]
; IS__TUNIT_OPM: cond.end: ; IS__TUNIT_OPM: cond.end:
; IS__TUNIT_OPM-NEXT: [[I2:%.*]] = bitcast i32* [[L]] to i8* ; IS__TUNIT_OPM-NEXT: [[I2:%.*]] = bitcast i32* [[L]] to i8*
; IS__TUNIT_OPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I2]]) #[[ATTR11]] ; IS__TUNIT_OPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I2]]) #[[ATTR14]]
; IS__TUNIT_OPM-NEXT: ret i32 5 ; IS__TUNIT_OPM-NEXT: ret i32 5
; ;
; IS__TUNIT_NPM: Function Attrs: nofree nosync nounwind willreturn ; IS__TUNIT_NPM: Function Attrs: nofree nosync nounwind willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@multi_obj_simplifiable_1 ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@multi_obj_simplifiable_1
; IS__TUNIT_NPM-SAME: (i32 [[CND:%.*]]) #[[ATTR2]] { ; IS__TUNIT_NPM-SAME: (i32 [[CND:%.*]]) #[[ATTR2]] {
; IS__TUNIT_NPM-NEXT: entry: ; IS__TUNIT_NPM-NEXT: entry:
; IS__TUNIT_NPM-NEXT: [[L:%.*]] = alloca i32, align 4 ; IS__TUNIT_NPM-NEXT: [[L:%.*]] = alloca i32, align 4
; IS__TUNIT_NPM-NEXT: [[I:%.*]] = bitcast i32* [[L]] to i8* ; IS__TUNIT_NPM-NEXT: [[I:%.*]] = bitcast i32* [[L]] to i8*
; IS__TUNIT_NPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I]]) #[[ATTR9]] ; IS__TUNIT_NPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I]]) #[[ATTR11]]
; IS__TUNIT_NPM-NEXT: [[TOBOOL_NOT:%.*]] = icmp eq i32 [[CND]], 0 ; IS__TUNIT_NPM-NEXT: [[TOBOOL_NOT:%.*]] = icmp eq i32 [[CND]], 0
; IS__TUNIT_NPM-NEXT: br i1 [[TOBOOL_NOT]], label [[COND_FALSE:%.*]], label [[COND_TRUE:%.*]] ; IS__TUNIT_NPM-NEXT: br i1 [[TOBOOL_NOT]], label [[COND_FALSE:%.*]], label [[COND_TRUE:%.*]]
; IS__TUNIT_NPM: cond.true: ; IS__TUNIT_NPM: cond.true:
; IS__TUNIT_NPM-NEXT: br label [[COND_END:%.*]] ; IS__TUNIT_NPM-NEXT: br label [[COND_END:%.*]]
; IS__TUNIT_NPM: cond.false: ; IS__TUNIT_NPM: cond.false:
; IS__TUNIT_NPM-NEXT: br label [[COND_END]] ; IS__TUNIT_NPM-NEXT: br label [[COND_END]]
; IS__TUNIT_NPM: cond.end: ; IS__TUNIT_NPM: cond.end:
; IS__TUNIT_NPM-NEXT: [[I2:%.*]] = bitcast i32* [[L]] to i8* ; IS__TUNIT_NPM-NEXT: [[I2:%.*]] = bitcast i32* [[L]] to i8*
; IS__TUNIT_NPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I2]]) #[[ATTR9]] ; IS__TUNIT_NPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I2]]) #[[ATTR11]]
; IS__TUNIT_NPM-NEXT: ret i32 5 ; IS__TUNIT_NPM-NEXT: ret i32 5
; ;
; IS__CGSCC_OPM: Function Attrs: nofree nosync nounwind willreturn ; IS__CGSCC_OPM: Function Attrs: nofree nosync nounwind willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@multi_obj_simplifiable_1 ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@multi_obj_simplifiable_1
; IS__CGSCC_OPM-SAME: (i32 [[CND:%.*]]) #[[ATTR3:[0-9]+]] { ; IS__CGSCC_OPM-SAME: (i32 [[CND:%.*]]) #[[ATTR3:[0-9]+]] {
; IS__CGSCC_OPM-NEXT: entry: ; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: [[L:%.*]] = alloca i32, align 4 ; IS__CGSCC_OPM-NEXT: [[L:%.*]] = alloca i32, align 4
; IS__CGSCC_OPM-NEXT: [[I:%.*]] = bitcast i32* [[L]] to i8* ; IS__CGSCC_OPM-NEXT: [[I:%.*]] = bitcast i32* [[L]] to i8*
▲ Show 20 Lines • Show All 60 Lines • ▼ Show 20 Lines
; ;
define i32 @multi_obj_simplifiable_2(i32 %cnd) { define i32 @multi_obj_simplifiable_2(i32 %cnd) {
; IS__TUNIT_OPM: Function Attrs: nofree nosync nounwind willreturn ; IS__TUNIT_OPM: Function Attrs: nofree nosync nounwind willreturn
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@multi_obj_simplifiable_2 ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@multi_obj_simplifiable_2
; IS__TUNIT_OPM-SAME: (i32 [[CND:%.*]]) #[[ATTR4]] { ; IS__TUNIT_OPM-SAME: (i32 [[CND:%.*]]) #[[ATTR4]] {
; IS__TUNIT_OPM-NEXT: entry: ; IS__TUNIT_OPM-NEXT: entry:
; IS__TUNIT_OPM-NEXT: [[L:%.*]] = alloca i32, align 4 ; IS__TUNIT_OPM-NEXT: [[L:%.*]] = alloca i32, align 4
; IS__TUNIT_OPM-NEXT: [[I:%.*]] = bitcast i32* [[L]] to i8* ; IS__TUNIT_OPM-NEXT: [[I:%.*]] = bitcast i32* [[L]] to i8*
; IS__TUNIT_OPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I]]) #[[ATTR11]] ; IS__TUNIT_OPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I]]) #[[ATTR14]]
; IS__TUNIT_OPM-NEXT: [[TOBOOL_NOT:%.*]] = icmp eq i32 [[CND]], 0 ; IS__TUNIT_OPM-NEXT: [[TOBOOL_NOT:%.*]] = icmp eq i32 [[CND]], 0
; IS__TUNIT_OPM-NEXT: br i1 [[TOBOOL_NOT]], label [[COND_FALSE:%.*]], label [[COND_TRUE:%.*]] ; IS__TUNIT_OPM-NEXT: br i1 [[TOBOOL_NOT]], label [[COND_FALSE:%.*]], label [[COND_TRUE:%.*]]
; IS__TUNIT_OPM: cond.true: ; IS__TUNIT_OPM: cond.true:
; IS__TUNIT_OPM-NEXT: br label [[COND_END:%.*]] ; IS__TUNIT_OPM-NEXT: br label [[COND_END:%.*]]
; IS__TUNIT_OPM: cond.false: ; IS__TUNIT_OPM: cond.false:
; IS__TUNIT_OPM-NEXT: br label [[COND_END]] ; IS__TUNIT_OPM-NEXT: br label [[COND_END]]
; IS__TUNIT_OPM: cond.end: ; IS__TUNIT_OPM: cond.end:
; IS__TUNIT_OPM-NEXT: [[I1:%.*]] = bitcast i32* [[L]] to i8* ; IS__TUNIT_OPM-NEXT: [[I1:%.*]] = bitcast i32* [[L]] to i8*
; IS__TUNIT_OPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I1]]) #[[ATTR11]] ; IS__TUNIT_OPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I1]]) #[[ATTR14]]
; IS__TUNIT_OPM-NEXT: ret i32 5 ; IS__TUNIT_OPM-NEXT: ret i32 5
; ;
; IS__TUNIT_NPM: Function Attrs: nofree nosync nounwind willreturn ; IS__TUNIT_NPM: Function Attrs: nofree nosync nounwind willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@multi_obj_simplifiable_2 ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@multi_obj_simplifiable_2
; IS__TUNIT_NPM-SAME: (i32 [[CND:%.*]]) #[[ATTR2]] { ; IS__TUNIT_NPM-SAME: (i32 [[CND:%.*]]) #[[ATTR2]] {
; IS__TUNIT_NPM-NEXT: entry: ; IS__TUNIT_NPM-NEXT: entry:
; IS__TUNIT_NPM-NEXT: [[L:%.*]] = alloca i32, align 4 ; IS__TUNIT_NPM-NEXT: [[L:%.*]] = alloca i32, align 4
; IS__TUNIT_NPM-NEXT: [[I:%.*]] = bitcast i32* [[L]] to i8* ; IS__TUNIT_NPM-NEXT: [[I:%.*]] = bitcast i32* [[L]] to i8*
; IS__TUNIT_NPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I]]) #[[ATTR9]] ; IS__TUNIT_NPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I]]) #[[ATTR11]]
; IS__TUNIT_NPM-NEXT: [[TOBOOL_NOT:%.*]] = icmp eq i32 [[CND]], 0 ; IS__TUNIT_NPM-NEXT: [[TOBOOL_NOT:%.*]] = icmp eq i32 [[CND]], 0
; IS__TUNIT_NPM-NEXT: br i1 [[TOBOOL_NOT]], label [[COND_FALSE:%.*]], label [[COND_TRUE:%.*]] ; IS__TUNIT_NPM-NEXT: br i1 [[TOBOOL_NOT]], label [[COND_FALSE:%.*]], label [[COND_TRUE:%.*]]
; IS__TUNIT_NPM: cond.true: ; IS__TUNIT_NPM: cond.true:
; IS__TUNIT_NPM-NEXT: br label [[COND_END:%.*]] ; IS__TUNIT_NPM-NEXT: br label [[COND_END:%.*]]
; IS__TUNIT_NPM: cond.false: ; IS__TUNIT_NPM: cond.false:
; IS__TUNIT_NPM-NEXT: br label [[COND_END]] ; IS__TUNIT_NPM-NEXT: br label [[COND_END]]
; IS__TUNIT_NPM: cond.end: ; IS__TUNIT_NPM: cond.end:
; IS__TUNIT_NPM-NEXT: [[I1:%.*]] = bitcast i32* [[L]] to i8* ; IS__TUNIT_NPM-NEXT: [[I1:%.*]] = bitcast i32* [[L]] to i8*
; IS__TUNIT_NPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I1]]) #[[ATTR9]] ; IS__TUNIT_NPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I1]]) #[[ATTR11]]
; IS__TUNIT_NPM-NEXT: ret i32 5 ; IS__TUNIT_NPM-NEXT: ret i32 5
; ;
; IS__CGSCC_OPM: Function Attrs: nofree nosync nounwind willreturn ; IS__CGSCC_OPM: Function Attrs: nofree nosync nounwind willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@multi_obj_simplifiable_2 ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@multi_obj_simplifiable_2
; IS__CGSCC_OPM-SAME: (i32 [[CND:%.*]]) #[[ATTR3]] { ; IS__CGSCC_OPM-SAME: (i32 [[CND:%.*]]) #[[ATTR3]] {
; IS__CGSCC_OPM-NEXT: entry: ; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: [[L:%.*]] = alloca i32, align 4 ; IS__CGSCC_OPM-NEXT: [[L:%.*]] = alloca i32, align 4
; IS__CGSCC_OPM-NEXT: [[I:%.*]] = bitcast i32* [[L]] to i8* ; IS__CGSCC_OPM-NEXT: [[I:%.*]] = bitcast i32* [[L]] to i8*
▲ Show 20 Lines • Show All 63 Lines • ▼ Show 20 Lines
; r.f3 = Gs.f3 + Gs.f1; ; r.f3 = Gs.f3 + Gs.f1;
; r.i1 = Gs.i1; ; r.i1 = Gs.i1;
; r.i2 = Gs.i2 * 2; ; r.i2 = Gs.i2 * 2;
; r.i3 = Gs.i3 + Gs.i1; ; r.i3 = Gs.i3 + Gs.i1;
; return r; ; return r;
; } ; }
; ;
define void @static_global_simplifiable_1(%struct.S* noalias sret(%struct.S) align 4 %agg.result) { define void @static_global_simplifiable_1(%struct.S* noalias sret(%struct.S) align 4 %agg.result) {
; IS__TUNIT_OPM: Function Attrs: nofree nosync nounwind willreturn writeonly ; IS__TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@static_global_simplifiable_1 ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@static_global_simplifiable_1
; IS__TUNIT_OPM-SAME: (%struct.S* noalias nocapture nofree nonnull writeonly sret([[STRUCT_S:%.*]]) align 4 dereferenceable(24) [[AGG_RESULT:%.*]]) #[[ATTR5]] { ; IS__TUNIT_OPM-SAME: (%struct.S* noalias nocapture nofree nonnull writeonly sret([[STRUCT_S:%.*]]) align 4 dereferenceable(24) [[AGG_RESULT:%.*]]) #[[ATTR5:[0-9]+]] {
; IS__TUNIT_OPM-NEXT: entry: ; IS__TUNIT_OPM-NEXT: entry:
; IS__TUNIT_OPM-NEXT: call void @write_arg(i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(24) getelementptr inbounds ([[STRUCT_S]], %struct.S* @Gs1, i32 0, i32 0), i32 noundef 1) #[[ATTR5]] ; IS__TUNIT_OPM-NEXT: call void @write_arg(i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(24) getelementptr inbounds ([[STRUCT_S]], %struct.S* @Gs1, i32 0, i32 0), i32 noundef 1) #[[ATTR15]]
; IS__TUNIT_OPM-NEXT: call void @write_arg(i32* nocapture nofree writeonly align 4 dereferenceable_or_null(20) getelementptr inbounds ([[STRUCT_S]], %struct.S* @Gs1, i64 0, i32 1), i32 noundef 2) #[[ATTR5]] ; IS__TUNIT_OPM-NEXT: call void @write_arg(i32* nocapture nofree writeonly align 4 dereferenceable_or_null(20) getelementptr inbounds ([[STRUCT_S]], %struct.S* @Gs1, i64 0, i32 1), i32 noundef 2) #[[ATTR15]]
; IS__TUNIT_OPM-NEXT: call void @write_arg(i32* nocapture nofree writeonly align 4 dereferenceable_or_null(16) getelementptr inbounds ([[STRUCT_S]], %struct.S* @Gs1, i64 0, i32 2), i32 noundef 3) #[[ATTR5]] ; IS__TUNIT_OPM-NEXT: call void @write_arg(i32* nocapture nofree writeonly align 4 dereferenceable_or_null(16) getelementptr inbounds ([[STRUCT_S]], %struct.S* @Gs1, i64 0, i32 2), i32 noundef 3) #[[ATTR15]]
; IS__TUNIT_OPM-NEXT: [[F1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 3 ; IS__TUNIT_OPM-NEXT: [[F1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 3
; IS__TUNIT_OPM-NEXT: store float 0x3FF19999A0000000, float* [[F1]], align 4, !tbaa [[TBAA7]] ; IS__TUNIT_OPM-NEXT: store float 0x3FF19999A0000000, float* [[F1]], align 4, !tbaa [[TBAA7]]
; IS__TUNIT_OPM-NEXT: [[MUL:%.*]] = fmul float 0x40019999A0000000, 2.000000e+00 ; IS__TUNIT_OPM-NEXT: [[MUL:%.*]] = fmul float 0x40019999A0000000, 2.000000e+00
; IS__TUNIT_OPM-NEXT: [[F2:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 4 ; IS__TUNIT_OPM-NEXT: [[F2:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 4
; IS__TUNIT_OPM-NEXT: store float [[MUL]], float* [[F2]], align 4, !tbaa [[TBAA10]] ; IS__TUNIT_OPM-NEXT: store float [[MUL]], float* [[F2]], align 4, !tbaa [[TBAA10]]
; IS__TUNIT_OPM-NEXT: [[ADD:%.*]] = fadd float 0x400A666660000000, 0x3FF19999A0000000 ; IS__TUNIT_OPM-NEXT: [[ADD:%.*]] = fadd float 0x400A666660000000, 0x3FF19999A0000000
; IS__TUNIT_OPM-NEXT: [[F3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 5 ; IS__TUNIT_OPM-NEXT: [[F3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 5
; IS__TUNIT_OPM-NEXT: store float [[ADD]], float* [[F3]], align 4, !tbaa [[TBAA11]] ; IS__TUNIT_OPM-NEXT: store float [[ADD]], float* [[F3]], align 4, !tbaa [[TBAA11]]
; IS__TUNIT_OPM-NEXT: [[I1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 0 ; IS__TUNIT_OPM-NEXT: [[I1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 0
; IS__TUNIT_OPM-NEXT: store i32 1, i32* [[I1]], align 4, !tbaa [[TBAA12]] ; IS__TUNIT_OPM-NEXT: store i32 1, i32* [[I1]], align 4, !tbaa [[TBAA12]]
; IS__TUNIT_OPM-NEXT: [[MUL1:%.*]] = shl nsw i32 2, 1 ; IS__TUNIT_OPM-NEXT: [[MUL1:%.*]] = shl nsw i32 2, 1
; IS__TUNIT_OPM-NEXT: [[I2:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 1 ; IS__TUNIT_OPM-NEXT: [[I2:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 1
; IS__TUNIT_OPM-NEXT: store i32 [[MUL1]], i32* [[I2]], align 4, !tbaa [[TBAA13]] ; IS__TUNIT_OPM-NEXT: store i32 [[MUL1]], i32* [[I2]], align 4, !tbaa [[TBAA13]]
; IS__TUNIT_OPM-NEXT: [[ADD2:%.*]] = add nsw i32 3, 1 ; IS__TUNIT_OPM-NEXT: [[ADD2:%.*]] = add nsw i32 3, 1
; IS__TUNIT_OPM-NEXT: [[I3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 2 ; IS__TUNIT_OPM-NEXT: [[I3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 2
; IS__TUNIT_OPM-NEXT: store i32 [[ADD2]], i32* [[I3]], align 4, !tbaa [[TBAA14]] ; IS__TUNIT_OPM-NEXT: store i32 [[ADD2]], i32* [[I3]], align 4, !tbaa [[TBAA14]]
; IS__TUNIT_OPM-NEXT: ret void ; IS__TUNIT_OPM-NEXT: ret void
; ;
; IS__TUNIT_NPM: Function Attrs: nofree nosync nounwind willreturn writeonly ; IS__TUNIT_NPM: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@static_global_simplifiable_1 ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@static_global_simplifiable_1
; IS__TUNIT_NPM-SAME: (%struct.S* noalias nocapture nofree nonnull writeonly sret([[STRUCT_S:%.*]]) align 4 dereferenceable(24) [[AGG_RESULT:%.*]]) #[[ATTR4]] { ; IS__TUNIT_NPM-SAME: (%struct.S* noalias nocapture nofree nonnull writeonly sret([[STRUCT_S:%.*]]) align 4 dereferenceable(24) [[AGG_RESULT:%.*]]) #[[ATTR4:[0-9]+]] {
; IS__TUNIT_NPM-NEXT: entry: ; IS__TUNIT_NPM-NEXT: entry:
; IS__TUNIT_NPM-NEXT: call void @write_arg(i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(24) getelementptr inbounds ([[STRUCT_S]], %struct.S* @Gs1, i32 0, i32 0), i32 noundef 1) #[[ATTR4]] ; IS__TUNIT_NPM-NEXT: call void @write_arg(i32* nocapture nofree noundef nonnull writeonly align 4 dereferenceable(24) getelementptr inbounds ([[STRUCT_S]], %struct.S* @Gs1, i32 0, i32 0), i32 noundef 1) #[[ATTR12]]
; IS__TUNIT_NPM-NEXT: call void @write_arg(i32* nocapture nofree writeonly align 4 dereferenceable_or_null(20) getelementptr inbounds ([[STRUCT_S]], %struct.S* @Gs1, i64 0, i32 1), i32 noundef 2) #[[ATTR4]] ; IS__TUNIT_NPM-NEXT: call void @write_arg(i32* nocapture nofree writeonly align 4 dereferenceable_or_null(20) getelementptr inbounds ([[STRUCT_S]], %struct.S* @Gs1, i64 0, i32 1), i32 noundef 2) #[[ATTR12]]
; IS__TUNIT_NPM-NEXT: call void @write_arg(i32* nocapture nofree writeonly align 4 dereferenceable_or_null(16) getelementptr inbounds ([[STRUCT_S]], %struct.S* @Gs1, i64 0, i32 2), i32 noundef 3) #[[ATTR4]] ; IS__TUNIT_NPM-NEXT: call void @write_arg(i32* nocapture nofree writeonly align 4 dereferenceable_or_null(16) getelementptr inbounds ([[STRUCT_S]], %struct.S* @Gs1, i64 0, i32 2), i32 noundef 3) #[[ATTR12]]
; IS__TUNIT_NPM-NEXT: [[F1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 3 ; IS__TUNIT_NPM-NEXT: [[F1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 3
; IS__TUNIT_NPM-NEXT: store float 0x3FF19999A0000000, float* [[F1]], align 4, !tbaa [[TBAA7]] ; IS__TUNIT_NPM-NEXT: store float 0x3FF19999A0000000, float* [[F1]], align 4, !tbaa [[TBAA7]]
; IS__TUNIT_NPM-NEXT: [[MUL:%.*]] = fmul float 0x40019999A0000000, 2.000000e+00 ; IS__TUNIT_NPM-NEXT: [[MUL:%.*]] = fmul float 0x40019999A0000000, 2.000000e+00
; IS__TUNIT_NPM-NEXT: [[F2:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 4 ; IS__TUNIT_NPM-NEXT: [[F2:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 4
; IS__TUNIT_NPM-NEXT: store float [[MUL]], float* [[F2]], align 4, !tbaa [[TBAA10]] ; IS__TUNIT_NPM-NEXT: store float [[MUL]], float* [[F2]], align 4, !tbaa [[TBAA10]]
; IS__TUNIT_NPM-NEXT: [[ADD:%.*]] = fadd float 0x400A666660000000, 0x3FF19999A0000000 ; IS__TUNIT_NPM-NEXT: [[ADD:%.*]] = fadd float 0x400A666660000000, 0x3FF19999A0000000
; IS__TUNIT_NPM-NEXT: [[F3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 5 ; IS__TUNIT_NPM-NEXT: [[F3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 5
; IS__TUNIT_NPM-NEXT: store float [[ADD]], float* [[F3]], align 4, !tbaa [[TBAA11]] ; IS__TUNIT_NPM-NEXT: store float [[ADD]], float* [[F3]], align 4, !tbaa [[TBAA11]]
▲ Show 20 Lines • Show All 102 Lines • ▼ Show 20 Lines
; GBytes[1023] = 0; ; GBytes[1023] = 0;
; write_arg((int *)&GBytes[500], 0); ; write_arg((int *)&GBytes[500], 0);
; struct S R; ; struct S R;
; for (int i = 0; i < 1024; ++i) ; for (int i = 0; i < 1024; ++i)
; globalBytes[i] = GBytes[i]; ; globalBytes[i] = GBytes[i];
; } ; }
; ;
define void @static_global_simplifiable_2() { define void @static_global_simplifiable_2() {
; IS__TUNIT_OPM: Function Attrs: nofree nosync nounwind writeonly ; IS__TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind writeonly
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@static_global_simplifiable_2 ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@static_global_simplifiable_2
; IS__TUNIT_OPM-SAME: () #[[ATTR6]] { ; IS__TUNIT_OPM-SAME: () #[[ATTR6:[0-9]+]] {
; IS__TUNIT_OPM-NEXT: entry: ; IS__TUNIT_OPM-NEXT: entry:
; IS__TUNIT_OPM-NEXT: br label [[FOR_COND:%.*]] ; IS__TUNIT_OPM-NEXT: br label [[FOR_COND:%.*]]
; IS__TUNIT_OPM: for.cond: ; IS__TUNIT_OPM: for.cond:
; IS__TUNIT_OPM-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[FOR_INC:%.*]] ], [ 0, [[ENTRY:%.*]] ] ; IS__TUNIT_OPM-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[FOR_INC:%.*]] ], [ 0, [[ENTRY:%.*]] ]
; IS__TUNIT_OPM-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV]], 100 ; IS__TUNIT_OPM-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV]], 100
; IS__TUNIT_OPM-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY:%.*]], label [[FOR_COND_CLEANUP:%.*]] ; IS__TUNIT_OPM-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY:%.*]], label [[FOR_COND_CLEANUP:%.*]]
; IS__TUNIT_OPM: for.cond.cleanup: ; IS__TUNIT_OPM: for.cond.cleanup:
; IS__TUNIT_OPM-NEXT: br label [[FOR_END:%.*]] ; IS__TUNIT_OPM-NEXT: br label [[FOR_END:%.*]]
Show All 32 Lines
; IS__TUNIT_OPM-NEXT: [[I17:%.*]] = mul nuw nsw i64 [[INDVARS_IV7]], 10 ; IS__TUNIT_OPM-NEXT: [[I17:%.*]] = mul nuw nsw i64 [[INDVARS_IV7]], 10
; IS__TUNIT_OPM-NEXT: [[I18:%.*]] = add nuw nsw i64 [[I17]], 2 ; IS__TUNIT_OPM-NEXT: [[I18:%.*]] = add nuw nsw i64 [[I17]], 2
; IS__TUNIT_OPM-NEXT: [[ARRAYIDX20:%.*]] = getelementptr inbounds i64, i64* bitcast ([1024 x i8]* @GBytes to i64*), i64 [[I18]] ; IS__TUNIT_OPM-NEXT: [[ARRAYIDX20:%.*]] = getelementptr inbounds i64, i64* bitcast ([1024 x i8]* @GBytes to i64*), i64 [[I18]]
; IS__TUNIT_OPM-NEXT: br label [[FOR_INC21]] ; IS__TUNIT_OPM-NEXT: br label [[FOR_INC21]]
; IS__TUNIT_OPM: for.inc21: ; IS__TUNIT_OPM: for.inc21:
; IS__TUNIT_OPM-NEXT: [[INDVARS_IV_NEXT8]] = add nuw nsw i64 [[INDVARS_IV7]], 1 ; IS__TUNIT_OPM-NEXT: [[INDVARS_IV_NEXT8]] = add nuw nsw i64 [[INDVARS_IV7]], 1
; IS__TUNIT_OPM-NEXT: br label [[FOR_COND13]], !llvm.loop [[LOOP23:![0-9]+]] ; IS__TUNIT_OPM-NEXT: br label [[FOR_COND13]], !llvm.loop [[LOOP23:![0-9]+]]
; IS__TUNIT_OPM: for.end23: ; IS__TUNIT_OPM: for.end23:
; IS__TUNIT_OPM-NEXT: call void @write_arg(i32* nocapture nofree writeonly align 4 dereferenceable_or_null(524) bitcast (i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @GBytes, i64 0, i64 500) to i32*), i32 noundef 0) #[[ATTR6]] ; IS__TUNIT_OPM-NEXT: call void @write_arg(i32* nocapture nofree writeonly align 4 dereferenceable_or_null(524) bitcast (i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @GBytes, i64 0, i64 500) to i32*), i32 noundef 0) #[[ATTR16]]
; IS__TUNIT_OPM-NEXT: br label [[FOR_COND25:%.*]] ; IS__TUNIT_OPM-NEXT: br label [[FOR_COND25:%.*]]
; IS__TUNIT_OPM: for.cond25: ; IS__TUNIT_OPM: for.cond25:
; IS__TUNIT_OPM-NEXT: [[INDVARS_IV12:%.*]] = phi i64 [ [[INDVARS_IV_NEXT13:%.*]], [[FOR_INC33:%.*]] ], [ 0, [[FOR_END23]] ] ; IS__TUNIT_OPM-NEXT: [[INDVARS_IV12:%.*]] = phi i64 [ [[INDVARS_IV_NEXT13:%.*]], [[FOR_INC33:%.*]] ], [ 0, [[FOR_END23]] ]
; IS__TUNIT_OPM-NEXT: [[EXITCOND14:%.*]] = icmp ne i64 [[INDVARS_IV12]], 1024 ; IS__TUNIT_OPM-NEXT: [[EXITCOND14:%.*]] = icmp ne i64 [[INDVARS_IV12]], 1024
; IS__TUNIT_OPM-NEXT: br i1 [[EXITCOND14]], label [[FOR_BODY28:%.*]], label [[FOR_COND_CLEANUP27:%.*]] ; IS__TUNIT_OPM-NEXT: br i1 [[EXITCOND14]], label [[FOR_BODY28:%.*]], label [[FOR_COND_CLEANUP27:%.*]]
; IS__TUNIT_OPM: for.cond.cleanup27: ; IS__TUNIT_OPM: for.cond.cleanup27:
; IS__TUNIT_OPM-NEXT: br label [[FOR_END35:%.*]] ; IS__TUNIT_OPM-NEXT: br label [[FOR_END35:%.*]]
; IS__TUNIT_OPM: for.body28: ; IS__TUNIT_OPM: for.body28:
; IS__TUNIT_OPM-NEXT: [[ARRAYIDX32:%.*]] = getelementptr inbounds [1024 x i8], [1024 x i8]* @globalBytes, i64 0, i64 [[INDVARS_IV12]] ; IS__TUNIT_OPM-NEXT: [[ARRAYIDX32:%.*]] = getelementptr inbounds [1024 x i8], [1024 x i8]* @globalBytes, i64 0, i64 [[INDVARS_IV12]]
; IS__TUNIT_OPM-NEXT: store i8 0, i8* [[ARRAYIDX32]], align 1, !tbaa [[TBAA19]] ; IS__TUNIT_OPM-NEXT: store i8 0, i8* [[ARRAYIDX32]], align 1, !tbaa [[TBAA19]]
; IS__TUNIT_OPM-NEXT: br label [[FOR_INC33]] ; IS__TUNIT_OPM-NEXT: br label [[FOR_INC33]]
; IS__TUNIT_OPM: for.inc33: ; IS__TUNIT_OPM: for.inc33:
; IS__TUNIT_OPM-NEXT: [[INDVARS_IV_NEXT13]] = add nuw nsw i64 [[INDVARS_IV12]], 1 ; IS__TUNIT_OPM-NEXT: [[INDVARS_IV_NEXT13]] = add nuw nsw i64 [[INDVARS_IV12]], 1
; IS__TUNIT_OPM-NEXT: br label [[FOR_COND25]], !llvm.loop [[LOOP24:![0-9]+]] ; IS__TUNIT_OPM-NEXT: br label [[FOR_COND25]], !llvm.loop [[LOOP24:![0-9]+]]
; IS__TUNIT_OPM: for.end35: ; IS__TUNIT_OPM: for.end35:
; IS__TUNIT_OPM-NEXT: ret void ; IS__TUNIT_OPM-NEXT: ret void
; ;
; IS__TUNIT_NPM: Function Attrs: nofree nosync nounwind willreturn writeonly ; IS__TUNIT_NPM: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@static_global_simplifiable_2 ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@static_global_simplifiable_2
; IS__TUNIT_NPM-SAME: () #[[ATTR4]] { ; IS__TUNIT_NPM-SAME: () #[[ATTR4]] {
; IS__TUNIT_NPM-NEXT: entry: ; IS__TUNIT_NPM-NEXT: entry:
; IS__TUNIT_NPM-NEXT: br label [[FOR_COND:%.*]] ; IS__TUNIT_NPM-NEXT: br label [[FOR_COND:%.*]]
; IS__TUNIT_NPM: for.cond: ; IS__TUNIT_NPM: for.cond:
; IS__TUNIT_NPM-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[FOR_INC:%.*]] ], [ 0, [[ENTRY:%.*]] ] ; IS__TUNIT_NPM-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[FOR_INC:%.*]] ], [ 0, [[ENTRY:%.*]] ]
; IS__TUNIT_NPM-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV]], 100 ; IS__TUNIT_NPM-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV]], 100
; IS__TUNIT_NPM-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY:%.*]], label [[FOR_COND_CLEANUP:%.*]] ; IS__TUNIT_NPM-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY:%.*]], label [[FOR_COND_CLEANUP:%.*]]
Show All 34 Lines
; IS__TUNIT_NPM-NEXT: [[I17:%.*]] = mul nuw nsw i64 [[INDVARS_IV7]], 10 ; IS__TUNIT_NPM-NEXT: [[I17:%.*]] = mul nuw nsw i64 [[INDVARS_IV7]], 10
; IS__TUNIT_NPM-NEXT: [[I18:%.*]] = add nuw nsw i64 [[I17]], 2 ; IS__TUNIT_NPM-NEXT: [[I18:%.*]] = add nuw nsw i64 [[I17]], 2
; IS__TUNIT_NPM-NEXT: [[ARRAYIDX20:%.*]] = getelementptr inbounds i64, i64* bitcast ([1024 x i8]* @GBytes to i64*), i64 [[I18]] ; IS__TUNIT_NPM-NEXT: [[ARRAYIDX20:%.*]] = getelementptr inbounds i64, i64* bitcast ([1024 x i8]* @GBytes to i64*), i64 [[I18]]
; IS__TUNIT_NPM-NEXT: br label [[FOR_INC21]] ; IS__TUNIT_NPM-NEXT: br label [[FOR_INC21]]
; IS__TUNIT_NPM: for.inc21: ; IS__TUNIT_NPM: for.inc21:
; IS__TUNIT_NPM-NEXT: [[INDVARS_IV_NEXT8]] = add nuw nsw i64 [[INDVARS_IV7]], 1 ; IS__TUNIT_NPM-NEXT: [[INDVARS_IV_NEXT8]] = add nuw nsw i64 [[INDVARS_IV7]], 1
; IS__TUNIT_NPM-NEXT: br label [[FOR_COND13]], !llvm.loop [[LOOP23:![0-9]+]] ; IS__TUNIT_NPM-NEXT: br label [[FOR_COND13]], !llvm.loop [[LOOP23:![0-9]+]]
; IS__TUNIT_NPM: for.end23: ; IS__TUNIT_NPM: for.end23:
; IS__TUNIT_NPM-NEXT: call void @write_arg(i32* nocapture nofree writeonly align 4 dereferenceable_or_null(524) bitcast (i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @GBytes, i64 0, i64 500) to i32*), i32 noundef 0) #[[ATTR4]] ; IS__TUNIT_NPM-NEXT: call void @write_arg(i32* nocapture nofree writeonly align 4 dereferenceable_or_null(524) bitcast (i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @GBytes, i64 0, i64 500) to i32*), i32 noundef 0) #[[ATTR12]]
; IS__TUNIT_NPM-NEXT: br label [[FOR_COND25:%.*]] ; IS__TUNIT_NPM-NEXT: br label [[FOR_COND25:%.*]]
; IS__TUNIT_NPM: for.cond25: ; IS__TUNIT_NPM: for.cond25:
; IS__TUNIT_NPM-NEXT: [[INDVARS_IV12:%.*]] = phi i64 [ [[INDVARS_IV_NEXT13:%.*]], [[FOR_INC33:%.*]] ], [ 0, [[FOR_END23]] ] ; IS__TUNIT_NPM-NEXT: [[INDVARS_IV12:%.*]] = phi i64 [ [[INDVARS_IV_NEXT13:%.*]], [[FOR_INC33:%.*]] ], [ 0, [[FOR_END23]] ]
; IS__TUNIT_NPM-NEXT: [[EXITCOND14:%.*]] = icmp ne i64 [[INDVARS_IV12]], 1024 ; IS__TUNIT_NPM-NEXT: [[EXITCOND14:%.*]] = icmp ne i64 [[INDVARS_IV12]], 1024
; IS__TUNIT_NPM-NEXT: br i1 [[EXITCOND14]], label [[FOR_BODY28:%.*]], label [[FOR_COND_CLEANUP27:%.*]] ; IS__TUNIT_NPM-NEXT: br i1 [[EXITCOND14]], label [[FOR_BODY28:%.*]], label [[FOR_COND_CLEANUP27:%.*]]
; IS__TUNIT_NPM: for.cond.cleanup27: ; IS__TUNIT_NPM: for.cond.cleanup27:
; IS__TUNIT_NPM-NEXT: br label [[FOR_END35:%.*]] ; IS__TUNIT_NPM-NEXT: br label [[FOR_END35:%.*]]
; IS__TUNIT_NPM: for.body28: ; IS__TUNIT_NPM: for.body28:
▲ Show 20 Lines • Show All 246 Lines • ▼ Show 20 Lines
} }
; static int Flag3; ; static int Flag3;
; int static_global_simplifiable_3() { ; int static_global_simplifiable_3() {
; Flag3 = 1; ; Flag3 = 1;
; return Flag3; ; return Flag3;
; } ; }
define i32 @static_global_simplifiable_3() { define i32 @static_global_simplifiable_3() {
; IS__TUNIT_OPM: Function Attrs: nofree nosync nounwind willreturn ; IS__TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind willreturn
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@static_global_simplifiable_3 ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@static_global_simplifiable_3
; IS__TUNIT_OPM-SAME: () #[[ATTR4]] { ; IS__TUNIT_OPM-SAME: () #[[ATTR7:[0-9]+]] {
; IS__TUNIT_OPM-NEXT: store i32 1, i32* @Flag3, align 4, !tbaa [[TBAA3]] ; IS__TUNIT_OPM-NEXT: store i32 1, i32* @Flag3, align 4, !tbaa [[TBAA3]]
; IS__TUNIT_OPM-NEXT: [[I:%.*]] = load i32, i32* @Flag3, align 4, !tbaa [[TBAA3]] ; IS__TUNIT_OPM-NEXT: [[I:%.*]] = load i32, i32* @Flag3, align 4, !tbaa [[TBAA3]]
; IS__TUNIT_OPM-NEXT: ret i32 [[I]] ; IS__TUNIT_OPM-NEXT: ret i32 [[I]]
; ;
; IS__TUNIT_NPM: Function Attrs: nofree nosync nounwind willreturn ; NOT_TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@static_global_simplifiable_3 ; NOT_TUNIT_OPM-LABEL: define {{[^@]+}}@static_global_simplifiable_3
; IS__TUNIT_NPM-SAME: () #[[ATTR2]] { ; NOT_TUNIT_OPM-SAME: () #[[ATTR5:[0-9]+]] {
; IS__TUNIT_NPM-NEXT: store i32 1, i32* @Flag3, align 4, !tbaa [[TBAA3]] ; NOT_TUNIT_OPM-NEXT: store i32 1, i32* @Flag3, align 4, !tbaa [[TBAA3]]
; IS__TUNIT_NPM-NEXT: [[I:%.*]] = load i32, i32* @Flag3, align 4, !tbaa [[TBAA3]] ; NOT_TUNIT_OPM-NEXT: [[I:%.*]] = load i32, i32* @Flag3, align 4, !tbaa [[TBAA3]]
; IS__TUNIT_NPM-NEXT: ret i32 [[I]] ; NOT_TUNIT_OPM-NEXT: ret i32 [[I]]
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@static_global_simplifiable_3
; IS__CGSCC____-SAME: () #[[ATTR5:[0-9]+]] {
; IS__CGSCC____-NEXT: store i32 1, i32* @Flag3, align 4, !tbaa [[TBAA3]]
; IS__CGSCC____-NEXT: [[I:%.*]] = load i32, i32* @Flag3, align 4, !tbaa [[TBAA3]]
; IS__CGSCC____-NEXT: ret i32 [[I]]
; ;
store i32 1, i32* @Flag3, align 4, !tbaa !3 store i32 1, i32* @Flag3, align 4, !tbaa !3
%i = load i32, i32* @Flag3, align 4, !tbaa !3 %i = load i32, i32* @Flag3, align 4, !tbaa !3
ret i32 %i ret i32 %i
} }
; struct S noalias_arg_simplifiable_1(struct S s) { ; struct S noalias_arg_simplifiable_1(struct S s) {
; s.f1 = 1.1; ; s.f1 = 1.1;
; s.f2 = 2.2; ; s.f2 = 2.2;
; s.f3 = 3.3; ; s.f3 = 3.3;
; write_arg(&s.i1, 1); ; write_arg(&s.i1, 1);
; write_arg(&s.i2, 2); ; write_arg(&s.i2, 2);
; write_arg(&s.i3, 3); ; write_arg(&s.i3, 3);
; struct S r; ; struct S r;
; r.f1 = s.f1; ; r.f1 = s.f1;
; r.f2 = s.f2 * 2; ; r.f2 = s.f2 * 2;
; r.f3 = s.f3 + s.f1; ; r.f3 = s.f3 + s.f1;
; r.i1 = s.i1; ; r.i1 = s.i1;
; r.i2 = s.i2 * 2; ; r.i2 = s.i2 * 2;
; r.i3 = s.i3 + s.i1; ; r.i3 = s.i3 + s.i1;
; return r; ; return r;
; } ; }
; ;
define void @noalias_arg_simplifiable_1(%struct.S* noalias sret(%struct.S) align 4 %agg.result, %struct.S* byval(%struct.S) align 8 %s) { define void @noalias_arg_simplifiable_1(%struct.S* noalias sret(%struct.S) align 4 %agg.result, %struct.S* byval(%struct.S) align 8 %s) {
; IS__TUNIT_OPM: Function Attrs: argmemonly nofree nosync nounwind willreturn ; IS__TUNIT_OPM: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@noalias_arg_simplifiable_1 ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@noalias_arg_simplifiable_1
; IS__TUNIT_OPM-SAME: (%struct.S* noalias nocapture nofree nonnull writeonly sret([[STRUCT_S:%.*]]) align 4 dereferenceable(24) [[AGG_RESULT:%.*]], %struct.S* noalias nocapture nofree nonnull byval([[STRUCT_S]]) align 8 dereferenceable(24) [[S:%.*]]) #[[ATTR1]] { ; IS__TUNIT_OPM-SAME: (%struct.S* noalias nocapture nofree nonnull writeonly sret([[STRUCT_S:%.*]]) align 4 dereferenceable(24) [[AGG_RESULT:%.*]], %struct.S* noalias nocapture nofree nonnull byval([[STRUCT_S]]) align 8 dereferenceable(24) [[S:%.*]]) #[[ATTR8:[0-9]+]] {
; IS__TUNIT_OPM-NEXT: entry: ; IS__TUNIT_OPM-NEXT: entry:
; IS__TUNIT_OPM-NEXT: [[F1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 3 ; IS__TUNIT_OPM-NEXT: [[F1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 3
; IS__TUNIT_OPM-NEXT: store float 0x3FF19999A0000000, float* [[F1]], align 4, !tbaa [[TBAA7]] ; IS__TUNIT_OPM-NEXT: store float 0x3FF19999A0000000, float* [[F1]], align 4, !tbaa [[TBAA7]]
; IS__TUNIT_OPM-NEXT: [[F2:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 4 ; IS__TUNIT_OPM-NEXT: [[F2:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 4
; IS__TUNIT_OPM-NEXT: store float 0x40019999A0000000, float* [[F2]], align 8, !tbaa [[TBAA10]] ; IS__TUNIT_OPM-NEXT: store float 0x40019999A0000000, float* [[F2]], align 8, !tbaa [[TBAA10]]
; IS__TUNIT_OPM-NEXT: [[F3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 5 ; IS__TUNIT_OPM-NEXT: [[F3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 5
; IS__TUNIT_OPM-NEXT: store float 0x400A666660000000, float* [[F3]], align 4, !tbaa [[TBAA11]] ; IS__TUNIT_OPM-NEXT: store float 0x400A666660000000, float* [[F3]], align 4, !tbaa [[TBAA11]]
; IS__TUNIT_OPM-NEXT: [[I1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 0 ; IS__TUNIT_OPM-NEXT: [[I1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 0
; IS__TUNIT_OPM-NEXT: call void @write_arg(i32* nocapture nofree nonnull writeonly align 8 dereferenceable(24) [[I1]], i32 noundef 1) #[[ATTR5]] ; IS__TUNIT_OPM-NEXT: call void @write_arg(i32* nocapture nofree nonnull writeonly align 8 dereferenceable(24) [[I1]], i32 noundef 1) #[[ATTR15]]
; IS__TUNIT_OPM-NEXT: [[I2:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 1 ; IS__TUNIT_OPM-NEXT: [[I2:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 1
; IS__TUNIT_OPM-NEXT: call void @write_arg(i32* nocapture nofree nonnull writeonly align 4 dereferenceable(20) [[I2]], i32 noundef 2) #[[ATTR5]] ; IS__TUNIT_OPM-NEXT: call void @write_arg(i32* nocapture nofree nonnull writeonly align 4 dereferenceable(20) [[I2]], i32 noundef 2) #[[ATTR15]]
; IS__TUNIT_OPM-NEXT: [[I3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 2 ; IS__TUNIT_OPM-NEXT: [[I3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 2
; IS__TUNIT_OPM-NEXT: call void @write_arg(i32* nocapture nofree nonnull writeonly align 8 dereferenceable(16) [[I3]], i32 noundef 3) #[[ATTR5]] ; IS__TUNIT_OPM-NEXT: call void @write_arg(i32* nocapture nofree nonnull writeonly align 8 dereferenceable(16) [[I3]], i32 noundef 3) #[[ATTR15]]
; IS__TUNIT_OPM-NEXT: [[F11:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 3 ; IS__TUNIT_OPM-NEXT: [[F11:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 3
; IS__TUNIT_OPM-NEXT: [[I:%.*]] = load float, float* [[F11]], align 4, !tbaa [[TBAA7]] ; IS__TUNIT_OPM-NEXT: [[I:%.*]] = load float, float* [[F11]], align 4, !tbaa [[TBAA7]]
; IS__TUNIT_OPM-NEXT: [[F12:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 3 ; IS__TUNIT_OPM-NEXT: [[F12:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 3
; IS__TUNIT_OPM-NEXT: store float [[I]], float* [[F12]], align 4, !tbaa [[TBAA7]] ; IS__TUNIT_OPM-NEXT: store float [[I]], float* [[F12]], align 4, !tbaa [[TBAA7]]
; IS__TUNIT_OPM-NEXT: [[F23:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 4 ; IS__TUNIT_OPM-NEXT: [[F23:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 4
; IS__TUNIT_OPM-NEXT: [[I4:%.*]] = load float, float* [[F23]], align 8, !tbaa [[TBAA10]] ; IS__TUNIT_OPM-NEXT: [[I4:%.*]] = load float, float* [[F23]], align 8, !tbaa [[TBAA10]]
; IS__TUNIT_OPM-NEXT: [[MUL:%.*]] = fmul float [[I4]], 2.000000e+00 ; IS__TUNIT_OPM-NEXT: [[MUL:%.*]] = fmul float [[I4]], 2.000000e+00
; IS__TUNIT_OPM-NEXT: [[F24:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 4 ; IS__TUNIT_OPM-NEXT: [[F24:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 4
Show All 18 Lines
; IS__TUNIT_OPM-NEXT: [[I9:%.*]] = load i32, i32* [[I313]], align 8, !tbaa [[TBAA14]] ; IS__TUNIT_OPM-NEXT: [[I9:%.*]] = load i32, i32* [[I313]], align 8, !tbaa [[TBAA14]]
; IS__TUNIT_OPM-NEXT: [[I114:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 0 ; IS__TUNIT_OPM-NEXT: [[I114:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 0
; IS__TUNIT_OPM-NEXT: [[I10:%.*]] = load i32, i32* [[I114]], align 8, !tbaa [[TBAA12]] ; IS__TUNIT_OPM-NEXT: [[I10:%.*]] = load i32, i32* [[I114]], align 8, !tbaa [[TBAA12]]
; IS__TUNIT_OPM-NEXT: [[ADD15:%.*]] = add nsw i32 [[I9]], [[I10]] ; IS__TUNIT_OPM-NEXT: [[ADD15:%.*]] = add nsw i32 [[I9]], [[I10]]
; IS__TUNIT_OPM-NEXT: [[I316:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 2 ; IS__TUNIT_OPM-NEXT: [[I316:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 2
; IS__TUNIT_OPM-NEXT: store i32 [[ADD15]], i32* [[I316]], align 4, !tbaa [[TBAA14]] ; IS__TUNIT_OPM-NEXT: store i32 [[ADD15]], i32* [[I316]], align 4, !tbaa [[TBAA14]]
; IS__TUNIT_OPM-NEXT: ret void ; IS__TUNIT_OPM-NEXT: ret void
; ;
; IS__TUNIT_NPM: Function Attrs: argmemonly nofree nosync nounwind willreturn ; IS__TUNIT_NPM: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@noalias_arg_simplifiable_1 ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@noalias_arg_simplifiable_1
; IS__TUNIT_NPM-SAME: (%struct.S* noalias nocapture nofree nonnull writeonly sret([[STRUCT_S:%.*]]) align 4 dereferenceable(24) [[AGG_RESULT:%.*]], %struct.S* noalias nocapture nofree nonnull byval([[STRUCT_S]]) align 8 dereferenceable(24) [[S:%.*]]) #[[ATTR1]] { ; IS__TUNIT_NPM-SAME: (%struct.S* noalias nocapture nofree nonnull writeonly sret([[STRUCT_S:%.*]]) align 4 dereferenceable(24) [[AGG_RESULT:%.*]], %struct.S* noalias nocapture nofree nonnull byval([[STRUCT_S]]) align 8 dereferenceable(24) [[S:%.*]]) #[[ATTR6:[0-9]+]] {
; IS__TUNIT_NPM-NEXT: entry: ; IS__TUNIT_NPM-NEXT: entry:
; IS__TUNIT_NPM-NEXT: [[F1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 3 ; IS__TUNIT_NPM-NEXT: [[F1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 3
; IS__TUNIT_NPM-NEXT: store float 0x3FF19999A0000000, float* [[F1]], align 4, !tbaa [[TBAA7]] ; IS__TUNIT_NPM-NEXT: store float 0x3FF19999A0000000, float* [[F1]], align 4, !tbaa [[TBAA7]]
; IS__TUNIT_NPM-NEXT: [[F2:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 4 ; IS__TUNIT_NPM-NEXT: [[F2:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 4
; IS__TUNIT_NPM-NEXT: store float 0x40019999A0000000, float* [[F2]], align 8, !tbaa [[TBAA10]] ; IS__TUNIT_NPM-NEXT: store float 0x40019999A0000000, float* [[F2]], align 8, !tbaa [[TBAA10]]
; IS__TUNIT_NPM-NEXT: [[F3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 5 ; IS__TUNIT_NPM-NEXT: [[F3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 5
; IS__TUNIT_NPM-NEXT: store float 0x400A666660000000, float* [[F3]], align 4, !tbaa [[TBAA11]] ; IS__TUNIT_NPM-NEXT: store float 0x400A666660000000, float* [[F3]], align 4, !tbaa [[TBAA11]]
; IS__TUNIT_NPM-NEXT: [[I1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 0 ; IS__TUNIT_NPM-NEXT: [[I1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 0
; IS__TUNIT_NPM-NEXT: call void @write_arg(i32* nocapture nofree nonnull writeonly align 8 dereferenceable(24) [[I1]], i32 noundef 1) #[[ATTR4]] ; IS__TUNIT_NPM-NEXT: call void @write_arg(i32* nocapture nofree nonnull writeonly align 8 dereferenceable(24) [[I1]], i32 noundef 1) #[[ATTR12]]
; IS__TUNIT_NPM-NEXT: [[I2:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 1 ; IS__TUNIT_NPM-NEXT: [[I2:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 1
; IS__TUNIT_NPM-NEXT: call void @write_arg(i32* nocapture nofree nonnull writeonly align 4 dereferenceable(20) [[I2]], i32 noundef 2) #[[ATTR4]] ; IS__TUNIT_NPM-NEXT: call void @write_arg(i32* nocapture nofree nonnull writeonly align 4 dereferenceable(20) [[I2]], i32 noundef 2) #[[ATTR12]]
; IS__TUNIT_NPM-NEXT: [[I3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 2 ; IS__TUNIT_NPM-NEXT: [[I3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 2
; IS__TUNIT_NPM-NEXT: call void @write_arg(i32* nocapture nofree nonnull writeonly align 8 dereferenceable(16) [[I3]], i32 noundef 3) #[[ATTR4]] ; IS__TUNIT_NPM-NEXT: call void @write_arg(i32* nocapture nofree nonnull writeonly align 8 dereferenceable(16) [[I3]], i32 noundef 3) #[[ATTR12]]
; IS__TUNIT_NPM-NEXT: [[F11:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 3 ; IS__TUNIT_NPM-NEXT: [[F11:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 3
; IS__TUNIT_NPM-NEXT: [[I:%.*]] = load float, float* [[F11]], align 4, !tbaa [[TBAA7]] ; IS__TUNIT_NPM-NEXT: [[I:%.*]] = load float, float* [[F11]], align 4, !tbaa [[TBAA7]]
; IS__TUNIT_NPM-NEXT: [[F12:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 3 ; IS__TUNIT_NPM-NEXT: [[F12:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 3
; IS__TUNIT_NPM-NEXT: store float [[I]], float* [[F12]], align 4, !tbaa [[TBAA7]] ; IS__TUNIT_NPM-NEXT: store float [[I]], float* [[F12]], align 4, !tbaa [[TBAA7]]
; IS__TUNIT_NPM-NEXT: [[F23:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 4 ; IS__TUNIT_NPM-NEXT: [[F23:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 4
; IS__TUNIT_NPM-NEXT: [[I4:%.*]] = load float, float* [[F23]], align 8, !tbaa [[TBAA10]] ; IS__TUNIT_NPM-NEXT: [[I4:%.*]] = load float, float* [[F23]], align 8, !tbaa [[TBAA10]]
; IS__TUNIT_NPM-NEXT: [[MUL:%.*]] = fmul float [[I4]], 2.000000e+00 ; IS__TUNIT_NPM-NEXT: [[MUL:%.*]] = fmul float [[I4]], 2.000000e+00
; IS__TUNIT_NPM-NEXT: [[F24:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 4 ; IS__TUNIT_NPM-NEXT: [[F24:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[AGG_RESULT]], i64 0, i32 4
▲ Show 20 Lines • Show All 181 Lines • ▼ Show 20 Lines
; Bytes[1023] = 0; ; Bytes[1023] = 0;
; write_arg((int *)&Bytes[500], 0); ; write_arg((int *)&Bytes[500], 0);
; struct S R; ; struct S R;
; for (int i = 0; i < 1024; ++i) ; for (int i = 0; i < 1024; ++i)
; globalBytes[i] = Bytes[i]; ; globalBytes[i] = Bytes[i];
; } ; }
; ;
define void @noalias_arg_simplifiable_2(i8* %Bytes) { define void @noalias_arg_simplifiable_2(i8* %Bytes) {
; IS__TUNIT_OPM: Function Attrs: nofree nosync nounwind ; IS__TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@noalias_arg_simplifiable_2 ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@noalias_arg_simplifiable_2
; IS__TUNIT_OPM-SAME: (i8* nocapture nofree [[BYTES:%.*]]) #[[ATTR2]] { ; IS__TUNIT_OPM-SAME: (i8* nocapture nofree [[BYTES:%.*]]) #[[ATTR9:[0-9]+]] {
; IS__TUNIT_OPM-NEXT: entry: ; IS__TUNIT_OPM-NEXT: entry:
; IS__TUNIT_OPM-NEXT: br label [[FOR_COND:%.*]] ; IS__TUNIT_OPM-NEXT: br label [[FOR_COND:%.*]]
; IS__TUNIT_OPM: for.cond: ; IS__TUNIT_OPM: for.cond:
; IS__TUNIT_OPM-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[FOR_INC:%.*]] ], [ 0, [[ENTRY:%.*]] ] ; IS__TUNIT_OPM-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[FOR_INC:%.*]] ], [ 0, [[ENTRY:%.*]] ]
; IS__TUNIT_OPM-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV]], 100 ; IS__TUNIT_OPM-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV]], 100
; IS__TUNIT_OPM-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY:%.*]], label [[FOR_COND_CLEANUP:%.*]] ; IS__TUNIT_OPM-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY:%.*]], label [[FOR_COND_CLEANUP:%.*]]
; IS__TUNIT_OPM: for.cond.cleanup: ; IS__TUNIT_OPM: for.cond.cleanup:
; IS__TUNIT_OPM-NEXT: br label [[FOR_END:%.*]] ; IS__TUNIT_OPM-NEXT: br label [[FOR_END:%.*]]
▲ Show 20 Lines • Show All 41 Lines • ▼ Show 20 Lines
; IS__TUNIT_OPM: for.inc21: ; IS__TUNIT_OPM: for.inc21:
; IS__TUNIT_OPM-NEXT: [[INDVARS_IV_NEXT8]] = add nuw nsw i64 [[INDVARS_IV7]], 1 ; IS__TUNIT_OPM-NEXT: [[INDVARS_IV_NEXT8]] = add nuw nsw i64 [[INDVARS_IV7]], 1
; IS__TUNIT_OPM-NEXT: br label [[FOR_COND13]], !llvm.loop [[LOOP30:![0-9]+]] ; IS__TUNIT_OPM-NEXT: br label [[FOR_COND13]], !llvm.loop [[LOOP30:![0-9]+]]
; IS__TUNIT_OPM: for.end23: ; IS__TUNIT_OPM: for.end23:
; IS__TUNIT_OPM-NEXT: [[ARRAYIDX24:%.*]] = getelementptr inbounds i8, i8* [[BYTES]], i64 1023 ; IS__TUNIT_OPM-NEXT: [[ARRAYIDX24:%.*]] = getelementptr inbounds i8, i8* [[BYTES]], i64 1023
; IS__TUNIT_OPM-NEXT: store i8 0, i8* [[ARRAYIDX24]], align 1, !tbaa [[TBAA19]] ; IS__TUNIT_OPM-NEXT: store i8 0, i8* [[ARRAYIDX24]], align 1, !tbaa [[TBAA19]]
; IS__TUNIT_OPM-NEXT: [[ARRAYIDX25:%.*]] = getelementptr inbounds i8, i8* [[BYTES]], i64 500 ; IS__TUNIT_OPM-NEXT: [[ARRAYIDX25:%.*]] = getelementptr inbounds i8, i8* [[BYTES]], i64 500
; IS__TUNIT_OPM-NEXT: [[I21:%.*]] = bitcast i8* [[ARRAYIDX25]] to i32* ; IS__TUNIT_OPM-NEXT: [[I21:%.*]] = bitcast i8* [[ARRAYIDX25]] to i32*
; IS__TUNIT_OPM-NEXT: call void @write_arg(i32* nocapture nofree nonnull writeonly align 4 [[I21]], i32 noundef 0) #[[ATTR6]] ; IS__TUNIT_OPM-NEXT: call void @write_arg(i32* nocapture nofree nonnull writeonly align 4 [[I21]], i32 noundef 0) #[[ATTR16]]
; IS__TUNIT_OPM-NEXT: br label [[FOR_COND27:%.*]] ; IS__TUNIT_OPM-NEXT: br label [[FOR_COND27:%.*]]
; IS__TUNIT_OPM: for.cond27: ; IS__TUNIT_OPM: for.cond27:
; IS__TUNIT_OPM-NEXT: [[INDVARS_IV12:%.*]] = phi i64 [ [[INDVARS_IV_NEXT13:%.*]], [[FOR_INC35:%.*]] ], [ 0, [[FOR_END23]] ] ; IS__TUNIT_OPM-NEXT: [[INDVARS_IV12:%.*]] = phi i64 [ [[INDVARS_IV_NEXT13:%.*]], [[FOR_INC35:%.*]] ], [ 0, [[FOR_END23]] ]
; IS__TUNIT_OPM-NEXT: [[EXITCOND14:%.*]] = icmp ne i64 [[INDVARS_IV12]], 1024 ; IS__TUNIT_OPM-NEXT: [[EXITCOND14:%.*]] = icmp ne i64 [[INDVARS_IV12]], 1024
; IS__TUNIT_OPM-NEXT: br i1 [[EXITCOND14]], label [[FOR_BODY30:%.*]], label [[FOR_COND_CLEANUP29:%.*]] ; IS__TUNIT_OPM-NEXT: br i1 [[EXITCOND14]], label [[FOR_BODY30:%.*]], label [[FOR_COND_CLEANUP29:%.*]]
; IS__TUNIT_OPM: for.cond.cleanup29: ; IS__TUNIT_OPM: for.cond.cleanup29:
; IS__TUNIT_OPM-NEXT: br label [[FOR_END37:%.*]] ; IS__TUNIT_OPM-NEXT: br label [[FOR_END37:%.*]]
; IS__TUNIT_OPM: for.body30: ; IS__TUNIT_OPM: for.body30:
; IS__TUNIT_OPM-NEXT: [[ARRAYIDX32:%.*]] = getelementptr inbounds i8, i8* [[BYTES]], i64 [[INDVARS_IV12]] ; IS__TUNIT_OPM-NEXT: [[ARRAYIDX32:%.*]] = getelementptr inbounds i8, i8* [[BYTES]], i64 [[INDVARS_IV12]]
; IS__TUNIT_OPM-NEXT: [[I22:%.*]] = load i8, i8* [[ARRAYIDX32]], align 1, !tbaa [[TBAA19]] ; IS__TUNIT_OPM-NEXT: [[I22:%.*]] = load i8, i8* [[ARRAYIDX32]], align 1, !tbaa [[TBAA19]]
; IS__TUNIT_OPM-NEXT: [[ARRAYIDX34:%.*]] = getelementptr inbounds [1024 x i8], [1024 x i8]* @globalBytes, i64 0, i64 [[INDVARS_IV12]] ; IS__TUNIT_OPM-NEXT: [[ARRAYIDX34:%.*]] = getelementptr inbounds [1024 x i8], [1024 x i8]* @globalBytes, i64 0, i64 [[INDVARS_IV12]]
; IS__TUNIT_OPM-NEXT: store i8 [[I22]], i8* [[ARRAYIDX34]], align 1, !tbaa [[TBAA19]] ; IS__TUNIT_OPM-NEXT: store i8 [[I22]], i8* [[ARRAYIDX34]], align 1, !tbaa [[TBAA19]]
; IS__TUNIT_OPM-NEXT: br label [[FOR_INC35]] ; IS__TUNIT_OPM-NEXT: br label [[FOR_INC35]]
; IS__TUNIT_OPM: for.inc35: ; IS__TUNIT_OPM: for.inc35:
; IS__TUNIT_OPM-NEXT: [[INDVARS_IV_NEXT13]] = add nuw nsw i64 [[INDVARS_IV12]], 1 ; IS__TUNIT_OPM-NEXT: [[INDVARS_IV_NEXT13]] = add nuw nsw i64 [[INDVARS_IV12]], 1
; IS__TUNIT_OPM-NEXT: br label [[FOR_COND27]], !llvm.loop [[LOOP31:![0-9]+]] ; IS__TUNIT_OPM-NEXT: br label [[FOR_COND27]], !llvm.loop [[LOOP31:![0-9]+]]
; IS__TUNIT_OPM: for.end37: ; IS__TUNIT_OPM: for.end37:
; IS__TUNIT_OPM-NEXT: ret void ; IS__TUNIT_OPM-NEXT: ret void
; ;
; IS__TUNIT_NPM: Function Attrs: nofree nosync nounwind willreturn ; IS__TUNIT_NPM: Function Attrs: nofree norecurse nosync nounwind willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@noalias_arg_simplifiable_2 ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@noalias_arg_simplifiable_2
; IS__TUNIT_NPM-SAME: (i8* nocapture nofree [[BYTES:%.*]]) #[[ATTR2]] { ; IS__TUNIT_NPM-SAME: (i8* nocapture nofree [[BYTES:%.*]]) #[[ATTR5]] {
; IS__TUNIT_NPM-NEXT: entry: ; IS__TUNIT_NPM-NEXT: entry:
; IS__TUNIT_NPM-NEXT: br label [[FOR_COND:%.*]] ; IS__TUNIT_NPM-NEXT: br label [[FOR_COND:%.*]]
; IS__TUNIT_NPM: for.cond: ; IS__TUNIT_NPM: for.cond:
; IS__TUNIT_NPM-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[FOR_INC:%.*]] ], [ 0, [[ENTRY:%.*]] ] ; IS__TUNIT_NPM-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[FOR_INC:%.*]] ], [ 0, [[ENTRY:%.*]] ]
; IS__TUNIT_NPM-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV]], 100 ; IS__TUNIT_NPM-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV]], 100
; IS__TUNIT_NPM-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY:%.*]], label [[FOR_COND_CLEANUP:%.*]] ; IS__TUNIT_NPM-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY:%.*]], label [[FOR_COND_CLEANUP:%.*]]
; IS__TUNIT_NPM: for.cond.cleanup: ; IS__TUNIT_NPM: for.cond.cleanup:
; IS__TUNIT_NPM-NEXT: br label [[FOR_END:%.*]] ; IS__TUNIT_NPM-NEXT: br label [[FOR_END:%.*]]
▲ Show 20 Lines • Show All 41 Lines • ▼ Show 20 Lines
; IS__TUNIT_NPM: for.inc21: ; IS__TUNIT_NPM: for.inc21:
; IS__TUNIT_NPM-NEXT: [[INDVARS_IV_NEXT8]] = add nuw nsw i64 [[INDVARS_IV7]], 1 ; IS__TUNIT_NPM-NEXT: [[INDVARS_IV_NEXT8]] = add nuw nsw i64 [[INDVARS_IV7]], 1
; IS__TUNIT_NPM-NEXT: br label [[FOR_COND13]], !llvm.loop [[LOOP30:![0-9]+]] ; IS__TUNIT_NPM-NEXT: br label [[FOR_COND13]], !llvm.loop [[LOOP30:![0-9]+]]
; IS__TUNIT_NPM: for.end23: ; IS__TUNIT_NPM: for.end23:
; IS__TUNIT_NPM-NEXT: [[ARRAYIDX24:%.*]] = getelementptr inbounds i8, i8* [[BYTES]], i64 1023 ; IS__TUNIT_NPM-NEXT: [[ARRAYIDX24:%.*]] = getelementptr inbounds i8, i8* [[BYTES]], i64 1023
; IS__TUNIT_NPM-NEXT: store i8 0, i8* [[ARRAYIDX24]], align 1, !tbaa [[TBAA19]] ; IS__TUNIT_NPM-NEXT: store i8 0, i8* [[ARRAYIDX24]], align 1, !tbaa [[TBAA19]]
; IS__TUNIT_NPM-NEXT: [[ARRAYIDX25:%.*]] = getelementptr inbounds i8, i8* [[BYTES]], i64 500 ; IS__TUNIT_NPM-NEXT: [[ARRAYIDX25:%.*]] = getelementptr inbounds i8, i8* [[BYTES]], i64 500
; IS__TUNIT_NPM-NEXT: [[I21:%.*]] = bitcast i8* [[ARRAYIDX25]] to i32* ; IS__TUNIT_NPM-NEXT: [[I21:%.*]] = bitcast i8* [[ARRAYIDX25]] to i32*
; IS__TUNIT_NPM-NEXT: call void @write_arg(i32* nocapture nofree nonnull writeonly align 4 [[I21]], i32 noundef 0) #[[ATTR4]] ; IS__TUNIT_NPM-NEXT: call void @write_arg(i32* nocapture nofree nonnull writeonly align 4 [[I21]], i32 noundef 0) #[[ATTR12]]
; IS__TUNIT_NPM-NEXT: br label [[FOR_COND27:%.*]] ; IS__TUNIT_NPM-NEXT: br label [[FOR_COND27:%.*]]
; IS__TUNIT_NPM: for.cond27: ; IS__TUNIT_NPM: for.cond27:
; IS__TUNIT_NPM-NEXT: [[INDVARS_IV12:%.*]] = phi i64 [ [[INDVARS_IV_NEXT13:%.*]], [[FOR_INC35:%.*]] ], [ 0, [[FOR_END23]] ] ; IS__TUNIT_NPM-NEXT: [[INDVARS_IV12:%.*]] = phi i64 [ [[INDVARS_IV_NEXT13:%.*]], [[FOR_INC35:%.*]] ], [ 0, [[FOR_END23]] ]
; IS__TUNIT_NPM-NEXT: [[EXITCOND14:%.*]] = icmp ne i64 [[INDVARS_IV12]], 1024 ; IS__TUNIT_NPM-NEXT: [[EXITCOND14:%.*]] = icmp ne i64 [[INDVARS_IV12]], 1024
; IS__TUNIT_NPM-NEXT: br i1 [[EXITCOND14]], label [[FOR_BODY30:%.*]], label [[FOR_COND_CLEANUP29:%.*]] ; IS__TUNIT_NPM-NEXT: br i1 [[EXITCOND14]], label [[FOR_BODY30:%.*]], label [[FOR_COND_CLEANUP29:%.*]]
; IS__TUNIT_NPM: for.cond.cleanup29: ; IS__TUNIT_NPM: for.cond.cleanup29:
; IS__TUNIT_NPM-NEXT: br label [[FOR_END37:%.*]] ; IS__TUNIT_NPM-NEXT: br label [[FOR_END37:%.*]]
; IS__TUNIT_NPM: for.body30: ; IS__TUNIT_NPM: for.body30:
▲ Show 20 Lines • Show All 269 Lines • ▼ Show 20 Lines
; X = Y = 1; ; X = Y = 1;
; escape(&X); ; escape(&X);
; write_random(&Y); ; write_random(&Y);
; Z = X ? 1 : 2; ; Z = X ? 1 : 2;
; return X + Y + Z; ; return X + Y + Z;
; } ; }
; ;
define i32 @local_alloca_not_simplifiable_1() { define i32 @local_alloca_not_simplifiable_1() {
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@local_alloca_not_simplifiable_1() { ; IS________OPM-LABEL: define {{[^@]+}}@local_alloca_not_simplifiable_1() {
; IS__TUNIT_OPM-NEXT: entry: ; IS________OPM-NEXT: entry:
; IS__TUNIT_OPM-NEXT: [[X:%.*]] = alloca i32, align 4 ; IS________OPM-NEXT: [[X:%.*]] = alloca i32, align 4
; IS__TUNIT_OPM-NEXT: [[Y:%.*]] = alloca i32, align 4 ; IS________OPM-NEXT: [[Y:%.*]] = alloca i32, align 4
; IS__TUNIT_OPM-NEXT: [[I:%.*]] = bitcast i32* [[X]] to i8* ; IS________OPM-NEXT: [[I:%.*]] = bitcast i32* [[X]] to i8*
; IS__TUNIT_OPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I]]) #[[ATTR11]] ; IS________OPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I]]) #[[ATTR14:[0-9]+]]
; IS__TUNIT_OPM-NEXT: [[I1:%.*]] = bitcast i32* [[Y]] to i8* ; IS________OPM-NEXT: [[I1:%.*]] = bitcast i32* [[Y]] to i8*
; IS__TUNIT_OPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I1]]) #[[ATTR11]] ; IS________OPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I1]]) #[[ATTR14]]
; IS__TUNIT_OPM-NEXT: store i32 1, i32* [[Y]], align 4, !tbaa [[TBAA3]] ; IS________OPM-NEXT: store i32 1, i32* [[Y]], align 4, !tbaa [[TBAA3]]
; IS__TUNIT_OPM-NEXT: store i32 1, i32* [[X]], align 4, !tbaa [[TBAA3]] ; IS________OPM-NEXT: store i32 1, i32* [[X]], align 4, !tbaa [[TBAA3]]
; IS__TUNIT_OPM-NEXT: [[I2:%.*]] = bitcast i32* [[X]] to i8* ; IS________OPM-NEXT: [[I2:%.*]] = bitcast i32* [[X]] to i8*
; IS__TUNIT_OPM-NEXT: call void @escape(i8* noundef nonnull align 4 dereferenceable(4) [[I2]]) ; IS________OPM-NEXT: call void @escape(i8* noundef nonnull align 4 dereferenceable(4) [[I2]])
; IS__TUNIT_OPM-NEXT: call void @write_random(i32* noalias nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[Y]]) ; IS________OPM-NEXT: call void @write_random(i32* noalias nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[Y]])
; IS__TUNIT_OPM-NEXT: [[I3:%.*]] = load i32, i32* [[X]], align 4, !tbaa [[TBAA3]] ; IS________OPM-NEXT: [[I3:%.*]] = load i32, i32* [[X]], align 4, !tbaa [[TBAA3]]
; IS__TUNIT_OPM-NEXT: [[TOBOOL_NOT:%.*]] = icmp eq i32 [[I3]], 0 ; IS________OPM-NEXT: [[TOBOOL_NOT:%.*]] = icmp eq i32 [[I3]], 0
; IS__TUNIT_OPM-NEXT: [[COND:%.*]] = select i1 [[TOBOOL_NOT]], i32 2, i32 1 ; IS________OPM-NEXT: [[COND:%.*]] = select i1 [[TOBOOL_NOT]], i32 2, i32 1
; IS__TUNIT_OPM-NEXT: [[I4:%.*]] = load i32, i32* [[Y]], align 4, !tbaa [[TBAA3]] ; IS________OPM-NEXT: [[I4:%.*]] = load i32, i32* [[Y]], align 4, !tbaa [[TBAA3]]
; IS__TUNIT_OPM-NEXT: [[ADD:%.*]] = add nsw i32 [[I3]], [[I4]] ; IS________OPM-NEXT: [[ADD:%.*]] = add nsw i32 [[I3]], [[I4]]
; IS__TUNIT_OPM-NEXT: [[ADD1:%.*]] = add nsw i32 [[ADD]], [[COND]] ; IS________OPM-NEXT: [[ADD1:%.*]] = add nsw i32 [[ADD]], [[COND]]
; IS__TUNIT_OPM-NEXT: [[I5:%.*]] = bitcast i32* [[Y]] to i8* ; IS________OPM-NEXT: [[I5:%.*]] = bitcast i32* [[Y]] to i8*
; IS__TUNIT_OPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I5]]) ; IS________OPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I5]])
; IS__TUNIT_OPM-NEXT: [[I6:%.*]] = bitcast i32* [[X]] to i8* ; IS________OPM-NEXT: [[I6:%.*]] = bitcast i32* [[X]] to i8*
; IS__TUNIT_OPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I6]]) ; IS________OPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I6]])
; IS__TUNIT_OPM-NEXT: ret i32 [[ADD1]] ; IS________OPM-NEXT: ret i32 [[ADD1]]
; ;
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@local_alloca_not_simplifiable_1() { ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@local_alloca_not_simplifiable_1() {
; IS__TUNIT_NPM-NEXT: entry: ; IS__TUNIT_NPM-NEXT: entry:
; IS__TUNIT_NPM-NEXT: [[X:%.*]] = alloca i32, align 4 ; IS__TUNIT_NPM-NEXT: [[X:%.*]] = alloca i32, align 4
; IS__TUNIT_NPM-NEXT: [[Y:%.*]] = alloca i32, align 4 ; IS__TUNIT_NPM-NEXT: [[Y:%.*]] = alloca i32, align 4
; IS__TUNIT_NPM-NEXT: [[I:%.*]] = bitcast i32* [[X]] to i8* ; IS__TUNIT_NPM-NEXT: [[I:%.*]] = bitcast i32* [[X]] to i8*
; IS__TUNIT_NPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I]]) #[[ATTR9]] ; IS__TUNIT_NPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I]]) #[[ATTR11]]
; IS__TUNIT_NPM-NEXT: [[I1:%.*]] = bitcast i32* [[Y]] to i8* ; IS__TUNIT_NPM-NEXT: [[I1:%.*]] = bitcast i32* [[Y]] to i8*
; IS__TUNIT_NPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I1]]) #[[ATTR9]] ; IS__TUNIT_NPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I1]]) #[[ATTR11]]
; IS__TUNIT_NPM-NEXT: store i32 1, i32* [[Y]], align 4, !tbaa [[TBAA3]] ; IS__TUNIT_NPM-NEXT: store i32 1, i32* [[Y]], align 4, !tbaa [[TBAA3]]
; IS__TUNIT_NPM-NEXT: store i32 1, i32* [[X]], align 4, !tbaa [[TBAA3]] ; IS__TUNIT_NPM-NEXT: store i32 1, i32* [[X]], align 4, !tbaa [[TBAA3]]
; IS__TUNIT_NPM-NEXT: [[I2:%.*]] = bitcast i32* [[X]] to i8* ; IS__TUNIT_NPM-NEXT: [[I2:%.*]] = bitcast i32* [[X]] to i8*
; IS__TUNIT_NPM-NEXT: call void @escape(i8* noundef nonnull align 4 dereferenceable(4) [[I2]]) ; IS__TUNIT_NPM-NEXT: call void @escape(i8* noundef nonnull align 4 dereferenceable(4) [[I2]])
; IS__TUNIT_NPM-NEXT: call void @write_random(i32* noalias nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[Y]]) ; IS__TUNIT_NPM-NEXT: call void @write_random(i32* noalias nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[Y]])
; IS__TUNIT_NPM-NEXT: [[I3:%.*]] = load i32, i32* [[X]], align 4, !tbaa [[TBAA3]] ; IS__TUNIT_NPM-NEXT: [[I3:%.*]] = load i32, i32* [[X]], align 4, !tbaa [[TBAA3]]
; IS__TUNIT_NPM-NEXT: [[TOBOOL_NOT:%.*]] = icmp eq i32 [[I3]], 0 ; IS__TUNIT_NPM-NEXT: [[TOBOOL_NOT:%.*]] = icmp eq i32 [[I3]], 0
; IS__TUNIT_NPM-NEXT: [[COND:%.*]] = select i1 [[TOBOOL_NOT]], i32 2, i32 1 ; IS__TUNIT_NPM-NEXT: [[COND:%.*]] = select i1 [[TOBOOL_NOT]], i32 2, i32 1
; IS__TUNIT_NPM-NEXT: [[I4:%.*]] = load i32, i32* [[Y]], align 4, !tbaa [[TBAA3]] ; IS__TUNIT_NPM-NEXT: [[I4:%.*]] = load i32, i32* [[Y]], align 4, !tbaa [[TBAA3]]
; IS__TUNIT_NPM-NEXT: [[ADD:%.*]] = add nsw i32 [[I3]], [[I4]] ; IS__TUNIT_NPM-NEXT: [[ADD:%.*]] = add nsw i32 [[I3]], [[I4]]
; IS__TUNIT_NPM-NEXT: [[ADD1:%.*]] = add nsw i32 [[ADD]], [[COND]] ; IS__TUNIT_NPM-NEXT: [[ADD1:%.*]] = add nsw i32 [[ADD]], [[COND]]
; IS__TUNIT_NPM-NEXT: [[I5:%.*]] = bitcast i32* [[Y]] to i8* ; IS__TUNIT_NPM-NEXT: [[I5:%.*]] = bitcast i32* [[Y]] to i8*
; IS__TUNIT_NPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I5]]) ; IS__TUNIT_NPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I5]])
; IS__TUNIT_NPM-NEXT: [[I6:%.*]] = bitcast i32* [[X]] to i8* ; IS__TUNIT_NPM-NEXT: [[I6:%.*]] = bitcast i32* [[X]] to i8*
; IS__TUNIT_NPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I6]]) ; IS__TUNIT_NPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I6]])
; IS__TUNIT_NPM-NEXT: ret i32 [[ADD1]] ; IS__TUNIT_NPM-NEXT: ret i32 [[ADD1]]
; ;
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@local_alloca_not_simplifiable_1() {
; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: [[X:%.*]] = alloca i32, align 4
; IS__CGSCC_OPM-NEXT: [[Y:%.*]] = alloca i32, align 4
; IS__CGSCC_OPM-NEXT: [[I:%.*]] = bitcast i32* [[X]] to i8*
; IS__CGSCC_OPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I]]) #[[ATTR14]]
; IS__CGSCC_OPM-NEXT: [[I1:%.*]] = bitcast i32* [[Y]] to i8*
; IS__CGSCC_OPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I1]]) #[[ATTR14]]
; IS__CGSCC_OPM-NEXT: store i32 1, i32* [[Y]], align 4, !tbaa [[TBAA3]]
; IS__CGSCC_OPM-NEXT: store i32 1, i32* [[X]], align 4, !tbaa [[TBAA3]]
; IS__CGSCC_OPM-NEXT: [[I2:%.*]] = bitcast i32* [[X]] to i8*
; IS__CGSCC_OPM-NEXT: call void @escape(i8* noundef nonnull align 4 dereferenceable(4) [[I2]])
; IS__CGSCC_OPM-NEXT: call void @write_random(i32* noalias nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[Y]])
; IS__CGSCC_OPM-NEXT: [[I3:%.*]] = load i32, i32* [[X]], align 4, !tbaa [[TBAA3]]
; IS__CGSCC_OPM-NEXT: [[TOBOOL_NOT:%.*]] = icmp eq i32 [[I3]], 0
; IS__CGSCC_OPM-NEXT: [[COND:%.*]] = select i1 [[TOBOOL_NOT]], i32 2, i32 1
; IS__CGSCC_OPM-NEXT: [[I4:%.*]] = load i32, i32* [[Y]], align 4, !tbaa [[TBAA3]]
; IS__CGSCC_OPM-NEXT: [[ADD:%.*]] = add nsw i32 [[I3]], [[I4]]
; IS__CGSCC_OPM-NEXT: [[ADD1:%.*]] = add nsw i32 [[ADD]], [[COND]]
; IS__CGSCC_OPM-NEXT: [[I5:%.*]] = bitcast i32* [[Y]] to i8*
; IS__CGSCC_OPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I5]])
; IS__CGSCC_OPM-NEXT: [[I6:%.*]] = bitcast i32* [[X]] to i8*
; IS__CGSCC_OPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I6]])
; IS__CGSCC_OPM-NEXT: ret i32 [[ADD1]]
;
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@local_alloca_not_simplifiable_1() { ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@local_alloca_not_simplifiable_1() {
; IS__CGSCC_NPM-NEXT: entry: ; IS__CGSCC_NPM-NEXT: entry:
; IS__CGSCC_NPM-NEXT: [[X:%.*]] = alloca i32, align 4 ; IS__CGSCC_NPM-NEXT: [[X:%.*]] = alloca i32, align 4
; IS__CGSCC_NPM-NEXT: [[Y:%.*]] = alloca i32, align 4 ; IS__CGSCC_NPM-NEXT: [[Y:%.*]] = alloca i32, align 4
; IS__CGSCC_NPM-NEXT: [[I:%.*]] = bitcast i32* [[X]] to i8* ; IS__CGSCC_NPM-NEXT: [[I:%.*]] = bitcast i32* [[X]] to i8*
; IS__CGSCC_NPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I]]) #[[ATTR12]] ; IS__CGSCC_NPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I]]) #[[ATTR12]]
; IS__CGSCC_NPM-NEXT: [[I1:%.*]] = bitcast i32* [[Y]] to i8* ; IS__CGSCC_NPM-NEXT: [[I1:%.*]] = bitcast i32* [[Y]] to i8*
; IS__CGSCC_NPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I1]]) #[[ATTR12]] ; IS__CGSCC_NPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 4, i8* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[I1]]) #[[ATTR12]]
Show All 36 Linesentry:
call void @llvm.lifetime.end.p0i8(i64 4, i8* nonnull %i5) call void @llvm.lifetime.end.p0i8(i64 4, i8* nonnull %i5)
%i6 = bitcast i32* %X to i8* %i6 = bitcast i32* %X to i8*
call void @llvm.lifetime.end.p0i8(i64 4, i8* nonnull %i6) call void @llvm.lifetime.end.p0i8(i64 4, i8* nonnull %i6)
ret i32 %add1 ret i32 %add1
} }
; We could simplify these if we separate accessed bins wrt. alignment (here mod 4). ; We could simplify these if we separate accessed bins wrt. alignment (here mod 4).
define i32 @unknown_access_mixed_simplifiable(i32 %arg1, i32 %arg2) { define i32 @unknown_access_mixed_simplifiable(i32 %arg1, i32 %arg2) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__TUNIT____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@unknown_access_mixed_simplifiable ; IS__TUNIT____-LABEL: define {{[^@]+}}@unknown_access_mixed_simplifiable
; IS__TUNIT____-SAME: (i32 [[ARG1:%.*]], i32 [[ARG2:%.*]]) #[[ATTR3]] { ; IS__TUNIT____-SAME: (i32 [[ARG1:%.*]], i32 [[ARG2:%.*]]) #[[ATTR3]] {
; IS__TUNIT____-NEXT: entry: ; IS__TUNIT____-NEXT: entry:
; IS__TUNIT____-NEXT: [[S:%.*]] = alloca [[STRUCT_S:%.*]], align 4 ; IS__TUNIT____-NEXT: [[S:%.*]] = alloca [[STRUCT_S:%.*]], align 4
; IS__TUNIT____-NEXT: [[BC:%.*]] = bitcast %struct.S* [[S]] to i32* ; IS__TUNIT____-NEXT: [[BC:%.*]] = bitcast %struct.S* [[S]] to i32*
; IS__TUNIT____-NEXT: [[GEP1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 2 ; IS__TUNIT____-NEXT: [[GEP1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 2
; IS__TUNIT____-NEXT: [[GEP2:%.*]] = getelementptr inbounds i32, i32* [[BC]], i32 [[ARG1]] ; IS__TUNIT____-NEXT: [[GEP2:%.*]] = getelementptr inbounds i32, i32* [[BC]], i32 [[ARG1]]
; IS__TUNIT____-NEXT: [[GEP3:%.*]] = getelementptr inbounds i32, i32* [[BC]], i32 [[ARG2]] ; IS__TUNIT____-NEXT: [[GEP3:%.*]] = getelementptr inbounds i32, i32* [[BC]], i32 [[ARG2]]
Show All 40 Linesentry:
%l3 = load i32, i32* %gep3 %l3 = load i32, i32* %gep3
%add1 = add i32 %l1, %l2 %add1 = add i32 %l1, %l2
%add2 = add i32 %add1, %l3 %add2 = add i32 %add1, %l3
ret i32 %add2 ret i32 %add2
} }
; The access to bc4b could go anywhere, nothing is simplifiable. ; The access to bc4b could go anywhere, nothing is simplifiable.
define i32 @unknown_access_mixed_not_simplifiable(i32 %arg1, i32 %arg2, i32 %arg3) { define i32 @unknown_access_mixed_not_simplifiable(i32 %arg1, i32 %arg2, i32 %arg3) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__TUNIT____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@unknown_access_mixed_not_simplifiable ; IS__TUNIT____-LABEL: define {{[^@]+}}@unknown_access_mixed_not_simplifiable
; IS__TUNIT____-SAME: (i32 [[ARG1:%.*]], i32 [[ARG2:%.*]], i32 [[ARG3:%.*]]) #[[ATTR3]] { ; IS__TUNIT____-SAME: (i32 [[ARG1:%.*]], i32 [[ARG2:%.*]], i32 [[ARG3:%.*]]) #[[ATTR3]] {
; IS__TUNIT____-NEXT: entry: ; IS__TUNIT____-NEXT: entry:
; IS__TUNIT____-NEXT: [[S:%.*]] = alloca [[STRUCT_S:%.*]], align 4 ; IS__TUNIT____-NEXT: [[S:%.*]] = alloca [[STRUCT_S:%.*]], align 4
; IS__TUNIT____-NEXT: [[BC:%.*]] = bitcast %struct.S* [[S]] to i32* ; IS__TUNIT____-NEXT: [[BC:%.*]] = bitcast %struct.S* [[S]] to i32*
; IS__TUNIT____-NEXT: [[GEP1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 2 ; IS__TUNIT____-NEXT: [[GEP1:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i64 0, i32 2
; IS__TUNIT____-NEXT: [[GEP2:%.*]] = getelementptr inbounds i32, i32* [[BC]], i32 [[ARG1]] ; IS__TUNIT____-NEXT: [[GEP2:%.*]] = getelementptr inbounds i32, i32* [[BC]], i32 [[ARG1]]
; IS__TUNIT____-NEXT: [[GEP3:%.*]] = getelementptr inbounds i32, i32* [[BC]], i32 [[ARG2]] ; IS__TUNIT____-NEXT: [[GEP3:%.*]] = getelementptr inbounds i32, i32* [[BC]], i32 [[ARG2]]
▲ Show 20 Lines • Show All 64 Lines • ▼ Show 20 Lines
declare void @escape(i8*) declare void @escape(i8*)
; int Flag0 = 0; ; int Flag0 = 0;
; int global_not_simplifiable_1(int cnd) { ; int global_not_simplifiable_1(int cnd) {
; return Flag0; ; return Flag0;
; } ; }
; ;
define i32 @global_not_simplifiable_1(i32 %cnd) { define i32 @global_not_simplifiable_1(i32 %cnd) {
; IS__TUNIT_OPM: Function Attrs: nofree nosync nounwind readonly willreturn ; IS__TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind readonly willreturn
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@global_not_simplifiable_1 ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@global_not_simplifiable_1
; IS__TUNIT_OPM-SAME: (i32 [[CND:%.*]]) #[[ATTR7:[0-9]+]] { ; IS__TUNIT_OPM-SAME: (i32 [[CND:%.*]]) #[[ATTR10:[0-9]+]] {
; IS__TUNIT_OPM-NEXT: entry: ; IS__TUNIT_OPM-NEXT: entry:
; IS__TUNIT_OPM-NEXT: [[I:%.*]] = load i32, i32* @Flag0, align 4, !tbaa [[TBAA3]] ; IS__TUNIT_OPM-NEXT: [[I:%.*]] = load i32, i32* @Flag0, align 4, !tbaa [[TBAA3]]
; IS__TUNIT_OPM-NEXT: ret i32 [[I]] ; IS__TUNIT_OPM-NEXT: ret i32 [[I]]
; ;
; IS__TUNIT_NPM: Function Attrs: nofree nosync nounwind readonly willreturn ; NOT_TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind readonly willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@global_not_simplifiable_1 ; NOT_TUNIT_OPM-LABEL: define {{[^@]+}}@global_not_simplifiable_1
; IS__TUNIT_NPM-SAME: (i32 [[CND:%.*]]) #[[ATTR5:[0-9]+]] { ; NOT_TUNIT_OPM-SAME: (i32 [[CND:%.*]]) #[[ATTR7:[0-9]+]] {
; IS__TUNIT_NPM-NEXT: entry: ; NOT_TUNIT_OPM-NEXT: entry:
; IS__TUNIT_NPM-NEXT: [[I:%.*]] = load i32, i32* @Flag0, align 4, !tbaa [[TBAA3]] ; NOT_TUNIT_OPM-NEXT: [[I:%.*]] = load i32, i32* @Flag0, align 4, !tbaa [[TBAA3]]
; IS__TUNIT_NPM-NEXT: ret i32 [[I]] ; NOT_TUNIT_OPM-NEXT: ret i32 [[I]]
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readonly willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@global_not_simplifiable_1
; IS__CGSCC____-SAME: (i32 [[CND:%.*]]) #[[ATTR7:[0-9]+]] {
; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: [[I:%.*]] = load i32, i32* @Flag0, align 4, !tbaa [[TBAA3]]
; IS__CGSCC____-NEXT: ret i32 [[I]]
; ;
entry: entry:
%i = load i32, i32* @Flag0, align 4, !tbaa !3 %i = load i32, i32* @Flag0, align 4, !tbaa !3
ret i32 %i ret i32 %i
} }
; static int Flag1 __attribute__((loader_uninitialized)); ; static int Flag1 __attribute__((loader_uninitialized));
; int static_global_not_simplifiable_1(int cnd) { ; int static_global_not_simplifiable_1(int cnd) {
▲ Show 20 Lines • Show All 67 Lines • ▼ Show 20 Lines
; Gint{,static,_static_undef}2 = 7; ; Gint{,static,_static_undef}2 = 7;
; } ; }
; int read{,_static,_static_undef}_global(void) { ; int read{,_static,_static_undef}_global(void) {
; return Gint{,static,_static_undef}2; ; return Gint{,static,_static_undef}2;
; } ; }
; ;
; FIXME: We could replace these loads. ; FIXME: We could replace these loads.
define i32 @write_read_global() { define i32 @write_read_global() {
; IS__TUNIT_OPM: Function Attrs: nofree nosync nounwind willreturn ; IS__TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind willreturn
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@write_read_global ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@write_read_global
; IS__TUNIT_OPM-SAME: () #[[ATTR4]] { ; IS__TUNIT_OPM-SAME: () #[[ATTR7]] {
; IS__TUNIT_OPM-NEXT: store i32 7, i32* @Gint1, align 4 ; IS__TUNIT_OPM-NEXT: store i32 7, i32* @Gint1, align 4
; IS__TUNIT_OPM-NEXT: [[L:%.*]] = load i32, i32* @Gint1, align 4 ; IS__TUNIT_OPM-NEXT: [[L:%.*]] = load i32, i32* @Gint1, align 4
; IS__TUNIT_OPM-NEXT: ret i32 [[L]] ; IS__TUNIT_OPM-NEXT: ret i32 [[L]]
; ;
; IS__TUNIT_NPM: Function Attrs: nofree nosync nounwind willreturn ; NOT_TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@write_read_global ; NOT_TUNIT_OPM-LABEL: define {{[^@]+}}@write_read_global
; IS__TUNIT_NPM-SAME: () #[[ATTR2]] { ; NOT_TUNIT_OPM-SAME: () #[[ATTR5]] {
; IS__TUNIT_NPM-NEXT: store i32 7, i32* @Gint1, align 4 ; NOT_TUNIT_OPM-NEXT: store i32 7, i32* @Gint1, align 4
; IS__TUNIT_NPM-NEXT: [[L:%.*]] = load i32, i32* @Gint1, align 4 ; NOT_TUNIT_OPM-NEXT: [[L:%.*]] = load i32, i32* @Gint1, align 4
; IS__TUNIT_NPM-NEXT: ret i32 [[L]] ; NOT_TUNIT_OPM-NEXT: ret i32 [[L]]
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@write_read_global
; IS__CGSCC____-SAME: () #[[ATTR5]] {
; IS__CGSCC____-NEXT: store i32 7, i32* @Gint1, align 4
; IS__CGSCC____-NEXT: [[L:%.*]] = load i32, i32* @Gint1, align 4
; IS__CGSCC____-NEXT: ret i32 [[L]]
; ;
store i32 7, i32* @Gint1 store i32 7, i32* @Gint1
%l = load i32, i32* @Gint1 %l = load i32, i32* @Gint1
ret i32 %l ret i32 %l
} }
define void @write_global() { define void @write_global() {
; IS__TUNIT_OPM: Function Attrs: nofree nosync nounwind willreturn writeonly ; IS__TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@write_global ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@write_global
; IS__TUNIT_OPM-SAME: () #[[ATTR5]] { ; IS__TUNIT_OPM-SAME: () #[[ATTR5]] {
; IS__TUNIT_OPM-NEXT: store i32 7, i32* @Gint2, align 4 ; IS__TUNIT_OPM-NEXT: store i32 7, i32* @Gint2, align 4
; IS__TUNIT_OPM-NEXT: ret void ; IS__TUNIT_OPM-NEXT: ret void
; ;
; IS__TUNIT_NPM: Function Attrs: nofree nosync nounwind willreturn writeonly ; NOT_TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@write_global ; NOT_TUNIT_OPM-LABEL: define {{[^@]+}}@write_global
; IS__TUNIT_NPM-SAME: () #[[ATTR4]] { ; NOT_TUNIT_OPM-SAME: () #[[ATTR4:[0-9]+]] {
; IS__TUNIT_NPM-NEXT: store i32 7, i32* @Gint2, align 4 ; NOT_TUNIT_OPM-NEXT: store i32 7, i32* @Gint2, align 4
; IS__TUNIT_NPM-NEXT: ret void ; NOT_TUNIT_OPM-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC____-LABEL: define {{[^@]+}}@write_global
; IS__CGSCC____-SAME: () #[[ATTR4:[0-9]+]] {
; IS__CGSCC____-NEXT: store i32 7, i32* @Gint2, align 4
; IS__CGSCC____-NEXT: ret void
; ;
store i32 7, i32* @Gint2 store i32 7, i32* @Gint2
ret void ret void
} }
define i32 @read_global() { define i32 @read_global() {
; IS__TUNIT_OPM: Function Attrs: nofree nosync nounwind readonly willreturn ; IS__TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind readonly willreturn
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@read_global ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@read_global
; IS__TUNIT_OPM-SAME: () #[[ATTR7]] { ; IS__TUNIT_OPM-SAME: () #[[ATTR10]] {
; IS__TUNIT_OPM-NEXT: [[L:%.*]] = load i32, i32* @Gint2, align 4 ; IS__TUNIT_OPM-NEXT: [[L:%.*]] = load i32, i32* @Gint2, align 4
; IS__TUNIT_OPM-NEXT: ret i32 [[L]] ; IS__TUNIT_OPM-NEXT: ret i32 [[L]]
; ;
; IS__TUNIT_NPM: Function Attrs: nofree nosync nounwind readonly willreturn ; NOT_TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind readonly willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@read_global ; NOT_TUNIT_OPM-LABEL: define {{[^@]+}}@read_global
; IS__TUNIT_NPM-SAME: () #[[ATTR5]] { ; NOT_TUNIT_OPM-SAME: () #[[ATTR7]] {
; IS__TUNIT_NPM-NEXT: [[L:%.*]] = load i32, i32* @Gint2, align 4 ; NOT_TUNIT_OPM-NEXT: [[L:%.*]] = load i32, i32* @Gint2, align 4
; IS__TUNIT_NPM-NEXT: ret i32 [[L]] ; NOT_TUNIT_OPM-NEXT: ret i32 [[L]]
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readonly willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@read_global
; IS__CGSCC____-SAME: () #[[ATTR7]] {
; IS__CGSCC____-NEXT: [[L:%.*]] = load i32, i32* @Gint2, align 4
; IS__CGSCC____-NEXT: ret i32 [[L]]
; ;
%l = load i32, i32* @Gint2 %l = load i32, i32* @Gint2
ret i32 %l ret i32 %l
} }
; FIXME: We could replace these loads. ; FIXME: We could replace these loads.
define i32 @write_read_static_global() { define i32 @write_read_static_global() {
; IS__TUNIT_OPM: Function Attrs: nofree nosync nounwind willreturn ; IS__TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind willreturn
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@write_read_static_global ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@write_read_static_global
; IS__TUNIT_OPM-SAME: () #[[ATTR4]] { ; IS__TUNIT_OPM-SAME: () #[[ATTR7]] {
; IS__TUNIT_OPM-NEXT: store i32 7, i32* @Gstatic_int1, align 4 ; IS__TUNIT_OPM-NEXT: store i32 7, i32* @Gstatic_int1, align 4
; IS__TUNIT_OPM-NEXT: [[L:%.*]] = load i32, i32* @Gstatic_int1, align 4 ; IS__TUNIT_OPM-NEXT: [[L:%.*]] = load i32, i32* @Gstatic_int1, align 4
; IS__TUNIT_OPM-NEXT: ret i32 [[L]] ; IS__TUNIT_OPM-NEXT: ret i32 [[L]]
; ;
; IS__TUNIT_NPM: Function Attrs: nofree nosync nounwind willreturn ; NOT_TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@write_read_static_global ; NOT_TUNIT_OPM-LABEL: define {{[^@]+}}@write_read_static_global
; IS__TUNIT_NPM-SAME: () #[[ATTR2]] { ; NOT_TUNIT_OPM-SAME: () #[[ATTR5]] {
; IS__TUNIT_NPM-NEXT: store i32 7, i32* @Gstatic_int1, align 4 ; NOT_TUNIT_OPM-NEXT: store i32 7, i32* @Gstatic_int1, align 4
; IS__TUNIT_NPM-NEXT: [[L:%.*]] = load i32, i32* @Gstatic_int1, align 4 ; NOT_TUNIT_OPM-NEXT: [[L:%.*]] = load i32, i32* @Gstatic_int1, align 4
; IS__TUNIT_NPM-NEXT: ret i32 [[L]] ; NOT_TUNIT_OPM-NEXT: ret i32 [[L]]
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@write_read_static_global
; IS__CGSCC____-SAME: () #[[ATTR5]] {
; IS__CGSCC____-NEXT: store i32 7, i32* @Gstatic_int1, align 4
; IS__CGSCC____-NEXT: [[L:%.*]] = load i32, i32* @Gstatic_int1, align 4
; IS__CGSCC____-NEXT: ret i32 [[L]]
; ;
store i32 7, i32* @Gstatic_int1 store i32 7, i32* @Gstatic_int1
%l = load i32, i32* @Gstatic_int1 %l = load i32, i32* @Gstatic_int1
ret i32 %l ret i32 %l
} }
define void @write_static_global() { define void @write_static_global() {
; IS__TUNIT_OPM: Function Attrs: nofree nosync nounwind willreturn writeonly ; IS__TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@write_static_global ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@write_static_global
; IS__TUNIT_OPM-SAME: () #[[ATTR5]] { ; IS__TUNIT_OPM-SAME: () #[[ATTR5]] {
; IS__TUNIT_OPM-NEXT: store i32 7, i32* @Gstatic_int2, align 4 ; IS__TUNIT_OPM-NEXT: store i32 7, i32* @Gstatic_int2, align 4
; IS__TUNIT_OPM-NEXT: ret void ; IS__TUNIT_OPM-NEXT: ret void
; ;
; IS__TUNIT_NPM: Function Attrs: nofree nosync nounwind willreturn writeonly ; NOT_TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@write_static_global ; NOT_TUNIT_OPM-LABEL: define {{[^@]+}}@write_static_global
; IS__TUNIT_NPM-SAME: () #[[ATTR4]] { ; NOT_TUNIT_OPM-SAME: () #[[ATTR4]] {
; IS__TUNIT_NPM-NEXT: store i32 7, i32* @Gstatic_int2, align 4 ; NOT_TUNIT_OPM-NEXT: store i32 7, i32* @Gstatic_int2, align 4
; IS__TUNIT_NPM-NEXT: ret void ; NOT_TUNIT_OPM-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC____-LABEL: define {{[^@]+}}@write_static_global
; IS__CGSCC____-SAME: () #[[ATTR4]] {
; IS__CGSCC____-NEXT: store i32 7, i32* @Gstatic_int2, align 4
; IS__CGSCC____-NEXT: ret void
; ;
store i32 7, i32* @Gstatic_int2 store i32 7, i32* @Gstatic_int2
ret void ret void
} }
define i32 @read_static_global() { define i32 @read_static_global() {
; IS__TUNIT_OPM: Function Attrs: nofree nosync nounwind readonly willreturn ; IS__TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind readonly willreturn
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@read_static_global ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@read_static_global
; IS__TUNIT_OPM-SAME: () #[[ATTR7]] { ; IS__TUNIT_OPM-SAME: () #[[ATTR10]] {
; IS__TUNIT_OPM-NEXT: [[L:%.*]] = load i32, i32* @Gstatic_int2, align 4 ; IS__TUNIT_OPM-NEXT: [[L:%.*]] = load i32, i32* @Gstatic_int2, align 4
; IS__TUNIT_OPM-NEXT: ret i32 [[L]] ; IS__TUNIT_OPM-NEXT: ret i32 [[L]]
; ;
; IS__TUNIT_NPM: Function Attrs: nofree nosync nounwind readonly willreturn ; NOT_TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind readonly willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@read_static_global ; NOT_TUNIT_OPM-LABEL: define {{[^@]+}}@read_static_global
; IS__TUNIT_NPM-SAME: () #[[ATTR5]] { ; NOT_TUNIT_OPM-SAME: () #[[ATTR7]] {
; IS__TUNIT_NPM-NEXT: [[L:%.*]] = load i32, i32* @Gstatic_int2, align 4 ; NOT_TUNIT_OPM-NEXT: [[L:%.*]] = load i32, i32* @Gstatic_int2, align 4
; IS__TUNIT_NPM-NEXT: ret i32 [[L]] ; NOT_TUNIT_OPM-NEXT: ret i32 [[L]]
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readonly willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@read_static_global
; IS__CGSCC____-SAME: () #[[ATTR7]] {
; IS__CGSCC____-NEXT: [[L:%.*]] = load i32, i32* @Gstatic_int2, align 4
; IS__CGSCC____-NEXT: ret i32 [[L]]
; ;
%l = load i32, i32* @Gstatic_int2 %l = load i32, i32* @Gstatic_int2
ret i32 %l ret i32 %l
} }
define i32 @write_read_static_undef_global() { define i32 @write_read_static_undef_global() {
; IS__TUNIT_OPM: Function Attrs: nofree nosync nounwind willreturn writeonly ; IS__TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@write_read_static_undef_global ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@write_read_static_undef_global
; IS__TUNIT_OPM-SAME: () #[[ATTR5]] { ; IS__TUNIT_OPM-SAME: () #[[ATTR5]] {
; IS__TUNIT_OPM-NEXT: ret i32 7 ; IS__TUNIT_OPM-NEXT: ret i32 7
; ;
; IS__TUNIT_NPM: Function Attrs: nofree nosync nounwind willreturn writeonly ; NOT_TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@write_read_static_undef_global ; NOT_TUNIT_OPM-LABEL: define {{[^@]+}}@write_read_static_undef_global
; IS__TUNIT_NPM-SAME: () #[[ATTR4]] { ; NOT_TUNIT_OPM-SAME: () #[[ATTR4]] {
; IS__TUNIT_NPM-NEXT: ret i32 7 ; NOT_TUNIT_OPM-NEXT: ret i32 7
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC____-LABEL: define {{[^@]+}}@write_read_static_undef_global
; IS__CGSCC____-SAME: () #[[ATTR4]] {
; IS__CGSCC____-NEXT: ret i32 7
; ;
store i32 7, i32* @Gstatic_undef_int1 store i32 7, i32* @Gstatic_undef_int1
%l = load i32, i32* @Gstatic_undef_int1 %l = load i32, i32* @Gstatic_undef_int1
ret i32 %l ret i32 %l
} }
define void @write_static_undef_global() { define void @write_static_undef_global() {
; IS__TUNIT_OPM: Function Attrs: nofree nosync nounwind willreturn writeonly ; IS__TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@write_static_undef_global ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@write_static_undef_global
; IS__TUNIT_OPM-SAME: () #[[ATTR5]] { ; IS__TUNIT_OPM-SAME: () #[[ATTR5]] {
; IS__TUNIT_OPM-NEXT: ret void ; IS__TUNIT_OPM-NEXT: ret void
; ;
; IS__TUNIT_NPM: Function Attrs: nofree nosync nounwind willreturn writeonly ; IS__TUNIT_NPM: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@write_static_undef_global ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@write_static_undef_global
; IS__TUNIT_NPM-SAME: () #[[ATTR4]] { ; IS__TUNIT_NPM-SAME: () #[[ATTR4]] {
; IS__TUNIT_NPM-NEXT: ret void ; IS__TUNIT_NPM-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC____-LABEL: define {{[^@]+}}@write_static_undef_global ; IS__CGSCC____-LABEL: define {{[^@]+}}@write_static_undef_global
; IS__CGSCC____-SAME: () #[[ATTR4]] { ; IS__CGSCC____-SAME: () #[[ATTR4]] {
; IS__CGSCC____-NEXT: store i32 7, i32* @Gstatic_undef_int2, align 4 ; IS__CGSCC____-NEXT: store i32 7, i32* @Gstatic_undef_int2, align 4
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
store i32 7, i32* @Gstatic_undef_int2 store i32 7, i32* @Gstatic_undef_int2
ret void ret void
} }
define i32 @read_static_undef_global() { define i32 @read_static_undef_global() {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__TUNIT____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@read_static_undef_global ; IS__TUNIT____-LABEL: define {{[^@]+}}@read_static_undef_global
; IS__TUNIT____-SAME: () #[[ATTR3]] { ; IS__TUNIT____-SAME: () #[[ATTR3]] {
; IS__TUNIT____-NEXT: ret i32 7 ; IS__TUNIT____-NEXT: ret i32 7
; ;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@read_static_undef_global ; IS__CGSCC____-LABEL: define {{[^@]+}}@read_static_undef_global
; IS__CGSCC____-SAME: () #[[ATTR2]] { ; IS__CGSCC____-SAME: () #[[ATTR2]] {
; IS__CGSCC____-NEXT: ret i32 7 ; IS__CGSCC____-NEXT: ret i32 7
; ;
%l = load i32, i32* @Gstatic_undef_int2 %l = load i32, i32* @Gstatic_undef_int2
ret i32 %l ret i32 %l
} }
define i32 @single_read_of_static_global() { define i32 @single_read_of_static_global() {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__TUNIT____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@single_read_of_static_global ; IS__TUNIT____-LABEL: define {{[^@]+}}@single_read_of_static_global
; IS__TUNIT____-SAME: () #[[ATTR3]] { ; IS__TUNIT____-SAME: () #[[ATTR3]] {
; IS__TUNIT____-NEXT: ret i32 0 ; IS__TUNIT____-NEXT: ret i32 0
; ;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@single_read_of_static_global ; IS__CGSCC____-LABEL: define {{[^@]+}}@single_read_of_static_global
; IS__CGSCC____-SAME: () #[[ATTR2]] { ; IS__CGSCC____-SAME: () #[[ATTR2]] {
; IS__CGSCC____-NEXT: ret i32 0 ; IS__CGSCC____-NEXT: ret i32 0
; ;
%l = load i32, i32* @Gstatic_int3 %l = load i32, i32* @Gstatic_int3
ret i32 %l ret i32 %l
} }
define i8 @phi_store() { define i8 @phi_store() {
; IS__TUNIT_OPM: Function Attrs: nofree nosync nounwind readnone ; IS__TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind readnone
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@phi_store ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@phi_store
; IS__TUNIT_OPM-SAME: () #[[ATTR8:[0-9]+]] { ; IS__TUNIT_OPM-SAME: () #[[ATTR11:[0-9]+]] {
; IS__TUNIT_OPM-NEXT: entry: ; IS__TUNIT_OPM-NEXT: entry:
; IS__TUNIT_OPM-NEXT: [[A:%.*]] = alloca i16, align 2 ; IS__TUNIT_OPM-NEXT: [[A:%.*]] = alloca i16, align 2
; IS__TUNIT_OPM-NEXT: [[B:%.*]] = bitcast i16* [[A]] to i8* ; IS__TUNIT_OPM-NEXT: [[B:%.*]] = bitcast i16* [[A]] to i8*
; IS__TUNIT_OPM-NEXT: br label [[LOOP:%.*]] ; IS__TUNIT_OPM-NEXT: br label [[LOOP:%.*]]
; IS__TUNIT_OPM: loop: ; IS__TUNIT_OPM: loop:
; IS__TUNIT_OPM-NEXT: [[P:%.*]] = phi i8* [ [[B]], [[ENTRY:%.*]] ], [ [[G:%.*]], [[LOOP]] ] ; IS__TUNIT_OPM-NEXT: [[P:%.*]] = phi i8* [ [[B]], [[ENTRY:%.*]] ], [ [[G:%.*]], [[LOOP]] ]
; IS__TUNIT_OPM-NEXT: [[I:%.*]] = phi i8 [ 0, [[ENTRY]] ], [ [[O:%.*]], [[LOOP]] ] ; IS__TUNIT_OPM-NEXT: [[I:%.*]] = phi i8 [ 0, [[ENTRY]] ], [ [[O:%.*]], [[LOOP]] ]
; IS__TUNIT_OPM-NEXT: [[G]] = getelementptr i8, i8* [[P]], i64 1 ; IS__TUNIT_OPM-NEXT: [[G]] = getelementptr i8, i8* [[P]], i64 1
; IS__TUNIT_OPM-NEXT: [[O]] = add nsw i8 [[I]], 1 ; IS__TUNIT_OPM-NEXT: [[O]] = add nsw i8 [[I]], 1
; IS__TUNIT_OPM-NEXT: [[C:%.*]] = icmp eq i8 [[O]], 2 ; IS__TUNIT_OPM-NEXT: [[C:%.*]] = icmp eq i8 [[O]], 2
; IS__TUNIT_OPM-NEXT: br i1 [[C]], label [[END:%.*]], label [[LOOP]] ; IS__TUNIT_OPM-NEXT: br i1 [[C]], label [[END:%.*]], label [[LOOP]]
; IS__TUNIT_OPM: end: ; IS__TUNIT_OPM: end:
; IS__TUNIT_OPM-NEXT: [[S:%.*]] = getelementptr i8, i8* [[B]], i64 1 ; IS__TUNIT_OPM-NEXT: [[S:%.*]] = getelementptr i8, i8* [[B]], i64 1
; IS__TUNIT_OPM-NEXT: [[L:%.*]] = load i8, i8* [[S]], align 1 ; IS__TUNIT_OPM-NEXT: [[L:%.*]] = load i8, i8* [[S]], align 1
; IS__TUNIT_OPM-NEXT: ret i8 [[L]] ; IS__TUNIT_OPM-NEXT: ret i8 [[L]]
; ;
; IS__TUNIT_NPM: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__TUNIT_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@phi_store ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@phi_store
; IS__TUNIT_NPM-SAME: () #[[ATTR3]] { ; IS__TUNIT_NPM-SAME: () #[[ATTR3]] {
; IS__TUNIT_NPM-NEXT: entry: ; IS__TUNIT_NPM-NEXT: entry:
; IS__TUNIT_NPM-NEXT: [[A:%.*]] = alloca i16, align 2 ; IS__TUNIT_NPM-NEXT: [[A:%.*]] = alloca i16, align 2
; IS__TUNIT_NPM-NEXT: [[B:%.*]] = bitcast i16* [[A]] to i8* ; IS__TUNIT_NPM-NEXT: [[B:%.*]] = bitcast i16* [[A]] to i8*
; IS__TUNIT_NPM-NEXT: br label [[LOOP:%.*]] ; IS__TUNIT_NPM-NEXT: br label [[LOOP:%.*]]
; IS__TUNIT_NPM: loop: ; IS__TUNIT_NPM: loop:
; IS__TUNIT_NPM-NEXT: [[P:%.*]] = phi i8* [ [[B]], [[ENTRY:%.*]] ], [ [[G:%.*]], [[LOOP]] ] ; IS__TUNIT_NPM-NEXT: [[P:%.*]] = phi i8* [ [[B]], [[ENTRY:%.*]] ], [ [[G:%.*]], [[LOOP]] ]
▲ Show 20 Lines • Show All 60 Lines • ▼ Show 20 Lines
end: end:
%s = getelementptr i8, i8* %b, i64 1 %s = getelementptr i8, i8* %b, i64 1
%l = load i8, i8* %s %l = load i8, i8* %s
ret i8 %l ret i8 %l
} }
; FIXME: This function returns 1. ; FIXME: This function returns 1.
define i8 @phi_no_store_1() { define i8 @phi_no_store_1() {
; IS__TUNIT_OPM: Function Attrs: nofree nosync nounwind ; IS________OPM: Function Attrs: nofree norecurse nosync nounwind
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@phi_no_store_1 ; IS________OPM-LABEL: define {{[^@]+}}@phi_no_store_1
; IS__TUNIT_OPM-SAME: () #[[ATTR2]] { ; IS________OPM-SAME: () #[[ATTR9:[0-9]+]] {
; IS__TUNIT_OPM-NEXT: entry: ; IS________OPM-NEXT: entry:
; IS__TUNIT_OPM-NEXT: br label [[LOOP:%.*]] ; IS________OPM-NEXT: br label [[LOOP:%.*]]
; IS__TUNIT_OPM: loop: ; IS________OPM: loop:
; IS__TUNIT_OPM-NEXT: [[P:%.*]] = phi i8* [ bitcast (i32* @a1 to i8*), [[ENTRY:%.*]] ], [ [[G:%.*]], [[LOOP]] ] ; IS________OPM-NEXT: [[P:%.*]] = phi i8* [ bitcast (i32* @a1 to i8*), [[ENTRY:%.*]] ], [ [[G:%.*]], [[LOOP]] ]
; IS__TUNIT_OPM-NEXT: [[I:%.*]] = phi i8 [ 0, [[ENTRY]] ], [ [[O:%.*]], [[LOOP]] ] ; IS________OPM-NEXT: [[I:%.*]] = phi i8 [ 0, [[ENTRY]] ], [ [[O:%.*]], [[LOOP]] ]
; IS__TUNIT_OPM-NEXT: [[G]] = getelementptr i8, i8* [[P]], i64 1 ; IS________OPM-NEXT: [[G]] = getelementptr i8, i8* [[P]], i64 1
; IS__TUNIT_OPM-NEXT: [[O]] = add nsw i8 [[I]], 1 ; IS________OPM-NEXT: [[O]] = add nsw i8 [[I]], 1
; IS__TUNIT_OPM-NEXT: [[C:%.*]] = icmp eq i8 [[O]], 3 ; IS________OPM-NEXT: [[C:%.*]] = icmp eq i8 [[O]], 3
; IS__TUNIT_OPM-NEXT: br i1 [[C]], label [[END:%.*]], label [[LOOP]] ; IS________OPM-NEXT: br i1 [[C]], label [[END:%.*]], label [[LOOP]]
; IS__TUNIT_OPM: end: ; IS________OPM: end:
; IS__TUNIT_OPM-NEXT: [[L11:%.*]] = load i8, i8* getelementptr (i8, i8* bitcast (i32* @a1 to i8*), i64 2), align 2 ; IS________OPM-NEXT: [[L11:%.*]] = load i8, i8* getelementptr (i8, i8* bitcast (i32* @a1 to i8*), i64 2), align 2
; IS__TUNIT_OPM-NEXT: [[L12:%.*]] = load i8, i8* getelementptr (i8, i8* bitcast (i32* @a1 to i8*), i64 3), align 1 ; IS________OPM-NEXT: [[L12:%.*]] = load i8, i8* getelementptr (i8, i8* bitcast (i32* @a1 to i8*), i64 3), align 1
; IS__TUNIT_OPM-NEXT: [[ADD:%.*]] = add i8 [[L11]], [[L12]] ; IS________OPM-NEXT: [[ADD:%.*]] = add i8 [[L11]], [[L12]]
; IS__TUNIT_OPM-NEXT: ret i8 [[ADD]] ; IS________OPM-NEXT: ret i8 [[ADD]]
; ;
; IS__TUNIT_NPM: Function Attrs: nofree nosync nounwind willreturn ; IS________NPM: Function Attrs: nofree norecurse nosync nounwind willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@phi_no_store_1 ; IS________NPM-LABEL: define {{[^@]+}}@phi_no_store_1
; IS__TUNIT_NPM-SAME: () #[[ATTR2]] { ; IS________NPM-SAME: () #[[ATTR5]] {
; IS__TUNIT_NPM-NEXT: entry: ; IS________NPM-NEXT: entry:
; IS__TUNIT_NPM-NEXT: br label [[LOOP:%.*]] ; IS________NPM-NEXT: br label [[LOOP:%.*]]
; IS__TUNIT_NPM: loop: ; IS________NPM: loop:
; IS__TUNIT_NPM-NEXT: [[P:%.*]] = phi i8* [ bitcast (i32* @a1 to i8*), [[ENTRY:%.*]] ], [ [[G:%.*]], [[LOOP]] ] ; IS________NPM-NEXT: [[P:%.*]] = phi i8* [ bitcast (i32* @a1 to i8*), [[ENTRY:%.*]] ], [ [[G:%.*]], [[LOOP]] ]
; IS__TUNIT_NPM-NEXT: [[I:%.*]] = phi i8 [ 0, [[ENTRY]] ], [ [[O:%.*]], [[LOOP]] ] ; IS________NPM-NEXT: [[I:%.*]] = phi i8 [ 0, [[ENTRY]] ], [ [[O:%.*]], [[LOOP]] ]
; IS__TUNIT_NPM-NEXT: [[G]] = getelementptr i8, i8* [[P]], i64 1 ; IS________NPM-NEXT: [[G]] = getelementptr i8, i8* [[P]], i64 1
; IS__TUNIT_NPM-NEXT: [[O]] = add nsw i8 [[I]], 1 ; IS________NPM-NEXT: [[O]] = add nsw i8 [[I]], 1
; IS__TUNIT_NPM-NEXT: [[C:%.*]] = icmp eq i8 [[O]], 3 ; IS________NPM-NEXT: [[C:%.*]] = icmp eq i8 [[O]], 3
; IS__TUNIT_NPM-NEXT: br i1 [[C]], label [[END:%.*]], label [[LOOP]] ; IS________NPM-NEXT: br i1 [[C]], label [[END:%.*]], label [[LOOP]]
; IS__TUNIT_NPM: end: ; IS________NPM: end:
; IS__TUNIT_NPM-NEXT: [[L11:%.*]] = load i8, i8* getelementptr (i8, i8* bitcast (i32* @a1 to i8*), i64 2), align 2 ; IS________NPM-NEXT: [[L11:%.*]] = load i8, i8* getelementptr (i8, i8* bitcast (i32* @a1 to i8*), i64 2), align 2
; IS__TUNIT_NPM-NEXT: [[L12:%.*]] = load i8, i8* getelementptr (i8, i8* bitcast (i32* @a1 to i8*), i64 3), align 1 ; IS________NPM-NEXT: [[L12:%.*]] = load i8, i8* getelementptr (i8, i8* bitcast (i32* @a1 to i8*), i64 3), align 1
; IS__TUNIT_NPM-NEXT: [[ADD:%.*]] = add i8 [[L11]], [[L12]] ; IS________NPM-NEXT: [[ADD:%.*]] = add i8 [[L11]], [[L12]]
; IS__TUNIT_NPM-NEXT: ret i8 [[ADD]] ; IS________NPM-NEXT: ret i8 [[ADD]]
;
; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@phi_no_store_1
; IS__CGSCC_OPM-SAME: () #[[ATTR9:[0-9]+]] {
; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: br label [[LOOP:%.*]]
; IS__CGSCC_OPM: loop:
; IS__CGSCC_OPM-NEXT: [[P:%.*]] = phi i8* [ bitcast (i32* @a1 to i8*), [[ENTRY:%.*]] ], [ [[G:%.*]], [[LOOP]] ]
; IS__CGSCC_OPM-NEXT: [[I:%.*]] = phi i8 [ 0, [[ENTRY]] ], [ [[O:%.*]], [[LOOP]] ]
; IS__CGSCC_OPM-NEXT: [[G]] = getelementptr i8, i8* [[P]], i64 1
; IS__CGSCC_OPM-NEXT: [[O]] = add nsw i8 [[I]], 1
; IS__CGSCC_OPM-NEXT: [[C:%.*]] = icmp eq i8 [[O]], 3
; IS__CGSCC_OPM-NEXT: br i1 [[C]], label [[END:%.*]], label [[LOOP]]
; IS__CGSCC_OPM: end:
; IS__CGSCC_OPM-NEXT: [[L11:%.*]] = load i8, i8* getelementptr (i8, i8* bitcast (i32* @a1 to i8*), i64 2), align 2
; IS__CGSCC_OPM-NEXT: [[L12:%.*]] = load i8, i8* getelementptr (i8, i8* bitcast (i32* @a1 to i8*), i64 3), align 1
; IS__CGSCC_OPM-NEXT: [[ADD:%.*]] = add i8 [[L11]], [[L12]]
; IS__CGSCC_OPM-NEXT: ret i8 [[ADD]]
;
; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@phi_no_store_1
; IS__CGSCC_NPM-SAME: () #[[ATTR5]] {
; IS__CGSCC_NPM-NEXT: entry:
; IS__CGSCC_NPM-NEXT: br label [[LOOP:%.*]]
; IS__CGSCC_NPM: loop:
; IS__CGSCC_NPM-NEXT: [[P:%.*]] = phi i8* [ bitcast (i32* @a1 to i8*), [[ENTRY:%.*]] ], [ [[G:%.*]], [[LOOP]] ]
; IS__CGSCC_NPM-NEXT: [[I:%.*]] = phi i8 [ 0, [[ENTRY]] ], [ [[O:%.*]], [[LOOP]] ]
; IS__CGSCC_NPM-NEXT: [[G]] = getelementptr i8, i8* [[P]], i64 1
; IS__CGSCC_NPM-NEXT: [[O]] = add nsw i8 [[I]], 1
; IS__CGSCC_NPM-NEXT: [[C:%.*]] = icmp eq i8 [[O]], 3
; IS__CGSCC_NPM-NEXT: br i1 [[C]], label [[END:%.*]], label [[LOOP]]
; IS__CGSCC_NPM: end:
; IS__CGSCC_NPM-NEXT: [[L11:%.*]] = load i8, i8* getelementptr (i8, i8* bitcast (i32* @a1 to i8*), i64 2), align 2
; IS__CGSCC_NPM-NEXT: [[L12:%.*]] = load i8, i8* getelementptr (i8, i8* bitcast (i32* @a1 to i8*), i64 3), align 1
; IS__CGSCC_NPM-NEXT: [[ADD:%.*]] = add i8 [[L11]], [[L12]]
; IS__CGSCC_NPM-NEXT: ret i8 [[ADD]]
; ;
entry: entry:
%b = bitcast i32* @a1 to i8* %b = bitcast i32* @a1 to i8*
br label %loop br label %loop
loop: loop:
%p = phi i8* [%b, %entry], [%g, %loop] %p = phi i8* [%b, %entry], [%g, %loop]
%i = phi i8 [0, %entry], [%o, %loop] %i = phi i8 [0, %entry], [%o, %loop]
store i8 1, i8* %p store i8 1, i8* %p
%g = getelementptr i8, i8* %p, i64 1 %g = getelementptr i8, i8* %p, i64 1
%o = add nsw i8 %i, 1 %o = add nsw i8 %i, 1
%c = icmp eq i8 %o, 3 %c = icmp eq i8 %o, 3
br i1 %c, label %end, label %loop br i1 %c, label %end, label %loop
end: end:
%s11 = getelementptr i8, i8* %b, i64 2 %s11 = getelementptr i8, i8* %b, i64 2
%l11 = load i8, i8* %s11 %l11 = load i8, i8* %s11
%s12 = getelementptr i8, i8* %b, i64 3 %s12 = getelementptr i8, i8* %b, i64 3
%l12 = load i8, i8* %s12 %l12 = load i8, i8* %s12
%add = add i8 %l11, %l12 %add = add i8 %l11, %l12
ret i8 %add ret i8 %add
} }
; FIXME: This function returns 1. ; FIXME: This function returns 1.
define i8 @phi_no_store_2() { define i8 @phi_no_store_2() {
; IS__TUNIT_OPM: Function Attrs: nofree nosync nounwind ; IS________OPM: Function Attrs: nofree norecurse nosync nounwind
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@phi_no_store_2 ; IS________OPM-LABEL: define {{[^@]+}}@phi_no_store_2
; IS__TUNIT_OPM-SAME: () #[[ATTR2]] { ; IS________OPM-SAME: () #[[ATTR9]] {
; IS__TUNIT_OPM-NEXT: entry: ; IS________OPM-NEXT: entry:
; IS__TUNIT_OPM-NEXT: br label [[LOOP:%.*]] ; IS________OPM-NEXT: br label [[LOOP:%.*]]
; IS__TUNIT_OPM: loop: ; IS________OPM: loop:
; IS__TUNIT_OPM-NEXT: [[P:%.*]] = phi i8* [ bitcast (i32* @a2 to i8*), [[ENTRY:%.*]] ], [ getelementptr (i8, i8* bitcast (i32* @a2 to i8*), i64 2), [[LOOP]] ] ; IS________OPM-NEXT: [[P:%.*]] = phi i8* [ bitcast (i32* @a2 to i8*), [[ENTRY:%.*]] ], [ getelementptr (i8, i8* bitcast (i32* @a2 to i8*), i64 2), [[LOOP]] ]
; IS__TUNIT_OPM-NEXT: [[I:%.*]] = phi i8 [ 0, [[ENTRY]] ], [ [[O:%.*]], [[LOOP]] ] ; IS________OPM-NEXT: [[I:%.*]] = phi i8 [ 0, [[ENTRY]] ], [ [[O:%.*]], [[LOOP]] ]
; IS__TUNIT_OPM-NEXT: store i8 1, i8* [[P]], align 2 ; IS________OPM-NEXT: store i8 1, i8* [[P]], align 2
; IS__TUNIT_OPM-NEXT: [[O]] = add nsw i8 [[I]], 1 ; IS________OPM-NEXT: [[O]] = add nsw i8 [[I]], 1
; IS__TUNIT_OPM-NEXT: [[C:%.*]] = icmp eq i8 [[O]], 7 ; IS________OPM-NEXT: [[C:%.*]] = icmp eq i8 [[O]], 7
; IS__TUNIT_OPM-NEXT: br i1 [[C]], label [[END:%.*]], label [[LOOP]] ; IS________OPM-NEXT: br i1 [[C]], label [[END:%.*]], label [[LOOP]]
; IS__TUNIT_OPM: end: ; IS________OPM: end:
; IS__TUNIT_OPM-NEXT: [[L21:%.*]] = load i8, i8* getelementptr (i8, i8* bitcast (i32* @a2 to i8*), i64 2), align 2 ; IS________OPM-NEXT: [[L21:%.*]] = load i8, i8* getelementptr (i8, i8* bitcast (i32* @a2 to i8*), i64 2), align 2
; IS__TUNIT_OPM-NEXT: [[ADD:%.*]] = add i8 [[L21]], 0 ; IS________OPM-NEXT: [[ADD:%.*]] = add i8 [[L21]], 0
; IS__TUNIT_OPM-NEXT: ret i8 [[ADD]] ; IS________OPM-NEXT: ret i8 [[ADD]]
; ;
; IS__TUNIT_NPM: Function Attrs: nofree nosync nounwind willreturn ; IS________NPM: Function Attrs: nofree norecurse nosync nounwind willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@phi_no_store_2 ; IS________NPM-LABEL: define {{[^@]+}}@phi_no_store_2
; IS__TUNIT_NPM-SAME: () #[[ATTR2]] { ; IS________NPM-SAME: () #[[ATTR5]] {
; IS__TUNIT_NPM-NEXT: entry: ; IS________NPM-NEXT: entry:
; IS__TUNIT_NPM-NEXT: br label [[LOOP:%.*]] ; IS________NPM-NEXT: br label [[LOOP:%.*]]
; IS__TUNIT_NPM: loop: ; IS________NPM: loop:
; IS__TUNIT_NPM-NEXT: [[P:%.*]] = phi i8* [ bitcast (i32* @a2 to i8*), [[ENTRY:%.*]] ], [ getelementptr (i8, i8* bitcast (i32* @a2 to i8*), i64 2), [[LOOP]] ] ; IS________NPM-NEXT: [[P:%.*]] = phi i8* [ bitcast (i32* @a2 to i8*), [[ENTRY:%.*]] ], [ getelementptr (i8, i8* bitcast (i32* @a2 to i8*), i64 2), [[LOOP]] ]
; IS__TUNIT_NPM-NEXT: [[I:%.*]] = phi i8 [ 0, [[ENTRY]] ], [ [[O:%.*]], [[LOOP]] ] ; IS________NPM-NEXT: [[I:%.*]] = phi i8 [ 0, [[ENTRY]] ], [ [[O:%.*]], [[LOOP]] ]
; IS__TUNIT_NPM-NEXT: store i8 1, i8* [[P]], align 2 ; IS________NPM-NEXT: store i8 1, i8* [[P]], align 2
; IS__TUNIT_NPM-NEXT: [[O]] = add nsw i8 [[I]], 1 ; IS________NPM-NEXT: [[O]] = add nsw i8 [[I]], 1
; IS__TUNIT_NPM-NEXT: [[C:%.*]] = icmp eq i8 [[O]], 7 ; IS________NPM-NEXT: [[C:%.*]] = icmp eq i8 [[O]], 7
; IS__TUNIT_NPM-NEXT: br i1 [[C]], label [[END:%.*]], label [[LOOP]] ; IS________NPM-NEXT: br i1 [[C]], label [[END:%.*]], label [[LOOP]]
; IS__TUNIT_NPM: end: ; IS________NPM: end:
; IS__TUNIT_NPM-NEXT: [[L21:%.*]] = load i8, i8* getelementptr (i8, i8* bitcast (i32* @a2 to i8*), i64 2), align 2 ; IS________NPM-NEXT: [[L21:%.*]] = load i8, i8* getelementptr (i8, i8* bitcast (i32* @a2 to i8*), i64 2), align 2
; IS__TUNIT_NPM-NEXT: [[ADD:%.*]] = add i8 [[L21]], 0 ; IS________NPM-NEXT: [[ADD:%.*]] = add i8 [[L21]], 0
; IS__TUNIT_NPM-NEXT: ret i8 [[ADD]] ; IS________NPM-NEXT: ret i8 [[ADD]]
;
; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@phi_no_store_2
; IS__CGSCC_OPM-SAME: () #[[ATTR9]] {
; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: br label [[LOOP:%.*]]
; IS__CGSCC_OPM: loop:
; IS__CGSCC_OPM-NEXT: [[P:%.*]] = phi i8* [ bitcast (i32* @a2 to i8*), [[ENTRY:%.*]] ], [ getelementptr (i8, i8* bitcast (i32* @a2 to i8*), i64 2), [[LOOP]] ]
; IS__CGSCC_OPM-NEXT: [[I:%.*]] = phi i8 [ 0, [[ENTRY]] ], [ [[O:%.*]], [[LOOP]] ]
; IS__CGSCC_OPM-NEXT: store i8 1, i8* [[P]], align 2
; IS__CGSCC_OPM-NEXT: [[O]] = add nsw i8 [[I]], 1
; IS__CGSCC_OPM-NEXT: [[C:%.*]] = icmp eq i8 [[O]], 7
; IS__CGSCC_OPM-NEXT: br i1 [[C]], label [[END:%.*]], label [[LOOP]]
; IS__CGSCC_OPM: end:
; IS__CGSCC_OPM-NEXT: [[L21:%.*]] = load i8, i8* getelementptr (i8, i8* bitcast (i32* @a2 to i8*), i64 2), align 2
; IS__CGSCC_OPM-NEXT: [[ADD:%.*]] = add i8 [[L21]], 0
; IS__CGSCC_OPM-NEXT: ret i8 [[ADD]]
;
; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@phi_no_store_2
; IS__CGSCC_NPM-SAME: () #[[ATTR5]] {
; IS__CGSCC_NPM-NEXT: entry:
; IS__CGSCC_NPM-NEXT: br label [[LOOP:%.*]]
; IS__CGSCC_NPM: loop:
; IS__CGSCC_NPM-NEXT: [[P:%.*]] = phi i8* [ bitcast (i32* @a2 to i8*), [[ENTRY:%.*]] ], [ getelementptr (i8, i8* bitcast (i32* @a2 to i8*), i64 2), [[LOOP]] ]
; IS__CGSCC_NPM-NEXT: [[I:%.*]] = phi i8 [ 0, [[ENTRY]] ], [ [[O:%.*]], [[LOOP]] ]
; IS__CGSCC_NPM-NEXT: store i8 1, i8* [[P]], align 2
; IS__CGSCC_NPM-NEXT: [[O]] = add nsw i8 [[I]], 1
; IS__CGSCC_NPM-NEXT: [[C:%.*]] = icmp eq i8 [[O]], 7
; IS__CGSCC_NPM-NEXT: br i1 [[C]], label [[END:%.*]], label [[LOOP]]
; IS__CGSCC_NPM: end:
; IS__CGSCC_NPM-NEXT: [[L21:%.*]] = load i8, i8* getelementptr (i8, i8* bitcast (i32* @a2 to i8*), i64 2), align 2
; IS__CGSCC_NPM-NEXT: [[ADD:%.*]] = add i8 [[L21]], 0
; IS__CGSCC_NPM-NEXT: ret i8 [[ADD]]
; ;
entry: entry:
%b = bitcast i32* @a2 to i8* %b = bitcast i32* @a2 to i8*
br label %loop br label %loop
loop: loop:
%p = phi i8* [%b, %entry], [%g, %loop] %p = phi i8* [%b, %entry], [%g, %loop]
%i = phi i8 [0, %entry], [%o, %loop] %i = phi i8 [0, %entry], [%o, %loop]
store i8 1, i8* %p store i8 1, i8* %p
%g = getelementptr i8, i8* %b, i64 2 %g = getelementptr i8, i8* %b, i64 2
%o = add nsw i8 %i, 1 %o = add nsw i8 %i, 1
%c = icmp eq i8 %o, 7 %c = icmp eq i8 %o, 7
br i1 %c, label %end, label %loop br i1 %c, label %end, label %loop
end: end:
%s21 = getelementptr i8, i8* %b, i64 2 %s21 = getelementptr i8, i8* %b, i64 2
%l21 = load i8, i8* %s21 %l21 = load i8, i8* %s21
%s22 = getelementptr i8, i8* %b, i64 3 %s22 = getelementptr i8, i8* %b, i64 3
%l22 = load i8, i8* %s22 %l22 = load i8, i8* %s22
%add = add i8 %l21, %l22 %add = add i8 %l21, %l22
ret i8 %add ret i8 %add
} }
define i8 @phi_no_store_3() { define i8 @phi_no_store_3() {
; IS__TUNIT_OPM: Function Attrs: nofree nosync nounwind writeonly ; IS__TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind writeonly
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@phi_no_store_3 ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@phi_no_store_3
; IS__TUNIT_OPM-SAME: () #[[ATTR6]] { ; IS__TUNIT_OPM-SAME: () #[[ATTR6]] {
; IS__TUNIT_OPM-NEXT: entry: ; IS__TUNIT_OPM-NEXT: entry:
; IS__TUNIT_OPM-NEXT: br label [[LOOP:%.*]] ; IS__TUNIT_OPM-NEXT: br label [[LOOP:%.*]]
; IS__TUNIT_OPM: loop: ; IS__TUNIT_OPM: loop:
; IS__TUNIT_OPM-NEXT: [[P:%.*]] = phi i8* [ bitcast (i32* @a3 to i8*), [[ENTRY:%.*]] ], [ getelementptr (i8, i8* bitcast (i32* @a3 to i8*), i64 2), [[LOOP]] ] ; IS__TUNIT_OPM-NEXT: [[P:%.*]] = phi i8* [ bitcast (i32* @a3 to i8*), [[ENTRY:%.*]] ], [ getelementptr (i8, i8* bitcast (i32* @a3 to i8*), i64 2), [[LOOP]] ]
; IS__TUNIT_OPM-NEXT: [[I:%.*]] = phi i8 [ 0, [[ENTRY]] ], [ [[O:%.*]], [[LOOP]] ] ; IS__TUNIT_OPM-NEXT: [[I:%.*]] = phi i8 [ 0, [[ENTRY]] ], [ [[O:%.*]], [[LOOP]] ]
; IS__TUNIT_OPM-NEXT: [[O]] = add nsw i8 [[I]], 1 ; IS__TUNIT_OPM-NEXT: [[O]] = add nsw i8 [[I]], 1
; IS__TUNIT_OPM-NEXT: [[C:%.*]] = icmp eq i8 [[O]], 7 ; IS__TUNIT_OPM-NEXT: [[C:%.*]] = icmp eq i8 [[O]], 7
; IS__TUNIT_OPM-NEXT: br i1 [[C]], label [[END:%.*]], label [[LOOP]] ; IS__TUNIT_OPM-NEXT: br i1 [[C]], label [[END:%.*]], label [[LOOP]]
; IS__TUNIT_OPM: end: ; IS__TUNIT_OPM: end:
; IS__TUNIT_OPM-NEXT: ret i8 1 ; IS__TUNIT_OPM-NEXT: ret i8 1
; ;
; IS__TUNIT_NPM: Function Attrs: nofree nosync nounwind willreturn writeonly ; IS________NPM: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@phi_no_store_3 ; IS________NPM-LABEL: define {{[^@]+}}@phi_no_store_3
; IS__TUNIT_NPM-SAME: () #[[ATTR4]] { ; IS________NPM-SAME: () #[[ATTR4]] {
; IS__TUNIT_NPM-NEXT: entry: ; IS________NPM-NEXT: entry:
; IS__TUNIT_NPM-NEXT: br label [[LOOP:%.*]] ; IS________NPM-NEXT: br label [[LOOP:%.*]]
; IS__TUNIT_NPM: loop: ; IS________NPM: loop:
; IS__TUNIT_NPM-NEXT: [[P:%.*]] = phi i8* [ bitcast (i32* @a3 to i8*), [[ENTRY:%.*]] ], [ getelementptr (i8, i8* bitcast (i32* @a3 to i8*), i64 2), [[LOOP]] ] ; IS________NPM-NEXT: [[P:%.*]] = phi i8* [ bitcast (i32* @a3 to i8*), [[ENTRY:%.*]] ], [ getelementptr (i8, i8* bitcast (i32* @a3 to i8*), i64 2), [[LOOP]] ]
; IS__TUNIT_NPM-NEXT: [[I:%.*]] = phi i8 [ 0, [[ENTRY]] ], [ [[O:%.*]], [[LOOP]] ] ; IS________NPM-NEXT: [[I:%.*]] = phi i8 [ 0, [[ENTRY]] ], [ [[O:%.*]], [[LOOP]] ]
; IS__TUNIT_NPM-NEXT: [[O]] = add nsw i8 [[I]], 1 ; IS________NPM-NEXT: [[O]] = add nsw i8 [[I]], 1
; IS__TUNIT_NPM-NEXT: [[C:%.*]] = icmp eq i8 [[O]], 7 ; IS________NPM-NEXT: [[C:%.*]] = icmp eq i8 [[O]], 7
; IS__TUNIT_NPM-NEXT: br i1 [[C]], label [[END:%.*]], label [[LOOP]] ; IS________NPM-NEXT: br i1 [[C]], label [[END:%.*]], label [[LOOP]]
; IS__TUNIT_NPM: end: ; IS________NPM: end:
; IS__TUNIT_NPM-NEXT: ret i8 1 ; IS________NPM-NEXT: ret i8 1
; ;
; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind writeonly ; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind writeonly
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@phi_no_store_3 ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@phi_no_store_3
; IS__CGSCC_OPM-SAME: () #[[ATTR10:[0-9]+]] { ; IS__CGSCC_OPM-SAME: () #[[ATTR10:[0-9]+]] {
; IS__CGSCC_OPM-NEXT: entry: ; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: br label [[LOOP:%.*]] ; IS__CGSCC_OPM-NEXT: br label [[LOOP:%.*]]
; IS__CGSCC_OPM: loop: ; IS__CGSCC_OPM: loop:
; IS__CGSCC_OPM-NEXT: [[P:%.*]] = phi i8* [ bitcast (i32* @a3 to i8*), [[ENTRY:%.*]] ], [ getelementptr (i8, i8* bitcast (i32* @a3 to i8*), i64 2), [[LOOP]] ] ; IS__CGSCC_OPM-NEXT: [[P:%.*]] = phi i8* [ bitcast (i32* @a3 to i8*), [[ENTRY:%.*]] ], [ getelementptr (i8, i8* bitcast (i32* @a3 to i8*), i64 2), [[LOOP]] ]
; IS__CGSCC_OPM-NEXT: [[I:%.*]] = phi i8 [ 0, [[ENTRY]] ], [ [[O:%.*]], [[LOOP]] ] ; IS__CGSCC_OPM-NEXT: [[I:%.*]] = phi i8 [ 0, [[ENTRY]] ], [ [[O:%.*]], [[LOOP]] ]
; IS__CGSCC_OPM-NEXT: [[O]] = add nsw i8 [[I]], 1 ; IS__CGSCC_OPM-NEXT: [[O]] = add nsw i8 [[I]], 1
; IS__CGSCC_OPM-NEXT: [[C:%.*]] = icmp eq i8 [[O]], 7 ; IS__CGSCC_OPM-NEXT: [[C:%.*]] = icmp eq i8 [[O]], 7
; IS__CGSCC_OPM-NEXT: br i1 [[C]], label [[END:%.*]], label [[LOOP]] ; IS__CGSCC_OPM-NEXT: br i1 [[C]], label [[END:%.*]], label [[LOOP]]
; IS__CGSCC_OPM: end: ; IS__CGSCC_OPM: end:
; IS__CGSCC_OPM-NEXT: ret i8 1 ; IS__CGSCC_OPM-NEXT: ret i8 1
; ;
; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@phi_no_store_3
; IS__CGSCC_NPM-SAME: () #[[ATTR4]] {
; IS__CGSCC_NPM-NEXT: entry:
; IS__CGSCC_NPM-NEXT: br label [[LOOP:%.*]]
; IS__CGSCC_NPM: loop:
; IS__CGSCC_NPM-NEXT: [[P:%.*]] = phi i8* [ bitcast (i32* @a3 to i8*), [[ENTRY:%.*]] ], [ getelementptr (i8, i8* bitcast (i32* @a3 to i8*), i64 2), [[LOOP]] ]
; IS__CGSCC_NPM-NEXT: [[I:%.*]] = phi i8 [ 0, [[ENTRY]] ], [ [[O:%.*]], [[LOOP]] ]
; IS__CGSCC_NPM-NEXT: [[O]] = add nsw i8 [[I]], 1
; IS__CGSCC_NPM-NEXT: [[C:%.*]] = icmp eq i8 [[O]], 7
; IS__CGSCC_NPM-NEXT: br i1 [[C]], label [[END:%.*]], label [[LOOP]]
; IS__CGSCC_NPM: end:
; IS__CGSCC_NPM-NEXT: ret i8 1
;
entry: entry:
%b = bitcast i32* @a3 to i8* %b = bitcast i32* @a3 to i8*
%s30 = getelementptr i8, i8* %b, i64 3 %s30 = getelementptr i8, i8* %b, i64 3
store i8 0, i8* %s30 store i8 0, i8* %s30
br label %loop br label %loop
loop: loop:
%p = phi i8* [%b, %entry], [%g, %loop] %p = phi i8* [%b, %entry], [%g, %loop]
%i = phi i8 [0, %entry], [%o, %loop] %i = phi i8 [0, %entry], [%o, %loop]
store i8 1, i8* %p store i8 1, i8* %p
%g = getelementptr i8, i8* %b, i64 2 %g = getelementptr i8, i8* %b, i64 2
%o = add nsw i8 %i, 1 %o = add nsw i8 %i, 1
%c = icmp eq i8 %o, 7 %c = icmp eq i8 %o, 7
br i1 %c, label %end, label %loop br i1 %c, label %end, label %loop
end: end:
%s31 = getelementptr i8, i8* %b, i64 2 %s31 = getelementptr i8, i8* %b, i64 2
%l31 = load i8, i8* %s31 %l31 = load i8, i8* %s31
%s32 = getelementptr i8, i8* %b, i64 3 %s32 = getelementptr i8, i8* %b, i64 3
%l32 = load i8, i8* %s32 %l32 = load i8, i8* %s32
%add = add i8 %l31, %l32 %add = add i8 %l31, %l32
ret i8 %add ret i8 %add
} }
define i8 @cast_and_load_1() { define i8 @cast_and_load_1() {
; IS__TUNIT_OPM: Function Attrs: nofree nosync nounwind willreturn ; IS__TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind willreturn
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@cast_and_load_1 ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@cast_and_load_1
; IS__TUNIT_OPM-SAME: () #[[ATTR4]] { ; IS__TUNIT_OPM-SAME: () #[[ATTR7]] {
; IS__TUNIT_OPM-NEXT: store i32 42, i32* @bytes1, align 4 ; IS__TUNIT_OPM-NEXT: store i32 42, i32* @bytes1, align 4
; IS__TUNIT_OPM-NEXT: [[L:%.*]] = load i8, i8* bitcast (i32* @bytes1 to i8*), align 4 ; IS__TUNIT_OPM-NEXT: [[L:%.*]] = load i8, i8* bitcast (i32* @bytes1 to i8*), align 4
; IS__TUNIT_OPM-NEXT: ret i8 [[L]] ; IS__TUNIT_OPM-NEXT: ret i8 [[L]]
; ;
; IS__TUNIT_NPM: Function Attrs: nofree nosync nounwind willreturn ; NOT_TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@cast_and_load_1 ; NOT_TUNIT_OPM-LABEL: define {{[^@]+}}@cast_and_load_1
; IS__TUNIT_NPM-SAME: () #[[ATTR2]] { ; NOT_TUNIT_OPM-SAME: () #[[ATTR5]] {
; IS__TUNIT_NPM-NEXT: store i32 42, i32* @bytes1, align 4 ; NOT_TUNIT_OPM-NEXT: store i32 42, i32* @bytes1, align 4
; IS__TUNIT_NPM-NEXT: [[L:%.*]] = load i8, i8* bitcast (i32* @bytes1 to i8*), align 4 ; NOT_TUNIT_OPM-NEXT: [[L:%.*]] = load i8, i8* bitcast (i32* @bytes1 to i8*), align 4
; IS__TUNIT_NPM-NEXT: ret i8 [[L]] ; NOT_TUNIT_OPM-NEXT: ret i8 [[L]]
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@cast_and_load_1
; IS__CGSCC____-SAME: () #[[ATTR5]] {
; IS__CGSCC____-NEXT: store i32 42, i32* @bytes1, align 4
; IS__CGSCC____-NEXT: [[L:%.*]] = load i8, i8* bitcast (i32* @bytes1 to i8*), align 4
; IS__CGSCC____-NEXT: ret i8 [[L]]
; ;
store i32 42, i32* @bytes1 store i32 42, i32* @bytes1
%bc = bitcast i32* @bytes1 to i8* %bc = bitcast i32* @bytes1 to i8*
%l = load i8, i8* %bc %l = load i8, i8* %bc
ret i8 %l ret i8 %l
} }
define i64 @cast_and_load_2() { define i64 @cast_and_load_2() {
; IS__TUNIT_OPM: Function Attrs: nofree nosync nounwind willreturn ; IS__TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind willreturn
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@cast_and_load_2 ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@cast_and_load_2
; IS__TUNIT_OPM-SAME: () #[[ATTR4]] { ; IS__TUNIT_OPM-SAME: () #[[ATTR7]] {
; IS__TUNIT_OPM-NEXT: store i32 42, i32* @bytes2, align 4 ; IS__TUNIT_OPM-NEXT: store i32 42, i32* @bytes2, align 4
; IS__TUNIT_OPM-NEXT: [[L:%.*]] = load i64, i64* bitcast (i32* @bytes2 to i64*), align 4 ; IS__TUNIT_OPM-NEXT: [[L:%.*]] = load i64, i64* bitcast (i32* @bytes2 to i64*), align 4
; IS__TUNIT_OPM-NEXT: ret i64 [[L]] ; IS__TUNIT_OPM-NEXT: ret i64 [[L]]
; ;
; IS__TUNIT_NPM: Function Attrs: nofree nosync nounwind willreturn ; NOT_TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@cast_and_load_2 ; NOT_TUNIT_OPM-LABEL: define {{[^@]+}}@cast_and_load_2
; IS__TUNIT_NPM-SAME: () #[[ATTR2]] { ; NOT_TUNIT_OPM-SAME: () #[[ATTR5]] {
; IS__TUNIT_NPM-NEXT: store i32 42, i32* @bytes2, align 4 ; NOT_TUNIT_OPM-NEXT: store i32 42, i32* @bytes2, align 4
; IS__TUNIT_NPM-NEXT: [[L:%.*]] = load i64, i64* bitcast (i32* @bytes2 to i64*), align 4 ; NOT_TUNIT_OPM-NEXT: [[L:%.*]] = load i64, i64* bitcast (i32* @bytes2 to i64*), align 4
; IS__TUNIT_NPM-NEXT: ret i64 [[L]] ; NOT_TUNIT_OPM-NEXT: ret i64 [[L]]
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@cast_and_load_2
; IS__CGSCC____-SAME: () #[[ATTR5]] {
; IS__CGSCC____-NEXT: store i32 42, i32* @bytes2, align 4
; IS__CGSCC____-NEXT: [[L:%.*]] = load i64, i64* bitcast (i32* @bytes2 to i64*), align 4
; IS__CGSCC____-NEXT: ret i64 [[L]]
; ;
store i32 42, i32* @bytes2 store i32 42, i32* @bytes2
%bc = bitcast i32* @bytes2 to i64* %bc = bitcast i32* @bytes2 to i64*
%l = load i64, i64* %bc %l = load i64, i64* %bc
ret i64 %l ret i64 %l
} }
define void @recursive_load_store(i64 %N, i32 %v) { define void @recursive_load_store(i64 %N, i32 %v) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind writeonly ; IS__TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind writeonly
; IS__TUNIT____-LABEL: define {{[^@]+}}@recursive_load_store ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@recursive_load_store
; IS__TUNIT____-SAME: (i64 [[N:%.*]], i32 [[V:%.*]]) #[[ATTR6:[0-9]+]] { ; IS__TUNIT_OPM-SAME: (i64 [[N:%.*]], i32 [[V:%.*]]) #[[ATTR6]] {
; IS__TUNIT____-NEXT: entry: ; IS__TUNIT_OPM-NEXT: entry:
; IS__TUNIT____-NEXT: br label [[FOR_COND:%.*]] ; IS__TUNIT_OPM-NEXT: br label [[FOR_COND:%.*]]
; IS__TUNIT____: for.cond: ; IS__TUNIT_OPM: for.cond:
; IS__TUNIT____-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY:%.*]] ], [ 0, [[ENTRY:%.*]] ] ; IS__TUNIT_OPM-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY:%.*]] ], [ 0, [[ENTRY:%.*]] ]
; IS__TUNIT____-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV]], [[N]] ; IS__TUNIT_OPM-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV]], [[N]]
; IS__TUNIT____-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY]], label [[FOR_END:%.*]] ; IS__TUNIT_OPM-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY]], label [[FOR_END:%.*]]
; IS__TUNIT____: for.body: ; IS__TUNIT_OPM: for.body:
; IS__TUNIT____-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1 ; IS__TUNIT_OPM-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
; IS__TUNIT____-NEXT: br label [[FOR_COND]] ; IS__TUNIT_OPM-NEXT: br label [[FOR_COND]]
; IS__TUNIT____: for.end: ; IS__TUNIT_OPM: for.end:
; IS__TUNIT____-NEXT: ret void ; IS__TUNIT_OPM-NEXT: ret void
;
; IS________NPM: Function Attrs: nofree norecurse nosync nounwind writeonly
; IS________NPM-LABEL: define {{[^@]+}}@recursive_load_store
; IS________NPM-SAME: (i64 [[N:%.*]], i32 [[V:%.*]]) #[[ATTR8:[0-9]+]] {
; IS________NPM-NEXT: entry:
; IS________NPM-NEXT: br label [[FOR_COND:%.*]]
; IS________NPM: for.cond:
; IS________NPM-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY:%.*]] ], [ 0, [[ENTRY:%.*]] ]
; IS________NPM-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV]], [[N]]
; IS________NPM-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY]], label [[FOR_END:%.*]]
; IS________NPM: for.body:
; IS________NPM-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
; IS________NPM-NEXT: br label [[FOR_COND]]
; IS________NPM: for.end:
; IS________NPM-NEXT: ret void
; ;
; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind writeonly ; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind writeonly
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@recursive_load_store ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@recursive_load_store
; IS__CGSCC_OPM-SAME: (i64 [[N:%.*]], i32 [[V:%.*]]) #[[ATTR10]] { ; IS__CGSCC_OPM-SAME: (i64 [[N:%.*]], i32 [[V:%.*]]) #[[ATTR10]] {
; IS__CGSCC_OPM-NEXT: entry: ; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: br label [[FOR_COND:%.*]] ; IS__CGSCC_OPM-NEXT: br label [[FOR_COND:%.*]]
; IS__CGSCC_OPM: for.cond: ; IS__CGSCC_OPM: for.cond:
; IS__CGSCC_OPM-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY:%.*]] ], [ 0, [[ENTRY:%.*]] ] ; IS__CGSCC_OPM-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY:%.*]] ], [ 0, [[ENTRY:%.*]] ]
; IS__CGSCC_OPM-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV]], [[N]] ; IS__CGSCC_OPM-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV]], [[N]]
; IS__CGSCC_OPM-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY]], label [[FOR_END:%.*]] ; IS__CGSCC_OPM-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY]], label [[FOR_END:%.*]]
; IS__CGSCC_OPM: for.body: ; IS__CGSCC_OPM: for.body:
; IS__CGSCC_OPM-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1 ; IS__CGSCC_OPM-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
; IS__CGSCC_OPM-NEXT: br label [[FOR_COND]] ; IS__CGSCC_OPM-NEXT: br label [[FOR_COND]]
; IS__CGSCC_OPM: for.end: ; IS__CGSCC_OPM: for.end:
; IS__CGSCC_OPM-NEXT: ret void ; IS__CGSCC_OPM-NEXT: ret void
; ;
; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind writeonly
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@recursive_load_store
; IS__CGSCC_NPM-SAME: (i64 [[N:%.*]], i32 [[V:%.*]]) #[[ATTR8:[0-9]+]] {
; IS__CGSCC_NPM-NEXT: entry:
; IS__CGSCC_NPM-NEXT: br label [[FOR_COND:%.*]]
; IS__CGSCC_NPM: for.cond:
; IS__CGSCC_NPM-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY:%.*]] ], [ 0, [[ENTRY:%.*]] ]
; IS__CGSCC_NPM-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV]], [[N]]
; IS__CGSCC_NPM-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY]], label [[FOR_END:%.*]]
; IS__CGSCC_NPM: for.body:
; IS__CGSCC_NPM-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
; IS__CGSCC_NPM-NEXT: br label [[FOR_COND]]
; IS__CGSCC_NPM: for.end:
; IS__CGSCC_NPM-NEXT: ret void
;
entry: entry:
store i32 %v, i32* @rec_storage store i32 %v, i32* @rec_storage
br label %for.cond br label %for.cond
for.cond: for.cond:
%indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ] %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ]
%exitcond = icmp ne i64 %indvars.iv, %N %exitcond = icmp ne i64 %indvars.iv, %N
br i1 %exitcond, label %for.body, label %for.end br i1 %exitcond, label %for.body, label %for.end
Show All 9 Linesfor.end:
store i32 %lr, i32* @rec_storage store i32 %lr, i32* @rec_storage
ret void ret void
} }
define dso_local i32 @round_trip_malloc(i32 %x) { define dso_local i32 @round_trip_malloc(i32 %x) {
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@round_trip_malloc ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@round_trip_malloc
; IS__TUNIT_OPM-SAME: (i32 [[X:%.*]]) { ; IS__TUNIT_OPM-SAME: (i32 [[X:%.*]]) {
; IS__TUNIT_OPM-NEXT: entry: ; IS__TUNIT_OPM-NEXT: entry:
; IS__TUNIT_OPM-NEXT: [[CALL:%.*]] = call noalias i8* @malloc(i64 noundef 4) #[[ATTR12:[0-9]+]] ; IS__TUNIT_OPM-NEXT: [[CALL:%.*]] = call noalias i8* @malloc(i64 noundef 4) #[[ATTR17:[0-9]+]]
; IS__TUNIT_OPM-NEXT: [[TMP0:%.*]] = bitcast i8* [[CALL]] to i32* ; IS__TUNIT_OPM-NEXT: [[TMP0:%.*]] = bitcast i8* [[CALL]] to i32*
; IS__TUNIT_OPM-NEXT: store i32 [[X]], i32* [[TMP0]], align 4 ; IS__TUNIT_OPM-NEXT: store i32 [[X]], i32* [[TMP0]], align 4
; IS__TUNIT_OPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 ; IS__TUNIT_OPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
; IS__TUNIT_OPM-NEXT: [[TMP2:%.*]] = bitcast i32* [[TMP0]] to i8* ; IS__TUNIT_OPM-NEXT: [[TMP2:%.*]] = bitcast i32* [[TMP0]] to i8*
; IS__TUNIT_OPM-NEXT: call void @free(i8* noundef [[TMP2]]) #[[ATTR12]] ; IS__TUNIT_OPM-NEXT: call void @free(i8* noundef [[TMP2]]) #[[ATTR17]]
; IS__TUNIT_OPM-NEXT: ret i32 [[TMP1]] ; IS__TUNIT_OPM-NEXT: ret i32 [[TMP1]]
; ;
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@round_trip_malloc ; IS________NPM-LABEL: define {{[^@]+}}@round_trip_malloc
; IS__TUNIT_NPM-SAME: (i32 [[X:%.*]]) { ; IS________NPM-SAME: (i32 [[X:%.*]]) {
; IS__TUNIT_NPM-NEXT: entry: ; IS________NPM-NEXT: entry:
; IS__TUNIT_NPM-NEXT: [[TMP0:%.*]] = alloca i8, i64 4, align 1 ; IS________NPM-NEXT: [[TMP0:%.*]] = alloca i8, i64 4, align 1
; IS__TUNIT_NPM-NEXT: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i32* ; IS________NPM-NEXT: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i32*
; IS__TUNIT_NPM-NEXT: store i32 [[X]], i32* [[TMP1]], align 4 ; IS________NPM-NEXT: store i32 [[X]], i32* [[TMP1]], align 4
; IS__TUNIT_NPM-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 ; IS________NPM-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
; IS__TUNIT_NPM-NEXT: ret i32 [[TMP2]] ; IS________NPM-NEXT: ret i32 [[TMP2]]
; ;
; IS__CGSCC_OPM: Function Attrs: norecurse
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@round_trip_malloc ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@round_trip_malloc
; IS__CGSCC_OPM-SAME: (i32 [[X:%.*]]) #[[ATTR11:[0-9]+]] { ; IS__CGSCC_OPM-SAME: (i32 [[X:%.*]]) {
; IS__CGSCC_OPM-NEXT: entry: ; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: [[CALL:%.*]] = call noalias i8* @malloc(i64 noundef 4) #[[ATTR11]] ; IS__CGSCC_OPM-NEXT: [[CALL:%.*]] = call noalias i8* @malloc(i64 noundef 4) #[[ATTR11:[0-9]+]]
; IS__CGSCC_OPM-NEXT: [[TMP0:%.*]] = bitcast i8* [[CALL]] to i32* ; IS__CGSCC_OPM-NEXT: [[TMP0:%.*]] = bitcast i8* [[CALL]] to i32*
; IS__CGSCC_OPM-NEXT: store i32 [[X]], i32* [[TMP0]], align 4 ; IS__CGSCC_OPM-NEXT: store i32 [[X]], i32* [[TMP0]], align 4
; IS__CGSCC_OPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 ; IS__CGSCC_OPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
; IS__CGSCC_OPM-NEXT: [[TMP2:%.*]] = bitcast i32* [[TMP0]] to i8* ; IS__CGSCC_OPM-NEXT: [[TMP2:%.*]] = bitcast i32* [[TMP0]] to i8*
; IS__CGSCC_OPM-NEXT: call void @free(i8* noundef [[TMP2]]) #[[ATTR11]] ; IS__CGSCC_OPM-NEXT: call void @free(i8* noundef [[TMP2]]) #[[ATTR11]]
; IS__CGSCC_OPM-NEXT: ret i32 [[TMP1]] ; IS__CGSCC_OPM-NEXT: ret i32 [[TMP1]]
; ;
; IS__CGSCC_NPM: Function Attrs: norecurse
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@round_trip_malloc
; IS__CGSCC_NPM-SAME: (i32 returned [[X:%.*]]) #[[ATTR9:[0-9]+]] {
; IS__CGSCC_NPM-NEXT: entry:
; IS__CGSCC_NPM-NEXT: [[TMP0:%.*]] = alloca i8, i64 4, align 1
; IS__CGSCC_NPM-NEXT: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i32*
; IS__CGSCC_NPM-NEXT: store i32 [[X]], i32* [[TMP1]], align 4
; IS__CGSCC_NPM-NEXT: ret i32 [[X]]
;
entry: entry:
%call = call noalias i8* @malloc(i64 4) norecurse %call = call noalias i8* @malloc(i64 4) norecurse
%0 = bitcast i8* %call to i32* %0 = bitcast i8* %call to i32*
store i32 %x, i32* %0, align 4 store i32 %x, i32* %0, align 4
%1 = load i32, i32* %0, align 4 %1 = load i32, i32* %0, align 4
%2 = bitcast i32* %0 to i8* %2 = bitcast i32* %0 to i8*
call void @free(i8* %2) norecurse call void @free(i8* %2) norecurse
ret i32 %1 ret i32 %1
} }
define dso_local i32 @round_trip_malloc_constant() { define dso_local i32 @round_trip_malloc_constant() {
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@round_trip_malloc_constant() { ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@round_trip_malloc_constant() {
; IS__TUNIT_OPM-NEXT: entry: ; IS__TUNIT_OPM-NEXT: entry:
; IS__TUNIT_OPM-NEXT: [[CALL:%.*]] = call noalias i8* @malloc(i64 noundef 4) #[[ATTR12]] ; IS__TUNIT_OPM-NEXT: [[CALL:%.*]] = call noalias i8* @malloc(i64 noundef 4) #[[ATTR17]]
; IS__TUNIT_OPM-NEXT: [[TMP0:%.*]] = bitcast i8* [[CALL]] to i32* ; IS__TUNIT_OPM-NEXT: [[TMP0:%.*]] = bitcast i8* [[CALL]] to i32*
; IS__TUNIT_OPM-NEXT: store i32 7, i32* [[TMP0]], align 4 ; IS__TUNIT_OPM-NEXT: store i32 7, i32* [[TMP0]], align 4
; IS__TUNIT_OPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 ; IS__TUNIT_OPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
; IS__TUNIT_OPM-NEXT: [[TMP2:%.*]] = bitcast i32* [[TMP0]] to i8* ; IS__TUNIT_OPM-NEXT: [[TMP2:%.*]] = bitcast i32* [[TMP0]] to i8*
; IS__TUNIT_OPM-NEXT: call void @free(i8* noundef [[TMP2]]) #[[ATTR12]] ; IS__TUNIT_OPM-NEXT: call void @free(i8* noundef [[TMP2]]) #[[ATTR17]]
; IS__TUNIT_OPM-NEXT: ret i32 [[TMP1]] ; IS__TUNIT_OPM-NEXT: ret i32 [[TMP1]]
; ;
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@round_trip_malloc_constant() { ; IS________NPM-LABEL: define {{[^@]+}}@round_trip_malloc_constant() {
; IS__TUNIT_NPM-NEXT: entry: ; IS________NPM-NEXT: entry:
; IS__TUNIT_NPM-NEXT: ret i32 7 ; IS________NPM-NEXT: ret i32 7
; ;
; IS__CGSCC_OPM: Function Attrs: norecurse ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@round_trip_malloc_constant() {
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@round_trip_malloc_constant
; IS__CGSCC_OPM-SAME: () #[[ATTR11]] {
; IS__CGSCC_OPM-NEXT: entry: ; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: [[CALL:%.*]] = call noalias i8* @malloc(i64 noundef 4) #[[ATTR11]] ; IS__CGSCC_OPM-NEXT: [[CALL:%.*]] = call noalias i8* @malloc(i64 noundef 4) #[[ATTR11]]
; IS__CGSCC_OPM-NEXT: [[TMP0:%.*]] = bitcast i8* [[CALL]] to i32* ; IS__CGSCC_OPM-NEXT: [[TMP0:%.*]] = bitcast i8* [[CALL]] to i32*
; IS__CGSCC_OPM-NEXT: store i32 7, i32* [[TMP0]], align 4 ; IS__CGSCC_OPM-NEXT: store i32 7, i32* [[TMP0]], align 4
; IS__CGSCC_OPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 ; IS__CGSCC_OPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
; IS__CGSCC_OPM-NEXT: [[TMP2:%.*]] = bitcast i32* [[TMP0]] to i8* ; IS__CGSCC_OPM-NEXT: [[TMP2:%.*]] = bitcast i32* [[TMP0]] to i8*
; IS__CGSCC_OPM-NEXT: call void @free(i8* noundef [[TMP2]]) #[[ATTR11]] ; IS__CGSCC_OPM-NEXT: call void @free(i8* noundef [[TMP2]]) #[[ATTR11]]
; IS__CGSCC_OPM-NEXT: ret i32 [[TMP1]] ; IS__CGSCC_OPM-NEXT: ret i32 [[TMP1]]
; ;
; IS__CGSCC_NPM: Function Attrs: norecurse
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@round_trip_malloc_constant
; IS__CGSCC_NPM-SAME: () #[[ATTR9]] {
; IS__CGSCC_NPM-NEXT: entry:
; IS__CGSCC_NPM-NEXT: ret i32 7
;
entry: entry:
%call = call noalias i8* @malloc(i64 4) norecurse %call = call noalias i8* @malloc(i64 4) norecurse
%0 = bitcast i8* %call to i32* %0 = bitcast i8* %call to i32*
store i32 7, i32* %0, align 4 store i32 7, i32* %0, align 4
%1 = load i32, i32* %0, align 4 %1 = load i32, i32* %0, align 4
%2 = bitcast i32* %0 to i8* %2 = bitcast i32* %0 to i8*
call void @free(i8* %2) norecurse call void @free(i8* %2) norecurse
ret i32 %1 ret i32 %1
} }
declare noalias i8* @malloc(i64) declare noalias i8* @malloc(i64)
declare void @free(i8*) declare void @free(i8*)
define dso_local i32 @conditional_malloc(i32 %x) { define dso_local i32 @conditional_malloc(i32 %x) {
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@conditional_malloc ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@conditional_malloc
; IS__TUNIT_OPM-SAME: (i32 [[X:%.*]]) { ; IS__TUNIT_OPM-SAME: (i32 [[X:%.*]]) {
; IS__TUNIT_OPM-NEXT: entry: ; IS__TUNIT_OPM-NEXT: entry:
; IS__TUNIT_OPM-NEXT: [[CALL:%.*]] = call noalias i8* @malloc(i64 noundef 4) #[[ATTR12]] ; IS__TUNIT_OPM-NEXT: [[CALL:%.*]] = call noalias i8* @malloc(i64 noundef 4) #[[ATTR17]]
; IS__TUNIT_OPM-NEXT: [[TMP0:%.*]] = bitcast i8* [[CALL]] to i32* ; IS__TUNIT_OPM-NEXT: [[TMP0:%.*]] = bitcast i8* [[CALL]] to i32*
; IS__TUNIT_OPM-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[X]], 0 ; IS__TUNIT_OPM-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[X]], 0
; IS__TUNIT_OPM-NEXT: br i1 [[TOBOOL]], label [[IF_THEN:%.*]], label [[IF_END:%.*]] ; IS__TUNIT_OPM-NEXT: br i1 [[TOBOOL]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
; IS__TUNIT_OPM: if.then: ; IS__TUNIT_OPM: if.then:
; IS__TUNIT_OPM-NEXT: store i32 [[X]], i32* [[TMP0]], align 4 ; IS__TUNIT_OPM-NEXT: store i32 [[X]], i32* [[TMP0]], align 4
; IS__TUNIT_OPM-NEXT: br label [[IF_END]] ; IS__TUNIT_OPM-NEXT: br label [[IF_END]]
; IS__TUNIT_OPM: if.end: ; IS__TUNIT_OPM: if.end:
; IS__TUNIT_OPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 ; IS__TUNIT_OPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
; IS__TUNIT_OPM-NEXT: ret i32 [[TMP1]] ; IS__TUNIT_OPM-NEXT: ret i32 [[TMP1]]
; ;
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@conditional_malloc ; IS________NPM-LABEL: define {{[^@]+}}@conditional_malloc
; IS__TUNIT_NPM-SAME: (i32 [[X:%.*]]) { ; IS________NPM-SAME: (i32 [[X:%.*]]) {
; IS__TUNIT_NPM-NEXT: entry: ; IS________NPM-NEXT: entry:
; IS__TUNIT_NPM-NEXT: [[TMP0:%.*]] = alloca i8, i64 4, align 1 ; IS________NPM-NEXT: [[TMP0:%.*]] = alloca i8, i64 4, align 1
; IS__TUNIT_NPM-NEXT: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i32* ; IS________NPM-NEXT: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i32*
; IS__TUNIT_NPM-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[X]], 0 ; IS________NPM-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[X]], 0
; IS__TUNIT_NPM-NEXT: br i1 [[TOBOOL]], label [[IF_THEN:%.*]], label [[IF_END:%.*]] ; IS________NPM-NEXT: br i1 [[TOBOOL]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
; IS__TUNIT_NPM: if.then: ; IS________NPM: if.then:
; IS__TUNIT_NPM-NEXT: store i32 [[X]], i32* [[TMP1]], align 4 ; IS________NPM-NEXT: store i32 [[X]], i32* [[TMP1]], align 4
; IS__TUNIT_NPM-NEXT: br label [[IF_END]] ; IS________NPM-NEXT: br label [[IF_END]]
; IS__TUNIT_NPM: if.end: ; IS________NPM: if.end:
; IS__TUNIT_NPM-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 ; IS________NPM-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
; IS__TUNIT_NPM-NEXT: ret i32 [[TMP2]] ; IS________NPM-NEXT: ret i32 [[TMP2]]
; ;
; IS__CGSCC_OPM: Function Attrs: norecurse
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@conditional_malloc ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@conditional_malloc
; IS__CGSCC_OPM-SAME: (i32 [[X:%.*]]) #[[ATTR11]] { ; IS__CGSCC_OPM-SAME: (i32 [[X:%.*]]) {
; IS__CGSCC_OPM-NEXT: entry: ; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: [[CALL:%.*]] = call noalias i8* @malloc(i64 noundef 4) #[[ATTR11]] ; IS__CGSCC_OPM-NEXT: [[CALL:%.*]] = call noalias i8* @malloc(i64 noundef 4) #[[ATTR11]]
; IS__CGSCC_OPM-NEXT: [[TMP0:%.*]] = bitcast i8* [[CALL]] to i32* ; IS__CGSCC_OPM-NEXT: [[TMP0:%.*]] = bitcast i8* [[CALL]] to i32*
; IS__CGSCC_OPM-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[X]], 0 ; IS__CGSCC_OPM-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[X]], 0
; IS__CGSCC_OPM-NEXT: br i1 [[TOBOOL]], label [[IF_THEN:%.*]], label [[IF_END:%.*]] ; IS__CGSCC_OPM-NEXT: br i1 [[TOBOOL]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
; IS__CGSCC_OPM: if.then: ; IS__CGSCC_OPM: if.then:
; IS__CGSCC_OPM-NEXT: store i32 [[X]], i32* [[TMP0]], align 4 ; IS__CGSCC_OPM-NEXT: store i32 [[X]], i32* [[TMP0]], align 4
; IS__CGSCC_OPM-NEXT: br label [[IF_END]] ; IS__CGSCC_OPM-NEXT: br label [[IF_END]]
; IS__CGSCC_OPM: if.end: ; IS__CGSCC_OPM: if.end:
; IS__CGSCC_OPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 ; IS__CGSCC_OPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
; IS__CGSCC_OPM-NEXT: ret i32 [[TMP1]] ; IS__CGSCC_OPM-NEXT: ret i32 [[TMP1]]
; ;
; IS__CGSCC_NPM: Function Attrs: norecurse
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@conditional_malloc
; IS__CGSCC_NPM-SAME: (i32 returned [[X:%.*]]) #[[ATTR9]] {
; IS__CGSCC_NPM-NEXT: entry:
; IS__CGSCC_NPM-NEXT: [[TMP0:%.*]] = alloca i8, i64 4, align 1
; IS__CGSCC_NPM-NEXT: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i32*
; IS__CGSCC_NPM-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[X]], 0
; IS__CGSCC_NPM-NEXT: br i1 [[TOBOOL]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
; IS__CGSCC_NPM: if.then:
; IS__CGSCC_NPM-NEXT: store i32 [[X]], i32* [[TMP1]], align 4
; IS__CGSCC_NPM-NEXT: br label [[IF_END]]
; IS__CGSCC_NPM: if.end:
; IS__CGSCC_NPM-NEXT: ret i32 [[X]]
;
entry: entry:
%call = call noalias i8* @malloc(i64 4) norecurse %call = call noalias i8* @malloc(i64 4) norecurse
%0 = bitcast i8* %call to i32* %0 = bitcast i8* %call to i32*
%tobool = icmp ne i32 %x, 0 %tobool = icmp ne i32 %x, 0
br i1 %tobool, label %if.then, label %if.end br i1 %tobool, label %if.then, label %if.end
if.then: ; preds = %entry if.then: ; preds = %entry
store i32 %x, i32* %0, align 4 store i32 %x, i32* %0, align 4
br label %if.end br label %if.end
if.end: ; preds = %if.then, %entry if.end: ; preds = %if.then, %entry
%1 = load i32, i32* %0, align 4 %1 = load i32, i32* %0, align 4
ret i32 %1 ret i32 %1
} }
define dso_local i32 @round_trip_calloc(i32 %x) { define dso_local i32 @round_trip_calloc(i32 %x) {
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@round_trip_calloc ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@round_trip_calloc
; IS__TUNIT_OPM-SAME: (i32 [[X:%.*]]) { ; IS__TUNIT_OPM-SAME: (i32 [[X:%.*]]) {
; IS__TUNIT_OPM-NEXT: entry: ; IS__TUNIT_OPM-NEXT: entry:
; IS__TUNIT_OPM-NEXT: [[CALL:%.*]] = call noalias i8* @calloc(i64 noundef 4, i64 noundef 1) #[[ATTR12]] ; IS__TUNIT_OPM-NEXT: [[CALL:%.*]] = call noalias i8* @calloc(i64 noundef 4, i64 noundef 1) #[[ATTR17]]
; IS__TUNIT_OPM-NEXT: [[TMP0:%.*]] = bitcast i8* [[CALL]] to i32* ; IS__TUNIT_OPM-NEXT: [[TMP0:%.*]] = bitcast i8* [[CALL]] to i32*
; IS__TUNIT_OPM-NEXT: store i32 [[X]], i32* [[TMP0]], align 4 ; IS__TUNIT_OPM-NEXT: store i32 [[X]], i32* [[TMP0]], align 4
; IS__TUNIT_OPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 ; IS__TUNIT_OPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
; IS__TUNIT_OPM-NEXT: ret i32 [[TMP1]] ; IS__TUNIT_OPM-NEXT: ret i32 [[TMP1]]
; ;
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@round_trip_calloc ; IS________NPM-LABEL: define {{[^@]+}}@round_trip_calloc
; IS__TUNIT_NPM-SAME: (i32 [[X:%.*]]) { ; IS________NPM-SAME: (i32 [[X:%.*]]) {
; IS__TUNIT_NPM-NEXT: entry: ; IS________NPM-NEXT: entry:
; IS__TUNIT_NPM-NEXT: [[TMP0:%.*]] = alloca i8, i64 4, align 1 ; IS________NPM-NEXT: [[TMP0:%.*]] = alloca i8, i64 4, align 1
; IS__TUNIT_NPM-NEXT: call void @llvm.memset.p0i8.i64(i8* [[TMP0]], i8 0, i64 4, i1 false) ; IS________NPM-NEXT: call void @llvm.memset.p0i8.i64(i8* [[TMP0]], i8 0, i64 4, i1 false)
; IS__TUNIT_NPM-NEXT: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i32* ; IS________NPM-NEXT: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i32*
; IS__TUNIT_NPM-NEXT: store i32 [[X]], i32* [[TMP1]], align 4 ; IS________NPM-NEXT: store i32 [[X]], i32* [[TMP1]], align 4
; IS__TUNIT_NPM-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 ; IS________NPM-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
; IS__TUNIT_NPM-NEXT: ret i32 [[TMP2]] ; IS________NPM-NEXT: ret i32 [[TMP2]]
; ;
; IS__CGSCC_OPM: Function Attrs: norecurse
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@round_trip_calloc ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@round_trip_calloc
; IS__CGSCC_OPM-SAME: (i32 [[X:%.*]]) #[[ATTR11]] { ; IS__CGSCC_OPM-SAME: (i32 [[X:%.*]]) {
; IS__CGSCC_OPM-NEXT: entry: ; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: [[CALL:%.*]] = call noalias i8* @calloc(i64 noundef 4, i64 noundef 1) #[[ATTR11]] ; IS__CGSCC_OPM-NEXT: [[CALL:%.*]] = call noalias i8* @calloc(i64 noundef 4, i64 noundef 1) #[[ATTR11]]
; IS__CGSCC_OPM-NEXT: [[TMP0:%.*]] = bitcast i8* [[CALL]] to i32* ; IS__CGSCC_OPM-NEXT: [[TMP0:%.*]] = bitcast i8* [[CALL]] to i32*
; IS__CGSCC_OPM-NEXT: store i32 [[X]], i32* [[TMP0]], align 4 ; IS__CGSCC_OPM-NEXT: store i32 [[X]], i32* [[TMP0]], align 4
; IS__CGSCC_OPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 ; IS__CGSCC_OPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
; IS__CGSCC_OPM-NEXT: ret i32 [[TMP1]] ; IS__CGSCC_OPM-NEXT: ret i32 [[TMP1]]
; ;
; IS__CGSCC_NPM: Function Attrs: norecurse
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@round_trip_calloc
; IS__CGSCC_NPM-SAME: (i32 [[X:%.*]]) #[[ATTR9]] {
; IS__CGSCC_NPM-NEXT: entry:
; IS__CGSCC_NPM-NEXT: [[TMP0:%.*]] = alloca i8, i64 4, align 1
; IS__CGSCC_NPM-NEXT: call void @llvm.memset.p0i8.i64(i8* [[TMP0]], i8 0, i64 4, i1 false)
; IS__CGSCC_NPM-NEXT: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i32*
; IS__CGSCC_NPM-NEXT: store i32 [[X]], i32* [[TMP1]], align 4
; IS__CGSCC_NPM-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
; IS__CGSCC_NPM-NEXT: ret i32 [[TMP2]]
;
entry: entry:
%call = call noalias i8* @calloc(i64 4, i64 1) norecurse %call = call noalias i8* @calloc(i64 4, i64 1) norecurse
%0 = bitcast i8* %call to i32* %0 = bitcast i8* %call to i32*
store i32 %x, i32* %0, align 4 store i32 %x, i32* %0, align 4
%1 = load i32, i32* %0, align 4 %1 = load i32, i32* %0, align 4
ret i32 %1 ret i32 %1
} }
define dso_local i32 @round_trip_calloc_constant() { define dso_local i32 @round_trip_calloc_constant() {
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@round_trip_calloc_constant() { ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@round_trip_calloc_constant() {
; IS__TUNIT_OPM-NEXT: entry: ; IS__TUNIT_OPM-NEXT: entry:
; IS__TUNIT_OPM-NEXT: [[CALL:%.*]] = call noalias i8* @calloc(i64 noundef 4, i64 noundef 1) #[[ATTR12]] ; IS__TUNIT_OPM-NEXT: [[CALL:%.*]] = call noalias i8* @calloc(i64 noundef 4, i64 noundef 1) #[[ATTR17]]
; IS__TUNIT_OPM-NEXT: [[TMP0:%.*]] = bitcast i8* [[CALL]] to i32* ; IS__TUNIT_OPM-NEXT: [[TMP0:%.*]] = bitcast i8* [[CALL]] to i32*
; IS__TUNIT_OPM-NEXT: store i32 11, i32* [[TMP0]], align 4 ; IS__TUNIT_OPM-NEXT: store i32 11, i32* [[TMP0]], align 4
; IS__TUNIT_OPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 ; IS__TUNIT_OPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
; IS__TUNIT_OPM-NEXT: ret i32 [[TMP1]] ; IS__TUNIT_OPM-NEXT: ret i32 [[TMP1]]
; ;
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@round_trip_calloc_constant() { ; IS________NPM-LABEL: define {{[^@]+}}@round_trip_calloc_constant() {
; IS__TUNIT_NPM-NEXT: entry: ; IS________NPM-NEXT: entry:
; IS__TUNIT_NPM-NEXT: [[TMP0:%.*]] = alloca i8, i64 4, align 1 ; IS________NPM-NEXT: [[TMP0:%.*]] = alloca i8, i64 4, align 1
; IS__TUNIT_NPM-NEXT: call void @llvm.memset.p0i8.i64(i8* [[TMP0]], i8 0, i64 4, i1 false) ; IS________NPM-NEXT: call void @llvm.memset.p0i8.i64(i8* [[TMP0]], i8 0, i64 4, i1 false)
; IS__TUNIT_NPM-NEXT: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i32* ; IS________NPM-NEXT: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i32*
; IS__TUNIT_NPM-NEXT: store i32 11, i32* [[TMP1]], align 4 ; IS________NPM-NEXT: store i32 11, i32* [[TMP1]], align 4
; IS__TUNIT_NPM-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 ; IS________NPM-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
; IS__TUNIT_NPM-NEXT: ret i32 [[TMP2]] ; IS________NPM-NEXT: ret i32 [[TMP2]]
; ;
; IS__CGSCC_OPM: Function Attrs: norecurse ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@round_trip_calloc_constant() {
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@round_trip_calloc_constant
; IS__CGSCC_OPM-SAME: () #[[ATTR11]] {
; IS__CGSCC_OPM-NEXT: entry: ; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: [[CALL:%.*]] = call noalias i8* @calloc(i64 noundef 4, i64 noundef 1) #[[ATTR11]] ; IS__CGSCC_OPM-NEXT: [[CALL:%.*]] = call noalias i8* @calloc(i64 noundef 4, i64 noundef 1) #[[ATTR11]]
; IS__CGSCC_OPM-NEXT: [[TMP0:%.*]] = bitcast i8* [[CALL]] to i32* ; IS__CGSCC_OPM-NEXT: [[TMP0:%.*]] = bitcast i8* [[CALL]] to i32*
; IS__CGSCC_OPM-NEXT: store i32 11, i32* [[TMP0]], align 4 ; IS__CGSCC_OPM-NEXT: store i32 11, i32* [[TMP0]], align 4
; IS__CGSCC_OPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 ; IS__CGSCC_OPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
; IS__CGSCC_OPM-NEXT: ret i32 [[TMP1]] ; IS__CGSCC_OPM-NEXT: ret i32 [[TMP1]]
; ;
; IS__CGSCC_NPM: Function Attrs: norecurse
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@round_trip_calloc_constant
; IS__CGSCC_NPM-SAME: () #[[ATTR9]] {
; IS__CGSCC_NPM-NEXT: entry:
; IS__CGSCC_NPM-NEXT: [[TMP0:%.*]] = alloca i8, i64 4, align 1
; IS__CGSCC_NPM-NEXT: call void @llvm.memset.p0i8.i64(i8* [[TMP0]], i8 0, i64 4, i1 false)
; IS__CGSCC_NPM-NEXT: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i32*
; IS__CGSCC_NPM-NEXT: store i32 11, i32* [[TMP1]], align 4
; IS__CGSCC_NPM-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
; IS__CGSCC_NPM-NEXT: ret i32 [[TMP2]]
;
entry: entry:
%call = call noalias i8* @calloc(i64 4, i64 1) norecurse %call = call noalias i8* @calloc(i64 4, i64 1) norecurse
%0 = bitcast i8* %call to i32* %0 = bitcast i8* %call to i32*
store i32 11, i32* %0, align 4 store i32 11, i32* %0, align 4
%1 = load i32, i32* %0, align 4 %1 = load i32, i32* %0, align 4
ret i32 %1 ret i32 %1
} }
declare noalias i8* @calloc(i64, i64) declare noalias i8* @calloc(i64, i64)
define dso_local i32 @conditional_calloc(i32 %x) { define dso_local i32 @conditional_calloc(i32 %x) {
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@conditional_calloc ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@conditional_calloc
; IS__TUNIT_OPM-SAME: (i32 [[X:%.*]]) { ; IS__TUNIT_OPM-SAME: (i32 [[X:%.*]]) {
; IS__TUNIT_OPM-NEXT: entry: ; IS__TUNIT_OPM-NEXT: entry:
; IS__TUNIT_OPM-NEXT: [[CALL:%.*]] = call noalias i8* @calloc(i64 noundef 1, i64 noundef 4) #[[ATTR12]] ; IS__TUNIT_OPM-NEXT: [[CALL:%.*]] = call noalias i8* @calloc(i64 noundef 1, i64 noundef 4) #[[ATTR17]]
; IS__TUNIT_OPM-NEXT: [[TMP0:%.*]] = bitcast i8* [[CALL]] to i32* ; IS__TUNIT_OPM-NEXT: [[TMP0:%.*]] = bitcast i8* [[CALL]] to i32*
; IS__TUNIT_OPM-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[X]], 0 ; IS__TUNIT_OPM-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[X]], 0
; IS__TUNIT_OPM-NEXT: br i1 [[TOBOOL]], label [[IF_END:%.*]], label [[IF_THEN:%.*]] ; IS__TUNIT_OPM-NEXT: br i1 [[TOBOOL]], label [[IF_END:%.*]], label [[IF_THEN:%.*]]
; IS__TUNIT_OPM: if.then: ; IS__TUNIT_OPM: if.then:
; IS__TUNIT_OPM-NEXT: store i32 [[X]], i32* [[TMP0]], align 4 ; IS__TUNIT_OPM-NEXT: store i32 [[X]], i32* [[TMP0]], align 4
; IS__TUNIT_OPM-NEXT: br label [[IF_END]] ; IS__TUNIT_OPM-NEXT: br label [[IF_END]]
; IS__TUNIT_OPM: if.end: ; IS__TUNIT_OPM: if.end:
; IS__TUNIT_OPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 ; IS__TUNIT_OPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
; IS__TUNIT_OPM-NEXT: [[TMP2:%.*]] = bitcast i32* [[TMP0]] to i8* ; IS__TUNIT_OPM-NEXT: [[TMP2:%.*]] = bitcast i32* [[TMP0]] to i8*
; IS__TUNIT_OPM-NEXT: call void @free(i8* [[TMP2]]) #[[ATTR12]] ; IS__TUNIT_OPM-NEXT: call void @free(i8* [[TMP2]]) #[[ATTR17]]
; IS__TUNIT_OPM-NEXT: ret i32 [[TMP1]] ; IS__TUNIT_OPM-NEXT: ret i32 [[TMP1]]
; ;
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@conditional_calloc ; IS________NPM-LABEL: define {{[^@]+}}@conditional_calloc
; IS__TUNIT_NPM-SAME: (i32 [[X:%.*]]) { ; IS________NPM-SAME: (i32 [[X:%.*]]) {
; IS__TUNIT_NPM-NEXT: entry: ; IS________NPM-NEXT: entry:
; IS__TUNIT_NPM-NEXT: [[TMP0:%.*]] = alloca i8, i64 4, align 1 ; IS________NPM-NEXT: [[TMP0:%.*]] = alloca i8, i64 4, align 1
; IS__TUNIT_NPM-NEXT: call void @llvm.memset.p0i8.i64(i8* [[TMP0]], i8 0, i64 4, i1 false) ; IS________NPM-NEXT: call void @llvm.memset.p0i8.i64(i8* [[TMP0]], i8 0, i64 4, i1 false)
; IS__TUNIT_NPM-NEXT: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i32* ; IS________NPM-NEXT: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i32*
; IS__TUNIT_NPM-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[X]], 0 ; IS________NPM-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[X]], 0
; IS__TUNIT_NPM-NEXT: br i1 [[TOBOOL]], label [[IF_END:%.*]], label [[IF_THEN:%.*]] ; IS________NPM-NEXT: br i1 [[TOBOOL]], label [[IF_END:%.*]], label [[IF_THEN:%.*]]
; IS__TUNIT_NPM: if.then: ; IS________NPM: if.then:
; IS__TUNIT_NPM-NEXT: store i32 [[X]], i32* [[TMP1]], align 4 ; IS________NPM-NEXT: store i32 [[X]], i32* [[TMP1]], align 4
; IS__TUNIT_NPM-NEXT: br label [[IF_END]] ; IS________NPM-NEXT: br label [[IF_END]]
; IS__TUNIT_NPM: if.end: ; IS________NPM: if.end:
; IS__TUNIT_NPM-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 ; IS________NPM-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
; IS__TUNIT_NPM-NEXT: ret i32 [[TMP2]] ; IS________NPM-NEXT: ret i32 [[TMP2]]
; ;
; IS__CGSCC_OPM: Function Attrs: norecurse
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@conditional_calloc ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@conditional_calloc
; IS__CGSCC_OPM-SAME: (i32 [[X:%.*]]) #[[ATTR11]] { ; IS__CGSCC_OPM-SAME: (i32 [[X:%.*]]) {
; IS__CGSCC_OPM-NEXT: entry: ; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: [[CALL:%.*]] = call noalias i8* @calloc(i64 noundef 1, i64 noundef 4) #[[ATTR11]] ; IS__CGSCC_OPM-NEXT: [[CALL:%.*]] = call noalias i8* @calloc(i64 noundef 1, i64 noundef 4) #[[ATTR11]]
; IS__CGSCC_OPM-NEXT: [[TMP0:%.*]] = bitcast i8* [[CALL]] to i32* ; IS__CGSCC_OPM-NEXT: [[TMP0:%.*]] = bitcast i8* [[CALL]] to i32*
; IS__CGSCC_OPM-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[X]], 0 ; IS__CGSCC_OPM-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[X]], 0
; IS__CGSCC_OPM-NEXT: br i1 [[TOBOOL]], label [[IF_END:%.*]], label [[IF_THEN:%.*]] ; IS__CGSCC_OPM-NEXT: br i1 [[TOBOOL]], label [[IF_END:%.*]], label [[IF_THEN:%.*]]
; IS__CGSCC_OPM: if.then: ; IS__CGSCC_OPM: if.then:
; IS__CGSCC_OPM-NEXT: store i32 [[X]], i32* [[TMP0]], align 4 ; IS__CGSCC_OPM-NEXT: store i32 [[X]], i32* [[TMP0]], align 4
; IS__CGSCC_OPM-NEXT: br label [[IF_END]] ; IS__CGSCC_OPM-NEXT: br label [[IF_END]]
; IS__CGSCC_OPM: if.end: ; IS__CGSCC_OPM: if.end:
; IS__CGSCC_OPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 ; IS__CGSCC_OPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
; IS__CGSCC_OPM-NEXT: [[TMP2:%.*]] = bitcast i32* [[TMP0]] to i8* ; IS__CGSCC_OPM-NEXT: [[TMP2:%.*]] = bitcast i32* [[TMP0]] to i8*
; IS__CGSCC_OPM-NEXT: call void @free(i8* [[TMP2]]) #[[ATTR11]] ; IS__CGSCC_OPM-NEXT: call void @free(i8* [[TMP2]]) #[[ATTR11]]
; IS__CGSCC_OPM-NEXT: ret i32 [[TMP1]] ; IS__CGSCC_OPM-NEXT: ret i32 [[TMP1]]
; ;
; IS__CGSCC_NPM: Function Attrs: norecurse
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@conditional_calloc
; IS__CGSCC_NPM-SAME: (i32 [[X:%.*]]) #[[ATTR9]] {
; IS__CGSCC_NPM-NEXT: entry:
; IS__CGSCC_NPM-NEXT: [[TMP0:%.*]] = alloca i8, i64 4, align 1
; IS__CGSCC_NPM-NEXT: call void @llvm.memset.p0i8.i64(i8* [[TMP0]], i8 0, i64 4, i1 false)
; IS__CGSCC_NPM-NEXT: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i32*
; IS__CGSCC_NPM-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[X]], 0
; IS__CGSCC_NPM-NEXT: br i1 [[TOBOOL]], label [[IF_END:%.*]], label [[IF_THEN:%.*]]
; IS__CGSCC_NPM: if.then:
; IS__CGSCC_NPM-NEXT: store i32 [[X]], i32* [[TMP1]], align 4
; IS__CGSCC_NPM-NEXT: br label [[IF_END]]
; IS__CGSCC_NPM: if.end:
; IS__CGSCC_NPM-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
; IS__CGSCC_NPM-NEXT: ret i32 [[TMP2]]
;
entry: entry:
%call = call noalias i8* @calloc(i64 1, i64 4) norecurse %call = call noalias i8* @calloc(i64 1, i64 4) norecurse
%0 = bitcast i8* %call to i32* %0 = bitcast i8* %call to i32*
%tobool = icmp ne i32 %x, 0 %tobool = icmp ne i32 %x, 0
br i1 %tobool, label %if.end, label %if.then br i1 %tobool, label %if.end, label %if.then
if.then: ; preds = %entry if.then: ; preds = %entry
store i32 %x, i32* %0, align 4 store i32 %x, i32* %0, align 4
br label %if.end br label %if.end
if.end: ; preds = %if.then, %entry if.end: ; preds = %if.then, %entry
%1 = load i32, i32* %0, align 4 %1 = load i32, i32* %0, align 4
%2 = bitcast i32* %0 to i8* %2 = bitcast i32* %0 to i8*
call void @free(i8* %2) norecurse call void @free(i8* %2) norecurse
ret i32 %1 ret i32 %1
} }
define dso_local i32 @conditional_calloc_zero(i1 %c) { define dso_local i32 @conditional_calloc_zero(i1 %c) {
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@conditional_calloc_zero ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@conditional_calloc_zero
; IS__TUNIT_OPM-SAME: (i1 [[C:%.*]]) { ; IS__TUNIT_OPM-SAME: (i1 [[C:%.*]]) {
; IS__TUNIT_OPM-NEXT: entry: ; IS__TUNIT_OPM-NEXT: entry:
; IS__TUNIT_OPM-NEXT: [[CALL:%.*]] = call noalias i8* @calloc(i64 noundef 1, i64 noundef 4) #[[ATTR12]] ; IS__TUNIT_OPM-NEXT: [[CALL:%.*]] = call noalias i8* @calloc(i64 noundef 1, i64 noundef 4) #[[ATTR17]]
; IS__TUNIT_OPM-NEXT: [[TMP0:%.*]] = bitcast i8* [[CALL]] to i32* ; IS__TUNIT_OPM-NEXT: [[TMP0:%.*]] = bitcast i8* [[CALL]] to i32*
; IS__TUNIT_OPM-NEXT: br i1 [[C]], label [[IF_END:%.*]], label [[IF_THEN:%.*]] ; IS__TUNIT_OPM-NEXT: br i1 [[C]], label [[IF_END:%.*]], label [[IF_THEN:%.*]]
; IS__TUNIT_OPM: if.then: ; IS__TUNIT_OPM: if.then:
; IS__TUNIT_OPM-NEXT: store i32 0, i32* [[TMP0]], align 4 ; IS__TUNIT_OPM-NEXT: store i32 0, i32* [[TMP0]], align 4
; IS__TUNIT_OPM-NEXT: br label [[IF_END]] ; IS__TUNIT_OPM-NEXT: br label [[IF_END]]
; IS__TUNIT_OPM: if.end: ; IS__TUNIT_OPM: if.end:
; IS__TUNIT_OPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 ; IS__TUNIT_OPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
; IS__TUNIT_OPM-NEXT: [[TMP2:%.*]] = bitcast i32* [[TMP0]] to i8* ; IS__TUNIT_OPM-NEXT: [[TMP2:%.*]] = bitcast i32* [[TMP0]] to i8*
; IS__TUNIT_OPM-NEXT: call void @free(i8* [[TMP2]]) #[[ATTR12]] ; IS__TUNIT_OPM-NEXT: call void @free(i8* [[TMP2]]) #[[ATTR17]]
; IS__TUNIT_OPM-NEXT: ret i32 [[TMP1]] ; IS__TUNIT_OPM-NEXT: ret i32 [[TMP1]]
; ;
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@conditional_calloc_zero ; IS________NPM-LABEL: define {{[^@]+}}@conditional_calloc_zero
; IS__TUNIT_NPM-SAME: (i1 [[C:%.*]]) { ; IS________NPM-SAME: (i1 [[C:%.*]]) {
; IS__TUNIT_NPM-NEXT: entry: ; IS________NPM-NEXT: entry:
; IS__TUNIT_NPM-NEXT: [[TMP0:%.*]] = alloca i8, i64 4, align 1 ; IS________NPM-NEXT: [[TMP0:%.*]] = alloca i8, i64 4, align 1
; IS__TUNIT_NPM-NEXT: call void @llvm.memset.p0i8.i64(i8* [[TMP0]], i8 0, i64 4, i1 false) ; IS________NPM-NEXT: call void @llvm.memset.p0i8.i64(i8* [[TMP0]], i8 0, i64 4, i1 false)
; IS__TUNIT_NPM-NEXT: br i1 [[C]], label [[IF_END:%.*]], label [[IF_THEN:%.*]] ; IS________NPM-NEXT: br i1 [[C]], label [[IF_END:%.*]], label [[IF_THEN:%.*]]
; IS__TUNIT_NPM: if.then: ; IS________NPM: if.then:
; IS__TUNIT_NPM-NEXT: br label [[IF_END]] ; IS________NPM-NEXT: br label [[IF_END]]
; IS__TUNIT_NPM: if.end: ; IS________NPM: if.end:
; IS__TUNIT_NPM-NEXT: ret i32 0 ; IS________NPM-NEXT: ret i32 0
; ;
; IS__CGSCC_OPM: Function Attrs: norecurse
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@conditional_calloc_zero ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@conditional_calloc_zero
; IS__CGSCC_OPM-SAME: (i1 [[C:%.*]]) #[[ATTR11]] { ; IS__CGSCC_OPM-SAME: (i1 [[C:%.*]]) {
; IS__CGSCC_OPM-NEXT: entry: ; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: [[CALL:%.*]] = call noalias i8* @calloc(i64 noundef 1, i64 noundef 4) #[[ATTR11]] ; IS__CGSCC_OPM-NEXT: [[CALL:%.*]] = call noalias i8* @calloc(i64 noundef 1, i64 noundef 4) #[[ATTR11]]
; IS__CGSCC_OPM-NEXT: [[TMP0:%.*]] = bitcast i8* [[CALL]] to i32* ; IS__CGSCC_OPM-NEXT: [[TMP0:%.*]] = bitcast i8* [[CALL]] to i32*
; IS__CGSCC_OPM-NEXT: br i1 [[C]], label [[IF_END:%.*]], label [[IF_THEN:%.*]] ; IS__CGSCC_OPM-NEXT: br i1 [[C]], label [[IF_END:%.*]], label [[IF_THEN:%.*]]
; IS__CGSCC_OPM: if.then: ; IS__CGSCC_OPM: if.then:
; IS__CGSCC_OPM-NEXT: store i32 0, i32* [[TMP0]], align 4 ; IS__CGSCC_OPM-NEXT: store i32 0, i32* [[TMP0]], align 4
; IS__CGSCC_OPM-NEXT: br label [[IF_END]] ; IS__CGSCC_OPM-NEXT: br label [[IF_END]]
; IS__CGSCC_OPM: if.end: ; IS__CGSCC_OPM: if.end:
; IS__CGSCC_OPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 ; IS__CGSCC_OPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
; IS__CGSCC_OPM-NEXT: [[TMP2:%.*]] = bitcast i32* [[TMP0]] to i8* ; IS__CGSCC_OPM-NEXT: [[TMP2:%.*]] = bitcast i32* [[TMP0]] to i8*
; IS__CGSCC_OPM-NEXT: call void @free(i8* [[TMP2]]) #[[ATTR11]] ; IS__CGSCC_OPM-NEXT: call void @free(i8* [[TMP2]]) #[[ATTR11]]
; IS__CGSCC_OPM-NEXT: ret i32 [[TMP1]] ; IS__CGSCC_OPM-NEXT: ret i32 [[TMP1]]
; ;
; IS__CGSCC_NPM: Function Attrs: norecurse
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@conditional_calloc_zero
; IS__CGSCC_NPM-SAME: (i1 [[C:%.*]]) #[[ATTR9]] {
; IS__CGSCC_NPM-NEXT: entry:
; IS__CGSCC_NPM-NEXT: [[TMP0:%.*]] = alloca i8, i64 4, align 1
; IS__CGSCC_NPM-NEXT: call void @llvm.memset.p0i8.i64(i8* [[TMP0]], i8 0, i64 4, i1 false)
; IS__CGSCC_NPM-NEXT: br i1 [[C]], label [[IF_END:%.*]], label [[IF_THEN:%.*]]
; IS__CGSCC_NPM: if.then:
; IS__CGSCC_NPM-NEXT: br label [[IF_END]]
; IS__CGSCC_NPM: if.end:
; IS__CGSCC_NPM-NEXT: ret i32 0
;
entry: entry:
%call = call noalias i8* @calloc(i64 1, i64 4) norecurse %call = call noalias i8* @calloc(i64 1, i64 4) norecurse
%0 = bitcast i8* %call to i32* %0 = bitcast i8* %call to i32*
br i1 %c, label %if.end, label %if.then br i1 %c, label %if.end, label %if.then
if.then: ; preds = %entry if.then: ; preds = %entry
store i32 0, i32* %0, align 4 store i32 0, i32* %0, align 4
br label %if.end br label %if.end
if.end: ; preds = %if.then, %entry if.end: ; preds = %if.then, %entry
%1 = load i32, i32* %0, align 4 %1 = load i32, i32* %0, align 4
%2 = bitcast i32* %0 to i8* %2 = bitcast i32* %0 to i8*
call void @free(i8* %2) norecurse call void @free(i8* %2) norecurse
ret i32 %1 ret i32 %1
} }
define dso_local i32* @malloc_like(i32 %s) { define dso_local i32* @malloc_like(i32 %s) {
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@malloc_like ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@malloc_like
; IS__TUNIT_OPM-SAME: (i32 [[S:%.*]]) { ; IS__TUNIT_OPM-SAME: (i32 [[S:%.*]]) {
; IS__TUNIT_OPM-NEXT: entry: ; IS__TUNIT_OPM-NEXT: entry:
; IS__TUNIT_OPM-NEXT: [[CONV:%.*]] = sext i32 [[S]] to i64 ; IS__TUNIT_OPM-NEXT: [[CONV:%.*]] = sext i32 [[S]] to i64
; IS__TUNIT_OPM-NEXT: [[CALL:%.*]] = call noalias i8* @malloc(i64 [[CONV]]) #[[ATTR12]] ; IS__TUNIT_OPM-NEXT: [[CALL:%.*]] = call noalias i8* @malloc(i64 [[CONV]]) #[[ATTR17]]
; IS__TUNIT_OPM-NEXT: [[TMP0:%.*]] = bitcast i8* [[CALL]] to i32* ; IS__TUNIT_OPM-NEXT: [[TMP0:%.*]] = bitcast i8* [[CALL]] to i32*
; IS__TUNIT_OPM-NEXT: ret i32* [[TMP0]] ; IS__TUNIT_OPM-NEXT: ret i32* [[TMP0]]
; ;
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@malloc_like ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@malloc_like
; IS__TUNIT_NPM-SAME: (i32 [[S:%.*]]) { ; IS__TUNIT_NPM-SAME: (i32 [[S:%.*]]) {
; IS__TUNIT_NPM-NEXT: entry: ; IS__TUNIT_NPM-NEXT: entry:
; IS__TUNIT_NPM-NEXT: [[CONV:%.*]] = sext i32 [[S]] to i64 ; IS__TUNIT_NPM-NEXT: [[CONV:%.*]] = sext i32 [[S]] to i64
; IS__TUNIT_NPM-NEXT: [[CALL:%.*]] = call noalias i8* @malloc(i64 [[CONV]]) #[[ATTR10:[0-9]+]] ; IS__TUNIT_NPM-NEXT: [[CALL:%.*]] = call noalias i8* @malloc(i64 [[CONV]]) #[[ATTR13:[0-9]+]]
; IS__TUNIT_NPM-NEXT: [[TMP0:%.*]] = bitcast i8* [[CALL]] to i32* ; IS__TUNIT_NPM-NEXT: [[TMP0:%.*]] = bitcast i8* [[CALL]] to i32*
; IS__TUNIT_NPM-NEXT: ret i32* [[TMP0]] ; IS__TUNIT_NPM-NEXT: ret i32* [[TMP0]]
; ;
; IS__CGSCC_OPM: Function Attrs: norecurse
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@malloc_like ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@malloc_like
; IS__CGSCC_OPM-SAME: (i32 [[S:%.*]]) #[[ATTR11]] { ; IS__CGSCC_OPM-SAME: (i32 [[S:%.*]]) {
; IS__CGSCC_OPM-NEXT: entry: ; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: [[CONV:%.*]] = sext i32 [[S]] to i64 ; IS__CGSCC_OPM-NEXT: [[CONV:%.*]] = sext i32 [[S]] to i64
; IS__CGSCC_OPM-NEXT: [[CALL:%.*]] = call noalias i8* @malloc(i64 [[CONV]]) #[[ATTR11]] ; IS__CGSCC_OPM-NEXT: [[CALL:%.*]] = call noalias i8* @malloc(i64 [[CONV]]) #[[ATTR11]]
; IS__CGSCC_OPM-NEXT: [[TMP0:%.*]] = bitcast i8* [[CALL]] to i32* ; IS__CGSCC_OPM-NEXT: [[TMP0:%.*]] = bitcast i8* [[CALL]] to i32*
; IS__CGSCC_OPM-NEXT: ret i32* [[TMP0]] ; IS__CGSCC_OPM-NEXT: ret i32* [[TMP0]]
; ;
; IS__CGSCC_NPM: Function Attrs: norecurse
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@malloc_like ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@malloc_like
; IS__CGSCC_NPM-SAME: (i32 [[S:%.*]]) #[[ATTR9]] { ; IS__CGSCC_NPM-SAME: (i32 [[S:%.*]]) {
; IS__CGSCC_NPM-NEXT: entry: ; IS__CGSCC_NPM-NEXT: entry:
; IS__CGSCC_NPM-NEXT: [[CONV:%.*]] = sext i32 [[S]] to i64 ; IS__CGSCC_NPM-NEXT: [[CONV:%.*]] = sext i32 [[S]] to i64
; IS__CGSCC_NPM-NEXT: [[CALL:%.*]] = call noalias i8* @malloc(i64 [[CONV]]) #[[ATTR9]] ; IS__CGSCC_NPM-NEXT: [[CALL:%.*]] = call noalias i8* @malloc(i64 [[CONV]]) #[[ATTR9:[0-9]+]]
; IS__CGSCC_NPM-NEXT: [[TMP0:%.*]] = bitcast i8* [[CALL]] to i32* ; IS__CGSCC_NPM-NEXT: [[TMP0:%.*]] = bitcast i8* [[CALL]] to i32*
; IS__CGSCC_NPM-NEXT: ret i32* [[TMP0]] ; IS__CGSCC_NPM-NEXT: ret i32* [[TMP0]]
; ;
entry: entry:
%conv = sext i32 %s to i64 %conv = sext i32 %s to i64
%call = call noalias i8* @malloc(i64 %conv) norecurse %call = call noalias i8* @malloc(i64 %conv) norecurse
%0 = bitcast i8* %call to i32* %0 = bitcast i8* %call to i32*
ret i32* %0 ret i32* %0
} }
define dso_local i32 @round_trip_malloc_like(i32 %x) { define dso_local i32 @round_trip_malloc_like(i32 %x) {
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@round_trip_malloc_like ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@round_trip_malloc_like
; IS__TUNIT_OPM-SAME: (i32 [[X:%.*]]) { ; IS__TUNIT_OPM-SAME: (i32 [[X:%.*]]) {
; IS__TUNIT_OPM-NEXT: entry: ; IS__TUNIT_OPM-NEXT: entry:
; IS__TUNIT_OPM-NEXT: [[CALL:%.*]] = call i32* @malloc_like(i32 noundef 4) #[[ATTR12]] ; IS__TUNIT_OPM-NEXT: [[CALL:%.*]] = call i32* @malloc_like(i32 noundef 4) #[[ATTR17]]
; IS__TUNIT_OPM-NEXT: store i32 [[X]], i32* [[CALL]], align 4 ; IS__TUNIT_OPM-NEXT: store i32 [[X]], i32* [[CALL]], align 4
; IS__TUNIT_OPM-NEXT: [[TMP0:%.*]] = load i32, i32* [[CALL]], align 4 ; IS__TUNIT_OPM-NEXT: [[TMP0:%.*]] = load i32, i32* [[CALL]], align 4
; IS__TUNIT_OPM-NEXT: [[TMP1:%.*]] = bitcast i32* [[CALL]] to i8* ; IS__TUNIT_OPM-NEXT: [[TMP1:%.*]] = bitcast i32* [[CALL]] to i8*
; IS__TUNIT_OPM-NEXT: call void @free(i8* noundef [[TMP1]]) #[[ATTR12]] ; IS__TUNIT_OPM-NEXT: call void @free(i8* noundef [[TMP1]]) #[[ATTR17]]
; IS__TUNIT_OPM-NEXT: ret i32 [[TMP0]] ; IS__TUNIT_OPM-NEXT: ret i32 [[TMP0]]
; ;
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@round_trip_malloc_like ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@round_trip_malloc_like
; IS__TUNIT_NPM-SAME: (i32 [[X:%.*]]) { ; IS__TUNIT_NPM-SAME: (i32 [[X:%.*]]) {
; IS__TUNIT_NPM-NEXT: entry: ; IS__TUNIT_NPM-NEXT: entry:
; IS__TUNIT_NPM-NEXT: [[CALL:%.*]] = call i32* @malloc_like(i32 noundef 4) #[[ATTR10]] ; IS__TUNIT_NPM-NEXT: [[CALL:%.*]] = call i32* @malloc_like(i32 noundef 4) #[[ATTR13]]
; IS__TUNIT_NPM-NEXT: store i32 [[X]], i32* [[CALL]], align 4 ; IS__TUNIT_NPM-NEXT: store i32 [[X]], i32* [[CALL]], align 4
; IS__TUNIT_NPM-NEXT: [[TMP0:%.*]] = load i32, i32* [[CALL]], align 4 ; IS__TUNIT_NPM-NEXT: [[TMP0:%.*]] = load i32, i32* [[CALL]], align 4
; IS__TUNIT_NPM-NEXT: [[TMP1:%.*]] = bitcast i32* [[CALL]] to i8* ; IS__TUNIT_NPM-NEXT: [[TMP1:%.*]] = bitcast i32* [[CALL]] to i8*
; IS__TUNIT_NPM-NEXT: call void @free(i8* noundef [[TMP1]]) #[[ATTR10]] ; IS__TUNIT_NPM-NEXT: call void @free(i8* noundef [[TMP1]]) #[[ATTR13]]
; IS__TUNIT_NPM-NEXT: ret i32 [[TMP0]] ; IS__TUNIT_NPM-NEXT: ret i32 [[TMP0]]
; ;
; IS__CGSCC_OPM: Function Attrs: norecurse
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@round_trip_malloc_like ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@round_trip_malloc_like
; IS__CGSCC_OPM-SAME: (i32 [[X:%.*]]) #[[ATTR11]] { ; IS__CGSCC_OPM-SAME: (i32 [[X:%.*]]) {
; IS__CGSCC_OPM-NEXT: entry: ; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: [[CALL:%.*]] = call i32* @malloc_like(i32 noundef 4) #[[ATTR11]] ; IS__CGSCC_OPM-NEXT: [[CALL:%.*]] = call i32* @malloc_like(i32 noundef 4) #[[ATTR11]]
; IS__CGSCC_OPM-NEXT: store i32 [[X]], i32* [[CALL]], align 4 ; IS__CGSCC_OPM-NEXT: store i32 [[X]], i32* [[CALL]], align 4
; IS__CGSCC_OPM-NEXT: [[TMP0:%.*]] = load i32, i32* [[CALL]], align 4 ; IS__CGSCC_OPM-NEXT: [[TMP0:%.*]] = load i32, i32* [[CALL]], align 4
; IS__CGSCC_OPM-NEXT: [[TMP1:%.*]] = bitcast i32* [[CALL]] to i8* ; IS__CGSCC_OPM-NEXT: [[TMP1:%.*]] = bitcast i32* [[CALL]] to i8*
; IS__CGSCC_OPM-NEXT: call void @free(i8* noundef [[TMP1]]) #[[ATTR11]] ; IS__CGSCC_OPM-NEXT: call void @free(i8* noundef [[TMP1]]) #[[ATTR11]]
; IS__CGSCC_OPM-NEXT: ret i32 [[TMP0]] ; IS__CGSCC_OPM-NEXT: ret i32 [[TMP0]]
; ;
; IS__CGSCC_NPM: Function Attrs: norecurse
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@round_trip_malloc_like ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@round_trip_malloc_like
; IS__CGSCC_NPM-SAME: (i32 [[X:%.*]]) #[[ATTR9]] { ; IS__CGSCC_NPM-SAME: (i32 [[X:%.*]]) {
; IS__CGSCC_NPM-NEXT: entry: ; IS__CGSCC_NPM-NEXT: entry:
; IS__CGSCC_NPM-NEXT: [[CALL:%.*]] = call i32* @malloc_like(i32 noundef 4) #[[ATTR9]] ; IS__CGSCC_NPM-NEXT: [[CALL:%.*]] = call i32* @malloc_like(i32 noundef 4) #[[ATTR9]]
; IS__CGSCC_NPM-NEXT: store i32 [[X]], i32* [[CALL]], align 4 ; IS__CGSCC_NPM-NEXT: store i32 [[X]], i32* [[CALL]], align 4
; IS__CGSCC_NPM-NEXT: [[TMP0:%.*]] = load i32, i32* [[CALL]], align 4 ; IS__CGSCC_NPM-NEXT: [[TMP0:%.*]] = load i32, i32* [[CALL]], align 4
; IS__CGSCC_NPM-NEXT: [[TMP1:%.*]] = bitcast i32* [[CALL]] to i8* ; IS__CGSCC_NPM-NEXT: [[TMP1:%.*]] = bitcast i32* [[CALL]] to i8*
; IS__CGSCC_NPM-NEXT: call void @free(i8* noundef [[TMP1]]) #[[ATTR9]] ; IS__CGSCC_NPM-NEXT: call void @free(i8* noundef [[TMP1]]) #[[ATTR9]]
; IS__CGSCC_NPM-NEXT: ret i32 [[TMP0]] ; IS__CGSCC_NPM-NEXT: ret i32 [[TMP0]]
; ;
entry: entry:
%call = call i32* @malloc_like(i32 4) norecurse %call = call i32* @malloc_like(i32 4) norecurse
store i32 %x, i32* %call, align 4 store i32 %x, i32* %call, align 4
%0 = load i32, i32* %call, align 4 %0 = load i32, i32* %call, align 4
%1 = bitcast i32* %call to i8* %1 = bitcast i32* %call to i8*
call void @free(i8* %1) norecurse call void @free(i8* %1) norecurse
ret i32 %0 ret i32 %0
} }
define dso_local i32 @round_trip_unknown_alloc(i32 %x) { define dso_local i32 @round_trip_unknown_alloc(i32 %x) {
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@round_trip_unknown_alloc ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@round_trip_unknown_alloc
; IS__TUNIT_OPM-SAME: (i32 [[X:%.*]]) { ; IS__TUNIT_OPM-SAME: (i32 [[X:%.*]]) {
; IS__TUNIT_OPM-NEXT: entry: ; IS__TUNIT_OPM-NEXT: entry:
; IS__TUNIT_OPM-NEXT: [[CALL:%.*]] = call i32* @unknown_alloc(i32 noundef 4) #[[ATTR12]] ; IS__TUNIT_OPM-NEXT: [[CALL:%.*]] = call i32* @unknown_alloc(i32 noundef 4) #[[ATTR17]]
; IS__TUNIT_OPM-NEXT: store i32 [[X]], i32* [[CALL]], align 4 ; IS__TUNIT_OPM-NEXT: store i32 [[X]], i32* [[CALL]], align 4
; IS__TUNIT_OPM-NEXT: [[TMP0:%.*]] = load i32, i32* [[CALL]], align 4 ; IS__TUNIT_OPM-NEXT: [[TMP0:%.*]] = load i32, i32* [[CALL]], align 4
; IS__TUNIT_OPM-NEXT: [[TMP1:%.*]] = bitcast i32* [[CALL]] to i8* ; IS__TUNIT_OPM-NEXT: [[TMP1:%.*]] = bitcast i32* [[CALL]] to i8*
; IS__TUNIT_OPM-NEXT: call void @free(i8* noundef [[TMP1]]) #[[ATTR12]] ; IS__TUNIT_OPM-NEXT: call void @free(i8* noundef [[TMP1]]) #[[ATTR17]]
; IS__TUNIT_OPM-NEXT: ret i32 [[TMP0]] ; IS__TUNIT_OPM-NEXT: ret i32 [[TMP0]]
; ;
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@round_trip_unknown_alloc ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@round_trip_unknown_alloc
; IS__TUNIT_NPM-SAME: (i32 [[X:%.*]]) { ; IS__TUNIT_NPM-SAME: (i32 [[X:%.*]]) {
; IS__TUNIT_NPM-NEXT: entry: ; IS__TUNIT_NPM-NEXT: entry:
; IS__TUNIT_NPM-NEXT: [[CALL:%.*]] = call i32* @unknown_alloc(i32 noundef 4) #[[ATTR10]] ; IS__TUNIT_NPM-NEXT: [[CALL:%.*]] = call i32* @unknown_alloc(i32 noundef 4) #[[ATTR13]]
; IS__TUNIT_NPM-NEXT: store i32 [[X]], i32* [[CALL]], align 4 ; IS__TUNIT_NPM-NEXT: store i32 [[X]], i32* [[CALL]], align 4
; IS__TUNIT_NPM-NEXT: [[TMP0:%.*]] = load i32, i32* [[CALL]], align 4 ; IS__TUNIT_NPM-NEXT: [[TMP0:%.*]] = load i32, i32* [[CALL]], align 4
; IS__TUNIT_NPM-NEXT: [[TMP1:%.*]] = bitcast i32* [[CALL]] to i8* ; IS__TUNIT_NPM-NEXT: [[TMP1:%.*]] = bitcast i32* [[CALL]] to i8*
; IS__TUNIT_NPM-NEXT: call void @free(i8* noundef [[TMP1]]) #[[ATTR10]] ; IS__TUNIT_NPM-NEXT: call void @free(i8* noundef [[TMP1]]) #[[ATTR13]]
; IS__TUNIT_NPM-NEXT: ret i32 [[TMP0]] ; IS__TUNIT_NPM-NEXT: ret i32 [[TMP0]]
; ;
; IS__CGSCC_OPM: Function Attrs: norecurse
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@round_trip_unknown_alloc ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@round_trip_unknown_alloc
; IS__CGSCC_OPM-SAME: (i32 [[X:%.*]]) #[[ATTR11]] { ; IS__CGSCC_OPM-SAME: (i32 [[X:%.*]]) {
; IS__CGSCC_OPM-NEXT: entry: ; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: [[CALL:%.*]] = call i32* @unknown_alloc(i32 noundef 4) #[[ATTR11]] ; IS__CGSCC_OPM-NEXT: [[CALL:%.*]] = call i32* @unknown_alloc(i32 noundef 4) #[[ATTR11]]
; IS__CGSCC_OPM-NEXT: store i32 [[X]], i32* [[CALL]], align 4 ; IS__CGSCC_OPM-NEXT: store i32 [[X]], i32* [[CALL]], align 4
; IS__CGSCC_OPM-NEXT: [[TMP0:%.*]] = load i32, i32* [[CALL]], align 4 ; IS__CGSCC_OPM-NEXT: [[TMP0:%.*]] = load i32, i32* [[CALL]], align 4
; IS__CGSCC_OPM-NEXT: [[TMP1:%.*]] = bitcast i32* [[CALL]] to i8* ; IS__CGSCC_OPM-NEXT: [[TMP1:%.*]] = bitcast i32* [[CALL]] to i8*
; IS__CGSCC_OPM-NEXT: call void @free(i8* noundef [[TMP1]]) #[[ATTR11]] ; IS__CGSCC_OPM-NEXT: call void @free(i8* noundef [[TMP1]]) #[[ATTR11]]
; IS__CGSCC_OPM-NEXT: ret i32 [[TMP0]] ; IS__CGSCC_OPM-NEXT: ret i32 [[TMP0]]
; ;
; IS__CGSCC_NPM: Function Attrs: norecurse
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@round_trip_unknown_alloc ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@round_trip_unknown_alloc
; IS__CGSCC_NPM-SAME: (i32 [[X:%.*]]) #[[ATTR9]] { ; IS__CGSCC_NPM-SAME: (i32 [[X:%.*]]) {
; IS__CGSCC_NPM-NEXT: entry: ; IS__CGSCC_NPM-NEXT: entry:
; IS__CGSCC_NPM-NEXT: [[CALL:%.*]] = call i32* @unknown_alloc(i32 noundef 4) #[[ATTR9]] ; IS__CGSCC_NPM-NEXT: [[CALL:%.*]] = call i32* @unknown_alloc(i32 noundef 4) #[[ATTR9]]
; IS__CGSCC_NPM-NEXT: store i32 [[X]], i32* [[CALL]], align 4 ; IS__CGSCC_NPM-NEXT: store i32 [[X]], i32* [[CALL]], align 4
; IS__CGSCC_NPM-NEXT: [[TMP0:%.*]] = load i32, i32* [[CALL]], align 4 ; IS__CGSCC_NPM-NEXT: [[TMP0:%.*]] = load i32, i32* [[CALL]], align 4
; IS__CGSCC_NPM-NEXT: [[TMP1:%.*]] = bitcast i32* [[CALL]] to i8* ; IS__CGSCC_NPM-NEXT: [[TMP1:%.*]] = bitcast i32* [[CALL]] to i8*
; IS__CGSCC_NPM-NEXT: call void @free(i8* noundef [[TMP1]]) #[[ATTR9]] ; IS__CGSCC_NPM-NEXT: call void @free(i8* noundef [[TMP1]]) #[[ATTR9]]
; IS__CGSCC_NPM-NEXT: ret i32 [[TMP0]] ; IS__CGSCC_NPM-NEXT: ret i32 [[TMP0]]
; ;
entry: entry:
%call = call i32* @unknown_alloc(i32 4) norecurse %call = call i32* @unknown_alloc(i32 4) norecurse
store i32 %x, i32* %call, align 4 store i32 %x, i32* %call, align 4
%0 = load i32, i32* %call, align 4 %0 = load i32, i32* %call, align 4
%1 = bitcast i32* %call to i8* %1 = bitcast i32* %call to i8*
call void @free(i8* %1) norecurse call void @free(i8* %1) norecurse
ret i32 %0 ret i32 %0
} }
declare noalias i32* @unknown_alloc(i32) declare noalias i32* @unknown_alloc(i32)
define dso_local i32 @conditional_unknown_alloc(i32 %x) { define dso_local i32 @conditional_unknown_alloc(i32 %x) {
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@conditional_unknown_alloc ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@conditional_unknown_alloc
; IS__TUNIT_OPM-SAME: (i32 [[X:%.*]]) { ; IS__TUNIT_OPM-SAME: (i32 [[X:%.*]]) {
; IS__TUNIT_OPM-NEXT: entry: ; IS__TUNIT_OPM-NEXT: entry:
; IS__TUNIT_OPM-NEXT: [[CALL:%.*]] = call noalias i32* @unknown_alloc(i32 noundef 4) #[[ATTR12]] ; IS__TUNIT_OPM-NEXT: [[CALL:%.*]] = call noalias i32* @unknown_alloc(i32 noundef 4) #[[ATTR17]]
; IS__TUNIT_OPM-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[X]], 0 ; IS__TUNIT_OPM-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[X]], 0
; IS__TUNIT_OPM-NEXT: br i1 [[TOBOOL]], label [[IF_END:%.*]], label [[IF_THEN:%.*]] ; IS__TUNIT_OPM-NEXT: br i1 [[TOBOOL]], label [[IF_END:%.*]], label [[IF_THEN:%.*]]
; IS__TUNIT_OPM: if.then: ; IS__TUNIT_OPM: if.then:
; IS__TUNIT_OPM-NEXT: store i32 [[X]], i32* [[CALL]], align 4 ; IS__TUNIT_OPM-NEXT: store i32 [[X]], i32* [[CALL]], align 4
; IS__TUNIT_OPM-NEXT: br label [[IF_END]] ; IS__TUNIT_OPM-NEXT: br label [[IF_END]]
; IS__TUNIT_OPM: if.end: ; IS__TUNIT_OPM: if.end:
; IS__TUNIT_OPM-NEXT: [[TMP0:%.*]] = load i32, i32* [[CALL]], align 4 ; IS__TUNIT_OPM-NEXT: [[TMP0:%.*]] = load i32, i32* [[CALL]], align 4
; IS__TUNIT_OPM-NEXT: [[TMP1:%.*]] = bitcast i32* [[CALL]] to i8* ; IS__TUNIT_OPM-NEXT: [[TMP1:%.*]] = bitcast i32* [[CALL]] to i8*
; IS__TUNIT_OPM-NEXT: call void @free(i8* [[TMP1]]) #[[ATTR12]] ; IS__TUNIT_OPM-NEXT: call void @free(i8* [[TMP1]]) #[[ATTR17]]
; IS__TUNIT_OPM-NEXT: ret i32 [[TMP0]] ; IS__TUNIT_OPM-NEXT: ret i32 [[TMP0]]
; ;
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@conditional_unknown_alloc ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@conditional_unknown_alloc
; IS__TUNIT_NPM-SAME: (i32 [[X:%.*]]) { ; IS__TUNIT_NPM-SAME: (i32 [[X:%.*]]) {
; IS__TUNIT_NPM-NEXT: entry: ; IS__TUNIT_NPM-NEXT: entry:
; IS__TUNIT_NPM-NEXT: [[CALL:%.*]] = call noalias i32* @unknown_alloc(i32 noundef 4) #[[ATTR10]] ; IS__TUNIT_NPM-NEXT: [[CALL:%.*]] = call noalias i32* @unknown_alloc(i32 noundef 4) #[[ATTR13]]
; IS__TUNIT_NPM-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[X]], 0 ; IS__TUNIT_NPM-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[X]], 0
; IS__TUNIT_NPM-NEXT: br i1 [[TOBOOL]], label [[IF_END:%.*]], label [[IF_THEN:%.*]] ; IS__TUNIT_NPM-NEXT: br i1 [[TOBOOL]], label [[IF_END:%.*]], label [[IF_THEN:%.*]]
; IS__TUNIT_NPM: if.then: ; IS__TUNIT_NPM: if.then:
; IS__TUNIT_NPM-NEXT: store i32 [[X]], i32* [[CALL]], align 4 ; IS__TUNIT_NPM-NEXT: store i32 [[X]], i32* [[CALL]], align 4
; IS__TUNIT_NPM-NEXT: br label [[IF_END]] ; IS__TUNIT_NPM-NEXT: br label [[IF_END]]
; IS__TUNIT_NPM: if.end: ; IS__TUNIT_NPM: if.end:
; IS__TUNIT_NPM-NEXT: [[TMP0:%.*]] = load i32, i32* [[CALL]], align 4 ; IS__TUNIT_NPM-NEXT: [[TMP0:%.*]] = load i32, i32* [[CALL]], align 4
; IS__TUNIT_NPM-NEXT: [[TMP1:%.*]] = bitcast i32* [[CALL]] to i8* ; IS__TUNIT_NPM-NEXT: [[TMP1:%.*]] = bitcast i32* [[CALL]] to i8*
; IS__TUNIT_NPM-NEXT: call void @free(i8* [[TMP1]]) #[[ATTR10]] ; IS__TUNIT_NPM-NEXT: call void @free(i8* [[TMP1]]) #[[ATTR13]]
; IS__TUNIT_NPM-NEXT: ret i32 [[TMP0]] ; IS__TUNIT_NPM-NEXT: ret i32 [[TMP0]]
; ;
; IS__CGSCC_OPM: Function Attrs: norecurse
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@conditional_unknown_alloc ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@conditional_unknown_alloc
; IS__CGSCC_OPM-SAME: (i32 [[X:%.*]]) #[[ATTR11]] { ; IS__CGSCC_OPM-SAME: (i32 [[X:%.*]]) {
; IS__CGSCC_OPM-NEXT: entry: ; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: [[CALL:%.*]] = call noalias i32* @unknown_alloc(i32 noundef 4) #[[ATTR11]] ; IS__CGSCC_OPM-NEXT: [[CALL:%.*]] = call noalias i32* @unknown_alloc(i32 noundef 4) #[[ATTR11]]
; IS__CGSCC_OPM-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[X]], 0 ; IS__CGSCC_OPM-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[X]], 0
; IS__CGSCC_OPM-NEXT: br i1 [[TOBOOL]], label [[IF_END:%.*]], label [[IF_THEN:%.*]] ; IS__CGSCC_OPM-NEXT: br i1 [[TOBOOL]], label [[IF_END:%.*]], label [[IF_THEN:%.*]]
; IS__CGSCC_OPM: if.then: ; IS__CGSCC_OPM: if.then:
; IS__CGSCC_OPM-NEXT: store i32 [[X]], i32* [[CALL]], align 4 ; IS__CGSCC_OPM-NEXT: store i32 [[X]], i32* [[CALL]], align 4
; IS__CGSCC_OPM-NEXT: br label [[IF_END]] ; IS__CGSCC_OPM-NEXT: br label [[IF_END]]
; IS__CGSCC_OPM: if.end: ; IS__CGSCC_OPM: if.end:
; IS__CGSCC_OPM-NEXT: [[TMP0:%.*]] = load i32, i32* [[CALL]], align 4 ; IS__CGSCC_OPM-NEXT: [[TMP0:%.*]] = load i32, i32* [[CALL]], align 4
; IS__CGSCC_OPM-NEXT: [[TMP1:%.*]] = bitcast i32* [[CALL]] to i8* ; IS__CGSCC_OPM-NEXT: [[TMP1:%.*]] = bitcast i32* [[CALL]] to i8*
; IS__CGSCC_OPM-NEXT: call void @free(i8* [[TMP1]]) #[[ATTR11]] ; IS__CGSCC_OPM-NEXT: call void @free(i8* [[TMP1]]) #[[ATTR11]]
; IS__CGSCC_OPM-NEXT: ret i32 [[TMP0]] ; IS__CGSCC_OPM-NEXT: ret i32 [[TMP0]]
; ;
; IS__CGSCC_NPM: Function Attrs: norecurse
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@conditional_unknown_alloc ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@conditional_unknown_alloc
; IS__CGSCC_NPM-SAME: (i32 [[X:%.*]]) #[[ATTR9]] { ; IS__CGSCC_NPM-SAME: (i32 [[X:%.*]]) {
; IS__CGSCC_NPM-NEXT: entry: ; IS__CGSCC_NPM-NEXT: entry:
; IS__CGSCC_NPM-NEXT: [[CALL:%.*]] = call noalias i32* @unknown_alloc(i32 noundef 4) #[[ATTR9]] ; IS__CGSCC_NPM-NEXT: [[CALL:%.*]] = call noalias i32* @unknown_alloc(i32 noundef 4) #[[ATTR9]]
; IS__CGSCC_NPM-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[X]], 0 ; IS__CGSCC_NPM-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[X]], 0
; IS__CGSCC_NPM-NEXT: br i1 [[TOBOOL]], label [[IF_END:%.*]], label [[IF_THEN:%.*]] ; IS__CGSCC_NPM-NEXT: br i1 [[TOBOOL]], label [[IF_END:%.*]], label [[IF_THEN:%.*]]
; IS__CGSCC_NPM: if.then: ; IS__CGSCC_NPM: if.then:
; IS__CGSCC_NPM-NEXT: store i32 [[X]], i32* [[CALL]], align 4 ; IS__CGSCC_NPM-NEXT: store i32 [[X]], i32* [[CALL]], align 4
; IS__CGSCC_NPM-NEXT: br label [[IF_END]] ; IS__CGSCC_NPM-NEXT: br label [[IF_END]]
; IS__CGSCC_NPM: if.end: ; IS__CGSCC_NPM: if.end:
Show All 32 Lines
; IS__TUNIT_OPM-NEXT: [[INNER:%.*]] = getelementptr inbounds [[STRUCT_STY]], %struct.STy* [[LOCAL]], i64 0, i32 2 ; IS__TUNIT_OPM-NEXT: [[INNER:%.*]] = getelementptr inbounds [[STRUCT_STY]], %struct.STy* [[LOCAL]], i64 0, i32 2
; IS__TUNIT_OPM-NEXT: [[CALL:%.*]] = call noalias dereferenceable_or_null(24) i8* @malloc(i64 noundef 24) ; IS__TUNIT_OPM-NEXT: [[CALL:%.*]] = call noalias dereferenceable_or_null(24) i8* @malloc(i64 noundef 24)
; IS__TUNIT_OPM-NEXT: [[DST1:%.*]] = bitcast i8* [[CALL]] to float** ; IS__TUNIT_OPM-NEXT: [[DST1:%.*]] = bitcast i8* [[CALL]] to float**
; IS__TUNIT_OPM-NEXT: store float* [[DST]], float** [[DST1]], align 8 ; IS__TUNIT_OPM-NEXT: store float* [[DST]], float** [[DST1]], align 8
; IS__TUNIT_OPM-NEXT: [[SRC2:%.*]] = getelementptr inbounds i8, i8* [[CALL]], i64 8 ; IS__TUNIT_OPM-NEXT: [[SRC2:%.*]] = getelementptr inbounds i8, i8* [[CALL]], i64 8
; IS__TUNIT_OPM-NEXT: [[TMP1:%.*]] = bitcast i8* [[SRC2]] to double** ; IS__TUNIT_OPM-NEXT: [[TMP1:%.*]] = bitcast i8* [[SRC2]] to double**
; IS__TUNIT_OPM-NEXT: store double* [[SRC]], double** [[TMP1]], align 8 ; IS__TUNIT_OPM-NEXT: store double* [[SRC]], double** [[TMP1]], align 8
; IS__TUNIT_OPM-NEXT: store i8* [[CALL]], i8** bitcast (%struct.STy** getelementptr inbounds ([[STRUCT_STY]], %struct.STy* @global, i64 0, i32 2) to i8**), align 8 ; IS__TUNIT_OPM-NEXT: store i8* [[CALL]], i8** bitcast (%struct.STy** getelementptr inbounds ([[STRUCT_STY]], %struct.STy* @global, i64 0, i32 2) to i8**), align 8
; IS__TUNIT_OPM-NEXT: call fastcc void @nested_memory_callee() #[[ATTR13:[0-9]+]] ; IS__TUNIT_OPM-NEXT: call fastcc void @nested_memory_callee() #[[ATTR18:[0-9]+]]
; IS__TUNIT_OPM-NEXT: ret void ; IS__TUNIT_OPM-NEXT: ret void
; ;
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@test_nested_memory ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@test_nested_memory
; IS__TUNIT_NPM-SAME: (float* nocapture nofree writeonly [[DST:%.*]], double* nocapture nofree readonly [[SRC:%.*]]) { ; IS__TUNIT_NPM-SAME: (float* nocapture nofree writeonly [[DST:%.*]], double* nocapture nofree readonly [[SRC:%.*]]) {
; IS__TUNIT_NPM-NEXT: entry: ; IS__TUNIT_NPM-NEXT: entry:
; IS__TUNIT_NPM-NEXT: [[LOCAL:%.*]] = alloca [[STRUCT_STY:%.*]], align 8 ; IS__TUNIT_NPM-NEXT: [[LOCAL:%.*]] = alloca [[STRUCT_STY:%.*]], align 8
; IS__TUNIT_NPM-NEXT: [[TMP0:%.*]] = bitcast %struct.STy* [[LOCAL]] to i8* ; IS__TUNIT_NPM-NEXT: [[TMP0:%.*]] = bitcast %struct.STy* [[LOCAL]] to i8*
; IS__TUNIT_NPM-NEXT: [[INNER:%.*]] = getelementptr inbounds [[STRUCT_STY]], %struct.STy* [[LOCAL]], i64 0, i32 2 ; IS__TUNIT_NPM-NEXT: [[INNER:%.*]] = getelementptr inbounds [[STRUCT_STY]], %struct.STy* [[LOCAL]], i64 0, i32 2
; IS__TUNIT_NPM-NEXT: [[TMP1:%.*]] = alloca i8, i64 24, align 1 ; IS__TUNIT_NPM-NEXT: [[TMP1:%.*]] = alloca i8, i64 24, align 1
; IS__TUNIT_NPM-NEXT: [[DST1:%.*]] = bitcast i8* [[TMP1]] to float** ; IS__TUNIT_NPM-NEXT: [[DST1:%.*]] = bitcast i8* [[TMP1]] to float**
; IS__TUNIT_NPM-NEXT: store float* [[DST]], float** [[DST1]], align 8 ; IS__TUNIT_NPM-NEXT: store float* [[DST]], float** [[DST1]], align 8
; IS__TUNIT_NPM-NEXT: [[SRC2:%.*]] = getelementptr inbounds i8, i8* [[TMP1]], i64 8 ; IS__TUNIT_NPM-NEXT: [[SRC2:%.*]] = getelementptr inbounds i8, i8* [[TMP1]], i64 8
; IS__TUNIT_NPM-NEXT: [[TMP2:%.*]] = bitcast i8* [[SRC2]] to double** ; IS__TUNIT_NPM-NEXT: [[TMP2:%.*]] = bitcast i8* [[SRC2]] to double**
; IS__TUNIT_NPM-NEXT: store double* [[SRC]], double** [[TMP2]], align 8 ; IS__TUNIT_NPM-NEXT: store double* [[SRC]], double** [[TMP2]], align 8
; IS__TUNIT_NPM-NEXT: store i8* [[TMP1]], i8** bitcast (%struct.STy** getelementptr inbounds ([[STRUCT_STY]], %struct.STy* @global, i64 0, i32 2) to i8**), align 8 ; IS__TUNIT_NPM-NEXT: store i8* [[TMP1]], i8** bitcast (%struct.STy** getelementptr inbounds ([[STRUCT_STY]], %struct.STy* @global, i64 0, i32 2) to i8**), align 8
; IS__TUNIT_NPM-NEXT: call fastcc void @nested_memory_callee() #[[ATTR11:[0-9]+]] ; IS__TUNIT_NPM-NEXT: call fastcc void @nested_memory_callee() #[[ATTR14:[0-9]+]]
; IS__TUNIT_NPM-NEXT: ret void ; IS__TUNIT_NPM-NEXT: ret void
; ;
; IS__CGSCC_OPM: Function Attrs: norecurse
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@test_nested_memory ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@test_nested_memory
; IS__CGSCC_OPM-SAME: (float* nocapture nofree writeonly [[DST:%.*]], double* nocapture nofree readonly [[SRC:%.*]]) { ; IS__CGSCC_OPM-SAME: (float* nocapture nofree writeonly [[DST:%.*]], double* nocapture nofree readonly [[SRC:%.*]]) #[[ATTR11]] {
; IS__CGSCC_OPM-NEXT: entry: ; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: [[LOCAL:%.*]] = alloca [[STRUCT_STY:%.*]], align 8 ; IS__CGSCC_OPM-NEXT: [[LOCAL:%.*]] = alloca [[STRUCT_STY:%.*]], align 8
; IS__CGSCC_OPM-NEXT: [[TMP0:%.*]] = bitcast %struct.STy* [[LOCAL]] to i8* ; IS__CGSCC_OPM-NEXT: [[TMP0:%.*]] = bitcast %struct.STy* [[LOCAL]] to i8*
; IS__CGSCC_OPM-NEXT: [[INNER:%.*]] = getelementptr inbounds [[STRUCT_STY]], %struct.STy* [[LOCAL]], i64 0, i32 2 ; IS__CGSCC_OPM-NEXT: [[INNER:%.*]] = getelementptr inbounds [[STRUCT_STY]], %struct.STy* [[LOCAL]], i64 0, i32 2
; IS__CGSCC_OPM-NEXT: [[CALL:%.*]] = call noalias dereferenceable_or_null(24) i8* @malloc(i64 noundef 24) ; IS__CGSCC_OPM-NEXT: [[CALL:%.*]] = call noalias dereferenceable_or_null(24) i8* @malloc(i64 noundef 24)
; IS__CGSCC_OPM-NEXT: [[DST1:%.*]] = bitcast i8* [[CALL]] to float** ; IS__CGSCC_OPM-NEXT: [[DST1:%.*]] = bitcast i8* [[CALL]] to float**
; IS__CGSCC_OPM-NEXT: store float* [[DST]], float** [[DST1]], align 8 ; IS__CGSCC_OPM-NEXT: store float* [[DST]], float** [[DST1]], align 8
; IS__CGSCC_OPM-NEXT: [[SRC2:%.*]] = getelementptr inbounds i8, i8* [[CALL]], i64 8 ; IS__CGSCC_OPM-NEXT: [[SRC2:%.*]] = getelementptr inbounds i8, i8* [[CALL]], i64 8
; IS__CGSCC_OPM-NEXT: [[TMP1:%.*]] = bitcast i8* [[SRC2]] to double** ; IS__CGSCC_OPM-NEXT: [[TMP1:%.*]] = bitcast i8* [[SRC2]] to double**
; IS__CGSCC_OPM-NEXT: store double* [[SRC]], double** [[TMP1]], align 8 ; IS__CGSCC_OPM-NEXT: store double* [[SRC]], double** [[TMP1]], align 8
; IS__CGSCC_OPM-NEXT: store i8* [[CALL]], i8** bitcast (%struct.STy** getelementptr inbounds ([[STRUCT_STY]], %struct.STy* @global, i64 0, i32 2) to i8**), align 8 ; IS__CGSCC_OPM-NEXT: store i8* [[CALL]], i8** bitcast (%struct.STy** getelementptr inbounds ([[STRUCT_STY]], %struct.STy* @global, i64 0, i32 2) to i8**), align 8
; IS__CGSCC_OPM-NEXT: call fastcc void @nested_memory_callee() #[[ATTR16]] ; IS__CGSCC_OPM-NEXT: call fastcc void @nested_memory_callee() #[[ATTR16]]
; IS__CGSCC_OPM-NEXT: ret void ; IS__CGSCC_OPM-NEXT: ret void
; ;
; IS__CGSCC_NPM: Function Attrs: norecurse
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@test_nested_memory ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@test_nested_memory
; IS__CGSCC_NPM-SAME: (float* nocapture nofree writeonly [[DST:%.*]], double* nocapture nofree readonly [[SRC:%.*]]) { ; IS__CGSCC_NPM-SAME: (float* nocapture nofree writeonly [[DST:%.*]], double* nocapture nofree readonly [[SRC:%.*]]) #[[ATTR9]] {
; IS__CGSCC_NPM-NEXT: entry: ; IS__CGSCC_NPM-NEXT: entry:
; IS__CGSCC_NPM-NEXT: [[LOCAL:%.*]] = alloca [[STRUCT_STY:%.*]], align 8 ; IS__CGSCC_NPM-NEXT: [[LOCAL:%.*]] = alloca [[STRUCT_STY:%.*]], align 8
; IS__CGSCC_NPM-NEXT: [[TMP0:%.*]] = bitcast %struct.STy* [[LOCAL]] to i8* ; IS__CGSCC_NPM-NEXT: [[TMP0:%.*]] = bitcast %struct.STy* [[LOCAL]] to i8*
; IS__CGSCC_NPM-NEXT: [[INNER:%.*]] = getelementptr inbounds [[STRUCT_STY]], %struct.STy* [[LOCAL]], i64 0, i32 2 ; IS__CGSCC_NPM-NEXT: [[INNER:%.*]] = getelementptr inbounds [[STRUCT_STY]], %struct.STy* [[LOCAL]], i64 0, i32 2
; IS__CGSCC_NPM-NEXT: [[TMP1:%.*]] = alloca i8, i64 24, align 1 ; IS__CGSCC_NPM-NEXT: [[TMP1:%.*]] = alloca i8, i64 24, align 1
; IS__CGSCC_NPM-NEXT: [[DST1:%.*]] = bitcast i8* [[TMP1]] to float** ; IS__CGSCC_NPM-NEXT: [[DST1:%.*]] = bitcast i8* [[TMP1]] to float**
; IS__CGSCC_NPM-NEXT: store float* [[DST]], float** [[DST1]], align 8 ; IS__CGSCC_NPM-NEXT: store float* [[DST]], float** [[DST1]], align 8
; IS__CGSCC_NPM-NEXT: [[SRC2:%.*]] = getelementptr inbounds i8, i8* [[TMP1]], i64 8 ; IS__CGSCC_NPM-NEXT: [[SRC2:%.*]] = getelementptr inbounds i8, i8* [[TMP1]], i64 8
Show All 15 Linesentry:
%1 = bitcast i8* %src2 to double** %1 = bitcast i8* %src2 to double**
store double* %src, double** %1, align 8 store double* %src, double** %1, align 8
store i8* %call, i8** bitcast (%struct.STy** getelementptr inbounds (%struct.STy, %struct.STy* @global, i64 0, i32 2) to i8**), align 8 store i8* %call, i8** bitcast (%struct.STy** getelementptr inbounds (%struct.STy, %struct.STy* @global, i64 0, i32 2) to i8**), align 8
call fastcc void @nested_memory_callee(%struct.STy* nonnull %local) call fastcc void @nested_memory_callee(%struct.STy* nonnull %local)
ret void ret void
} }
define internal fastcc void @nested_memory_callee(%struct.STy* nocapture readonly %S) nofree norecurse nounwind uwtable { define internal fastcc void @nested_memory_callee(%struct.STy* nocapture readonly %S) nofree norecurse nounwind uwtable {
; IS__TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind uwtable willreturn ; IS________OPM: Function Attrs: nofree norecurse nosync nounwind uwtable willreturn
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@nested_memory_callee ; IS________OPM-LABEL: define {{[^@]+}}@nested_memory_callee
; IS__TUNIT_OPM-SAME: () #[[ATTR9:[0-9]+]] { ; IS________OPM-SAME: () #[[ATTR12:[0-9]+]] {
; IS__TUNIT_OPM-NEXT: entry: ; IS________OPM-NEXT: entry:
; IS__TUNIT_OPM-NEXT: [[TMP0:%.*]] = load %struct.STy*, %struct.STy** getelementptr inbounds ([[STRUCT_STY:%.*]], %struct.STy* @global, i64 0, i32 2), align 8 ; IS________OPM-NEXT: [[TMP0:%.*]] = load %struct.STy*, %struct.STy** getelementptr inbounds ([[STRUCT_STY:%.*]], %struct.STy* @global, i64 0, i32 2), align 8
; IS__TUNIT_OPM-NEXT: [[SRC:%.*]] = getelementptr inbounds [[STRUCT_STY]], %struct.STy* [[TMP0]], i64 0, i32 1 ; IS________OPM-NEXT: [[SRC:%.*]] = getelementptr inbounds [[STRUCT_STY]], %struct.STy* [[TMP0]], i64 0, i32 1
; IS__TUNIT_OPM-NEXT: [[TMP1:%.*]] = load double*, double** [[SRC]], align 8 ; IS________OPM-NEXT: [[TMP1:%.*]] = load double*, double** [[SRC]], align 8
; IS__TUNIT_OPM-NEXT: [[TMP2:%.*]] = load double, double* [[TMP1]], align 8 ; IS________OPM-NEXT: [[TMP2:%.*]] = load double, double* [[TMP1]], align 8
; IS__TUNIT_OPM-NEXT: [[CONV:%.*]] = fptrunc double [[TMP2]] to float ; IS________OPM-NEXT: [[CONV:%.*]] = fptrunc double [[TMP2]] to float
; IS__TUNIT_OPM-NEXT: [[DST:%.*]] = getelementptr inbounds [[STRUCT_STY]], %struct.STy* [[TMP0]], i64 0, i32 0 ; IS________OPM-NEXT: [[DST:%.*]] = getelementptr inbounds [[STRUCT_STY]], %struct.STy* [[TMP0]], i64 0, i32 0
; IS__TUNIT_OPM-NEXT: [[TMP3:%.*]] = load float*, float** [[DST]], align 8 ; IS________OPM-NEXT: [[TMP3:%.*]] = load float*, float** [[DST]], align 8
; IS__TUNIT_OPM-NEXT: store float [[CONV]], float* [[TMP3]], align 4 ; IS________OPM-NEXT: store float [[CONV]], float* [[TMP3]], align 4
; IS__TUNIT_OPM-NEXT: ret void ; IS________OPM-NEXT: ret void
; ;
; IS__TUNIT_NPM: Function Attrs: nofree norecurse nosync nounwind uwtable willreturn ; IS__TUNIT_NPM: Function Attrs: nofree norecurse nosync nounwind uwtable willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@nested_memory_callee ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@nested_memory_callee
; IS__TUNIT_NPM-SAME: () #[[ATTR7:[0-9]+]] { ; IS__TUNIT_NPM-SAME: () #[[ATTR9:[0-9]+]] {
; IS__TUNIT_NPM-NEXT: entry: ; IS__TUNIT_NPM-NEXT: entry:
; IS__TUNIT_NPM-NEXT: [[TMP0:%.*]] = load %struct.STy*, %struct.STy** getelementptr inbounds ([[STRUCT_STY:%.*]], %struct.STy* @global, i64 0, i32 2), align 8 ; IS__TUNIT_NPM-NEXT: [[TMP0:%.*]] = load %struct.STy*, %struct.STy** getelementptr inbounds ([[STRUCT_STY:%.*]], %struct.STy* @global, i64 0, i32 2), align 8
; IS__TUNIT_NPM-NEXT: [[SRC:%.*]] = getelementptr inbounds [[STRUCT_STY]], %struct.STy* [[TMP0]], i64 0, i32 1 ; IS__TUNIT_NPM-NEXT: [[SRC:%.*]] = getelementptr inbounds [[STRUCT_STY]], %struct.STy* [[TMP0]], i64 0, i32 1
; IS__TUNIT_NPM-NEXT: [[TMP1:%.*]] = load double*, double** [[SRC]], align 8 ; IS__TUNIT_NPM-NEXT: [[TMP1:%.*]] = load double*, double** [[SRC]], align 8
; IS__TUNIT_NPM-NEXT: [[TMP2:%.*]] = load double, double* [[TMP1]], align 8 ; IS__TUNIT_NPM-NEXT: [[TMP2:%.*]] = load double, double* [[TMP1]], align 8
; IS__TUNIT_NPM-NEXT: [[CONV:%.*]] = fptrunc double [[TMP2]] to float ; IS__TUNIT_NPM-NEXT: [[CONV:%.*]] = fptrunc double [[TMP2]] to float
; IS__TUNIT_NPM-NEXT: [[DST:%.*]] = getelementptr inbounds [[STRUCT_STY]], %struct.STy* [[TMP0]], i64 0, i32 0 ; IS__TUNIT_NPM-NEXT: [[DST:%.*]] = getelementptr inbounds [[STRUCT_STY]], %struct.STy* [[TMP0]], i64 0, i32 0
; IS__TUNIT_NPM-NEXT: [[TMP3:%.*]] = load float*, float** [[DST]], align 8 ; IS__TUNIT_NPM-NEXT: [[TMP3:%.*]] = load float*, float** [[DST]], align 8
; IS__TUNIT_NPM-NEXT: store float [[CONV]], float* [[TMP3]], align 4 ; IS__TUNIT_NPM-NEXT: store float [[CONV]], float* [[TMP3]], align 4
; IS__TUNIT_NPM-NEXT: ret void ; IS__TUNIT_NPM-NEXT: ret void
; ;
; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind uwtable willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@nested_memory_callee
; IS__CGSCC_OPM-SAME: () #[[ATTR12:[0-9]+]] {
; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: [[TMP0:%.*]] = load %struct.STy*, %struct.STy** getelementptr inbounds ([[STRUCT_STY:%.*]], %struct.STy* @global, i64 0, i32 2), align 8
; IS__CGSCC_OPM-NEXT: [[SRC:%.*]] = getelementptr inbounds [[STRUCT_STY]], %struct.STy* [[TMP0]], i64 0, i32 1
; IS__CGSCC_OPM-NEXT: [[TMP1:%.*]] = load double*, double** [[SRC]], align 8
; IS__CGSCC_OPM-NEXT: [[TMP2:%.*]] = load double, double* [[TMP1]], align 8
; IS__CGSCC_OPM-NEXT: [[CONV:%.*]] = fptrunc double [[TMP2]] to float
; IS__CGSCC_OPM-NEXT: [[DST:%.*]] = getelementptr inbounds [[STRUCT_STY]], %struct.STy* [[TMP0]], i64 0, i32 0
; IS__CGSCC_OPM-NEXT: [[TMP3:%.*]] = load float*, float** [[DST]], align 8
; IS__CGSCC_OPM-NEXT: store float [[CONV]], float* [[TMP3]], align 4
; IS__CGSCC_OPM-NEXT: ret void
;
; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind uwtable willreturn ; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind uwtable willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@nested_memory_callee ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@nested_memory_callee
; IS__CGSCC_NPM-SAME: () #[[ATTR10:[0-9]+]] { ; IS__CGSCC_NPM-SAME: () #[[ATTR10:[0-9]+]] {
; IS__CGSCC_NPM-NEXT: entry: ; IS__CGSCC_NPM-NEXT: entry:
; IS__CGSCC_NPM-NEXT: [[TMP0:%.*]] = load %struct.STy*, %struct.STy** getelementptr inbounds ([[STRUCT_STY:%.*]], %struct.STy* @global, i64 0, i32 2), align 8 ; IS__CGSCC_NPM-NEXT: [[TMP0:%.*]] = load %struct.STy*, %struct.STy** getelementptr inbounds ([[STRUCT_STY:%.*]], %struct.STy* @global, i64 0, i32 2), align 8
; IS__CGSCC_NPM-NEXT: [[SRC:%.*]] = getelementptr inbounds [[STRUCT_STY]], %struct.STy* [[TMP0]], i64 0, i32 1 ; IS__CGSCC_NPM-NEXT: [[SRC:%.*]] = getelementptr inbounds [[STRUCT_STY]], %struct.STy* [[TMP0]], i64 0, i32 1
; IS__CGSCC_NPM-NEXT: [[TMP1:%.*]] = load double*, double** [[SRC]], align 8 ; IS__CGSCC_NPM-NEXT: [[TMP1:%.*]] = load double*, double** [[SRC]], align 8
; IS__CGSCC_NPM-NEXT: [[TMP2:%.*]] = load double, double* [[TMP1]], align 8 ; IS__CGSCC_NPM-NEXT: [[TMP2:%.*]] = load double, double* [[TMP1]], align 8
Show All 16 Linesentry:
%4 = load float*, float** %dst, align 8 %4 = load float*, float** %dst, align 8
store float %conv, float* %4, align 4 store float %conv, float* %4, align 4
ret void ret void
} }
; Make sure the access %1 is not forwarded to the loads %2 and %3 as the indices are ; Make sure the access %1 is not forwarded to the loads %2 and %3 as the indices are
; varying and the accesses thus not "exact". This used to simplify %cmp12 to true. ; varying and the accesses thus not "exact". This used to simplify %cmp12 to true.
define hidden void @no_propagation_of_unknown_index_access(i32* %in, i32* %out, i32 %idx) #0 { define hidden void @no_propagation_of_unknown_index_access(i32* %in, i32* %out, i32 %idx) #0 {
; IS__TUNIT_OPM: Function Attrs: argmemonly nofree nosync nounwind ; IS________OPM: Function Attrs: argmemonly nofree nosync nounwind
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@no_propagation_of_unknown_index_access ; IS________OPM-LABEL: define {{[^@]+}}@no_propagation_of_unknown_index_access
; IS__TUNIT_OPM-SAME: (i32* nocapture nofree readonly [[IN:%.*]], i32* nocapture nofree writeonly [[OUT:%.*]], i32 [[IDX:%.*]]) #[[ATTR10:[0-9]+]] { ; IS________OPM-SAME: (i32* nocapture nofree readonly [[IN:%.*]], i32* nocapture nofree writeonly [[OUT:%.*]], i32 [[IDX:%.*]]) #[[ATTR13:[0-9]+]] {
; IS__TUNIT_OPM-NEXT: entry: ; IS________OPM-NEXT: entry:
; IS__TUNIT_OPM-NEXT: [[BUF:%.*]] = alloca [128 x i32], align 16 ; IS________OPM-NEXT: [[BUF:%.*]] = alloca [128 x i32], align 16
; IS__TUNIT_OPM-NEXT: [[TMP0:%.*]] = bitcast [128 x i32]* [[BUF]] to i8* ; IS________OPM-NEXT: [[TMP0:%.*]] = bitcast [128 x i32]* [[BUF]] to i8*
; IS__TUNIT_OPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 512, i8* nocapture nofree noundef nonnull align 16 dereferenceable(512) [[TMP0]]) ; IS________OPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 512, i8* nocapture nofree noundef nonnull align 16 dereferenceable(512) [[TMP0]])
; IS__TUNIT_OPM-NEXT: br label [[FOR_COND:%.*]] ; IS________OPM-NEXT: br label [[FOR_COND:%.*]]
; IS__TUNIT_OPM: for.cond: ; IS________OPM: for.cond:
; IS__TUNIT_OPM-NEXT: [[I_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INC:%.*]], [[FOR_BODY:%.*]] ] ; IS________OPM-NEXT: [[I_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INC:%.*]], [[FOR_BODY:%.*]] ]
; IS__TUNIT_OPM-NEXT: [[CMP:%.*]] = icmp slt i32 [[I_0]], 128 ; IS________OPM-NEXT: [[CMP:%.*]] = icmp slt i32 [[I_0]], 128
; IS__TUNIT_OPM-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_COND_CLEANUP:%.*]] ; IS________OPM-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_COND_CLEANUP:%.*]]
; IS__TUNIT_OPM: for.cond.cleanup: ; IS________OPM: for.cond.cleanup:
; IS__TUNIT_OPM-NEXT: br label [[FOR_COND4:%.*]] ; IS________OPM-NEXT: br label [[FOR_COND4:%.*]]
; IS__TUNIT_OPM: for.body: ; IS________OPM: for.body:
; IS__TUNIT_OPM-NEXT: [[IDXPROM:%.*]] = sext i32 [[I_0]] to i64 ; IS________OPM-NEXT: [[IDXPROM:%.*]] = sext i32 [[I_0]] to i64
; IS__TUNIT_OPM-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[IN]], i64 [[IDXPROM]] ; IS________OPM-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[IN]], i64 [[IDXPROM]]
; IS__TUNIT_OPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 ; IS________OPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
; IS__TUNIT_OPM-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds [128 x i32], [128 x i32]* [[BUF]], i64 0, i64 [[IDXPROM]] ; IS________OPM-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds [128 x i32], [128 x i32]* [[BUF]], i64 0, i64 [[IDXPROM]]
; IS__TUNIT_OPM-NEXT: store i32 [[TMP1]], i32* [[ARRAYIDX2]], align 4 ; IS________OPM-NEXT: store i32 [[TMP1]], i32* [[ARRAYIDX2]], align 4
; IS__TUNIT_OPM-NEXT: [[INC]] = add nsw i32 [[I_0]], 1 ; IS________OPM-NEXT: [[INC]] = add nsw i32 [[I_0]], 1
; IS__TUNIT_OPM-NEXT: br label [[FOR_COND]], !llvm.loop [[TBAA10]] ; IS________OPM-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
; IS__TUNIT_OPM: for.cond4: ; IS________OPM: for.cond4:
; IS__TUNIT_OPM-NEXT: [[I3_0:%.*]] = phi i32 [ 0, [[FOR_COND_CLEANUP]] ], [ [[INC16:%.*]], [[FOR_BODY7:%.*]] ] ; IS________OPM-NEXT: [[I3_0:%.*]] = phi i32 [ 0, [[FOR_COND_CLEANUP]] ], [ [[INC16:%.*]], [[FOR_BODY7:%.*]] ]
; IS__TUNIT_OPM-NEXT: [[CMP5:%.*]] = icmp slt i32 [[I3_0]], 128 ; IS________OPM-NEXT: [[CMP5:%.*]] = icmp slt i32 [[I3_0]], 128
; IS__TUNIT_OPM-NEXT: br i1 [[CMP5]], label [[FOR_BODY7]], label [[FOR_COND_CLEANUP6:%.*]] ; IS________OPM-NEXT: br i1 [[CMP5]], label [[FOR_BODY7]], label [[FOR_COND_CLEANUP6:%.*]]
; IS__TUNIT_OPM: for.cond.cleanup6: ; IS________OPM: for.cond.cleanup6:
; IS__TUNIT_OPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 512, i8* nocapture nofree noundef nonnull align 16 dereferenceable(512) [[TMP0]]) ; IS________OPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 512, i8* nocapture nofree noundef nonnull align 16 dereferenceable(512) [[TMP0]])
; IS__TUNIT_OPM-NEXT: ret void ; IS________OPM-NEXT: ret void
; IS__TUNIT_OPM: for.body7: ; IS________OPM: for.body7:
; IS__TUNIT_OPM-NEXT: [[IDXPROM8:%.*]] = sext i32 [[I3_0]] to i64 ; IS________OPM-NEXT: [[IDXPROM8:%.*]] = sext i32 [[I3_0]] to i64
; IS__TUNIT_OPM-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [128 x i32], [128 x i32]* [[BUF]], i64 0, i64 [[IDXPROM8]] ; IS________OPM-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [128 x i32], [128 x i32]* [[BUF]], i64 0, i64 [[IDXPROM8]]
; IS__TUNIT_OPM-NEXT: [[TMP2:%.*]] = load i32, i32* [[ARRAYIDX9]], align 4 ; IS________OPM-NEXT: [[TMP2:%.*]] = load i32, i32* [[ARRAYIDX9]], align 4
; IS__TUNIT_OPM-NEXT: [[IDXPROM10:%.*]] = sext i32 [[IDX]] to i64 ; IS________OPM-NEXT: [[IDXPROM10:%.*]] = sext i32 [[IDX]] to i64
; IS__TUNIT_OPM-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds [128 x i32], [128 x i32]* [[BUF]], i64 0, i64 [[IDXPROM10]] ; IS________OPM-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds [128 x i32], [128 x i32]* [[BUF]], i64 0, i64 [[IDXPROM10]]
; IS__TUNIT_OPM-NEXT: [[TMP3:%.*]] = load i32, i32* [[ARRAYIDX11]], align 4 ; IS________OPM-NEXT: [[TMP3:%.*]] = load i32, i32* [[ARRAYIDX11]], align 4
; IS__TUNIT_OPM-NEXT: [[CMP12:%.*]] = icmp sle i32 [[TMP2]], [[TMP3]] ; IS________OPM-NEXT: [[CMP12:%.*]] = icmp sle i32 [[TMP2]], [[TMP3]]
; IS__TUNIT_OPM-NEXT: [[CONV:%.*]] = zext i1 [[CMP12]] to i32 ; IS________OPM-NEXT: [[CONV:%.*]] = zext i1 [[CMP12]] to i32
; IS__TUNIT_OPM-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds i32, i32* [[OUT]], i64 [[IDXPROM8]] ; IS________OPM-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds i32, i32* [[OUT]], i64 [[IDXPROM8]]
; IS__TUNIT_OPM-NEXT: store i32 [[CONV]], i32* [[ARRAYIDX14]], align 4 ; IS________OPM-NEXT: store i32 [[CONV]], i32* [[ARRAYIDX14]], align 4
; IS__TUNIT_OPM-NEXT: [[INC16]] = add nsw i32 [[I3_0]], 1 ; IS________OPM-NEXT: [[INC16]] = add nsw i32 [[I3_0]], 1
; IS__TUNIT_OPM-NEXT: br label [[FOR_COND4]], !llvm.loop [[TBAA12]] ; IS________OPM-NEXT: br label [[FOR_COND4]], !llvm.loop [[LOOP12:![0-9]+]]
; ;
; IS__TUNIT_NPM: Function Attrs: argmemonly nofree nosync nounwind willreturn ; IS__TUNIT_NPM: Function Attrs: argmemonly nofree nosync nounwind willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@no_propagation_of_unknown_index_access ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@no_propagation_of_unknown_index_access
; IS__TUNIT_NPM-SAME: (i32* nocapture nofree readonly [[IN:%.*]], i32* nocapture nofree writeonly [[OUT:%.*]], i32 [[IDX:%.*]]) #[[ATTR1]] { ; IS__TUNIT_NPM-SAME: (i32* nocapture nofree readonly [[IN:%.*]], i32* nocapture nofree writeonly [[OUT:%.*]], i32 [[IDX:%.*]]) #[[ATTR1]] {
; IS__TUNIT_NPM-NEXT: entry: ; IS__TUNIT_NPM-NEXT: entry:
; IS__TUNIT_NPM-NEXT: [[BUF:%.*]] = alloca [128 x i32], align 16 ; IS__TUNIT_NPM-NEXT: [[BUF:%.*]] = alloca [128 x i32], align 16
; IS__TUNIT_NPM-NEXT: [[TMP0:%.*]] = bitcast [128 x i32]* [[BUF]] to i8* ; IS__TUNIT_NPM-NEXT: [[TMP0:%.*]] = bitcast [128 x i32]* [[BUF]] to i8*
; IS__TUNIT_NPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 512, i8* nocapture nofree noundef nonnull align 16 dereferenceable(512) [[TMP0]]) #[[ATTR9]] ; IS__TUNIT_NPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 512, i8* nocapture nofree noundef nonnull align 16 dereferenceable(512) [[TMP0]]) #[[ATTR11]]
; IS__TUNIT_NPM-NEXT: br label [[FOR_COND:%.*]] ; IS__TUNIT_NPM-NEXT: br label [[FOR_COND:%.*]]
; IS__TUNIT_NPM: for.cond: ; IS__TUNIT_NPM: for.cond:
; IS__TUNIT_NPM-NEXT: [[I_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INC:%.*]], [[FOR_BODY:%.*]] ] ; IS__TUNIT_NPM-NEXT: [[I_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INC:%.*]], [[FOR_BODY:%.*]] ]
; IS__TUNIT_NPM-NEXT: [[CMP:%.*]] = icmp slt i32 [[I_0]], 128 ; IS__TUNIT_NPM-NEXT: [[CMP:%.*]] = icmp slt i32 [[I_0]], 128
; IS__TUNIT_NPM-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_COND_CLEANUP:%.*]] ; IS__TUNIT_NPM-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_COND_CLEANUP:%.*]]
; IS__TUNIT_NPM: for.cond.cleanup: ; IS__TUNIT_NPM: for.cond.cleanup:
; IS__TUNIT_NPM-NEXT: br label [[FOR_COND4:%.*]] ; IS__TUNIT_NPM-NEXT: br label [[FOR_COND4:%.*]]
; IS__TUNIT_NPM: for.body: ; IS__TUNIT_NPM: for.body:
; IS__TUNIT_NPM-NEXT: [[IDXPROM:%.*]] = sext i32 [[I_0]] to i64 ; IS__TUNIT_NPM-NEXT: [[IDXPROM:%.*]] = sext i32 [[I_0]] to i64
; IS__TUNIT_NPM-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[IN]], i64 [[IDXPROM]] ; IS__TUNIT_NPM-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[IN]], i64 [[IDXPROM]]
; IS__TUNIT_NPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 ; IS__TUNIT_NPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
; IS__TUNIT_NPM-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds [128 x i32], [128 x i32]* [[BUF]], i64 0, i64 [[IDXPROM]] ; IS__TUNIT_NPM-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds [128 x i32], [128 x i32]* [[BUF]], i64 0, i64 [[IDXPROM]]
; IS__TUNIT_NPM-NEXT: store i32 [[TMP1]], i32* [[ARRAYIDX2]], align 4 ; IS__TUNIT_NPM-NEXT: store i32 [[TMP1]], i32* [[ARRAYIDX2]], align 4
; IS__TUNIT_NPM-NEXT: [[INC]] = add nsw i32 [[I_0]], 1 ; IS__TUNIT_NPM-NEXT: [[INC]] = add nsw i32 [[I_0]], 1
; IS__TUNIT_NPM-NEXT: br label [[FOR_COND]], !llvm.loop [[TBAA10]] ; IS__TUNIT_NPM-NEXT: br label [[FOR_COND]], !llvm.loop [[TBAA10]]
; IS__TUNIT_NPM: for.cond4: ; IS__TUNIT_NPM: for.cond4:
; IS__TUNIT_NPM-NEXT: [[I3_0:%.*]] = phi i32 [ 0, [[FOR_COND_CLEANUP]] ], [ [[INC16:%.*]], [[FOR_BODY7:%.*]] ] ; IS__TUNIT_NPM-NEXT: [[I3_0:%.*]] = phi i32 [ 0, [[FOR_COND_CLEANUP]] ], [ [[INC16:%.*]], [[FOR_BODY7:%.*]] ]
; IS__TUNIT_NPM-NEXT: [[CMP5:%.*]] = icmp slt i32 [[I3_0]], 128 ; IS__TUNIT_NPM-NEXT: [[CMP5:%.*]] = icmp slt i32 [[I3_0]], 128
; IS__TUNIT_NPM-NEXT: br i1 [[CMP5]], label [[FOR_BODY7]], label [[FOR_COND_CLEANUP6:%.*]] ; IS__TUNIT_NPM-NEXT: br i1 [[CMP5]], label [[FOR_BODY7]], label [[FOR_COND_CLEANUP6:%.*]]
; IS__TUNIT_NPM: for.cond.cleanup6: ; IS__TUNIT_NPM: for.cond.cleanup6:
; IS__TUNIT_NPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 512, i8* nocapture nofree noundef nonnull align 16 dereferenceable(512) [[TMP0]]) #[[ATTR9]] ; IS__TUNIT_NPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 512, i8* nocapture nofree noundef nonnull align 16 dereferenceable(512) [[TMP0]]) #[[ATTR11]]
; IS__TUNIT_NPM-NEXT: ret void ; IS__TUNIT_NPM-NEXT: ret void
; IS__TUNIT_NPM: for.body7: ; IS__TUNIT_NPM: for.body7:
; IS__TUNIT_NPM-NEXT: [[IDXPROM8:%.*]] = sext i32 [[I3_0]] to i64 ; IS__TUNIT_NPM-NEXT: [[IDXPROM8:%.*]] = sext i32 [[I3_0]] to i64
; IS__TUNIT_NPM-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [128 x i32], [128 x i32]* [[BUF]], i64 0, i64 [[IDXPROM8]] ; IS__TUNIT_NPM-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [128 x i32], [128 x i32]* [[BUF]], i64 0, i64 [[IDXPROM8]]
; IS__TUNIT_NPM-NEXT: [[TMP2:%.*]] = load i32, i32* [[ARRAYIDX9]], align 4 ; IS__TUNIT_NPM-NEXT: [[TMP2:%.*]] = load i32, i32* [[ARRAYIDX9]], align 4
; IS__TUNIT_NPM-NEXT: [[IDXPROM10:%.*]] = sext i32 [[IDX]] to i64 ; IS__TUNIT_NPM-NEXT: [[IDXPROM10:%.*]] = sext i32 [[IDX]] to i64
; IS__TUNIT_NPM-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds [128 x i32], [128 x i32]* [[BUF]], i64 0, i64 [[IDXPROM10]] ; IS__TUNIT_NPM-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds [128 x i32], [128 x i32]* [[BUF]], i64 0, i64 [[IDXPROM10]]
; IS__TUNIT_NPM-NEXT: [[TMP3:%.*]] = load i32, i32* [[ARRAYIDX11]], align 4 ; IS__TUNIT_NPM-NEXT: [[TMP3:%.*]] = load i32, i32* [[ARRAYIDX11]], align 4
; IS__TUNIT_NPM-NEXT: [[CMP12:%.*]] = icmp sle i32 [[TMP2]], [[TMP3]] ; IS__TUNIT_NPM-NEXT: [[CMP12:%.*]] = icmp sle i32 [[TMP2]], [[TMP3]]
; IS__TUNIT_NPM-NEXT: [[CONV:%.*]] = zext i1 [[CMP12]] to i32 ; IS__TUNIT_NPM-NEXT: [[CONV:%.*]] = zext i1 [[CMP12]] to i32
; IS__TUNIT_NPM-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds i32, i32* [[OUT]], i64 [[IDXPROM8]] ; IS__TUNIT_NPM-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds i32, i32* [[OUT]], i64 [[IDXPROM8]]
; IS__TUNIT_NPM-NEXT: store i32 [[CONV]], i32* [[ARRAYIDX14]], align 4 ; IS__TUNIT_NPM-NEXT: store i32 [[CONV]], i32* [[ARRAYIDX14]], align 4
; IS__TUNIT_NPM-NEXT: [[INC16]] = add nsw i32 [[I3_0]], 1 ; IS__TUNIT_NPM-NEXT: [[INC16]] = add nsw i32 [[I3_0]], 1
; IS__TUNIT_NPM-NEXT: br label [[FOR_COND4]], !llvm.loop [[TBAA12]] ; IS__TUNIT_NPM-NEXT: br label [[FOR_COND4]], !llvm.loop [[TBAA12]]
; ;
; IS__CGSCC_OPM: Function Attrs: argmemonly nofree nosync nounwind
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@no_propagation_of_unknown_index_access
; IS__CGSCC_OPM-SAME: (i32* nocapture nofree readonly [[IN:%.*]], i32* nocapture nofree writeonly [[OUT:%.*]], i32 [[IDX:%.*]]) #[[ATTR13:[0-9]+]] {
; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: [[BUF:%.*]] = alloca [128 x i32], align 16
; IS__CGSCC_OPM-NEXT: [[TMP0:%.*]] = bitcast [128 x i32]* [[BUF]] to i8*
; IS__CGSCC_OPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 512, i8* nocapture nofree noundef nonnull align 16 dereferenceable(512) [[TMP0]])
; IS__CGSCC_OPM-NEXT: br label [[FOR_COND:%.*]]
; IS__CGSCC_OPM: for.cond:
; IS__CGSCC_OPM-NEXT: [[I_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INC:%.*]], [[FOR_BODY:%.*]] ]
; IS__CGSCC_OPM-NEXT: [[CMP:%.*]] = icmp slt i32 [[I_0]], 128
; IS__CGSCC_OPM-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_COND_CLEANUP:%.*]]
; IS__CGSCC_OPM: for.cond.cleanup:
; IS__CGSCC_OPM-NEXT: br label [[FOR_COND4:%.*]]
; IS__CGSCC_OPM: for.body:
; IS__CGSCC_OPM-NEXT: [[IDXPROM:%.*]] = sext i32 [[I_0]] to i64
; IS__CGSCC_OPM-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[IN]], i64 [[IDXPROM]]
; IS__CGSCC_OPM-NEXT: [[TMP1:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
; IS__CGSCC_OPM-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds [128 x i32], [128 x i32]* [[BUF]], i64 0, i64 [[IDXPROM]]
; IS__CGSCC_OPM-NEXT: store i32 [[TMP1]], i32* [[ARRAYIDX2]], align 4
; IS__CGSCC_OPM-NEXT: [[INC]] = add nsw i32 [[I_0]], 1
; IS__CGSCC_OPM-NEXT: br label [[FOR_COND]], !llvm.loop [[TBAA10]]
; IS__CGSCC_OPM: for.cond4:
; IS__CGSCC_OPM-NEXT: [[I3_0:%.*]] = phi i32 [ 0, [[FOR_COND_CLEANUP]] ], [ [[INC16:%.*]], [[FOR_BODY7:%.*]] ]
; IS__CGSCC_OPM-NEXT: [[CMP5:%.*]] = icmp slt i32 [[I3_0]], 128
; IS__CGSCC_OPM-NEXT: br i1 [[CMP5]], label [[FOR_BODY7]], label [[FOR_COND_CLEANUP6:%.*]]
; IS__CGSCC_OPM: for.cond.cleanup6:
; IS__CGSCC_OPM-NEXT: call void @llvm.lifetime.end.p0i8(i64 noundef 512, i8* nocapture nofree noundef nonnull align 16 dereferenceable(512) [[TMP0]])
; IS__CGSCC_OPM-NEXT: ret void
; IS__CGSCC_OPM: for.body7:
; IS__CGSCC_OPM-NEXT: [[IDXPROM8:%.*]] = sext i32 [[I3_0]] to i64
; IS__CGSCC_OPM-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [128 x i32], [128 x i32]* [[BUF]], i64 0, i64 [[IDXPROM8]]
; IS__CGSCC_OPM-NEXT: [[TMP2:%.*]] = load i32, i32* [[ARRAYIDX9]], align 4
; IS__CGSCC_OPM-NEXT: [[IDXPROM10:%.*]] = sext i32 [[IDX]] to i64
; IS__CGSCC_OPM-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds [128 x i32], [128 x i32]* [[BUF]], i64 0, i64 [[IDXPROM10]]
; IS__CGSCC_OPM-NEXT: [[TMP3:%.*]] = load i32, i32* [[ARRAYIDX11]], align 4
; IS__CGSCC_OPM-NEXT: [[CMP12:%.*]] = icmp sle i32 [[TMP2]], [[TMP3]]
; IS__CGSCC_OPM-NEXT: [[CONV:%.*]] = zext i1 [[CMP12]] to i32
; IS__CGSCC_OPM-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds i32, i32* [[OUT]], i64 [[IDXPROM8]]
; IS__CGSCC_OPM-NEXT: store i32 [[CONV]], i32* [[ARRAYIDX14]], align 4
; IS__CGSCC_OPM-NEXT: [[INC16]] = add nsw i32 [[I3_0]], 1
; IS__CGSCC_OPM-NEXT: br label [[FOR_COND4]], !llvm.loop [[TBAA12]]
;
; IS__CGSCC_NPM: Function Attrs: argmemonly nofree nosync nounwind willreturn ; IS__CGSCC_NPM: Function Attrs: argmemonly nofree nosync nounwind willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@no_propagation_of_unknown_index_access ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@no_propagation_of_unknown_index_access
; IS__CGSCC_NPM-SAME: (i32* nocapture nofree readonly [[IN:%.*]], i32* nocapture nofree writeonly [[OUT:%.*]], i32 [[IDX:%.*]]) #[[ATTR1]] { ; IS__CGSCC_NPM-SAME: (i32* nocapture nofree readonly [[IN:%.*]], i32* nocapture nofree writeonly [[OUT:%.*]], i32 [[IDX:%.*]]) #[[ATTR1]] {
; IS__CGSCC_NPM-NEXT: entry: ; IS__CGSCC_NPM-NEXT: entry:
; IS__CGSCC_NPM-NEXT: [[BUF:%.*]] = alloca [128 x i32], align 16 ; IS__CGSCC_NPM-NEXT: [[BUF:%.*]] = alloca [128 x i32], align 16
; IS__CGSCC_NPM-NEXT: [[TMP0:%.*]] = bitcast [128 x i32]* [[BUF]] to i8* ; IS__CGSCC_NPM-NEXT: [[TMP0:%.*]] = bitcast [128 x i32]* [[BUF]] to i8*
; IS__CGSCC_NPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 512, i8* nocapture nofree noundef nonnull align 16 dereferenceable(512) [[TMP0]]) #[[ATTR12]] ; IS__CGSCC_NPM-NEXT: call void @llvm.lifetime.start.p0i8(i64 noundef 512, i8* nocapture nofree noundef nonnull align 16 dereferenceable(512) [[TMP0]]) #[[ATTR12]]
; IS__CGSCC_NPM-NEXT: br label [[FOR_COND:%.*]] ; IS__CGSCC_NPM-NEXT: br label [[FOR_COND:%.*]]
▲ Show 20 Lines • Show All 110 Lines • ▼ Show 20 Lines
!25 = distinct !{!25, !17} !25 = distinct !{!25, !17}
!26 = distinct !{!26, !17} !26 = distinct !{!26, !17}
!27 = distinct !{!27, !17} !27 = distinct !{!27, !17}
!28 = distinct !{!28, !17} !28 = distinct !{!28, !17}
!29 = distinct !{!29, !17} !29 = distinct !{!29, !17}
!30 = distinct !{!30, !17} !30 = distinct !{!30, !17}
!31 = distinct !{!31, !17} !31 = distinct !{!31, !17}
;. ;.
; IS__TUNIT_OPM: attributes #[[ATTR0]] = { argmemonly nofree nosync nounwind willreturn writeonly } ; IS__TUNIT_OPM: attributes #[[ATTR0]] = { argmemonly nofree norecurse nosync nounwind willreturn writeonly }
; IS__TUNIT_OPM: attributes #[[ATTR1]] = { argmemonly nofree nosync nounwind willreturn } ; IS__TUNIT_OPM: attributes #[[ATTR1]] = { argmemonly nofree nosync nounwind willreturn }
; IS__TUNIT_OPM: attributes #[[ATTR2]] = { nofree nosync nounwind } ; IS__TUNIT_OPM: attributes #[[ATTR2]] = { nofree nosync nounwind }
; IS__TUNIT_OPM: attributes #[[ATTR3]] = { nofree nosync nounwind readnone willreturn } ; IS__TUNIT_OPM: attributes #[[ATTR3]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__TUNIT_OPM: attributes #[[ATTR4]] = { nofree nosync nounwind willreturn } ; IS__TUNIT_OPM: attributes #[[ATTR4]] = { nofree nosync nounwind willreturn }
; IS__TUNIT_OPM: attributes #[[ATTR5]] = { nofree nosync nounwind willreturn writeonly } ; IS__TUNIT_OPM: attributes #[[ATTR5]] = { nofree norecurse nosync nounwind willreturn writeonly }
; IS__TUNIT_OPM: attributes #[[ATTR6]] = { nofree nosync nounwind writeonly } ; IS__TUNIT_OPM: attributes #[[ATTR6]] = { nofree norecurse nosync nounwind writeonly }
; IS__TUNIT_OPM: attributes #[[ATTR7]] = { nofree nosync nounwind readonly willreturn } ; IS__TUNIT_OPM: attributes #[[ATTR7]] = { nofree norecurse nosync nounwind willreturn }
; IS__TUNIT_OPM: attributes #[[ATTR8]] = { nofree nosync nounwind readnone } ; IS__TUNIT_OPM: attributes #[[ATTR8]] = { argmemonly nofree norecurse nosync nounwind willreturn }
; IS__TUNIT_OPM: attributes #[[ATTR9]] = { nofree norecurse nosync nounwind uwtable willreturn } ; IS__TUNIT_OPM: attributes #[[ATTR9]] = { nofree norecurse nosync nounwind }
; IS__TUNIT_OPM: attributes #[[ATTR10]] = { argmemonly nofree nosync nounwind } ; IS__TUNIT_OPM: attributes #[[ATTR10]] = { nofree norecurse nosync nounwind readonly willreturn }
; IS__TUNIT_OPM: attributes #[[ATTR11]] = { willreturn } ; IS__TUNIT_OPM: attributes #[[ATTR11]] = { nofree norecurse nosync nounwind readnone }
; IS__TUNIT_OPM: attributes #[[ATTR12]] = { norecurse } ; IS__TUNIT_OPM: attributes #[[ATTR12]] = { nofree norecurse nosync nounwind uwtable willreturn }
; IS__TUNIT_OPM: attributes #[[ATTR13]] = { nounwind } ; IS__TUNIT_OPM: attributes #[[ATTR13]] = { argmemonly nofree nosync nounwind }
; IS__TUNIT_OPM: attributes #[[ATTR14]] = { willreturn }
; IS__TUNIT_OPM: attributes #[[ATTR15]] = { nofree nosync nounwind willreturn writeonly }
; IS__TUNIT_OPM: attributes #[[ATTR16]] = { nofree nosync nounwind writeonly }
; IS__TUNIT_OPM: attributes #[[ATTR17]] = { norecurse }
; IS__TUNIT_OPM: attributes #[[ATTR18]] = { nounwind }
;. ;.
; IS__TUNIT_NPM: attributes #[[ATTR0]] = { argmemonly nofree nosync nounwind willreturn writeonly } ; IS__TUNIT_NPM: attributes #[[ATTR0]] = { argmemonly nofree norecurse nosync nounwind willreturn writeonly }
; IS__TUNIT_NPM: attributes #[[ATTR1]] = { argmemonly nofree nosync nounwind willreturn } ; IS__TUNIT_NPM: attributes #[[ATTR1]] = { argmemonly nofree nosync nounwind willreturn }
; IS__TUNIT_NPM: attributes #[[ATTR2]] = { nofree nosync nounwind willreturn } ; IS__TUNIT_NPM: attributes #[[ATTR2]] = { nofree nosync nounwind willreturn }
; IS__TUNIT_NPM: attributes #[[ATTR3]] = { nofree nosync nounwind readnone willreturn } ; IS__TUNIT_NPM: attributes #[[ATTR3]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__TUNIT_NPM: attributes #[[ATTR4]] = { nofree nosync nounwind willreturn writeonly } ; IS__TUNIT_NPM: attributes #[[ATTR4]] = { nofree norecurse nosync nounwind willreturn writeonly }
; IS__TUNIT_NPM: attributes #[[ATTR5]] = { nofree nosync nounwind readonly willreturn } ; IS__TUNIT_NPM: attributes #[[ATTR5]] = { nofree norecurse nosync nounwind willreturn }
; IS__TUNIT_NPM: attributes #[[ATTR6]] = { nofree nosync nounwind writeonly } ; IS__TUNIT_NPM: attributes #[[ATTR6]] = { argmemonly nofree norecurse nosync nounwind willreturn }
; IS__TUNIT_NPM: attributes #[[ATTR7]] = { nofree norecurse nosync nounwind uwtable willreturn } ; IS__TUNIT_NPM: attributes #[[ATTR7]] = { nofree norecurse nosync nounwind readonly willreturn }
; IS__TUNIT_NPM: attributes #[[ATTR8:[0-9]+]] = { argmemonly nofree nounwind willreturn writeonly } ; IS__TUNIT_NPM: attributes #[[ATTR8]] = { nofree norecurse nosync nounwind writeonly }
; IS__TUNIT_NPM: attributes #[[ATTR9]] = { willreturn } ; IS__TUNIT_NPM: attributes #[[ATTR9]] = { nofree norecurse nosync nounwind uwtable willreturn }
; IS__TUNIT_NPM: attributes #[[ATTR10]] = { norecurse } ; IS__TUNIT_NPM: attributes #[[ATTR10:[0-9]+]] = { argmemonly nofree nounwind willreturn writeonly }
; IS__TUNIT_NPM: attributes #[[ATTR11]] = { nounwind } ; IS__TUNIT_NPM: attributes #[[ATTR11]] = { willreturn }
; IS__TUNIT_NPM: attributes #[[ATTR12]] = { nofree nosync nounwind willreturn writeonly }
; IS__TUNIT_NPM: attributes #[[ATTR13]] = { norecurse }
; IS__TUNIT_NPM: attributes #[[ATTR14]] = { nounwind }
;. ;.
; IS__CGSCC_OPM: attributes #[[ATTR0]] = { argmemonly nofree norecurse nosync nounwind willreturn writeonly } ; IS__CGSCC_OPM: attributes #[[ATTR0]] = { argmemonly nofree norecurse nosync nounwind willreturn writeonly }
; IS__CGSCC_OPM: attributes #[[ATTR1]] = { argmemonly nofree nosync nounwind willreturn } ; IS__CGSCC_OPM: attributes #[[ATTR1]] = { argmemonly nofree nosync nounwind willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR2]] = { nofree norecurse nosync nounwind readnone willreturn } ; IS__CGSCC_OPM: attributes #[[ATTR2]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR3]] = { nofree nosync nounwind willreturn } ; IS__CGSCC_OPM: attributes #[[ATTR3]] = { nofree nosync nounwind willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR4]] = { nofree norecurse nosync nounwind willreturn writeonly } ; IS__CGSCC_OPM: attributes #[[ATTR4]] = { nofree norecurse nosync nounwind willreturn writeonly }
; IS__CGSCC_OPM: attributes #[[ATTR5]] = { nofree norecurse nosync nounwind willreturn } ; IS__CGSCC_OPM: attributes #[[ATTR5]] = { nofree norecurse nosync nounwind willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR6]] = { argmemonly nofree norecurse nosync nounwind willreturn } ; IS__CGSCC_OPM: attributes #[[ATTR6]] = { argmemonly nofree norecurse nosync nounwind willreturn }
▲ Show 20 Lines • Show All 93 Lines • Show Last 20 Lines

llvm/test/Transforms/Attributor/value-simplify.ll

Show First 20 Lines • Show All 48 Lines • ▼ Show 20 Lines
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
tail call void @test1(i32 1) tail call void @test1(i32 1)
ret void ret void
} }
; TEST 2 : Simplify return value ; TEST 2 : Simplify return value
define i32 @return0() { define i32 @return0() {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@return0 ; CHECK-LABEL: define {{[^@]+}}@return0
; IS__TUNIT____-SAME: () #[[ATTR1:[0-9]+]] { ; CHECK-SAME: () #[[ATTR1:[0-9]+]] {
; IS__TUNIT____-NEXT: ret i32 0 ; CHECK-NEXT: ret i32 0
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@return0
; IS__CGSCC____-SAME: () #[[ATTR1]] {
; IS__CGSCC____-NEXT: ret i32 0
; ;
ret i32 0 ret i32 0
} }
define i32 @return1() { define i32 @return1() {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@return1 ; CHECK-LABEL: define {{[^@]+}}@return1
; IS__TUNIT____-SAME: () #[[ATTR1]] { ; CHECK-SAME: () #[[ATTR1]] {
; IS__TUNIT____-NEXT: ret i32 1 ; CHECK-NEXT: ret i32 1
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@return1
; IS__CGSCC____-SAME: () #[[ATTR1]] {
; IS__CGSCC____-NEXT: ret i32 1
; ;
ret i32 1 ret i32 1
} }
define i32 @test2_1(i1 %c) { define i32 @test2_1(i1 %c) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@test2_1 ; CHECK-LABEL: define {{[^@]+}}@test2_1
; IS__TUNIT____-SAME: (i1 [[C:%.*]]) #[[ATTR1]] { ; CHECK-SAME: (i1 [[C:%.*]]) #[[ATTR1]] {
; IS__TUNIT____-NEXT: br i1 [[C]], label [[IF_TRUE:%.*]], label [[IF_FALSE:%.*]] ; CHECK-NEXT: br i1 [[C]], label [[IF_TRUE:%.*]], label [[IF_FALSE:%.*]]
; IS__TUNIT____: if.true: ; CHECK: if.true:
; IS__TUNIT____-NEXT: [[RET0:%.*]] = add i32 0, 1 ; CHECK-NEXT: [[RET0:%.*]] = add i32 0, 1
; IS__TUNIT____-NEXT: br label [[END:%.*]] ; CHECK-NEXT: br label [[END:%.*]]
; IS__TUNIT____: if.false: ; CHECK: if.false:
; IS__TUNIT____-NEXT: br label [[END]] ; CHECK-NEXT: br label [[END]]
; IS__TUNIT____: end: ; CHECK: end:
; IS__TUNIT____-NEXT: [[RET:%.*]] = phi i32 [ [[RET0]], [[IF_TRUE]] ], [ 1, [[IF_FALSE]] ] ; CHECK-NEXT: [[RET:%.*]] = phi i32 [ [[RET0]], [[IF_TRUE]] ], [ 1, [[IF_FALSE]] ]
; IS__TUNIT____-NEXT: ret i32 1 ; CHECK-NEXT: ret i32 1
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@test2_1
; IS__CGSCC____-SAME: (i1 [[C:%.*]]) #[[ATTR1]] {
; IS__CGSCC____-NEXT: br i1 [[C]], label [[IF_TRUE:%.*]], label [[IF_FALSE:%.*]]
; IS__CGSCC____: if.true:
; IS__CGSCC____-NEXT: [[RET0:%.*]] = add i32 0, 1
; IS__CGSCC____-NEXT: br label [[END:%.*]]
; IS__CGSCC____: if.false:
; IS__CGSCC____-NEXT: br label [[END]]
; IS__CGSCC____: end:
; IS__CGSCC____-NEXT: [[RET:%.*]] = phi i32 [ [[RET0]], [[IF_TRUE]] ], [ 1, [[IF_FALSE]] ]
; IS__CGSCC____-NEXT: ret i32 1
; ;
br i1 %c, label %if.true, label %if.false br i1 %c, label %if.true, label %if.false
if.true: if.true:
%call = tail call i32 @return0() %call = tail call i32 @return0()
%ret0 = add i32 %call, 1 %ret0 = add i32 %call, 1
br label %end br label %end
if.false: if.false:
%ret1 = tail call i32 @return1() %ret1 = tail call i32 @return1()
br label %end br label %end
end: end:
%ret = phi i32 [ %ret0, %if.true ], [ %ret1, %if.false ] %ret = phi i32 [ %ret0, %if.true ], [ %ret1, %if.false ]
ret i32 1 ret i32 1
} }
define i32 @test2_2(i1 %c) { define i32 @test2_2(i1 %c) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@test2_2 ; CHECK-LABEL: define {{[^@]+}}@test2_2
; IS__TUNIT____-SAME: (i1 [[C:%.*]]) #[[ATTR1]] { ; CHECK-SAME: (i1 [[C:%.*]]) #[[ATTR1]] {
; IS__TUNIT____-NEXT: ret i32 1 ; CHECK-NEXT: ret i32 1
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@test2_2
; IS__CGSCC____-SAME: (i1 [[C:%.*]]) #[[ATTR1]] {
; IS__CGSCC____-NEXT: ret i32 1
; ;
%ret = tail call i32 @test2_1(i1 %c) %ret = tail call i32 @test2_1(i1 %c)
ret i32 %ret ret i32 %ret
} }
declare void @use(i32) declare void @use(i32)
define void @test3(i1 %c) { define void @test3(i1 %c) {
; CHECK-LABEL: define {{[^@]+}}@test3 ; CHECK-LABEL: define {{[^@]+}}@test3
▲ Show 20 Lines • Show All 74 Lines • ▼ Show 20 Linesend:
tail call void @use(i32 %select-not-same-undef) tail call void @use(i32 %select-not-same-undef)
ret void ret void
} }
define i32 @ipccp1(i32 %a) { define i32 @ipccp1(i32 %a) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@ipccp1 ; CHECK-LABEL: define {{[^@]+}}@ipccp1
; IS__TUNIT____-SAME: (i32 returned [[A:%.*]]) #[[ATTR1]] { ; CHECK-SAME: (i32 returned [[A:%.*]]) #[[ATTR1]] {
; IS__TUNIT____-NEXT: br i1 true, label [[T:%.*]], label [[F:%.*]] ; CHECK-NEXT: br i1 true, label [[T:%.*]], label [[F:%.*]]
; IS__TUNIT____: t: ; CHECK: t:
; IS__TUNIT____-NEXT: ret i32 [[A]] ; CHECK-NEXT: ret i32 [[A]]
; IS__TUNIT____: f: ; CHECK: f:
; IS__TUNIT____-NEXT: unreachable ; CHECK-NEXT: unreachable
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@ipccp1
; IS__CGSCC____-SAME: (i32 returned [[A:%.*]]) #[[ATTR1]] {
; IS__CGSCC____-NEXT: br i1 true, label [[T:%.*]], label [[F:%.*]]
; IS__CGSCC____: t:
; IS__CGSCC____-NEXT: ret i32 [[A]]
; IS__CGSCC____: f:
; IS__CGSCC____-NEXT: unreachable
; ;
br i1 true, label %t, label %f br i1 true, label %t, label %f
t: t:
ret i32 %a ret i32 %a
f: f:
%r = call i32 @ipccp1(i32 5) %r = call i32 @ipccp1(i32 5)
ret i32 %r ret i32 %r
} }
Show All 12 Lines
t: t:
ret i1 %a ret i1 %a
f: f:
%r = call i1 @ipccp2i(i1 false) %r = call i1 @ipccp2i(i1 false)
ret i1 %r ret i1 %r
} }
define i1 @ipccp2() { define i1 @ipccp2() {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@ipccp2 ; CHECK-LABEL: define {{[^@]+}}@ipccp2
; IS__TUNIT____-SAME: () #[[ATTR1]] { ; CHECK-SAME: () #[[ATTR1]] {
; IS__TUNIT____-NEXT: ret i1 true ; CHECK-NEXT: ret i1 true
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@ipccp2
; IS__CGSCC____-SAME: () #[[ATTR1]] {
; IS__CGSCC____-NEXT: ret i1 true
; ;
%r = call i1 @ipccp2i(i1 true) %r = call i1 @ipccp2i(i1 true)
ret i1 %r ret i1 %r
} }
define internal i1 @ipccp2ib(i1 %a) { define internal i1 @ipccp2ib(i1 %a) {
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@ipccp2ib ; IS__CGSCC____-LABEL: define {{[^@]+}}@ipccp2ib
; IS__CGSCC____-SAME: () #[[ATTR1]] { ; IS__CGSCC____-SAME: () #[[ATTR1]] {
; IS__CGSCC____-NEXT: br label [[T:%.*]] ; IS__CGSCC____-NEXT: br label [[T:%.*]]
; IS__CGSCC____: t: ; IS__CGSCC____: t:
; IS__CGSCC____-NEXT: ret i1 undef ; IS__CGSCC____-NEXT: ret i1 undef
; IS__CGSCC____: f: ; IS__CGSCC____: f:
; IS__CGSCC____-NEXT: unreachable ; IS__CGSCC____-NEXT: unreachable
; ;
br i1 %a, label %t, label %f br i1 %a, label %t, label %f
t: t:
ret i1 true ret i1 true
f: f:
%r = call i1 @ipccp2ib(i1 false) %r = call i1 @ipccp2ib(i1 false)
ret i1 %r ret i1 %r
} }
define i1 @ipccp2b() { define i1 @ipccp2b() {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@ipccp2b ; CHECK-LABEL: define {{[^@]+}}@ipccp2b
; IS__TUNIT____-SAME: () #[[ATTR1]] { ; CHECK-SAME: () #[[ATTR1]] {
; IS__TUNIT____-NEXT: ret i1 true ; CHECK-NEXT: ret i1 true
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@ipccp2b
; IS__CGSCC____-SAME: () #[[ATTR1]] {
; IS__CGSCC____-NEXT: ret i1 true
; ;
%r = call i1 @ipccp2ib(i1 true) %r = call i1 @ipccp2ib(i1 true)
ret i1 %r ret i1 %r
} }
define internal i32 @ipccp3i(i32 %a) { define internal i32 @ipccp3i(i32 %a) {
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@ipccp3i ; IS__CGSCC____-LABEL: define {{[^@]+}}@ipccp3i
Show All 9 Lines
t: t:
ret i32 %a ret i32 %a
f: f:
%r = call i32 @ipccp3i(i32 5) %r = call i32 @ipccp3i(i32 5)
ret i32 %r ret i32 %r
} }
define i32 @ipccp3() { define i32 @ipccp3() {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@ipccp3 ; CHECK-LABEL: define {{[^@]+}}@ipccp3
; IS__TUNIT____-SAME: () #[[ATTR1]] { ; CHECK-SAME: () #[[ATTR1]] {
; IS__TUNIT____-NEXT: ret i32 7 ; CHECK-NEXT: ret i32 7
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@ipccp3
; IS__CGSCC____-SAME: () #[[ATTR1]] {
; IS__CGSCC____-NEXT: ret i32 7
; ;
%r = call i32 @ipccp3i(i32 7) %r = call i32 @ipccp3i(i32 7)
ret i32 %r ret i32 %r
} }
define internal i32 @ipccp4ia(i1 %c) { define internal i32 @ipccp4ia(i1 %c) {
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@ipccp4ia ; IS__CGSCC____-LABEL: define {{[^@]+}}@ipccp4ia
Show All 26 Lines
t: t:
%r = call i32 @ipccp4ia(i1 %c) %r = call i32 @ipccp4ia(i1 %c)
ret i32 %r ret i32 %r
f: f:
ret i32 1 ret i32 1
} }
define i32 @ipccp4(i1 %c) { define i32 @ipccp4(i1 %c) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@ipccp4 ; CHECK-LABEL: define {{[^@]+}}@ipccp4
; IS__TUNIT____-SAME: (i1 [[C:%.*]]) #[[ATTR1]] { ; CHECK-SAME: (i1 [[C:%.*]]) #[[ATTR1]] {
; IS__TUNIT____-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]] ; CHECK-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]]
; IS__TUNIT____: t: ; CHECK: t:
; IS__TUNIT____-NEXT: br label [[F]] ; CHECK-NEXT: br label [[F]]
; IS__TUNIT____: f: ; CHECK: f:
; IS__TUNIT____-NEXT: ret i32 0 ; CHECK-NEXT: ret i32 0
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@ipccp4
; IS__CGSCC____-SAME: (i1 [[C:%.*]]) #[[ATTR1]] {
; IS__CGSCC____-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]]
; IS__CGSCC____: t:
; IS__CGSCC____-NEXT: br label [[F]]
; IS__CGSCC____: f:
; IS__CGSCC____-NEXT: ret i32 0
; ;
br i1 %c, label %t, label %f br i1 %c, label %t, label %f
t: t:
%q = call i32 @ipccp4ia(i1 undef) %q = call i32 @ipccp4ia(i1 undef)
br label %f br label %f
f: f:
%r = call i32 @ipccp4ib(i32 7) %r = call i32 @ipccp4ib(i32 7)
ret i32 %r ret i32 %r
} }
; Do not touch complicated arguments (for now) ; Do not touch complicated arguments (for now)
%struct.X = type { i8* } %struct.X = type { i8* }
define internal i32* @test_inalloca(i32* inalloca(i32) %a) { define internal i32* @test_inalloca(i32* inalloca(i32) %a) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__TUNIT____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@test_inalloca ; IS__TUNIT____-LABEL: define {{[^@]+}}@test_inalloca
; IS__TUNIT____-SAME: (i32* noalias nofree nonnull returned writeonly inalloca(i32) dereferenceable(4) "no-capture-maybe-returned" [[A:%.*]]) #[[ATTR1]] { ; IS__TUNIT____-SAME: (i32* noalias nofree nonnull returned writeonly inalloca(i32) dereferenceable(4) "no-capture-maybe-returned" [[A:%.*]]) #[[ATTR1]] {
; IS__TUNIT____-NEXT: ret i32* [[A]] ; IS__TUNIT____-NEXT: ret i32* [[A]]
; ;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@test_inalloca ; IS__CGSCC____-LABEL: define {{[^@]+}}@test_inalloca
; IS__CGSCC____-SAME: (i32* noalias nofree noundef nonnull returned writeonly inalloca(i32) dereferenceable(4) "no-capture-maybe-returned" [[A:%.*]]) #[[ATTR1]] { ; IS__CGSCC____-SAME: (i32* noalias nofree noundef nonnull returned writeonly inalloca(i32) dereferenceable(4) "no-capture-maybe-returned" [[A:%.*]]) #[[ATTR1]] {
; IS__CGSCC____-NEXT: ret i32* [[A]] ; IS__CGSCC____-NEXT: ret i32* [[A]]
; ;
ret i32* %a ret i32* %a
} }
define i32* @complicated_args_inalloca(i32* %arg) { define i32* @complicated_args_inalloca(i32* %arg) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; IS__TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@complicated_args_inalloca ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@complicated_args_inalloca
; IS__TUNIT____-SAME: (i32* nofree readnone "no-capture-maybe-returned" [[ARG:%.*]]) #[[ATTR1]] { ; IS__TUNIT_OPM-SAME: (i32* nofree readnone "no-capture-maybe-returned" [[ARG:%.*]]) #[[ATTR1]] {
; IS__TUNIT____-NEXT: [[CALL:%.*]] = call nonnull dereferenceable(4) i32* @test_inalloca(i32* noalias nofree writeonly inalloca(i32) "no-capture-maybe-returned" [[ARG]]) #[[ATTR1]] ; IS__TUNIT_OPM-NEXT: [[CALL:%.*]] = call nonnull dereferenceable(4) i32* @test_inalloca(i32* noalias nofree writeonly inalloca(i32) "no-capture-maybe-returned" [[ARG]]) #[[ATTR5:[0-9]+]]
; IS__TUNIT____-NEXT: ret i32* [[CALL]] ; IS__TUNIT_OPM-NEXT: ret i32* [[CALL]]
;
; IS__TUNIT_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@complicated_args_inalloca
; IS__TUNIT_NPM-SAME: (i32* nofree readnone "no-capture-maybe-returned" [[ARG:%.*]]) #[[ATTR1]] {
; IS__TUNIT_NPM-NEXT: [[CALL:%.*]] = call nonnull dereferenceable(4) i32* @test_inalloca(i32* noalias nofree writeonly inalloca(i32) "no-capture-maybe-returned" [[ARG]]) #[[ATTR4:[0-9]+]]
; IS__TUNIT_NPM-NEXT: ret i32* [[CALL]]
; ;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@complicated_args_inalloca ; IS__CGSCC____-LABEL: define {{[^@]+}}@complicated_args_inalloca
; IS__CGSCC____-SAME: (i32* nofree noundef nonnull readnone returned dereferenceable(4) "no-capture-maybe-returned" [[ARG:%.*]]) #[[ATTR1]] { ; IS__CGSCC____-SAME: (i32* nofree noundef nonnull readnone returned dereferenceable(4) "no-capture-maybe-returned" [[ARG:%.*]]) #[[ATTR1]] {
; IS__CGSCC____-NEXT: ret i32* [[ARG]] ; IS__CGSCC____-NEXT: ret i32* [[ARG]]
; ;
%call = call i32* @test_inalloca(i32* inalloca(i32) %arg) %call = call i32* @test_inalloca(i32* inalloca(i32) %arg)
ret i32* %call ret i32* %call
} }
define internal i32* @test_preallocated(i32* preallocated(i32) %a) { define internal i32* @test_preallocated(i32* preallocated(i32) %a) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@test_preallocated ; CHECK-LABEL: define {{[^@]+}}@test_preallocated
; IS__TUNIT____-SAME: (i32* noalias nofree noundef nonnull returned writeonly preallocated(i32) align 4294967296 dereferenceable(4) "no-capture-maybe-returned" [[A:%.*]]) #[[ATTR1]] { ; CHECK-SAME: (i32* noalias nofree noundef nonnull returned writeonly preallocated(i32) align 4294967296 dereferenceable(4) "no-capture-maybe-returned" [[A:%.*]]) #[[ATTR1]] {
; IS__TUNIT____-NEXT: ret i32* [[A]] ; CHECK-NEXT: ret i32* [[A]]
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@test_preallocated
; IS__CGSCC____-SAME: (i32* noalias nofree noundef nonnull returned writeonly preallocated(i32) align 4294967296 dereferenceable(4) "no-capture-maybe-returned" [[A:%.*]]) #[[ATTR1]] {
; IS__CGSCC____-NEXT: ret i32* [[A]]
; ;
ret i32* %a ret i32* %a
} }
define i32* @complicated_args_preallocated() { define i32* @complicated_args_preallocated() {
; IS__TUNIT_OPM: Function Attrs: nofree nosync nounwind willreturn ; IS__TUNIT_OPM: Function Attrs: nofree nosync nounwind willreturn
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@complicated_args_preallocated ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@complicated_args_preallocated
; IS__TUNIT_OPM-SAME: () #[[ATTR0:[0-9]+]] { ; IS__TUNIT_OPM-SAME: () #[[ATTR0:[0-9]+]] {
; IS__TUNIT_OPM-NEXT: [[C:%.*]] = call token @llvm.call.preallocated.setup(i32 noundef 1) #[[ATTR5:[0-9]+]] ; IS__TUNIT_OPM-NEXT: [[C:%.*]] = call token @llvm.call.preallocated.setup(i32 noundef 1) #[[ATTR6:[0-9]+]]
; IS__TUNIT_OPM-NEXT: [[CALL:%.*]] = call noundef nonnull align 4294967296 dereferenceable(4) i32* @test_preallocated(i32* noalias nocapture nofree noundef writeonly preallocated(i32) align 4294967296 null) #[[ATTR1]] [ "preallocated"(token [[C]]) ] ; IS__TUNIT_OPM-NEXT: [[CALL:%.*]] = call noundef nonnull align 4294967296 dereferenceable(4) i32* @test_preallocated(i32* noalias nocapture nofree noundef writeonly preallocated(i32) align 4294967296 null) #[[ATTR5]] [ "preallocated"(token [[C]]) ]
; IS__TUNIT_OPM-NEXT: ret i32* [[CALL]] ; IS__TUNIT_OPM-NEXT: ret i32* [[CALL]]
; ;
; IS__TUNIT_NPM: Function Attrs: nofree nosync nounwind willreturn ; IS__TUNIT_NPM: Function Attrs: nofree nosync nounwind willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@complicated_args_preallocated ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@complicated_args_preallocated
; IS__TUNIT_NPM-SAME: () #[[ATTR0:[0-9]+]] { ; IS__TUNIT_NPM-SAME: () #[[ATTR0:[0-9]+]] {
; IS__TUNIT_NPM-NEXT: [[C:%.*]] = call token @llvm.call.preallocated.setup(i32 noundef 1) #[[ATTR4:[0-9]+]] ; IS__TUNIT_NPM-NEXT: [[C:%.*]] = call token @llvm.call.preallocated.setup(i32 noundef 1) #[[ATTR5:[0-9]+]]
; IS__TUNIT_NPM-NEXT: [[CALL:%.*]] = call noundef nonnull align 4294967296 dereferenceable(4) i32* @test_preallocated(i32* noalias nocapture nofree noundef writeonly preallocated(i32) align 4294967296 null) #[[ATTR1]] [ "preallocated"(token [[C]]) ] ; IS__TUNIT_NPM-NEXT: [[CALL:%.*]] = call noundef nonnull align 4294967296 dereferenceable(4) i32* @test_preallocated(i32* noalias nocapture nofree noundef writeonly preallocated(i32) align 4294967296 null) #[[ATTR4]] [ "preallocated"(token [[C]]) ]
; IS__TUNIT_NPM-NEXT: ret i32* [[CALL]] ; IS__TUNIT_NPM-NEXT: ret i32* [[CALL]]
; ;
; IS__CGSCC_OPM: Function Attrs: nofree nosync nounwind willreturn ; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@complicated_args_preallocated ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@complicated_args_preallocated
; IS__CGSCC_OPM-SAME: () #[[ATTR0:[0-9]+]] { ; IS__CGSCC_OPM-SAME: () #[[ATTR2:[0-9]+]] {
; IS__CGSCC_OPM-NEXT: [[C:%.*]] = call token @llvm.call.preallocated.setup(i32 noundef 1) #[[ATTR5:[0-9]+]] ; IS__CGSCC_OPM-NEXT: [[C:%.*]] = call token @llvm.call.preallocated.setup(i32 noundef 1) #[[ATTR6:[0-9]+]]
; IS__CGSCC_OPM-NEXT: ret i32* null ; IS__CGSCC_OPM-NEXT: ret i32* null
; ;
; IS__CGSCC_NPM: Function Attrs: nofree nosync nounwind willreturn ; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@complicated_args_preallocated ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@complicated_args_preallocated
; IS__CGSCC_NPM-SAME: () #[[ATTR0:[0-9]+]] { ; IS__CGSCC_NPM-SAME: () #[[ATTR2:[0-9]+]] {
; IS__CGSCC_NPM-NEXT: [[C:%.*]] = call token @llvm.call.preallocated.setup(i32 noundef 1) #[[ATTR4:[0-9]+]] ; IS__CGSCC_NPM-NEXT: [[C:%.*]] = call token @llvm.call.preallocated.setup(i32 noundef 1) #[[ATTR5:[0-9]+]]
; IS__CGSCC_NPM-NEXT: ret i32* null ; IS__CGSCC_NPM-NEXT: ret i32* null
; ;
%c = call token @llvm.call.preallocated.setup(i32 1) %c = call token @llvm.call.preallocated.setup(i32 1)
%call = call i32* @test_preallocated(i32* preallocated(i32) null) ["preallocated"(token %c)] %call = call i32* @test_preallocated(i32* preallocated(i32) null) ["preallocated"(token %c)]
ret i32* %call ret i32* %call
} }
define internal void @test_sret(%struct.X* sret(%struct.X) %a, %struct.X** %b) { define internal void @test_sret(%struct.X* sret(%struct.X) %a, %struct.X** %b) {
; ;
; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind willreturn writeonly ; IS__TUNIT____: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__TUNIT____-LABEL: define {{[^@]+}}@test_sret ; IS__TUNIT____-LABEL: define {{[^@]+}}@test_sret
; IS__TUNIT____-SAME: (%struct.X* noalias nofree noundef nonnull writeonly sret([[STRUCT_X:%.*]]) align 4294967296 dereferenceable(8) [[A:%.*]], %struct.X** nocapture nofree noundef nonnull writeonly align 8 dereferenceable(8) [[B:%.*]]) #[[ATTR2:[0-9]+]] { ; IS__TUNIT____-SAME: (%struct.X* noalias nofree noundef nonnull writeonly sret([[STRUCT_X:%.*]]) align 4294967296 dereferenceable(8) [[A:%.*]], %struct.X** nocapture nofree noundef nonnull writeonly align 8 dereferenceable(8) [[B:%.*]]) #[[ATTR2:[0-9]+]] {
; IS__TUNIT____-NEXT: store %struct.X* [[A]], %struct.X** [[B]], align 8 ; IS__TUNIT____-NEXT: store %struct.X* [[A]], %struct.X** [[B]], align 8
; IS__TUNIT____-NEXT: ret void ; IS__TUNIT____-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly ; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC____-LABEL: define {{[^@]+}}@test_sret ; IS__CGSCC____-LABEL: define {{[^@]+}}@test_sret
; IS__CGSCC____-SAME: (%struct.X* noalias nofree noundef nonnull writeonly sret([[STRUCT_X:%.*]]) align 4294967296 dereferenceable(8) [[A:%.*]], %struct.X** nocapture nofree noundef nonnull writeonly align 8 dereferenceable(8) [[B:%.*]]) #[[ATTR2:[0-9]+]] { ; IS__CGSCC____-SAME: (%struct.X* noalias nofree noundef nonnull writeonly sret([[STRUCT_X:%.*]]) align 4294967296 dereferenceable(8) [[A:%.*]], %struct.X** nocapture nofree noundef nonnull writeonly align 8 dereferenceable(8) [[B:%.*]]) #[[ATTR3:[0-9]+]] {
; IS__CGSCC____-NEXT: store %struct.X* [[A]], %struct.X** [[B]], align 8 ; IS__CGSCC____-NEXT: store %struct.X* [[A]], %struct.X** [[B]], align 8
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
store %struct.X* %a, %struct.X** %b store %struct.X* %a, %struct.X** %b
ret void ret void
} }
; FIXME: Alignment and dereferenceability are not propagated to the argument ; FIXME: Alignment and dereferenceability are not propagated to the argument
define void @complicated_args_sret(%struct.X** %b) { define void @complicated_args_sret(%struct.X** %b) {
; ;
; ;
; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind willreturn writeonly ; IS__TUNIT_OPM: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__TUNIT____-LABEL: define {{[^@]+}}@complicated_args_sret ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@complicated_args_sret
; IS__TUNIT____-SAME: (%struct.X** nocapture nofree writeonly [[B:%.*]]) #[[ATTR2]] { ; IS__TUNIT_OPM-SAME: (%struct.X** nocapture nofree writeonly [[B:%.*]]) #[[ATTR2]] {
; IS__TUNIT____-NEXT: call void @test_sret(%struct.X* noalias nocapture nofree noundef writeonly sret([[STRUCT_X:%.*]]) align 4294967296 null, %struct.X** nocapture nofree writeonly align 8 [[B]]) #[[ATTR3:[0-9]+]] ; IS__TUNIT_OPM-NEXT: call void @test_sret(%struct.X* noalias nocapture nofree noundef writeonly sret([[STRUCT_X:%.*]]) align 4294967296 null, %struct.X** nocapture nofree writeonly align 8 [[B]]) #[[ATTR7:[0-9]+]]
; IS__TUNIT____-NEXT: ret void ; IS__TUNIT_OPM-NEXT: ret void
;
; IS__TUNIT_NPM: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@complicated_args_sret
; IS__TUNIT_NPM-SAME: (%struct.X** nocapture nofree writeonly [[B:%.*]]) #[[ATTR2]] {
; IS__TUNIT_NPM-NEXT: call void @test_sret(%struct.X* noalias nocapture nofree noundef writeonly sret([[STRUCT_X:%.*]]) align 4294967296 null, %struct.X** nocapture nofree writeonly align 8 [[B]]) #[[ATTR6:[0-9]+]]
; IS__TUNIT_NPM-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly ; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC____-LABEL: define {{[^@]+}}@complicated_args_sret ; IS__CGSCC____-LABEL: define {{[^@]+}}@complicated_args_sret
; IS__CGSCC____-SAME: (%struct.X** nocapture nofree noundef nonnull writeonly align 8 dereferenceable(8) [[B:%.*]]) #[[ATTR2]] { ; IS__CGSCC____-SAME: (%struct.X** nocapture nofree noundef nonnull writeonly align 8 dereferenceable(8) [[B:%.*]]) #[[ATTR3]] {
; IS__CGSCC____-NEXT: unreachable ; IS__CGSCC____-NEXT: unreachable
; ;
call void @test_sret(%struct.X* sret(%struct.X) null, %struct.X** %b) call void @test_sret(%struct.X* sret(%struct.X) null, %struct.X** %b)
ret void ret void
} }
define internal %struct.X* @test_nest(%struct.X* nest %a) { define internal %struct.X* @test_nest(%struct.X* nest %a) {
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@test_nest ; IS__CGSCC____-LABEL: define {{[^@]+}}@test_nest
; IS__CGSCC____-SAME: (%struct.X* nest noalias nocapture nofree readnone align 4294967296 [[A:%.*]]) #[[ATTR1]] { ; IS__CGSCC____-SAME: (%struct.X* nest noalias nocapture nofree readnone align 4294967296 [[A:%.*]]) #[[ATTR1]] {
; IS__CGSCC____-NEXT: ret %struct.X* undef ; IS__CGSCC____-NEXT: ret %struct.X* undef
; ;
ret %struct.X* %a ret %struct.X* %a
} }
define %struct.X* @complicated_args_nest() { define %struct.X* @complicated_args_nest() {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@complicated_args_nest ; CHECK-LABEL: define {{[^@]+}}@complicated_args_nest
; IS__TUNIT____-SAME: () #[[ATTR1]] { ; CHECK-SAME: () #[[ATTR1]] {
; IS__TUNIT____-NEXT: ret %struct.X* null ; CHECK-NEXT: ret %struct.X* null
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@complicated_args_nest
; IS__CGSCC____-SAME: () #[[ATTR1]] {
; IS__CGSCC____-NEXT: ret %struct.X* null
; ;
%call = call %struct.X* @test_nest(%struct.X* null) %call = call %struct.X* @test_nest(%struct.X* null)
ret %struct.X* %call ret %struct.X* %call
} }
@S = external global %struct.X @S = external global %struct.X
define internal void @test_byval(%struct.X* byval(%struct.X) %a) { define internal void @test_byval(%struct.X* byval(%struct.X) %a) {
; IS__TUNIT_OPM: Function Attrs: argmemonly nofree nosync nounwind willreturn writeonly ; IS__TUNIT_OPM: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@test_byval ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@test_byval
; IS__TUNIT_OPM-SAME: (%struct.X* noalias nocapture nofree noundef nonnull writeonly byval([[STRUCT_X:%.*]]) align 8 dereferenceable(8) [[A:%.*]]) #[[ATTR2]] { ; IS__TUNIT_OPM-SAME: (%struct.X* noalias nocapture nofree noundef nonnull writeonly byval([[STRUCT_X:%.*]]) align 8 dereferenceable(8) [[A:%.*]]) #[[ATTR2]] {
; IS__TUNIT_OPM-NEXT: [[G0:%.*]] = getelementptr [[STRUCT_X]], %struct.X* [[A]], i32 0, i32 0 ; IS__TUNIT_OPM-NEXT: [[G0:%.*]] = getelementptr [[STRUCT_X]], %struct.X* [[A]], i32 0, i32 0
; IS__TUNIT_OPM-NEXT: store i8* null, i8** [[G0]], align 8 ; IS__TUNIT_OPM-NEXT: store i8* null, i8** [[G0]], align 8
; IS__TUNIT_OPM-NEXT: ret void ; IS__TUNIT_OPM-NEXT: ret void
; ;
; IS__TUNIT_NPM: Function Attrs: argmemonly nofree nosync nounwind willreturn writeonly ; IS__TUNIT_NPM: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@test_byval ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@test_byval
; IS__TUNIT_NPM-SAME: (i8* [[TMP0:%.*]]) #[[ATTR2]] { ; IS__TUNIT_NPM-SAME: (i8* [[TMP0:%.*]]) #[[ATTR2]] {
; IS__TUNIT_NPM-NEXT: [[A_PRIV:%.*]] = alloca [[STRUCT_X:%.*]], align 8 ; IS__TUNIT_NPM-NEXT: [[A_PRIV:%.*]] = alloca [[STRUCT_X:%.*]], align 8
; IS__TUNIT_NPM-NEXT: [[A_PRIV_CAST:%.*]] = bitcast %struct.X* [[A_PRIV]] to i8** ; IS__TUNIT_NPM-NEXT: [[A_PRIV_CAST:%.*]] = bitcast %struct.X* [[A_PRIV]] to i8**
; IS__TUNIT_NPM-NEXT: store i8* [[TMP0]], i8** [[A_PRIV_CAST]], align 8 ; IS__TUNIT_NPM-NEXT: store i8* [[TMP0]], i8** [[A_PRIV_CAST]], align 8
; IS__TUNIT_NPM-NEXT: [[G0:%.*]] = getelementptr [[STRUCT_X]], %struct.X* [[A_PRIV]], i32 0, i32 0 ; IS__TUNIT_NPM-NEXT: [[G0:%.*]] = getelementptr [[STRUCT_X]], %struct.X* [[A_PRIV]], i32 0, i32 0
; IS__TUNIT_NPM-NEXT: store i8* null, i8** [[G0]], align 8 ; IS__TUNIT_NPM-NEXT: store i8* null, i8** [[G0]], align 8
; IS__TUNIT_NPM-NEXT: ret void ; IS__TUNIT_NPM-NEXT: ret void
; ;
; IS__CGSCC_OPM: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly ; IS__CGSCC_OPM: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@test_byval ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@test_byval
; IS__CGSCC_OPM-SAME: (%struct.X* noalias nocapture nofree noundef nonnull writeonly byval([[STRUCT_X:%.*]]) align 8 dereferenceable(8) [[A:%.*]]) #[[ATTR2]] { ; IS__CGSCC_OPM-SAME: (%struct.X* noalias nocapture nofree noundef nonnull writeonly byval([[STRUCT_X:%.*]]) align 8 dereferenceable(8) [[A:%.*]]) #[[ATTR3]] {
; IS__CGSCC_OPM-NEXT: [[G0:%.*]] = getelementptr [[STRUCT_X]], %struct.X* [[A]], i32 0, i32 0 ; IS__CGSCC_OPM-NEXT: [[G0:%.*]] = getelementptr [[STRUCT_X]], %struct.X* [[A]], i32 0, i32 0
; IS__CGSCC_OPM-NEXT: store i8* null, i8** [[G0]], align 8 ; IS__CGSCC_OPM-NEXT: store i8* null, i8** [[G0]], align 8
; IS__CGSCC_OPM-NEXT: ret void ; IS__CGSCC_OPM-NEXT: ret void
; ;
; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@test_byval ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@test_byval
; IS__CGSCC_NPM-SAME: (i8* noalias nocapture nofree readnone [[TMP0:%.*]]) #[[ATTR1]] { ; IS__CGSCC_NPM-SAME: (i8* noalias nocapture nofree readnone [[TMP0:%.*]]) #[[ATTR1]] {
; IS__CGSCC_NPM-NEXT: [[A_PRIV:%.*]] = alloca [[STRUCT_X:%.*]], align 8 ; IS__CGSCC_NPM-NEXT: [[A_PRIV:%.*]] = alloca [[STRUCT_X:%.*]], align 8
; IS__CGSCC_NPM-NEXT: [[A_PRIV_CAST:%.*]] = bitcast %struct.X* [[A_PRIV]] to i8** ; IS__CGSCC_NPM-NEXT: [[A_PRIV_CAST:%.*]] = bitcast %struct.X* [[A_PRIV]] to i8**
; IS__CGSCC_NPM-NEXT: [[G0:%.*]] = getelementptr [[STRUCT_X]], %struct.X* [[A_PRIV]], i32 0, i32 0 ; IS__CGSCC_NPM-NEXT: [[G0:%.*]] = getelementptr [[STRUCT_X]], %struct.X* [[A_PRIV]], i32 0, i32 0
; IS__CGSCC_NPM-NEXT: ret void ; IS__CGSCC_NPM-NEXT: ret void
; ;
%g0 = getelementptr %struct.X, %struct.X* %a, i32 0, i32 0 %g0 = getelementptr %struct.X, %struct.X* %a, i32 0, i32 0
store i8* null, i8** %g0 store i8* null, i8** %g0
ret void ret void
} }
define void @complicated_args_byval() { define void @complicated_args_byval() {
; IS__TUNIT_OPM: Function Attrs: nofree nosync nounwind willreturn writeonly ; IS__TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@complicated_args_byval ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@complicated_args_byval
; IS__TUNIT_OPM-SAME: () #[[ATTR3]] { ; IS__TUNIT_OPM-SAME: () #[[ATTR3:[0-9]+]] {
; IS__TUNIT_OPM-NEXT: call void @test_byval(%struct.X* nocapture nofree noundef nonnull readonly byval([[STRUCT_X:%.*]]) align 8 dereferenceable(8) @S) #[[ATTR3]] ; IS__TUNIT_OPM-NEXT: call void @test_byval(%struct.X* nocapture nofree noundef nonnull readonly byval([[STRUCT_X:%.*]]) align 8 dereferenceable(8) @S) #[[ATTR7]]
; IS__TUNIT_OPM-NEXT: ret void ; IS__TUNIT_OPM-NEXT: ret void
; ;
; IS__TUNIT_NPM: Function Attrs: nofree nosync nounwind willreturn writeonly ; IS__TUNIT_NPM: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@complicated_args_byval ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@complicated_args_byval
; IS__TUNIT_NPM-SAME: () #[[ATTR3]] { ; IS__TUNIT_NPM-SAME: () #[[ATTR3:[0-9]+]] {
; IS__TUNIT_NPM-NEXT: [[S_CAST:%.*]] = bitcast %struct.X* @S to i8** ; IS__TUNIT_NPM-NEXT: [[S_CAST:%.*]] = bitcast %struct.X* @S to i8**
; IS__TUNIT_NPM-NEXT: [[TMP1:%.*]] = load i8*, i8** [[S_CAST]], align 8 ; IS__TUNIT_NPM-NEXT: [[TMP1:%.*]] = load i8*, i8** [[S_CAST]], align 8
; IS__TUNIT_NPM-NEXT: call void @test_byval(i8* [[TMP1]]) #[[ATTR3]] ; IS__TUNIT_NPM-NEXT: call void @test_byval(i8* [[TMP1]]) #[[ATTR6]]
; IS__TUNIT_NPM-NEXT: ret void ; IS__TUNIT_NPM-NEXT: ret void
; ;
; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@complicated_args_byval ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@complicated_args_byval
; IS__CGSCC_OPM-SAME: () #[[ATTR1]] { ; IS__CGSCC_OPM-SAME: () #[[ATTR1]] {
; IS__CGSCC_OPM-NEXT: call void @test_byval(%struct.X* noalias nocapture nofree noundef nonnull readnone byval([[STRUCT_X:%.*]]) align 8 dereferenceable(8) @S) #[[ATTR6:[0-9]+]] ; IS__CGSCC_OPM-NEXT: call void @test_byval(%struct.X* noalias nocapture nofree noundef nonnull readnone byval([[STRUCT_X:%.*]]) align 8 dereferenceable(8) @S) #[[ATTR7:[0-9]+]]
; IS__CGSCC_OPM-NEXT: ret void ; IS__CGSCC_OPM-NEXT: ret void
; ;
; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@complicated_args_byval ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@complicated_args_byval
; IS__CGSCC_NPM-SAME: () #[[ATTR1]] { ; IS__CGSCC_NPM-SAME: () #[[ATTR1]] {
; IS__CGSCC_NPM-NEXT: ret void ; IS__CGSCC_NPM-NEXT: ret void
; ;
call void @test_byval(%struct.X* byval(%struct.X) @S) call void @test_byval(%struct.X* byval(%struct.X) @S)
▲ Show 20 Lines • Show All 56 Lines • ▼ Show 20 Lines
; IS__CGSCC_NPM-NEXT: [[C:%.*]] = call i8* @test_byval2(i8* noalias nofree readnone "no-capture-maybe-returned" [[TMP1]]) ; IS__CGSCC_NPM-NEXT: [[C:%.*]] = call i8* @test_byval2(i8* noalias nofree readnone "no-capture-maybe-returned" [[TMP1]])
; IS__CGSCC_NPM-NEXT: ret i8* [[TMP1]] ; IS__CGSCC_NPM-NEXT: ret i8* [[TMP1]]
; ;
%c = call i8* @test_byval2(%struct.X* byval(%struct.X) @S) %c = call i8* @test_byval2(%struct.X* byval(%struct.X) @S)
ret i8* %c ret i8* %c
} }
define void @fixpoint_changed(i32* %p) { define void @fixpoint_changed(i32* %p) {
; IS__TUNIT_OPM: Function Attrs: argmemonly nofree nosync nounwind writeonly ; IS________OPM: Function Attrs: argmemonly nofree norecurse nosync nounwind writeonly
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@fixpoint_changed ; IS________OPM-LABEL: define {{[^@]+}}@fixpoint_changed
; IS__TUNIT_OPM-SAME: (i32* nocapture nofree writeonly [[P:%.*]]) #[[ATTR4:[0-9]+]] { ; IS________OPM-SAME: (i32* nocapture nofree writeonly [[P:%.*]]) #[[ATTR4:[0-9]+]] {
; IS__TUNIT_OPM-NEXT: entry: ; IS________OPM-NEXT: entry:
; IS__TUNIT_OPM-NEXT: br label [[FOR_COND:%.*]] ; IS________OPM-NEXT: br label [[FOR_COND:%.*]]
; IS__TUNIT_OPM: for.cond: ; IS________OPM: for.cond:
; IS__TUNIT_OPM-NEXT: [[J_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INC:%.*]], [[SW_EPILOG:%.*]] ] ; IS________OPM-NEXT: [[J_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INC:%.*]], [[SW_EPILOG:%.*]] ]
; IS__TUNIT_OPM-NEXT: [[CMP:%.*]] = icmp slt i32 [[J_0]], 30 ; IS________OPM-NEXT: [[CMP:%.*]] = icmp slt i32 [[J_0]], 30
; IS__TUNIT_OPM-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] ; IS________OPM-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
; IS__TUNIT_OPM: for.body: ; IS________OPM: for.body:
; IS__TUNIT_OPM-NEXT: switch i32 [[J_0]], label [[SW_EPILOG]] [ ; IS________OPM-NEXT: switch i32 [[J_0]], label [[SW_EPILOG]] [
; IS__TUNIT_OPM-NEXT: i32 1, label [[SW_BB:%.*]] ; IS________OPM-NEXT: i32 1, label [[SW_BB:%.*]]
; IS__TUNIT_OPM-NEXT: ] ; IS________OPM-NEXT: ]
; IS__TUNIT_OPM: sw.bb: ; IS________OPM: sw.bb:
; IS__TUNIT_OPM-NEXT: br label [[SW_EPILOG]] ; IS________OPM-NEXT: br label [[SW_EPILOG]]
; IS__TUNIT_OPM: sw.epilog: ; IS________OPM: sw.epilog:
; IS__TUNIT_OPM-NEXT: [[X_0:%.*]] = phi i32 [ 255, [[FOR_BODY]] ], [ 253, [[SW_BB]] ] ; IS________OPM-NEXT: [[X_0:%.*]] = phi i32 [ 255, [[FOR_BODY]] ], [ 253, [[SW_BB]] ]
; IS__TUNIT_OPM-NEXT: store i32 [[X_0]], i32* [[P]], align 4 ; IS________OPM-NEXT: store i32 [[X_0]], i32* [[P]], align 4
; IS__TUNIT_OPM-NEXT: [[INC]] = add nsw i32 [[J_0]], 1 ; IS________OPM-NEXT: [[INC]] = add nsw i32 [[J_0]], 1
; IS__TUNIT_OPM-NEXT: br label [[FOR_COND]] ; IS________OPM-NEXT: br label [[FOR_COND]]
; IS__TUNIT_OPM: for.end: ; IS________OPM: for.end:
; IS__TUNIT_OPM-NEXT: ret void ; IS________OPM-NEXT: ret void
; ;
; IS__TUNIT_NPM: Function Attrs: argmemonly nofree nosync nounwind willreturn writeonly ; IS__TUNIT_NPM: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@fixpoint_changed ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@fixpoint_changed
; IS__TUNIT_NPM-SAME: (i32* nocapture nofree writeonly [[P:%.*]]) #[[ATTR2]] { ; IS__TUNIT_NPM-SAME: (i32* nocapture nofree writeonly [[P:%.*]]) #[[ATTR2]] {
; IS__TUNIT_NPM-NEXT: entry: ; IS__TUNIT_NPM-NEXT: entry:
; IS__TUNIT_NPM-NEXT: br label [[FOR_COND:%.*]] ; IS__TUNIT_NPM-NEXT: br label [[FOR_COND:%.*]]
; IS__TUNIT_NPM: for.cond: ; IS__TUNIT_NPM: for.cond:
; IS__TUNIT_NPM-NEXT: [[J_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INC:%.*]], [[SW_EPILOG:%.*]] ] ; IS__TUNIT_NPM-NEXT: [[J_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INC:%.*]], [[SW_EPILOG:%.*]] ]
; IS__TUNIT_NPM-NEXT: [[CMP:%.*]] = icmp slt i32 [[J_0]], 30 ; IS__TUNIT_NPM-NEXT: [[CMP:%.*]] = icmp slt i32 [[J_0]], 30
; IS__TUNIT_NPM-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] ; IS__TUNIT_NPM-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
; IS__TUNIT_NPM: for.body: ; IS__TUNIT_NPM: for.body:
; IS__TUNIT_NPM-NEXT: switch i32 [[J_0]], label [[SW_EPILOG]] [ ; IS__TUNIT_NPM-NEXT: switch i32 [[J_0]], label [[SW_EPILOG]] [
; IS__TUNIT_NPM-NEXT: i32 1, label [[SW_BB:%.*]] ; IS__TUNIT_NPM-NEXT: i32 1, label [[SW_BB:%.*]]
; IS__TUNIT_NPM-NEXT: ] ; IS__TUNIT_NPM-NEXT: ]
; IS__TUNIT_NPM: sw.bb: ; IS__TUNIT_NPM: sw.bb:
; IS__TUNIT_NPM-NEXT: br label [[SW_EPILOG]] ; IS__TUNIT_NPM-NEXT: br label [[SW_EPILOG]]
; IS__TUNIT_NPM: sw.epilog: ; IS__TUNIT_NPM: sw.epilog:
; IS__TUNIT_NPM-NEXT: [[X_0:%.*]] = phi i32 [ 255, [[FOR_BODY]] ], [ 253, [[SW_BB]] ] ; IS__TUNIT_NPM-NEXT: [[X_0:%.*]] = phi i32 [ 255, [[FOR_BODY]] ], [ 253, [[SW_BB]] ]
; IS__TUNIT_NPM-NEXT: store i32 [[X_0]], i32* [[P]], align 4 ; IS__TUNIT_NPM-NEXT: store i32 [[X_0]], i32* [[P]], align 4
; IS__TUNIT_NPM-NEXT: [[INC]] = add nsw i32 [[J_0]], 1 ; IS__TUNIT_NPM-NEXT: [[INC]] = add nsw i32 [[J_0]], 1
; IS__TUNIT_NPM-NEXT: br label [[FOR_COND]] ; IS__TUNIT_NPM-NEXT: br label [[FOR_COND]]
; IS__TUNIT_NPM: for.end: ; IS__TUNIT_NPM: for.end:
; IS__TUNIT_NPM-NEXT: ret void ; IS__TUNIT_NPM-NEXT: ret void
; ;
; IS__CGSCC_OPM: Function Attrs: argmemonly nofree norecurse nosync nounwind writeonly
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@fixpoint_changed
; IS__CGSCC_OPM-SAME: (i32* nocapture nofree writeonly [[P:%.*]]) #[[ATTR3:[0-9]+]] {
; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: br label [[FOR_COND:%.*]]
; IS__CGSCC_OPM: for.cond:
; IS__CGSCC_OPM-NEXT: [[J_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INC:%.*]], [[SW_EPILOG:%.*]] ]
; IS__CGSCC_OPM-NEXT: [[CMP:%.*]] = icmp slt i32 [[J_0]], 30
; IS__CGSCC_OPM-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
; IS__CGSCC_OPM: for.body:
; IS__CGSCC_OPM-NEXT: switch i32 [[J_0]], label [[SW_EPILOG]] [
; IS__CGSCC_OPM-NEXT: i32 1, label [[SW_BB:%.*]]
; IS__CGSCC_OPM-NEXT: ]
; IS__CGSCC_OPM: sw.bb:
; IS__CGSCC_OPM-NEXT: br label [[SW_EPILOG]]
; IS__CGSCC_OPM: sw.epilog:
; IS__CGSCC_OPM-NEXT: [[X_0:%.*]] = phi i32 [ 255, [[FOR_BODY]] ], [ 253, [[SW_BB]] ]
; IS__CGSCC_OPM-NEXT: store i32 [[X_0]], i32* [[P]], align 4
; IS__CGSCC_OPM-NEXT: [[INC]] = add nsw i32 [[J_0]], 1
; IS__CGSCC_OPM-NEXT: br label [[FOR_COND]]
; IS__CGSCC_OPM: for.end:
; IS__CGSCC_OPM-NEXT: ret void
;
; IS__CGSCC_NPM: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly ; IS__CGSCC_NPM: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@fixpoint_changed ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@fixpoint_changed
; IS__CGSCC_NPM-SAME: (i32* nocapture nofree writeonly [[P:%.*]]) #[[ATTR2]] { ; IS__CGSCC_NPM-SAME: (i32* nocapture nofree writeonly [[P:%.*]]) #[[ATTR3]] {
; IS__CGSCC_NPM-NEXT: entry: ; IS__CGSCC_NPM-NEXT: entry:
; IS__CGSCC_NPM-NEXT: br label [[FOR_COND:%.*]] ; IS__CGSCC_NPM-NEXT: br label [[FOR_COND:%.*]]
; IS__CGSCC_NPM: for.cond: ; IS__CGSCC_NPM: for.cond:
; IS__CGSCC_NPM-NEXT: [[J_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INC:%.*]], [[SW_EPILOG:%.*]] ] ; IS__CGSCC_NPM-NEXT: [[J_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INC:%.*]], [[SW_EPILOG:%.*]] ]
; IS__CGSCC_NPM-NEXT: [[CMP:%.*]] = icmp slt i32 [[J_0]], 30 ; IS__CGSCC_NPM-NEXT: [[CMP:%.*]] = icmp slt i32 [[J_0]], 30
; IS__CGSCC_NPM-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] ; IS__CGSCC_NPM-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
; IS__CGSCC_NPM: for.body: ; IS__CGSCC_NPM: for.body:
; IS__CGSCC_NPM-NEXT: switch i32 [[J_0]], label [[SW_EPILOG]] [ ; IS__CGSCC_NPM-NEXT: switch i32 [[J_0]], label [[SW_EPILOG]] [
Show All 32 Linessw.epilog:
br label %for.cond br label %for.cond
for.end: for.end:
ret void ret void
} }
; Check we merge undef and a constant properly. ; Check we merge undef and a constant properly.
define i8 @caller0() { define i8 @caller0() {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@caller0 ; CHECK-LABEL: define {{[^@]+}}@caller0
; IS__TUNIT____-SAME: () #[[ATTR1]] { ; CHECK-SAME: () #[[ATTR1]] {
; IS__TUNIT____-NEXT: ret i8 49 ; CHECK-NEXT: ret i8 49
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@caller0
; IS__CGSCC____-SAME: () #[[ATTR1]] {
; IS__CGSCC____-NEXT: ret i8 49
; ;
%c = call i8 @callee(i8 undef) %c = call i8 @callee(i8 undef)
ret i8 %c ret i8 %c
} }
define i8 @caller1() { define i8 @caller1() {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@caller1 ; CHECK-LABEL: define {{[^@]+}}@caller1
; IS__TUNIT____-SAME: () #[[ATTR1]] { ; CHECK-SAME: () #[[ATTR1]] {
; IS__TUNIT____-NEXT: ret i8 49 ; CHECK-NEXT: ret i8 49
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@caller1
; IS__CGSCC____-SAME: () #[[ATTR1]] {
; IS__CGSCC____-NEXT: ret i8 49
; ;
%c = call i8 @callee(i8 undef) %c = call i8 @callee(i8 undef)
ret i8 %c ret i8 %c
} }
define i8 @caller2() { define i8 @caller2() {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@caller2 ; CHECK-LABEL: define {{[^@]+}}@caller2
; IS__TUNIT____-SAME: () #[[ATTR1]] { ; CHECK-SAME: () #[[ATTR1]] {
; IS__TUNIT____-NEXT: ret i8 49 ; CHECK-NEXT: ret i8 49
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@caller2
; IS__CGSCC____-SAME: () #[[ATTR1]] {
; IS__CGSCC____-NEXT: ret i8 49
; ;
%c = call i8 @callee(i8 undef) %c = call i8 @callee(i8 undef)
ret i8 %c ret i8 %c
} }
define i8 @caller_middle() { define i8 @caller_middle() {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@caller_middle ; CHECK-LABEL: define {{[^@]+}}@caller_middle
; IS__TUNIT____-SAME: () #[[ATTR1]] { ; CHECK-SAME: () #[[ATTR1]] {
; IS__TUNIT____-NEXT: ret i8 49 ; CHECK-NEXT: ret i8 49
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@caller_middle
; IS__CGSCC____-SAME: () #[[ATTR1]] {
; IS__CGSCC____-NEXT: ret i8 49
; ;
%c = call i8 @callee(i8 42) %c = call i8 @callee(i8 42)
ret i8 %c ret i8 %c
} }
define i8 @caller3() { define i8 @caller3() {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@caller3 ; CHECK-LABEL: define {{[^@]+}}@caller3
; IS__TUNIT____-SAME: () #[[ATTR1]] { ; CHECK-SAME: () #[[ATTR1]] {
; IS__TUNIT____-NEXT: ret i8 49 ; CHECK-NEXT: ret i8 49
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@caller3
; IS__CGSCC____-SAME: () #[[ATTR1]] {
; IS__CGSCC____-NEXT: ret i8 49
; ;
%c = call i8 @callee(i8 undef) %c = call i8 @callee(i8 undef)
ret i8 %c ret i8 %c
} }
define i8 @caller4() { define i8 @caller4() {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@caller4 ; CHECK-LABEL: define {{[^@]+}}@caller4
; IS__TUNIT____-SAME: () #[[ATTR1]] { ; CHECK-SAME: () #[[ATTR1]] {
; IS__TUNIT____-NEXT: ret i8 49 ; CHECK-NEXT: ret i8 49
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@caller4
; IS__CGSCC____-SAME: () #[[ATTR1]] {
; IS__CGSCC____-NEXT: ret i8 49
; ;
%c = call i8 @callee(i8 undef) %c = call i8 @callee(i8 undef)
ret i8 %c ret i8 %c
} }
define internal i8 @callee(i8 %a) { define internal i8 @callee(i8 %a) {
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@callee ; IS__CGSCC____-LABEL: define {{[^@]+}}@callee
; IS__CGSCC____-SAME: () #[[ATTR1]] { ; IS__CGSCC____-SAME: () #[[ATTR1]] {
; IS__CGSCC____-NEXT: ret i8 undef ; IS__CGSCC____-NEXT: ret i8 undef
; ;
%c = add i8 %a, 7 %c = add i8 %a, 7
ret i8 %c ret i8 %c
} }
define void @user_as3() { define void @user_as3() {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind willreturn writeonly ; IS__TUNIT____: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly
; IS__TUNIT____-LABEL: define {{[^@]+}}@user_as3 ; IS__TUNIT____-LABEL: define {{[^@]+}}@user_as3
; IS__TUNIT____-SAME: () #[[ATTR3]] { ; IS__TUNIT____-SAME: () #[[ATTR3:[0-9]+]] {
; IS__TUNIT____-NEXT: store i32 0, i32 addrspace(3)* @ConstAS3Ptr, align 4 ; IS__TUNIT____-NEXT: store i32 0, i32 addrspace(3)* @ConstAS3Ptr, align 4
; IS__TUNIT____-NEXT: ret void ; IS__TUNIT____-NEXT: ret void
; ;
; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly ; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@user_as3 ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@user_as3
; IS__CGSCC_OPM-SAME: () #[[ATTR4:[0-9]+]] { ; IS__CGSCC_OPM-SAME: () #[[ATTR5:[0-9]+]] {
; IS__CGSCC_OPM-NEXT: store i32 0, i32 addrspace(3)* @ConstAS3Ptr, align 4 ; IS__CGSCC_OPM-NEXT: store i32 0, i32 addrspace(3)* @ConstAS3Ptr, align 4
; IS__CGSCC_OPM-NEXT: ret void ; IS__CGSCC_OPM-NEXT: ret void
; ;
; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly ; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@user_as3 ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@user_as3
; IS__CGSCC_NPM-SAME: () #[[ATTR3:[0-9]+]] { ; IS__CGSCC_NPM-SAME: () #[[ATTR4:[0-9]+]] {
; IS__CGSCC_NPM-NEXT: store i32 0, i32 addrspace(3)* @ConstAS3Ptr, align 4 ; IS__CGSCC_NPM-NEXT: store i32 0, i32 addrspace(3)* @ConstAS3Ptr, align 4
; IS__CGSCC_NPM-NEXT: ret void ; IS__CGSCC_NPM-NEXT: ret void
; ;
%call = call fastcc i32 addrspace(3)* @const_ptr_return_as3() %call = call fastcc i32 addrspace(3)* @const_ptr_return_as3()
store i32 0, i32 addrspace(3)* %call store i32 0, i32 addrspace(3)* %call
ret void ret void
} }
define void @user() { define void @user() {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind willreturn writeonly ; IS__TUNIT____: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly
; IS__TUNIT____-LABEL: define {{[^@]+}}@user ; IS__TUNIT____-LABEL: define {{[^@]+}}@user
; IS__TUNIT____-SAME: () #[[ATTR3]] { ; IS__TUNIT____-SAME: () #[[ATTR3]] {
; IS__TUNIT____-NEXT: store i32 0, i32* addrspacecast (i32 addrspace(3)* @ConstAS3Ptr to i32*), align 4 ; IS__TUNIT____-NEXT: store i32 0, i32* addrspacecast (i32 addrspace(3)* @ConstAS3Ptr to i32*), align 4
; IS__TUNIT____-NEXT: ret void ; IS__TUNIT____-NEXT: ret void
; ;
; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly ; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@user ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@user
; IS__CGSCC_OPM-SAME: () #[[ATTR4]] { ; IS__CGSCC_OPM-SAME: () #[[ATTR5]] {
; IS__CGSCC_OPM-NEXT: store i32 0, i32* addrspacecast (i32 addrspace(3)* @ConstAS3Ptr to i32*), align 4 ; IS__CGSCC_OPM-NEXT: store i32 0, i32* addrspacecast (i32 addrspace(3)* @ConstAS3Ptr to i32*), align 4
; IS__CGSCC_OPM-NEXT: ret void ; IS__CGSCC_OPM-NEXT: ret void
; ;
; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly ; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@user ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@user
; IS__CGSCC_NPM-SAME: () #[[ATTR3]] { ; IS__CGSCC_NPM-SAME: () #[[ATTR4]] {
; IS__CGSCC_NPM-NEXT: store i32 0, i32* addrspacecast (i32 addrspace(3)* @ConstAS3Ptr to i32*), align 4 ; IS__CGSCC_NPM-NEXT: store i32 0, i32* addrspacecast (i32 addrspace(3)* @ConstAS3Ptr to i32*), align 4
; IS__CGSCC_NPM-NEXT: ret void ; IS__CGSCC_NPM-NEXT: ret void
; ;
%call = call fastcc i32* @const_ptr_return() %call = call fastcc i32* @const_ptr_return()
store i32 0, i32* %call store i32 0, i32* %call
ret void ret void
} }
define i1 @test_merge_with_undef_values_ptr(i1 %c) { define i1 @test_merge_with_undef_values_ptr(i1 %c) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@test_merge_with_undef_values_ptr ; CHECK-LABEL: define {{[^@]+}}@test_merge_with_undef_values_ptr
; IS__TUNIT____-SAME: (i1 [[C:%.*]]) #[[ATTR1]] { ; CHECK-SAME: (i1 [[C:%.*]]) #[[ATTR1]] {
; IS__TUNIT____-NEXT: ret i1 false ; CHECK-NEXT: ret i1 false
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@test_merge_with_undef_values_ptr
; IS__CGSCC____-SAME: (i1 [[C:%.*]]) #[[ATTR1]] {
; IS__CGSCC____-NEXT: ret i1 false
; ;
%r1 = call i1 @undef_then_null(i1 %c, i32* undef, i32* undef) %r1 = call i1 @undef_then_null(i1 %c, i32* undef, i32* undef)
ret i1 %r1 ret i1 %r1
} }
define internal i1 @undef_then_null(i1 %c, i32* %i32Aptr, i32* %i32Bptr) { define internal i1 @undef_then_null(i1 %c, i32* %i32Aptr, i32* %i32Bptr) {
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@undef_then_null ; IS__CGSCC____-LABEL: define {{[^@]+}}@undef_then_null
; IS__CGSCC____-SAME: (i1 [[C:%.*]]) #[[ATTR1]] { ; IS__CGSCC____-SAME: (i1 [[C:%.*]]) #[[ATTR1]] {
Show All 10 Lines
a: a:
%r2 = call i1 @undef_then_null(i1 false, i32* null, i32* null) %r2 = call i1 @undef_then_null(i1 false, i32* null, i32* null)
ret i1 %r2 ret i1 %r2
b: b:
ret i1 %cmp2 ret i1 %cmp2
} }
define i1 @test_merge_with_undef_values(i1 %c) { define i1 @test_merge_with_undef_values(i1 %c) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@test_merge_with_undef_values ; CHECK-LABEL: define {{[^@]+}}@test_merge_with_undef_values
; IS__TUNIT____-SAME: (i1 [[C:%.*]]) #[[ATTR1]] { ; CHECK-SAME: (i1 [[C:%.*]]) #[[ATTR1]] {
; IS__TUNIT____-NEXT: ret i1 false ; CHECK-NEXT: ret i1 false
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@test_merge_with_undef_values
; IS__CGSCC____-SAME: (i1 [[C:%.*]]) #[[ATTR1]] {
; IS__CGSCC____-NEXT: ret i1 false
; ;
%r1 = call i1 @undef_then_1(i1 %c, i32 undef, i32 undef) %r1 = call i1 @undef_then_1(i1 %c, i32 undef, i32 undef)
ret i1 %r1 ret i1 %r1
} }
define internal i1 @undef_then_1(i1 %c, i32 %i32A, i32 %i32B) { define internal i1 @undef_then_1(i1 %c, i32 %i32A, i32 %i32B) {
; ;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@undef_then_1 ; IS__CGSCC____-LABEL: define {{[^@]+}}@undef_then_1
Show All 11 Lines
a: a:
%r2 = call i1 @undef_then_1(i1 false, i32 1, i32 1) %r2 = call i1 @undef_then_1(i1 false, i32 1, i32 1)
ret i1 %r2 ret i1 %r2
b: b:
ret i1 %cmp2 ret i1 %cmp2
} }
define i32 @test_select(i32 %c) { define i32 @test_select(i32 %c) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@test_select ; CHECK-LABEL: define {{[^@]+}}@test_select
; IS__TUNIT____-SAME: (i32 [[C:%.*]]) #[[ATTR1]] { ; CHECK-SAME: (i32 [[C:%.*]]) #[[ATTR1]] {
; IS__TUNIT____-NEXT: ret i32 42 ; CHECK-NEXT: ret i32 42
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@test_select
; IS__CGSCC____-SAME: (i32 [[C:%.*]]) #[[ATTR1]] {
; IS__CGSCC____-NEXT: ret i32 42
; ;
%call = call i32 @select(i1 1, i32 42, i32 %c) %call = call i32 @select(i1 1, i32 42, i32 %c)
ret i32 %call ret i32 %call
} }
define internal i32 @select(i1 %a, i32 %b, i32 %c) { define internal i32 @select(i1 %a, i32 %b, i32 %c) {
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@select ; IS__CGSCC____-LABEL: define {{[^@]+}}@select
; IS__CGSCC____-SAME: () #[[ATTR1]] { ; IS__CGSCC____-SAME: () #[[ATTR1]] {
; IS__CGSCC____-NEXT: ret i32 undef ; IS__CGSCC____-NEXT: ret i32 undef
; ;
%s = select i1 %a, i32 %b, i32 %c %s = select i1 %a, i32 %b, i32 %c
ret i32 %s ret i32 %s
} }
define i1 @icmp() { define i1 @icmp() {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@icmp ; CHECK-LABEL: define {{[^@]+}}@icmp
; IS__TUNIT____-SAME: () #[[ATTR1]] { ; CHECK-SAME: () #[[ATTR1]] {
; IS__TUNIT____-NEXT: ret i1 true ; CHECK-NEXT: ret i1 true
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@icmp
; IS__CGSCC____-SAME: () #[[ATTR1]] {
; IS__CGSCC____-NEXT: ret i1 true
; ;
%c = icmp eq i8* null, null %c = icmp eq i8* null, null
ret i1 %c ret i1 %c
} }
define void @test_callee_is_undef(void (i32)* %fn) { define void @test_callee_is_undef(void (i32)* %fn) {
; IS__TUNIT____-LABEL: define {{[^@]+}}@test_callee_is_undef ; IS__TUNIT____-LABEL: define {{[^@]+}}@test_callee_is_undef
; IS__TUNIT____-SAME: (void (i32)* nocapture nofree [[FN:%.*]]) { ; IS__TUNIT____-SAME: (void (i32)* nocapture nofree [[FN:%.*]]) {
Show All 35 Lines
} }
; Taken from 50683 ; Taken from 50683
; {{{ ; {{{
@g = internal constant { [2 x i8*] } { [2 x i8*] [i8* bitcast (void (i8***)* @f1 to i8*), i8* bitcast (void (i1 (i8*)*)* @f2 to i8*)] } @g = internal constant { [2 x i8*] } { [2 x i8*] [i8* bitcast (void (i8***)* @f1 to i8*), i8* bitcast (void (i1 (i8*)*)* @f2 to i8*)] }
define internal void @f1(i8*** %a) { define internal void @f1(i8*** %a) {
; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind willreturn writeonly ; IS__TUNIT____: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__TUNIT____-LABEL: define {{[^@]+}}@f1 ; IS__TUNIT____-LABEL: define {{[^@]+}}@f1
; IS__TUNIT____-SAME: (i8*** nocapture nofree noundef nonnull writeonly align 8 dereferenceable(8) [[A:%.*]]) #[[ATTR2]] { ; IS__TUNIT____-SAME: (i8*** nocapture nofree noundef nonnull writeonly align 8 dereferenceable(8) [[A:%.*]]) #[[ATTR2]] {
; IS__TUNIT____-NEXT: entry: ; IS__TUNIT____-NEXT: entry:
; IS__TUNIT____-NEXT: [[X:%.*]] = getelementptr { [2 x i8*] }, { [2 x i8*] }* @g, i32 0, i32 0, i32 0 ; IS__TUNIT____-NEXT: [[X:%.*]] = getelementptr { [2 x i8*] }, { [2 x i8*] }* @g, i32 0, i32 0, i32 0
; IS__TUNIT____-NEXT: store i8** [[X]], i8*** [[A]], align 8 ; IS__TUNIT____-NEXT: store i8** [[X]], i8*** [[A]], align 8
; IS__TUNIT____-NEXT: ret void ; IS__TUNIT____-NEXT: ret void
; ;
; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly ; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind willreturn writeonly
; IS__CGSCC____-LABEL: define {{[^@]+}}@f1 ; IS__CGSCC____-LABEL: define {{[^@]+}}@f1
; IS__CGSCC____-SAME: (i8*** nocapture nofree noundef nonnull writeonly align 8 dereferenceable(8) [[A:%.*]]) #[[ATTR2]] { ; IS__CGSCC____-SAME: (i8*** nocapture nofree noundef nonnull writeonly align 8 dereferenceable(8) [[A:%.*]]) #[[ATTR3]] {
; IS__CGSCC____-NEXT: entry: ; IS__CGSCC____-NEXT: entry:
; IS__CGSCC____-NEXT: [[X:%.*]] = getelementptr { [2 x i8*] }, { [2 x i8*] }* @g, i32 0, i32 0, i32 0 ; IS__CGSCC____-NEXT: [[X:%.*]] = getelementptr { [2 x i8*] }, { [2 x i8*] }* @g, i32 0, i32 0, i32 0
; IS__CGSCC____-NEXT: store i8** [[X]], i8*** [[A]], align 8 ; IS__CGSCC____-NEXT: store i8** [[X]], i8*** [[A]], align 8
; IS__CGSCC____-NEXT: ret void ; IS__CGSCC____-NEXT: ret void
; ;
entry: entry:
%x = getelementptr { [2 x i8*] }, { [2 x i8*] }* @g, i32 0, i32 0, i32 0 %x = getelementptr { [2 x i8*] }, { [2 x i8*] }* @g, i32 0, i32 0, i32 0
store i8** %x , i8*** %a, align 8 store i8** %x , i8*** %a, align 8
▲ Show 20 Lines • Show All 46 Lines • ▼ Show 20 Lines
entry: entry:
ret i1 false ret i1 false
} }
; }}} ; }}}
define i1 @test_cmp_null_after_cast() { define i1 @test_cmp_null_after_cast() {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn ; CHECK: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@test_cmp_null_after_cast ; CHECK-LABEL: define {{[^@]+}}@test_cmp_null_after_cast
; IS__TUNIT____-SAME: () #[[ATTR1]] { ; CHECK-SAME: () #[[ATTR1]] {
; IS__TUNIT____-NEXT: ret i1 true ; CHECK-NEXT: ret i1 true
;
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@test_cmp_null_after_cast
; IS__CGSCC____-SAME: () #[[ATTR1]] {
; IS__CGSCC____-NEXT: ret i1 true
; ;
%c = call i1 @cmp_null_after_cast(i32 0, i8 0) %c = call i1 @cmp_null_after_cast(i32 0, i8 0)
ret i1 %c ret i1 %c
} }
define internal i1 @cmp_null_after_cast(i32 %a, i8 %b) { define internal i1 @cmp_null_after_cast(i32 %a, i8 %b) {
; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn ; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@cmp_null_after_cast ; IS__CGSCC____-LABEL: define {{[^@]+}}@cmp_null_after_cast
; IS__CGSCC____-SAME: () #[[ATTR1]] { ; IS__CGSCC____-SAME: () #[[ATTR1]] {
▲ Show 20 Lines • Show All 76 Lines • ▼ Show 20 Linesjoin:
%ret = lshr i32 %phi, 1 %ret = lshr i32 %phi, 1
ret i32 %ret ret i32 %ret
uselistorder label %join, { 1, 0 } uselistorder label %join, { 1, 0 }
} }
;. ;.
; IS__TUNIT_OPM: attributes #[[ATTR0]] = { nofree nosync nounwind willreturn } ; IS__TUNIT_OPM: attributes #[[ATTR0]] = { nofree nosync nounwind willreturn }
; IS__TUNIT_OPM: attributes #[[ATTR1]] = { nofree nosync nounwind readnone willreturn } ; IS__TUNIT_OPM: attributes #[[ATTR1]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__TUNIT_OPM: attributes #[[ATTR2]] = { argmemonly nofree nosync nounwind willreturn writeonly } ; IS__TUNIT_OPM: attributes #[[ATTR2]] = { argmemonly nofree norecurse nosync nounwind willreturn writeonly }
; IS__TUNIT_OPM: attributes #[[ATTR3]] = { nofree nosync nounwind willreturn writeonly } ; IS__TUNIT_OPM: attributes #[[ATTR3]] = { nofree norecurse nosync nounwind willreturn writeonly }
; IS__TUNIT_OPM: attributes #[[ATTR4]] = { argmemonly nofree nosync nounwind writeonly } ; IS__TUNIT_OPM: attributes #[[ATTR4]] = { argmemonly nofree norecurse nosync nounwind writeonly }
; IS__TUNIT_OPM: attributes #[[ATTR5]] = { willreturn } ; IS__TUNIT_OPM: attributes #[[ATTR5]] = { nofree nosync nounwind readnone willreturn }
; IS__TUNIT_OPM: attributes #[[ATTR6]] = { willreturn }
; IS__TUNIT_OPM: attributes #[[ATTR7]] = { nofree nosync nounwind willreturn writeonly }
;. ;.
; IS__TUNIT_NPM: attributes #[[ATTR0]] = { nofree nosync nounwind willreturn } ; IS__TUNIT_NPM: attributes #[[ATTR0]] = { nofree nosync nounwind willreturn }
; IS__TUNIT_NPM: attributes #[[ATTR1]] = { nofree nosync nounwind readnone willreturn } ; IS__TUNIT_NPM: attributes #[[ATTR1]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__TUNIT_NPM: attributes #[[ATTR2]] = { argmemonly nofree nosync nounwind willreturn writeonly } ; IS__TUNIT_NPM: attributes #[[ATTR2]] = { argmemonly nofree norecurse nosync nounwind willreturn writeonly }
; IS__TUNIT_NPM: attributes #[[ATTR3]] = { nofree nosync nounwind willreturn writeonly } ; IS__TUNIT_NPM: attributes #[[ATTR3]] = { nofree norecurse nosync nounwind willreturn writeonly }
; IS__TUNIT_NPM: attributes #[[ATTR4]] = { willreturn } ; IS__TUNIT_NPM: attributes #[[ATTR4]] = { nofree nosync nounwind readnone willreturn }
; IS__TUNIT_NPM: attributes #[[ATTR5]] = { willreturn }
; IS__TUNIT_NPM: attributes #[[ATTR6]] = { nofree nosync nounwind willreturn writeonly }
;. ;.
; IS__CGSCC_OPM: attributes #[[ATTR0]] = { nofree nosync nounwind willreturn } ; IS__CGSCC_OPM: attributes #[[ATTR0:[0-9]+]] = { nofree nosync nounwind willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR1]] = { nofree norecurse nosync nounwind readnone willreturn } ; IS__CGSCC_OPM: attributes #[[ATTR1]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR2]] = { argmemonly nofree norecurse nosync nounwind willreturn writeonly } ; IS__CGSCC_OPM: attributes #[[ATTR2]] = { nofree norecurse nosync nounwind willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR3]] = { argmemonly nofree norecurse nosync nounwind writeonly } ; IS__CGSCC_OPM: attributes #[[ATTR3]] = { argmemonly nofree norecurse nosync nounwind willreturn writeonly }
; IS__CGSCC_OPM: attributes #[[ATTR4]] = { nofree norecurse nosync nounwind willreturn writeonly } ; IS__CGSCC_OPM: attributes #[[ATTR4]] = { argmemonly nofree norecurse nosync nounwind writeonly }
; IS__CGSCC_OPM: attributes #[[ATTR5]] = { willreturn } ; IS__CGSCC_OPM: attributes #[[ATTR5]] = { nofree norecurse nosync nounwind willreturn writeonly }
; IS__CGSCC_OPM: attributes #[[ATTR6]] = { nounwind willreturn writeonly } ; IS__CGSCC_OPM: attributes #[[ATTR6]] = { willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR7]] = { nounwind willreturn writeonly }
;. ;.
; IS__CGSCC_NPM: attributes #[[ATTR0]] = { nofree nosync nounwind willreturn } ; IS__CGSCC_NPM: attributes #[[ATTR0:[0-9]+]] = { nofree nosync nounwind willreturn }
; IS__CGSCC_NPM: attributes #[[ATTR1]] = { nofree norecurse nosync nounwind readnone willreturn } ; IS__CGSCC_NPM: attributes #[[ATTR1]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__CGSCC_NPM: attributes #[[ATTR2]] = { argmemonly nofree norecurse nosync nounwind willreturn writeonly } ; IS__CGSCC_NPM: attributes #[[ATTR2]] = { nofree norecurse nosync nounwind willreturn }
; IS__CGSCC_NPM: attributes #[[ATTR3]] = { nofree norecurse nosync nounwind willreturn writeonly } ; IS__CGSCC_NPM: attributes #[[ATTR3]] = { argmemonly nofree norecurse nosync nounwind willreturn writeonly }
; IS__CGSCC_NPM: attributes #[[ATTR4]] = { willreturn } ; IS__CGSCC_NPM: attributes #[[ATTR4]] = { nofree norecurse nosync nounwind willreturn writeonly }
; IS__CGSCC_NPM: attributes #[[ATTR5]] = { willreturn }
;. ;.
; CHECK: [[RNG0]] = !{i32 0, i32 -2147483648} ; CHECK: [[RNG0]] = !{i32 0, i32 -2147483648}
;. ;.

llvm/test/Transforms/Attributor/willreturn.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals
; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=16 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM ; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=16 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=16 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=16 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM
; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM ; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM
; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM ; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM
target datalayout = "e-m:e-i54:64-f80:128-n8:16:32:64-S128" target datalayout = "e-m:e-i54:64-f80:128-n8:16:32:64-S128"
; Test cases specifically designed for the "willreturn" function attribute. ; Test cases specifically designed for the "willreturn" function attribute.
; We use FIXME's to indicate problems and missing attributes. ; We use FIXME's to indicate problems and missing attributes.
; TEST 1 (positive case) ; TEST 1 (positive case)
define void @only_return() #0 { define void @only_return() #0 {
; IS__TUNIT____: Function Attrs: nofree noinline nosync nounwind readnone uwtable willreturn ; CHECK: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@only_return ; CHECK-LABEL: define {{[^@]+}}@only_return
; IS__TUNIT____-SAME: () #[[ATTR0:[0-9]+]] { ; CHECK-SAME: () #[[ATTR0:[0-9]+]] {
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@only_return
; IS__CGSCC____-SAME: () #[[ATTR0:[0-9]+]] {
; IS__CGSCC____-NEXT: ret void
; ;
ret void ret void
} }
; TEST 2 (positive & negative case) ; TEST 2 (positive & negative case)
; 2.1 (positive case) ; 2.1 (positive case)
; recursive function which will halt ; recursive function which will halt
; int fib(int n){ ; int fib(int n){
; return n<=1? n : fib(n-1) + fib(n-2); ; return n<=1? n : fib(n-1) + fib(n-2);
; } ; }
; FIXME: missing willreturn ; FIXME: missing willreturn
define i32 @fib(i32 %0) local_unnamed_addr #0 { define i32 @fib(i32 %0) local_unnamed_addr #0 {
; IS__TUNIT_OPM: Function Attrs: nofree noinline nosync nounwind readnone uwtable ; IS________OPM: Function Attrs: nofree noinline nosync nounwind readnone uwtable
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@fib ; IS________OPM-LABEL: define {{[^@]+}}@fib
; IS__TUNIT_OPM-SAME: (i32 [[TMP0:%.*]]) local_unnamed_addr #[[ATTR1:[0-9]+]] { ; IS________OPM-SAME: (i32 [[TMP0:%.*]]) local_unnamed_addr #[[ATTR1:[0-9]+]] {
; IS__TUNIT_OPM-NEXT: [[TMP2:%.*]] = icmp slt i32 [[TMP0]], 2 ; IS________OPM-NEXT: [[TMP2:%.*]] = icmp slt i32 [[TMP0]], 2
; IS__TUNIT_OPM-NEXT: br i1 [[TMP2]], label [[TMP9:%.*]], label [[TMP3:%.*]] ; IS________OPM-NEXT: br i1 [[TMP2]], label [[TMP9:%.*]], label [[TMP3:%.*]]
; IS__TUNIT_OPM: 3: ; IS________OPM: 3:
; IS__TUNIT_OPM-NEXT: [[TMP4:%.*]] = add nsw i32 [[TMP0]], -1 ; IS________OPM-NEXT: [[TMP4:%.*]] = add nsw i32 [[TMP0]], -1
; IS__TUNIT_OPM-NEXT: [[TMP5:%.*]] = tail call i32 @fib(i32 [[TMP4]]) #[[ATTR15:[0-9]+]] ; IS________OPM-NEXT: [[TMP5:%.*]] = tail call i32 @fib(i32 [[TMP4]]) #[[ATTR25:[0-9]+]]
; IS__TUNIT_OPM-NEXT: [[TMP6:%.*]] = add nsw i32 [[TMP0]], -2 ; IS________OPM-NEXT: [[TMP6:%.*]] = add nsw i32 [[TMP0]], -2
; IS__TUNIT_OPM-NEXT: [[TMP7:%.*]] = tail call i32 @fib(i32 [[TMP6]]) #[[ATTR15]] ; IS________OPM-NEXT: [[TMP7:%.*]] = tail call i32 @fib(i32 [[TMP6]]) #[[ATTR25]]
; IS__TUNIT_OPM-NEXT: [[TMP8:%.*]] = add nsw i32 [[TMP7]], [[TMP5]] ; IS________OPM-NEXT: [[TMP8:%.*]] = add nsw i32 [[TMP7]], [[TMP5]]
; IS__TUNIT_OPM-NEXT: ret i32 [[TMP8]] ; IS________OPM-NEXT: ret i32 [[TMP8]]
; IS__TUNIT_OPM: 9: ; IS________OPM: 9:
; IS__TUNIT_OPM-NEXT: ret i32 [[TMP0]] ; IS________OPM-NEXT: ret i32 [[TMP0]]
; ;
; IS__TUNIT_NPM: Function Attrs: nofree noinline nosync nounwind readnone uwtable ; IS________NPM: Function Attrs: nofree noinline nosync nounwind readnone uwtable
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@fib ; IS________NPM-LABEL: define {{[^@]+}}@fib
; IS__TUNIT_NPM-SAME: (i32 [[TMP0:%.*]]) local_unnamed_addr #[[ATTR1:[0-9]+]] { ; IS________NPM-SAME: (i32 [[TMP0:%.*]]) local_unnamed_addr #[[ATTR1:[0-9]+]] {
; IS__TUNIT_NPM-NEXT: [[TMP2:%.*]] = icmp slt i32 [[TMP0]], 2 ; IS________NPM-NEXT: [[TMP2:%.*]] = icmp slt i32 [[TMP0]], 2
; IS__TUNIT_NPM-NEXT: br i1 [[TMP2]], label [[TMP9:%.*]], label [[TMP3:%.*]] ; IS________NPM-NEXT: br i1 [[TMP2]], label [[TMP9:%.*]], label [[TMP3:%.*]]
; IS__TUNIT_NPM: 3: ; IS________NPM: 3:
; IS__TUNIT_NPM-NEXT: [[TMP4:%.*]] = add nsw i32 [[TMP0]], -1 ; IS________NPM-NEXT: [[TMP4:%.*]] = add nsw i32 [[TMP0]], -1
; IS__TUNIT_NPM-NEXT: [[TMP5:%.*]] = tail call i32 @fib(i32 [[TMP4]]) #[[ATTR16:[0-9]+]] ; IS________NPM-NEXT: [[TMP5:%.*]] = tail call i32 @fib(i32 [[TMP4]]) #[[ATTR27:[0-9]+]]
; IS__TUNIT_NPM-NEXT: [[TMP6:%.*]] = add nsw i32 [[TMP0]], -2 ; IS________NPM-NEXT: [[TMP6:%.*]] = add nsw i32 [[TMP0]], -2
; IS__TUNIT_NPM-NEXT: [[TMP7:%.*]] = tail call i32 @fib(i32 [[TMP6]]) #[[ATTR16]] ; IS________NPM-NEXT: [[TMP7:%.*]] = tail call i32 @fib(i32 [[TMP6]]) #[[ATTR27]]
; IS__TUNIT_NPM-NEXT: [[TMP8:%.*]] = add nsw i32 [[TMP7]], [[TMP5]] ; IS________NPM-NEXT: [[TMP8:%.*]] = add nsw i32 [[TMP7]], [[TMP5]]
; IS__TUNIT_NPM-NEXT: ret i32 [[TMP8]] ; IS________NPM-NEXT: ret i32 [[TMP8]]
; IS__TUNIT_NPM: 9: ; IS________NPM: 9:
; IS__TUNIT_NPM-NEXT: ret i32 [[TMP0]] ; IS________NPM-NEXT: ret i32 [[TMP0]]
;
; IS__CGSCC_OPM: Function Attrs: nofree noinline nosync nounwind readnone uwtable
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@fib
; IS__CGSCC_OPM-SAME: (i32 [[TMP0:%.*]]) local_unnamed_addr #[[ATTR1:[0-9]+]] {
; IS__CGSCC_OPM-NEXT: [[TMP2:%.*]] = icmp slt i32 [[TMP0]], 2
; IS__CGSCC_OPM-NEXT: br i1 [[TMP2]], label [[TMP9:%.*]], label [[TMP3:%.*]]
; IS__CGSCC_OPM: 3:
; IS__CGSCC_OPM-NEXT: [[TMP4:%.*]] = add nsw i32 [[TMP0]], -1
; IS__CGSCC_OPM-NEXT: [[TMP5:%.*]] = tail call i32 @fib(i32 [[TMP4]]) #[[ATTR26:[0-9]+]]
; IS__CGSCC_OPM-NEXT: [[TMP6:%.*]] = add nsw i32 [[TMP0]], -2
; IS__CGSCC_OPM-NEXT: [[TMP7:%.*]] = tail call i32 @fib(i32 [[TMP6]]) #[[ATTR26]]
; IS__CGSCC_OPM-NEXT: [[TMP8:%.*]] = add nsw i32 [[TMP7]], [[TMP5]]
; IS__CGSCC_OPM-NEXT: ret i32 [[TMP8]]
; IS__CGSCC_OPM: 9:
; IS__CGSCC_OPM-NEXT: ret i32 [[TMP0]]
;
; IS__CGSCC_NPM: Function Attrs: nofree noinline nosync nounwind readnone uwtable
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@fib
; IS__CGSCC_NPM-SAME: (i32 [[TMP0:%.*]]) local_unnamed_addr #[[ATTR1:[0-9]+]] {
; IS__CGSCC_NPM-NEXT: [[TMP2:%.*]] = icmp slt i32 [[TMP0]], 2
; IS__CGSCC_NPM-NEXT: br i1 [[TMP2]], label [[TMP9:%.*]], label [[TMP3:%.*]]
; IS__CGSCC_NPM: 3:
; IS__CGSCC_NPM-NEXT: [[TMP4:%.*]] = add nsw i32 [[TMP0]], -1
; IS__CGSCC_NPM-NEXT: [[TMP5:%.*]] = tail call i32 @fib(i32 [[TMP4]]) #[[ATTR28:[0-9]+]]
; IS__CGSCC_NPM-NEXT: [[TMP6:%.*]] = add nsw i32 [[TMP0]], -2
; IS__CGSCC_NPM-NEXT: [[TMP7:%.*]] = tail call i32 @fib(i32 [[TMP6]]) #[[ATTR28]]
; IS__CGSCC_NPM-NEXT: [[TMP8:%.*]] = add nsw i32 [[TMP7]], [[TMP5]]
; IS__CGSCC_NPM-NEXT: ret i32 [[TMP8]]
; IS__CGSCC_NPM: 9:
; IS__CGSCC_NPM-NEXT: ret i32 [[TMP0]]
; ;
%2 = icmp slt i32 %0, 2 %2 = icmp slt i32 %0, 2
br i1 %2, label %9, label %3 br i1 %2, label %9, label %3
; <label>:3: ; preds = %1 ; <label>:3: ; preds = %1
%4 = add nsw i32 %0, -1 %4 = add nsw i32 %0, -1
%5 = tail call i32 @fib(i32 %4) %5 = tail call i32 @fib(i32 %4)
%6 = add nsw i32 %0, -2 %6 = add nsw i32 %0, -2
Show All 11 Lines
; if (n==0) { ; if (n==0) {
; return 1; ; return 1;
; } ; }
; return fact_maybe_not_halt( n > 0 ? n-1 : n) * n; ; return fact_maybe_not_halt( n > 0 ? n-1 : n) * n;
; } ; }
; fact_maybe_not(-1) doesn't stop. ; fact_maybe_not(-1) doesn't stop.
define i32 @fact_maybe_not_halt(i32 %0) local_unnamed_addr #0 { define i32 @fact_maybe_not_halt(i32 %0) local_unnamed_addr #0 {
; IS__TUNIT____: Function Attrs: nofree noinline nosync nounwind readnone uwtable ; CHECK: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable
; IS__TUNIT____-LABEL: define {{[^@]+}}@fact_maybe_not_halt ; CHECK-LABEL: define {{[^@]+}}@fact_maybe_not_halt
; IS__TUNIT____-SAME: (i32 [[TMP0:%.*]]) local_unnamed_addr #[[ATTR1:[0-9]+]] { ; CHECK-SAME: (i32 [[TMP0:%.*]]) local_unnamed_addr #[[ATTR2:[0-9]+]] {
; IS__TUNIT____-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP0]], 0 ; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP0]], 0
; IS__TUNIT____-NEXT: br i1 [[TMP2]], label [[TMP11:%.*]], label [[TMP3:%.*]] ; CHECK-NEXT: br i1 [[TMP2]], label [[TMP11:%.*]], label [[TMP3:%.*]]
; IS__TUNIT____: 3: ; CHECK: 3:
; IS__TUNIT____-NEXT: [[TMP4:%.*]] = phi i32 [ [[TMP8:%.*]], [[TMP3]] ], [ [[TMP0]], [[TMP1:%.*]] ] ; CHECK-NEXT: [[TMP4:%.*]] = phi i32 [ [[TMP8:%.*]], [[TMP3]] ], [ [[TMP0]], [[TMP1:%.*]] ]
; IS__TUNIT____-NEXT: [[TMP5:%.*]] = phi i32 [ [[TMP9:%.*]], [[TMP3]] ], [ 1, [[TMP1]] ] ; CHECK-NEXT: [[TMP5:%.*]] = phi i32 [ [[TMP9:%.*]], [[TMP3]] ], [ 1, [[TMP1]] ]
; IS__TUNIT____-NEXT: [[TMP6:%.*]] = icmp sgt i32 [[TMP4]], 0 ; CHECK-NEXT: [[TMP6:%.*]] = icmp sgt i32 [[TMP4]], 0
; IS__TUNIT____-NEXT: [[TMP7:%.*]] = sext i1 [[TMP6]] to i32 ; CHECK-NEXT: [[TMP7:%.*]] = sext i1 [[TMP6]] to i32
; IS__TUNIT____-NEXT: [[TMP8]] = add nsw i32 [[TMP4]], [[TMP7]] ; CHECK-NEXT: [[TMP8]] = add nsw i32 [[TMP4]], [[TMP7]]
; IS__TUNIT____-NEXT: [[TMP9]] = mul nsw i32 [[TMP4]], [[TMP5]] ; CHECK-NEXT: [[TMP9]] = mul nsw i32 [[TMP4]], [[TMP5]]
; IS__TUNIT____-NEXT: [[TMP10:%.*]] = icmp eq i32 [[TMP8]], 0 ; CHECK-NEXT: [[TMP10:%.*]] = icmp eq i32 [[TMP8]], 0
; IS__TUNIT____-NEXT: br i1 [[TMP10]], label [[TMP11]], label [[TMP3]] ; CHECK-NEXT: br i1 [[TMP10]], label [[TMP11]], label [[TMP3]]
; IS__TUNIT____: 11: ; CHECK: 11:
; IS__TUNIT____-NEXT: [[TMP12:%.*]] = phi i32 [ 1, [[TMP1]] ], [ [[TMP9]], [[TMP3]] ] ; CHECK-NEXT: [[TMP12:%.*]] = phi i32 [ 1, [[TMP1]] ], [ [[TMP9]], [[TMP3]] ]
; IS__TUNIT____-NEXT: ret i32 [[TMP12]] ; CHECK-NEXT: ret i32 [[TMP12]]
;
; IS__CGSCC____: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable
; IS__CGSCC____-LABEL: define {{[^@]+}}@fact_maybe_not_halt
; IS__CGSCC____-SAME: (i32 [[TMP0:%.*]]) local_unnamed_addr #[[ATTR2:[0-9]+]] {
; IS__CGSCC____-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP0]], 0
; IS__CGSCC____-NEXT: br i1 [[TMP2]], label [[TMP11:%.*]], label [[TMP3:%.*]]
; IS__CGSCC____: 3:
; IS__CGSCC____-NEXT: [[TMP4:%.*]] = phi i32 [ [[TMP8:%.*]], [[TMP3]] ], [ [[TMP0]], [[TMP1:%.*]] ]
; IS__CGSCC____-NEXT: [[TMP5:%.*]] = phi i32 [ [[TMP9:%.*]], [[TMP3]] ], [ 1, [[TMP1]] ]
; IS__CGSCC____-NEXT: [[TMP6:%.*]] = icmp sgt i32 [[TMP4]], 0
; IS__CGSCC____-NEXT: [[TMP7:%.*]] = sext i1 [[TMP6]] to i32
; IS__CGSCC____-NEXT: [[TMP8]] = add nsw i32 [[TMP4]], [[TMP7]]
; IS__CGSCC____-NEXT: [[TMP9]] = mul nsw i32 [[TMP4]], [[TMP5]]
; IS__CGSCC____-NEXT: [[TMP10:%.*]] = icmp eq i32 [[TMP8]], 0
; IS__CGSCC____-NEXT: br i1 [[TMP10]], label [[TMP11]], label [[TMP3]]
; IS__CGSCC____: 11:
; IS__CGSCC____-NEXT: [[TMP12:%.*]] = phi i32 [ 1, [[TMP1]] ], [ [[TMP9]], [[TMP3]] ]
; IS__CGSCC____-NEXT: ret i32 [[TMP12]]
; ;
%2 = icmp eq i32 %0, 0 %2 = icmp eq i32 %0, 0
br i1 %2, label %11, label %3 br i1 %2, label %11, label %3
; <label>:3: ; preds = %1, %3 ; <label>:3: ; preds = %1, %3
%4 = phi i32 [ %8, %3 ], [ %0, %1 ] %4 = phi i32 [ %8, %3 ], [ %0, %1 ]
%5 = phi i32 [ %9, %3 ], [ 1, %1 ] %5 = phi i32 [ %9, %3 ], [ 1, %1 ]
%6 = icmp sgt i32 %4, 0 %6 = icmp sgt i32 %4, 0
Show All 15 Lines
; int ans = 1; ; int ans = 1;
; for(int i = 1;i<=n;i++){ ; for(int i = 1;i<=n;i++){
; ans *= i; ; ans *= i;
; } ; }
; return ans; ; return ans;
; } ; }
define i32 @fact_loop(i32 %0) local_unnamed_addr #0 { define i32 @fact_loop(i32 %0) local_unnamed_addr #0 {
; IS__TUNIT_OPM: Function Attrs: nofree noinline nosync nounwind readnone uwtable ; IS________OPM: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@fact_loop ; IS________OPM-LABEL: define {{[^@]+}}@fact_loop
; IS__TUNIT_OPM-SAME: (i32 [[TMP0:%.*]]) local_unnamed_addr #[[ATTR1]] { ; IS________OPM-SAME: (i32 [[TMP0:%.*]]) local_unnamed_addr #[[ATTR2]] {
; IS__TUNIT_OPM-NEXT: [[TMP2:%.*]] = icmp slt i32 [[TMP0]], 1 ; IS________OPM-NEXT: [[TMP2:%.*]] = icmp slt i32 [[TMP0]], 1
; IS__TUNIT_OPM-NEXT: br i1 [[TMP2]], label [[TMP3:%.*]], label [[TMP5:%.*]] ; IS________OPM-NEXT: br i1 [[TMP2]], label [[TMP3:%.*]], label [[TMP5:%.*]]
; IS__TUNIT_OPM: 3: ; IS________OPM: 3:
; IS__TUNIT_OPM-NEXT: [[TMP4:%.*]] = phi i32 [ 1, [[TMP1:%.*]] ], [ [[TMP8:%.*]], [[TMP5]] ] ; IS________OPM-NEXT: [[TMP4:%.*]] = phi i32 [ 1, [[TMP1:%.*]] ], [ [[TMP8:%.*]], [[TMP5]] ]
; IS__TUNIT_OPM-NEXT: ret i32 [[TMP4]] ; IS________OPM-NEXT: ret i32 [[TMP4]]
; IS__TUNIT_OPM: 5: ; IS________OPM: 5:
; IS__TUNIT_OPM-NEXT: [[TMP6:%.*]] = phi i32 [ [[TMP9:%.*]], [[TMP5]] ], [ 1, [[TMP1]] ] ; IS________OPM-NEXT: [[TMP6:%.*]] = phi i32 [ [[TMP9:%.*]], [[TMP5]] ], [ 1, [[TMP1]] ]
; IS__TUNIT_OPM-NEXT: [[TMP7:%.*]] = phi i32 [ [[TMP8]], [[TMP5]] ], [ 1, [[TMP1]] ] ; IS________OPM-NEXT: [[TMP7:%.*]] = phi i32 [ [[TMP8]], [[TMP5]] ], [ 1, [[TMP1]] ]
; IS__TUNIT_OPM-NEXT: [[TMP8]] = mul nsw i32 [[TMP6]], [[TMP7]] ; IS________OPM-NEXT: [[TMP8]] = mul nsw i32 [[TMP6]], [[TMP7]]
; IS__TUNIT_OPM-NEXT: [[TMP9]] = add nuw nsw i32 [[TMP6]], 1 ; IS________OPM-NEXT: [[TMP9]] = add nuw nsw i32 [[TMP6]], 1
; IS__TUNIT_OPM-NEXT: [[TMP10:%.*]] = icmp eq i32 [[TMP6]], [[TMP0]] ; IS________OPM-NEXT: [[TMP10:%.*]] = icmp eq i32 [[TMP6]], [[TMP0]]
; IS__TUNIT_OPM-NEXT: br i1 [[TMP10]], label [[TMP3]], label [[TMP5]] ; IS________OPM-NEXT: br i1 [[TMP10]], label [[TMP3]], label [[TMP5]]
; ;
; IS__TUNIT_NPM: Function Attrs: nofree noinline nosync nounwind readnone uwtable willreturn ; IS________NPM: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@fact_loop ; IS________NPM-LABEL: define {{[^@]+}}@fact_loop
; IS__TUNIT_NPM-SAME: (i32 [[TMP0:%.*]]) local_unnamed_addr #[[ATTR0]] { ; IS________NPM-SAME: (i32 [[TMP0:%.*]]) local_unnamed_addr #[[ATTR0]] {
; IS__TUNIT_NPM-NEXT: [[TMP2:%.*]] = icmp slt i32 [[TMP0]], 1 ; IS________NPM-NEXT: [[TMP2:%.*]] = icmp slt i32 [[TMP0]], 1
; IS__TUNIT_NPM-NEXT: br i1 [[TMP2]], label [[TMP3:%.*]], label [[TMP5:%.*]] ; IS________NPM-NEXT: br i1 [[TMP2]], label [[TMP3:%.*]], label [[TMP5:%.*]]
; IS__TUNIT_NPM: 3: ; IS________NPM: 3:
; IS__TUNIT_NPM-NEXT: [[TMP4:%.*]] = phi i32 [ 1, [[TMP1:%.*]] ], [ [[TMP8:%.*]], [[TMP5]] ] ; IS________NPM-NEXT: [[TMP4:%.*]] = phi i32 [ 1, [[TMP1:%.*]] ], [ [[TMP8:%.*]], [[TMP5]] ]
; IS__TUNIT_NPM-NEXT: ret i32 [[TMP4]] ; IS________NPM-NEXT: ret i32 [[TMP4]]
; IS__TUNIT_NPM: 5: ; IS________NPM: 5:
; IS__TUNIT_NPM-NEXT: [[TMP6:%.*]] = phi i32 [ [[TMP9:%.*]], [[TMP5]] ], [ 1, [[TMP1]] ] ; IS________NPM-NEXT: [[TMP6:%.*]] = phi i32 [ [[TMP9:%.*]], [[TMP5]] ], [ 1, [[TMP1]] ]
; IS__TUNIT_NPM-NEXT: [[TMP7:%.*]] = phi i32 [ [[TMP8]], [[TMP5]] ], [ 1, [[TMP1]] ] ; IS________NPM-NEXT: [[TMP7:%.*]] = phi i32 [ [[TMP8]], [[TMP5]] ], [ 1, [[TMP1]] ]
; IS__TUNIT_NPM-NEXT: [[TMP8]] = mul nsw i32 [[TMP6]], [[TMP7]] ; IS________NPM-NEXT: [[TMP8]] = mul nsw i32 [[TMP6]], [[TMP7]]
; IS__TUNIT_NPM-NEXT: [[TMP9]] = add nuw nsw i32 [[TMP6]], 1 ; IS________NPM-NEXT: [[TMP9]] = add nuw nsw i32 [[TMP6]], 1
; IS__TUNIT_NPM-NEXT: [[TMP10:%.*]] = icmp eq i32 [[TMP6]], [[TMP0]] ; IS________NPM-NEXT: [[TMP10:%.*]] = icmp eq i32 [[TMP6]], [[TMP0]]
; IS__TUNIT_NPM-NEXT: br i1 [[TMP10]], label [[TMP3]], label [[TMP5]] ; IS________NPM-NEXT: br i1 [[TMP10]], label [[TMP3]], label [[TMP5]]
;
; IS__CGSCC_OPM: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@fact_loop
; IS__CGSCC_OPM-SAME: (i32 [[TMP0:%.*]]) local_unnamed_addr #[[ATTR2]] {
; IS__CGSCC_OPM-NEXT: [[TMP2:%.*]] = icmp slt i32 [[TMP0]], 1
; IS__CGSCC_OPM-NEXT: br i1 [[TMP2]], label [[TMP3:%.*]], label [[TMP5:%.*]]
; IS__CGSCC_OPM: 3:
; IS__CGSCC_OPM-NEXT: [[TMP4:%.*]] = phi i32 [ 1, [[TMP1:%.*]] ], [ [[TMP8:%.*]], [[TMP5]] ]
; IS__CGSCC_OPM-NEXT: ret i32 [[TMP4]]
; IS__CGSCC_OPM: 5:
; IS__CGSCC_OPM-NEXT: [[TMP6:%.*]] = phi i32 [ [[TMP9:%.*]], [[TMP5]] ], [ 1, [[TMP1]] ]
; IS__CGSCC_OPM-NEXT: [[TMP7:%.*]] = phi i32 [ [[TMP8]], [[TMP5]] ], [ 1, [[TMP1]] ]
; IS__CGSCC_OPM-NEXT: [[TMP8]] = mul nsw i32 [[TMP6]], [[TMP7]]
; IS__CGSCC_OPM-NEXT: [[TMP9]] = add nuw nsw i32 [[TMP6]], 1
; IS__CGSCC_OPM-NEXT: [[TMP10:%.*]] = icmp eq i32 [[TMP6]], [[TMP0]]
; IS__CGSCC_OPM-NEXT: br i1 [[TMP10]], label [[TMP3]], label [[TMP5]]
;
; IS__CGSCC_NPM: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@fact_loop
; IS__CGSCC_NPM-SAME: (i32 [[TMP0:%.*]]) local_unnamed_addr #[[ATTR0]] {
; IS__CGSCC_NPM-NEXT: [[TMP2:%.*]] = icmp slt i32 [[TMP0]], 1
; IS__CGSCC_NPM-NEXT: br i1 [[TMP2]], label [[TMP3:%.*]], label [[TMP5:%.*]]
; IS__CGSCC_NPM: 3:
; IS__CGSCC_NPM-NEXT: [[TMP4:%.*]] = phi i32 [ 1, [[TMP1:%.*]] ], [ [[TMP8:%.*]], [[TMP5]] ]
; IS__CGSCC_NPM-NEXT: ret i32 [[TMP4]]
; IS__CGSCC_NPM: 5:
; IS__CGSCC_NPM-NEXT: [[TMP6:%.*]] = phi i32 [ [[TMP9:%.*]], [[TMP5]] ], [ 1, [[TMP1]] ]
; IS__CGSCC_NPM-NEXT: [[TMP7:%.*]] = phi i32 [ [[TMP8]], [[TMP5]] ], [ 1, [[TMP1]] ]
; IS__CGSCC_NPM-NEXT: [[TMP8]] = mul nsw i32 [[TMP6]], [[TMP7]]
; IS__CGSCC_NPM-NEXT: [[TMP9]] = add nuw nsw i32 [[TMP6]], 1
; IS__CGSCC_NPM-NEXT: [[TMP10:%.*]] = icmp eq i32 [[TMP6]], [[TMP0]]
; IS__CGSCC_NPM-NEXT: br i1 [[TMP10]], label [[TMP3]], label [[TMP5]]
; ;
%2 = icmp slt i32 %0, 1 %2 = icmp slt i32 %0, 1
br i1 %2, label %3, label %5 br i1 %2, label %3, label %5
; <label>:3: ; preds = %5, %1 ; <label>:3: ; preds = %5, %1
%4 = phi i32 [ 1, %1 ], [ %8, %5 ] %4 = phi i32 [ 1, %1 ], [ %8, %5 ]
ret i32 %4 ret i32 %4
Show All 13 Lines
; } ; }
; void mutual_recursion2(){ ; void mutual_recursion2(){
; mutual_recursion1(); ; mutual_recursion1();
; } ; }
declare void @sink() nounwind willreturn nosync nofree declare void @sink() nounwind willreturn nosync nofree
define void @mutual_recursion1(i1 %c) #0 { define void @mutual_recursion1(i1 %c) #0 {
; IS__TUNIT_OPM: Function Attrs: nofree noinline nosync nounwind uwtable ; IS________OPM: Function Attrs: nofree noinline nosync nounwind uwtable
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@mutual_recursion1 ; IS________OPM-LABEL: define {{[^@]+}}@mutual_recursion1
; IS__TUNIT_OPM-SAME: (i1 [[C:%.*]]) #[[ATTR3:[0-9]+]] { ; IS________OPM-SAME: (i1 [[C:%.*]]) #[[ATTR4:[0-9]+]] {
; IS__TUNIT_OPM-NEXT: br i1 [[C]], label [[REC:%.*]], label [[END:%.*]] ; IS________OPM-NEXT: br i1 [[C]], label [[REC:%.*]], label [[END:%.*]]
; IS__TUNIT_OPM: rec: ; IS________OPM: rec:
; IS__TUNIT_OPM-NEXT: call void @sink() #[[ATTR11:[0-9]+]] ; IS________OPM-NEXT: call void @sink() #[[ATTR13:[0-9]+]]
; IS__TUNIT_OPM-NEXT: call void @mutual_recursion2(i1 [[C]]) #[[ATTR23:[0-9]+]] ; IS________OPM-NEXT: call void @mutual_recursion2(i1 [[C]]) #[[ATTR26:[0-9]+]]
; IS__TUNIT_OPM-NEXT: br label [[END]] ; IS________OPM-NEXT: br label [[END]]
; IS__TUNIT_OPM: end: ; IS________OPM: end:
; IS__TUNIT_OPM-NEXT: ret void ; IS________OPM-NEXT: ret void
; ;
; IS__TUNIT_NPM: Function Attrs: nofree noinline nosync nounwind uwtable ; IS________NPM: Function Attrs: nofree noinline nosync nounwind uwtable
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@mutual_recursion1 ; IS________NPM-LABEL: define {{[^@]+}}@mutual_recursion1
; IS__TUNIT_NPM-SAME: (i1 [[C:%.*]]) #[[ATTR3:[0-9]+]] { ; IS________NPM-SAME: (i1 [[C:%.*]]) #[[ATTR4:[0-9]+]] {
; IS__TUNIT_NPM-NEXT: br i1 [[C]], label [[REC:%.*]], label [[END:%.*]] ; IS________NPM-NEXT: br i1 [[C]], label [[REC:%.*]], label [[END:%.*]]
; IS__TUNIT_NPM: rec: ; IS________NPM: rec:
; IS__TUNIT_NPM-NEXT: call void @sink() #[[ATTR11:[0-9]+]] ; IS________NPM-NEXT: call void @sink() #[[ATTR13:[0-9]+]]
; IS__TUNIT_NPM-NEXT: call void @mutual_recursion2(i1 noundef [[C]]) #[[ATTR25:[0-9]+]] ; IS________NPM-NEXT: call void @mutual_recursion2(i1 noundef [[C]]) #[[ATTR28:[0-9]+]]
; IS__TUNIT_NPM-NEXT: br label [[END]] ; IS________NPM-NEXT: br label [[END]]
; IS__TUNIT_NPM: end: ; IS________NPM: end:
; IS__TUNIT_NPM-NEXT: ret void ; IS________NPM-NEXT: ret void
;
; IS__CGSCC_OPM: Function Attrs: nofree noinline nosync nounwind uwtable
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@mutual_recursion1
; IS__CGSCC_OPM-SAME: (i1 [[C:%.*]]) #[[ATTR4:[0-9]+]] {
; IS__CGSCC_OPM-NEXT: br i1 [[C]], label [[REC:%.*]], label [[END:%.*]]
; IS__CGSCC_OPM: rec:
; IS__CGSCC_OPM-NEXT: call void @sink() #[[ATTR14:[0-9]+]]
; IS__CGSCC_OPM-NEXT: call void @mutual_recursion2(i1 [[C]]) #[[ATTR27:[0-9]+]]
; IS__CGSCC_OPM-NEXT: br label [[END]]
; IS__CGSCC_OPM: end:
; IS__CGSCC_OPM-NEXT: ret void
;
; IS__CGSCC_NPM: Function Attrs: nofree noinline nosync nounwind uwtable
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@mutual_recursion1
; IS__CGSCC_NPM-SAME: (i1 [[C:%.*]]) #[[ATTR4:[0-9]+]] {
; IS__CGSCC_NPM-NEXT: br i1 [[C]], label [[REC:%.*]], label [[END:%.*]]
; IS__CGSCC_NPM: rec:
; IS__CGSCC_NPM-NEXT: call void @sink() #[[ATTR14:[0-9]+]]
; IS__CGSCC_NPM-NEXT: call void @mutual_recursion2(i1 noundef [[C]]) #[[ATTR29:[0-9]+]]
; IS__CGSCC_NPM-NEXT: br label [[END]]
; IS__CGSCC_NPM: end:
; IS__CGSCC_NPM-NEXT: ret void
; ;
br i1 %c, label %rec, label %end br i1 %c, label %rec, label %end
rec: rec:
call void @sink() call void @sink()
call void @mutual_recursion2(i1 %c) call void @mutual_recursion2(i1 %c)
br label %end br label %end
end: end:
ret void ret void
} }
define void @mutual_recursion2(i1 %c) #0 { define void @mutual_recursion2(i1 %c) #0 {
; IS__TUNIT_OPM: Function Attrs: nofree noinline nosync nounwind uwtable ; IS________OPM: Function Attrs: nofree noinline nosync nounwind uwtable
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@mutual_recursion2 ; IS________OPM-LABEL: define {{[^@]+}}@mutual_recursion2
; IS__TUNIT_OPM-SAME: (i1 [[C:%.*]]) #[[ATTR3]] { ; IS________OPM-SAME: (i1 [[C:%.*]]) #[[ATTR4]] {
; IS__TUNIT_OPM-NEXT: call void @mutual_recursion1(i1 [[C]]) #[[ATTR23]] ; IS________OPM-NEXT: call void @mutual_recursion1(i1 [[C]]) #[[ATTR26]]
; IS__TUNIT_OPM-NEXT: ret void ; IS________OPM-NEXT: ret void
; ;
; IS__TUNIT_NPM: Function Attrs: nofree noinline nosync nounwind uwtable ; IS________NPM: Function Attrs: nofree noinline nosync nounwind uwtable
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@mutual_recursion2 ; IS________NPM-LABEL: define {{[^@]+}}@mutual_recursion2
; IS__TUNIT_NPM-SAME: (i1 [[C:%.*]]) #[[ATTR3]] { ; IS________NPM-SAME: (i1 [[C:%.*]]) #[[ATTR4]] {
; IS__TUNIT_NPM-NEXT: call void @mutual_recursion1(i1 [[C]]) #[[ATTR25]] ; IS________NPM-NEXT: call void @mutual_recursion1(i1 [[C]]) #[[ATTR28]]
; IS__TUNIT_NPM-NEXT: ret void ; IS________NPM-NEXT: ret void
;
; IS__CGSCC_OPM: Function Attrs: nofree noinline nosync nounwind uwtable
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@mutual_recursion2
; IS__CGSCC_OPM-SAME: (i1 [[C:%.*]]) #[[ATTR4]] {
; IS__CGSCC_OPM-NEXT: call void @mutual_recursion1(i1 [[C]]) #[[ATTR27]]
; IS__CGSCC_OPM-NEXT: ret void
;
; IS__CGSCC_NPM: Function Attrs: nofree noinline nosync nounwind uwtable
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@mutual_recursion2
; IS__CGSCC_NPM-SAME: (i1 [[C:%.*]]) #[[ATTR4]] {
; IS__CGSCC_NPM-NEXT: call void @mutual_recursion1(i1 [[C]]) #[[ATTR29]]
; IS__CGSCC_NPM-NEXT: ret void
; ;
call void @mutual_recursion1(i1 %c) call void @mutual_recursion1(i1 %c)
ret void ret void
} }
; TEST 5 (negative case) ; TEST 5 (negative case)
; call exit/abort (has noreturn attribute) ; call exit/abort (has noreturn attribute)
; CHECK: Function Attrs: noreturn ; CHECK: Function Attrs: noreturn
; CHECK-NEXT: declare void @exit(i32) local_unnamed_add ; CHECK-NEXT: declare void @exit(i32) local_unnamed_add
declare void @exit(i32 %0) local_unnamed_addr noreturn declare void @exit(i32 %0) local_unnamed_addr noreturn
define void @only_exit() local_unnamed_addr #0 { define void @only_exit() local_unnamed_addr #0 {
; IS__TUNIT____: Function Attrs: noinline noreturn nounwind uwtable ; CHECK: Function Attrs: noinline noreturn nounwind uwtable
; IS__TUNIT____-LABEL: define {{[^@]+}}@only_exit ; CHECK-LABEL: define {{[^@]+}}@only_exit
; IS__TUNIT____-SAME: () local_unnamed_addr #[[ATTR5:[0-9]+]] { ; CHECK-SAME: () local_unnamed_addr #[[ATTR6:[0-9]+]] {
; IS__TUNIT____-NEXT: tail call void @exit(i32 noundef 0) #[[ATTR4:[0-9]+]] ; CHECK-NEXT: tail call void @exit(i32 noundef 0) #[[ATTR5:[0-9]+]]
; IS__TUNIT____-NEXT: unreachable ; CHECK-NEXT: unreachable
;
; IS__CGSCC____: Function Attrs: noinline noreturn nounwind uwtable
; IS__CGSCC____-LABEL: define {{[^@]+}}@only_exit
; IS__CGSCC____-SAME: () local_unnamed_addr #[[ATTR6:[0-9]+]] {
; IS__CGSCC____-NEXT: tail call void @exit(i32 noundef 0) #[[ATTR5:[0-9]+]]
; IS__CGSCC____-NEXT: unreachable
; ;
tail call void @exit(i32 0) tail call void @exit(i32 0)
unreachable unreachable
} }
; conditional exit ; conditional exit
; void conditional_exit(int cond, int *p){ ; void conditional_exit(int cond, int *p){
; if(cond){ ; if(cond){
; exit(0); ; exit(0);
; } ; }
; if(*p){ ; if(*p){
; exit(1); ; exit(1);
; } ; }
; return; ; return;
; } ; }
define void @conditional_exit(i32 %0, i32* nocapture readonly %1) local_unnamed_addr #0 { define void @conditional_exit(i32 %0, i32* nocapture readonly %1) local_unnamed_addr #0 {
; IS__TUNIT____: Function Attrs: noinline nounwind uwtable ; CHECK: Function Attrs: noinline nounwind uwtable
; IS__TUNIT____-LABEL: define {{[^@]+}}@conditional_exit ; CHECK-LABEL: define {{[^@]+}}@conditional_exit
; IS__TUNIT____-SAME: (i32 [[TMP0:%.*]], i32* nocapture nofree readonly [[TMP1:%.*]]) local_unnamed_addr #[[ATTR6:[0-9]+]] { ; CHECK-SAME: (i32 [[TMP0:%.*]], i32* nocapture nofree readonly [[TMP1:%.*]]) local_unnamed_addr #[[ATTR7:[0-9]+]] {
; IS__TUNIT____-NEXT: [[TMP3:%.*]] = icmp eq i32 [[TMP0]], 0 ; CHECK-NEXT: [[TMP3:%.*]] = icmp eq i32 [[TMP0]], 0
; IS__TUNIT____-NEXT: br i1 [[TMP3]], label [[TMP5:%.*]], label [[TMP4:%.*]] ; CHECK-NEXT: br i1 [[TMP3]], label [[TMP5:%.*]], label [[TMP4:%.*]]
; IS__TUNIT____: 4: ; CHECK: 4:
; IS__TUNIT____-NEXT: tail call void @exit(i32 noundef 0) #[[ATTR4]] ; CHECK-NEXT: tail call void @exit(i32 noundef 0) #[[ATTR5]]
; IS__TUNIT____-NEXT: unreachable ; CHECK-NEXT: unreachable
; IS__TUNIT____: 5: ; CHECK: 5:
; IS__TUNIT____-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP1]], align 4 ; CHECK-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP1]], align 4
; IS__TUNIT____-NEXT: [[TMP7:%.*]] = icmp eq i32 [[TMP6]], 0 ; CHECK-NEXT: [[TMP7:%.*]] = icmp eq i32 [[TMP6]], 0
; IS__TUNIT____-NEXT: br i1 [[TMP7]], label [[TMP9:%.*]], label [[TMP8:%.*]] ; CHECK-NEXT: br i1 [[TMP7]], label [[TMP9:%.*]], label [[TMP8:%.*]]
; IS__TUNIT____: 8: ; CHECK: 8:
; IS__TUNIT____-NEXT: tail call void @exit(i32 noundef 1) #[[ATTR4]] ; CHECK-NEXT: tail call void @exit(i32 noundef 1) #[[ATTR5]]
; IS__TUNIT____-NEXT: unreachable ; CHECK-NEXT: unreachable
; IS__TUNIT____: 9: ; CHECK: 9:
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: noinline nounwind uwtable
; IS__CGSCC____-LABEL: define {{[^@]+}}@conditional_exit
; IS__CGSCC____-SAME: (i32 [[TMP0:%.*]], i32* nocapture nofree readonly [[TMP1:%.*]]) local_unnamed_addr #[[ATTR7:[0-9]+]] {
; IS__CGSCC____-NEXT: [[TMP3:%.*]] = icmp eq i32 [[TMP0]], 0
; IS__CGSCC____-NEXT: br i1 [[TMP3]], label [[TMP5:%.*]], label [[TMP4:%.*]]
; IS__CGSCC____: 4:
; IS__CGSCC____-NEXT: tail call void @exit(i32 noundef 0) #[[ATTR5]]
; IS__CGSCC____-NEXT: unreachable
; IS__CGSCC____: 5:
; IS__CGSCC____-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP1]], align 4
; IS__CGSCC____-NEXT: [[TMP7:%.*]] = icmp eq i32 [[TMP6]], 0
; IS__CGSCC____-NEXT: br i1 [[TMP7]], label [[TMP9:%.*]], label [[TMP8:%.*]]
; IS__CGSCC____: 8:
; IS__CGSCC____-NEXT: tail call void @exit(i32 noundef 1) #[[ATTR5]]
; IS__CGSCC____-NEXT: unreachable
; IS__CGSCC____: 9:
; IS__CGSCC____-NEXT: ret void
; ;
%3 = icmp eq i32 %0, 0 %3 = icmp eq i32 %0, 0
br i1 %3, label %5, label %4 br i1 %3, label %5, label %4
; <label>:4: ; preds = %2 ; <label>:4: ; preds = %2
tail call void @exit(i32 0) tail call void @exit(i32 0)
unreachable unreachable
Show All 12 Lines
; TEST 6 (positive case) ; TEST 6 (positive case)
; Call intrinsic function ; Call intrinsic function
; CHECK: Function Attrs: nofree nosync nounwind readnone speculatable willreturn ; CHECK: Function Attrs: nofree nosync nounwind readnone speculatable willreturn
; CHECK-NEXT: declare float @llvm.floor.f32(float) ; CHECK-NEXT: declare float @llvm.floor.f32(float)
declare float @llvm.floor.f32(float) declare float @llvm.floor.f32(float)
define void @call_floor(float %a) #0 { define void @call_floor(float %a) #0 {
; IS__TUNIT____: Function Attrs: nofree noinline nosync nounwind readnone uwtable willreturn ; CHECK: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@call_floor ; CHECK-LABEL: define {{[^@]+}}@call_floor
; IS__TUNIT____-SAME: (float [[A:%.*]]) #[[ATTR0]] { ; CHECK-SAME: (float [[A:%.*]]) #[[ATTR0]] {
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@call_floor
; IS__CGSCC____-SAME: (float [[A:%.*]]) #[[ATTR0]] {
; IS__CGSCC____-NEXT: ret void
; ;
tail call float @llvm.floor.f32(float %a) tail call float @llvm.floor.f32(float %a)
ret void ret void
} }
define float @call_floor2(float %a) #0 { define float @call_floor2(float %a) #0 {
; IS__TUNIT_OPM: Function Attrs: nofree noinline nosync nounwind readnone uwtable willreturn ; IS________OPM: Function Attrs: nofree noinline nosync nounwind readnone uwtable willreturn
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@call_floor2 ; IS________OPM-LABEL: define {{[^@]+}}@call_floor2
; IS__TUNIT_OPM-SAME: (float [[A:%.*]]) #[[ATTR0]] { ; IS________OPM-SAME: (float [[A:%.*]]) #[[ATTR9:[0-9]+]] {
; IS__TUNIT_OPM-NEXT: [[C:%.*]] = tail call float @llvm.floor.f32(float [[A]]) #[[ATTR24:[0-9]+]] ; IS________OPM-NEXT: [[C:%.*]] = tail call float @llvm.floor.f32(float [[A]]) #[[ATTR27:[0-9]+]]
; IS__TUNIT_OPM-NEXT: ret float [[C]] ; IS________OPM-NEXT: ret float [[C]]
; ;
; IS__TUNIT_NPM: Function Attrs: nofree noinline nosync nounwind readnone uwtable willreturn ; IS________NPM: Function Attrs: nofree noinline nosync nounwind readnone uwtable willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@call_floor2 ; IS________NPM-LABEL: define {{[^@]+}}@call_floor2
; IS__TUNIT_NPM-SAME: (float [[A:%.*]]) #[[ATTR0]] { ; IS________NPM-SAME: (float [[A:%.*]]) #[[ATTR9:[0-9]+]] {
; IS__TUNIT_NPM-NEXT: [[C:%.*]] = tail call float @llvm.floor.f32(float [[A]]) #[[ATTR26:[0-9]+]] ; IS________NPM-NEXT: [[C:%.*]] = tail call float @llvm.floor.f32(float [[A]]) #[[ATTR29:[0-9]+]]
; IS__TUNIT_NPM-NEXT: ret float [[C]] ; IS________NPM-NEXT: ret float [[C]]
;
; IS__CGSCC_OPM: Function Attrs: nofree noinline nosync nounwind readnone uwtable willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@call_floor2
; IS__CGSCC_OPM-SAME: (float [[A:%.*]]) #[[ATTR9:[0-9]+]] {
; IS__CGSCC_OPM-NEXT: [[C:%.*]] = tail call float @llvm.floor.f32(float [[A]]) #[[ATTR28:[0-9]+]]
; IS__CGSCC_OPM-NEXT: ret float [[C]]
;
; IS__CGSCC_NPM: Function Attrs: nofree noinline nosync nounwind readnone uwtable willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@call_floor2
; IS__CGSCC_NPM-SAME: (float [[A:%.*]]) #[[ATTR9:[0-9]+]] {
; IS__CGSCC_NPM-NEXT: [[C:%.*]] = tail call float @llvm.floor.f32(float [[A]]) #[[ATTR30:[0-9]+]]
; IS__CGSCC_NPM-NEXT: ret float [[C]]
; ;
%c = tail call float @llvm.floor.f32(float %a) %c = tail call float @llvm.floor.f32(float %a)
ret float %c ret float %c
} }
; TEST 7 (negative case) ; TEST 7 (negative case)
; Call function declaration without willreturn ; Call function declaration without willreturn
; CHECK: Function Attrs: noinline nounwind uwtable ; CHECK: Function Attrs: noinline nounwind uwtable
; CHECK-NOT: willreturn ; CHECK-NOT: willreturn
; CHECK-NEXT: declare void @maybe_noreturn() ; CHECK-NEXT: declare void @maybe_noreturn()
declare void @maybe_noreturn() #0 declare void @maybe_noreturn() #0
define void @call_maybe_noreturn() #0 { define void @call_maybe_noreturn() #0 {
; IS__TUNIT_OPM: Function Attrs: noinline nounwind uwtable ; IS________OPM: Function Attrs: noinline nounwind uwtable
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@call_maybe_noreturn ; IS________OPM-LABEL: define {{[^@]+}}@call_maybe_noreturn
; IS__TUNIT_OPM-SAME: () #[[ATTR6]] { ; IS________OPM-SAME: () #[[ATTR7]] {
; IS__TUNIT_OPM-NEXT: tail call void @maybe_noreturn() #[[ATTR25:[0-9]+]] ; IS________OPM-NEXT: tail call void @maybe_noreturn() #[[ATTR28:[0-9]+]]
; IS__TUNIT_OPM-NEXT: ret void ; IS________OPM-NEXT: ret void
; ;
; IS__TUNIT_NPM: Function Attrs: noinline nounwind uwtable ; IS________NPM: Function Attrs: noinline nounwind uwtable
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@call_maybe_noreturn ; IS________NPM-LABEL: define {{[^@]+}}@call_maybe_noreturn
; IS__TUNIT_NPM-SAME: () #[[ATTR6]] { ; IS________NPM-SAME: () #[[ATTR7]] {
; IS__TUNIT_NPM-NEXT: tail call void @maybe_noreturn() #[[ATTR27:[0-9]+]] ; IS________NPM-NEXT: tail call void @maybe_noreturn() #[[ATTR30:[0-9]+]]
; IS__TUNIT_NPM-NEXT: ret void ; IS________NPM-NEXT: ret void
;
; IS__CGSCC_OPM: Function Attrs: noinline nounwind uwtable
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@call_maybe_noreturn
; IS__CGSCC_OPM-SAME: () #[[ATTR7]] {
; IS__CGSCC_OPM-NEXT: tail call void @maybe_noreturn() #[[ATTR29:[0-9]+]]
; IS__CGSCC_OPM-NEXT: ret void
;
; IS__CGSCC_NPM: Function Attrs: noinline nounwind uwtable
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@call_maybe_noreturn
; IS__CGSCC_NPM-SAME: () #[[ATTR7]] {
; IS__CGSCC_NPM-NEXT: tail call void @maybe_noreturn() #[[ATTR31:[0-9]+]]
; IS__CGSCC_NPM-NEXT: ret void
; ;
tail call void @maybe_noreturn() tail call void @maybe_noreturn()
ret void ret void
} }
; TEST 8 (positive case) ; TEST 8 (positive case)
; Check propagation. ; Check propagation.
; CHECK: Function Attrs: norecurse willreturn ; CHECK: Function Attrs: norecurse willreturn
; CHECK-NEXT: declare void @will_return() ; CHECK-NEXT: declare void @will_return()
declare void @will_return() willreturn norecurse declare void @will_return() willreturn norecurse
define void @f1() #0 { define void @f1() #0 {
; IS__TUNIT_OPM: Function Attrs: noinline nounwind uwtable willreturn ; IS________OPM: Function Attrs: noinline nounwind uwtable willreturn
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@f1 ; IS________OPM-LABEL: define {{[^@]+}}@f1
; IS__TUNIT_OPM-SAME: () #[[ATTR9:[0-9]+]] { ; IS________OPM-SAME: () #[[ATTR11:[0-9]+]] {
; IS__TUNIT_OPM-NEXT: tail call void @will_return() #[[ATTR26:[0-9]+]] ; IS________OPM-NEXT: tail call void @will_return() #[[ATTR29:[0-9]+]]
; IS__TUNIT_OPM-NEXT: ret void ; IS________OPM-NEXT: ret void
; ;
; IS__TUNIT_NPM: Function Attrs: noinline nounwind uwtable willreturn ; IS________NPM: Function Attrs: noinline nounwind uwtable willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@f1 ; IS________NPM-LABEL: define {{[^@]+}}@f1
; IS__TUNIT_NPM-SAME: () #[[ATTR9:[0-9]+]] { ; IS________NPM-SAME: () #[[ATTR11:[0-9]+]] {
; IS__TUNIT_NPM-NEXT: tail call void @will_return() #[[ATTR28:[0-9]+]] ; IS________NPM-NEXT: tail call void @will_return() #[[ATTR31:[0-9]+]]
; IS__TUNIT_NPM-NEXT: ret void ; IS________NPM-NEXT: ret void
;
; IS__CGSCC_OPM: Function Attrs: noinline norecurse nounwind uwtable willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@f1
; IS__CGSCC_OPM-SAME: () #[[ATTR11:[0-9]+]] {
; IS__CGSCC_OPM-NEXT: tail call void @will_return() #[[ATTR30:[0-9]+]]
; IS__CGSCC_OPM-NEXT: ret void
;
; IS__CGSCC_NPM: Function Attrs: noinline norecurse nounwind uwtable willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@f1
; IS__CGSCC_NPM-SAME: () #[[ATTR11:[0-9]+]] {
; IS__CGSCC_NPM-NEXT: tail call void @will_return() #[[ATTR32:[0-9]+]]
; IS__CGSCC_NPM-NEXT: ret void
; ;
tail call void @will_return() tail call void @will_return()
ret void ret void
} }
define void @f2() #0 { define void @f2() #0 {
; IS__TUNIT____: Function Attrs: noinline nounwind uwtable willreturn ; CHECK: Function Attrs: noinline nounwind uwtable willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@f2 ; CHECK-LABEL: define {{[^@]+}}@f2
; IS__TUNIT____-SAME: () #[[ATTR9:[0-9]+]] { ; CHECK-SAME: () #[[ATTR11:[0-9]+]] {
; IS__TUNIT____-NEXT: tail call void @f1() #[[ATTR11:[0-9]+]] ; CHECK-NEXT: tail call void @f1() #[[ATTR13:[0-9]+]]
; IS__TUNIT____-NEXT: ret void ; CHECK-NEXT: ret void
;
; IS__CGSCC____: Function Attrs: noinline norecurse nounwind uwtable willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@f2
; IS__CGSCC____-SAME: () #[[ATTR11:[0-9]+]] {
; IS__CGSCC____-NEXT: tail call void @f1() #[[ATTR14:[0-9]+]]
; IS__CGSCC____-NEXT: ret void
; ;
tail call void @f1() tail call void @f1()
ret void ret void
} }
; TEST 9 (negative case) ; TEST 9 (negative case)
; call willreturn function in endless loop. ; call willreturn function in endless loop.
define void @call_will_return_but_has_loop() #0 { define void @call_will_return_but_has_loop() #0 {
; IS__TUNIT____: Function Attrs: noinline noreturn nounwind uwtable ; CHECK: Function Attrs: noinline noreturn nounwind uwtable
; IS__TUNIT____-LABEL: define {{[^@]+}}@call_will_return_but_has_loop ; CHECK-LABEL: define {{[^@]+}}@call_will_return_but_has_loop
; IS__TUNIT____-SAME: () #[[ATTR5]] { ; CHECK-SAME: () #[[ATTR6]] {
; IS__TUNIT____-NEXT: br label [[LABEL1:%.*]] ; CHECK-NEXT: br label [[LABEL1:%.*]]
; IS__TUNIT____: label1: ; CHECK: label1:
; IS__TUNIT____-NEXT: tail call void @will_return() ; CHECK-NEXT: tail call void @will_return()
; IS__TUNIT____-NEXT: br label [[LABEL2:%.*]] ; CHECK-NEXT: br label [[LABEL2:%.*]]
; IS__TUNIT____: label2: ; CHECK: label2:
; IS__TUNIT____-NEXT: br label [[LABEL1]] ; CHECK-NEXT: br label [[LABEL1]]
;
; IS__CGSCC____: Function Attrs: noinline norecurse noreturn nounwind uwtable
; IS__CGSCC____-LABEL: define {{[^@]+}}@call_will_return_but_has_loop
; IS__CGSCC____-SAME: () #[[ATTR12:[0-9]+]] {
; IS__CGSCC____-NEXT: br label [[LABEL1:%.*]]
; IS__CGSCC____: label1:
; IS__CGSCC____-NEXT: tail call void @will_return()
; IS__CGSCC____-NEXT: br label [[LABEL2:%.*]]
; IS__CGSCC____: label2:
; IS__CGSCC____-NEXT: br label [[LABEL1]]
; ;
br label %label1 br label %label1
label1: label1:
tail call void @will_return() tail call void @will_return()
br label %label2 br label %label2
label2: label2:
br label %label1 br label %label1
} }
; TEST 10 (positive case) ; TEST 10 (positive case)
; invoke a function with willreturn ; invoke a function with willreturn
; CHECK: Function Attrs: noinline uwtable willreturn ; CHECK: Function Attrs: noinline uwtable willreturn
; CHECK-NEXT: declare i1 @maybe_raise_exception() ; CHECK-NEXT: declare i1 @maybe_raise_exception()
declare i1 @maybe_raise_exception() #1 willreturn declare i1 @maybe_raise_exception() #1 willreturn
define void @invoke_test() personality i32 (...)* @__gxx_personality_v0 { define void @invoke_test() personality i32 (...)* @__gxx_personality_v0 {
; IS__TUNIT_OPM: Function Attrs: nounwind willreturn ; IS________OPM: Function Attrs: nounwind willreturn
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@invoke_test ; IS________OPM-LABEL: define {{[^@]+}}@invoke_test
; IS__TUNIT_OPM-SAME: () #[[ATTR11]] personality i32 (...)* @__gxx_personality_v0 { ; IS________OPM-SAME: () #[[ATTR13]] personality i32 (...)* @__gxx_personality_v0 {
; IS__TUNIT_OPM-NEXT: [[TMP1:%.*]] = invoke i1 @maybe_raise_exception() #[[ATTR26]] ; IS________OPM-NEXT: [[TMP1:%.*]] = invoke i1 @maybe_raise_exception() #[[ATTR29]]
; IS__TUNIT_OPM-NEXT: to label [[N:%.*]] unwind label [[F:%.*]] ; IS________OPM-NEXT: to label [[N:%.*]] unwind label [[F:%.*]]
; IS__TUNIT_OPM: N: ; IS________OPM: N:
; IS__TUNIT_OPM-NEXT: ret void ; IS________OPM-NEXT: ret void
; IS__TUNIT_OPM: F: ; IS________OPM: F:
; IS__TUNIT_OPM-NEXT: [[VAL:%.*]] = landingpad { i8*, i32 } ; IS________OPM-NEXT: [[VAL:%.*]] = landingpad { i8*, i32 }
; IS__TUNIT_OPM-NEXT: catch i8* null ; IS________OPM-NEXT: catch i8* null
; IS__TUNIT_OPM-NEXT: ret void ; IS________OPM-NEXT: ret void
; ;
; IS__TUNIT_NPM: Function Attrs: nounwind willreturn ; IS________NPM: Function Attrs: nounwind willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@invoke_test ; IS________NPM-LABEL: define {{[^@]+}}@invoke_test
; IS__TUNIT_NPM-SAME: () #[[ATTR11]] personality i32 (...)* @__gxx_personality_v0 { ; IS________NPM-SAME: () #[[ATTR13]] personality i32 (...)* @__gxx_personality_v0 {
; IS__TUNIT_NPM-NEXT: [[TMP1:%.*]] = invoke i1 @maybe_raise_exception() #[[ATTR28]] ; IS________NPM-NEXT: [[TMP1:%.*]] = invoke i1 @maybe_raise_exception() #[[ATTR31]]
; IS__TUNIT_NPM-NEXT: to label [[N:%.*]] unwind label [[F:%.*]] ; IS________NPM-NEXT: to label [[N:%.*]] unwind label [[F:%.*]]
; IS__TUNIT_NPM: N: ; IS________NPM: N:
; IS__TUNIT_NPM-NEXT: ret void ; IS________NPM-NEXT: ret void
; IS__TUNIT_NPM: F: ; IS________NPM: F:
; IS__TUNIT_NPM-NEXT: [[VAL:%.*]] = landingpad { i8*, i32 } ; IS________NPM-NEXT: [[VAL:%.*]] = landingpad { i8*, i32 }
; IS__TUNIT_NPM-NEXT: catch i8* null ; IS________NPM-NEXT: catch i8* null
; IS__TUNIT_NPM-NEXT: ret void ; IS________NPM-NEXT: ret void
;
; IS__CGSCC_OPM: Function Attrs: nounwind willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@invoke_test
; IS__CGSCC_OPM-SAME: () #[[ATTR14]] personality i32 (...)* @__gxx_personality_v0 {
; IS__CGSCC_OPM-NEXT: [[TMP1:%.*]] = invoke i1 @maybe_raise_exception() #[[ATTR30]]
; IS__CGSCC_OPM-NEXT: to label [[N:%.*]] unwind label [[F:%.*]]
; IS__CGSCC_OPM: N:
; IS__CGSCC_OPM-NEXT: ret void
; IS__CGSCC_OPM: F:
; IS__CGSCC_OPM-NEXT: [[VAL:%.*]] = landingpad { i8*, i32 }
; IS__CGSCC_OPM-NEXT: catch i8* null
; IS__CGSCC_OPM-NEXT: ret void
;
; IS__CGSCC_NPM: Function Attrs: nounwind willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@invoke_test
; IS__CGSCC_NPM-SAME: () #[[ATTR14]] personality i32 (...)* @__gxx_personality_v0 {
; IS__CGSCC_NPM-NEXT: [[TMP1:%.*]] = invoke i1 @maybe_raise_exception() #[[ATTR32]]
; IS__CGSCC_NPM-NEXT: to label [[N:%.*]] unwind label [[F:%.*]]
; IS__CGSCC_NPM: N:
; IS__CGSCC_NPM-NEXT: ret void
; IS__CGSCC_NPM: F:
; IS__CGSCC_NPM-NEXT: [[VAL:%.*]] = landingpad { i8*, i32 }
; IS__CGSCC_NPM-NEXT: catch i8* null
; IS__CGSCC_NPM-NEXT: ret void
; ;
invoke i1 @maybe_raise_exception() invoke i1 @maybe_raise_exception()
to label %N unwind label %F to label %N unwind label %F
N: N:
ret void ret void
F: F:
%val = landingpad { i8*, i32 } %val = landingpad { i8*, i32 }
catch i8* null catch i8* null
Show All 9 Lines
; int ans = 0; ; int ans = 0;
; for(int i = 0;i<10;i++){ ; for(int i = 0;i<10;i++){
; ans += p[i]; ; ans += p[i];
; } ; }
; return ans; ; return ans;
; } ; }
define i32 @loop_constant_trip_count(i32* nocapture readonly %0) #0 { define i32 @loop_constant_trip_count(i32* nocapture readonly %0) #0 {
; IS__TUNIT_OPM: Function Attrs: argmemonly nofree noinline nosync nounwind readonly uwtable ; IS________OPM: Function Attrs: argmemonly nofree noinline norecurse nosync nounwind readonly uwtable
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@loop_constant_trip_count ; IS________OPM-LABEL: define {{[^@]+}}@loop_constant_trip_count
; IS__TUNIT_OPM-SAME: (i32* nocapture nofree readonly [[TMP0:%.*]]) #[[ATTR12:[0-9]+]] { ; IS________OPM-SAME: (i32* nocapture nofree readonly [[TMP0:%.*]]) #[[ATTR14:[0-9]+]] {
; IS__TUNIT_OPM-NEXT: br label [[TMP3:%.*]] ; IS________OPM-NEXT: br label [[TMP3:%.*]]
; IS__TUNIT_OPM: 2: ; IS________OPM: 2:
; IS__TUNIT_OPM-NEXT: ret i32 [[TMP8:%.*]] ; IS________OPM-NEXT: ret i32 [[TMP8:%.*]]
; IS__TUNIT_OPM: 3: ; IS________OPM: 3:
; IS__TUNIT_OPM-NEXT: [[TMP4:%.*]] = phi i64 [ 0, [[TMP1:%.*]] ], [ [[TMP9:%.*]], [[TMP3]] ] ; IS________OPM-NEXT: [[TMP4:%.*]] = phi i64 [ 0, [[TMP1:%.*]] ], [ [[TMP9:%.*]], [[TMP3]] ]
; IS__TUNIT_OPM-NEXT: [[TMP5:%.*]] = phi i32 [ 0, [[TMP1]] ], [ [[TMP8]], [[TMP3]] ] ; IS________OPM-NEXT: [[TMP5:%.*]] = phi i32 [ 0, [[TMP1]] ], [ [[TMP8]], [[TMP3]] ]
; IS__TUNIT_OPM-NEXT: [[TMP6:%.*]] = getelementptr inbounds i32, i32* [[TMP0]], i64 [[TMP4]] ; IS________OPM-NEXT: [[TMP6:%.*]] = getelementptr inbounds i32, i32* [[TMP0]], i64 [[TMP4]]
; IS__TUNIT_OPM-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 ; IS________OPM-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
; IS__TUNIT_OPM-NEXT: [[TMP8]] = add nsw i32 [[TMP7]], [[TMP5]] ; IS________OPM-NEXT: [[TMP8]] = add nsw i32 [[TMP7]], [[TMP5]]
; IS__TUNIT_OPM-NEXT: [[TMP9]] = add nuw nsw i64 [[TMP4]], 1 ; IS________OPM-NEXT: [[TMP9]] = add nuw nsw i64 [[TMP4]], 1
; IS__TUNIT_OPM-NEXT: [[TMP10:%.*]] = icmp eq i64 [[TMP9]], 10 ; IS________OPM-NEXT: [[TMP10:%.*]] = icmp eq i64 [[TMP9]], 10
; IS__TUNIT_OPM-NEXT: br i1 [[TMP10]], label [[TMP2:%.*]], label [[TMP3]] ; IS________OPM-NEXT: br i1 [[TMP10]], label [[TMP2:%.*]], label [[TMP3]]
; ;
; IS__TUNIT_NPM: Function Attrs: argmemonly nofree noinline nosync nounwind readonly uwtable willreturn ; IS________NPM: Function Attrs: argmemonly nofree noinline norecurse nosync nounwind readonly uwtable willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@loop_constant_trip_count ; IS________NPM-LABEL: define {{[^@]+}}@loop_constant_trip_count
; IS__TUNIT_NPM-SAME: (i32* nocapture nofree nonnull readonly dereferenceable(4) [[TMP0:%.*]]) #[[ATTR12:[0-9]+]] { ; IS________NPM-SAME: (i32* nocapture nofree nonnull readonly dereferenceable(4) [[TMP0:%.*]]) #[[ATTR14:[0-9]+]] {
; IS__TUNIT_NPM-NEXT: br label [[TMP3:%.*]] ; IS________NPM-NEXT: br label [[TMP3:%.*]]
; IS__TUNIT_NPM: 2: ; IS________NPM: 2:
; IS__TUNIT_NPM-NEXT: ret i32 [[TMP8:%.*]] ; IS________NPM-NEXT: ret i32 [[TMP8:%.*]]
; IS__TUNIT_NPM: 3: ; IS________NPM: 3:
; IS__TUNIT_NPM-NEXT: [[TMP4:%.*]] = phi i64 [ 0, [[TMP1:%.*]] ], [ [[TMP9:%.*]], [[TMP3]] ] ; IS________NPM-NEXT: [[TMP4:%.*]] = phi i64 [ 0, [[TMP1:%.*]] ], [ [[TMP9:%.*]], [[TMP3]] ]
; IS__TUNIT_NPM-NEXT: [[TMP5:%.*]] = phi i32 [ 0, [[TMP1]] ], [ [[TMP8]], [[TMP3]] ] ; IS________NPM-NEXT: [[TMP5:%.*]] = phi i32 [ 0, [[TMP1]] ], [ [[TMP8]], [[TMP3]] ]
; IS__TUNIT_NPM-NEXT: [[TMP6:%.*]] = getelementptr inbounds i32, i32* [[TMP0]], i64 [[TMP4]] ; IS________NPM-NEXT: [[TMP6:%.*]] = getelementptr inbounds i32, i32* [[TMP0]], i64 [[TMP4]]
; IS__TUNIT_NPM-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 ; IS________NPM-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
; IS__TUNIT_NPM-NEXT: [[TMP8]] = add nsw i32 [[TMP7]], [[TMP5]] ; IS________NPM-NEXT: [[TMP8]] = add nsw i32 [[TMP7]], [[TMP5]]
; IS__TUNIT_NPM-NEXT: [[TMP9]] = add nuw nsw i64 [[TMP4]], 1 ; IS________NPM-NEXT: [[TMP9]] = add nuw nsw i64 [[TMP4]], 1
; IS__TUNIT_NPM-NEXT: [[TMP10:%.*]] = icmp eq i64 [[TMP9]], 10 ; IS________NPM-NEXT: [[TMP10:%.*]] = icmp eq i64 [[TMP9]], 10
; IS__TUNIT_NPM-NEXT: br i1 [[TMP10]], label [[TMP2:%.*]], label [[TMP3]] ; IS________NPM-NEXT: br i1 [[TMP10]], label [[TMP2:%.*]], label [[TMP3]]
;
; IS__CGSCC_OPM: Function Attrs: argmemonly nofree noinline norecurse nosync nounwind readonly uwtable
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@loop_constant_trip_count
; IS__CGSCC_OPM-SAME: (i32* nocapture nofree readonly [[TMP0:%.*]]) #[[ATTR15:[0-9]+]] {
; IS__CGSCC_OPM-NEXT: br label [[TMP3:%.*]]
; IS__CGSCC_OPM: 2:
; IS__CGSCC_OPM-NEXT: ret i32 [[TMP8:%.*]]
; IS__CGSCC_OPM: 3:
; IS__CGSCC_OPM-NEXT: [[TMP4:%.*]] = phi i64 [ 0, [[TMP1:%.*]] ], [ [[TMP9:%.*]], [[TMP3]] ]
; IS__CGSCC_OPM-NEXT: [[TMP5:%.*]] = phi i32 [ 0, [[TMP1]] ], [ [[TMP8]], [[TMP3]] ]
; IS__CGSCC_OPM-NEXT: [[TMP6:%.*]] = getelementptr inbounds i32, i32* [[TMP0]], i64 [[TMP4]]
; IS__CGSCC_OPM-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
; IS__CGSCC_OPM-NEXT: [[TMP8]] = add nsw i32 [[TMP7]], [[TMP5]]
; IS__CGSCC_OPM-NEXT: [[TMP9]] = add nuw nsw i64 [[TMP4]], 1
; IS__CGSCC_OPM-NEXT: [[TMP10:%.*]] = icmp eq i64 [[TMP9]], 10
; IS__CGSCC_OPM-NEXT: br i1 [[TMP10]], label [[TMP2:%.*]], label [[TMP3]]
;
; IS__CGSCC_NPM: Function Attrs: argmemonly nofree noinline norecurse nosync nounwind readonly uwtable willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@loop_constant_trip_count
; IS__CGSCC_NPM-SAME: (i32* nocapture nofree nonnull readonly dereferenceable(4) [[TMP0:%.*]]) #[[ATTR15:[0-9]+]] {
; IS__CGSCC_NPM-NEXT: br label [[TMP3:%.*]]
; IS__CGSCC_NPM: 2:
; IS__CGSCC_NPM-NEXT: ret i32 [[TMP8:%.*]]
; IS__CGSCC_NPM: 3:
; IS__CGSCC_NPM-NEXT: [[TMP4:%.*]] = phi i64 [ 0, [[TMP1:%.*]] ], [ [[TMP9:%.*]], [[TMP3]] ]
; IS__CGSCC_NPM-NEXT: [[TMP5:%.*]] = phi i32 [ 0, [[TMP1]] ], [ [[TMP8]], [[TMP3]] ]
; IS__CGSCC_NPM-NEXT: [[TMP6:%.*]] = getelementptr inbounds i32, i32* [[TMP0]], i64 [[TMP4]]
; IS__CGSCC_NPM-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
; IS__CGSCC_NPM-NEXT: [[TMP8]] = add nsw i32 [[TMP7]], [[TMP5]]
; IS__CGSCC_NPM-NEXT: [[TMP9]] = add nuw nsw i64 [[TMP4]], 1
; IS__CGSCC_NPM-NEXT: [[TMP10:%.*]] = icmp eq i64 [[TMP9]], 10
; IS__CGSCC_NPM-NEXT: br i1 [[TMP10]], label [[TMP2:%.*]], label [[TMP3]]
; ;
br label %3 br label %3
; <label>:2: ; preds = %3 ; <label>:2: ; preds = %3
ret i32 %8 ret i32 %8
; <label>:3: ; preds = %3, %1 ; <label>:3: ; preds = %3, %1
%4 = phi i64 [ 0, %1 ], [ %9, %3 ] %4 = phi i64 [ 0, %1 ], [ %9, %3 ]
Show All 13 Lines
; int loop_trip_count_unbound(unsigned s,unsigned e, int *p, int offset){ ; int loop_trip_count_unbound(unsigned s,unsigned e, int *p, int offset){
; int ans = 0; ; int ans = 0;
; for(unsigned i = s;i != e;i+=offset){ ; for(unsigned i = s;i != e;i+=offset){
; ans += p[i]; ; ans += p[i];
; } ; }
; return ans; ; return ans;
; } ; }
define i32 @loop_trip_count_unbound(i32 %0, i32 %1, i32* nocapture readonly %2, i32 %3) local_unnamed_addr #0 { define i32 @loop_trip_count_unbound(i32 %0, i32 %1, i32* nocapture readonly %2, i32 %3) local_unnamed_addr #0 {
; IS__TUNIT_OPM: Function Attrs: argmemonly nofree noinline nosync nounwind readonly uwtable ; IS________OPM: Function Attrs: argmemonly nofree noinline norecurse nosync nounwind readonly uwtable
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@loop_trip_count_unbound ; IS________OPM-LABEL: define {{[^@]+}}@loop_trip_count_unbound
; IS__TUNIT_OPM-SAME: (i32 [[TMP0:%.*]], i32 [[TMP1:%.*]], i32* nocapture nofree readonly [[TMP2:%.*]], i32 [[TMP3:%.*]]) local_unnamed_addr #[[ATTR12]] { ; IS________OPM-SAME: (i32 [[TMP0:%.*]], i32 [[TMP1:%.*]], i32* nocapture nofree readonly [[TMP2:%.*]], i32 [[TMP3:%.*]]) local_unnamed_addr #[[ATTR14]] {
; IS__TUNIT_OPM-NEXT: [[TMP5:%.*]] = icmp eq i32 [[TMP0]], [[TMP1]] ; IS________OPM-NEXT: [[TMP5:%.*]] = icmp eq i32 [[TMP0]], [[TMP1]]
; IS__TUNIT_OPM-NEXT: br i1 [[TMP5]], label [[TMP6:%.*]], label [[TMP8:%.*]] ; IS________OPM-NEXT: br i1 [[TMP5]], label [[TMP6:%.*]], label [[TMP8:%.*]]
; IS__TUNIT_OPM: 6: ; IS________OPM: 6:
; IS__TUNIT_OPM-NEXT: [[TMP7:%.*]] = phi i32 [ 0, [[TMP4:%.*]] ], [ [[TMP14:%.*]], [[TMP8]] ] ; IS________OPM-NEXT: [[TMP7:%.*]] = phi i32 [ 0, [[TMP4:%.*]] ], [ [[TMP14:%.*]], [[TMP8]] ]
; IS__TUNIT_OPM-NEXT: ret i32 [[TMP7]] ; IS________OPM-NEXT: ret i32 [[TMP7]]
; IS__TUNIT_OPM: 8: ; IS________OPM: 8:
; IS__TUNIT_OPM-NEXT: [[TMP9:%.*]] = phi i32 [ [[TMP15:%.*]], [[TMP8]] ], [ [[TMP0]], [[TMP4]] ] ; IS________OPM-NEXT: [[TMP9:%.*]] = phi i32 [ [[TMP15:%.*]], [[TMP8]] ], [ [[TMP0]], [[TMP4]] ]
; IS__TUNIT_OPM-NEXT: [[TMP10:%.*]] = phi i32 [ [[TMP14]], [[TMP8]] ], [ 0, [[TMP4]] ] ; IS________OPM-NEXT: [[TMP10:%.*]] = phi i32 [ [[TMP14]], [[TMP8]] ], [ 0, [[TMP4]] ]
; IS__TUNIT_OPM-NEXT: [[TMP11:%.*]] = zext i32 [[TMP9]] to i64 ; IS________OPM-NEXT: [[TMP11:%.*]] = zext i32 [[TMP9]] to i64
; IS__TUNIT_OPM-NEXT: [[TMP12:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[TMP11]] ; IS________OPM-NEXT: [[TMP12:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[TMP11]]
; IS__TUNIT_OPM-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4 ; IS________OPM-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4
; IS__TUNIT_OPM-NEXT: [[TMP14]] = add nsw i32 [[TMP13]], [[TMP10]] ; IS________OPM-NEXT: [[TMP14]] = add nsw i32 [[TMP13]], [[TMP10]]
; IS__TUNIT_OPM-NEXT: [[TMP15]] = add i32 [[TMP9]], [[TMP3]] ; IS________OPM-NEXT: [[TMP15]] = add i32 [[TMP9]], [[TMP3]]
; IS__TUNIT_OPM-NEXT: [[TMP16:%.*]] = icmp eq i32 [[TMP15]], [[TMP1]] ; IS________OPM-NEXT: [[TMP16:%.*]] = icmp eq i32 [[TMP15]], [[TMP1]]
; IS__TUNIT_OPM-NEXT: br i1 [[TMP16]], label [[TMP6]], label [[TMP8]] ; IS________OPM-NEXT: br i1 [[TMP16]], label [[TMP6]], label [[TMP8]]
; ;
; IS__TUNIT_NPM: Function Attrs: argmemonly nofree noinline nosync nounwind readonly uwtable ; IS________NPM: Function Attrs: argmemonly nofree noinline norecurse nosync nounwind readonly uwtable
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@loop_trip_count_unbound ; IS________NPM-LABEL: define {{[^@]+}}@loop_trip_count_unbound
; IS__TUNIT_NPM-SAME: (i32 [[TMP0:%.*]], i32 [[TMP1:%.*]], i32* nocapture nofree readonly [[TMP2:%.*]], i32 [[TMP3:%.*]]) local_unnamed_addr #[[ATTR13:[0-9]+]] { ; IS________NPM-SAME: (i32 [[TMP0:%.*]], i32 [[TMP1:%.*]], i32* nocapture nofree readonly [[TMP2:%.*]], i32 [[TMP3:%.*]]) local_unnamed_addr #[[ATTR15:[0-9]+]] {
; IS__TUNIT_NPM-NEXT: [[TMP5:%.*]] = icmp eq i32 [[TMP0]], [[TMP1]] ; IS________NPM-NEXT: [[TMP5:%.*]] = icmp eq i32 [[TMP0]], [[TMP1]]
; IS__TUNIT_NPM-NEXT: br i1 [[TMP5]], label [[TMP6:%.*]], label [[TMP8:%.*]] ; IS________NPM-NEXT: br i1 [[TMP5]], label [[TMP6:%.*]], label [[TMP8:%.*]]
; IS__TUNIT_NPM: 6: ; IS________NPM: 6:
; IS__TUNIT_NPM-NEXT: [[TMP7:%.*]] = phi i32 [ 0, [[TMP4:%.*]] ], [ [[TMP14:%.*]], [[TMP8]] ] ; IS________NPM-NEXT: [[TMP7:%.*]] = phi i32 [ 0, [[TMP4:%.*]] ], [ [[TMP14:%.*]], [[TMP8]] ]
; IS__TUNIT_NPM-NEXT: ret i32 [[TMP7]] ; IS________NPM-NEXT: ret i32 [[TMP7]]
; IS__TUNIT_NPM: 8: ; IS________NPM: 8:
; IS__TUNIT_NPM-NEXT: [[TMP9:%.*]] = phi i32 [ [[TMP15:%.*]], [[TMP8]] ], [ [[TMP0]], [[TMP4]] ] ; IS________NPM-NEXT: [[TMP9:%.*]] = phi i32 [ [[TMP15:%.*]], [[TMP8]] ], [ [[TMP0]], [[TMP4]] ]
; IS__TUNIT_NPM-NEXT: [[TMP10:%.*]] = phi i32 [ [[TMP14]], [[TMP8]] ], [ 0, [[TMP4]] ] ; IS________NPM-NEXT: [[TMP10:%.*]] = phi i32 [ [[TMP14]], [[TMP8]] ], [ 0, [[TMP4]] ]
; IS__TUNIT_NPM-NEXT: [[TMP11:%.*]] = zext i32 [[TMP9]] to i64 ; IS________NPM-NEXT: [[TMP11:%.*]] = zext i32 [[TMP9]] to i64
; IS__TUNIT_NPM-NEXT: [[TMP12:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[TMP11]] ; IS________NPM-NEXT: [[TMP12:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[TMP11]]
; IS__TUNIT_NPM-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4 ; IS________NPM-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4
; IS__TUNIT_NPM-NEXT: [[TMP14]] = add nsw i32 [[TMP13]], [[TMP10]] ; IS________NPM-NEXT: [[TMP14]] = add nsw i32 [[TMP13]], [[TMP10]]
; IS__TUNIT_NPM-NEXT: [[TMP15]] = add i32 [[TMP9]], [[TMP3]] ; IS________NPM-NEXT: [[TMP15]] = add i32 [[TMP9]], [[TMP3]]
; IS__TUNIT_NPM-NEXT: [[TMP16:%.*]] = icmp eq i32 [[TMP15]], [[TMP1]] ; IS________NPM-NEXT: [[TMP16:%.*]] = icmp eq i32 [[TMP15]], [[TMP1]]
; IS__TUNIT_NPM-NEXT: br i1 [[TMP16]], label [[TMP6]], label [[TMP8]] ; IS________NPM-NEXT: br i1 [[TMP16]], label [[TMP6]], label [[TMP8]]
;
; IS__CGSCC_OPM: Function Attrs: argmemonly nofree noinline norecurse nosync nounwind readonly uwtable
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@loop_trip_count_unbound
; IS__CGSCC_OPM-SAME: (i32 [[TMP0:%.*]], i32 [[TMP1:%.*]], i32* nocapture nofree readonly [[TMP2:%.*]], i32 [[TMP3:%.*]]) local_unnamed_addr #[[ATTR15]] {
; IS__CGSCC_OPM-NEXT: [[TMP5:%.*]] = icmp eq i32 [[TMP0]], [[TMP1]]
; IS__CGSCC_OPM-NEXT: br i1 [[TMP5]], label [[TMP6:%.*]], label [[TMP8:%.*]]
; IS__CGSCC_OPM: 6:
; IS__CGSCC_OPM-NEXT: [[TMP7:%.*]] = phi i32 [ 0, [[TMP4:%.*]] ], [ [[TMP14:%.*]], [[TMP8]] ]
; IS__CGSCC_OPM-NEXT: ret i32 [[TMP7]]
; IS__CGSCC_OPM: 8:
; IS__CGSCC_OPM-NEXT: [[TMP9:%.*]] = phi i32 [ [[TMP15:%.*]], [[TMP8]] ], [ [[TMP0]], [[TMP4]] ]
; IS__CGSCC_OPM-NEXT: [[TMP10:%.*]] = phi i32 [ [[TMP14]], [[TMP8]] ], [ 0, [[TMP4]] ]
; IS__CGSCC_OPM-NEXT: [[TMP11:%.*]] = zext i32 [[TMP9]] to i64
; IS__CGSCC_OPM-NEXT: [[TMP12:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[TMP11]]
; IS__CGSCC_OPM-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4
; IS__CGSCC_OPM-NEXT: [[TMP14]] = add nsw i32 [[TMP13]], [[TMP10]]
; IS__CGSCC_OPM-NEXT: [[TMP15]] = add i32 [[TMP9]], [[TMP3]]
; IS__CGSCC_OPM-NEXT: [[TMP16:%.*]] = icmp eq i32 [[TMP15]], [[TMP1]]
; IS__CGSCC_OPM-NEXT: br i1 [[TMP16]], label [[TMP6]], label [[TMP8]]
;
; IS__CGSCC_NPM: Function Attrs: argmemonly nofree noinline norecurse nosync nounwind readonly uwtable
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@loop_trip_count_unbound
; IS__CGSCC_NPM-SAME: (i32 [[TMP0:%.*]], i32 [[TMP1:%.*]], i32* nocapture nofree readonly [[TMP2:%.*]], i32 [[TMP3:%.*]]) local_unnamed_addr #[[ATTR16:[0-9]+]] {
; IS__CGSCC_NPM-NEXT: [[TMP5:%.*]] = icmp eq i32 [[TMP0]], [[TMP1]]
; IS__CGSCC_NPM-NEXT: br i1 [[TMP5]], label [[TMP6:%.*]], label [[TMP8:%.*]]
; IS__CGSCC_NPM: 6:
; IS__CGSCC_NPM-NEXT: [[TMP7:%.*]] = phi i32 [ 0, [[TMP4:%.*]] ], [ [[TMP14:%.*]], [[TMP8]] ]
; IS__CGSCC_NPM-NEXT: ret i32 [[TMP7]]
; IS__CGSCC_NPM: 8:
; IS__CGSCC_NPM-NEXT: [[TMP9:%.*]] = phi i32 [ [[TMP15:%.*]], [[TMP8]] ], [ [[TMP0]], [[TMP4]] ]
; IS__CGSCC_NPM-NEXT: [[TMP10:%.*]] = phi i32 [ [[TMP14]], [[TMP8]] ], [ 0, [[TMP4]] ]
; IS__CGSCC_NPM-NEXT: [[TMP11:%.*]] = zext i32 [[TMP9]] to i64
; IS__CGSCC_NPM-NEXT: [[TMP12:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[TMP11]]
; IS__CGSCC_NPM-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4
; IS__CGSCC_NPM-NEXT: [[TMP14]] = add nsw i32 [[TMP13]], [[TMP10]]
; IS__CGSCC_NPM-NEXT: [[TMP15]] = add i32 [[TMP9]], [[TMP3]]
; IS__CGSCC_NPM-NEXT: [[TMP16:%.*]] = icmp eq i32 [[TMP15]], [[TMP1]]
; IS__CGSCC_NPM-NEXT: br i1 [[TMP16]], label [[TMP6]], label [[TMP8]]
; ;
%5 = icmp eq i32 %0, %1 %5 = icmp eq i32 %0, %1
br i1 %5, label %6, label %8 br i1 %5, label %6, label %8
; <label>:6: ; preds = %8, %4 ; <label>:6: ; preds = %8, %4
%7 = phi i32 [ 0, %4 ], [ %14, %8 ] %7 = phi i32 [ 0, %4 ], [ %14, %8 ]
ret i32 %7 ret i32 %7
Show All 17 Lines
; for(;n >= 0;n--){ ; for(;n >= 0;n--){
; ans += p[n]; ; ans += p[n];
; } ; }
; return ans; ; return ans;
; } ; }
define i32 @loop_trip_dec(i32 %0, i32* nocapture readonly %1) local_unnamed_addr #0 { define i32 @loop_trip_dec(i32 %0, i32* nocapture readonly %1) local_unnamed_addr #0 {
; IS__TUNIT_OPM: Function Attrs: argmemonly nofree noinline nosync nounwind readonly uwtable ; IS________OPM: Function Attrs: argmemonly nofree noinline norecurse nosync nounwind readonly uwtable
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@loop_trip_dec ; IS________OPM-LABEL: define {{[^@]+}}@loop_trip_dec
; IS__TUNIT_OPM-SAME: (i32 [[TMP0:%.*]], i32* nocapture nofree readonly [[TMP1:%.*]]) local_unnamed_addr #[[ATTR12]] { ; IS________OPM-SAME: (i32 [[TMP0:%.*]], i32* nocapture nofree readonly [[TMP1:%.*]]) local_unnamed_addr #[[ATTR14]] {
; IS__TUNIT_OPM-NEXT: [[TMP3:%.*]] = icmp sgt i32 [[TMP0]], -1 ; IS________OPM-NEXT: [[TMP3:%.*]] = icmp sgt i32 [[TMP0]], -1
; IS__TUNIT_OPM-NEXT: br i1 [[TMP3]], label [[TMP4:%.*]], label [[TMP14:%.*]] ; IS________OPM-NEXT: br i1 [[TMP3]], label [[TMP4:%.*]], label [[TMP14:%.*]]
; IS__TUNIT_OPM: 4: ; IS________OPM: 4:
; IS__TUNIT_OPM-NEXT: [[TMP5:%.*]] = sext i32 [[TMP0]] to i64 ; IS________OPM-NEXT: [[TMP5:%.*]] = sext i32 [[TMP0]] to i64
; IS__TUNIT_OPM-NEXT: br label [[TMP6:%.*]] ; IS________OPM-NEXT: br label [[TMP6:%.*]]
; IS__TUNIT_OPM: 6: ; IS________OPM: 6:
; IS__TUNIT_OPM-NEXT: [[TMP7:%.*]] = phi i64 [ [[TMP5]], [[TMP4]] ], [ [[TMP12:%.*]], [[TMP6]] ] ; IS________OPM-NEXT: [[TMP7:%.*]] = phi i64 [ [[TMP5]], [[TMP4]] ], [ [[TMP12:%.*]], [[TMP6]] ]
; IS__TUNIT_OPM-NEXT: [[TMP8:%.*]] = phi i32 [ 0, [[TMP4]] ], [ [[TMP11:%.*]], [[TMP6]] ] ; IS________OPM-NEXT: [[TMP8:%.*]] = phi i32 [ 0, [[TMP4]] ], [ [[TMP11:%.*]], [[TMP6]] ]
; IS__TUNIT_OPM-NEXT: [[TMP9:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 [[TMP7]] ; IS________OPM-NEXT: [[TMP9:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 [[TMP7]]
; IS__TUNIT_OPM-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 ; IS________OPM-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
; IS__TUNIT_OPM-NEXT: [[TMP11]] = add nsw i32 [[TMP10]], [[TMP8]] ; IS________OPM-NEXT: [[TMP11]] = add nsw i32 [[TMP10]], [[TMP8]]
; IS__TUNIT_OPM-NEXT: [[TMP12]] = add nsw i64 [[TMP7]], -1 ; IS________OPM-NEXT: [[TMP12]] = add nsw i64 [[TMP7]], -1
; IS__TUNIT_OPM-NEXT: [[TMP13:%.*]] = icmp sgt i64 [[TMP7]], 0 ; IS________OPM-NEXT: [[TMP13:%.*]] = icmp sgt i64 [[TMP7]], 0
; IS__TUNIT_OPM-NEXT: br i1 [[TMP13]], label [[TMP6]], label [[TMP14]] ; IS________OPM-NEXT: br i1 [[TMP13]], label [[TMP6]], label [[TMP14]]
; IS__TUNIT_OPM: 14: ; IS________OPM: 14:
; IS__TUNIT_OPM-NEXT: [[TMP15:%.*]] = phi i32 [ 0, [[TMP2:%.*]] ], [ [[TMP11]], [[TMP6]] ] ; IS________OPM-NEXT: [[TMP15:%.*]] = phi i32 [ 0, [[TMP2:%.*]] ], [ [[TMP11]], [[TMP6]] ]
; IS__TUNIT_OPM-NEXT: ret i32 [[TMP15]] ; IS________OPM-NEXT: ret i32 [[TMP15]]
; ;
; IS__TUNIT_NPM: Function Attrs: argmemonly nofree noinline nosync nounwind readonly uwtable willreturn ; IS________NPM: Function Attrs: argmemonly nofree noinline norecurse nosync nounwind readonly uwtable willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@loop_trip_dec ; IS________NPM-LABEL: define {{[^@]+}}@loop_trip_dec
; IS__TUNIT_NPM-SAME: (i32 [[TMP0:%.*]], i32* nocapture nofree readonly [[TMP1:%.*]]) local_unnamed_addr #[[ATTR12]] { ; IS________NPM-SAME: (i32 [[TMP0:%.*]], i32* nocapture nofree readonly [[TMP1:%.*]]) local_unnamed_addr #[[ATTR14]] {
; IS__TUNIT_NPM-NEXT: [[TMP3:%.*]] = icmp sgt i32 [[TMP0]], -1 ; IS________NPM-NEXT: [[TMP3:%.*]] = icmp sgt i32 [[TMP0]], -1
; IS__TUNIT_NPM-NEXT: br i1 [[TMP3]], label [[TMP4:%.*]], label [[TMP14:%.*]] ; IS________NPM-NEXT: br i1 [[TMP3]], label [[TMP4:%.*]], label [[TMP14:%.*]]
; IS__TUNIT_NPM: 4: ; IS________NPM: 4:
; IS__TUNIT_NPM-NEXT: [[TMP5:%.*]] = sext i32 [[TMP0]] to i64 ; IS________NPM-NEXT: [[TMP5:%.*]] = sext i32 [[TMP0]] to i64
; IS__TUNIT_NPM-NEXT: br label [[TMP6:%.*]] ; IS________NPM-NEXT: br label [[TMP6:%.*]]
; IS__TUNIT_NPM: 6: ; IS________NPM: 6:
; IS__TUNIT_NPM-NEXT: [[TMP7:%.*]] = phi i64 [ [[TMP5]], [[TMP4]] ], [ [[TMP12:%.*]], [[TMP6]] ] ; IS________NPM-NEXT: [[TMP7:%.*]] = phi i64 [ [[TMP5]], [[TMP4]] ], [ [[TMP12:%.*]], [[TMP6]] ]
; IS__TUNIT_NPM-NEXT: [[TMP8:%.*]] = phi i32 [ 0, [[TMP4]] ], [ [[TMP11:%.*]], [[TMP6]] ] ; IS________NPM-NEXT: [[TMP8:%.*]] = phi i32 [ 0, [[TMP4]] ], [ [[TMP11:%.*]], [[TMP6]] ]
; IS__TUNIT_NPM-NEXT: [[TMP9:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 [[TMP7]] ; IS________NPM-NEXT: [[TMP9:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 [[TMP7]]
; IS__TUNIT_NPM-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 ; IS________NPM-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
; IS__TUNIT_NPM-NEXT: [[TMP11]] = add nsw i32 [[TMP10]], [[TMP8]] ; IS________NPM-NEXT: [[TMP11]] = add nsw i32 [[TMP10]], [[TMP8]]
; IS__TUNIT_NPM-NEXT: [[TMP12]] = add nsw i64 [[TMP7]], -1 ; IS________NPM-NEXT: [[TMP12]] = add nsw i64 [[TMP7]], -1
; IS__TUNIT_NPM-NEXT: [[TMP13:%.*]] = icmp sgt i64 [[TMP7]], 0 ; IS________NPM-NEXT: [[TMP13:%.*]] = icmp sgt i64 [[TMP7]], 0
; IS__TUNIT_NPM-NEXT: br i1 [[TMP13]], label [[TMP6]], label [[TMP14]] ; IS________NPM-NEXT: br i1 [[TMP13]], label [[TMP6]], label [[TMP14]]
; IS__TUNIT_NPM: 14: ; IS________NPM: 14:
; IS__TUNIT_NPM-NEXT: [[TMP15:%.*]] = phi i32 [ 0, [[TMP2:%.*]] ], [ [[TMP11]], [[TMP6]] ] ; IS________NPM-NEXT: [[TMP15:%.*]] = phi i32 [ 0, [[TMP2:%.*]] ], [ [[TMP11]], [[TMP6]] ]
; IS__TUNIT_NPM-NEXT: ret i32 [[TMP15]] ; IS________NPM-NEXT: ret i32 [[TMP15]]
;
; IS__CGSCC_OPM: Function Attrs: argmemonly nofree noinline norecurse nosync nounwind readonly uwtable
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@loop_trip_dec
; IS__CGSCC_OPM-SAME: (i32 [[TMP0:%.*]], i32* nocapture nofree readonly [[TMP1:%.*]]) local_unnamed_addr #[[ATTR15]] {
; IS__CGSCC_OPM-NEXT: [[TMP3:%.*]] = icmp sgt i32 [[TMP0]], -1
; IS__CGSCC_OPM-NEXT: br i1 [[TMP3]], label [[TMP4:%.*]], label [[TMP14:%.*]]
; IS__CGSCC_OPM: 4:
; IS__CGSCC_OPM-NEXT: [[TMP5:%.*]] = sext i32 [[TMP0]] to i64
; IS__CGSCC_OPM-NEXT: br label [[TMP6:%.*]]
; IS__CGSCC_OPM: 6:
; IS__CGSCC_OPM-NEXT: [[TMP7:%.*]] = phi i64 [ [[TMP5]], [[TMP4]] ], [ [[TMP12:%.*]], [[TMP6]] ]
; IS__CGSCC_OPM-NEXT: [[TMP8:%.*]] = phi i32 [ 0, [[TMP4]] ], [ [[TMP11:%.*]], [[TMP6]] ]
; IS__CGSCC_OPM-NEXT: [[TMP9:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 [[TMP7]]
; IS__CGSCC_OPM-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
; IS__CGSCC_OPM-NEXT: [[TMP11]] = add nsw i32 [[TMP10]], [[TMP8]]
; IS__CGSCC_OPM-NEXT: [[TMP12]] = add nsw i64 [[TMP7]], -1
; IS__CGSCC_OPM-NEXT: [[TMP13:%.*]] = icmp sgt i64 [[TMP7]], 0
; IS__CGSCC_OPM-NEXT: br i1 [[TMP13]], label [[TMP6]], label [[TMP14]]
; IS__CGSCC_OPM: 14:
; IS__CGSCC_OPM-NEXT: [[TMP15:%.*]] = phi i32 [ 0, [[TMP2:%.*]] ], [ [[TMP11]], [[TMP6]] ]
; IS__CGSCC_OPM-NEXT: ret i32 [[TMP15]]
;
; IS__CGSCC_NPM: Function Attrs: argmemonly nofree noinline norecurse nosync nounwind readonly uwtable willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@loop_trip_dec
; IS__CGSCC_NPM-SAME: (i32 [[TMP0:%.*]], i32* nocapture nofree readonly [[TMP1:%.*]]) local_unnamed_addr #[[ATTR15]] {
; IS__CGSCC_NPM-NEXT: [[TMP3:%.*]] = icmp sgt i32 [[TMP0]], -1
; IS__CGSCC_NPM-NEXT: br i1 [[TMP3]], label [[TMP4:%.*]], label [[TMP14:%.*]]
; IS__CGSCC_NPM: 4:
; IS__CGSCC_NPM-NEXT: [[TMP5:%.*]] = sext i32 [[TMP0]] to i64
; IS__CGSCC_NPM-NEXT: br label [[TMP6:%.*]]
; IS__CGSCC_NPM: 6:
; IS__CGSCC_NPM-NEXT: [[TMP7:%.*]] = phi i64 [ [[TMP5]], [[TMP4]] ], [ [[TMP12:%.*]], [[TMP6]] ]
; IS__CGSCC_NPM-NEXT: [[TMP8:%.*]] = phi i32 [ 0, [[TMP4]] ], [ [[TMP11:%.*]], [[TMP6]] ]
; IS__CGSCC_NPM-NEXT: [[TMP9:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i64 [[TMP7]]
; IS__CGSCC_NPM-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
; IS__CGSCC_NPM-NEXT: [[TMP11]] = add nsw i32 [[TMP10]], [[TMP8]]
; IS__CGSCC_NPM-NEXT: [[TMP12]] = add nsw i64 [[TMP7]], -1
; IS__CGSCC_NPM-NEXT: [[TMP13:%.*]] = icmp sgt i64 [[TMP7]], 0
; IS__CGSCC_NPM-NEXT: br i1 [[TMP13]], label [[TMP6]], label [[TMP14]]
; IS__CGSCC_NPM: 14:
; IS__CGSCC_NPM-NEXT: [[TMP15:%.*]] = phi i32 [ 0, [[TMP2:%.*]] ], [ [[TMP11]], [[TMP6]] ]
; IS__CGSCC_NPM-NEXT: ret i32 [[TMP15]]
; ;
%3 = icmp sgt i32 %0, -1 %3 = icmp sgt i32 %0, -1
br i1 %3, label %4, label %14 br i1 %3, label %4, label %14
; <label>:4: ; preds = %2 ; <label>:4: ; preds = %2
%5 = sext i32 %0 to i64 %5 = sext i32 %0 to i64
br label %6 br label %6
Show All 11 Lines; <label>:14: ; preds = %6, %2
%15 = phi i32 [ 0, %2 ], [ %11, %6 ] %15 = phi i32 [ 0, %2 ], [ %11, %6 ]
ret i32 %15 ret i32 %15
} }
; TEST 14 (positive case) ; TEST 14 (positive case)
; multiple return ; multiple return
define i32 @multiple_return(i32 %a) #0 { define i32 @multiple_return(i32 %a) #0 {
; IS__TUNIT____: Function Attrs: nofree noinline nosync nounwind readnone uwtable willreturn ; CHECK: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@multiple_return ; CHECK-LABEL: define {{[^@]+}}@multiple_return
; IS__TUNIT____-SAME: (i32 [[A:%.*]]) #[[ATTR0]] { ; CHECK-SAME: (i32 [[A:%.*]]) #[[ATTR0]] {
; IS__TUNIT____-NEXT: [[B:%.*]] = icmp eq i32 [[A]], 0 ; CHECK-NEXT: [[B:%.*]] = icmp eq i32 [[A]], 0
; IS__TUNIT____-NEXT: br i1 [[B]], label [[T:%.*]], label [[F:%.*]] ; CHECK-NEXT: br i1 [[B]], label [[T:%.*]], label [[F:%.*]]
; IS__TUNIT____: t: ; CHECK: t:
; IS__TUNIT____-NEXT: ret i32 1 ; CHECK-NEXT: ret i32 1
; IS__TUNIT____: f: ; CHECK: f:
; IS__TUNIT____-NEXT: ret i32 0 ; CHECK-NEXT: ret i32 0
;
; IS__CGSCC____: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@multiple_return
; IS__CGSCC____-SAME: (i32 [[A:%.*]]) #[[ATTR0]] {
; IS__CGSCC____-NEXT: [[B:%.*]] = icmp eq i32 [[A]], 0
; IS__CGSCC____-NEXT: br i1 [[B]], label [[T:%.*]], label [[F:%.*]]
; IS__CGSCC____: t:
; IS__CGSCC____-NEXT: ret i32 1
; IS__CGSCC____: f:
; IS__CGSCC____-NEXT: ret i32 0
; ;
%b = icmp eq i32 %a, 0 %b = icmp eq i32 %a, 0
br i1 %b, label %t, label %f br i1 %b, label %t, label %f
t: t:
ret i32 1 ret i32 1
f: f:
ret i32 0 ret i32 0
} }
; TEST 15 (positive & negative case) ; TEST 15 (positive & negative case)
; unreachable exit ; unreachable exit
; 15.1 (positive case) ; 15.1 (positive case)
define void @unreachable_exit_positive1() #0 { define void @unreachable_exit_positive1() #0 {
; IS__TUNIT_OPM: Function Attrs: noinline nounwind uwtable willreturn ; IS________OPM: Function Attrs: noinline nounwind uwtable willreturn
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@unreachable_exit_positive1 ; IS________OPM-LABEL: define {{[^@]+}}@unreachable_exit_positive1
; IS__TUNIT_OPM-SAME: () #[[ATTR9]] { ; IS________OPM-SAME: () #[[ATTR11]] {
; IS__TUNIT_OPM-NEXT: tail call void @will_return() #[[ATTR26]] ; IS________OPM-NEXT: tail call void @will_return() #[[ATTR29]]
; IS__TUNIT_OPM-NEXT: ret void ; IS________OPM-NEXT: ret void
; IS__TUNIT_OPM: unreachable_label: ; IS________OPM: unreachable_label:
; IS__TUNIT_OPM-NEXT: unreachable ; IS________OPM-NEXT: unreachable
; ;
; IS__TUNIT_NPM: Function Attrs: noinline nounwind uwtable willreturn ; IS________NPM: Function Attrs: noinline nounwind uwtable willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@unreachable_exit_positive1 ; IS________NPM-LABEL: define {{[^@]+}}@unreachable_exit_positive1
; IS__TUNIT_NPM-SAME: () #[[ATTR9]] { ; IS________NPM-SAME: () #[[ATTR11]] {
; IS__TUNIT_NPM-NEXT: tail call void @will_return() #[[ATTR28]] ; IS________NPM-NEXT: tail call void @will_return() #[[ATTR31]]
; IS__TUNIT_NPM-NEXT: ret void ; IS________NPM-NEXT: ret void
; IS__TUNIT_NPM: unreachable_label: ; IS________NPM: unreachable_label:
; IS__TUNIT_NPM-NEXT: unreachable ; IS________NPM-NEXT: unreachable
;
; IS__CGSCC_OPM: Function Attrs: noinline norecurse nounwind uwtable willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@unreachable_exit_positive1
; IS__CGSCC_OPM-SAME: () #[[ATTR11]] {
; IS__CGSCC_OPM-NEXT: tail call void @will_return() #[[ATTR30]]
; IS__CGSCC_OPM-NEXT: ret void
; IS__CGSCC_OPM: unreachable_label:
; IS__CGSCC_OPM-NEXT: unreachable
;
; IS__CGSCC_NPM: Function Attrs: noinline norecurse nounwind uwtable willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@unreachable_exit_positive1
; IS__CGSCC_NPM-SAME: () #[[ATTR11]] {
; IS__CGSCC_NPM-NEXT: tail call void @will_return() #[[ATTR32]]
; IS__CGSCC_NPM-NEXT: ret void
; IS__CGSCC_NPM: unreachable_label:
; IS__CGSCC_NPM-NEXT: unreachable
; ;
tail call void @will_return() tail call void @will_return()
ret void ret void
unreachable_label: unreachable_label:
tail call void @exit(i32 0) tail call void @exit(i32 0)
unreachable unreachable
} }
define i32 @unreachable_exit_positive2(i32) local_unnamed_addr #0 { define i32 @unreachable_exit_positive2(i32) local_unnamed_addr #0 {
; IS__TUNIT_OPM: Function Attrs: nofree noinline nosync nounwind readnone uwtable ; IS________OPM: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@unreachable_exit_positive2 ; IS________OPM-LABEL: define {{[^@]+}}@unreachable_exit_positive2
; IS__TUNIT_OPM-SAME: (i32 [[TMP0:%.*]]) local_unnamed_addr #[[ATTR1]] { ; IS________OPM-SAME: (i32 [[TMP0:%.*]]) local_unnamed_addr #[[ATTR2]] {
; IS__TUNIT_OPM-NEXT: [[TMP2:%.*]] = icmp slt i32 [[TMP0]], 1 ; IS________OPM-NEXT: [[TMP2:%.*]] = icmp slt i32 [[TMP0]], 1
; IS__TUNIT_OPM-NEXT: br i1 [[TMP2]], label [[TMP3:%.*]], label [[TMP5:%.*]] ; IS________OPM-NEXT: br i1 [[TMP2]], label [[TMP3:%.*]], label [[TMP5:%.*]]
; IS__TUNIT_OPM: 3: ; IS________OPM: 3:
; IS__TUNIT_OPM-NEXT: [[TMP4:%.*]] = phi i32 [ 1, [[TMP1:%.*]] ], [ [[TMP8:%.*]], [[TMP5]] ] ; IS________OPM-NEXT: [[TMP4:%.*]] = phi i32 [ 1, [[TMP1:%.*]] ], [ [[TMP8:%.*]], [[TMP5]] ]
; IS__TUNIT_OPM-NEXT: ret i32 [[TMP4]] ; IS________OPM-NEXT: ret i32 [[TMP4]]
; IS__TUNIT_OPM: 5: ; IS________OPM: 5:
; IS__TUNIT_OPM-NEXT: [[TMP6:%.*]] = phi i32 [ [[TMP9:%.*]], [[TMP5]] ], [ 1, [[TMP1]] ] ; IS________OPM-NEXT: [[TMP6:%.*]] = phi i32 [ [[TMP9:%.*]], [[TMP5]] ], [ 1, [[TMP1]] ]
; IS__TUNIT_OPM-NEXT: [[TMP7:%.*]] = phi i32 [ [[TMP8]], [[TMP5]] ], [ 1, [[TMP1]] ] ; IS________OPM-NEXT: [[TMP7:%.*]] = phi i32 [ [[TMP8]], [[TMP5]] ], [ 1, [[TMP1]] ]
; IS__TUNIT_OPM-NEXT: [[TMP8]] = mul nsw i32 [[TMP6]], [[TMP7]] ; IS________OPM-NEXT: [[TMP8]] = mul nsw i32 [[TMP6]], [[TMP7]]
; IS__TUNIT_OPM-NEXT: [[TMP9]] = add nuw nsw i32 [[TMP6]], 1 ; IS________OPM-NEXT: [[TMP9]] = add nuw nsw i32 [[TMP6]], 1
; IS__TUNIT_OPM-NEXT: [[TMP10:%.*]] = icmp eq i32 [[TMP6]], [[TMP0]] ; IS________OPM-NEXT: [[TMP10:%.*]] = icmp eq i32 [[TMP6]], [[TMP0]]
; IS__TUNIT_OPM-NEXT: br i1 [[TMP10]], label [[TMP3]], label [[TMP5]] ; IS________OPM-NEXT: br i1 [[TMP10]], label [[TMP3]], label [[TMP5]]
; IS__TUNIT_OPM: unreachable_label: ; IS________OPM: unreachable_label:
; IS__TUNIT_OPM-NEXT: unreachable ; IS________OPM-NEXT: unreachable
; ;
; IS__TUNIT_NPM: Function Attrs: nofree noinline nosync nounwind readnone uwtable willreturn ; IS________NPM: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@unreachable_exit_positive2 ; IS________NPM-LABEL: define {{[^@]+}}@unreachable_exit_positive2
; IS__TUNIT_NPM-SAME: (i32 [[TMP0:%.*]]) local_unnamed_addr #[[ATTR0]] { ; IS________NPM-SAME: (i32 [[TMP0:%.*]]) local_unnamed_addr #[[ATTR0]] {
; IS__TUNIT_NPM-NEXT: [[TMP2:%.*]] = icmp slt i32 [[TMP0]], 1 ; IS________NPM-NEXT: [[TMP2:%.*]] = icmp slt i32 [[TMP0]], 1
; IS__TUNIT_NPM-NEXT: br i1 [[TMP2]], label [[TMP3:%.*]], label [[TMP5:%.*]] ; IS________NPM-NEXT: br i1 [[TMP2]], label [[TMP3:%.*]], label [[TMP5:%.*]]
; IS__TUNIT_NPM: 3: ; IS________NPM: 3:
; IS__TUNIT_NPM-NEXT: [[TMP4:%.*]] = phi i32 [ 1, [[TMP1:%.*]] ], [ [[TMP8:%.*]], [[TMP5]] ] ; IS________NPM-NEXT: [[TMP4:%.*]] = phi i32 [ 1, [[TMP1:%.*]] ], [ [[TMP8:%.*]], [[TMP5]] ]
; IS__TUNIT_NPM-NEXT: ret i32 [[TMP4]] ; IS________NPM-NEXT: ret i32 [[TMP4]]
; IS__TUNIT_NPM: 5: ; IS________NPM: 5:
; IS__TUNIT_NPM-NEXT: [[TMP6:%.*]] = phi i32 [ [[TMP9:%.*]], [[TMP5]] ], [ 1, [[TMP1]] ] ; IS________NPM-NEXT: [[TMP6:%.*]] = phi i32 [ [[TMP9:%.*]], [[TMP5]] ], [ 1, [[TMP1]] ]
; IS__TUNIT_NPM-NEXT: [[TMP7:%.*]] = phi i32 [ [[TMP8]], [[TMP5]] ], [ 1, [[TMP1]] ] ; IS________NPM-NEXT: [[TMP7:%.*]] = phi i32 [ [[TMP8]], [[TMP5]] ], [ 1, [[TMP1]] ]
; IS__TUNIT_NPM-NEXT: [[TMP8]] = mul nsw i32 [[TMP6]], [[TMP7]] ; IS________NPM-NEXT: [[TMP8]] = mul nsw i32 [[TMP6]], [[TMP7]]
; IS__TUNIT_NPM-NEXT: [[TMP9]] = add nuw nsw i32 [[TMP6]], 1 ; IS________NPM-NEXT: [[TMP9]] = add nuw nsw i32 [[TMP6]], 1
; IS__TUNIT_NPM-NEXT: [[TMP10:%.*]] = icmp eq i32 [[TMP6]], [[TMP0]] ; IS________NPM-NEXT: [[TMP10:%.*]] = icmp eq i32 [[TMP6]], [[TMP0]]
; IS__TUNIT_NPM-NEXT: br i1 [[TMP10]], label [[TMP3]], label [[TMP5]] ; IS________NPM-NEXT: br i1 [[TMP10]], label [[TMP3]], label [[TMP5]]
; IS__TUNIT_NPM: unreachable_label: ; IS________NPM: unreachable_label:
; IS__TUNIT_NPM-NEXT: unreachable ; IS________NPM-NEXT: unreachable
;
; IS__CGSCC_OPM: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@unreachable_exit_positive2
; IS__CGSCC_OPM-SAME: (i32 [[TMP0:%.*]]) local_unnamed_addr #[[ATTR2]] {
; IS__CGSCC_OPM-NEXT: [[TMP2:%.*]] = icmp slt i32 [[TMP0]], 1
; IS__CGSCC_OPM-NEXT: br i1 [[TMP2]], label [[TMP3:%.*]], label [[TMP5:%.*]]
; IS__CGSCC_OPM: 3:
; IS__CGSCC_OPM-NEXT: [[TMP4:%.*]] = phi i32 [ 1, [[TMP1:%.*]] ], [ [[TMP8:%.*]], [[TMP5]] ]
; IS__CGSCC_OPM-NEXT: ret i32 [[TMP4]]
; IS__CGSCC_OPM: 5:
; IS__CGSCC_OPM-NEXT: [[TMP6:%.*]] = phi i32 [ [[TMP9:%.*]], [[TMP5]] ], [ 1, [[TMP1]] ]
; IS__CGSCC_OPM-NEXT: [[TMP7:%.*]] = phi i32 [ [[TMP8]], [[TMP5]] ], [ 1, [[TMP1]] ]
; IS__CGSCC_OPM-NEXT: [[TMP8]] = mul nsw i32 [[TMP6]], [[TMP7]]
; IS__CGSCC_OPM-NEXT: [[TMP9]] = add nuw nsw i32 [[TMP6]], 1
; IS__CGSCC_OPM-NEXT: [[TMP10:%.*]] = icmp eq i32 [[TMP6]], [[TMP0]]
; IS__CGSCC_OPM-NEXT: br i1 [[TMP10]], label [[TMP3]], label [[TMP5]]
; IS__CGSCC_OPM: unreachable_label:
; IS__CGSCC_OPM-NEXT: unreachable
;
; IS__CGSCC_NPM: Function Attrs: nofree noinline norecurse nosync nounwind readnone uwtable willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@unreachable_exit_positive2
; IS__CGSCC_NPM-SAME: (i32 [[TMP0:%.*]]) local_unnamed_addr #[[ATTR0]] {
; IS__CGSCC_NPM-NEXT: [[TMP2:%.*]] = icmp slt i32 [[TMP0]], 1
; IS__CGSCC_NPM-NEXT: br i1 [[TMP2]], label [[TMP3:%.*]], label [[TMP5:%.*]]
; IS__CGSCC_NPM: 3:
; IS__CGSCC_NPM-NEXT: [[TMP4:%.*]] = phi i32 [ 1, [[TMP1:%.*]] ], [ [[TMP8:%.*]], [[TMP5]] ]
; IS__CGSCC_NPM-NEXT: ret i32 [[TMP4]]
; IS__CGSCC_NPM: 5:
; IS__CGSCC_NPM-NEXT: [[TMP6:%.*]] = phi i32 [ [[TMP9:%.*]], [[TMP5]] ], [ 1, [[TMP1]] ]
; IS__CGSCC_NPM-NEXT: [[TMP7:%.*]] = phi i32 [ [[TMP8]], [[TMP5]] ], [ 1, [[TMP1]] ]
; IS__CGSCC_NPM-NEXT: [[TMP8]] = mul nsw i32 [[TMP6]], [[TMP7]]
; IS__CGSCC_NPM-NEXT: [[TMP9]] = add nuw nsw i32 [[TMP6]], 1
; IS__CGSCC_NPM-NEXT: [[TMP10:%.*]] = icmp eq i32 [[TMP6]], [[TMP0]]
; IS__CGSCC_NPM-NEXT: br i1 [[TMP10]], label [[TMP3]], label [[TMP5]]
; IS__CGSCC_NPM: unreachable_label:
; IS__CGSCC_NPM-NEXT: unreachable
; ;
%2 = icmp slt i32 %0, 1 %2 = icmp slt i32 %0, 1
br i1 %2, label %3, label %5 br i1 %2, label %3, label %5
; <label>:3: ; preds = %5, %1 ; <label>:3: ; preds = %5, %1
%4 = phi i32 [ 1, %1 ], [ %8, %5 ] %4 = phi i32 [ 1, %1 ], [ %8, %5 ]
ret i32 %4 ret i32 %4
Show All 9 Linesunreachable_label:
tail call void @exit(i32 0) tail call void @exit(i32 0)
unreachable unreachable
} }
;15.2 ;15.2
define void @unreachable_exit_negative1() #0 { define void @unreachable_exit_negative1() #0 {
; IS__TUNIT____: Function Attrs: noinline nounwind uwtable ; CHECK: Function Attrs: noinline nounwind uwtable
; IS__TUNIT____-LABEL: define {{[^@]+}}@unreachable_exit_negative1 ; CHECK-LABEL: define {{[^@]+}}@unreachable_exit_negative1
; IS__TUNIT____-SAME: () #[[ATTR6]] { ; CHECK-SAME: () #[[ATTR7]] {
; IS__TUNIT____-NEXT: tail call void @exit(i32 noundef 0) #[[ATTR4]] ; CHECK-NEXT: tail call void @exit(i32 noundef 0) #[[ATTR5]]
; IS__TUNIT____-NEXT: unreachable ; CHECK-NEXT: unreachable
; IS__TUNIT____: unreachable_label: ; CHECK: unreachable_label:
; IS__TUNIT____-NEXT: unreachable ; CHECK-NEXT: unreachable
;
; IS__CGSCC____: Function Attrs: noinline nounwind uwtable
; IS__CGSCC____-LABEL: define {{[^@]+}}@unreachable_exit_negative1
; IS__CGSCC____-SAME: () #[[ATTR7]] {
; IS__CGSCC____-NEXT: tail call void @exit(i32 noundef 0) #[[ATTR5]]
; IS__CGSCC____-NEXT: unreachable
; IS__CGSCC____: unreachable_label:
; IS__CGSCC____-NEXT: unreachable
; ;
tail call void @exit(i32 0) tail call void @exit(i32 0)
ret void ret void
unreachable_label: unreachable_label:
tail call void @exit(i32 0) tail call void @exit(i32 0)
unreachable unreachable
} }
define void @unreachable_exit_negative2() #0 { define void @unreachable_exit_negative2() #0 {
; IS__TUNIT_OPM: Function Attrs: nofree noinline noreturn nosync nounwind readnone uwtable ; IS________OPM: Function Attrs: nofree noinline norecurse noreturn nosync nounwind readnone uwtable
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@unreachable_exit_negative2 ; IS________OPM-LABEL: define {{[^@]+}}@unreachable_exit_negative2
; IS__TUNIT_OPM-SAME: () #[[ATTR13:[0-9]+]] { ; IS________OPM-SAME: () #[[ATTR15:[0-9]+]] {
; IS__TUNIT_OPM-NEXT: br label [[L1:%.*]] ; IS________OPM-NEXT: br label [[L1:%.*]]
; IS__TUNIT_OPM: L1: ; IS________OPM: L1:
; IS__TUNIT_OPM-NEXT: br label [[L2:%.*]] ; IS________OPM-NEXT: br label [[L2:%.*]]
; IS__TUNIT_OPM: L2: ; IS________OPM: L2:
; IS__TUNIT_OPM-NEXT: br label [[L1]] ; IS________OPM-NEXT: br label [[L1]]
; IS__TUNIT_OPM: unreachable_label: ; IS________OPM: unreachable_label:
; IS__TUNIT_OPM-NEXT: unreachable ; IS________OPM-NEXT: unreachable
; ;
; IS__TUNIT_NPM: Function Attrs: nofree noinline noreturn nosync nounwind readnone uwtable ; IS________NPM: Function Attrs: nofree noinline norecurse noreturn nosync nounwind readnone uwtable
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@unreachable_exit_negative2 ; IS________NPM-LABEL: define {{[^@]+}}@unreachable_exit_negative2
; IS__TUNIT_NPM-SAME: () #[[ATTR14:[0-9]+]] { ; IS________NPM-SAME: () #[[ATTR16:[0-9]+]] {
; IS__TUNIT_NPM-NEXT: br label [[L1:%.*]] ; IS________NPM-NEXT: br label [[L1:%.*]]
; IS__TUNIT_NPM: L1: ; IS________NPM: L1:
; IS__TUNIT_NPM-NEXT: br label [[L2:%.*]] ; IS________NPM-NEXT: br label [[L2:%.*]]
; IS__TUNIT_NPM: L2: ; IS________NPM: L2:
; IS__TUNIT_NPM-NEXT: br label [[L1]] ; IS________NPM-NEXT: br label [[L1]]
; IS__TUNIT_NPM: unreachable_label: ; IS________NPM: unreachable_label:
; IS__TUNIT_NPM-NEXT: unreachable ; IS________NPM-NEXT: unreachable
;
; IS__CGSCC_OPM: Function Attrs: nofree noinline norecurse noreturn nosync nounwind readnone uwtable
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@unreachable_exit_negative2
; IS__CGSCC_OPM-SAME: () #[[ATTR16:[0-9]+]] {
; IS__CGSCC_OPM-NEXT: br label [[L1:%.*]]
; IS__CGSCC_OPM: L1:
; IS__CGSCC_OPM-NEXT: br label [[L2:%.*]]
; IS__CGSCC_OPM: L2:
; IS__CGSCC_OPM-NEXT: br label [[L1]]
; IS__CGSCC_OPM: unreachable_label:
; IS__CGSCC_OPM-NEXT: unreachable
;
; IS__CGSCC_NPM: Function Attrs: nofree noinline norecurse noreturn nosync nounwind readnone uwtable
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@unreachable_exit_negative2
; IS__CGSCC_NPM-SAME: () #[[ATTR17:[0-9]+]] {
; IS__CGSCC_NPM-NEXT: br label [[L1:%.*]]
; IS__CGSCC_NPM: L1:
; IS__CGSCC_NPM-NEXT: br label [[L2:%.*]]
; IS__CGSCC_NPM: L2:
; IS__CGSCC_NPM-NEXT: br label [[L1]]
; IS__CGSCC_NPM: unreachable_label:
; IS__CGSCC_NPM-NEXT: unreachable
; ;
br label %L1 br label %L1
L1: L1:
br label %L2 br label %L2
L2: L2:
br label %L1 br label %L1
unreachable_label: unreachable_label:
tail call void @exit(i32 0) tail call void @exit(i32 0)
unreachable unreachable
} }
; CHECK: Function Attrs: noreturn nounwind ; CHECK: Function Attrs: noreturn nounwind
; CHECK-NEXT: declare void @llvm.eh.sjlj.longjmp(i8*) ; CHECK-NEXT: declare void @llvm.eh.sjlj.longjmp(i8*)
declare void @llvm.eh.sjlj.longjmp(i8*) declare void @llvm.eh.sjlj.longjmp(i8*)
define void @call_longjmp(i8* nocapture readnone %0) local_unnamed_addr #0 { define void @call_longjmp(i8* nocapture readnone %0) local_unnamed_addr #0 {
; IS__TUNIT____: Function Attrs: noinline nounwind uwtable ; CHECK: Function Attrs: noinline nounwind uwtable
; IS__TUNIT____-LABEL: define {{[^@]+}}@call_longjmp ; CHECK-LABEL: define {{[^@]+}}@call_longjmp
; IS__TUNIT____-SAME: (i8* nocapture readnone [[TMP0:%.*]]) local_unnamed_addr #[[ATTR6]] { ; CHECK-SAME: (i8* nocapture readnone [[TMP0:%.*]]) local_unnamed_addr #[[ATTR7]] {
; IS__TUNIT____-NEXT: tail call void @llvm.eh.sjlj.longjmp(i8* noalias readnone [[TMP0]]) #[[ATTR4]] ; CHECK-NEXT: tail call void @llvm.eh.sjlj.longjmp(i8* noalias readnone [[TMP0]]) #[[ATTR5]]
; IS__TUNIT____-NEXT: unreachable ; CHECK-NEXT: unreachable
;
; IS__CGSCC____: Function Attrs: noinline nounwind uwtable
; IS__CGSCC____-LABEL: define {{[^@]+}}@call_longjmp
; IS__CGSCC____-SAME: (i8* nocapture readnone [[TMP0:%.*]]) local_unnamed_addr #[[ATTR7]] {
; IS__CGSCC____-NEXT: tail call void @llvm.eh.sjlj.longjmp(i8* noalias readnone [[TMP0]]) #[[ATTR5]]
; IS__CGSCC____-NEXT: unreachable
; ;
tail call void @llvm.eh.sjlj.longjmp(i8* %0) tail call void @llvm.eh.sjlj.longjmp(i8* %0)
ret void ret void
} }
; TEST 16 (negative case) ; TEST 16 (negative case)
; int infinite_loop_inside_bounded_loop(int n) { ; int infinite_loop_inside_bounded_loop(int n) {
; int ans = 0; ; int ans = 0;
; for (int i = 0; i < n; i++) { ; for (int i = 0; i < n; i++) {
; while (1) ; while (1)
; ans++; ; ans++;
; } ; }
; return ans; ; return ans;
; } ; }
define i32 @infinite_loop_inside_bounded_loop(i32 %n) { define i32 @infinite_loop_inside_bounded_loop(i32 %n) {
; IS__TUNIT_OPM: Function Attrs: nofree nosync nounwind readnone ; IS________OPM: Function Attrs: nofree norecurse nosync nounwind readnone
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@infinite_loop_inside_bounded_loop ; IS________OPM-LABEL: define {{[^@]+}}@infinite_loop_inside_bounded_loop
; IS__TUNIT_OPM-SAME: (i32 [[N:%.*]]) #[[ATTR15]] { ; IS________OPM-SAME: (i32 [[N:%.*]]) #[[ATTR17:[0-9]+]] {
; IS__TUNIT_OPM-NEXT: entry: ; IS________OPM-NEXT: entry:
; IS__TUNIT_OPM-NEXT: br label [[FOR_COND:%.*]] ; IS________OPM-NEXT: br label [[FOR_COND:%.*]]
; IS__TUNIT_OPM: for.cond: ; IS________OPM: for.cond:
; IS__TUNIT_OPM-NEXT: [[CMP:%.*]] = icmp sgt i32 [[N]], 0 ; IS________OPM-NEXT: [[CMP:%.*]] = icmp sgt i32 [[N]], 0
; IS__TUNIT_OPM-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_COND_CLEANUP:%.*]] ; IS________OPM-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_COND_CLEANUP:%.*]]
; IS__TUNIT_OPM: for.cond.cleanup: ; IS________OPM: for.cond.cleanup:
; IS__TUNIT_OPM-NEXT: br label [[FOR_END:%.*]] ; IS________OPM-NEXT: br label [[FOR_END:%.*]]
; IS__TUNIT_OPM: for.body: ; IS________OPM: for.body:
; IS__TUNIT_OPM-NEXT: br label [[WHILE_COND:%.*]] ; IS________OPM-NEXT: br label [[WHILE_COND:%.*]]
; IS__TUNIT_OPM: while.cond: ; IS________OPM: while.cond:
; IS__TUNIT_OPM-NEXT: br label [[WHILE_BODY:%.*]] ; IS________OPM-NEXT: br label [[WHILE_BODY:%.*]]
; IS__TUNIT_OPM: while.body: ; IS________OPM: while.body:
; IS__TUNIT_OPM-NEXT: br label [[WHILE_COND]] ; IS________OPM-NEXT: br label [[WHILE_COND]]
; IS__TUNIT_OPM: for.inc: ; IS________OPM: for.inc:
; IS__TUNIT_OPM-NEXT: unreachable ; IS________OPM-NEXT: unreachable
; IS__TUNIT_OPM: for.end: ; IS________OPM: for.end:
; IS__TUNIT_OPM-NEXT: ret i32 0 ; IS________OPM-NEXT: ret i32 0
; ;
; IS__TUNIT_NPM: Function Attrs: nofree nosync nounwind readnone ; IS________NPM: Function Attrs: nofree norecurse nosync nounwind readnone
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@infinite_loop_inside_bounded_loop ; IS________NPM-LABEL: define {{[^@]+}}@infinite_loop_inside_bounded_loop
; IS__TUNIT_NPM-SAME: (i32 [[N:%.*]]) #[[ATTR16]] { ; IS________NPM-SAME: (i32 [[N:%.*]]) #[[ATTR18:[0-9]+]] {
; IS__TUNIT_NPM-NEXT: entry: ; IS________NPM-NEXT: entry:
; IS__TUNIT_NPM-NEXT: br label [[FOR_COND:%.*]] ; IS________NPM-NEXT: br label [[FOR_COND:%.*]]
; IS__TUNIT_NPM: for.cond: ; IS________NPM: for.cond:
; IS__TUNIT_NPM-NEXT: [[CMP:%.*]] = icmp sgt i32 [[N]], 0 ; IS________NPM-NEXT: [[CMP:%.*]] = icmp sgt i32 [[N]], 0
; IS__TUNIT_NPM-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_COND_CLEANUP:%.*]] ; IS________NPM-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_COND_CLEANUP:%.*]]
; IS__TUNIT_NPM: for.cond.cleanup: ; IS________NPM: for.cond.cleanup:
; IS__TUNIT_NPM-NEXT: br label [[FOR_END:%.*]] ; IS________NPM-NEXT: br label [[FOR_END:%.*]]
; IS__TUNIT_NPM: for.body: ; IS________NPM: for.body:
; IS__TUNIT_NPM-NEXT: br label [[WHILE_COND:%.*]] ; IS________NPM-NEXT: br label [[WHILE_COND:%.*]]
; IS__TUNIT_NPM: while.cond: ; IS________NPM: while.cond:
; IS__TUNIT_NPM-NEXT: br label [[WHILE_BODY:%.*]] ; IS________NPM-NEXT: br label [[WHILE_BODY:%.*]]
; IS__TUNIT_NPM: while.body: ; IS________NPM: while.body:
; IS__TUNIT_NPM-NEXT: br label [[WHILE_COND]] ; IS________NPM-NEXT: br label [[WHILE_COND]]
; IS__TUNIT_NPM: for.inc: ; IS________NPM: for.inc:
; IS__TUNIT_NPM-NEXT: unreachable ; IS________NPM-NEXT: unreachable
; IS__TUNIT_NPM: for.end: ; IS________NPM: for.end:
; IS__TUNIT_NPM-NEXT: ret i32 0 ; IS________NPM-NEXT: ret i32 0
;
; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readnone
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@infinite_loop_inside_bounded_loop
; IS__CGSCC_OPM-SAME: (i32 [[N:%.*]]) #[[ATTR18:[0-9]+]] {
; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: br label [[FOR_COND:%.*]]
; IS__CGSCC_OPM: for.cond:
; IS__CGSCC_OPM-NEXT: [[CMP:%.*]] = icmp sgt i32 [[N]], 0
; IS__CGSCC_OPM-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_COND_CLEANUP:%.*]]
; IS__CGSCC_OPM: for.cond.cleanup:
; IS__CGSCC_OPM-NEXT: br label [[FOR_END:%.*]]
; IS__CGSCC_OPM: for.body:
; IS__CGSCC_OPM-NEXT: br label [[WHILE_COND:%.*]]
; IS__CGSCC_OPM: while.cond:
; IS__CGSCC_OPM-NEXT: br label [[WHILE_BODY:%.*]]
; IS__CGSCC_OPM: while.body:
; IS__CGSCC_OPM-NEXT: br label [[WHILE_COND]]
; IS__CGSCC_OPM: for.inc:
; IS__CGSCC_OPM-NEXT: unreachable
; IS__CGSCC_OPM: for.end:
; IS__CGSCC_OPM-NEXT: ret i32 0
;
; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@infinite_loop_inside_bounded_loop
; IS__CGSCC_NPM-SAME: (i32 [[N:%.*]]) #[[ATTR19:[0-9]+]] {
; IS__CGSCC_NPM-NEXT: entry:
; IS__CGSCC_NPM-NEXT: br label [[FOR_COND:%.*]]
; IS__CGSCC_NPM: for.cond:
; IS__CGSCC_NPM-NEXT: [[CMP:%.*]] = icmp sgt i32 [[N]], 0
; IS__CGSCC_NPM-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_COND_CLEANUP:%.*]]
; IS__CGSCC_NPM: for.cond.cleanup:
; IS__CGSCC_NPM-NEXT: br label [[FOR_END:%.*]]
; IS__CGSCC_NPM: for.body:
; IS__CGSCC_NPM-NEXT: br label [[WHILE_COND:%.*]]
; IS__CGSCC_NPM: while.cond:
; IS__CGSCC_NPM-NEXT: br label [[WHILE_BODY:%.*]]
; IS__CGSCC_NPM: while.body:
; IS__CGSCC_NPM-NEXT: br label [[WHILE_COND]]
; IS__CGSCC_NPM: for.inc:
; IS__CGSCC_NPM-NEXT: unreachable
; IS__CGSCC_NPM: for.end:
; IS__CGSCC_NPM-NEXT: ret i32 0
; ;
entry: entry:
br label %for.cond br label %for.cond
for.cond: ; preds = %for.inc, %entry for.cond: ; preds = %for.inc, %entry
%cmp = icmp sgt i32 %n, 0 %cmp = icmp sgt i32 %n, 0
br i1 %cmp, label %for.body, label %for.cond.cleanup br i1 %cmp, label %for.body, label %for.cond.cleanup
Show All 25 Lines
; while (n--) { ; while (n--) {
; ans++; ; ans++;
; } ; }
; } ; }
; return ans; ; return ans;
; } ; }
define i32 @bounded_nested_loops(i32 %n) { define i32 @bounded_nested_loops(i32 %n) {
; IS__TUNIT_OPM: Function Attrs: nofree nosync nounwind readnone ; IS________OPM: Function Attrs: nofree norecurse nosync nounwind readnone
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@bounded_nested_loops ; IS________OPM-LABEL: define {{[^@]+}}@bounded_nested_loops
; IS__TUNIT_OPM-SAME: (i32 [[N:%.*]]) #[[ATTR15]] { ; IS________OPM-SAME: (i32 [[N:%.*]]) #[[ATTR17]] {
; IS__TUNIT_OPM-NEXT: entry: ; IS________OPM-NEXT: entry:
; IS__TUNIT_OPM-NEXT: br label [[FOR_COND:%.*]] ; IS________OPM-NEXT: br label [[FOR_COND:%.*]]
; IS__TUNIT_OPM: for.cond: ; IS________OPM: for.cond:
; IS__TUNIT_OPM-NEXT: [[I_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INC1:%.*]], [[FOR_INC:%.*]] ] ; IS________OPM-NEXT: [[I_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INC1:%.*]], [[FOR_INC:%.*]] ]
; IS__TUNIT_OPM-NEXT: [[ANS_0:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[TMP:%.*]], [[FOR_INC]] ] ; IS________OPM-NEXT: [[ANS_0:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[TMP:%.*]], [[FOR_INC]] ]
; IS__TUNIT_OPM-NEXT: [[N_ADDR_0:%.*]] = phi i32 [ [[N]], [[ENTRY]] ], [ -1, [[FOR_INC]] ] ; IS________OPM-NEXT: [[N_ADDR_0:%.*]] = phi i32 [ [[N]], [[ENTRY]] ], [ -1, [[FOR_INC]] ]
; IS__TUNIT_OPM-NEXT: [[CMP:%.*]] = icmp slt i32 [[I_0]], [[N_ADDR_0]] ; IS________OPM-NEXT: [[CMP:%.*]] = icmp slt i32 [[I_0]], [[N_ADDR_0]]
; IS__TUNIT_OPM-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_COND_CLEANUP:%.*]] ; IS________OPM-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_COND_CLEANUP:%.*]]
; IS__TUNIT_OPM: for.cond.cleanup: ; IS________OPM: for.cond.cleanup:
; IS__TUNIT_OPM-NEXT: [[ANS_0_LCSSA:%.*]] = phi i32 [ [[ANS_0]], [[FOR_COND]] ] ; IS________OPM-NEXT: [[ANS_0_LCSSA:%.*]] = phi i32 [ [[ANS_0]], [[FOR_COND]] ]
; IS__TUNIT_OPM-NEXT: br label [[FOR_END:%.*]] ; IS________OPM-NEXT: br label [[FOR_END:%.*]]
; IS__TUNIT_OPM: for.body: ; IS________OPM: for.body:
; IS__TUNIT_OPM-NEXT: br label [[WHILE_COND:%.*]] ; IS________OPM-NEXT: br label [[WHILE_COND:%.*]]
; IS__TUNIT_OPM: while.cond: ; IS________OPM: while.cond:
; IS__TUNIT_OPM-NEXT: br i1 true, label [[WHILE_END:%.*]], label [[WHILE_BODY:%.*]] ; IS________OPM-NEXT: br i1 true, label [[WHILE_END:%.*]], label [[WHILE_BODY:%.*]]
; IS__TUNIT_OPM: while.body: ; IS________OPM: while.body:
; IS__TUNIT_OPM-NEXT: unreachable ; IS________OPM-NEXT: unreachable
; IS__TUNIT_OPM: while.end: ; IS________OPM: while.end:
; IS__TUNIT_OPM-NEXT: [[TMP]] = add i32 [[N_ADDR_0]], [[ANS_0]] ; IS________OPM-NEXT: [[TMP]] = add i32 [[N_ADDR_0]], [[ANS_0]]
; IS__TUNIT_OPM-NEXT: br label [[FOR_INC]] ; IS________OPM-NEXT: br label [[FOR_INC]]
; IS__TUNIT_OPM: for.inc: ; IS________OPM: for.inc:
; IS__TUNIT_OPM-NEXT: [[INC1]] = add nuw nsw i32 [[I_0]], 1 ; IS________OPM-NEXT: [[INC1]] = add nuw nsw i32 [[I_0]], 1
; IS__TUNIT_OPM-NEXT: br label [[FOR_COND]] ; IS________OPM-NEXT: br label [[FOR_COND]]
; IS__TUNIT_OPM: for.end: ; IS________OPM: for.end:
; IS__TUNIT_OPM-NEXT: ret i32 [[ANS_0_LCSSA]] ; IS________OPM-NEXT: ret i32 [[ANS_0_LCSSA]]
; ;
; IS__TUNIT_NPM: Function Attrs: nofree nosync nounwind readnone willreturn ; IS________NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@bounded_nested_loops ; IS________NPM-LABEL: define {{[^@]+}}@bounded_nested_loops
; IS__TUNIT_NPM-SAME: (i32 [[N:%.*]]) #[[ATTR17:[0-9]+]] { ; IS________NPM-SAME: (i32 [[N:%.*]]) #[[ATTR19:[0-9]+]] {
; IS__TUNIT_NPM-NEXT: entry: ; IS________NPM-NEXT: entry:
; IS__TUNIT_NPM-NEXT: br label [[FOR_COND:%.*]] ; IS________NPM-NEXT: br label [[FOR_COND:%.*]]
; IS__TUNIT_NPM: for.cond: ; IS________NPM: for.cond:
; IS__TUNIT_NPM-NEXT: [[I_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INC1:%.*]], [[FOR_INC:%.*]] ] ; IS________NPM-NEXT: [[I_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INC1:%.*]], [[FOR_INC:%.*]] ]
; IS__TUNIT_NPM-NEXT: [[ANS_0:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[TMP:%.*]], [[FOR_INC]] ] ; IS________NPM-NEXT: [[ANS_0:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[TMP:%.*]], [[FOR_INC]] ]
; IS__TUNIT_NPM-NEXT: [[N_ADDR_0:%.*]] = phi i32 [ [[N]], [[ENTRY]] ], [ -1, [[FOR_INC]] ] ; IS________NPM-NEXT: [[N_ADDR_0:%.*]] = phi i32 [ [[N]], [[ENTRY]] ], [ -1, [[FOR_INC]] ]
; IS__TUNIT_NPM-NEXT: [[CMP:%.*]] = icmp slt i32 [[I_0]], [[N_ADDR_0]] ; IS________NPM-NEXT: [[CMP:%.*]] = icmp slt i32 [[I_0]], [[N_ADDR_0]]
; IS__TUNIT_NPM-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_COND_CLEANUP:%.*]] ; IS________NPM-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_COND_CLEANUP:%.*]]
; IS__TUNIT_NPM: for.cond.cleanup: ; IS________NPM: for.cond.cleanup:
; IS__TUNIT_NPM-NEXT: [[ANS_0_LCSSA:%.*]] = phi i32 [ [[ANS_0]], [[FOR_COND]] ] ; IS________NPM-NEXT: [[ANS_0_LCSSA:%.*]] = phi i32 [ [[ANS_0]], [[FOR_COND]] ]
; IS__TUNIT_NPM-NEXT: br label [[FOR_END:%.*]] ; IS________NPM-NEXT: br label [[FOR_END:%.*]]
; IS__TUNIT_NPM: for.body: ; IS________NPM: for.body:
; IS__TUNIT_NPM-NEXT: br label [[WHILE_COND:%.*]] ; IS________NPM-NEXT: br label [[WHILE_COND:%.*]]
; IS__TUNIT_NPM: while.cond: ; IS________NPM: while.cond:
; IS__TUNIT_NPM-NEXT: br i1 true, label [[WHILE_END:%.*]], label [[WHILE_BODY:%.*]] ; IS________NPM-NEXT: br i1 true, label [[WHILE_END:%.*]], label [[WHILE_BODY:%.*]]
; IS__TUNIT_NPM: while.body: ; IS________NPM: while.body:
; IS__TUNIT_NPM-NEXT: unreachable ; IS________NPM-NEXT: unreachable
; IS__TUNIT_NPM: while.end: ; IS________NPM: while.end:
; IS__TUNIT_NPM-NEXT: [[TMP]] = add i32 [[N_ADDR_0]], [[ANS_0]] ; IS________NPM-NEXT: [[TMP]] = add i32 [[N_ADDR_0]], [[ANS_0]]
; IS__TUNIT_NPM-NEXT: br label [[FOR_INC]] ; IS________NPM-NEXT: br label [[FOR_INC]]
; IS__TUNIT_NPM: for.inc: ; IS________NPM: for.inc:
; IS__TUNIT_NPM-NEXT: [[INC1]] = add nuw nsw i32 [[I_0]], 1 ; IS________NPM-NEXT: [[INC1]] = add nuw nsw i32 [[I_0]], 1
; IS__TUNIT_NPM-NEXT: br label [[FOR_COND]] ; IS________NPM-NEXT: br label [[FOR_COND]]
; IS__TUNIT_NPM: for.end: ; IS________NPM: for.end:
; IS__TUNIT_NPM-NEXT: ret i32 [[ANS_0_LCSSA]] ; IS________NPM-NEXT: ret i32 [[ANS_0_LCSSA]]
;
; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readnone
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@bounded_nested_loops
; IS__CGSCC_OPM-SAME: (i32 [[N:%.*]]) #[[ATTR18]] {
; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: br label [[FOR_COND:%.*]]
; IS__CGSCC_OPM: for.cond:
; IS__CGSCC_OPM-NEXT: [[I_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INC1:%.*]], [[FOR_INC:%.*]] ]
; IS__CGSCC_OPM-NEXT: [[ANS_0:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[TMP:%.*]], [[FOR_INC]] ]
; IS__CGSCC_OPM-NEXT: [[N_ADDR_0:%.*]] = phi i32 [ [[N]], [[ENTRY]] ], [ -1, [[FOR_INC]] ]
; IS__CGSCC_OPM-NEXT: [[CMP:%.*]] = icmp slt i32 [[I_0]], [[N_ADDR_0]]
; IS__CGSCC_OPM-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_COND_CLEANUP:%.*]]
; IS__CGSCC_OPM: for.cond.cleanup:
; IS__CGSCC_OPM-NEXT: [[ANS_0_LCSSA:%.*]] = phi i32 [ [[ANS_0]], [[FOR_COND]] ]
; IS__CGSCC_OPM-NEXT: br label [[FOR_END:%.*]]
; IS__CGSCC_OPM: for.body:
; IS__CGSCC_OPM-NEXT: br label [[WHILE_COND:%.*]]
; IS__CGSCC_OPM: while.cond:
; IS__CGSCC_OPM-NEXT: br i1 true, label [[WHILE_END:%.*]], label [[WHILE_BODY:%.*]]
; IS__CGSCC_OPM: while.body:
; IS__CGSCC_OPM-NEXT: unreachable
; IS__CGSCC_OPM: while.end:
; IS__CGSCC_OPM-NEXT: [[TMP]] = add i32 [[N_ADDR_0]], [[ANS_0]]
; IS__CGSCC_OPM-NEXT: br label [[FOR_INC]]
; IS__CGSCC_OPM: for.inc:
; IS__CGSCC_OPM-NEXT: [[INC1]] = add nuw nsw i32 [[I_0]], 1
; IS__CGSCC_OPM-NEXT: br label [[FOR_COND]]
; IS__CGSCC_OPM: for.end:
; IS__CGSCC_OPM-NEXT: ret i32 [[ANS_0_LCSSA]]
;
; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@bounded_nested_loops
; IS__CGSCC_NPM-SAME: (i32 [[N:%.*]]) #[[ATTR20:[0-9]+]] {
; IS__CGSCC_NPM-NEXT: entry:
; IS__CGSCC_NPM-NEXT: br label [[FOR_COND:%.*]]
; IS__CGSCC_NPM: for.cond:
; IS__CGSCC_NPM-NEXT: [[I_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INC1:%.*]], [[FOR_INC:%.*]] ]
; IS__CGSCC_NPM-NEXT: [[ANS_0:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[TMP:%.*]], [[FOR_INC]] ]
; IS__CGSCC_NPM-NEXT: [[N_ADDR_0:%.*]] = phi i32 [ [[N]], [[ENTRY]] ], [ -1, [[FOR_INC]] ]
; IS__CGSCC_NPM-NEXT: [[CMP:%.*]] = icmp slt i32 [[I_0]], [[N_ADDR_0]]
; IS__CGSCC_NPM-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_COND_CLEANUP:%.*]]
; IS__CGSCC_NPM: for.cond.cleanup:
; IS__CGSCC_NPM-NEXT: [[ANS_0_LCSSA:%.*]] = phi i32 [ [[ANS_0]], [[FOR_COND]] ]
; IS__CGSCC_NPM-NEXT: br label [[FOR_END:%.*]]
; IS__CGSCC_NPM: for.body:
; IS__CGSCC_NPM-NEXT: br label [[WHILE_COND:%.*]]
; IS__CGSCC_NPM: while.cond:
; IS__CGSCC_NPM-NEXT: br i1 true, label [[WHILE_END:%.*]], label [[WHILE_BODY:%.*]]
; IS__CGSCC_NPM: while.body:
; IS__CGSCC_NPM-NEXT: unreachable
; IS__CGSCC_NPM: while.end:
; IS__CGSCC_NPM-NEXT: [[TMP]] = add i32 [[N_ADDR_0]], [[ANS_0]]
; IS__CGSCC_NPM-NEXT: br label [[FOR_INC]]
; IS__CGSCC_NPM: for.inc:
; IS__CGSCC_NPM-NEXT: [[INC1]] = add nuw nsw i32 [[I_0]], 1
; IS__CGSCC_NPM-NEXT: br label [[FOR_COND]]
; IS__CGSCC_NPM: for.end:
; IS__CGSCC_NPM-NEXT: ret i32 [[ANS_0_LCSSA]]
; ;
entry: entry:
br label %for.cond br label %for.cond
for.cond: ; preds = %for.inc, %entry for.cond: ; preds = %for.inc, %entry
%i.0 = phi i32 [ 0, %entry ], [ %inc1, %for.inc ] %i.0 = phi i32 [ 0, %entry ], [ %inc1, %for.inc ]
%ans.0 = phi i32 [ 0, %entry ], [ %tmp, %for.inc ] %ans.0 = phi i32 [ 0, %entry ], [ %tmp, %for.inc ]
%n.addr.0 = phi i32 [ %n, %entry ], [ -1, %for.inc ] %n.addr.0 = phi i32 [ %n, %entry ], [ -1, %for.inc ]
Show All 33 Lines
; for (int i = 0; i < n; i++) { ; for (int i = 0; i < n; i++) {
; ans++; ; ans++;
; } ; }
; } ; }
; return ans; ; return ans;
; } ; }
define i32 @bounded_loop_inside_unbounded_loop(i32 %n) { define i32 @bounded_loop_inside_unbounded_loop(i32 %n) {
; IS__TUNIT_OPM: Function Attrs: nofree nosync nounwind readnone ; IS________OPM: Function Attrs: nofree norecurse nosync nounwind readnone
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@bounded_loop_inside_unbounded_loop ; IS________OPM-LABEL: define {{[^@]+}}@bounded_loop_inside_unbounded_loop
; IS__TUNIT_OPM-SAME: (i32 [[N:%.*]]) #[[ATTR15]] { ; IS________OPM-SAME: (i32 [[N:%.*]]) #[[ATTR17]] {
; IS__TUNIT_OPM-NEXT: entry: ; IS________OPM-NEXT: entry:
; IS__TUNIT_OPM-NEXT: br label [[WHILE_COND:%.*]] ; IS________OPM-NEXT: br label [[WHILE_COND:%.*]]
; IS__TUNIT_OPM: while.cond: ; IS________OPM: while.cond:
; IS__TUNIT_OPM-NEXT: [[ANS_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[TMP2:%.*]], [[FOR_END:%.*]] ] ; IS________OPM-NEXT: [[ANS_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[TMP2:%.*]], [[FOR_END:%.*]] ]
; IS__TUNIT_OPM-NEXT: [[N_ADDR_0:%.*]] = phi i32 [ [[N]], [[ENTRY]] ], [ [[INC:%.*]], [[FOR_END]] ] ; IS________OPM-NEXT: [[N_ADDR_0:%.*]] = phi i32 [ [[N]], [[ENTRY]] ], [ [[INC:%.*]], [[FOR_END]] ]
; IS__TUNIT_OPM-NEXT: [[TMP:%.*]] = icmp sgt i32 [[N_ADDR_0]], -1 ; IS________OPM-NEXT: [[TMP:%.*]] = icmp sgt i32 [[N_ADDR_0]], -1
; IS__TUNIT_OPM-NEXT: [[SMAX:%.*]] = select i1 [[TMP]], i32 [[N_ADDR_0]], i32 -1 ; IS________OPM-NEXT: [[SMAX:%.*]] = select i1 [[TMP]], i32 [[N_ADDR_0]], i32 -1
; IS__TUNIT_OPM-NEXT: [[INC]] = add nsw i32 [[N_ADDR_0]], 1 ; IS________OPM-NEXT: [[INC]] = add nsw i32 [[N_ADDR_0]], 1
; IS__TUNIT_OPM-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[N_ADDR_0]], 0 ; IS________OPM-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[N_ADDR_0]], 0
; IS__TUNIT_OPM-NEXT: br i1 [[TOBOOL]], label [[WHILE_END:%.*]], label [[WHILE_BODY:%.*]] ; IS________OPM-NEXT: br i1 [[TOBOOL]], label [[WHILE_END:%.*]], label [[WHILE_BODY:%.*]]
; IS__TUNIT_OPM: while.body: ; IS________OPM: while.body:
; IS__TUNIT_OPM-NEXT: [[TMP1:%.*]] = add i32 [[ANS_0]], 1 ; IS________OPM-NEXT: [[TMP1:%.*]] = add i32 [[ANS_0]], 1
; IS__TUNIT_OPM-NEXT: br label [[FOR_COND:%.*]] ; IS________OPM-NEXT: br label [[FOR_COND:%.*]]
; IS__TUNIT_OPM: for.cond: ; IS________OPM: for.cond:
; IS__TUNIT_OPM-NEXT: br i1 true, label [[FOR_COND_CLEANUP:%.*]], label [[FOR_BODY:%.*]] ; IS________OPM-NEXT: br i1 true, label [[FOR_COND_CLEANUP:%.*]], label [[FOR_BODY:%.*]]
; IS__TUNIT_OPM: for.cond.cleanup: ; IS________OPM: for.cond.cleanup:
; IS__TUNIT_OPM-NEXT: [[TMP2]] = add i32 [[TMP1]], [[SMAX]] ; IS________OPM-NEXT: [[TMP2]] = add i32 [[TMP1]], [[SMAX]]
; IS__TUNIT_OPM-NEXT: br label [[FOR_END]] ; IS________OPM-NEXT: br label [[FOR_END]]
; IS__TUNIT_OPM: for.body: ; IS________OPM: for.body:
; IS__TUNIT_OPM-NEXT: unreachable ; IS________OPM-NEXT: unreachable
; IS__TUNIT_OPM: for.inc: ; IS________OPM: for.inc:
; IS__TUNIT_OPM-NEXT: unreachable ; IS________OPM-NEXT: unreachable
; IS__TUNIT_OPM: for.end: ; IS________OPM: for.end:
; IS__TUNIT_OPM-NEXT: br label [[WHILE_COND]] ; IS________OPM-NEXT: br label [[WHILE_COND]]
; IS__TUNIT_OPM: while.end: ; IS________OPM: while.end:
; IS__TUNIT_OPM-NEXT: [[ANS_0_LCSSA:%.*]] = phi i32 [ [[ANS_0]], [[WHILE_COND]] ] ; IS________OPM-NEXT: [[ANS_0_LCSSA:%.*]] = phi i32 [ [[ANS_0]], [[WHILE_COND]] ]
; IS__TUNIT_OPM-NEXT: ret i32 [[ANS_0_LCSSA]] ; IS________OPM-NEXT: ret i32 [[ANS_0_LCSSA]]
; ;
; IS__TUNIT_NPM: Function Attrs: nofree nosync nounwind readnone ; IS________NPM: Function Attrs: nofree norecurse nosync nounwind readnone
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@bounded_loop_inside_unbounded_loop ; IS________NPM-LABEL: define {{[^@]+}}@bounded_loop_inside_unbounded_loop
; IS__TUNIT_NPM-SAME: (i32 [[N:%.*]]) #[[ATTR16]] { ; IS________NPM-SAME: (i32 [[N:%.*]]) #[[ATTR18]] {
; IS__TUNIT_NPM-NEXT: entry: ; IS________NPM-NEXT: entry:
; IS__TUNIT_NPM-NEXT: br label [[WHILE_COND:%.*]] ; IS________NPM-NEXT: br label [[WHILE_COND:%.*]]
; IS__TUNIT_NPM: while.cond: ; IS________NPM: while.cond:
; IS__TUNIT_NPM-NEXT: [[ANS_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[TMP2:%.*]], [[FOR_END:%.*]] ] ; IS________NPM-NEXT: [[ANS_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[TMP2:%.*]], [[FOR_END:%.*]] ]
; IS__TUNIT_NPM-NEXT: [[N_ADDR_0:%.*]] = phi i32 [ [[N]], [[ENTRY]] ], [ [[INC:%.*]], [[FOR_END]] ] ; IS________NPM-NEXT: [[N_ADDR_0:%.*]] = phi i32 [ [[N]], [[ENTRY]] ], [ [[INC:%.*]], [[FOR_END]] ]
; IS__TUNIT_NPM-NEXT: [[TMP:%.*]] = icmp sgt i32 [[N_ADDR_0]], -1 ; IS________NPM-NEXT: [[TMP:%.*]] = icmp sgt i32 [[N_ADDR_0]], -1
; IS__TUNIT_NPM-NEXT: [[SMAX:%.*]] = select i1 [[TMP]], i32 [[N_ADDR_0]], i32 -1 ; IS________NPM-NEXT: [[SMAX:%.*]] = select i1 [[TMP]], i32 [[N_ADDR_0]], i32 -1
; IS__TUNIT_NPM-NEXT: [[INC]] = add nsw i32 [[N_ADDR_0]], 1 ; IS________NPM-NEXT: [[INC]] = add nsw i32 [[N_ADDR_0]], 1
; IS__TUNIT_NPM-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[N_ADDR_0]], 0 ; IS________NPM-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[N_ADDR_0]], 0
; IS__TUNIT_NPM-NEXT: br i1 [[TOBOOL]], label [[WHILE_END:%.*]], label [[WHILE_BODY:%.*]] ; IS________NPM-NEXT: br i1 [[TOBOOL]], label [[WHILE_END:%.*]], label [[WHILE_BODY:%.*]]
; IS__TUNIT_NPM: while.body: ; IS________NPM: while.body:
; IS__TUNIT_NPM-NEXT: [[TMP1:%.*]] = add i32 [[ANS_0]], 1 ; IS________NPM-NEXT: [[TMP1:%.*]] = add i32 [[ANS_0]], 1
; IS__TUNIT_NPM-NEXT: br label [[FOR_COND:%.*]] ; IS________NPM-NEXT: br label [[FOR_COND:%.*]]
; IS__TUNIT_NPM: for.cond: ; IS________NPM: for.cond:
; IS__TUNIT_NPM-NEXT: br i1 true, label [[FOR_COND_CLEANUP:%.*]], label [[FOR_BODY:%.*]] ; IS________NPM-NEXT: br i1 true, label [[FOR_COND_CLEANUP:%.*]], label [[FOR_BODY:%.*]]
; IS__TUNIT_NPM: for.cond.cleanup: ; IS________NPM: for.cond.cleanup:
; IS__TUNIT_NPM-NEXT: [[TMP2]] = add i32 [[TMP1]], [[SMAX]] ; IS________NPM-NEXT: [[TMP2]] = add i32 [[TMP1]], [[SMAX]]
; IS__TUNIT_NPM-NEXT: br label [[FOR_END]] ; IS________NPM-NEXT: br label [[FOR_END]]
; IS__TUNIT_NPM: for.body: ; IS________NPM: for.body:
; IS__TUNIT_NPM-NEXT: unreachable ; IS________NPM-NEXT: unreachable
; IS__TUNIT_NPM: for.inc: ; IS________NPM: for.inc:
; IS__TUNIT_NPM-NEXT: unreachable ; IS________NPM-NEXT: unreachable
; IS__TUNIT_NPM: for.end: ; IS________NPM: for.end:
; IS__TUNIT_NPM-NEXT: br label [[WHILE_COND]] ; IS________NPM-NEXT: br label [[WHILE_COND]]
; IS__TUNIT_NPM: while.end: ; IS________NPM: while.end:
; IS__TUNIT_NPM-NEXT: [[ANS_0_LCSSA:%.*]] = phi i32 [ [[ANS_0]], [[WHILE_COND]] ] ; IS________NPM-NEXT: [[ANS_0_LCSSA:%.*]] = phi i32 [ [[ANS_0]], [[WHILE_COND]] ]
; IS__TUNIT_NPM-NEXT: ret i32 [[ANS_0_LCSSA]] ; IS________NPM-NEXT: ret i32 [[ANS_0_LCSSA]]
;
; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readnone
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@bounded_loop_inside_unbounded_loop
; IS__CGSCC_OPM-SAME: (i32 [[N:%.*]]) #[[ATTR18]] {
; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: br label [[WHILE_COND:%.*]]
; IS__CGSCC_OPM: while.cond:
; IS__CGSCC_OPM-NEXT: [[ANS_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[TMP2:%.*]], [[FOR_END:%.*]] ]
; IS__CGSCC_OPM-NEXT: [[N_ADDR_0:%.*]] = phi i32 [ [[N]], [[ENTRY]] ], [ [[INC:%.*]], [[FOR_END]] ]
; IS__CGSCC_OPM-NEXT: [[TMP:%.*]] = icmp sgt i32 [[N_ADDR_0]], -1
; IS__CGSCC_OPM-NEXT: [[SMAX:%.*]] = select i1 [[TMP]], i32 [[N_ADDR_0]], i32 -1
; IS__CGSCC_OPM-NEXT: [[INC]] = add nsw i32 [[N_ADDR_0]], 1
; IS__CGSCC_OPM-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[N_ADDR_0]], 0
; IS__CGSCC_OPM-NEXT: br i1 [[TOBOOL]], label [[WHILE_END:%.*]], label [[WHILE_BODY:%.*]]
; IS__CGSCC_OPM: while.body:
; IS__CGSCC_OPM-NEXT: [[TMP1:%.*]] = add i32 [[ANS_0]], 1
; IS__CGSCC_OPM-NEXT: br label [[FOR_COND:%.*]]
; IS__CGSCC_OPM: for.cond:
; IS__CGSCC_OPM-NEXT: br i1 true, label [[FOR_COND_CLEANUP:%.*]], label [[FOR_BODY:%.*]]
; IS__CGSCC_OPM: for.cond.cleanup:
; IS__CGSCC_OPM-NEXT: [[TMP2]] = add i32 [[TMP1]], [[SMAX]]
; IS__CGSCC_OPM-NEXT: br label [[FOR_END]]
; IS__CGSCC_OPM: for.body:
; IS__CGSCC_OPM-NEXT: unreachable
; IS__CGSCC_OPM: for.inc:
; IS__CGSCC_OPM-NEXT: unreachable
; IS__CGSCC_OPM: for.end:
; IS__CGSCC_OPM-NEXT: br label [[WHILE_COND]]
; IS__CGSCC_OPM: while.end:
; IS__CGSCC_OPM-NEXT: [[ANS_0_LCSSA:%.*]] = phi i32 [ [[ANS_0]], [[WHILE_COND]] ]
; IS__CGSCC_OPM-NEXT: ret i32 [[ANS_0_LCSSA]]
;
; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@bounded_loop_inside_unbounded_loop
; IS__CGSCC_NPM-SAME: (i32 [[N:%.*]]) #[[ATTR19]] {
; IS__CGSCC_NPM-NEXT: entry:
; IS__CGSCC_NPM-NEXT: br label [[WHILE_COND:%.*]]
; IS__CGSCC_NPM: while.cond:
; IS__CGSCC_NPM-NEXT: [[ANS_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[TMP2:%.*]], [[FOR_END:%.*]] ]
; IS__CGSCC_NPM-NEXT: [[N_ADDR_0:%.*]] = phi i32 [ [[N]], [[ENTRY]] ], [ [[INC:%.*]], [[FOR_END]] ]
; IS__CGSCC_NPM-NEXT: [[TMP:%.*]] = icmp sgt i32 [[N_ADDR_0]], -1
; IS__CGSCC_NPM-NEXT: [[SMAX:%.*]] = select i1 [[TMP]], i32 [[N_ADDR_0]], i32 -1
; IS__CGSCC_NPM-NEXT: [[INC]] = add nsw i32 [[N_ADDR_0]], 1
; IS__CGSCC_NPM-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[N_ADDR_0]], 0
; IS__CGSCC_NPM-NEXT: br i1 [[TOBOOL]], label [[WHILE_END:%.*]], label [[WHILE_BODY:%.*]]
; IS__CGSCC_NPM: while.body:
; IS__CGSCC_NPM-NEXT: [[TMP1:%.*]] = add i32 [[ANS_0]], 1
; IS__CGSCC_NPM-NEXT: br label [[FOR_COND:%.*]]
; IS__CGSCC_NPM: for.cond:
; IS__CGSCC_NPM-NEXT: br i1 true, label [[FOR_COND_CLEANUP:%.*]], label [[FOR_BODY:%.*]]
; IS__CGSCC_NPM: for.cond.cleanup:
; IS__CGSCC_NPM-NEXT: [[TMP2]] = add i32 [[TMP1]], [[SMAX]]
; IS__CGSCC_NPM-NEXT: br label [[FOR_END]]
; IS__CGSCC_NPM: for.body:
; IS__CGSCC_NPM-NEXT: unreachable
; IS__CGSCC_NPM: for.inc:
; IS__CGSCC_NPM-NEXT: unreachable
; IS__CGSCC_NPM: for.end:
; IS__CGSCC_NPM-NEXT: br label [[WHILE_COND]]
; IS__CGSCC_NPM: while.end:
; IS__CGSCC_NPM-NEXT: [[ANS_0_LCSSA:%.*]] = phi i32 [ [[ANS_0]], [[WHILE_COND]] ]
; IS__CGSCC_NPM-NEXT: ret i32 [[ANS_0_LCSSA]]
; ;
entry: entry:
br label %while.cond br label %while.cond
while.cond: ; preds = %for.end, %entry while.cond: ; preds = %for.end, %entry
%ans.0 = phi i32 [ 0, %entry ], [ %tmp2, %for.end ] %ans.0 = phi i32 [ 0, %entry ], [ %tmp2, %for.end ]
%n.addr.0 = phi i32 [ %n, %entry ], [ %inc, %for.end ] %n.addr.0 = phi i32 [ %n, %entry ], [ %inc, %for.end ]
%tmp = icmp sgt i32 %n.addr.0, -1 %tmp = icmp sgt i32 %n.addr.0, -1
Show All 38 Lines
; while (n--) { ; while (n--) {
; ans++; ; ans++;
; } ; }
; } ; }
; return ans; ; return ans;
; } ; }
define i32 @nested_unbounded_loops(i32 %n) { define i32 @nested_unbounded_loops(i32 %n) {
; IS__TUNIT_OPM: Function Attrs: nofree nosync nounwind readnone ; IS________OPM: Function Attrs: nofree norecurse nosync nounwind readnone
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@nested_unbounded_loops ; IS________OPM-LABEL: define {{[^@]+}}@nested_unbounded_loops
; IS__TUNIT_OPM-SAME: (i32 [[N:%.*]]) #[[ATTR15]] { ; IS________OPM-SAME: (i32 [[N:%.*]]) #[[ATTR17]] {
; IS__TUNIT_OPM-NEXT: entry: ; IS________OPM-NEXT: entry:
; IS__TUNIT_OPM-NEXT: br label [[WHILE_COND:%.*]] ; IS________OPM-NEXT: br label [[WHILE_COND:%.*]]
; IS__TUNIT_OPM: while.cond: ; IS________OPM: while.cond:
; IS__TUNIT_OPM-NEXT: [[ANS_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[TMP1:%.*]], [[WHILE_END10:%.*]] ] ; IS________OPM-NEXT: [[ANS_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[TMP1:%.*]], [[WHILE_END10:%.*]] ]
; IS__TUNIT_OPM-NEXT: [[N_ADDR_0:%.*]] = phi i32 [ [[N]], [[ENTRY]] ], [ -1, [[WHILE_END10]] ] ; IS________OPM-NEXT: [[N_ADDR_0:%.*]] = phi i32 [ [[N]], [[ENTRY]] ], [ -1, [[WHILE_END10]] ]
; IS__TUNIT_OPM-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[N_ADDR_0]], 0 ; IS________OPM-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[N_ADDR_0]], 0
; IS__TUNIT_OPM-NEXT: br i1 [[TOBOOL]], label [[WHILE_END11:%.*]], label [[WHILE_BODY:%.*]] ; IS________OPM-NEXT: br i1 [[TOBOOL]], label [[WHILE_END11:%.*]], label [[WHILE_BODY:%.*]]
; IS__TUNIT_OPM: while.body: ; IS________OPM: while.body:
; IS__TUNIT_OPM-NEXT: br label [[WHILE_COND1:%.*]] ; IS________OPM-NEXT: br label [[WHILE_COND1:%.*]]
; IS__TUNIT_OPM: while.cond1: ; IS________OPM: while.cond1:
; IS__TUNIT_OPM-NEXT: br i1 true, label [[WHILE_END:%.*]], label [[WHILE_BODY4:%.*]] ; IS________OPM-NEXT: br i1 true, label [[WHILE_END:%.*]], label [[WHILE_BODY4:%.*]]
; IS__TUNIT_OPM: while.body4: ; IS________OPM: while.body4:
; IS__TUNIT_OPM-NEXT: unreachable ; IS________OPM-NEXT: unreachable
; IS__TUNIT_OPM: while.end: ; IS________OPM: while.end:
; IS__TUNIT_OPM-NEXT: [[TMP:%.*]] = add i32 [[N_ADDR_0]], -2 ; IS________OPM-NEXT: [[TMP:%.*]] = add i32 [[N_ADDR_0]], -2
; IS__TUNIT_OPM-NEXT: br label [[WHILE_COND5:%.*]] ; IS________OPM-NEXT: br label [[WHILE_COND5:%.*]]
; IS__TUNIT_OPM: while.cond5: ; IS________OPM: while.cond5:
; IS__TUNIT_OPM-NEXT: br i1 true, label [[WHILE_END10]], label [[WHILE_BODY8:%.*]] ; IS________OPM-NEXT: br i1 true, label [[WHILE_END10]], label [[WHILE_BODY8:%.*]]
; IS__TUNIT_OPM: while.body8: ; IS________OPM: while.body8:
; IS__TUNIT_OPM-NEXT: unreachable ; IS________OPM-NEXT: unreachable
; IS__TUNIT_OPM: while.end10: ; IS________OPM: while.end10:
; IS__TUNIT_OPM-NEXT: [[TMP1]] = add i32 [[TMP]], [[ANS_0]] ; IS________OPM-NEXT: [[TMP1]] = add i32 [[TMP]], [[ANS_0]]
; IS__TUNIT_OPM-NEXT: br label [[WHILE_COND]] ; IS________OPM-NEXT: br label [[WHILE_COND]]
; IS__TUNIT_OPM: while.end11: ; IS________OPM: while.end11:
; IS__TUNIT_OPM-NEXT: [[ANS_0_LCSSA:%.*]] = phi i32 [ [[ANS_0]], [[WHILE_COND]] ] ; IS________OPM-NEXT: [[ANS_0_LCSSA:%.*]] = phi i32 [ [[ANS_0]], [[WHILE_COND]] ]
; IS__TUNIT_OPM-NEXT: ret i32 [[ANS_0_LCSSA]] ; IS________OPM-NEXT: ret i32 [[ANS_0_LCSSA]]
; ;
; IS__TUNIT_NPM: Function Attrs: nofree nosync nounwind readnone ; IS________NPM: Function Attrs: nofree norecurse nosync nounwind readnone
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@nested_unbounded_loops ; IS________NPM-LABEL: define {{[^@]+}}@nested_unbounded_loops
; IS__TUNIT_NPM-SAME: (i32 [[N:%.*]]) #[[ATTR16]] { ; IS________NPM-SAME: (i32 [[N:%.*]]) #[[ATTR18]] {
; IS__TUNIT_NPM-NEXT: entry: ; IS________NPM-NEXT: entry:
; IS__TUNIT_NPM-NEXT: br label [[WHILE_COND:%.*]] ; IS________NPM-NEXT: br label [[WHILE_COND:%.*]]
; IS__TUNIT_NPM: while.cond: ; IS________NPM: while.cond:
; IS__TUNIT_NPM-NEXT: [[ANS_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[TMP1:%.*]], [[WHILE_END10:%.*]] ] ; IS________NPM-NEXT: [[ANS_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[TMP1:%.*]], [[WHILE_END10:%.*]] ]
; IS__TUNIT_NPM-NEXT: [[N_ADDR_0:%.*]] = phi i32 [ [[N]], [[ENTRY]] ], [ -1, [[WHILE_END10]] ] ; IS________NPM-NEXT: [[N_ADDR_0:%.*]] = phi i32 [ [[N]], [[ENTRY]] ], [ -1, [[WHILE_END10]] ]
; IS__TUNIT_NPM-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[N_ADDR_0]], 0 ; IS________NPM-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[N_ADDR_0]], 0
; IS__TUNIT_NPM-NEXT: br i1 [[TOBOOL]], label [[WHILE_END11:%.*]], label [[WHILE_BODY:%.*]] ; IS________NPM-NEXT: br i1 [[TOBOOL]], label [[WHILE_END11:%.*]], label [[WHILE_BODY:%.*]]
; IS__TUNIT_NPM: while.body: ; IS________NPM: while.body:
; IS__TUNIT_NPM-NEXT: br label [[WHILE_COND1:%.*]] ; IS________NPM-NEXT: br label [[WHILE_COND1:%.*]]
; IS__TUNIT_NPM: while.cond1: ; IS________NPM: while.cond1:
; IS__TUNIT_NPM-NEXT: br i1 true, label [[WHILE_END:%.*]], label [[WHILE_BODY4:%.*]] ; IS________NPM-NEXT: br i1 true, label [[WHILE_END:%.*]], label [[WHILE_BODY4:%.*]]
; IS__TUNIT_NPM: while.body4: ; IS________NPM: while.body4:
; IS__TUNIT_NPM-NEXT: unreachable ; IS________NPM-NEXT: unreachable
; IS__TUNIT_NPM: while.end: ; IS________NPM: while.end:
; IS__TUNIT_NPM-NEXT: [[TMP:%.*]] = add i32 [[N_ADDR_0]], -2 ; IS________NPM-NEXT: [[TMP:%.*]] = add i32 [[N_ADDR_0]], -2
; IS__TUNIT_NPM-NEXT: br label [[WHILE_COND5:%.*]] ; IS________NPM-NEXT: br label [[WHILE_COND5:%.*]]
; IS__TUNIT_NPM: while.cond5: ; IS________NPM: while.cond5:
; IS__TUNIT_NPM-NEXT: br i1 true, label [[WHILE_END10]], label [[WHILE_BODY8:%.*]] ; IS________NPM-NEXT: br i1 true, label [[WHILE_END10]], label [[WHILE_BODY8:%.*]]
; IS__TUNIT_NPM: while.body8: ; IS________NPM: while.body8:
; IS__TUNIT_NPM-NEXT: unreachable ; IS________NPM-NEXT: unreachable
; IS__TUNIT_NPM: while.end10: ; IS________NPM: while.end10:
; IS__TUNIT_NPM-NEXT: [[TMP1]] = add i32 [[TMP]], [[ANS_0]] ; IS________NPM-NEXT: [[TMP1]] = add i32 [[TMP]], [[ANS_0]]
; IS__TUNIT_NPM-NEXT: br label [[WHILE_COND]] ; IS________NPM-NEXT: br label [[WHILE_COND]]
; IS__TUNIT_NPM: while.end11: ; IS________NPM: while.end11:
; IS__TUNIT_NPM-NEXT: [[ANS_0_LCSSA:%.*]] = phi i32 [ [[ANS_0]], [[WHILE_COND]] ] ; IS________NPM-NEXT: [[ANS_0_LCSSA:%.*]] = phi i32 [ [[ANS_0]], [[WHILE_COND]] ]
; IS__TUNIT_NPM-NEXT: ret i32 [[ANS_0_LCSSA]] ; IS________NPM-NEXT: ret i32 [[ANS_0_LCSSA]]
;
; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readnone
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@nested_unbounded_loops
; IS__CGSCC_OPM-SAME: (i32 [[N:%.*]]) #[[ATTR18]] {
; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: br label [[WHILE_COND:%.*]]
; IS__CGSCC_OPM: while.cond:
; IS__CGSCC_OPM-NEXT: [[ANS_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[TMP1:%.*]], [[WHILE_END10:%.*]] ]
; IS__CGSCC_OPM-NEXT: [[N_ADDR_0:%.*]] = phi i32 [ [[N]], [[ENTRY]] ], [ -1, [[WHILE_END10]] ]
; IS__CGSCC_OPM-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[N_ADDR_0]], 0
; IS__CGSCC_OPM-NEXT: br i1 [[TOBOOL]], label [[WHILE_END11:%.*]], label [[WHILE_BODY:%.*]]
; IS__CGSCC_OPM: while.body:
; IS__CGSCC_OPM-NEXT: br label [[WHILE_COND1:%.*]]
; IS__CGSCC_OPM: while.cond1:
; IS__CGSCC_OPM-NEXT: br i1 true, label [[WHILE_END:%.*]], label [[WHILE_BODY4:%.*]]
; IS__CGSCC_OPM: while.body4:
; IS__CGSCC_OPM-NEXT: unreachable
; IS__CGSCC_OPM: while.end:
; IS__CGSCC_OPM-NEXT: [[TMP:%.*]] = add i32 [[N_ADDR_0]], -2
; IS__CGSCC_OPM-NEXT: br label [[WHILE_COND5:%.*]]
; IS__CGSCC_OPM: while.cond5:
; IS__CGSCC_OPM-NEXT: br i1 true, label [[WHILE_END10]], label [[WHILE_BODY8:%.*]]
; IS__CGSCC_OPM: while.body8:
; IS__CGSCC_OPM-NEXT: unreachable
; IS__CGSCC_OPM: while.end10:
; IS__CGSCC_OPM-NEXT: [[TMP1]] = add i32 [[TMP]], [[ANS_0]]
; IS__CGSCC_OPM-NEXT: br label [[WHILE_COND]]
; IS__CGSCC_OPM: while.end11:
; IS__CGSCC_OPM-NEXT: [[ANS_0_LCSSA:%.*]] = phi i32 [ [[ANS_0]], [[WHILE_COND]] ]
; IS__CGSCC_OPM-NEXT: ret i32 [[ANS_0_LCSSA]]
;
; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@nested_unbounded_loops
; IS__CGSCC_NPM-SAME: (i32 [[N:%.*]]) #[[ATTR19]] {
; IS__CGSCC_NPM-NEXT: entry:
; IS__CGSCC_NPM-NEXT: br label [[WHILE_COND:%.*]]
; IS__CGSCC_NPM: while.cond:
; IS__CGSCC_NPM-NEXT: [[ANS_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[TMP1:%.*]], [[WHILE_END10:%.*]] ]
; IS__CGSCC_NPM-NEXT: [[N_ADDR_0:%.*]] = phi i32 [ [[N]], [[ENTRY]] ], [ -1, [[WHILE_END10]] ]
; IS__CGSCC_NPM-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[N_ADDR_0]], 0
; IS__CGSCC_NPM-NEXT: br i1 [[TOBOOL]], label [[WHILE_END11:%.*]], label [[WHILE_BODY:%.*]]
; IS__CGSCC_NPM: while.body:
; IS__CGSCC_NPM-NEXT: br label [[WHILE_COND1:%.*]]
; IS__CGSCC_NPM: while.cond1:
; IS__CGSCC_NPM-NEXT: br i1 true, label [[WHILE_END:%.*]], label [[WHILE_BODY4:%.*]]
; IS__CGSCC_NPM: while.body4:
; IS__CGSCC_NPM-NEXT: unreachable
; IS__CGSCC_NPM: while.end:
; IS__CGSCC_NPM-NEXT: [[TMP:%.*]] = add i32 [[N_ADDR_0]], -2
; IS__CGSCC_NPM-NEXT: br label [[WHILE_COND5:%.*]]
; IS__CGSCC_NPM: while.cond5:
; IS__CGSCC_NPM-NEXT: br i1 true, label [[WHILE_END10]], label [[WHILE_BODY8:%.*]]
; IS__CGSCC_NPM: while.body8:
; IS__CGSCC_NPM-NEXT: unreachable
; IS__CGSCC_NPM: while.end10:
; IS__CGSCC_NPM-NEXT: [[TMP1]] = add i32 [[TMP]], [[ANS_0]]
; IS__CGSCC_NPM-NEXT: br label [[WHILE_COND]]
; IS__CGSCC_NPM: while.end11:
; IS__CGSCC_NPM-NEXT: [[ANS_0_LCSSA:%.*]] = phi i32 [ [[ANS_0]], [[WHILE_COND]] ]
; IS__CGSCC_NPM-NEXT: ret i32 [[ANS_0_LCSSA]]
; ;
entry: entry:
br label %while.cond br label %while.cond
while.cond: ; preds = %while.end10, %entry while.cond: ; preds = %while.end10, %entry
%ans.0 = phi i32 [ 0, %entry ], [ %tmp1, %while.end10 ] %ans.0 = phi i32 [ 0, %entry ], [ %tmp1, %while.end10 ]
%n.addr.0 = phi i32 [ %n, %entry ], [ -1, %while.end10 ] %n.addr.0 = phi i32 [ %n, %entry ], [ -1, %while.end10 ]
%tobool = icmp eq i32 %n.addr.0, 0 %tobool = icmp eq i32 %n.addr.0, 0
▲ Show 20 Lines • Show All 45 Lines • ▼ Show 20 Lines
; goto exit; ; goto exit;
; else ; else
; goto entry1; ; goto entry1;
; exit: ; exit:
; return; ; return;
; } ; }
define void @non_loop_cycle(i32 %n) { define void @non_loop_cycle(i32 %n) {
; IS__TUNIT_OPM: Function Attrs: nofree nosync nounwind readnone ; IS__TUNIT_OPM: Function Attrs: nofree norecurse nosync nounwind readnone
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@non_loop_cycle ; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@non_loop_cycle
; IS__TUNIT_OPM-SAME: (i32 [[N:%.*]]) #[[ATTR15]] { ; IS__TUNIT_OPM-SAME: (i32 [[N:%.*]]) #[[ATTR17]] {
; IS__TUNIT_OPM-NEXT: entry: ; IS__TUNIT_OPM-NEXT: entry:
; IS__TUNIT_OPM-NEXT: [[CALL:%.*]] = call i32 @fact_loop(i32 [[N]]) #[[ATTR15]] ; IS__TUNIT_OPM-NEXT: [[CALL:%.*]] = call i32 @fact_loop(i32 [[N]]) #[[ATTR25]]
; IS__TUNIT_OPM-NEXT: [[CMP:%.*]] = icmp sgt i32 [[CALL]], 5 ; IS__TUNIT_OPM-NEXT: [[CMP:%.*]] = icmp sgt i32 [[CALL]], 5
; IS__TUNIT_OPM-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]] ; IS__TUNIT_OPM-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]]
; IS__TUNIT_OPM: if.then: ; IS__TUNIT_OPM: if.then:
; IS__TUNIT_OPM-NEXT: br label [[ENTRY1:%.*]] ; IS__TUNIT_OPM-NEXT: br label [[ENTRY1:%.*]]
; IS__TUNIT_OPM: if.else: ; IS__TUNIT_OPM: if.else:
; IS__TUNIT_OPM-NEXT: br label [[ENTRY2:%.*]] ; IS__TUNIT_OPM-NEXT: br label [[ENTRY2:%.*]]
; IS__TUNIT_OPM: entry1: ; IS__TUNIT_OPM: entry1:
; IS__TUNIT_OPM-NEXT: [[CALL1:%.*]] = call i32 @fact_loop(i32 [[N]]) #[[ATTR15]] ; IS__TUNIT_OPM-NEXT: [[CALL1:%.*]] = call i32 @fact_loop(i32 [[N]]) #[[ATTR25]]
; IS__TUNIT_OPM-NEXT: [[CMP2:%.*]] = icmp sgt i32 [[CALL1]], 5 ; IS__TUNIT_OPM-NEXT: [[CMP2:%.*]] = icmp sgt i32 [[CALL1]], 5
; IS__TUNIT_OPM-NEXT: br i1 [[CMP2]], label [[IF_THEN3:%.*]], label [[IF_ELSE4:%.*]] ; IS__TUNIT_OPM-NEXT: br i1 [[CMP2]], label [[IF_THEN3:%.*]], label [[IF_ELSE4:%.*]]
; IS__TUNIT_OPM: if.then3: ; IS__TUNIT_OPM: if.then3:
; IS__TUNIT_OPM-NEXT: br label [[EXIT:%.*]] ; IS__TUNIT_OPM-NEXT: br label [[EXIT:%.*]]
; IS__TUNIT_OPM: if.else4: ; IS__TUNIT_OPM: if.else4:
; IS__TUNIT_OPM-NEXT: br label [[ENTRY2]] ; IS__TUNIT_OPM-NEXT: br label [[ENTRY2]]
; IS__TUNIT_OPM: entry2: ; IS__TUNIT_OPM: entry2:
; IS__TUNIT_OPM-NEXT: [[CALL5:%.*]] = call i32 @fact_loop(i32 [[N]]) #[[ATTR15]] ; IS__TUNIT_OPM-NEXT: [[CALL5:%.*]] = call i32 @fact_loop(i32 [[N]]) #[[ATTR25]]
; IS__TUNIT_OPM-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[CALL5]], 5 ; IS__TUNIT_OPM-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[CALL5]], 5
; IS__TUNIT_OPM-NEXT: br i1 [[CMP6]], label [[IF_THEN7:%.*]], label [[IF_ELSE8:%.*]] ; IS__TUNIT_OPM-NEXT: br i1 [[CMP6]], label [[IF_THEN7:%.*]], label [[IF_ELSE8:%.*]]
; IS__TUNIT_OPM: if.then7: ; IS__TUNIT_OPM: if.then7:
; IS__TUNIT_OPM-NEXT: br label [[EXIT]] ; IS__TUNIT_OPM-NEXT: br label [[EXIT]]
; IS__TUNIT_OPM: if.else8: ; IS__TUNIT_OPM: if.else8:
; IS__TUNIT_OPM-NEXT: br label [[ENTRY1]] ; IS__TUNIT_OPM-NEXT: br label [[ENTRY1]]
; IS__TUNIT_OPM: exit: ; IS__TUNIT_OPM: exit:
; IS__TUNIT_OPM-NEXT: ret void ; IS__TUNIT_OPM-NEXT: ret void
; ;
; IS__TUNIT_NPM: Function Attrs: nofree nosync nounwind readnone ; IS__TUNIT_NPM: Function Attrs: nofree norecurse nosync nounwind readnone
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@non_loop_cycle ; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@non_loop_cycle
; IS__TUNIT_NPM-SAME: (i32 [[N:%.*]]) #[[ATTR16]] { ; IS__TUNIT_NPM-SAME: (i32 [[N:%.*]]) #[[ATTR18]] {
; IS__TUNIT_NPM-NEXT: entry: ; IS__TUNIT_NPM-NEXT: entry:
; IS__TUNIT_NPM-NEXT: [[CALL:%.*]] = call i32 @fact_loop(i32 [[N]]) #[[ATTR16]] ; IS__TUNIT_NPM-NEXT: [[CALL:%.*]] = call i32 @fact_loop(i32 [[N]]) #[[ATTR27]]
; IS__TUNIT_NPM-NEXT: [[CMP:%.*]] = icmp sgt i32 [[CALL]], 5 ; IS__TUNIT_NPM-NEXT: [[CMP:%.*]] = icmp sgt i32 [[CALL]], 5
; IS__TUNIT_NPM-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]] ; IS__TUNIT_NPM-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]]
; IS__TUNIT_NPM: if.then: ; IS__TUNIT_NPM: if.then:
; IS__TUNIT_NPM-NEXT: br label [[ENTRY1:%.*]] ; IS__TUNIT_NPM-NEXT: br label [[ENTRY1:%.*]]
; IS__TUNIT_NPM: if.else: ; IS__TUNIT_NPM: if.else:
; IS__TUNIT_NPM-NEXT: br label [[ENTRY2:%.*]] ; IS__TUNIT_NPM-NEXT: br label [[ENTRY2:%.*]]
; IS__TUNIT_NPM: entry1: ; IS__TUNIT_NPM: entry1:
; IS__TUNIT_NPM-NEXT: [[CALL1:%.*]] = call i32 @fact_loop(i32 [[N]]) #[[ATTR16]] ; IS__TUNIT_NPM-NEXT: [[CALL1:%.*]] = call i32 @fact_loop(i32 [[N]]) #[[ATTR27]]
; IS__TUNIT_NPM-NEXT: [[CMP2:%.*]] = icmp sgt i32 [[CALL1]], 5 ; IS__TUNIT_NPM-NEXT: [[CMP2:%.*]] = icmp sgt i32 [[CALL1]], 5
; IS__TUNIT_NPM-NEXT: br i1 [[CMP2]], label [[IF_THEN3:%.*]], label [[IF_ELSE4:%.*]] ; IS__TUNIT_NPM-NEXT: br i1 [[CMP2]], label [[IF_THEN3:%.*]], label [[IF_ELSE4:%.*]]
; IS__TUNIT_NPM: if.then3: ; IS__TUNIT_NPM: if.then3:
; IS__TUNIT_NPM-NEXT: br label [[EXIT:%.*]] ; IS__TUNIT_NPM-NEXT: br label [[EXIT:%.*]]
; IS__TUNIT_NPM: if.else4: ; IS__TUNIT_NPM: if.else4:
; IS__TUNIT_NPM-NEXT: br label [[ENTRY2]] ; IS__TUNIT_NPM-NEXT: br label [[ENTRY2]]
; IS__TUNIT_NPM: entry2: ; IS__TUNIT_NPM: entry2:
; IS__TUNIT_NPM-NEXT: [[CALL5:%.*]] = call i32 @fact_loop(i32 [[N]]) #[[ATTR16]] ; IS__TUNIT_NPM-NEXT: [[CALL5:%.*]] = call i32 @fact_loop(i32 [[N]]) #[[ATTR27]]
; IS__TUNIT_NPM-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[CALL5]], 5 ; IS__TUNIT_NPM-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[CALL5]], 5
; IS__TUNIT_NPM-NEXT: br i1 [[CMP6]], label [[IF_THEN7:%.*]], label [[IF_ELSE8:%.*]] ; IS__TUNIT_NPM-NEXT: br i1 [[CMP6]], label [[IF_THEN7:%.*]], label [[IF_ELSE8:%.*]]
; IS__TUNIT_NPM: if.then7: ; IS__TUNIT_NPM: if.then7:
; IS__TUNIT_NPM-NEXT: br label [[EXIT]] ; IS__TUNIT_NPM-NEXT: br label [[EXIT]]
; IS__TUNIT_NPM: if.else8: ; IS__TUNIT_NPM: if.else8:
; IS__TUNIT_NPM-NEXT: br label [[ENTRY1]] ; IS__TUNIT_NPM-NEXT: br label [[ENTRY1]]
; IS__TUNIT_NPM: exit: ; IS__TUNIT_NPM: exit:
; IS__TUNIT_NPM-NEXT: ret void ; IS__TUNIT_NPM-NEXT: ret void
; ;
; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readnone ; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readnone
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@non_loop_cycle ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@non_loop_cycle
; IS__CGSCC_OPM-SAME: (i32 [[N:%.*]]) #[[ATTR18]] { ; IS__CGSCC_OPM-SAME: (i32 [[N:%.*]]) #[[ATTR17]] {
; IS__CGSCC_OPM-NEXT: entry: ; IS__CGSCC_OPM-NEXT: entry:
; IS__CGSCC_OPM-NEXT: [[CALL:%.*]] = call i32 @fact_loop(i32 [[N]]) #[[ATTR31:[0-9]+]] ; IS__CGSCC_OPM-NEXT: [[CALL:%.*]] = call i32 @fact_loop(i32 [[N]]) #[[ATTR30:[0-9]+]]
; IS__CGSCC_OPM-NEXT: [[CMP:%.*]] = icmp sgt i32 [[CALL]], 5 ; IS__CGSCC_OPM-NEXT: [[CMP:%.*]] = icmp sgt i32 [[CALL]], 5
; IS__CGSCC_OPM-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]] ; IS__CGSCC_OPM-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]]
; IS__CGSCC_OPM: if.then: ; IS__CGSCC_OPM: if.then:
; IS__CGSCC_OPM-NEXT: br label [[ENTRY1:%.*]] ; IS__CGSCC_OPM-NEXT: br label [[ENTRY1:%.*]]
; IS__CGSCC_OPM: if.else: ; IS__CGSCC_OPM: if.else:
; IS__CGSCC_OPM-NEXT: br label [[ENTRY2:%.*]] ; IS__CGSCC_OPM-NEXT: br label [[ENTRY2:%.*]]
; IS__CGSCC_OPM: entry1: ; IS__CGSCC_OPM: entry1:
; IS__CGSCC_OPM-NEXT: [[CALL1:%.*]] = call i32 @fact_loop(i32 [[N]]) #[[ATTR31]] ; IS__CGSCC_OPM-NEXT: [[CALL1:%.*]] = call i32 @fact_loop(i32 [[N]]) #[[ATTR30]]
; IS__CGSCC_OPM-NEXT: [[CMP2:%.*]] = icmp sgt i32 [[CALL1]], 5 ; IS__CGSCC_OPM-NEXT: [[CMP2:%.*]] = icmp sgt i32 [[CALL1]], 5
; IS__CGSCC_OPM-NEXT: br i1 [[CMP2]], label [[IF_THEN3:%.*]], label [[IF_ELSE4:%.*]] ; IS__CGSCC_OPM-NEXT: br i1 [[CMP2]], label [[IF_THEN3:%.*]], label [[IF_ELSE4:%.*]]
; IS__CGSCC_OPM: if.then3: ; IS__CGSCC_OPM: if.then3:
; IS__CGSCC_OPM-NEXT: br label [[EXIT:%.*]] ; IS__CGSCC_OPM-NEXT: br label [[EXIT:%.*]]
; IS__CGSCC_OPM: if.else4: ; IS__CGSCC_OPM: if.else4:
; IS__CGSCC_OPM-NEXT: br label [[ENTRY2]] ; IS__CGSCC_OPM-NEXT: br label [[ENTRY2]]
; IS__CGSCC_OPM: entry2: ; IS__CGSCC_OPM: entry2:
; IS__CGSCC_OPM-NEXT: [[CALL5:%.*]] = call i32 @fact_loop(i32 [[N]]) #[[ATTR31]] ; IS__CGSCC_OPM-NEXT: [[CALL5:%.*]] = call i32 @fact_loop(i32 [[N]]) #[[ATTR30]]
; IS__CGSCC_OPM-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[CALL5]], 5 ; IS__CGSCC_OPM-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[CALL5]], 5
; IS__CGSCC_OPM-NEXT: br i1 [[CMP6]], label [[IF_THEN7:%.*]], label [[IF_ELSE8:%.*]] ; IS__CGSCC_OPM-NEXT: br i1 [[CMP6]], label [[IF_THEN7:%.*]], label [[IF_ELSE8:%.*]]
; IS__CGSCC_OPM: if.then7: ; IS__CGSCC_OPM: if.then7:
; IS__CGSCC_OPM-NEXT: br label [[EXIT]] ; IS__CGSCC_OPM-NEXT: br label [[EXIT]]
; IS__CGSCC_OPM: if.else8: ; IS__CGSCC_OPM: if.else8:
; IS__CGSCC_OPM-NEXT: br label [[ENTRY1]] ; IS__CGSCC_OPM-NEXT: br label [[ENTRY1]]
; IS__CGSCC_OPM: exit: ; IS__CGSCC_OPM: exit:
; IS__CGSCC_OPM-NEXT: ret void ; IS__CGSCC_OPM-NEXT: ret void
; ;
; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone ; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@non_loop_cycle ; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@non_loop_cycle
; IS__CGSCC_NPM-SAME: (i32 [[N:%.*]]) #[[ATTR19]] { ; IS__CGSCC_NPM-SAME: (i32 [[N:%.*]]) #[[ATTR18]] {
; IS__CGSCC_NPM-NEXT: entry: ; IS__CGSCC_NPM-NEXT: entry:
; IS__CGSCC_NPM-NEXT: [[CALL:%.*]] = call i32 @fact_loop(i32 [[N]]) ; IS__CGSCC_NPM-NEXT: [[CALL:%.*]] = call i32 @fact_loop(i32 [[N]])
; IS__CGSCC_NPM-NEXT: [[CMP:%.*]] = icmp sgt i32 [[CALL]], 5 ; IS__CGSCC_NPM-NEXT: [[CMP:%.*]] = icmp sgt i32 [[CALL]], 5
; IS__CGSCC_NPM-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]] ; IS__CGSCC_NPM-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]]
; IS__CGSCC_NPM: if.then: ; IS__CGSCC_NPM: if.then:
; IS__CGSCC_NPM-NEXT: br label [[ENTRY1:%.*]] ; IS__CGSCC_NPM-NEXT: br label [[ENTRY1:%.*]]
; IS__CGSCC_NPM: if.else: ; IS__CGSCC_NPM: if.else:
; IS__CGSCC_NPM-NEXT: br label [[ENTRY2:%.*]] ; IS__CGSCC_NPM-NEXT: br label [[ENTRY2:%.*]]
▲ Show 20 Lines • Show All 55 Lines • ▼ Show 20 Lines
declare void @unknown() declare void @unknown()
declare void @readonly() readonly declare void @readonly() readonly
declare void @readnone() readnone declare void @readnone() readnone
declare void @unknown_mustprogress() mustprogress declare void @unknown_mustprogress() mustprogress
declare void @readonly_mustprogress() readonly mustprogress declare void @readonly_mustprogress() readonly mustprogress
define void @willreturn_mustprogress_caller_1() mustprogress { define void @willreturn_mustprogress_caller_1() mustprogress {
; IS__TUNIT_OPM: Function Attrs: mustprogress ; IS________OPM: Function Attrs: mustprogress
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@willreturn_mustprogress_caller_1 ; IS________OPM-LABEL: define {{[^@]+}}@willreturn_mustprogress_caller_1
; IS__TUNIT_OPM-SAME: () #[[ATTR18:[0-9]+]] { ; IS________OPM-SAME: () #[[ATTR20:[0-9]+]] {
; IS__TUNIT_OPM-NEXT: call void @unknown() ; IS________OPM-NEXT: call void @unknown()
; IS__TUNIT_OPM-NEXT: ret void ; IS________OPM-NEXT: ret void
; ;
; IS__TUNIT_NPM: Function Attrs: mustprogress ; IS________NPM: Function Attrs: mustprogress
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@willreturn_mustprogress_caller_1 ; IS________NPM-LABEL: define {{[^@]+}}@willreturn_mustprogress_caller_1
; IS__TUNIT_NPM-SAME: () #[[ATTR20:[0-9]+]] { ; IS________NPM-SAME: () #[[ATTR22:[0-9]+]] {
; IS__TUNIT_NPM-NEXT: call void @unknown() ; IS________NPM-NEXT: call void @unknown()
; IS__TUNIT_NPM-NEXT: ret void ; IS________NPM-NEXT: ret void
;
; IS__CGSCC_OPM: Function Attrs: mustprogress
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@willreturn_mustprogress_caller_1
; IS__CGSCC_OPM-SAME: () #[[ATTR21:[0-9]+]] {
; IS__CGSCC_OPM-NEXT: call void @unknown()
; IS__CGSCC_OPM-NEXT: ret void
;
; IS__CGSCC_NPM: Function Attrs: mustprogress
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@willreturn_mustprogress_caller_1
; IS__CGSCC_NPM-SAME: () #[[ATTR23:[0-9]+]] {
; IS__CGSCC_NPM-NEXT: call void @unknown()
; IS__CGSCC_NPM-NEXT: ret void
; ;
call void @unknown() call void @unknown()
ret void ret void
} }
define void @willreturn_mustprogress_caller_2() mustprogress { define void @willreturn_mustprogress_caller_2() mustprogress {
; IS__TUNIT_OPM: Function Attrs: mustprogress readonly willreturn ; IS________OPM: Function Attrs: mustprogress readonly willreturn
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@willreturn_mustprogress_caller_2 ; IS________OPM-LABEL: define {{[^@]+}}@willreturn_mustprogress_caller_2
; IS__TUNIT_OPM-SAME: () #[[ATTR20:[0-9]+]] { ; IS________OPM-SAME: () #[[ATTR22:[0-9]+]] {
; IS__TUNIT_OPM-NEXT: call void @readonly() #[[ATTR16:[0-9]+]] ; IS________OPM-NEXT: call void @readonly() #[[ATTR18:[0-9]+]]
; IS__TUNIT_OPM-NEXT: ret void ; IS________OPM-NEXT: ret void
; ;
; IS__TUNIT_NPM: Function Attrs: mustprogress readonly willreturn ; IS________NPM: Function Attrs: mustprogress readonly willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@willreturn_mustprogress_caller_2 ; IS________NPM-LABEL: define {{[^@]+}}@willreturn_mustprogress_caller_2
; IS__TUNIT_NPM-SAME: () #[[ATTR22:[0-9]+]] { ; IS________NPM-SAME: () #[[ATTR24:[0-9]+]] {
; IS__TUNIT_NPM-NEXT: call void @readonly() #[[ATTR18:[0-9]+]] ; IS________NPM-NEXT: call void @readonly() #[[ATTR20:[0-9]+]]
; IS__TUNIT_NPM-NEXT: ret void ; IS________NPM-NEXT: ret void
;
; IS__CGSCC_OPM: Function Attrs: mustprogress readonly willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@willreturn_mustprogress_caller_2
; IS__CGSCC_OPM-SAME: () #[[ATTR23:[0-9]+]] {
; IS__CGSCC_OPM-NEXT: call void @readonly() #[[ATTR19:[0-9]+]]
; IS__CGSCC_OPM-NEXT: ret void
;
; IS__CGSCC_NPM: Function Attrs: mustprogress readonly willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@willreturn_mustprogress_caller_2
; IS__CGSCC_NPM-SAME: () #[[ATTR25:[0-9]+]] {
; IS__CGSCC_NPM-NEXT: call void @readonly() #[[ATTR21:[0-9]+]]
; IS__CGSCC_NPM-NEXT: ret void
; ;
call void @readonly() call void @readonly()
ret void ret void
} }
define void @willreturn_mustprogress_caller_3() mustprogress { define void @willreturn_mustprogress_caller_3() mustprogress {
; IS__TUNIT_OPM: Function Attrs: mustprogress nosync readnone willreturn ; IS________OPM: Function Attrs: mustprogress nosync readnone willreturn
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@willreturn_mustprogress_caller_3 ; IS________OPM-LABEL: define {{[^@]+}}@willreturn_mustprogress_caller_3
; IS__TUNIT_OPM-SAME: () #[[ATTR21:[0-9]+]] { ; IS________OPM-SAME: () #[[ATTR23:[0-9]+]] {
; IS__TUNIT_OPM-NEXT: call void @readnone() ; IS________OPM-NEXT: call void @readnone()
; IS__TUNIT_OPM-NEXT: ret void ; IS________OPM-NEXT: ret void
; ;
; IS__TUNIT_NPM: Function Attrs: mustprogress nosync readnone willreturn ; IS________NPM: Function Attrs: mustprogress nosync readnone willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@willreturn_mustprogress_caller_3 ; IS________NPM-LABEL: define {{[^@]+}}@willreturn_mustprogress_caller_3
; IS__TUNIT_NPM-SAME: () #[[ATTR23:[0-9]+]] { ; IS________NPM-SAME: () #[[ATTR25:[0-9]+]] {
; IS__TUNIT_NPM-NEXT: call void @readnone() ; IS________NPM-NEXT: call void @readnone()
; IS__TUNIT_NPM-NEXT: ret void ; IS________NPM-NEXT: ret void
;
; IS__CGSCC_OPM: Function Attrs: mustprogress nosync readnone willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@willreturn_mustprogress_caller_3
; IS__CGSCC_OPM-SAME: () #[[ATTR24:[0-9]+]] {
; IS__CGSCC_OPM-NEXT: call void @readnone()
; IS__CGSCC_OPM-NEXT: ret void
;
; IS__CGSCC_NPM: Function Attrs: mustprogress nosync readnone willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@willreturn_mustprogress_caller_3
; IS__CGSCC_NPM-SAME: () #[[ATTR26:[0-9]+]] {
; IS__CGSCC_NPM-NEXT: call void @readnone()
; IS__CGSCC_NPM-NEXT: ret void
; ;
call void @readnone() call void @readnone()
ret void ret void
} }
define void @willreturn_mustprogress_callee_1() { define void @willreturn_mustprogress_callee_1() {
; CHECK-LABEL: define {{[^@]+}}@willreturn_mustprogress_callee_1() { ; CHECK-LABEL: define {{[^@]+}}@willreturn_mustprogress_callee_1() {
; CHECK-NEXT: call void @unknown_mustprogress() ; CHECK-NEXT: call void @unknown_mustprogress()
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
call void @unknown_mustprogress() call void @unknown_mustprogress()
ret void ret void
} }
define void @willreturn_mustprogress_callee_2() { define void @willreturn_mustprogress_callee_2() {
; IS__TUNIT_OPM: Function Attrs: readonly willreturn ; IS________OPM: Function Attrs: readonly willreturn
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@willreturn_mustprogress_callee_2 ; IS________OPM-LABEL: define {{[^@]+}}@willreturn_mustprogress_callee_2
; IS__TUNIT_OPM-SAME: () #[[ATTR22:[0-9]+]] { ; IS________OPM-SAME: () #[[ATTR24:[0-9]+]] {
; IS__TUNIT_OPM-NEXT: call void @readonly_mustprogress() #[[ATTR22]] ; IS________OPM-NEXT: call void @readonly_mustprogress() #[[ATTR24]]
; IS__TUNIT_OPM-NEXT: ret void ; IS________OPM-NEXT: ret void
; ;
; IS__TUNIT_NPM: Function Attrs: readonly willreturn ; IS________NPM: Function Attrs: readonly willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@willreturn_mustprogress_callee_2 ; IS________NPM-LABEL: define {{[^@]+}}@willreturn_mustprogress_callee_2
; IS__TUNIT_NPM-SAME: () #[[ATTR24:[0-9]+]] { ; IS________NPM-SAME: () #[[ATTR26:[0-9]+]] {
; IS__TUNIT_NPM-NEXT: call void @readonly_mustprogress() #[[ATTR24]] ; IS________NPM-NEXT: call void @readonly_mustprogress() #[[ATTR26]]
; IS__TUNIT_NPM-NEXT: ret void ; IS________NPM-NEXT: ret void
;
; IS__CGSCC_OPM: Function Attrs: readonly willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@willreturn_mustprogress_callee_2
; IS__CGSCC_OPM-SAME: () #[[ATTR25:[0-9]+]] {
; IS__CGSCC_OPM-NEXT: call void @readonly_mustprogress() #[[ATTR25]]
; IS__CGSCC_OPM-NEXT: ret void
;
; IS__CGSCC_NPM: Function Attrs: readonly willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@willreturn_mustprogress_callee_2
; IS__CGSCC_NPM-SAME: () #[[ATTR27:[0-9]+]] {
; IS__CGSCC_NPM-NEXT: call void @readonly_mustprogress() #[[ATTR27]]
; IS__CGSCC_NPM-NEXT: ret void
; ;
call void @readonly_mustprogress() call void @readonly_mustprogress()
ret void ret void
} }
define void @willreturn_mustprogress_callee_3() { define void @willreturn_mustprogress_callee_3() {
; CHECK-LABEL: define {{[^@]+}}@willreturn_mustprogress_callee_3() { ; CHECK-LABEL: define {{[^@]+}}@willreturn_mustprogress_callee_3() {
; CHECK-NEXT: call void @willreturn_mustprogress_callee_1() ; CHECK-NEXT: call void @willreturn_mustprogress_callee_1()
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
call void @willreturn_mustprogress_callee_1() call void @willreturn_mustprogress_callee_1()
ret void ret void
} }
define void @willreturn_mustprogress_callee_4() { define void @willreturn_mustprogress_callee_4() {
; IS__TUNIT_OPM: Function Attrs: readonly willreturn ; IS________OPM: Function Attrs: readonly willreturn
; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@willreturn_mustprogress_callee_4 ; IS________OPM-LABEL: define {{[^@]+}}@willreturn_mustprogress_callee_4
; IS__TUNIT_OPM-SAME: () #[[ATTR22]] { ; IS________OPM-SAME: () #[[ATTR24]] {
; IS__TUNIT_OPM-NEXT: call void @willreturn_mustprogress_callee_2() #[[ATTR22]] ; IS________OPM-NEXT: call void @willreturn_mustprogress_callee_2() #[[ATTR24]]
; IS__TUNIT_OPM-NEXT: ret void ; IS________OPM-NEXT: ret void
; ;
; IS__TUNIT_NPM: Function Attrs: readonly willreturn ; IS________NPM: Function Attrs: readonly willreturn
; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@willreturn_mustprogress_callee_4 ; IS________NPM-LABEL: define {{[^@]+}}@willreturn_mustprogress_callee_4
; IS__TUNIT_NPM-SAME: () #[[ATTR24]] { ; IS________NPM-SAME: () #[[ATTR26]] {
; IS__TUNIT_NPM-NEXT: call void @willreturn_mustprogress_callee_2() #[[ATTR24]] ; IS________NPM-NEXT: call void @willreturn_mustprogress_callee_2() #[[ATTR26]]
; IS__TUNIT_NPM-NEXT: ret void ; IS________NPM-NEXT: ret void
;
; IS__CGSCC_OPM: Function Attrs: readonly willreturn
; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@willreturn_mustprogress_callee_4
; IS__CGSCC_OPM-SAME: () #[[ATTR25]] {
; IS__CGSCC_OPM-NEXT: call void @willreturn_mustprogress_callee_2() #[[ATTR25]]
; IS__CGSCC_OPM-NEXT: ret void
;
; IS__CGSCC_NPM: Function Attrs: readonly willreturn
; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@willreturn_mustprogress_callee_4
; IS__CGSCC_NPM-SAME: () #[[ATTR27]] {
; IS__CGSCC_NPM-NEXT: call void @willreturn_mustprogress_callee_2() #[[ATTR27]]
; IS__CGSCC_NPM-NEXT: ret void
; ;
call void @willreturn_mustprogress_callee_2() call void @willreturn_mustprogress_callee_2()
ret void ret void
} }
attributes #0 = { nounwind uwtable noinline } attributes #0 = { nounwind uwtable noinline }
attributes #1 = { uwtable noinline } attributes #1 = { uwtable noinline }
;. ;.
; IS__TUNIT_OPM: attributes #[[ATTR0]] = { nofree noinline nosync nounwind readnone uwtable willreturn } ; IS__TUNIT_OPM: attributes #[[ATTR0]] = { nofree noinline norecurse nosync nounwind readnone uwtable willreturn }
; IS__TUNIT_OPM: attributes #[[ATTR1]] = { nofree noinline nosync nounwind readnone uwtable } ; IS__TUNIT_OPM: attributes #[[ATTR1]] = { nofree noinline nosync nounwind readnone uwtable }
; IS__TUNIT_OPM: attributes #[[ATTR2:[0-9]+]] = { nofree nosync nounwind willreturn } ; IS__TUNIT_OPM: attributes #[[ATTR2]] = { nofree noinline norecurse nosync nounwind readnone uwtable }
; IS__TUNIT_OPM: attributes #[[ATTR3]] = { nofree noinline nosync nounwind uwtable } ; IS__TUNIT_OPM: attributes #[[ATTR3:[0-9]+]] = { nofree nosync nounwind willreturn }
; IS__TUNIT_OPM: attributes #[[ATTR4]] = { noreturn } ; IS__TUNIT_OPM: attributes #[[ATTR4]] = { nofree noinline nosync nounwind uwtable }
; IS__TUNIT_OPM: attributes #[[ATTR5]] = { noinline noreturn nounwind uwtable } ; IS__TUNIT_OPM: attributes #[[ATTR5]] = { noreturn }
; IS__TUNIT_OPM: attributes #[[ATTR6]] = { noinline nounwind uwtable } ; IS__TUNIT_OPM: attributes #[[ATTR6]] = { noinline noreturn nounwind uwtable }
; IS__TUNIT_OPM: attributes #[[ATTR7:[0-9]+]] = { nofree nosync nounwind readnone speculatable willreturn } ; IS__TUNIT_OPM: attributes #[[ATTR7]] = { noinline nounwind uwtable }
; IS__TUNIT_OPM: attributes #[[ATTR8:[0-9]+]] = { norecurse willreturn } ; IS__TUNIT_OPM: attributes #[[ATTR8:[0-9]+]] = { nofree nosync nounwind readnone speculatable willreturn }
; IS__TUNIT_OPM: attributes #[[ATTR9]] = { noinline nounwind uwtable willreturn } ; IS__TUNIT_OPM: attributes #[[ATTR9]] = { nofree noinline nosync nounwind readnone uwtable willreturn }
; IS__TUNIT_OPM: attributes #[[ATTR10:[0-9]+]] = { noinline uwtable willreturn } ; IS__TUNIT_OPM: attributes #[[ATTR10:[0-9]+]] = { norecurse willreturn }
; IS__TUNIT_OPM: attributes #[[ATTR11]] = { nounwind willreturn } ; IS__TUNIT_OPM: attributes #[[ATTR11]] = { noinline nounwind uwtable willreturn }
; IS__TUNIT_OPM: attributes #[[ATTR12]] = { argmemonly nofree noinline nosync nounwind readonly uwtable } ; IS__TUNIT_OPM: attributes #[[ATTR12:[0-9]+]] = { noinline uwtable willreturn }
; IS__TUNIT_OPM: attributes #[[ATTR13]] = { nofree noinline noreturn nosync nounwind readnone uwtable } ; IS__TUNIT_OPM: attributes #[[ATTR13]] = { nounwind willreturn }
; IS__TUNIT_OPM: attributes #[[ATTR14:[0-9]+]] = { noreturn nounwind } ; IS__TUNIT_OPM: attributes #[[ATTR14]] = { argmemonly nofree noinline norecurse nosync nounwind readonly uwtable }
; IS__TUNIT_OPM: attributes #[[ATTR15]] = { nofree nosync nounwind readnone } ; IS__TUNIT_OPM: attributes #[[ATTR15]] = { nofree noinline norecurse noreturn nosync nounwind readnone uwtable }
; IS__TUNIT_OPM: attributes #[[ATTR16]] = { readonly } ; IS__TUNIT_OPM: attributes #[[ATTR16:[0-9]+]] = { noreturn nounwind }
; IS__TUNIT_OPM: attributes #[[ATTR17:[0-9]+]] = { readnone } ; IS__TUNIT_OPM: attributes #[[ATTR17]] = { nofree norecurse nosync nounwind readnone }
; IS__TUNIT_OPM: attributes #[[ATTR18]] = { mustprogress } ; IS__TUNIT_OPM: attributes #[[ATTR18]] = { readonly }
; IS__TUNIT_OPM: attributes #[[ATTR19:[0-9]+]] = { mustprogress readonly } ; IS__TUNIT_OPM: attributes #[[ATTR19:[0-9]+]] = { readnone }
; IS__TUNIT_OPM: attributes #[[ATTR20]] = { mustprogress readonly willreturn } ; IS__TUNIT_OPM: attributes #[[ATTR20]] = { mustprogress }
; IS__TUNIT_OPM: attributes #[[ATTR21]] = { mustprogress nosync readnone willreturn } ; IS__TUNIT_OPM: attributes #[[ATTR21:[0-9]+]] = { mustprogress readonly }
; IS__TUNIT_OPM: attributes #[[ATTR22]] = { readonly willreturn } ; IS__TUNIT_OPM: attributes #[[ATTR22]] = { mustprogress readonly willreturn }
; IS__TUNIT_OPM: attributes #[[ATTR23]] = { nofree nosync nounwind } ; IS__TUNIT_OPM: attributes #[[ATTR23]] = { mustprogress nosync readnone willreturn }
; IS__TUNIT_OPM: attributes #[[ATTR24]] = { readnone willreturn } ; IS__TUNIT_OPM: attributes #[[ATTR24]] = { readonly willreturn }
; IS__TUNIT_OPM: attributes #[[ATTR25]] = { nounwind } ; IS__TUNIT_OPM: attributes #[[ATTR25]] = { nofree nosync nounwind readnone }
; IS__TUNIT_OPM: attributes #[[ATTR26]] = { willreturn } ; IS__TUNIT_OPM: attributes #[[ATTR26]] = { nofree nosync nounwind }
; IS__TUNIT_OPM: attributes #[[ATTR27]] = { readnone willreturn }
; IS__TUNIT_OPM: attributes #[[ATTR28]] = { nounwind }
; IS__TUNIT_OPM: attributes #[[ATTR29]] = { willreturn }
;. ;.
; IS__TUNIT_NPM: attributes #[[ATTR0]] = { nofree noinline nosync nounwind readnone uwtable willreturn } ; IS________NPM: attributes #[[ATTR0]] = { nofree noinline norecurse nosync nounwind readnone uwtable willreturn }
; IS__TUNIT_NPM: attributes #[[ATTR1]] = { nofree noinline nosync nounwind readnone uwtable } ; IS________NPM: attributes #[[ATTR1]] = { nofree noinline nosync nounwind readnone uwtable }
; IS__TUNIT_NPM: attributes #[[ATTR2:[0-9]+]] = { nofree nosync nounwind willreturn } ; IS________NPM: attributes #[[ATTR2]] = { nofree noinline norecurse nosync nounwind readnone uwtable }
; IS__TUNIT_NPM: attributes #[[ATTR3]] = { nofree noinline nosync nounwind uwtable } ; IS________NPM: attributes #[[ATTR3:[0-9]+]] = { nofree nosync nounwind willreturn }
; IS__TUNIT_NPM: attributes #[[ATTR4]] = { noreturn } ; IS________NPM: attributes #[[ATTR4]] = { nofree noinline nosync nounwind uwtable }
; IS__TUNIT_NPM: attributes #[[ATTR5]] = { noinline noreturn nounwind uwtable } ; IS________NPM: attributes #[[ATTR5]] = { noreturn }
; IS__TUNIT_NPM: attributes #[[ATTR6]] = { noinline nounwind uwtable } ; IS________NPM: attributes #[[ATTR6]] = { noinline noreturn nounwind uwtable }
; IS__TUNIT_NPM: attributes #[[ATTR7:[0-9]+]] = { nofree nosync nounwind readnone speculatable willreturn } ; IS________NPM: attributes #[[ATTR7]] = { noinline nounwind uwtable }
; IS__TUNIT_NPM: attributes #[[ATTR8:[0-9]+]] = { norecurse willreturn } ; IS________NPM: attributes #[[ATTR8:[0-9]+]] = { nofree nosync nounwind readnone speculatable willreturn }
; IS__TUNIT_NPM: attributes #[[ATTR9]] = { noinline nounwind uwtable willreturn } ; IS________NPM: attributes #[[ATTR9]] = { nofree noinline nosync nounwind readnone uwtable willreturn }
; IS__TUNIT_NPM: attributes #[[ATTR10:[0-9]+]] = { noinline uwtable willreturn } ; IS________NPM: attributes #[[ATTR10:[0-9]+]] = { norecurse willreturn }
; IS__TUNIT_NPM: attributes #[[ATTR11]] = { nounwind willreturn } ; IS________NPM: attributes #[[ATTR11]] = { noinline nounwind uwtable willreturn }
; IS__TUNIT_NPM: attributes #[[ATTR12]] = { argmemonly nofree noinline nosync nounwind readonly uwtable willreturn } ; IS________NPM: attributes #[[ATTR12:[0-9]+]] = { noinline uwtable willreturn }
; IS__TUNIT_NPM: attributes #[[ATTR13]] = { argmemonly nofree noinline nosync nounwind readonly uwtable } ; IS________NPM: attributes #[[ATTR13]] = { nounwind willreturn }
; IS__TUNIT_NPM: attributes #[[ATTR14]] = { nofree noinline noreturn nosync nounwind readnone uwtable } ; IS________NPM: attributes #[[ATTR14]] = { argmemonly nofree noinline norecurse nosync nounwind readonly uwtable willreturn }
; IS__TUNIT_NPM: attributes #[[ATTR15:[0-9]+]] = { noreturn nounwind } ; IS________NPM: attributes #[[ATTR15]] = { argmemonly nofree noinline norecurse nosync nounwind readonly uwtable }
; IS__TUNIT_NPM: attributes #[[ATTR16]] = { nofree nosync nounwind readnone } ; IS________NPM: attributes #[[ATTR16]] = { nofree noinline norecurse noreturn nosync nounwind readnone uwtable }
; IS__TUNIT_NPM: attributes #[[ATTR17]] = { nofree nosync nounwind readnone willreturn } ; IS________NPM: attributes #[[ATTR17:[0-9]+]] = { noreturn nounwind }
; IS__TUNIT_NPM: attributes #[[ATTR18]] = { readonly } ; IS________NPM: attributes #[[ATTR18]] = { nofree norecurse nosync nounwind readnone }
; IS__TUNIT_NPM: attributes #[[ATTR19:[0-9]+]] = { readnone } ; IS________NPM: attributes #[[ATTR19]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__TUNIT_NPM: attributes #[[ATTR20]] = { mustprogress } ; IS________NPM: attributes #[[ATTR20]] = { readonly }
; IS__TUNIT_NPM: attributes #[[ATTR21:[0-9]+]] = { mustprogress readonly } ; IS________NPM: attributes #[[ATTR21:[0-9]+]] = { readnone }
; IS__TUNIT_NPM: attributes #[[ATTR22]] = { mustprogress readonly willreturn } ; IS________NPM: attributes #[[ATTR22]] = { mustprogress }
; IS__TUNIT_NPM: attributes #[[ATTR23]] = { mustprogress nosync readnone willreturn } ; IS________NPM: attributes #[[ATTR23:[0-9]+]] = { mustprogress readonly }
; IS__TUNIT_NPM: attributes #[[ATTR24]] = { readonly willreturn } ; IS________NPM: attributes #[[ATTR24]] = { mustprogress readonly willreturn }
; IS__TUNIT_NPM: attributes #[[ATTR25]] = { nofree nosync nounwind } ; IS________NPM: attributes #[[ATTR25]] = { mustprogress nosync readnone willreturn }
; IS__TUNIT_NPM: attributes #[[ATTR26]] = { readnone willreturn } ; IS________NPM: attributes #[[ATTR26]] = { readonly willreturn }
; IS__TUNIT_NPM: attributes #[[ATTR27]] = { nounwind } ; IS________NPM: attributes #[[ATTR27]] = { nofree nosync nounwind readnone }
; IS__TUNIT_NPM: attributes #[[ATTR28]] = { willreturn } ; IS________NPM: attributes #[[ATTR28]] = { nofree nosync nounwind }
; IS________NPM: attributes #[[ATTR29]] = { readnone willreturn }
; IS________NPM: attributes #[[ATTR30]] = { nounwind }
; IS________NPM: attributes #[[ATTR31]] = { willreturn }
;. ;.
; IS__CGSCC_OPM: attributes #[[ATTR0]] = { nofree noinline norecurse nosync nounwind readnone uwtable willreturn } ; IS__CGSCC_OPM: attributes #[[ATTR0]] = { nofree noinline norecurse nosync nounwind readnone uwtable willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR1]] = { nofree noinline nosync nounwind readnone uwtable } ; IS__CGSCC_OPM: attributes #[[ATTR1]] = { nofree noinline nosync nounwind readnone uwtable }
; IS__CGSCC_OPM: attributes #[[ATTR2]] = { nofree noinline norecurse nosync nounwind readnone uwtable } ; IS__CGSCC_OPM: attributes #[[ATTR2]] = { nofree noinline norecurse nosync nounwind readnone uwtable }
; IS__CGSCC_OPM: attributes #[[ATTR3:[0-9]+]] = { nofree nosync nounwind willreturn } ; IS__CGSCC_OPM: attributes #[[ATTR3:[0-9]+]] = { nofree nosync nounwind willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR4]] = { nofree noinline nosync nounwind uwtable } ; IS__CGSCC_OPM: attributes #[[ATTR4]] = { nofree noinline nosync nounwind uwtable }
; IS__CGSCC_OPM: attributes #[[ATTR5]] = { noreturn } ; IS__CGSCC_OPM: attributes #[[ATTR5]] = { noreturn }
; IS__CGSCC_OPM: attributes #[[ATTR6]] = { noinline noreturn nounwind uwtable } ; IS__CGSCC_OPM: attributes #[[ATTR6]] = { noinline noreturn nounwind uwtable }
; IS__CGSCC_OPM: attributes #[[ATTR7]] = { noinline nounwind uwtable } ; IS__CGSCC_OPM: attributes #[[ATTR7]] = { noinline nounwind uwtable }
; IS__CGSCC_OPM: attributes #[[ATTR8:[0-9]+]] = { nofree nosync nounwind readnone speculatable willreturn } ; IS__CGSCC_OPM: attributes #[[ATTR8:[0-9]+]] = { nofree nosync nounwind readnone speculatable willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR9]] = { nofree noinline nosync nounwind readnone uwtable willreturn } ; IS__CGSCC_OPM: attributes #[[ATTR9]] = { nofree noinline nosync nounwind readnone uwtable willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR10:[0-9]+]] = { norecurse willreturn } ; IS__CGSCC_OPM: attributes #[[ATTR10:[0-9]+]] = { norecurse willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR11]] = { noinline norecurse nounwind uwtable willreturn } ; IS__CGSCC_OPM: attributes #[[ATTR11]] = { noinline nounwind uwtable willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR12]] = { noinline norecurse noreturn nounwind uwtable } ; IS__CGSCC_OPM: attributes #[[ATTR12:[0-9]+]] = { noinline uwtable willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR13:[0-9]+]] = { noinline uwtable willreturn } ; IS__CGSCC_OPM: attributes #[[ATTR13]] = { nounwind willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR14]] = { nounwind willreturn } ; IS__CGSCC_OPM: attributes #[[ATTR14]] = { argmemonly nofree noinline norecurse nosync nounwind readonly uwtable }
; IS__CGSCC_OPM: attributes #[[ATTR15]] = { argmemonly nofree noinline norecurse nosync nounwind readonly uwtable } ; IS__CGSCC_OPM: attributes #[[ATTR15]] = { nofree noinline norecurse noreturn nosync nounwind readnone uwtable }
; IS__CGSCC_OPM: attributes #[[ATTR16]] = { nofree noinline norecurse noreturn nosync nounwind readnone uwtable } ; IS__CGSCC_OPM: attributes #[[ATTR16:[0-9]+]] = { noreturn nounwind }
; IS__CGSCC_OPM: attributes #[[ATTR17:[0-9]+]] = { noreturn nounwind } ; IS__CGSCC_OPM: attributes #[[ATTR17]] = { nofree norecurse nosync nounwind readnone }
; IS__CGSCC_OPM: attributes #[[ATTR18]] = { nofree norecurse nosync nounwind readnone } ; IS__CGSCC_OPM: attributes #[[ATTR18]] = { readonly }
; IS__CGSCC_OPM: attributes #[[ATTR19]] = { readonly } ; IS__CGSCC_OPM: attributes #[[ATTR19:[0-9]+]] = { readnone }
; IS__CGSCC_OPM: attributes #[[ATTR20:[0-9]+]] = { readnone } ; IS__CGSCC_OPM: attributes #[[ATTR20]] = { mustprogress }
; IS__CGSCC_OPM: attributes #[[ATTR21]] = { mustprogress } ; IS__CGSCC_OPM: attributes #[[ATTR21:[0-9]+]] = { mustprogress readonly }
; IS__CGSCC_OPM: attributes #[[ATTR22:[0-9]+]] = { mustprogress readonly } ; IS__CGSCC_OPM: attributes #[[ATTR22]] = { mustprogress readonly willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR23]] = { mustprogress readonly willreturn } ; IS__CGSCC_OPM: attributes #[[ATTR23]] = { mustprogress nosync readnone willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR24]] = { mustprogress nosync readnone willreturn } ; IS__CGSCC_OPM: attributes #[[ATTR24]] = { readonly willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR25]] = { readonly willreturn } ; IS__CGSCC_OPM: attributes #[[ATTR25]] = { nofree nosync nounwind readnone }
; IS__CGSCC_OPM: attributes #[[ATTR26]] = { nofree nosync nounwind readnone } ; IS__CGSCC_OPM: attributes #[[ATTR26]] = { nofree nosync nounwind }
; IS__CGSCC_OPM: attributes #[[ATTR27]] = { nofree nosync nounwind } ; IS__CGSCC_OPM: attributes #[[ATTR27]] = { readnone willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR28]] = { readnone willreturn } ; IS__CGSCC_OPM: attributes #[[ATTR28]] = { nounwind }
; IS__CGSCC_OPM: attributes #[[ATTR29]] = { nounwind } ; IS__CGSCC_OPM: attributes #[[ATTR29]] = { willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR30]] = { willreturn } ; IS__CGSCC_OPM: attributes #[[ATTR30]] = { nounwind readnone }
; IS__CGSCC_OPM: attributes #[[ATTR31]] = { nounwind readnone }
;.
; IS__CGSCC_NPM: attributes #[[ATTR0]] = { nofree noinline norecurse nosync nounwind readnone uwtable willreturn }
; IS__CGSCC_NPM: attributes #[[ATTR1]] = { nofree noinline nosync nounwind readnone uwtable }
; IS__CGSCC_NPM: attributes #[[ATTR2]] = { nofree noinline norecurse nosync nounwind readnone uwtable }
; IS__CGSCC_NPM: attributes #[[ATTR3:[0-9]+]] = { nofree nosync nounwind willreturn }
; IS__CGSCC_NPM: attributes #[[ATTR4]] = { nofree noinline nosync nounwind uwtable }
; IS__CGSCC_NPM: attributes #[[ATTR5]] = { noreturn }
; IS__CGSCC_NPM: attributes #[[ATTR6]] = { noinline noreturn nounwind uwtable }
; IS__CGSCC_NPM: attributes #[[ATTR7]] = { noinline nounwind uwtable }
; IS__CGSCC_NPM: attributes #[[ATTR8:[0-9]+]] = { nofree nosync nounwind readnone speculatable willreturn }
; IS__CGSCC_NPM: attributes #[[ATTR9]] = { nofree noinline nosync nounwind readnone uwtable willreturn }
; IS__CGSCC_NPM: attributes #[[ATTR10:[0-9]+]] = { norecurse willreturn }
; IS__CGSCC_NPM: attributes #[[ATTR11]] = { noinline norecurse nounwind uwtable willreturn }
; IS__CGSCC_NPM: attributes #[[ATTR12]] = { noinline norecurse noreturn nounwind uwtable }
; IS__CGSCC_NPM: attributes #[[ATTR13:[0-9]+]] = { noinline uwtable willreturn }
; IS__CGSCC_NPM: attributes #[[ATTR14]] = { nounwind willreturn }
; IS__CGSCC_NPM: attributes #[[ATTR15]] = { argmemonly nofree noinline norecurse nosync nounwind readonly uwtable willreturn }
; IS__CGSCC_NPM: attributes #[[ATTR16]] = { argmemonly nofree noinline norecurse nosync nounwind readonly uwtable }
; IS__CGSCC_NPM: attributes #[[ATTR17]] = { nofree noinline norecurse noreturn nosync nounwind readnone uwtable }
; IS__CGSCC_NPM: attributes #[[ATTR18:[0-9]+]] = { noreturn nounwind }
; IS__CGSCC_NPM: attributes #[[ATTR19]] = { nofree norecurse nosync nounwind readnone }
; IS__CGSCC_NPM: attributes #[[ATTR20]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__CGSCC_NPM: attributes #[[ATTR21]] = { readonly }
; IS__CGSCC_NPM: attributes #[[ATTR22:[0-9]+]] = { readnone }
; IS__CGSCC_NPM: attributes #[[ATTR23]] = { mustprogress }
; IS__CGSCC_NPM: attributes #[[ATTR24:[0-9]+]] = { mustprogress readonly }
; IS__CGSCC_NPM: attributes #[[ATTR25]] = { mustprogress readonly willreturn }
; IS__CGSCC_NPM: attributes #[[ATTR26]] = { mustprogress nosync readnone willreturn }
; IS__CGSCC_NPM: attributes #[[ATTR27]] = { readonly willreturn }
; IS__CGSCC_NPM: attributes #[[ATTR28]] = { nofree nosync nounwind readnone }
; IS__CGSCC_NPM: attributes #[[ATTR29]] = { nofree nosync nounwind }
; IS__CGSCC_NPM: attributes #[[ATTR30]] = { readnone willreturn }
; IS__CGSCC_NPM: attributes #[[ATTR31]] = { nounwind }
; IS__CGSCC_NPM: attributes #[[ATTR32]] = { willreturn }
;. ;.

llvm/test/Transforms/Attributor/wrapper.ll

Show First 20 Lines • Show All 55 Lines • ▼ Show 20 Lines
; TEST 3: check nocurse ; TEST 3: check nocurse
; This function calls itself, there will be no attribute ; This function calls itself, there will be no attribute
; CHECK-NOT: Function Attrs ; CHECK-NOT: Function Attrs
; CHECK: define linkonce i32 @inner3(i32 %0) ; CHECK: define linkonce i32 @inner3(i32 %0)
; CHECK: tail call i32 @2(i32 %0) ; CHECK: tail call i32 @2(i32 %0)
; CHECK: ret ; CHECK: ret
; ;
; CHECK-NOT: Function Attrs: ; FIXME: This is wrong
; CHECK: Function Attrs: norecurse
; CHECK: define internal i32 @2(i32 %0) ; CHECK: define internal i32 @2(i32 %0)
define linkonce i32 @inner3(i32) { define linkonce i32 @inner3(i32) {
entry: entry:
%1 = alloca i32 %1 = alloca i32
store i32 %0, i32* %1 store i32 %0, i32* %1
br label %2 br label %2
2: 2:
%3 = load i32, i32* %1 %3 = load i32, i32* %1
Show All 13 Lines

llvm/test/Transforms/OpenMP/custom_state_machines.ll

  • This file is larger than 256 KB, so syntax highlighting is disabled by default.
Show First 20 Lines • Show All 864 Lines • ▼ Show 20 Lines
; AMDGPU-NEXT: entry: ; AMDGPU-NEXT: entry:
; AMDGPU-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 ; AMDGPU-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
; AMDGPU-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 ; AMDGPU-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
; AMDGPU-NEXT: call void @no_parallel_region_in_here.internalized() #[[ATTR8:[0-9]+]] ; AMDGPU-NEXT: call void @no_parallel_region_in_here.internalized() #[[ATTR8:[0-9]+]]
; AMDGPU-NEXT: call void @unknown_no_openmp() #[[ATTR9:[0-9]+]] ; AMDGPU-NEXT: call void @unknown_no_openmp() #[[ATTR9:[0-9]+]]
; AMDGPU-NEXT: ret void ; AMDGPU-NEXT: ret void
; ;
; ;
; AMDGPU: Function Attrs: convergent noinline nounwind ; AMDGPU: Function Attrs: convergent noinline norecurse nounwind
; AMDGPU-LABEL: define {{[^@]+}}@no_parallel_region_in_here.internalized ; AMDGPU-LABEL: define {{[^@]+}}@no_parallel_region_in_here.internalized
; AMDGPU-SAME: () #[[ATTR1:[0-9]+]] { ; AMDGPU-SAME: () #[[ATTR0]] {
; AMDGPU-NEXT: entry: ; AMDGPU-NEXT: entry:
; AMDGPU-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* noundef @[[GLOB2:[0-9]+]]) #[[ATTR3]] ; AMDGPU-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* noundef @[[GLOB2:[0-9]+]]) #[[ATTR3]]
; AMDGPU-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_single(%struct.ident_t* noundef @[[GLOB2]], i32 [[TMP0]]) #[[ATTR3]] ; AMDGPU-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_single(%struct.ident_t* noundef @[[GLOB2]], i32 [[TMP0]]) #[[ATTR3]]
; AMDGPU-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 0 ; AMDGPU-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 0
; AMDGPU-NEXT: br i1 [[TMP2]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]] ; AMDGPU-NEXT: br i1 [[TMP2]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]]
; AMDGPU: omp_if.then: ; AMDGPU: omp_if.then:
; AMDGPU-NEXT: store i32 0, i32* @G, align 4 ; AMDGPU-NEXT: store i32 0, i32* @G, align 4
; AMDGPU-NEXT: call void @__kmpc_end_single(%struct.ident_t* noundef @[[GLOB2]], i32 [[TMP0]]) #[[ATTR3]] ; AMDGPU-NEXT: call void @__kmpc_end_single(%struct.ident_t* noundef @[[GLOB2]], i32 [[TMP0]]) #[[ATTR3]]
; AMDGPU-NEXT: br label [[OMP_IF_END]] ; AMDGPU-NEXT: br label [[OMP_IF_END]]
; AMDGPU: omp_if.end: ; AMDGPU: omp_if.end:
; AMDGPU-NEXT: call void @__kmpc_barrier(%struct.ident_t* noundef @[[GLOB3:[0-9]+]], i32 [[TMP0]]) #[[ATTR3]] ; AMDGPU-NEXT: call void @__kmpc_barrier(%struct.ident_t* noundef @[[GLOB3:[0-9]+]], i32 [[TMP0]]) #[[ATTR3]]
; AMDGPU-NEXT: ret void ; AMDGPU-NEXT: ret void
; ;
; ;
; AMDGPU: Function Attrs: convergent noinline nounwind ; AMDGPU: Function Attrs: convergent noinline nounwind
; AMDGPU-LABEL: define {{[^@]+}}@no_parallel_region_in_here ; AMDGPU-LABEL: define {{[^@]+}}@no_parallel_region_in_here
; AMDGPU-SAME: () #[[ATTR1]] { ; AMDGPU-SAME: () #[[ATTR1:[0-9]+]] {
; AMDGPU-NEXT: entry: ; AMDGPU-NEXT: entry:
; AMDGPU-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2]]) ; AMDGPU-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2]])
; AMDGPU-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_single(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]]) ; AMDGPU-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_single(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]])
; AMDGPU-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 0 ; AMDGPU-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 0
; AMDGPU-NEXT: br i1 [[TMP2]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]] ; AMDGPU-NEXT: br i1 [[TMP2]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]]
; AMDGPU: omp_if.then: ; AMDGPU: omp_if.then:
; AMDGPU-NEXT: store i32 0, i32* @G, align 4 ; AMDGPU-NEXT: store i32 0, i32* @G, align 4
; AMDGPU-NEXT: call void @__kmpc_end_single(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]]) ; AMDGPU-NEXT: call void @__kmpc_end_single(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]])
▲ Show 20 Lines • Show All 207 Lines • ▼ Show 20 Lines
; AMDGPU-NEXT: call void @no_parallel_region_in_here.internalized() #[[ATTR8]] ; AMDGPU-NEXT: call void @no_parallel_region_in_here.internalized() #[[ATTR8]]
; AMDGPU-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTGLOBAL_TID_]], align 4 ; AMDGPU-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTGLOBAL_TID_]], align 4
; AMDGPU-NEXT: [[TMP1:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** ; AMDGPU-NEXT: [[TMP1:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
; AMDGPU-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* noundef @[[GLOB1]], i32 [[TMP0]], i32 noundef 1, i32 noundef -1, i32 noundef -1, i8* noundef bitcast (void (i32*, i32*)* @__omp_outlined__5 to i8*), i8* noundef @__omp_outlined__5_wrapper.ID, i8** noundef [[TMP1]], i64 noundef 0) ; AMDGPU-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* noundef @[[GLOB1]], i32 [[TMP0]], i32 noundef 1, i32 noundef -1, i32 noundef -1, i8* noundef bitcast (void (i32*, i32*)* @__omp_outlined__5 to i8*), i8* noundef @__omp_outlined__5_wrapper.ID, i8** noundef [[TMP1]], i64 noundef 0)
; AMDGPU-NEXT: call void @simple_state_machine_interprocedural_after.internalized() #[[ATTR8]] ; AMDGPU-NEXT: call void @simple_state_machine_interprocedural_after.internalized() #[[ATTR8]]
; AMDGPU-NEXT: ret void ; AMDGPU-NEXT: ret void
; ;
; ;
; AMDGPU: Function Attrs: convergent noinline nounwind ; AMDGPU: Function Attrs: convergent noinline norecurse nounwind
; AMDGPU-LABEL: define {{[^@]+}}@simple_state_machine_interprocedural_before.internalized ; AMDGPU-LABEL: define {{[^@]+}}@simple_state_machine_interprocedural_before.internalized
; AMDGPU-SAME: () #[[ATTR1]] { ; AMDGPU-SAME: () #[[ATTR0]] {
; AMDGPU-NEXT: entry: ; AMDGPU-NEXT: entry:
; AMDGPU-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 8 ; AMDGPU-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 8
; AMDGPU-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* noundef @[[GLOB2]]) #[[ATTR3]] ; AMDGPU-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* noundef @[[GLOB2]]) #[[ATTR3]]
; AMDGPU-NEXT: [[TMP1:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** ; AMDGPU-NEXT: [[TMP1:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
; AMDGPU-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* noundef @[[GLOB2]], i32 [[TMP0]], i32 noundef 1, i32 noundef -1, i32 noundef -1, i8* noundef bitcast (void (i32*, i32*)* @__omp_outlined__17 to i8*), i8* noundef bitcast (void (i16, i32)* @__omp_outlined__17_wrapper to i8*), i8** noundef [[TMP1]], i64 noundef 0) ; AMDGPU-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* noundef @[[GLOB2]], i32 [[TMP0]], i32 noundef 1, i32 noundef -1, i32 noundef -1, i8* noundef bitcast (void (i32*, i32*)* @__omp_outlined__17 to i8*), i8* noundef bitcast (void (i16, i32)* @__omp_outlined__17_wrapper to i8*), i8** noundef [[TMP1]], i64 noundef 0)
; AMDGPU-NEXT: ret void ; AMDGPU-NEXT: ret void
; ;
; ;
Show All 26 Lines
; AMDGPU-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4 ; AMDGPU-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4
; AMDGPU-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 ; AMDGPU-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
; AMDGPU-NEXT: [[GLOBAL_ARGS:%.*]] = alloca i8**, align 8 ; AMDGPU-NEXT: [[GLOBAL_ARGS:%.*]] = alloca i8**, align 8
; AMDGPU-NEXT: call void @__kmpc_get_shared_variables(i8*** [[GLOBAL_ARGS]]) ; AMDGPU-NEXT: call void @__kmpc_get_shared_variables(i8*** [[GLOBAL_ARGS]])
; AMDGPU-NEXT: call void @__omp_outlined__5(i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTADDR1]], i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTZERO_ADDR]]) #[[ATTR3]] ; AMDGPU-NEXT: call void @__omp_outlined__5(i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTADDR1]], i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTZERO_ADDR]]) #[[ATTR3]]
; AMDGPU-NEXT: ret void ; AMDGPU-NEXT: ret void
; ;
; ;
; AMDGPU: Function Attrs: convergent noinline nounwind ; AMDGPU: Function Attrs: convergent noinline norecurse nounwind
; AMDGPU-LABEL: define {{[^@]+}}@simple_state_machine_interprocedural_after.internalized ; AMDGPU-LABEL: define {{[^@]+}}@simple_state_machine_interprocedural_after.internalized
; AMDGPU-SAME: () #[[ATTR1]] { ; AMDGPU-SAME: () #[[ATTR0]] {
; AMDGPU-NEXT: entry: ; AMDGPU-NEXT: entry:
; AMDGPU-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 8 ; AMDGPU-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 8
; AMDGPU-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* noundef @[[GLOB2]]) #[[ATTR3]] ; AMDGPU-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* noundef @[[GLOB2]]) #[[ATTR3]]
; AMDGPU-NEXT: [[TMP1:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** ; AMDGPU-NEXT: [[TMP1:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
; AMDGPU-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* noundef @[[GLOB2]], i32 [[TMP0]], i32 noundef 1, i32 noundef -1, i32 noundef -1, i8* noundef bitcast (void (i32*, i32*)* @__omp_outlined__18 to i8*), i8* noundef bitcast (void (i16, i32)* @__omp_outlined__18_wrapper to i8*), i8** noundef [[TMP1]], i64 noundef 0) ; AMDGPU-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* noundef @[[GLOB2]], i32 [[TMP0]], i32 noundef 1, i32 noundef -1, i32 noundef -1, i8* noundef bitcast (void (i32*, i32*)* @__omp_outlined__18 to i8*), i8* noundef bitcast (void (i16, i32)* @__omp_outlined__18_wrapper to i8*), i8** noundef [[TMP1]], i64 noundef 0)
; AMDGPU-NEXT: ret void ; AMDGPU-NEXT: ret void
; ;
; ;
▲ Show 20 Lines • Show All 443 Lines • ▼ Show 20 Lines
; AMDGPU-NEXT: entry: ; AMDGPU-NEXT: entry:
; AMDGPU-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 ; AMDGPU-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
; AMDGPU-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 ; AMDGPU-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
; AMDGPU-NEXT: [[CALL:%.*]] = call i32 bitcast (i32 (...)* @omp_get_thread_num to i32 ()*)() #[[ATTR10]] ; AMDGPU-NEXT: [[CALL:%.*]] = call i32 bitcast (i32 (...)* @omp_get_thread_num to i32 ()*)() #[[ATTR10]]
; AMDGPU-NEXT: call void @simple_state_machine_interprocedural_nested_recursive_after.internalized(i32 [[CALL]]) #[[ATTR8]] ; AMDGPU-NEXT: call void @simple_state_machine_interprocedural_nested_recursive_after.internalized(i32 [[CALL]]) #[[ATTR8]]
; AMDGPU-NEXT: ret void ; AMDGPU-NEXT: ret void
; ;
; ;
; AMDGPU: Function Attrs: convergent noinline nounwind ; AMDGPU: Function Attrs: convergent noinline norecurse nounwind
; AMDGPU-LABEL: define {{[^@]+}}@simple_state_machine_interprocedural_nested_recursive_after.internalized ; AMDGPU-LABEL: define {{[^@]+}}@simple_state_machine_interprocedural_nested_recursive_after.internalized
; AMDGPU-SAME: (i32 [[A:%.*]]) #[[ATTR1]] { ; AMDGPU-SAME: (i32 [[A:%.*]]) #[[ATTR0]] {
; AMDGPU-NEXT: entry: ; AMDGPU-NEXT: entry:
; AMDGPU-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 ; AMDGPU-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
; AMDGPU-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 ; AMDGPU-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
; AMDGPU-NEXT: [[CMP:%.*]] = icmp eq i32 [[A]], 0 ; AMDGPU-NEXT: [[CMP:%.*]] = icmp eq i32 [[A]], 0
; AMDGPU-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_END:%.*]] ; AMDGPU-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
; AMDGPU: if.then: ; AMDGPU: if.then:
; AMDGPU-NEXT: br label [[RETURN:%.*]] ; AMDGPU-NEXT: br label [[RETURN:%.*]]
; AMDGPU: if.end: ; AMDGPU: if.end:
; AMDGPU-NEXT: [[SUB:%.*]] = sub nsw i32 [[A]], 1 ; AMDGPU-NEXT: [[SUB:%.*]] = sub nsw i32 [[A]], 1
; AMDGPU-NEXT: call void @simple_state_machine_interprocedural_nested_recursive_after.internalized(i32 [[SUB]]) #[[ATTR8]] ; AMDGPU-NEXT: call void @simple_state_machine_interprocedural_nested_recursive_after.internalized(i32 [[SUB]]) #[[ATTR11:[0-9]+]]
; AMDGPU-NEXT: call void @simple_state_machine_interprocedural_nested_recursive_after_after.internalized() #[[ATTR8]] ; AMDGPU-NEXT: call void @simple_state_machine_interprocedural_nested_recursive_after_after.internalized() #[[ATTR8]]
; AMDGPU-NEXT: br label [[RETURN]] ; AMDGPU-NEXT: br label [[RETURN]]
; AMDGPU: return: ; AMDGPU: return:
; AMDGPU-NEXT: ret void ; AMDGPU-NEXT: ret void
; ;
; ;
; AMDGPU: Function Attrs: convergent noinline nounwind ; AMDGPU: Function Attrs: convergent noinline nounwind
; AMDGPU-LABEL: define {{[^@]+}}@simple_state_machine_interprocedural_nested_recursive_after ; AMDGPU-LABEL: define {{[^@]+}}@simple_state_machine_interprocedural_nested_recursive_after
▲ Show 20 Lines • Show All 123 Lines • ▼ Show 20 Lines
; AMDGPU-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4 ; AMDGPU-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4
; AMDGPU-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 ; AMDGPU-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
; AMDGPU-NEXT: [[GLOBAL_ARGS:%.*]] = alloca i8**, align 8 ; AMDGPU-NEXT: [[GLOBAL_ARGS:%.*]] = alloca i8**, align 8
; AMDGPU-NEXT: call void @__kmpc_get_shared_variables(i8*** [[GLOBAL_ARGS]]) ; AMDGPU-NEXT: call void @__kmpc_get_shared_variables(i8*** [[GLOBAL_ARGS]])
; AMDGPU-NEXT: call void @__omp_outlined__18(i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTADDR1]], i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTZERO_ADDR]]) #[[ATTR3]] ; AMDGPU-NEXT: call void @__omp_outlined__18(i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTADDR1]], i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTZERO_ADDR]]) #[[ATTR3]]
; AMDGPU-NEXT: ret void ; AMDGPU-NEXT: ret void
; ;
; ;
; AMDGPU: Function Attrs: convergent noinline nounwind ; AMDGPU: Function Attrs: convergent noinline norecurse nounwind
; AMDGPU-LABEL: define {{[^@]+}}@simple_state_machine_interprocedural_nested_recursive_after_after.internalized ; AMDGPU-LABEL: define {{[^@]+}}@simple_state_machine_interprocedural_nested_recursive_after_after.internalized
; AMDGPU-SAME: () #[[ATTR1]] { ; AMDGPU-SAME: () #[[ATTR0]] {
; AMDGPU-NEXT: entry: ; AMDGPU-NEXT: entry:
; AMDGPU-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 8 ; AMDGPU-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 8
; AMDGPU-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* noundef @[[GLOB2]]) #[[ATTR3]] ; AMDGPU-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* noundef @[[GLOB2]]) #[[ATTR3]]
; AMDGPU-NEXT: [[TMP1:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** ; AMDGPU-NEXT: [[TMP1:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
; AMDGPU-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* noundef @[[GLOB2]], i32 [[TMP0]], i32 noundef 1, i32 noundef -1, i32 noundef -1, i8* noundef bitcast (void (i32*, i32*)* @__omp_outlined__19 to i8*), i8* noundef bitcast (void (i16, i32)* @__omp_outlined__19_wrapper to i8*), i8** noundef [[TMP1]], i64 noundef 0) ; AMDGPU-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* noundef @[[GLOB2]], i32 [[TMP0]], i32 noundef 1, i32 noundef -1, i32 noundef -1, i8* noundef bitcast (void (i32*, i32*)* @__omp_outlined__19 to i8*), i8* noundef bitcast (void (i16, i32)* @__omp_outlined__19_wrapper to i8*), i8** noundef [[TMP1]], i64 noundef 0)
; AMDGPU-NEXT: ret void ; AMDGPU-NEXT: ret void
; ;
; ;
▲ Show 20 Lines • Show All 55 Lines • ▼ Show 20 Lines
; NVPTX-NEXT: entry: ; NVPTX-NEXT: entry:
; NVPTX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 ; NVPTX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
; NVPTX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 ; NVPTX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
; NVPTX-NEXT: call void @no_parallel_region_in_here.internalized() #[[ATTR8:[0-9]+]] ; NVPTX-NEXT: call void @no_parallel_region_in_here.internalized() #[[ATTR8:[0-9]+]]
; NVPTX-NEXT: call void @unknown_no_openmp() #[[ATTR9:[0-9]+]] ; NVPTX-NEXT: call void @unknown_no_openmp() #[[ATTR9:[0-9]+]]
; NVPTX-NEXT: ret void ; NVPTX-NEXT: ret void
; ;
; ;
; NVPTX: Function Attrs: convergent noinline nounwind ; NVPTX: Function Attrs: convergent noinline norecurse nounwind
; NVPTX-LABEL: define {{[^@]+}}@no_parallel_region_in_here.internalized ; NVPTX-LABEL: define {{[^@]+}}@no_parallel_region_in_here.internalized
; NVPTX-SAME: () #[[ATTR1:[0-9]+]] { ; NVPTX-SAME: () #[[ATTR0]] {
; NVPTX-NEXT: entry: ; NVPTX-NEXT: entry:
; NVPTX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* noundef @[[GLOB2:[0-9]+]]) #[[ATTR3]] ; NVPTX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* noundef @[[GLOB2:[0-9]+]]) #[[ATTR3]]
; NVPTX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_single(%struct.ident_t* noundef @[[GLOB2]], i32 [[TMP0]]) #[[ATTR3]] ; NVPTX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_single(%struct.ident_t* noundef @[[GLOB2]], i32 [[TMP0]]) #[[ATTR3]]
; NVPTX-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 0 ; NVPTX-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 0
; NVPTX-NEXT: br i1 [[TMP2]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]] ; NVPTX-NEXT: br i1 [[TMP2]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]]
; NVPTX: omp_if.then: ; NVPTX: omp_if.then:
; NVPTX-NEXT: store i32 0, i32* @G, align 4 ; NVPTX-NEXT: store i32 0, i32* @G, align 4
; NVPTX-NEXT: call void @__kmpc_end_single(%struct.ident_t* noundef @[[GLOB2]], i32 [[TMP0]]) #[[ATTR3]] ; NVPTX-NEXT: call void @__kmpc_end_single(%struct.ident_t* noundef @[[GLOB2]], i32 [[TMP0]]) #[[ATTR3]]
; NVPTX-NEXT: br label [[OMP_IF_END]] ; NVPTX-NEXT: br label [[OMP_IF_END]]
; NVPTX: omp_if.end: ; NVPTX: omp_if.end:
; NVPTX-NEXT: call void @__kmpc_barrier(%struct.ident_t* noundef @[[GLOB3:[0-9]+]], i32 [[TMP0]]) #[[ATTR3]] ; NVPTX-NEXT: call void @__kmpc_barrier(%struct.ident_t* noundef @[[GLOB3:[0-9]+]], i32 [[TMP0]]) #[[ATTR3]]
; NVPTX-NEXT: ret void ; NVPTX-NEXT: ret void
; ;
; ;
; NVPTX: Function Attrs: convergent noinline nounwind ; NVPTX: Function Attrs: convergent noinline nounwind
; NVPTX-LABEL: define {{[^@]+}}@no_parallel_region_in_here ; NVPTX-LABEL: define {{[^@]+}}@no_parallel_region_in_here
; NVPTX-SAME: () #[[ATTR1]] { ; NVPTX-SAME: () #[[ATTR1:[0-9]+]] {
; NVPTX-NEXT: entry: ; NVPTX-NEXT: entry:
; NVPTX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2]]) ; NVPTX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2]])
; NVPTX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_single(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]]) ; NVPTX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_single(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]])
; NVPTX-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 0 ; NVPTX-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 0
; NVPTX-NEXT: br i1 [[TMP2]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]] ; NVPTX-NEXT: br i1 [[TMP2]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]]
; NVPTX: omp_if.then: ; NVPTX: omp_if.then:
; NVPTX-NEXT: store i32 0, i32* @G, align 4 ; NVPTX-NEXT: store i32 0, i32* @G, align 4
; NVPTX-NEXT: call void @__kmpc_end_single(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]]) ; NVPTX-NEXT: call void @__kmpc_end_single(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]])
▲ Show 20 Lines • Show All 205 Lines • ▼ Show 20 Lines
; NVPTX-NEXT: call void @no_parallel_region_in_here.internalized() #[[ATTR8]] ; NVPTX-NEXT: call void @no_parallel_region_in_here.internalized() #[[ATTR8]]
; NVPTX-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTGLOBAL_TID_]], align 4 ; NVPTX-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTGLOBAL_TID_]], align 4
; NVPTX-NEXT: [[TMP1:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** ; NVPTX-NEXT: [[TMP1:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
; NVPTX-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* noundef @[[GLOB1]], i32 [[TMP0]], i32 noundef 1, i32 noundef -1, i32 noundef -1, i8* noundef bitcast (void (i32*, i32*)* @__omp_outlined__5 to i8*), i8* noundef @__omp_outlined__5_wrapper.ID, i8** noundef [[TMP1]], i64 noundef 0) ; NVPTX-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* noundef @[[GLOB1]], i32 [[TMP0]], i32 noundef 1, i32 noundef -1, i32 noundef -1, i8* noundef bitcast (void (i32*, i32*)* @__omp_outlined__5 to i8*), i8* noundef @__omp_outlined__5_wrapper.ID, i8** noundef [[TMP1]], i64 noundef 0)
; NVPTX-NEXT: call void @simple_state_machine_interprocedural_after.internalized() #[[ATTR8]] ; NVPTX-NEXT: call void @simple_state_machine_interprocedural_after.internalized() #[[ATTR8]]
; NVPTX-NEXT: ret void ; NVPTX-NEXT: ret void
; ;
; ;
; NVPTX: Function Attrs: convergent noinline nounwind ; NVPTX: Function Attrs: convergent noinline norecurse nounwind
; NVPTX-LABEL: define {{[^@]+}}@simple_state_machine_interprocedural_before.internalized ; NVPTX-LABEL: define {{[^@]+}}@simple_state_machine_interprocedural_before.internalized
; NVPTX-SAME: () #[[ATTR1]] { ; NVPTX-SAME: () #[[ATTR0]] {
; NVPTX-NEXT: entry: ; NVPTX-NEXT: entry:
; NVPTX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 8 ; NVPTX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 8
; NVPTX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* noundef @[[GLOB2]]) #[[ATTR3]] ; NVPTX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* noundef @[[GLOB2]]) #[[ATTR3]]
; NVPTX-NEXT: [[TMP1:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** ; NVPTX-NEXT: [[TMP1:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
; NVPTX-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* noundef @[[GLOB2]], i32 [[TMP0]], i32 noundef 1, i32 noundef -1, i32 noundef -1, i8* noundef bitcast (void (i32*, i32*)* @__omp_outlined__17 to i8*), i8* noundef bitcast (void (i16, i32)* @__omp_outlined__17_wrapper to i8*), i8** noundef [[TMP1]], i64 noundef 0) ; NVPTX-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* noundef @[[GLOB2]], i32 [[TMP0]], i32 noundef 1, i32 noundef -1, i32 noundef -1, i8* noundef bitcast (void (i32*, i32*)* @__omp_outlined__17 to i8*), i8* noundef bitcast (void (i16, i32)* @__omp_outlined__17_wrapper to i8*), i8** noundef [[TMP1]], i64 noundef 0)
; NVPTX-NEXT: ret void ; NVPTX-NEXT: ret void
; ;
; ;
Show All 26 Lines
; NVPTX-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4 ; NVPTX-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4
; NVPTX-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 ; NVPTX-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
; NVPTX-NEXT: [[GLOBAL_ARGS:%.*]] = alloca i8**, align 8 ; NVPTX-NEXT: [[GLOBAL_ARGS:%.*]] = alloca i8**, align 8
; NVPTX-NEXT: call void @__kmpc_get_shared_variables(i8*** [[GLOBAL_ARGS]]) ; NVPTX-NEXT: call void @__kmpc_get_shared_variables(i8*** [[GLOBAL_ARGS]])
; NVPTX-NEXT: call void @__omp_outlined__5(i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTADDR1]], i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTZERO_ADDR]]) #[[ATTR3]] ; NVPTX-NEXT: call void @__omp_outlined__5(i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTADDR1]], i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTZERO_ADDR]]) #[[ATTR3]]
; NVPTX-NEXT: ret void ; NVPTX-NEXT: ret void
; ;
; ;
; NVPTX: Function Attrs: convergent noinline nounwind ; NVPTX: Function Attrs: convergent noinline norecurse nounwind
; NVPTX-LABEL: define {{[^@]+}}@simple_state_machine_interprocedural_after.internalized ; NVPTX-LABEL: define {{[^@]+}}@simple_state_machine_interprocedural_after.internalized
; NVPTX-SAME: () #[[ATTR1]] { ; NVPTX-SAME: () #[[ATTR0]] {
; NVPTX-NEXT: entry: ; NVPTX-NEXT: entry:
; NVPTX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 8 ; NVPTX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 8
; NVPTX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* noundef @[[GLOB2]]) #[[ATTR3]] ; NVPTX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* noundef @[[GLOB2]]) #[[ATTR3]]
; NVPTX-NEXT: [[TMP1:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** ; NVPTX-NEXT: [[TMP1:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
; NVPTX-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* noundef @[[GLOB2]], i32 [[TMP0]], i32 noundef 1, i32 noundef -1, i32 noundef -1, i8* noundef bitcast (void (i32*, i32*)* @__omp_outlined__18 to i8*), i8* noundef bitcast (void (i16, i32)* @__omp_outlined__18_wrapper to i8*), i8** noundef [[TMP1]], i64 noundef 0) ; NVPTX-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* noundef @[[GLOB2]], i32 [[TMP0]], i32 noundef 1, i32 noundef -1, i32 noundef -1, i8* noundef bitcast (void (i32*, i32*)* @__omp_outlined__18 to i8*), i8* noundef bitcast (void (i16, i32)* @__omp_outlined__18_wrapper to i8*), i8** noundef [[TMP1]], i64 noundef 0)
; NVPTX-NEXT: ret void ; NVPTX-NEXT: ret void
; ;
; ;
▲ Show 20 Lines • Show All 439 Lines • ▼ Show 20 Lines
; NVPTX-NEXT: entry: ; NVPTX-NEXT: entry:
; NVPTX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 ; NVPTX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
; NVPTX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 ; NVPTX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
; NVPTX-NEXT: [[CALL:%.*]] = call i32 bitcast (i32 (...)* @omp_get_thread_num to i32 ()*)() #[[ATTR10]] ; NVPTX-NEXT: [[CALL:%.*]] = call i32 bitcast (i32 (...)* @omp_get_thread_num to i32 ()*)() #[[ATTR10]]
; NVPTX-NEXT: call void @simple_state_machine_interprocedural_nested_recursive_after.internalized(i32 [[CALL]]) #[[ATTR8]] ; NVPTX-NEXT: call void @simple_state_machine_interprocedural_nested_recursive_after.internalized(i32 [[CALL]]) #[[ATTR8]]
; NVPTX-NEXT: ret void ; NVPTX-NEXT: ret void
; ;
; ;
; NVPTX: Function Attrs: convergent noinline nounwind ; NVPTX: Function Attrs: convergent noinline norecurse nounwind
; NVPTX-LABEL: define {{[^@]+}}@simple_state_machine_interprocedural_nested_recursive_after.internalized ; NVPTX-LABEL: define {{[^@]+}}@simple_state_machine_interprocedural_nested_recursive_after.internalized
; NVPTX-SAME: (i32 [[A:%.*]]) #[[ATTR1]] { ; NVPTX-SAME: (i32 [[A:%.*]]) #[[ATTR0]] {
; NVPTX-NEXT: entry: ; NVPTX-NEXT: entry:
; NVPTX-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 ; NVPTX-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
; NVPTX-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 ; NVPTX-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
; NVPTX-NEXT: [[CMP:%.*]] = icmp eq i32 [[A]], 0 ; NVPTX-NEXT: [[CMP:%.*]] = icmp eq i32 [[A]], 0
; NVPTX-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_END:%.*]] ; NVPTX-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
; NVPTX: if.then: ; NVPTX: if.then:
; NVPTX-NEXT: br label [[RETURN:%.*]] ; NVPTX-NEXT: br label [[RETURN:%.*]]
; NVPTX: if.end: ; NVPTX: if.end:
; NVPTX-NEXT: [[SUB:%.*]] = sub nsw i32 [[A]], 1 ; NVPTX-NEXT: [[SUB:%.*]] = sub nsw i32 [[A]], 1
; NVPTX-NEXT: call void @simple_state_machine_interprocedural_nested_recursive_after.internalized(i32 [[SUB]]) #[[ATTR8]] ; NVPTX-NEXT: call void @simple_state_machine_interprocedural_nested_recursive_after.internalized(i32 [[SUB]]) #[[ATTR11:[0-9]+]]
; NVPTX-NEXT: call void @simple_state_machine_interprocedural_nested_recursive_after_after.internalized() #[[ATTR8]] ; NVPTX-NEXT: call void @simple_state_machine_interprocedural_nested_recursive_after_after.internalized() #[[ATTR8]]
; NVPTX-NEXT: br label [[RETURN]] ; NVPTX-NEXT: br label [[RETURN]]
; NVPTX: return: ; NVPTX: return:
; NVPTX-NEXT: ret void ; NVPTX-NEXT: ret void
; ;
; ;
; NVPTX: Function Attrs: convergent noinline nounwind ; NVPTX: Function Attrs: convergent noinline nounwind
; NVPTX-LABEL: define {{[^@]+}}@simple_state_machine_interprocedural_nested_recursive_after ; NVPTX-LABEL: define {{[^@]+}}@simple_state_machine_interprocedural_nested_recursive_after
▲ Show 20 Lines • Show All 122 Lines • ▼ Show 20 Lines
; NVPTX-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4 ; NVPTX-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4
; NVPTX-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 ; NVPTX-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
; NVPTX-NEXT: [[GLOBAL_ARGS:%.*]] = alloca i8**, align 8 ; NVPTX-NEXT: [[GLOBAL_ARGS:%.*]] = alloca i8**, align 8
; NVPTX-NEXT: call void @__kmpc_get_shared_variables(i8*** [[GLOBAL_ARGS]]) ; NVPTX-NEXT: call void @__kmpc_get_shared_variables(i8*** [[GLOBAL_ARGS]])
; NVPTX-NEXT: call void @__omp_outlined__18(i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTADDR1]], i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTZERO_ADDR]]) #[[ATTR3]] ; NVPTX-NEXT: call void @__omp_outlined__18(i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTADDR1]], i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTZERO_ADDR]]) #[[ATTR3]]
; NVPTX-NEXT: ret void ; NVPTX-NEXT: ret void
; ;
; ;
; NVPTX: Function Attrs: convergent noinline nounwind ; NVPTX: Function Attrs: convergent noinline norecurse nounwind
; NVPTX-LABEL: define {{[^@]+}}@simple_state_machine_interprocedural_nested_recursive_after_after.internalized ; NVPTX-LABEL: define {{[^@]+}}@simple_state_machine_interprocedural_nested_recursive_after_after.internalized
; NVPTX-SAME: () #[[ATTR1]] { ; NVPTX-SAME: () #[[ATTR0]] {
; NVPTX-NEXT: entry: ; NVPTX-NEXT: entry:
; NVPTX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 8 ; NVPTX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 8
; NVPTX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* noundef @[[GLOB2]]) #[[ATTR3]] ; NVPTX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* noundef @[[GLOB2]]) #[[ATTR3]]
; NVPTX-NEXT: [[TMP1:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** ; NVPTX-NEXT: [[TMP1:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
; NVPTX-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* noundef @[[GLOB2]], i32 [[TMP0]], i32 noundef 1, i32 noundef -1, i32 noundef -1, i8* noundef bitcast (void (i32*, i32*)* @__omp_outlined__19 to i8*), i8* noundef bitcast (void (i16, i32)* @__omp_outlined__19_wrapper to i8*), i8** noundef [[TMP1]], i64 noundef 0) ; NVPTX-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* noundef @[[GLOB2]], i32 [[TMP0]], i32 noundef 1, i32 noundef -1, i32 noundef -1, i8* noundef bitcast (void (i32*, i32*)* @__omp_outlined__19 to i8*), i8* noundef bitcast (void (i16, i32)* @__omp_outlined__19_wrapper to i8*), i8** noundef [[TMP1]], i64 noundef 0)
; NVPTX-NEXT: ret void ; NVPTX-NEXT: ret void
; ;
; ;
▲ Show 20 Lines • Show All 55 Lines • ▼ Show 20 Lines
; AMDGPU-DISABLED-NEXT: entry: ; AMDGPU-DISABLED-NEXT: entry:
; AMDGPU-DISABLED-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 ; AMDGPU-DISABLED-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
; AMDGPU-DISABLED-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 ; AMDGPU-DISABLED-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
; AMDGPU-DISABLED-NEXT: call void @no_parallel_region_in_here.internalized() #[[ATTR8:[0-9]+]] ; AMDGPU-DISABLED-NEXT: call void @no_parallel_region_in_here.internalized() #[[ATTR8:[0-9]+]]
; AMDGPU-DISABLED-NEXT: call void @unknown_no_openmp() #[[ATTR9:[0-9]+]] ; AMDGPU-DISABLED-NEXT: call void @unknown_no_openmp() #[[ATTR9:[0-9]+]]
; AMDGPU-DISABLED-NEXT: ret void ; AMDGPU-DISABLED-NEXT: ret void
; ;
; ;
; AMDGPU-DISABLED: Function Attrs: convergent noinline nounwind ; AMDGPU-DISABLED: Function Attrs: convergent noinline norecurse nounwind
; AMDGPU-DISABLED-LABEL: define {{[^@]+}}@no_parallel_region_in_here.internalized ; AMDGPU-DISABLED-LABEL: define {{[^@]+}}@no_parallel_region_in_here.internalized
; AMDGPU-DISABLED-SAME: () #[[ATTR1:[0-9]+]] { ; AMDGPU-DISABLED-SAME: () #[[ATTR0]] {
; AMDGPU-DISABLED-NEXT: entry: ; AMDGPU-DISABLED-NEXT: entry:
; AMDGPU-DISABLED-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* noundef @[[GLOB2:[0-9]+]]) #[[ATTR3]] ; AMDGPU-DISABLED-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* noundef @[[GLOB2:[0-9]+]]) #[[ATTR3]]
; AMDGPU-DISABLED-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_single(%struct.ident_t* noundef @[[GLOB2]], i32 [[TMP0]]) #[[ATTR3]] ; AMDGPU-DISABLED-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_single(%struct.ident_t* noundef @[[GLOB2]], i32 [[TMP0]]) #[[ATTR3]]
; AMDGPU-DISABLED-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 0 ; AMDGPU-DISABLED-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 0
; AMDGPU-DISABLED-NEXT: br i1 [[TMP2]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]] ; AMDGPU-DISABLED-NEXT: br i1 [[TMP2]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]]
; AMDGPU-DISABLED: omp_if.then: ; AMDGPU-DISABLED: omp_if.then:
; AMDGPU-DISABLED-NEXT: store i32 0, i32* @G, align 4 ; AMDGPU-DISABLED-NEXT: store i32 0, i32* @G, align 4
; AMDGPU-DISABLED-NEXT: call void @__kmpc_end_single(%struct.ident_t* noundef @[[GLOB2]], i32 [[TMP0]]) #[[ATTR3]] ; AMDGPU-DISABLED-NEXT: call void @__kmpc_end_single(%struct.ident_t* noundef @[[GLOB2]], i32 [[TMP0]]) #[[ATTR3]]
; AMDGPU-DISABLED-NEXT: br label [[OMP_IF_END]] ; AMDGPU-DISABLED-NEXT: br label [[OMP_IF_END]]
; AMDGPU-DISABLED: omp_if.end: ; AMDGPU-DISABLED: omp_if.end:
; AMDGPU-DISABLED-NEXT: call void @__kmpc_barrier(%struct.ident_t* noundef @[[GLOB3:[0-9]+]], i32 [[TMP0]]) #[[ATTR3]] ; AMDGPU-DISABLED-NEXT: call void @__kmpc_barrier(%struct.ident_t* noundef @[[GLOB3:[0-9]+]], i32 [[TMP0]]) #[[ATTR3]]
; AMDGPU-DISABLED-NEXT: ret void ; AMDGPU-DISABLED-NEXT: ret void
; ;
; ;
; AMDGPU-DISABLED: Function Attrs: convergent noinline nounwind ; AMDGPU-DISABLED: Function Attrs: convergent noinline nounwind
; AMDGPU-DISABLED-LABEL: define {{[^@]+}}@no_parallel_region_in_here ; AMDGPU-DISABLED-LABEL: define {{[^@]+}}@no_parallel_region_in_here
; AMDGPU-DISABLED-SAME: () #[[ATTR1]] { ; AMDGPU-DISABLED-SAME: () #[[ATTR1:[0-9]+]] {
; AMDGPU-DISABLED-NEXT: entry: ; AMDGPU-DISABLED-NEXT: entry:
; AMDGPU-DISABLED-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2]]) ; AMDGPU-DISABLED-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2]])
; AMDGPU-DISABLED-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_single(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]]) ; AMDGPU-DISABLED-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_single(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]])
; AMDGPU-DISABLED-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 0 ; AMDGPU-DISABLED-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 0
; AMDGPU-DISABLED-NEXT: br i1 [[TMP2]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]] ; AMDGPU-DISABLED-NEXT: br i1 [[TMP2]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]]
; AMDGPU-DISABLED: omp_if.then: ; AMDGPU-DISABLED: omp_if.then:
; AMDGPU-DISABLED-NEXT: store i32 0, i32* @G, align 4 ; AMDGPU-DISABLED-NEXT: store i32 0, i32* @G, align 4
; AMDGPU-DISABLED-NEXT: call void @__kmpc_end_single(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]]) ; AMDGPU-DISABLED-NEXT: call void @__kmpc_end_single(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]])
▲ Show 20 Lines • Show All 119 Lines • ▼ Show 20 Lines
; AMDGPU-DISABLED-NEXT: call void @no_parallel_region_in_here.internalized() #[[ATTR8]] ; AMDGPU-DISABLED-NEXT: call void @no_parallel_region_in_here.internalized() #[[ATTR8]]
; AMDGPU-DISABLED-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTGLOBAL_TID_]], align 4 ; AMDGPU-DISABLED-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTGLOBAL_TID_]], align 4
; AMDGPU-DISABLED-NEXT: [[TMP1:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** ; AMDGPU-DISABLED-NEXT: [[TMP1:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
; AMDGPU-DISABLED-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* noundef @[[GLOB1]], i32 [[TMP0]], i32 noundef 1, i32 noundef -1, i32 noundef -1, i8* noundef bitcast (void (i32*, i32*)* @__omp_outlined__5 to i8*), i8* noundef bitcast (void (i16, i32)* @__omp_outlined__5_wrapper to i8*), i8** noundef [[TMP1]], i64 noundef 0) ; AMDGPU-DISABLED-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* noundef @[[GLOB1]], i32 [[TMP0]], i32 noundef 1, i32 noundef -1, i32 noundef -1, i8* noundef bitcast (void (i32*, i32*)* @__omp_outlined__5 to i8*), i8* noundef bitcast (void (i16, i32)* @__omp_outlined__5_wrapper to i8*), i8** noundef [[TMP1]], i64 noundef 0)
; AMDGPU-DISABLED-NEXT: call void @simple_state_machine_interprocedural_after.internalized() #[[ATTR8]] ; AMDGPU-DISABLED-NEXT: call void @simple_state_machine_interprocedural_after.internalized() #[[ATTR8]]
; AMDGPU-DISABLED-NEXT: ret void ; AMDGPU-DISABLED-NEXT: ret void
; ;
; ;
; AMDGPU-DISABLED: Function Attrs: convergent noinline nounwind ; AMDGPU-DISABLED: Function Attrs: convergent noinline norecurse nounwind
; AMDGPU-DISABLED-LABEL: define {{[^@]+}}@simple_state_machine_interprocedural_before.internalized ; AMDGPU-DISABLED-LABEL: define {{[^@]+}}@simple_state_machine_interprocedural_before.internalized
; AMDGPU-DISABLED-SAME: () #[[ATTR1]] { ; AMDGPU-DISABLED-SAME: () #[[ATTR0]] {
; AMDGPU-DISABLED-NEXT: entry: ; AMDGPU-DISABLED-NEXT: entry:
; AMDGPU-DISABLED-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 8 ; AMDGPU-DISABLED-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 8
; AMDGPU-DISABLED-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* noundef @[[GLOB2]]) #[[ATTR3]] ; AMDGPU-DISABLED-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* noundef @[[GLOB2]]) #[[ATTR3]]
; AMDGPU-DISABLED-NEXT: [[TMP1:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** ; AMDGPU-DISABLED-NEXT: [[TMP1:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
; AMDGPU-DISABLED-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* noundef @[[GLOB2]], i32 [[TMP0]], i32 noundef 1, i32 noundef -1, i32 noundef -1, i8* noundef bitcast (void (i32*, i32*)* @__omp_outlined__17 to i8*), i8* noundef bitcast (void (i16, i32)* @__omp_outlined__17_wrapper to i8*), i8** noundef [[TMP1]], i64 noundef 0) ; AMDGPU-DISABLED-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* noundef @[[GLOB2]], i32 [[TMP0]], i32 noundef 1, i32 noundef -1, i32 noundef -1, i8* noundef bitcast (void (i32*, i32*)* @__omp_outlined__17 to i8*), i8* noundef bitcast (void (i16, i32)* @__omp_outlined__17_wrapper to i8*), i8** noundef [[TMP1]], i64 noundef 0)
; AMDGPU-DISABLED-NEXT: ret void ; AMDGPU-DISABLED-NEXT: ret void
; ;
; ;
Show All 26 Lines
; AMDGPU-DISABLED-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4 ; AMDGPU-DISABLED-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4
; AMDGPU-DISABLED-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 ; AMDGPU-DISABLED-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
; AMDGPU-DISABLED-NEXT: [[GLOBAL_ARGS:%.*]] = alloca i8**, align 8 ; AMDGPU-DISABLED-NEXT: [[GLOBAL_ARGS:%.*]] = alloca i8**, align 8
; AMDGPU-DISABLED-NEXT: call void @__kmpc_get_shared_variables(i8*** [[GLOBAL_ARGS]]) ; AMDGPU-DISABLED-NEXT: call void @__kmpc_get_shared_variables(i8*** [[GLOBAL_ARGS]])
; AMDGPU-DISABLED-NEXT: call void @__omp_outlined__5(i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTADDR1]], i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTZERO_ADDR]]) #[[ATTR3]] ; AMDGPU-DISABLED-NEXT: call void @__omp_outlined__5(i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTADDR1]], i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTZERO_ADDR]]) #[[ATTR3]]
; AMDGPU-DISABLED-NEXT: ret void ; AMDGPU-DISABLED-NEXT: ret void
; ;
; ;
; AMDGPU-DISABLED: Function Attrs: convergent noinline nounwind ; AMDGPU-DISABLED: Function Attrs: convergent noinline norecurse nounwind
; AMDGPU-DISABLED-LABEL: define {{[^@]+}}@simple_state_machine_interprocedural_after.internalized ; AMDGPU-DISABLED-LABEL: define {{[^@]+}}@simple_state_machine_interprocedural_after.internalized
; AMDGPU-DISABLED-SAME: () #[[ATTR1]] { ; AMDGPU-DISABLED-SAME: () #[[ATTR0]] {
; AMDGPU-DISABLED-NEXT: entry: ; AMDGPU-DISABLED-NEXT: entry:
; AMDGPU-DISABLED-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 8 ; AMDGPU-DISABLED-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 8
; AMDGPU-DISABLED-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* noundef @[[GLOB2]]) #[[ATTR3]] ; AMDGPU-DISABLED-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* noundef @[[GLOB2]]) #[[ATTR3]]
; AMDGPU-DISABLED-NEXT: [[TMP1:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** ; AMDGPU-DISABLED-NEXT: [[TMP1:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
; AMDGPU-DISABLED-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* noundef @[[GLOB2]], i32 [[TMP0]], i32 noundef 1, i32 noundef -1, i32 noundef -1, i8* noundef bitcast (void (i32*, i32*)* @__omp_outlined__18 to i8*), i8* noundef bitcast (void (i16, i32)* @__omp_outlined__18_wrapper to i8*), i8** noundef [[TMP1]], i64 noundef 0) ; AMDGPU-DISABLED-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* noundef @[[GLOB2]], i32 [[TMP0]], i32 noundef 1, i32 noundef -1, i32 noundef -1, i8* noundef bitcast (void (i32*, i32*)* @__omp_outlined__18 to i8*), i8* noundef bitcast (void (i16, i32)* @__omp_outlined__18_wrapper to i8*), i8** noundef [[TMP1]], i64 noundef 0)
; AMDGPU-DISABLED-NEXT: ret void ; AMDGPU-DISABLED-NEXT: ret void
; ;
; ;
▲ Show 20 Lines • Show All 281 Lines • ▼ Show 20 Lines
; AMDGPU-DISABLED-NEXT: entry: ; AMDGPU-DISABLED-NEXT: entry:
; AMDGPU-DISABLED-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 ; AMDGPU-DISABLED-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
; AMDGPU-DISABLED-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 ; AMDGPU-DISABLED-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
; AMDGPU-DISABLED-NEXT: [[CALL:%.*]] = call i32 bitcast (i32 (...)* @omp_get_thread_num to i32 ()*)() #[[ATTR10]] ; AMDGPU-DISABLED-NEXT: [[CALL:%.*]] = call i32 bitcast (i32 (...)* @omp_get_thread_num to i32 ()*)() #[[ATTR10]]
; AMDGPU-DISABLED-NEXT: call void @simple_state_machine_interprocedural_nested_recursive_after.internalized(i32 [[CALL]]) #[[ATTR8]] ; AMDGPU-DISABLED-NEXT: call void @simple_state_machine_interprocedural_nested_recursive_after.internalized(i32 [[CALL]]) #[[ATTR8]]
; AMDGPU-DISABLED-NEXT: ret void ; AMDGPU-DISABLED-NEXT: ret void
; ;
; ;
; AMDGPU-DISABLED: Function Attrs: convergent noinline nounwind ; AMDGPU-DISABLED: Function Attrs: convergent noinline norecurse nounwind
; AMDGPU-DISABLED-LABEL: define {{[^@]+}}@simple_state_machine_interprocedural_nested_recursive_after.internalized ; AMDGPU-DISABLED-LABEL: define {{[^@]+}}@simple_state_machine_interprocedural_nested_recursive_after.internalized
; AMDGPU-DISABLED-SAME: (i32 [[A:%.*]]) #[[ATTR1]] { ; AMDGPU-DISABLED-SAME: (i32 [[A:%.*]]) #[[ATTR0]] {
; AMDGPU-DISABLED-NEXT: entry: ; AMDGPU-DISABLED-NEXT: entry:
; AMDGPU-DISABLED-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 ; AMDGPU-DISABLED-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
; AMDGPU-DISABLED-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 ; AMDGPU-DISABLED-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
; AMDGPU-DISABLED-NEXT: [[CMP:%.*]] = icmp eq i32 [[A]], 0 ; AMDGPU-DISABLED-NEXT: [[CMP:%.*]] = icmp eq i32 [[A]], 0
; AMDGPU-DISABLED-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_END:%.*]] ; AMDGPU-DISABLED-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
; AMDGPU-DISABLED: if.then: ; AMDGPU-DISABLED: if.then:
; AMDGPU-DISABLED-NEXT: br label [[RETURN:%.*]] ; AMDGPU-DISABLED-NEXT: br label [[RETURN:%.*]]
; AMDGPU-DISABLED: if.end: ; AMDGPU-DISABLED: if.end:
; AMDGPU-DISABLED-NEXT: [[SUB:%.*]] = sub nsw i32 [[A]], 1 ; AMDGPU-DISABLED-NEXT: [[SUB:%.*]] = sub nsw i32 [[A]], 1
; AMDGPU-DISABLED-NEXT: call void @simple_state_machine_interprocedural_nested_recursive_after.internalized(i32 [[SUB]]) #[[ATTR8]] ; AMDGPU-DISABLED-NEXT: call void @simple_state_machine_interprocedural_nested_recursive_after.internalized(i32 [[SUB]]) #[[ATTR11:[0-9]+]]
; AMDGPU-DISABLED-NEXT: call void @simple_state_machine_interprocedural_nested_recursive_after_after.internalized() #[[ATTR8]] ; AMDGPU-DISABLED-NEXT: call void @simple_state_machine_interprocedural_nested_recursive_after_after.internalized() #[[ATTR8]]
; AMDGPU-DISABLED-NEXT: br label [[RETURN]] ; AMDGPU-DISABLED-NEXT: br label [[RETURN]]
; AMDGPU-DISABLED: return: ; AMDGPU-DISABLED: return:
; AMDGPU-DISABLED-NEXT: ret void ; AMDGPU-DISABLED-NEXT: ret void
; ;
; ;
; AMDGPU-DISABLED: Function Attrs: convergent noinline nounwind ; AMDGPU-DISABLED: Function Attrs: convergent noinline nounwind
; AMDGPU-DISABLED-LABEL: define {{[^@]+}}@simple_state_machine_interprocedural_nested_recursive_after ; AMDGPU-DISABLED-LABEL: define {{[^@]+}}@simple_state_machine_interprocedural_nested_recursive_after
▲ Show 20 Lines • Show All 92 Lines • ▼ Show 20 Lines
; AMDGPU-DISABLED-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4 ; AMDGPU-DISABLED-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4
; AMDGPU-DISABLED-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 ; AMDGPU-DISABLED-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
; AMDGPU-DISABLED-NEXT: [[GLOBAL_ARGS:%.*]] = alloca i8**, align 8 ; AMDGPU-DISABLED-NEXT: [[GLOBAL_ARGS:%.*]] = alloca i8**, align 8
; AMDGPU-DISABLED-NEXT: call void @__kmpc_get_shared_variables(i8*** [[GLOBAL_ARGS]]) ; AMDGPU-DISABLED-NEXT: call void @__kmpc_get_shared_variables(i8*** [[GLOBAL_ARGS]])
; AMDGPU-DISABLED-NEXT: call void @__omp_outlined__18(i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTADDR1]], i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTZERO_ADDR]]) #[[ATTR3]] ; AMDGPU-DISABLED-NEXT: call void @__omp_outlined__18(i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTADDR1]], i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTZERO_ADDR]]) #[[ATTR3]]
; AMDGPU-DISABLED-NEXT: ret void ; AMDGPU-DISABLED-NEXT: ret void
; ;
; ;
; AMDGPU-DISABLED: Function Attrs: convergent noinline nounwind ; AMDGPU-DISABLED: Function Attrs: convergent noinline norecurse nounwind
; AMDGPU-DISABLED-LABEL: define {{[^@]+}}@simple_state_machine_interprocedural_nested_recursive_after_after.internalized ; AMDGPU-DISABLED-LABEL: define {{[^@]+}}@simple_state_machine_interprocedural_nested_recursive_after_after.internalized
; AMDGPU-DISABLED-SAME: () #[[ATTR1]] { ; AMDGPU-DISABLED-SAME: () #[[ATTR0]] {
; AMDGPU-DISABLED-NEXT: entry: ; AMDGPU-DISABLED-NEXT: entry:
; AMDGPU-DISABLED-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 8 ; AMDGPU-DISABLED-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 8
; AMDGPU-DISABLED-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* noundef @[[GLOB2]]) #[[ATTR3]] ; AMDGPU-DISABLED-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* noundef @[[GLOB2]]) #[[ATTR3]]
; AMDGPU-DISABLED-NEXT: [[TMP1:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** ; AMDGPU-DISABLED-NEXT: [[TMP1:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
; AMDGPU-DISABLED-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* noundef @[[GLOB2]], i32 [[TMP0]], i32 noundef 1, i32 noundef -1, i32 noundef -1, i8* noundef bitcast (void (i32*, i32*)* @__omp_outlined__19 to i8*), i8* noundef bitcast (void (i16, i32)* @__omp_outlined__19_wrapper to i8*), i8** noundef [[TMP1]], i64 noundef 0) ; AMDGPU-DISABLED-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* noundef @[[GLOB2]], i32 [[TMP0]], i32 noundef 1, i32 noundef -1, i32 noundef -1, i8* noundef bitcast (void (i32*, i32*)* @__omp_outlined__19 to i8*), i8* noundef bitcast (void (i16, i32)* @__omp_outlined__19_wrapper to i8*), i8** noundef [[TMP1]], i64 noundef 0)
; AMDGPU-DISABLED-NEXT: ret void ; AMDGPU-DISABLED-NEXT: ret void
; ;
; ;
▲ Show 20 Lines • Show All 55 Lines • ▼ Show 20 Lines
; NVPTX-DISABLED-NEXT: entry: ; NVPTX-DISABLED-NEXT: entry:
; NVPTX-DISABLED-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 ; NVPTX-DISABLED-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
; NVPTX-DISABLED-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 ; NVPTX-DISABLED-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
; NVPTX-DISABLED-NEXT: call void @no_parallel_region_in_here.internalized() #[[ATTR8:[0-9]+]] ; NVPTX-DISABLED-NEXT: call void @no_parallel_region_in_here.internalized() #[[ATTR8:[0-9]+]]
; NVPTX-DISABLED-NEXT: call void @unknown_no_openmp() #[[ATTR9:[0-9]+]] ; NVPTX-DISABLED-NEXT: call void @unknown_no_openmp() #[[ATTR9:[0-9]+]]
; NVPTX-DISABLED-NEXT: ret void ; NVPTX-DISABLED-NEXT: ret void
; ;
; ;
; NVPTX-DISABLED: Function Attrs: convergent noinline nounwind ; NVPTX-DISABLED: Function Attrs: convergent noinline norecurse nounwind
; NVPTX-DISABLED-LABEL: define {{[^@]+}}@no_parallel_region_in_here.internalized ; NVPTX-DISABLED-LABEL: define {{[^@]+}}@no_parallel_region_in_here.internalized
; NVPTX-DISABLED-SAME: () #[[ATTR1:[0-9]+]] { ; NVPTX-DISABLED-SAME: () #[[ATTR0]] {
; NVPTX-DISABLED-NEXT: entry: ; NVPTX-DISABLED-NEXT: entry:
; NVPTX-DISABLED-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* noundef @[[GLOB2:[0-9]+]]) #[[ATTR3]] ; NVPTX-DISABLED-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* noundef @[[GLOB2:[0-9]+]]) #[[ATTR3]]
; NVPTX-DISABLED-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_single(%struct.ident_t* noundef @[[GLOB2]], i32 [[TMP0]]) #[[ATTR3]] ; NVPTX-DISABLED-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_single(%struct.ident_t* noundef @[[GLOB2]], i32 [[TMP0]]) #[[ATTR3]]
; NVPTX-DISABLED-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 0 ; NVPTX-DISABLED-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 0
; NVPTX-DISABLED-NEXT: br i1 [[TMP2]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]] ; NVPTX-DISABLED-NEXT: br i1 [[TMP2]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]]
; NVPTX-DISABLED: omp_if.then: ; NVPTX-DISABLED: omp_if.then:
; NVPTX-DISABLED-NEXT: store i32 0, i32* @G, align 4 ; NVPTX-DISABLED-NEXT: store i32 0, i32* @G, align 4
; NVPTX-DISABLED-NEXT: call void @__kmpc_end_single(%struct.ident_t* noundef @[[GLOB2]], i32 [[TMP0]]) #[[ATTR3]] ; NVPTX-DISABLED-NEXT: call void @__kmpc_end_single(%struct.ident_t* noundef @[[GLOB2]], i32 [[TMP0]]) #[[ATTR3]]
; NVPTX-DISABLED-NEXT: br label [[OMP_IF_END]] ; NVPTX-DISABLED-NEXT: br label [[OMP_IF_END]]
; NVPTX-DISABLED: omp_if.end: ; NVPTX-DISABLED: omp_if.end:
; NVPTX-DISABLED-NEXT: call void @__kmpc_barrier(%struct.ident_t* noundef @[[GLOB3:[0-9]+]], i32 [[TMP0]]) #[[ATTR3]] ; NVPTX-DISABLED-NEXT: call void @__kmpc_barrier(%struct.ident_t* noundef @[[GLOB3:[0-9]+]], i32 [[TMP0]]) #[[ATTR3]]
; NVPTX-DISABLED-NEXT: ret void ; NVPTX-DISABLED-NEXT: ret void
; ;
; ;
; NVPTX-DISABLED: Function Attrs: convergent noinline nounwind ; NVPTX-DISABLED: Function Attrs: convergent noinline nounwind
; NVPTX-DISABLED-LABEL: define {{[^@]+}}@no_parallel_region_in_here ; NVPTX-DISABLED-LABEL: define {{[^@]+}}@no_parallel_region_in_here
; NVPTX-DISABLED-SAME: () #[[ATTR1]] { ; NVPTX-DISABLED-SAME: () #[[ATTR1:[0-9]+]] {
; NVPTX-DISABLED-NEXT: entry: ; NVPTX-DISABLED-NEXT: entry:
; NVPTX-DISABLED-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2]]) ; NVPTX-DISABLED-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB2]])
; NVPTX-DISABLED-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_single(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]]) ; NVPTX-DISABLED-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_single(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]])
; NVPTX-DISABLED-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 0 ; NVPTX-DISABLED-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 0
; NVPTX-DISABLED-NEXT: br i1 [[TMP2]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]] ; NVPTX-DISABLED-NEXT: br i1 [[TMP2]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]]
; NVPTX-DISABLED: omp_if.then: ; NVPTX-DISABLED: omp_if.then:
; NVPTX-DISABLED-NEXT: store i32 0, i32* @G, align 4 ; NVPTX-DISABLED-NEXT: store i32 0, i32* @G, align 4
; NVPTX-DISABLED-NEXT: call void @__kmpc_end_single(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]]) ; NVPTX-DISABLED-NEXT: call void @__kmpc_end_single(%struct.ident_t* @[[GLOB2]], i32 [[TMP0]])
▲ Show 20 Lines • Show All 119 Lines • ▼ Show 20 Lines
; NVPTX-DISABLED-NEXT: call void @no_parallel_region_in_here.internalized() #[[ATTR8]] ; NVPTX-DISABLED-NEXT: call void @no_parallel_region_in_here.internalized() #[[ATTR8]]
; NVPTX-DISABLED-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTGLOBAL_TID_]], align 4 ; NVPTX-DISABLED-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTGLOBAL_TID_]], align 4
; NVPTX-DISABLED-NEXT: [[TMP1:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** ; NVPTX-DISABLED-NEXT: [[TMP1:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
; NVPTX-DISABLED-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* noundef @[[GLOB1]], i32 [[TMP0]], i32 noundef 1, i32 noundef -1, i32 noundef -1, i8* noundef bitcast (void (i32*, i32*)* @__omp_outlined__5 to i8*), i8* noundef bitcast (void (i16, i32)* @__omp_outlined__5_wrapper to i8*), i8** noundef [[TMP1]], i64 noundef 0) ; NVPTX-DISABLED-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* noundef @[[GLOB1]], i32 [[TMP0]], i32 noundef 1, i32 noundef -1, i32 noundef -1, i8* noundef bitcast (void (i32*, i32*)* @__omp_outlined__5 to i8*), i8* noundef bitcast (void (i16, i32)* @__omp_outlined__5_wrapper to i8*), i8** noundef [[TMP1]], i64 noundef 0)
; NVPTX-DISABLED-NEXT: call void @simple_state_machine_interprocedural_after.internalized() #[[ATTR8]] ; NVPTX-DISABLED-NEXT: call void @simple_state_machine_interprocedural_after.internalized() #[[ATTR8]]
; NVPTX-DISABLED-NEXT: ret void ; NVPTX-DISABLED-NEXT: ret void
; ;
; ;
; NVPTX-DISABLED: Function Attrs: convergent noinline nounwind ; NVPTX-DISABLED: Function Attrs: convergent noinline norecurse nounwind
; NVPTX-DISABLED-LABEL: define {{[^@]+}}@simple_state_machine_interprocedural_before.internalized ; NVPTX-DISABLED-LABEL: define {{[^@]+}}@simple_state_machine_interprocedural_before.internalized
; NVPTX-DISABLED-SAME: () #[[ATTR1]] { ; NVPTX-DISABLED-SAME: () #[[ATTR0]] {
; NVPTX-DISABLED-NEXT: entry: ; NVPTX-DISABLED-NEXT: entry:
; NVPTX-DISABLED-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 8 ; NVPTX-DISABLED-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 8
; NVPTX-DISABLED-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* noundef @[[GLOB2]]) #[[ATTR3]] ; NVPTX-DISABLED-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* noundef @[[GLOB2]]) #[[ATTR3]]
; NVPTX-DISABLED-NEXT: [[TMP1:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** ; NVPTX-DISABLED-NEXT: [[TMP1:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
; NVPTX-DISABLED-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* noundef @[[GLOB2]], i32 [[TMP0]], i32 noundef 1, i32 noundef -1, i32 noundef -1, i8* noundef bitcast (void (i32*, i32*)* @__omp_outlined__17 to i8*), i8* noundef bitcast (void (i16, i32)* @__omp_outlined__17_wrapper to i8*), i8** noundef [[TMP1]], i64 noundef 0) ; NVPTX-DISABLED-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* noundef @[[GLOB2]], i32 [[TMP0]], i32 noundef 1, i32 noundef -1, i32 noundef -1, i8* noundef bitcast (void (i32*, i32*)* @__omp_outlined__17 to i8*), i8* noundef bitcast (void (i16, i32)* @__omp_outlined__17_wrapper to i8*), i8** noundef [[TMP1]], i64 noundef 0)
; NVPTX-DISABLED-NEXT: ret void ; NVPTX-DISABLED-NEXT: ret void
; ;
; ;
Show All 26 Lines
; NVPTX-DISABLED-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4 ; NVPTX-DISABLED-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4
; NVPTX-DISABLED-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 ; NVPTX-DISABLED-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
; NVPTX-DISABLED-NEXT: [[GLOBAL_ARGS:%.*]] = alloca i8**, align 8 ; NVPTX-DISABLED-NEXT: [[GLOBAL_ARGS:%.*]] = alloca i8**, align 8
; NVPTX-DISABLED-NEXT: call void @__kmpc_get_shared_variables(i8*** [[GLOBAL_ARGS]]) ; NVPTX-DISABLED-NEXT: call void @__kmpc_get_shared_variables(i8*** [[GLOBAL_ARGS]])
; NVPTX-DISABLED-NEXT: call void @__omp_outlined__5(i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTADDR1]], i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTZERO_ADDR]]) #[[ATTR3]] ; NVPTX-DISABLED-NEXT: call void @__omp_outlined__5(i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTADDR1]], i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTZERO_ADDR]]) #[[ATTR3]]
; NVPTX-DISABLED-NEXT: ret void ; NVPTX-DISABLED-NEXT: ret void
; ;
; ;
; NVPTX-DISABLED: Function Attrs: convergent noinline nounwind ; NVPTX-DISABLED: Function Attrs: convergent noinline norecurse nounwind
; NVPTX-DISABLED-LABEL: define {{[^@]+}}@simple_state_machine_interprocedural_after.internalized ; NVPTX-DISABLED-LABEL: define {{[^@]+}}@simple_state_machine_interprocedural_after.internalized
; NVPTX-DISABLED-SAME: () #[[ATTR1]] { ; NVPTX-DISABLED-SAME: () #[[ATTR0]] {
; NVPTX-DISABLED-NEXT: entry: ; NVPTX-DISABLED-NEXT: entry:
; NVPTX-DISABLED-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 8 ; NVPTX-DISABLED-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 8
; NVPTX-DISABLED-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* noundef @[[GLOB2]]) #[[ATTR3]] ; NVPTX-DISABLED-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* noundef @[[GLOB2]]) #[[ATTR3]]
; NVPTX-DISABLED-NEXT: [[TMP1:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** ; NVPTX-DISABLED-NEXT: [[TMP1:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
; NVPTX-DISABLED-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* noundef @[[GLOB2]], i32 [[TMP0]], i32 noundef 1, i32 noundef -1, i32 noundef -1, i8* noundef bitcast (void (i32*, i32*)* @__omp_outlined__18 to i8*), i8* noundef bitcast (void (i16, i32)* @__omp_outlined__18_wrapper to i8*), i8** noundef [[TMP1]], i64 noundef 0) ; NVPTX-DISABLED-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* noundef @[[GLOB2]], i32 [[TMP0]], i32 noundef 1, i32 noundef -1, i32 noundef -1, i8* noundef bitcast (void (i32*, i32*)* @__omp_outlined__18 to i8*), i8* noundef bitcast (void (i16, i32)* @__omp_outlined__18_wrapper to i8*), i8** noundef [[TMP1]], i64 noundef 0)
; NVPTX-DISABLED-NEXT: ret void ; NVPTX-DISABLED-NEXT: ret void
; ;
; ;
▲ Show 20 Lines • Show All 281 Lines • ▼ Show 20 Lines
; NVPTX-DISABLED-NEXT: entry: ; NVPTX-DISABLED-NEXT: entry:
; NVPTX-DISABLED-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 ; NVPTX-DISABLED-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
; NVPTX-DISABLED-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 ; NVPTX-DISABLED-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
; NVPTX-DISABLED-NEXT: [[CALL:%.*]] = call i32 bitcast (i32 (...)* @omp_get_thread_num to i32 ()*)() #[[ATTR10]] ; NVPTX-DISABLED-NEXT: [[CALL:%.*]] = call i32 bitcast (i32 (...)* @omp_get_thread_num to i32 ()*)() #[[ATTR10]]
; NVPTX-DISABLED-NEXT: call void @simple_state_machine_interprocedural_nested_recursive_after.internalized(i32 [[CALL]]) #[[ATTR8]] ; NVPTX-DISABLED-NEXT: call void @simple_state_machine_interprocedural_nested_recursive_after.internalized(i32 [[CALL]]) #[[ATTR8]]
; NVPTX-DISABLED-NEXT: ret void ; NVPTX-DISABLED-NEXT: ret void
; ;
; ;
; NVPTX-DISABLED: Function Attrs: convergent noinline nounwind ; NVPTX-DISABLED: Function Attrs: convergent noinline norecurse nounwind
; NVPTX-DISABLED-LABEL: define {{[^@]+}}@simple_state_machine_interprocedural_nested_recursive_after.internalized ; NVPTX-DISABLED-LABEL: define {{[^@]+}}@simple_state_machine_interprocedural_nested_recursive_after.internalized
; NVPTX-DISABLED-SAME: (i32 [[A:%.*]]) #[[ATTR1]] { ; NVPTX-DISABLED-SAME: (i32 [[A:%.*]]) #[[ATTR0]] {
; NVPTX-DISABLED-NEXT: entry: ; NVPTX-DISABLED-NEXT: entry:
; NVPTX-DISABLED-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 ; NVPTX-DISABLED-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
; NVPTX-DISABLED-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 ; NVPTX-DISABLED-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
; NVPTX-DISABLED-NEXT: [[CMP:%.*]] = icmp eq i32 [[A]], 0 ; NVPTX-DISABLED-NEXT: [[CMP:%.*]] = icmp eq i32 [[A]], 0
; NVPTX-DISABLED-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_END:%.*]] ; NVPTX-DISABLED-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
; NVPTX-DISABLED: if.then: ; NVPTX-DISABLED: if.then:
; NVPTX-DISABLED-NEXT: br label [[RETURN:%.*]] ; NVPTX-DISABLED-NEXT: br label [[RETURN:%.*]]
; NVPTX-DISABLED: if.end: ; NVPTX-DISABLED: if.end:
; NVPTX-DISABLED-NEXT: [[SUB:%.*]] = sub nsw i32 [[A]], 1 ; NVPTX-DISABLED-NEXT: [[SUB:%.*]] = sub nsw i32 [[A]], 1
; NVPTX-DISABLED-NEXT: call void @simple_state_machine_interprocedural_nested_recursive_after.internalized(i32 [[SUB]]) #[[ATTR8]] ; NVPTX-DISABLED-NEXT: call void @simple_state_machine_interprocedural_nested_recursive_after.internalized(i32 [[SUB]]) #[[ATTR11:[0-9]+]]
; NVPTX-DISABLED-NEXT: call void @simple_state_machine_interprocedural_nested_recursive_after_after.internalized() #[[ATTR8]] ; NVPTX-DISABLED-NEXT: call void @simple_state_machine_interprocedural_nested_recursive_after_after.internalized() #[[ATTR8]]
; NVPTX-DISABLED-NEXT: br label [[RETURN]] ; NVPTX-DISABLED-NEXT: br label [[RETURN]]
; NVPTX-DISABLED: return: ; NVPTX-DISABLED: return:
; NVPTX-DISABLED-NEXT: ret void ; NVPTX-DISABLED-NEXT: ret void
; ;
; ;
; NVPTX-DISABLED: Function Attrs: convergent noinline nounwind ; NVPTX-DISABLED: Function Attrs: convergent noinline nounwind
; NVPTX-DISABLED-LABEL: define {{[^@]+}}@simple_state_machine_interprocedural_nested_recursive_after ; NVPTX-DISABLED-LABEL: define {{[^@]+}}@simple_state_machine_interprocedural_nested_recursive_after
▲ Show 20 Lines • Show All 92 Lines • ▼ Show 20 Lines
; NVPTX-DISABLED-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4 ; NVPTX-DISABLED-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4
; NVPTX-DISABLED-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 ; NVPTX-DISABLED-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
; NVPTX-DISABLED-NEXT: [[GLOBAL_ARGS:%.*]] = alloca i8**, align 8 ; NVPTX-DISABLED-NEXT: [[GLOBAL_ARGS:%.*]] = alloca i8**, align 8
; NVPTX-DISABLED-NEXT: call void @__kmpc_get_shared_variables(i8*** [[GLOBAL_ARGS]]) ; NVPTX-DISABLED-NEXT: call void @__kmpc_get_shared_variables(i8*** [[GLOBAL_ARGS]])
; NVPTX-DISABLED-NEXT: call void @__omp_outlined__18(i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTADDR1]], i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTZERO_ADDR]]) #[[ATTR3]] ; NVPTX-DISABLED-NEXT: call void @__omp_outlined__18(i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTADDR1]], i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTZERO_ADDR]]) #[[ATTR3]]
; NVPTX-DISABLED-NEXT: ret void ; NVPTX-DISABLED-NEXT: ret void
; ;
; ;
; NVPTX-DISABLED: Function Attrs: convergent noinline nounwind ; NVPTX-DISABLED: Function Attrs: convergent noinline norecurse nounwind
; NVPTX-DISABLED-LABEL: define {{[^@]+}}@simple_state_machine_interprocedural_nested_recursive_after_after.internalized ; NVPTX-DISABLED-LABEL: define {{[^@]+}}@simple_state_machine_interprocedural_nested_recursive_after_after.internalized
; NVPTX-DISABLED-SAME: () #[[ATTR1]] { ; NVPTX-DISABLED-SAME: () #[[ATTR0]] {
; NVPTX-DISABLED-NEXT: entry: ; NVPTX-DISABLED-NEXT: entry:
; NVPTX-DISABLED-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 8 ; NVPTX-DISABLED-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 8
; NVPTX-DISABLED-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* noundef @[[GLOB2]]) #[[ATTR3]] ; NVPTX-DISABLED-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* noundef @[[GLOB2]]) #[[ATTR3]]
; NVPTX-DISABLED-NEXT: [[TMP1:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** ; NVPTX-DISABLED-NEXT: [[TMP1:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
; NVPTX-DISABLED-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* noundef @[[GLOB2]], i32 [[TMP0]], i32 noundef 1, i32 noundef -1, i32 noundef -1, i8* noundef bitcast (void (i32*, i32*)* @__omp_outlined__19 to i8*), i8* noundef bitcast (void (i16, i32)* @__omp_outlined__19_wrapper to i8*), i8** noundef [[TMP1]], i64 noundef 0) ; NVPTX-DISABLED-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* noundef @[[GLOB2]], i32 [[TMP0]], i32 noundef 1, i32 noundef -1, i32 noundef -1, i8* noundef bitcast (void (i32*, i32*)* @__omp_outlined__19 to i8*), i8* noundef bitcast (void (i16, i32)* @__omp_outlined__19_wrapper to i8*), i8** noundef [[TMP1]], i64 noundef 0)
; NVPTX-DISABLED-NEXT: ret void ; NVPTX-DISABLED-NEXT: ret void
; ;
; ;
Show All 33 Lines

llvm/test/Transforms/OpenMP/remove_globalization.ll

Show All 24 Lines
; CHECK: @[[S:[a-zA-Z0-9_$"\\.-]+]] = external local_unnamed_addr global i8* ; CHECK: @[[S:[a-zA-Z0-9_$"\\.-]+]] = external local_unnamed_addr global i8*
;. ;.
; CHECK-DISABLED: @[[S:[a-zA-Z0-9_$"\\.-]+]] = external local_unnamed_addr global i8* ; CHECK-DISABLED: @[[S:[a-zA-Z0-9_$"\\.-]+]] = external local_unnamed_addr global i8*
;. ;.
define void @kernel() { define void @kernel() {
; CHECK-LABEL: define {{[^@]+}}@kernel() { ; CHECK-LABEL: define {{[^@]+}}@kernel() {
; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* nonnull null, i8 1, i1 false, i1 true) ; CHECK-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* nonnull null, i8 1, i1 false, i1 true)
; CHECK-NEXT: call void @foo() #[[ATTR4:[0-9]+]] ; CHECK-NEXT: call void @foo() #[[ATTR3:[0-9]+]]
; CHECK-NEXT: call void @bar() #[[ATTR4]] ; CHECK-NEXT: call void @bar() #[[ATTR3]]
; CHECK-NEXT: call void @unknown_no_openmp() #[[ATTR3:[0-9]+]] ; CHECK-NEXT: call void @unknown_no_openmp() #[[ATTR2:[0-9]+]]
; CHECK-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* nonnull null, i8 1, i1 true) ; CHECK-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* nonnull null, i8 1, i1 true)
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
; CHECK-DISABLED-LABEL: define {{[^@]+}}@kernel() { ; CHECK-DISABLED-LABEL: define {{[^@]+}}@kernel() {
; CHECK-DISABLED-NEXT: entry: ; CHECK-DISABLED-NEXT: entry:
; CHECK-DISABLED-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* nonnull null, i8 1, i1 false, i1 true) ; CHECK-DISABLED-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* nonnull null, i8 1, i1 false, i1 true)
; CHECK-DISABLED-NEXT: call void @foo() #[[ATTR4:[0-9]+]] ; CHECK-DISABLED-NEXT: call void @foo() #[[ATTR3:[0-9]+]]
; CHECK-DISABLED-NEXT: call void @bar() #[[ATTR4]] ; CHECK-DISABLED-NEXT: call void @bar() #[[ATTR3]]
; CHECK-DISABLED-NEXT: call void @unknown_no_openmp() #[[ATTR3:[0-9]+]] ; CHECK-DISABLED-NEXT: call void @unknown_no_openmp() #[[ATTR2:[0-9]+]]
; CHECK-DISABLED-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* nonnull null, i8 1, i1 true) ; CHECK-DISABLED-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* nonnull null, i8 1, i1 true)
; CHECK-DISABLED-NEXT: ret void ; CHECK-DISABLED-NEXT: ret void
; ;
entry: entry:
%0 = call i32 @__kmpc_target_init(%struct.ident_t* nonnull null, i8 1, i1 true, i1 true) %0 = call i32 @__kmpc_target_init(%struct.ident_t* nonnull null, i8 1, i1 true, i1 true)
call void @foo() call void @foo()
call void @bar() call void @bar()
call void @unknown_no_openmp() call void @unknown_no_openmp()
Show All 20 Linesentry:
call void @__kmpc_free_shared(i8* %0, i64 4) call void @__kmpc_free_shared(i8* %0, i64 4)
ret void ret void
} }
define internal void @bar() { define internal void @bar() {
; CHECK-LABEL: define {{[^@]+}}@bar ; CHECK-LABEL: define {{[^@]+}}@bar
; CHECK-SAME: () #[[ATTR0]] { ; CHECK-SAME: () #[[ATTR0]] {
; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = call i8* @__kmpc_alloc_shared(i64 noundef 4) #[[ATTR4]], !dbg [[DBG8:![0-9]+]] ; CHECK-NEXT: [[TMP0:%.*]] = call i8* @__kmpc_alloc_shared(i64 noundef 4) #[[ATTR3]], !dbg [[DBG8:![0-9]+]]
; CHECK-NEXT: call void @share(i8* nofree writeonly [[TMP0]]) #[[ATTR5:[0-9]+]] ; CHECK-NEXT: call void @share(i8* nofree writeonly [[TMP0]]) #[[ATTR4:[0-9]+]]
; CHECK-NEXT: call void @__kmpc_free_shared(i8* [[TMP0]], i64 noundef 4) #[[ATTR4]] ; CHECK-NEXT: call void @__kmpc_free_shared(i8* [[TMP0]], i64 noundef 4) #[[ATTR3]]
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
; CHECK-DISABLED-LABEL: define {{[^@]+}}@bar ; CHECK-DISABLED-LABEL: define {{[^@]+}}@bar
; CHECK-DISABLED-SAME: () #[[ATTR0]] { ; CHECK-DISABLED-SAME: () #[[ATTR0]] {
; CHECK-DISABLED-NEXT: entry: ; CHECK-DISABLED-NEXT: entry:
; CHECK-DISABLED-NEXT: [[TMP0:%.*]] = call i8* @__kmpc_alloc_shared(i64 noundef 4) #[[ATTR4]], !dbg [[DBG8:![0-9]+]] ; CHECK-DISABLED-NEXT: [[TMP0:%.*]] = call i8* @__kmpc_alloc_shared(i64 noundef 4) #[[ATTR3]], !dbg [[DBG8:![0-9]+]]
; CHECK-DISABLED-NEXT: call void @share(i8* nofree writeonly [[TMP0]]) #[[ATTR5:[0-9]+]] ; CHECK-DISABLED-NEXT: call void @share(i8* nofree writeonly [[TMP0]]) #[[ATTR4:[0-9]+]]
; CHECK-DISABLED-NEXT: call void @__kmpc_free_shared(i8* [[TMP0]], i64 noundef 4) #[[ATTR4]] ; CHECK-DISABLED-NEXT: call void @__kmpc_free_shared(i8* [[TMP0]], i64 noundef 4) #[[ATTR3]]
; CHECK-DISABLED-NEXT: ret void ; CHECK-DISABLED-NEXT: ret void
; ;
entry: entry:
%0 = call i8* @__kmpc_alloc_shared(i64 4), !dbg !13 %0 = call i8* @__kmpc_alloc_shared(i64 4), !dbg !13
call void @share(i8* %0) call void @share(i8* %0)
call void @__kmpc_free_shared(i8* %0, i64 4) call void @__kmpc_free_shared(i8* %0, i64 4)
ret void ret void
} }
define internal void @use(i8* %x) { define internal void @use(i8* %x) {
; CHECK-LABEL: define {{[^@]+}}@use
; CHECK-SAME: (i8* noalias nocapture nofree readnone [[X:%.*]]) #[[ATTR1:[0-9]+]] {
; CHECK-NEXT: entry:
; CHECK-NEXT: ret void
;
; CHECK-DISABLED-LABEL: define {{[^@]+}}@use
; CHECK-DISABLED-SAME: (i8* noalias nocapture nofree readnone [[X:%.*]]) #[[ATTR1:[0-9]+]] {
; CHECK-DISABLED-NEXT: entry:
; CHECK-DISABLED-NEXT: ret void
;
entry: entry:
ret void ret void
} }
define internal void @share(i8* %x) { define internal void @share(i8* %x) {
; CHECK-LABEL: define {{[^@]+}}@share ; CHECK-LABEL: define {{[^@]+}}@share
; CHECK-SAME: (i8* nofree writeonly [[X:%.*]]) #[[ATTR2:[0-9]+]] { ; CHECK-SAME: (i8* nofree writeonly [[X:%.*]]) #[[ATTR1:[0-9]+]] {
; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: store i8* [[X]], i8** @S, align 8 ; CHECK-NEXT: store i8* [[X]], i8** @S, align 8
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
; CHECK-DISABLED-LABEL: define {{[^@]+}}@share ; CHECK-DISABLED-LABEL: define {{[^@]+}}@share
; CHECK-DISABLED-SAME: (i8* nofree writeonly [[X:%.*]]) #[[ATTR2:[0-9]+]] { ; CHECK-DISABLED-SAME: (i8* nofree writeonly [[X:%.*]]) #[[ATTR1:[0-9]+]] {
; CHECK-DISABLED-NEXT: entry: ; CHECK-DISABLED-NEXT: entry:
; CHECK-DISABLED-NEXT: store i8* [[X]], i8** @S, align 8 ; CHECK-DISABLED-NEXT: store i8* [[X]], i8** @S, align 8
; CHECK-DISABLED-NEXT: ret void ; CHECK-DISABLED-NEXT: ret void
; ;
entry: entry:
store i8* %x, i8** @S store i8* %x, i8** @S
ret void ret void
} }
define void @unused() { define void @unused() {
; CHECK-LABEL: define {{[^@]+}}@unused() { ; CHECK-LABEL: define {{[^@]+}}@unused() {
; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = alloca i8, i64 4, align 1 ; CHECK-NEXT: [[TMP0:%.*]] = alloca i8, i64 4, align 1
; CHECK-NEXT: call void @use(i8* noalias readnone undef)
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
; CHECK-DISABLED-LABEL: define {{[^@]+}}@unused() { ; CHECK-DISABLED-LABEL: define {{[^@]+}}@unused() {
; CHECK-DISABLED-NEXT: entry: ; CHECK-DISABLED-NEXT: entry:
; CHECK-DISABLED-NEXT: [[TMP0:%.*]] = call i8* @__kmpc_alloc_shared(i64 4), !dbg [[DBG11:![0-9]+]] ; CHECK-DISABLED-NEXT: [[TMP0:%.*]] = call i8* @__kmpc_alloc_shared(i64 4) #[[ATTR3]], !dbg [[DBG11:![0-9]+]]
; CHECK-DISABLED-NEXT: call void @use(i8* noalias readnone [[TMP0]]) ; CHECK-DISABLED-NEXT: call void @__kmpc_free_shared(i8* [[TMP0]], i64 4) #[[ATTR3]]
; CHECK-DISABLED-NEXT: call void @__kmpc_free_shared(i8* [[TMP0]], i64 4)
; CHECK-DISABLED-NEXT: ret void ; CHECK-DISABLED-NEXT: ret void
; ;
entry: entry:
%0 = call i8* @__kmpc_alloc_shared(i64 4), !dbg !14 %0 = call i8* @__kmpc_alloc_shared(i64 4), !dbg !14
call void @use(i8* %0) call void @use(i8* %0)
call void @__kmpc_free_shared(i8* %0, i64 4) call void @__kmpc_free_shared(i8* %0, i64 4)
ret void ret void
} }
Show All 22 Lines
!9 = distinct !DISubprogram(name: "bar", scope: !1, file: !1, line: 1, type: !11, scopeLine: 1, flags: DIFlagPrototyped, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !0, retainedNodes: !2) !9 = distinct !DISubprogram(name: "bar", scope: !1, file: !1, line: 1, type: !11, scopeLine: 1, flags: DIFlagPrototyped, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !0, retainedNodes: !2)
!10 = distinct !DISubprogram(name: "unused", scope: !1, file: !1, line: 1, type: !11, scopeLine: 1, flags: DIFlagPrototyped, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !0, retainedNodes: !2) !10 = distinct !DISubprogram(name: "unused", scope: !1, file: !1, line: 1, type: !11, scopeLine: 1, flags: DIFlagPrototyped, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !0, retainedNodes: !2)
!11 = !DISubroutineType(types: !2) !11 = !DISubroutineType(types: !2)
!12 = !DILocation(line: 2, column: 2, scope: !8) !12 = !DILocation(line: 2, column: 2, scope: !8)
!13 = !DILocation(line: 4, column: 2, scope: !9) !13 = !DILocation(line: 4, column: 2, scope: !9)
!14 = !DILocation(line: 6, column: 2, scope: !9) !14 = !DILocation(line: 6, column: 2, scope: !9)
;. ;.
; CHECK: attributes #[[ATTR0]] = { nosync nounwind } ; CHECK: attributes #[[ATTR0]] = { nosync nounwind }
; CHECK: attributes #[[ATTR1]] = { nofree nosync nounwind readnone willreturn } ; CHECK: attributes #[[ATTR1]] = { nofree norecurse nosync nounwind willreturn writeonly }
; CHECK: attributes #[[ATTR2]] = { nofree nosync nounwind willreturn writeonly } ; CHECK: attributes #[[ATTR2]] = { "llvm.assume"="omp_no_openmp" }
; CHECK: attributes #[[ATTR3]] = { "llvm.assume"="omp_no_openmp" } ; CHECK: attributes #[[ATTR3]] = { nounwind }
; CHECK: attributes #[[ATTR4]] = { nounwind } ; CHECK: attributes #[[ATTR4]] = { nosync nounwind writeonly }
; CHECK: attributes #[[ATTR5]] = { nosync nounwind writeonly }
;. ;.
; CHECK-DISABLED: attributes #[[ATTR0]] = { nosync nounwind } ; CHECK-DISABLED: attributes #[[ATTR0]] = { nosync nounwind }
; CHECK-DISABLED: attributes #[[ATTR1]] = { nofree nosync nounwind readnone willreturn } ; CHECK-DISABLED: attributes #[[ATTR1]] = { nofree norecurse nosync nounwind willreturn writeonly }
; CHECK-DISABLED: attributes #[[ATTR2]] = { nofree nosync nounwind willreturn writeonly } ; CHECK-DISABLED: attributes #[[ATTR2]] = { "llvm.assume"="omp_no_openmp" }
; CHECK-DISABLED: attributes #[[ATTR3]] = { "llvm.assume"="omp_no_openmp" } ; CHECK-DISABLED: attributes #[[ATTR3]] = { nounwind }
; CHECK-DISABLED: attributes #[[ATTR4]] = { nounwind } ; CHECK-DISABLED: attributes #[[ATTR4]] = { nosync nounwind writeonly }
; CHECK-DISABLED: attributes #[[ATTR5]] = { nosync nounwind writeonly }
;. ;.
; CHECK: [[META0:![0-9]+]] = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "clang version 13.0.0", isOptimized: false, runtimeVersion: 0, emissionKind: FullDebug, enums: !2, splitDebugInlining: false, nameTableKind: None) ; CHECK: [[META0:![0-9]+]] = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "clang version 13.0.0", isOptimized: false, runtimeVersion: 0, emissionKind: FullDebug, enums: !2, splitDebugInlining: false, nameTableKind: None)
; CHECK: [[META1:![0-9]+]] = !DIFile(filename: "remove_globalization.c", directory: "/tmp/remove_globalization.c") ; CHECK: [[META1:![0-9]+]] = !DIFile(filename: "remove_globalization.c", directory: "/tmp/remove_globalization.c")
; CHECK: [[META2:![0-9]+]] = !{} ; CHECK: [[META2:![0-9]+]] = !{}
; CHECK: [[META3:![0-9]+]] = !{i32 2, !"Debug Info Version", i32 3} ; CHECK: [[META3:![0-9]+]] = !{i32 2, !"Debug Info Version", i32 3}
; CHECK: [[META4:![0-9]+]] = !{i32 1, !"wchar_size", i32 4} ; CHECK: [[META4:![0-9]+]] = !{i32 1, !"wchar_size", i32 4}
; CHECK: [[META5:![0-9]+]] = !{i32 7, !"openmp", i32 50} ; CHECK: [[META5:![0-9]+]] = !{i32 7, !"openmp", i32 50}
; CHECK: [[META6:![0-9]+]] = !{i32 7, !"openmp-device", i32 50} ; CHECK: [[META6:![0-9]+]] = !{i32 7, !"openmp-device", i32 50}
Show All 18 Lines

llvm/test/Transforms/OpenMP/replace_globalization.ll

Show First 20 Lines • Show All 161 Lines • ▼ Show 20 Lines
; CHECK-NEXT: call void @use.internalized(i8* nofree writeonly align 4 [[Z]]) #[[ATTR6]] ; CHECK-NEXT: call void @use.internalized(i8* nofree writeonly align 4 [[Z]]) #[[ATTR6]]
; CHECK-NEXT: call void @__kmpc_free_shared(i8* [[Z]], i64 24) #[[ATTR5]] ; CHECK-NEXT: call void @__kmpc_free_shared(i8* [[Z]], i64 24) #[[ATTR5]]
; CHECK-NEXT: br label [[EXIT]] ; CHECK-NEXT: br label [[EXIT]]
; CHECK: exit: ; CHECK: exit:
; CHECK-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2, i1 true) ; CHECK-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2, i1 true)
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
; ;
; CHECK: Function Attrs: nofree nosync nounwind willreturn writeonly ; CHECK: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly
; CHECK-LABEL: define {{[^@]+}}@use.internalized ; CHECK-LABEL: define {{[^@]+}}@use.internalized
; CHECK-SAME: (i8* nofree writeonly align 4 [[X:%.*]]) #[[ATTR0:[0-9]+]] { ; CHECK-SAME: (i8* nofree writeonly align 4 [[X:%.*]]) #[[ATTR0:[0-9]+]] {
; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: store i8* [[X]], i8** @S, align 8 ; CHECK-NEXT: store i8* [[X]], i8** @S, align 8
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
; ;
; CHECK-LABEL: define {{[^@]+}}@use ; CHECK-LABEL: define {{[^@]+}}@use
; CHECK-SAME: (i8* [[X:%.*]]) { ; CHECK-SAME: (i8* [[X:%.*]]) {
; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: store i8* [[X]], i8** @S, align 8 ; CHECK-NEXT: store i8* [[X]], i8** @S, align 8
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
;. ;.
; CHECK: attributes #[[ATTR0]] = { nofree nosync nounwind willreturn writeonly } ; CHECK: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind willreturn writeonly }
; CHECK: attributes #[[ATTR1:[0-9]+]] = { nosync nounwind } ; CHECK: attributes #[[ATTR1:[0-9]+]] = { nosync nounwind }
; CHECK: attributes #[[ATTR2:[0-9]+]] = { nounwind readnone speculatable } ; CHECK: attributes #[[ATTR2:[0-9]+]] = { nounwind readnone speculatable }
; CHECK: attributes #[[ATTR3:[0-9]+]] = { nofree nosync nounwind readnone speculatable willreturn } ; CHECK: attributes #[[ATTR3:[0-9]+]] = { nofree nosync nounwind readnone speculatable willreturn }
; CHECK: attributes #[[ATTR4]] = { "llvm.assume"="omp_no_openmp" } ; CHECK: attributes #[[ATTR4]] = { "llvm.assume"="omp_no_openmp" }
; CHECK: attributes #[[ATTR5]] = { nounwind } ; CHECK: attributes #[[ATTR5]] = { nounwind }
; CHECK: attributes #[[ATTR6]] = { nounwind writeonly } ; CHECK: attributes #[[ATTR6]] = { nounwind writeonly }
;. ;.
; CHECK: [[META0:![0-9]+]] = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "clang version 12.0.0", isOptimized: false, runtimeVersion: 0, emissionKind: FullDebug, enums: !2, splitDebugInlining: false, nameTableKind: None) ; CHECK: [[META0:![0-9]+]] = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "clang version 12.0.0", isOptimized: false, runtimeVersion: 0, emissionKind: FullDebug, enums: !2, splitDebugInlining: false, nameTableKind: None)
Show All 12 Lines

llvm/test/Transforms/OpenMP/spmdization.ll

Show First 20 Lines • Show All 172 Lines • ▼ Show 20 Lines
; AMDGPU-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 ; AMDGPU-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
; AMDGPU-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 ; AMDGPU-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
; AMDGPU-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false, i1 false) ; AMDGPU-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false, i1 false)
; AMDGPU-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 ; AMDGPU-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
; AMDGPU-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[COMMON_RET:%.*]] ; AMDGPU-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[COMMON_RET:%.*]]
; AMDGPU: common.ret: ; AMDGPU: common.ret:
; AMDGPU-NEXT: ret void ; AMDGPU-NEXT: ret void
; AMDGPU: user_code.entry: ; AMDGPU: user_code.entry:
; AMDGPU-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) #[[ATTR3:[0-9]+]] ; AMDGPU-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) #[[ATTR2:[0-9]+]]
; AMDGPU-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4, !tbaa [[TBAA18:![0-9]+]] ; AMDGPU-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4, !tbaa [[TBAA18:![0-9]+]]
; AMDGPU-NEXT: call void @__omp_outlined__(i32* noalias nocapture noundef nonnull readonly align 4 dereferenceable(4) [[DOTTHREADID_TEMP_]], i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTZERO_ADDR]]) #[[ATTR3]] ; AMDGPU-NEXT: call void @__omp_outlined__(i32* noalias nocapture noundef nonnull readonly align 4 dereferenceable(4) [[DOTTHREADID_TEMP_]], i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTZERO_ADDR]]) #[[ATTR2]]
; AMDGPU-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) ; AMDGPU-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2, i1 false)
; AMDGPU-NEXT: br label [[COMMON_RET]] ; AMDGPU-NEXT: br label [[COMMON_RET]]
; ;
; NVPTX-LABEL: define {{[^@]+}}@__omp_offloading_fd02_2044372e_sequential_loop_l5 ; NVPTX-LABEL: define {{[^@]+}}@__omp_offloading_fd02_2044372e_sequential_loop_l5
; NVPTX-SAME: () #[[ATTR0:[0-9]+]] { ; NVPTX-SAME: () #[[ATTR0:[0-9]+]] {
; NVPTX-NEXT: entry: ; NVPTX-NEXT: entry:
; NVPTX-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 ; NVPTX-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
; NVPTX-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 ; NVPTX-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
; NVPTX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false, i1 false) ; NVPTX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false, i1 false)
; NVPTX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 ; NVPTX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
; NVPTX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[COMMON_RET:%.*]] ; NVPTX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[COMMON_RET:%.*]]
; NVPTX: common.ret: ; NVPTX: common.ret:
; NVPTX-NEXT: ret void ; NVPTX-NEXT: ret void
; NVPTX: user_code.entry: ; NVPTX: user_code.entry:
; NVPTX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) #[[ATTR3:[0-9]+]] ; NVPTX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) #[[ATTR2:[0-9]+]]
; NVPTX-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4, !tbaa [[TBAA18:![0-9]+]] ; NVPTX-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4, !tbaa [[TBAA18:![0-9]+]]
; NVPTX-NEXT: call void @__omp_outlined__(i32* noalias nocapture noundef nonnull readonly align 4 dereferenceable(4) [[DOTTHREADID_TEMP_]], i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTZERO_ADDR]]) #[[ATTR3]] ; NVPTX-NEXT: call void @__omp_outlined__(i32* noalias nocapture noundef nonnull readonly align 4 dereferenceable(4) [[DOTTHREADID_TEMP_]], i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTZERO_ADDR]]) #[[ATTR2]]
; NVPTX-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) ; NVPTX-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2, i1 false)
; NVPTX-NEXT: br label [[COMMON_RET]] ; NVPTX-NEXT: br label [[COMMON_RET]]
; ;
; AMDGPU-DISABLED-LABEL: define {{[^@]+}}@__omp_offloading_fd02_2044372e_sequential_loop_l5 ; AMDGPU-DISABLED-LABEL: define {{[^@]+}}@__omp_offloading_fd02_2044372e_sequential_loop_l5
; AMDGPU-DISABLED-SAME: () #[[ATTR0:[0-9]+]] { ; AMDGPU-DISABLED-SAME: () #[[ATTR0:[0-9]+]] {
; AMDGPU-DISABLED-NEXT: entry: ; AMDGPU-DISABLED-NEXT: entry:
; AMDGPU-DISABLED-NEXT: [[WORKER_WORK_FN_ADDR:%.*]] = alloca i8*, align 8, addrspace(5) ; AMDGPU-DISABLED-NEXT: [[WORKER_WORK_FN_ADDR:%.*]] = alloca i8*, align 8, addrspace(5)
; AMDGPU-DISABLED-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 ; AMDGPU-DISABLED-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
Show All 35 Lines
; AMDGPU-DISABLED-NEXT: call void @__kmpc_barrier_simple_generic(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]]) ; AMDGPU-DISABLED-NEXT: call void @__kmpc_barrier_simple_generic(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
; AMDGPU-DISABLED-NEXT: br label [[WORKER_STATE_MACHINE_BEGIN]] ; AMDGPU-DISABLED-NEXT: br label [[WORKER_STATE_MACHINE_BEGIN]]
; AMDGPU-DISABLED: thread.user_code.check: ; AMDGPU-DISABLED: thread.user_code.check:
; AMDGPU-DISABLED-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 ; AMDGPU-DISABLED-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
; AMDGPU-DISABLED-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[COMMON_RET:%.*]] ; AMDGPU-DISABLED-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[COMMON_RET:%.*]]
; AMDGPU-DISABLED: common.ret: ; AMDGPU-DISABLED: common.ret:
; AMDGPU-DISABLED-NEXT: ret void ; AMDGPU-DISABLED-NEXT: ret void
; AMDGPU-DISABLED: user_code.entry: ; AMDGPU-DISABLED: user_code.entry:
; AMDGPU-DISABLED-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) #[[ATTR3:[0-9]+]] ; AMDGPU-DISABLED-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) #[[ATTR2:[0-9]+]]
; AMDGPU-DISABLED-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4, !tbaa [[TBAA18:![0-9]+]] ; AMDGPU-DISABLED-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4, !tbaa [[TBAA18:![0-9]+]]
; AMDGPU-DISABLED-NEXT: call void @__omp_outlined__(i32* noalias nocapture noundef nonnull readonly align 4 dereferenceable(4) [[DOTTHREADID_TEMP_]], i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTZERO_ADDR]]) #[[ATTR3]] ; AMDGPU-DISABLED-NEXT: call void @__omp_outlined__(i32* noalias nocapture noundef nonnull readonly align 4 dereferenceable(4) [[DOTTHREADID_TEMP_]], i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTZERO_ADDR]]) #[[ATTR2]]
; AMDGPU-DISABLED-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 1, i1 true) ; AMDGPU-DISABLED-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 1, i1 true)
; AMDGPU-DISABLED-NEXT: br label [[COMMON_RET]] ; AMDGPU-DISABLED-NEXT: br label [[COMMON_RET]]
; ;
; NVPTX-DISABLED-LABEL: define {{[^@]+}}@__omp_offloading_fd02_2044372e_sequential_loop_l5 ; NVPTX-DISABLED-LABEL: define {{[^@]+}}@__omp_offloading_fd02_2044372e_sequential_loop_l5
; NVPTX-DISABLED-SAME: () #[[ATTR0:[0-9]+]] { ; NVPTX-DISABLED-SAME: () #[[ATTR0:[0-9]+]] {
; NVPTX-DISABLED-NEXT: entry: ; NVPTX-DISABLED-NEXT: entry:
; NVPTX-DISABLED-NEXT: [[WORKER_WORK_FN_ADDR:%.*]] = alloca i8*, align 8 ; NVPTX-DISABLED-NEXT: [[WORKER_WORK_FN_ADDR:%.*]] = alloca i8*, align 8
; NVPTX-DISABLED-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 ; NVPTX-DISABLED-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
Show All 34 Lines
; NVPTX-DISABLED-NEXT: call void @__kmpc_barrier_simple_generic(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]]) ; NVPTX-DISABLED-NEXT: call void @__kmpc_barrier_simple_generic(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
; NVPTX-DISABLED-NEXT: br label [[WORKER_STATE_MACHINE_BEGIN]] ; NVPTX-DISABLED-NEXT: br label [[WORKER_STATE_MACHINE_BEGIN]]
; NVPTX-DISABLED: thread.user_code.check: ; NVPTX-DISABLED: thread.user_code.check:
; NVPTX-DISABLED-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 ; NVPTX-DISABLED-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
; NVPTX-DISABLED-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[COMMON_RET:%.*]] ; NVPTX-DISABLED-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[COMMON_RET:%.*]]
; NVPTX-DISABLED: common.ret: ; NVPTX-DISABLED: common.ret:
; NVPTX-DISABLED-NEXT: ret void ; NVPTX-DISABLED-NEXT: ret void
; NVPTX-DISABLED: user_code.entry: ; NVPTX-DISABLED: user_code.entry:
; NVPTX-DISABLED-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) #[[ATTR3:[0-9]+]] ; NVPTX-DISABLED-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) #[[ATTR2:[0-9]+]]
; NVPTX-DISABLED-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4, !tbaa [[TBAA18:![0-9]+]] ; NVPTX-DISABLED-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4, !tbaa [[TBAA18:![0-9]+]]
; NVPTX-DISABLED-NEXT: call void @__omp_outlined__(i32* noalias nocapture noundef nonnull readonly align 4 dereferenceable(4) [[DOTTHREADID_TEMP_]], i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTZERO_ADDR]]) #[[ATTR3]] ; NVPTX-DISABLED-NEXT: call void @__omp_outlined__(i32* noalias nocapture noundef nonnull readonly align 4 dereferenceable(4) [[DOTTHREADID_TEMP_]], i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTZERO_ADDR]]) #[[ATTR2]]
; NVPTX-DISABLED-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 1, i1 true) ; NVPTX-DISABLED-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 1, i1 true)
; NVPTX-DISABLED-NEXT: br label [[COMMON_RET]] ; NVPTX-DISABLED-NEXT: br label [[COMMON_RET]]
; ;
entry: entry:
%.zero.addr = alloca i32, align 4 %.zero.addr = alloca i32, align 4
%.threadid_temp. = alloca i32, align 4 %.threadid_temp. = alloca i32, align 4
%0 = call i32 @__kmpc_target_init(%struct.ident_t* @1, i8 1, i1 true, i1 true) %0 = call i32 @__kmpc_target_init(%struct.ident_t* @1, i8 1, i1 true, i1 true)
%exec_user_code = icmp eq i32 %0, -1 %exec_user_code = icmp eq i32 %0, -1
Show All 18 Lines
; AMDGPU-NEXT: entry: ; AMDGPU-NEXT: entry:
; AMDGPU-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 8 ; AMDGPU-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 8
; AMDGPU-NEXT: br label [[FOR_COND:%.*]] ; AMDGPU-NEXT: br label [[FOR_COND:%.*]]
; AMDGPU: for.cond: ; AMDGPU: for.cond:
; AMDGPU-NEXT: [[I_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INC:%.*]], [[FOR_BODY:%.*]] ] ; AMDGPU-NEXT: [[I_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INC:%.*]], [[FOR_BODY:%.*]] ]
; AMDGPU-NEXT: [[CMP:%.*]] = icmp slt i32 [[I_0]], 100 ; AMDGPU-NEXT: [[CMP:%.*]] = icmp slt i32 [[I_0]], 100
; AMDGPU-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_COND_CLEANUP:%.*]] ; AMDGPU-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_COND_CLEANUP:%.*]]
; AMDGPU: for.cond.cleanup: ; AMDGPU: for.cond.cleanup:
; AMDGPU-NEXT: call void @spmd_amenable() #[[ATTR6:[0-9]+]] ; AMDGPU-NEXT: call void @spmd_amenable() #[[ATTR5:[0-9]+]]
; AMDGPU-NEXT: ret void ; AMDGPU-NEXT: ret void
; AMDGPU: for.body: ; AMDGPU: for.body:
; AMDGPU-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTGLOBAL_TID_]], align 4, !tbaa [[TBAA18]] ; AMDGPU-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTGLOBAL_TID_]], align 4, !tbaa [[TBAA18]]
; AMDGPU-NEXT: [[TMP1:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** ; AMDGPU-NEXT: [[TMP1:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
; AMDGPU-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* noundef @[[GLOB1]], i32 [[TMP0]], i32 noundef 1, i32 noundef -1, i32 noundef -1, i8* noundef bitcast (void (i32*, i32*)* @__omp_outlined__1 to i8*), i8* noundef bitcast (void (i16, i32)* @__omp_outlined__1_wrapper to i8*), i8** noundef [[TMP1]], i64 noundef 0) ; AMDGPU-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* noundef @[[GLOB1]], i32 [[TMP0]], i32 noundef 1, i32 noundef -1, i32 noundef -1, i8* noundef bitcast (void (i32*, i32*)* @__omp_outlined__1 to i8*), i8* noundef bitcast (void (i16, i32)* @__omp_outlined__1_wrapper to i8*), i8** noundef [[TMP1]], i64 noundef 0)
; AMDGPU-NEXT: [[INC]] = add nsw i32 [[I_0]], 1 ; AMDGPU-NEXT: [[INC]] = add nsw i32 [[I_0]], 1
; AMDGPU-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]] ; AMDGPU-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]]
; ;
; NVPTX-LABEL: define {{[^@]+}}@__omp_outlined__ ; NVPTX-LABEL: define {{[^@]+}}@__omp_outlined__
; NVPTX-SAME: (i32* noalias nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[DOTGLOBAL_TID_:%.*]], i32* noalias nocapture nofree nonnull readnone align 4 dereferenceable(4) [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] { ; NVPTX-SAME: (i32* noalias nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[DOTGLOBAL_TID_:%.*]], i32* noalias nocapture nofree nonnull readnone align 4 dereferenceable(4) [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] {
; NVPTX-NEXT: entry: ; NVPTX-NEXT: entry:
; NVPTX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 8 ; NVPTX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 8
; NVPTX-NEXT: br label [[FOR_COND:%.*]] ; NVPTX-NEXT: br label [[FOR_COND:%.*]]
; NVPTX: for.cond: ; NVPTX: for.cond:
; NVPTX-NEXT: [[I_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INC:%.*]], [[FOR_BODY:%.*]] ] ; NVPTX-NEXT: [[I_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INC:%.*]], [[FOR_BODY:%.*]] ]
; NVPTX-NEXT: [[CMP:%.*]] = icmp slt i32 [[I_0]], 100 ; NVPTX-NEXT: [[CMP:%.*]] = icmp slt i32 [[I_0]], 100
; NVPTX-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_COND_CLEANUP:%.*]] ; NVPTX-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_COND_CLEANUP:%.*]]
; NVPTX: for.cond.cleanup: ; NVPTX: for.cond.cleanup:
; NVPTX-NEXT: call void @spmd_amenable() #[[ATTR6:[0-9]+]] ; NVPTX-NEXT: call void @spmd_amenable() #[[ATTR5:[0-9]+]]
; NVPTX-NEXT: ret void ; NVPTX-NEXT: ret void
; NVPTX: for.body: ; NVPTX: for.body:
; NVPTX-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTGLOBAL_TID_]], align 4, !tbaa [[TBAA18]] ; NVPTX-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTGLOBAL_TID_]], align 4, !tbaa [[TBAA18]]
; NVPTX-NEXT: [[TMP1:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** ; NVPTX-NEXT: [[TMP1:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
; NVPTX-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* noundef @[[GLOB1]], i32 [[TMP0]], i32 noundef 1, i32 noundef -1, i32 noundef -1, i8* noundef bitcast (void (i32*, i32*)* @__omp_outlined__1 to i8*), i8* noundef bitcast (void (i16, i32)* @__omp_outlined__1_wrapper to i8*), i8** noundef [[TMP1]], i64 noundef 0) ; NVPTX-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* noundef @[[GLOB1]], i32 [[TMP0]], i32 noundef 1, i32 noundef -1, i32 noundef -1, i8* noundef bitcast (void (i32*, i32*)* @__omp_outlined__1 to i8*), i8* noundef bitcast (void (i16, i32)* @__omp_outlined__1_wrapper to i8*), i8** noundef [[TMP1]], i64 noundef 0)
; NVPTX-NEXT: [[INC]] = add nsw i32 [[I_0]], 1 ; NVPTX-NEXT: [[INC]] = add nsw i32 [[I_0]], 1
; NVPTX-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]] ; NVPTX-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]]
; ;
; AMDGPU-DISABLED-LABEL: define {{[^@]+}}@__omp_outlined__ ; AMDGPU-DISABLED-LABEL: define {{[^@]+}}@__omp_outlined__
; AMDGPU-DISABLED-SAME: (i32* noalias nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[DOTGLOBAL_TID_:%.*]], i32* noalias nocapture nofree nonnull readnone align 4 dereferenceable(4) [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] { ; AMDGPU-DISABLED-SAME: (i32* noalias nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[DOTGLOBAL_TID_:%.*]], i32* noalias nocapture nofree nonnull readnone align 4 dereferenceable(4) [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] {
; AMDGPU-DISABLED-NEXT: entry: ; AMDGPU-DISABLED-NEXT: entry:
; AMDGPU-DISABLED-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 8 ; AMDGPU-DISABLED-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 8
; AMDGPU-DISABLED-NEXT: br label [[FOR_COND:%.*]] ; AMDGPU-DISABLED-NEXT: br label [[FOR_COND:%.*]]
; AMDGPU-DISABLED: for.cond: ; AMDGPU-DISABLED: for.cond:
; AMDGPU-DISABLED-NEXT: [[I_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INC:%.*]], [[FOR_BODY:%.*]] ] ; AMDGPU-DISABLED-NEXT: [[I_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INC:%.*]], [[FOR_BODY:%.*]] ]
; AMDGPU-DISABLED-NEXT: [[CMP:%.*]] = icmp slt i32 [[I_0]], 100 ; AMDGPU-DISABLED-NEXT: [[CMP:%.*]] = icmp slt i32 [[I_0]], 100
; AMDGPU-DISABLED-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_COND_CLEANUP:%.*]] ; AMDGPU-DISABLED-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_COND_CLEANUP:%.*]]
; AMDGPU-DISABLED: for.cond.cleanup: ; AMDGPU-DISABLED: for.cond.cleanup:
; AMDGPU-DISABLED-NEXT: call void @spmd_amenable() #[[ATTR6:[0-9]+]] ; AMDGPU-DISABLED-NEXT: call void @spmd_amenable() #[[ATTR5:[0-9]+]]
; AMDGPU-DISABLED-NEXT: ret void ; AMDGPU-DISABLED-NEXT: ret void
; AMDGPU-DISABLED: for.body: ; AMDGPU-DISABLED: for.body:
; AMDGPU-DISABLED-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTGLOBAL_TID_]], align 4, !tbaa [[TBAA18]] ; AMDGPU-DISABLED-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTGLOBAL_TID_]], align 4, !tbaa [[TBAA18]]
; AMDGPU-DISABLED-NEXT: [[TMP1:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** ; AMDGPU-DISABLED-NEXT: [[TMP1:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
; AMDGPU-DISABLED-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* noundef @[[GLOB1]], i32 [[TMP0]], i32 noundef 1, i32 noundef -1, i32 noundef -1, i8* noundef bitcast (void (i32*, i32*)* @__omp_outlined__1 to i8*), i8* noundef @__omp_outlined__1_wrapper.ID, i8** noundef [[TMP1]], i64 noundef 0) ; AMDGPU-DISABLED-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* noundef @[[GLOB1]], i32 [[TMP0]], i32 noundef 1, i32 noundef -1, i32 noundef -1, i8* noundef bitcast (void (i32*, i32*)* @__omp_outlined__1 to i8*), i8* noundef @__omp_outlined__1_wrapper.ID, i8** noundef [[TMP1]], i64 noundef 0)
; AMDGPU-DISABLED-NEXT: [[INC]] = add nsw i32 [[I_0]], 1 ; AMDGPU-DISABLED-NEXT: [[INC]] = add nsw i32 [[I_0]], 1
; AMDGPU-DISABLED-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]] ; AMDGPU-DISABLED-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]]
; ;
; NVPTX-DISABLED-LABEL: define {{[^@]+}}@__omp_outlined__ ; NVPTX-DISABLED-LABEL: define {{[^@]+}}@__omp_outlined__
; NVPTX-DISABLED-SAME: (i32* noalias nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[DOTGLOBAL_TID_:%.*]], i32* noalias nocapture nofree nonnull readnone align 4 dereferenceable(4) [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] { ; NVPTX-DISABLED-SAME: (i32* noalias nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[DOTGLOBAL_TID_:%.*]], i32* noalias nocapture nofree nonnull readnone align 4 dereferenceable(4) [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] {
; NVPTX-DISABLED-NEXT: entry: ; NVPTX-DISABLED-NEXT: entry:
; NVPTX-DISABLED-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 8 ; NVPTX-DISABLED-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 8
; NVPTX-DISABLED-NEXT: br label [[FOR_COND:%.*]] ; NVPTX-DISABLED-NEXT: br label [[FOR_COND:%.*]]
; NVPTX-DISABLED: for.cond: ; NVPTX-DISABLED: for.cond:
; NVPTX-DISABLED-NEXT: [[I_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INC:%.*]], [[FOR_BODY:%.*]] ] ; NVPTX-DISABLED-NEXT: [[I_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INC:%.*]], [[FOR_BODY:%.*]] ]
; NVPTX-DISABLED-NEXT: [[CMP:%.*]] = icmp slt i32 [[I_0]], 100 ; NVPTX-DISABLED-NEXT: [[CMP:%.*]] = icmp slt i32 [[I_0]], 100
; NVPTX-DISABLED-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_COND_CLEANUP:%.*]] ; NVPTX-DISABLED-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_COND_CLEANUP:%.*]]
; NVPTX-DISABLED: for.cond.cleanup: ; NVPTX-DISABLED: for.cond.cleanup:
; NVPTX-DISABLED-NEXT: call void @spmd_amenable() #[[ATTR6:[0-9]+]] ; NVPTX-DISABLED-NEXT: call void @spmd_amenable() #[[ATTR5:[0-9]+]]
; NVPTX-DISABLED-NEXT: ret void ; NVPTX-DISABLED-NEXT: ret void
; NVPTX-DISABLED: for.body: ; NVPTX-DISABLED: for.body:
; NVPTX-DISABLED-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTGLOBAL_TID_]], align 4, !tbaa [[TBAA18]] ; NVPTX-DISABLED-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTGLOBAL_TID_]], align 4, !tbaa [[TBAA18]]
; NVPTX-DISABLED-NEXT: [[TMP1:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** ; NVPTX-DISABLED-NEXT: [[TMP1:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
; NVPTX-DISABLED-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* noundef @[[GLOB1]], i32 [[TMP0]], i32 noundef 1, i32 noundef -1, i32 noundef -1, i8* noundef bitcast (void (i32*, i32*)* @__omp_outlined__1 to i8*), i8* noundef @__omp_outlined__1_wrapper.ID, i8** noundef [[TMP1]], i64 noundef 0) ; NVPTX-DISABLED-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* noundef @[[GLOB1]], i32 [[TMP0]], i32 noundef 1, i32 noundef -1, i32 noundef -1, i8* noundef bitcast (void (i32*, i32*)* @__omp_outlined__1 to i8*), i8* noundef @__omp_outlined__1_wrapper.ID, i8** noundef [[TMP1]], i64 noundef 0)
; NVPTX-DISABLED-NEXT: [[INC]] = add nsw i32 [[I_0]], 1 ; NVPTX-DISABLED-NEXT: [[INC]] = add nsw i32 [[I_0]], 1
; NVPTX-DISABLED-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]] ; NVPTX-DISABLED-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]]
; ;
Show All 18 Linesfor.body: ; preds = %for.cond
br label %for.cond, !llvm.loop !22 br label %for.cond, !llvm.loop !22
} }
; Function Attrs: alwaysinline convergent norecurse nounwind ; Function Attrs: alwaysinline convergent norecurse nounwind
define internal void @__omp_outlined__1(i32* noalias %.global_tid., i32* noalias %.bound_tid.) #0 { define internal void @__omp_outlined__1(i32* noalias %.global_tid., i32* noalias %.bound_tid.) #0 {
; AMDGPU-LABEL: define {{[^@]+}}@__omp_outlined__1 ; AMDGPU-LABEL: define {{[^@]+}}@__omp_outlined__1
; AMDGPU-SAME: (i32* noalias nocapture nofree readnone [[DOTGLOBAL_TID_:%.*]], i32* noalias nocapture nofree readnone [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] { ; AMDGPU-SAME: (i32* noalias nocapture nofree readnone [[DOTGLOBAL_TID_:%.*]], i32* noalias nocapture nofree readnone [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] {
; AMDGPU-NEXT: entry: ; AMDGPU-NEXT: entry:
; AMDGPU-NEXT: call void @unknown() #[[ATTR7:[0-9]+]] ; AMDGPU-NEXT: call void @unknown() #[[ATTR6:[0-9]+]]
; AMDGPU-NEXT: ret void ; AMDGPU-NEXT: ret void
; ;
; NVPTX-LABEL: define {{[^@]+}}@__omp_outlined__1 ; NVPTX-LABEL: define {{[^@]+}}@__omp_outlined__1
; NVPTX-SAME: (i32* noalias nocapture nofree readnone [[DOTGLOBAL_TID_:%.*]], i32* noalias nocapture nofree readnone [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] { ; NVPTX-SAME: (i32* noalias nocapture nofree readnone [[DOTGLOBAL_TID_:%.*]], i32* noalias nocapture nofree readnone [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] {
; NVPTX-NEXT: entry: ; NVPTX-NEXT: entry:
; NVPTX-NEXT: call void @unknown() #[[ATTR7:[0-9]+]] ; NVPTX-NEXT: call void @unknown() #[[ATTR6:[0-9]+]]
; NVPTX-NEXT: ret void ; NVPTX-NEXT: ret void
; ;
; AMDGPU-DISABLED-LABEL: define {{[^@]+}}@__omp_outlined__1 ; AMDGPU-DISABLED-LABEL: define {{[^@]+}}@__omp_outlined__1
; AMDGPU-DISABLED-SAME: (i32* noalias nocapture nofree readnone [[DOTGLOBAL_TID_:%.*]], i32* noalias nocapture nofree readnone [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] { ; AMDGPU-DISABLED-SAME: (i32* noalias nocapture nofree readnone [[DOTGLOBAL_TID_:%.*]], i32* noalias nocapture nofree readnone [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] {
; AMDGPU-DISABLED-NEXT: entry: ; AMDGPU-DISABLED-NEXT: entry:
; AMDGPU-DISABLED-NEXT: call void @unknown() #[[ATTR7:[0-9]+]] ; AMDGPU-DISABLED-NEXT: call void @unknown() #[[ATTR6:[0-9]+]]
; AMDGPU-DISABLED-NEXT: ret void ; AMDGPU-DISABLED-NEXT: ret void
; ;
; NVPTX-DISABLED-LABEL: define {{[^@]+}}@__omp_outlined__1 ; NVPTX-DISABLED-LABEL: define {{[^@]+}}@__omp_outlined__1
; NVPTX-DISABLED-SAME: (i32* noalias nocapture nofree readnone [[DOTGLOBAL_TID_:%.*]], i32* noalias nocapture nofree readnone [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] { ; NVPTX-DISABLED-SAME: (i32* noalias nocapture nofree readnone [[DOTGLOBAL_TID_:%.*]], i32* noalias nocapture nofree readnone [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] {
; NVPTX-DISABLED-NEXT: entry: ; NVPTX-DISABLED-NEXT: entry:
; NVPTX-DISABLED-NEXT: call void @unknown() #[[ATTR7:[0-9]+]] ; NVPTX-DISABLED-NEXT: call void @unknown() #[[ATTR6:[0-9]+]]
; NVPTX-DISABLED-NEXT: ret void ; NVPTX-DISABLED-NEXT: ret void
; ;
entry: entry:
call void @unknown() #11 call void @unknown() #11
ret void ret void
} }
; Function Attrs: convergent norecurse nounwind ; Function Attrs: convergent norecurse nounwind
define internal void @__omp_outlined__1_wrapper(i16 zeroext %0, i32 %1) #3 { define internal void @__omp_outlined__1_wrapper(i16 zeroext %0, i32 %1) #3 {
; AMDGPU-LABEL: define {{[^@]+}}@__omp_outlined__1_wrapper ; AMDGPU-LABEL: define {{[^@]+}}@__omp_outlined__1_wrapper
; AMDGPU-SAME: (i16 zeroext [[TMP0:%.*]], i32 [[TMP1:%.*]]) #[[ATTR1:[0-9]+]] { ; AMDGPU-SAME: (i16 zeroext [[TMP0:%.*]], i32 [[TMP1:%.*]]) #[[ATTR1:[0-9]+]] {
; AMDGPU-NEXT: entry: ; AMDGPU-NEXT: entry:
; AMDGPU-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4 ; AMDGPU-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4
; AMDGPU-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 ; AMDGPU-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
; AMDGPU-NEXT: [[GLOBAL_ARGS:%.*]] = alloca i8**, align 8 ; AMDGPU-NEXT: [[GLOBAL_ARGS:%.*]] = alloca i8**, align 8
; AMDGPU-NEXT: call void @__kmpc_get_shared_variables(i8*** [[GLOBAL_ARGS]]) ; AMDGPU-NEXT: call void @__kmpc_get_shared_variables(i8*** [[GLOBAL_ARGS]])
; AMDGPU-NEXT: call void @__omp_outlined__1(i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTADDR1]], i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTZERO_ADDR]]) #[[ATTR3]] ; AMDGPU-NEXT: call void @__omp_outlined__1(i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTADDR1]], i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTZERO_ADDR]]) #[[ATTR2]]
; AMDGPU-NEXT: ret void ; AMDGPU-NEXT: ret void
; ;
; NVPTX-LABEL: define {{[^@]+}}@__omp_outlined__1_wrapper ; NVPTX-LABEL: define {{[^@]+}}@__omp_outlined__1_wrapper
; NVPTX-SAME: (i16 zeroext [[TMP0:%.*]], i32 [[TMP1:%.*]]) #[[ATTR1:[0-9]+]] { ; NVPTX-SAME: (i16 zeroext [[TMP0:%.*]], i32 [[TMP1:%.*]]) #[[ATTR1:[0-9]+]] {
; NVPTX-NEXT: entry: ; NVPTX-NEXT: entry:
; NVPTX-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4 ; NVPTX-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4
; NVPTX-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 ; NVPTX-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
; NVPTX-NEXT: [[GLOBAL_ARGS:%.*]] = alloca i8**, align 8 ; NVPTX-NEXT: [[GLOBAL_ARGS:%.*]] = alloca i8**, align 8
; NVPTX-NEXT: call void @__kmpc_get_shared_variables(i8*** [[GLOBAL_ARGS]]) ; NVPTX-NEXT: call void @__kmpc_get_shared_variables(i8*** [[GLOBAL_ARGS]])
; NVPTX-NEXT: call void @__omp_outlined__1(i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTADDR1]], i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTZERO_ADDR]]) #[[ATTR3]] ; NVPTX-NEXT: call void @__omp_outlined__1(i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTADDR1]], i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTZERO_ADDR]]) #[[ATTR2]]
; NVPTX-NEXT: ret void ; NVPTX-NEXT: ret void
; ;
; AMDGPU-DISABLED-LABEL: define {{[^@]+}}@__omp_outlined__1_wrapper ; AMDGPU-DISABLED-LABEL: define {{[^@]+}}@__omp_outlined__1_wrapper
; AMDGPU-DISABLED-SAME: (i16 zeroext [[TMP0:%.*]], i32 [[TMP1:%.*]]) #[[ATTR1:[0-9]+]] { ; AMDGPU-DISABLED-SAME: (i16 zeroext [[TMP0:%.*]], i32 [[TMP1:%.*]]) #[[ATTR1:[0-9]+]] {
; AMDGPU-DISABLED-NEXT: entry: ; AMDGPU-DISABLED-NEXT: entry:
; AMDGPU-DISABLED-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4 ; AMDGPU-DISABLED-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4
; AMDGPU-DISABLED-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 ; AMDGPU-DISABLED-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
; AMDGPU-DISABLED-NEXT: [[GLOBAL_ARGS:%.*]] = alloca i8**, align 8 ; AMDGPU-DISABLED-NEXT: [[GLOBAL_ARGS:%.*]] = alloca i8**, align 8
; AMDGPU-DISABLED-NEXT: call void @__kmpc_get_shared_variables(i8*** [[GLOBAL_ARGS]]) ; AMDGPU-DISABLED-NEXT: call void @__kmpc_get_shared_variables(i8*** [[GLOBAL_ARGS]])
; AMDGPU-DISABLED-NEXT: call void @__omp_outlined__1(i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTADDR1]], i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTZERO_ADDR]]) #[[ATTR3]] ; AMDGPU-DISABLED-NEXT: call void @__omp_outlined__1(i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTADDR1]], i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTZERO_ADDR]]) #[[ATTR2]]
; AMDGPU-DISABLED-NEXT: ret void ; AMDGPU-DISABLED-NEXT: ret void
; ;
; NVPTX-DISABLED-LABEL: define {{[^@]+}}@__omp_outlined__1_wrapper ; NVPTX-DISABLED-LABEL: define {{[^@]+}}@__omp_outlined__1_wrapper
; NVPTX-DISABLED-SAME: (i16 zeroext [[TMP0:%.*]], i32 [[TMP1:%.*]]) #[[ATTR1:[0-9]+]] { ; NVPTX-DISABLED-SAME: (i16 zeroext [[TMP0:%.*]], i32 [[TMP1:%.*]]) #[[ATTR1:[0-9]+]] {
; NVPTX-DISABLED-NEXT: entry: ; NVPTX-DISABLED-NEXT: entry:
; NVPTX-DISABLED-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4 ; NVPTX-DISABLED-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4
; NVPTX-DISABLED-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 ; NVPTX-DISABLED-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
; NVPTX-DISABLED-NEXT: [[GLOBAL_ARGS:%.*]] = alloca i8**, align 8 ; NVPTX-DISABLED-NEXT: [[GLOBAL_ARGS:%.*]] = alloca i8**, align 8
; NVPTX-DISABLED-NEXT: call void @__kmpc_get_shared_variables(i8*** [[GLOBAL_ARGS]]) ; NVPTX-DISABLED-NEXT: call void @__kmpc_get_shared_variables(i8*** [[GLOBAL_ARGS]])
; NVPTX-DISABLED-NEXT: call void @__omp_outlined__1(i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTADDR1]], i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTZERO_ADDR]]) #[[ATTR3]] ; NVPTX-DISABLED-NEXT: call void @__omp_outlined__1(i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTADDR1]], i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTZERO_ADDR]]) #[[ATTR2]]
; NVPTX-DISABLED-NEXT: ret void ; NVPTX-DISABLED-NEXT: ret void
; ;
entry: entry:
%.addr1 = alloca i32, align 4 %.addr1 = alloca i32, align 4
%.zero.addr = alloca i32, align 4 %.zero.addr = alloca i32, align 4
%global_args = alloca i8**, align 8 %global_args = alloca i8**, align 8
store i32 %1, i32* %.addr1, align 4, !tbaa !18 store i32 %1, i32* %.addr1, align 4, !tbaa !18
store i32 0, i32* %.zero.addr, align 4 store i32 0, i32* %.zero.addr, align 4
Show All 10 Lines
; AMDGPU-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 ; AMDGPU-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
; AMDGPU-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 ; AMDGPU-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
; AMDGPU-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false, i1 false) ; AMDGPU-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false, i1 false)
; AMDGPU-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 ; AMDGPU-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
; AMDGPU-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[COMMON_RET:%.*]] ; AMDGPU-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[COMMON_RET:%.*]]
; AMDGPU: common.ret: ; AMDGPU: common.ret:
; AMDGPU-NEXT: ret void ; AMDGPU-NEXT: ret void
; AMDGPU: user_code.entry: ; AMDGPU: user_code.entry:
; AMDGPU-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) #[[ATTR3]] ; AMDGPU-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) #[[ATTR2]]
; AMDGPU-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4, !tbaa [[TBAA18]] ; AMDGPU-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4, !tbaa [[TBAA18]]
; AMDGPU-NEXT: call void @__omp_outlined__2(i32* noalias nocapture noundef nonnull readonly align 4 dereferenceable(4) [[DOTTHREADID_TEMP_]], i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTZERO_ADDR]]) #[[ATTR3]] ; AMDGPU-NEXT: call void @__omp_outlined__2(i32* noalias nocapture noundef nonnull readonly align 4 dereferenceable(4) [[DOTTHREADID_TEMP_]], i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTZERO_ADDR]]) #[[ATTR2]]
; AMDGPU-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) ; AMDGPU-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2, i1 false)
; AMDGPU-NEXT: br label [[COMMON_RET]] ; AMDGPU-NEXT: br label [[COMMON_RET]]
; ;
; NVPTX-LABEL: define {{[^@]+}}@__omp_offloading_fd02_2044372e_sequential_loop_to_stack_var_l20 ; NVPTX-LABEL: define {{[^@]+}}@__omp_offloading_fd02_2044372e_sequential_loop_to_stack_var_l20
; NVPTX-SAME: () #[[ATTR0]] { ; NVPTX-SAME: () #[[ATTR0]] {
; NVPTX-NEXT: entry: ; NVPTX-NEXT: entry:
; NVPTX-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 ; NVPTX-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
; NVPTX-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 ; NVPTX-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
; NVPTX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false, i1 false) ; NVPTX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false, i1 false)
; NVPTX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 ; NVPTX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
; NVPTX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[COMMON_RET:%.*]] ; NVPTX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[COMMON_RET:%.*]]
; NVPTX: common.ret: ; NVPTX: common.ret:
; NVPTX-NEXT: ret void ; NVPTX-NEXT: ret void
; NVPTX: user_code.entry: ; NVPTX: user_code.entry:
; NVPTX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) #[[ATTR3]] ; NVPTX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) #[[ATTR2]]
; NVPTX-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4, !tbaa [[TBAA18]] ; NVPTX-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4, !tbaa [[TBAA18]]
; NVPTX-NEXT: call void @__omp_outlined__2(i32* noalias nocapture noundef nonnull readonly align 4 dereferenceable(4) [[DOTTHREADID_TEMP_]], i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTZERO_ADDR]]) #[[ATTR3]] ; NVPTX-NEXT: call void @__omp_outlined__2(i32* noalias nocapture noundef nonnull readonly align 4 dereferenceable(4) [[DOTTHREADID_TEMP_]], i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTZERO_ADDR]]) #[[ATTR2]]
; NVPTX-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) ; NVPTX-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2, i1 false)
; NVPTX-NEXT: br label [[COMMON_RET]] ; NVPTX-NEXT: br label [[COMMON_RET]]
; ;
; AMDGPU-DISABLED-LABEL: define {{[^@]+}}@__omp_offloading_fd02_2044372e_sequential_loop_to_stack_var_l20 ; AMDGPU-DISABLED-LABEL: define {{[^@]+}}@__omp_offloading_fd02_2044372e_sequential_loop_to_stack_var_l20
; AMDGPU-DISABLED-SAME: () #[[ATTR0]] { ; AMDGPU-DISABLED-SAME: () #[[ATTR0]] {
; AMDGPU-DISABLED-NEXT: entry: ; AMDGPU-DISABLED-NEXT: entry:
; AMDGPU-DISABLED-NEXT: [[WORKER_WORK_FN_ADDR:%.*]] = alloca i8*, align 8, addrspace(5) ; AMDGPU-DISABLED-NEXT: [[WORKER_WORK_FN_ADDR:%.*]] = alloca i8*, align 8, addrspace(5)
; AMDGPU-DISABLED-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 ; AMDGPU-DISABLED-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
Show All 35 Lines
; AMDGPU-DISABLED-NEXT: call void @__kmpc_barrier_simple_generic(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]]) ; AMDGPU-DISABLED-NEXT: call void @__kmpc_barrier_simple_generic(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
; AMDGPU-DISABLED-NEXT: br label [[WORKER_STATE_MACHINE_BEGIN]] ; AMDGPU-DISABLED-NEXT: br label [[WORKER_STATE_MACHINE_BEGIN]]
; AMDGPU-DISABLED: thread.user_code.check: ; AMDGPU-DISABLED: thread.user_code.check:
; AMDGPU-DISABLED-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 ; AMDGPU-DISABLED-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
; AMDGPU-DISABLED-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[COMMON_RET:%.*]] ; AMDGPU-DISABLED-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[COMMON_RET:%.*]]
; AMDGPU-DISABLED: common.ret: ; AMDGPU-DISABLED: common.ret:
; AMDGPU-DISABLED-NEXT: ret void ; AMDGPU-DISABLED-NEXT: ret void
; AMDGPU-DISABLED: user_code.entry: ; AMDGPU-DISABLED: user_code.entry:
; AMDGPU-DISABLED-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) #[[ATTR3]] ; AMDGPU-DISABLED-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) #[[ATTR2]]
; AMDGPU-DISABLED-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4, !tbaa [[TBAA18]] ; AMDGPU-DISABLED-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4, !tbaa [[TBAA18]]
; AMDGPU-DISABLED-NEXT: call void @__omp_outlined__2(i32* noalias nocapture noundef nonnull readonly align 4 dereferenceable(4) [[DOTTHREADID_TEMP_]], i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTZERO_ADDR]]) #[[ATTR3]] ; AMDGPU-DISABLED-NEXT: call void @__omp_outlined__2(i32* noalias nocapture noundef nonnull readonly align 4 dereferenceable(4) [[DOTTHREADID_TEMP_]], i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTZERO_ADDR]]) #[[ATTR2]]
; AMDGPU-DISABLED-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 1, i1 true) ; AMDGPU-DISABLED-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 1, i1 true)
; AMDGPU-DISABLED-NEXT: br label [[COMMON_RET]] ; AMDGPU-DISABLED-NEXT: br label [[COMMON_RET]]
; ;
; NVPTX-DISABLED-LABEL: define {{[^@]+}}@__omp_offloading_fd02_2044372e_sequential_loop_to_stack_var_l20 ; NVPTX-DISABLED-LABEL: define {{[^@]+}}@__omp_offloading_fd02_2044372e_sequential_loop_to_stack_var_l20
; NVPTX-DISABLED-SAME: () #[[ATTR0]] { ; NVPTX-DISABLED-SAME: () #[[ATTR0]] {
; NVPTX-DISABLED-NEXT: entry: ; NVPTX-DISABLED-NEXT: entry:
; NVPTX-DISABLED-NEXT: [[WORKER_WORK_FN_ADDR:%.*]] = alloca i8*, align 8 ; NVPTX-DISABLED-NEXT: [[WORKER_WORK_FN_ADDR:%.*]] = alloca i8*, align 8
; NVPTX-DISABLED-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 ; NVPTX-DISABLED-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
Show All 34 Lines
; NVPTX-DISABLED-NEXT: call void @__kmpc_barrier_simple_generic(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]]) ; NVPTX-DISABLED-NEXT: call void @__kmpc_barrier_simple_generic(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
; NVPTX-DISABLED-NEXT: br label [[WORKER_STATE_MACHINE_BEGIN]] ; NVPTX-DISABLED-NEXT: br label [[WORKER_STATE_MACHINE_BEGIN]]
; NVPTX-DISABLED: thread.user_code.check: ; NVPTX-DISABLED: thread.user_code.check:
; NVPTX-DISABLED-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 ; NVPTX-DISABLED-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
; NVPTX-DISABLED-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[COMMON_RET:%.*]] ; NVPTX-DISABLED-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[COMMON_RET:%.*]]
; NVPTX-DISABLED: common.ret: ; NVPTX-DISABLED: common.ret:
; NVPTX-DISABLED-NEXT: ret void ; NVPTX-DISABLED-NEXT: ret void
; NVPTX-DISABLED: user_code.entry: ; NVPTX-DISABLED: user_code.entry:
; NVPTX-DISABLED-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) #[[ATTR3]] ; NVPTX-DISABLED-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) #[[ATTR2]]
; NVPTX-DISABLED-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4, !tbaa [[TBAA18]] ; NVPTX-DISABLED-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4, !tbaa [[TBAA18]]
; NVPTX-DISABLED-NEXT: call void @__omp_outlined__2(i32* noalias nocapture noundef nonnull readonly align 4 dereferenceable(4) [[DOTTHREADID_TEMP_]], i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTZERO_ADDR]]) #[[ATTR3]] ; NVPTX-DISABLED-NEXT: call void @__omp_outlined__2(i32* noalias nocapture noundef nonnull readonly align 4 dereferenceable(4) [[DOTTHREADID_TEMP_]], i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTZERO_ADDR]]) #[[ATTR2]]
; NVPTX-DISABLED-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 1, i1 true) ; NVPTX-DISABLED-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 1, i1 true)
; NVPTX-DISABLED-NEXT: br label [[COMMON_RET]] ; NVPTX-DISABLED-NEXT: br label [[COMMON_RET]]
; ;
entry: entry:
%.zero.addr = alloca i32, align 4 %.zero.addr = alloca i32, align 4
%.threadid_temp. = alloca i32, align 4 %.threadid_temp. = alloca i32, align 4
%0 = call i32 @__kmpc_target_init(%struct.ident_t* @1, i8 1, i1 true, i1 true) %0 = call i32 @__kmpc_target_init(%struct.ident_t* @1, i8 1, i1 true, i1 true)
%exec_user_code = icmp eq i32 %0, -1 %exec_user_code = icmp eq i32 %0, -1
Show All 14 Lines
; Function Attrs: alwaysinline convergent norecurse nounwind ; Function Attrs: alwaysinline convergent norecurse nounwind
define internal void @__omp_outlined__2(i32* noalias %.global_tid., i32* noalias %.bound_tid.) #0 { define internal void @__omp_outlined__2(i32* noalias %.global_tid., i32* noalias %.bound_tid.) #0 {
; AMDGPU-LABEL: define {{[^@]+}}@__omp_outlined__2 ; AMDGPU-LABEL: define {{[^@]+}}@__omp_outlined__2
; AMDGPU-SAME: (i32* noalias nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[DOTGLOBAL_TID_:%.*]], i32* noalias nocapture nofree nonnull readnone align 4 dereferenceable(4) [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] { ; AMDGPU-SAME: (i32* noalias nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[DOTGLOBAL_TID_:%.*]], i32* noalias nocapture nofree nonnull readnone align 4 dereferenceable(4) [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] {
; AMDGPU-NEXT: entry: ; AMDGPU-NEXT: entry:
; AMDGPU-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 8 ; AMDGPU-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 8
; AMDGPU-NEXT: [[TMP0:%.*]] = alloca i8, i64 4, align 4 ; AMDGPU-NEXT: [[TMP0:%.*]] = alloca i8, i64 4, align 4
; AMDGPU-NEXT: [[X_ON_STACK:%.*]] = bitcast i8* [[TMP0]] to i32* ; AMDGPU-NEXT: [[X_ON_STACK:%.*]] = bitcast i8* [[TMP0]] to i32*
; AMDGPU-NEXT: call void @use(i32* nocapture [[X_ON_STACK]]) #[[ATTR6]] ; AMDGPU-NEXT: call void @use(i32* nocapture [[X_ON_STACK]]) #[[ATTR5]]
; AMDGPU-NEXT: br label [[FOR_COND:%.*]] ; AMDGPU-NEXT: br label [[FOR_COND:%.*]]
; AMDGPU: for.cond: ; AMDGPU: for.cond:
; AMDGPU-NEXT: [[I_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INC:%.*]], [[FOR_BODY:%.*]] ] ; AMDGPU-NEXT: [[I_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INC:%.*]], [[FOR_BODY:%.*]] ]
; AMDGPU-NEXT: [[CMP:%.*]] = icmp slt i32 [[I_0]], 100 ; AMDGPU-NEXT: [[CMP:%.*]] = icmp slt i32 [[I_0]], 100
; AMDGPU-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_COND_CLEANUP:%.*]] ; AMDGPU-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_COND_CLEANUP:%.*]]
; AMDGPU: for.cond.cleanup: ; AMDGPU: for.cond.cleanup:
; AMDGPU-NEXT: call void @spmd_amenable() #[[ATTR6]] ; AMDGPU-NEXT: call void @spmd_amenable() #[[ATTR5]]
; AMDGPU-NEXT: ret void ; AMDGPU-NEXT: ret void
; AMDGPU: for.body: ; AMDGPU: for.body:
; AMDGPU-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTGLOBAL_TID_]], align 4, !tbaa [[TBAA18]] ; AMDGPU-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTGLOBAL_TID_]], align 4, !tbaa [[TBAA18]]
; AMDGPU-NEXT: [[TMP2:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** ; AMDGPU-NEXT: [[TMP2:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
; AMDGPU-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* noundef @[[GLOB1]], i32 [[TMP1]], i32 noundef 1, i32 noundef -1, i32 noundef -1, i8* noundef bitcast (void (i32*, i32*)* @__omp_outlined__3 to i8*), i8* noundef bitcast (void (i16, i32)* @__omp_outlined__3_wrapper to i8*), i8** noundef [[TMP2]], i64 noundef 0) ; AMDGPU-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* noundef @[[GLOB1]], i32 [[TMP1]], i32 noundef 1, i32 noundef -1, i32 noundef -1, i8* noundef bitcast (void (i32*, i32*)* @__omp_outlined__3 to i8*), i8* noundef bitcast (void (i16, i32)* @__omp_outlined__3_wrapper to i8*), i8** noundef [[TMP2]], i64 noundef 0)
; AMDGPU-NEXT: [[INC]] = add nsw i32 [[I_0]], 1 ; AMDGPU-NEXT: [[INC]] = add nsw i32 [[I_0]], 1
; AMDGPU-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]] ; AMDGPU-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]]
; ;
; NVPTX-LABEL: define {{[^@]+}}@__omp_outlined__2 ; NVPTX-LABEL: define {{[^@]+}}@__omp_outlined__2
; NVPTX-SAME: (i32* noalias nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[DOTGLOBAL_TID_:%.*]], i32* noalias nocapture nofree nonnull readnone align 4 dereferenceable(4) [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] { ; NVPTX-SAME: (i32* noalias nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[DOTGLOBAL_TID_:%.*]], i32* noalias nocapture nofree nonnull readnone align 4 dereferenceable(4) [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] {
; NVPTX-NEXT: entry: ; NVPTX-NEXT: entry:
; NVPTX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 8 ; NVPTX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 8
; NVPTX-NEXT: [[TMP0:%.*]] = alloca i8, i64 4, align 4 ; NVPTX-NEXT: [[TMP0:%.*]] = alloca i8, i64 4, align 4
; NVPTX-NEXT: [[X_ON_STACK:%.*]] = bitcast i8* [[TMP0]] to i32* ; NVPTX-NEXT: [[X_ON_STACK:%.*]] = bitcast i8* [[TMP0]] to i32*
; NVPTX-NEXT: call void @use(i32* nocapture [[X_ON_STACK]]) #[[ATTR6]] ; NVPTX-NEXT: call void @use(i32* nocapture [[X_ON_STACK]]) #[[ATTR5]]
; NVPTX-NEXT: br label [[FOR_COND:%.*]] ; NVPTX-NEXT: br label [[FOR_COND:%.*]]
; NVPTX: for.cond: ; NVPTX: for.cond:
; NVPTX-NEXT: [[I_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INC:%.*]], [[FOR_BODY:%.*]] ] ; NVPTX-NEXT: [[I_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INC:%.*]], [[FOR_BODY:%.*]] ]
; NVPTX-NEXT: [[CMP:%.*]] = icmp slt i32 [[I_0]], 100 ; NVPTX-NEXT: [[CMP:%.*]] = icmp slt i32 [[I_0]], 100
; NVPTX-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_COND_CLEANUP:%.*]] ; NVPTX-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_COND_CLEANUP:%.*]]
; NVPTX: for.cond.cleanup: ; NVPTX: for.cond.cleanup:
; NVPTX-NEXT: call void @spmd_amenable() #[[ATTR6]] ; NVPTX-NEXT: call void @spmd_amenable() #[[ATTR5]]
; NVPTX-NEXT: ret void ; NVPTX-NEXT: ret void
; NVPTX: for.body: ; NVPTX: for.body:
; NVPTX-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTGLOBAL_TID_]], align 4, !tbaa [[TBAA18]] ; NVPTX-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTGLOBAL_TID_]], align 4, !tbaa [[TBAA18]]
; NVPTX-NEXT: [[TMP2:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** ; NVPTX-NEXT: [[TMP2:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
; NVPTX-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* noundef @[[GLOB1]], i32 [[TMP1]], i32 noundef 1, i32 noundef -1, i32 noundef -1, i8* noundef bitcast (void (i32*, i32*)* @__omp_outlined__3 to i8*), i8* noundef bitcast (void (i16, i32)* @__omp_outlined__3_wrapper to i8*), i8** noundef [[TMP2]], i64 noundef 0) ; NVPTX-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* noundef @[[GLOB1]], i32 [[TMP1]], i32 noundef 1, i32 noundef -1, i32 noundef -1, i8* noundef bitcast (void (i32*, i32*)* @__omp_outlined__3 to i8*), i8* noundef bitcast (void (i16, i32)* @__omp_outlined__3_wrapper to i8*), i8** noundef [[TMP2]], i64 noundef 0)
; NVPTX-NEXT: [[INC]] = add nsw i32 [[I_0]], 1 ; NVPTX-NEXT: [[INC]] = add nsw i32 [[I_0]], 1
; NVPTX-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]] ; NVPTX-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]]
; ;
; AMDGPU-DISABLED-LABEL: define {{[^@]+}}@__omp_outlined__2 ; AMDGPU-DISABLED-LABEL: define {{[^@]+}}@__omp_outlined__2
; AMDGPU-DISABLED-SAME: (i32* noalias nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[DOTGLOBAL_TID_:%.*]], i32* noalias nocapture nofree nonnull readnone align 4 dereferenceable(4) [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] { ; AMDGPU-DISABLED-SAME: (i32* noalias nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[DOTGLOBAL_TID_:%.*]], i32* noalias nocapture nofree nonnull readnone align 4 dereferenceable(4) [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] {
; AMDGPU-DISABLED-NEXT: entry: ; AMDGPU-DISABLED-NEXT: entry:
; AMDGPU-DISABLED-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 8 ; AMDGPU-DISABLED-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 8
; AMDGPU-DISABLED-NEXT: [[TMP0:%.*]] = alloca i8, i64 4, align 4 ; AMDGPU-DISABLED-NEXT: [[TMP0:%.*]] = alloca i8, i64 4, align 4
; AMDGPU-DISABLED-NEXT: [[X_ON_STACK:%.*]] = bitcast i8* [[TMP0]] to i32* ; AMDGPU-DISABLED-NEXT: [[X_ON_STACK:%.*]] = bitcast i8* [[TMP0]] to i32*
; AMDGPU-DISABLED-NEXT: call void @use(i32* nocapture [[X_ON_STACK]]) #[[ATTR6]] ; AMDGPU-DISABLED-NEXT: call void @use(i32* nocapture [[X_ON_STACK]]) #[[ATTR5]]
; AMDGPU-DISABLED-NEXT: br label [[FOR_COND:%.*]] ; AMDGPU-DISABLED-NEXT: br label [[FOR_COND:%.*]]
; AMDGPU-DISABLED: for.cond: ; AMDGPU-DISABLED: for.cond:
; AMDGPU-DISABLED-NEXT: [[I_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INC:%.*]], [[FOR_BODY:%.*]] ] ; AMDGPU-DISABLED-NEXT: [[I_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INC:%.*]], [[FOR_BODY:%.*]] ]
; AMDGPU-DISABLED-NEXT: [[CMP:%.*]] = icmp slt i32 [[I_0]], 100 ; AMDGPU-DISABLED-NEXT: [[CMP:%.*]] = icmp slt i32 [[I_0]], 100
; AMDGPU-DISABLED-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_COND_CLEANUP:%.*]] ; AMDGPU-DISABLED-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_COND_CLEANUP:%.*]]
; AMDGPU-DISABLED: for.cond.cleanup: ; AMDGPU-DISABLED: for.cond.cleanup:
; AMDGPU-DISABLED-NEXT: call void @spmd_amenable() #[[ATTR6]] ; AMDGPU-DISABLED-NEXT: call void @spmd_amenable() #[[ATTR5]]
; AMDGPU-DISABLED-NEXT: ret void ; AMDGPU-DISABLED-NEXT: ret void
; AMDGPU-DISABLED: for.body: ; AMDGPU-DISABLED: for.body:
; AMDGPU-DISABLED-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTGLOBAL_TID_]], align 4, !tbaa [[TBAA18]] ; AMDGPU-DISABLED-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTGLOBAL_TID_]], align 4, !tbaa [[TBAA18]]
; AMDGPU-DISABLED-NEXT: [[TMP2:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** ; AMDGPU-DISABLED-NEXT: [[TMP2:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
; AMDGPU-DISABLED-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* noundef @[[GLOB1]], i32 [[TMP1]], i32 noundef 1, i32 noundef -1, i32 noundef -1, i8* noundef bitcast (void (i32*, i32*)* @__omp_outlined__3 to i8*), i8* noundef @__omp_outlined__3_wrapper.ID, i8** noundef [[TMP2]], i64 noundef 0) ; AMDGPU-DISABLED-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* noundef @[[GLOB1]], i32 [[TMP1]], i32 noundef 1, i32 noundef -1, i32 noundef -1, i8* noundef bitcast (void (i32*, i32*)* @__omp_outlined__3 to i8*), i8* noundef @__omp_outlined__3_wrapper.ID, i8** noundef [[TMP2]], i64 noundef 0)
; AMDGPU-DISABLED-NEXT: [[INC]] = add nsw i32 [[I_0]], 1 ; AMDGPU-DISABLED-NEXT: [[INC]] = add nsw i32 [[I_0]], 1
; AMDGPU-DISABLED-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]] ; AMDGPU-DISABLED-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]]
; ;
; NVPTX-DISABLED-LABEL: define {{[^@]+}}@__omp_outlined__2 ; NVPTX-DISABLED-LABEL: define {{[^@]+}}@__omp_outlined__2
; NVPTX-DISABLED-SAME: (i32* noalias nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[DOTGLOBAL_TID_:%.*]], i32* noalias nocapture nofree nonnull readnone align 4 dereferenceable(4) [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] { ; NVPTX-DISABLED-SAME: (i32* noalias nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[DOTGLOBAL_TID_:%.*]], i32* noalias nocapture nofree nonnull readnone align 4 dereferenceable(4) [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] {
; NVPTX-DISABLED-NEXT: entry: ; NVPTX-DISABLED-NEXT: entry:
; NVPTX-DISABLED-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 8 ; NVPTX-DISABLED-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 8
; NVPTX-DISABLED-NEXT: [[TMP0:%.*]] = alloca i8, i64 4, align 4 ; NVPTX-DISABLED-NEXT: [[TMP0:%.*]] = alloca i8, i64 4, align 4
; NVPTX-DISABLED-NEXT: [[X_ON_STACK:%.*]] = bitcast i8* [[TMP0]] to i32* ; NVPTX-DISABLED-NEXT: [[X_ON_STACK:%.*]] = bitcast i8* [[TMP0]] to i32*
; NVPTX-DISABLED-NEXT: call void @use(i32* nocapture [[X_ON_STACK]]) #[[ATTR6]] ; NVPTX-DISABLED-NEXT: call void @use(i32* nocapture [[X_ON_STACK]]) #[[ATTR5]]
; NVPTX-DISABLED-NEXT: br label [[FOR_COND:%.*]] ; NVPTX-DISABLED-NEXT: br label [[FOR_COND:%.*]]
; NVPTX-DISABLED: for.cond: ; NVPTX-DISABLED: for.cond:
; NVPTX-DISABLED-NEXT: [[I_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INC:%.*]], [[FOR_BODY:%.*]] ] ; NVPTX-DISABLED-NEXT: [[I_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INC:%.*]], [[FOR_BODY:%.*]] ]
; NVPTX-DISABLED-NEXT: [[CMP:%.*]] = icmp slt i32 [[I_0]], 100 ; NVPTX-DISABLED-NEXT: [[CMP:%.*]] = icmp slt i32 [[I_0]], 100
; NVPTX-DISABLED-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_COND_CLEANUP:%.*]] ; NVPTX-DISABLED-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_COND_CLEANUP:%.*]]
; NVPTX-DISABLED: for.cond.cleanup: ; NVPTX-DISABLED: for.cond.cleanup:
; NVPTX-DISABLED-NEXT: call void @spmd_amenable() #[[ATTR6]] ; NVPTX-DISABLED-NEXT: call void @spmd_amenable() #[[ATTR5]]
; NVPTX-DISABLED-NEXT: ret void ; NVPTX-DISABLED-NEXT: ret void
; NVPTX-DISABLED: for.body: ; NVPTX-DISABLED: for.body:
; NVPTX-DISABLED-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTGLOBAL_TID_]], align 4, !tbaa [[TBAA18]] ; NVPTX-DISABLED-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTGLOBAL_TID_]], align 4, !tbaa [[TBAA18]]
; NVPTX-DISABLED-NEXT: [[TMP2:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** ; NVPTX-DISABLED-NEXT: [[TMP2:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
; NVPTX-DISABLED-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* noundef @[[GLOB1]], i32 [[TMP1]], i32 noundef 1, i32 noundef -1, i32 noundef -1, i8* noundef bitcast (void (i32*, i32*)* @__omp_outlined__3 to i8*), i8* noundef @__omp_outlined__3_wrapper.ID, i8** noundef [[TMP2]], i64 noundef 0) ; NVPTX-DISABLED-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* noundef @[[GLOB1]], i32 [[TMP1]], i32 noundef 1, i32 noundef -1, i32 noundef -1, i8* noundef bitcast (void (i32*, i32*)* @__omp_outlined__3 to i8*), i8* noundef @__omp_outlined__3_wrapper.ID, i8** noundef [[TMP2]], i64 noundef 0)
; NVPTX-DISABLED-NEXT: [[INC]] = add nsw i32 [[I_0]], 1 ; NVPTX-DISABLED-NEXT: [[INC]] = add nsw i32 [[I_0]], 1
; NVPTX-DISABLED-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]] ; NVPTX-DISABLED-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]]
; ;
Show All 21 Linesfor.body: ; preds = %for.cond
%inc = add nsw i32 %i.0, 1 %inc = add nsw i32 %i.0, 1
br label %for.cond, !llvm.loop !25 br label %for.cond, !llvm.loop !25
} }
; Function Attrs: alwaysinline convergent norecurse nounwind ; Function Attrs: alwaysinline convergent norecurse nounwind
define internal void @__omp_outlined__3(i32* noalias %.global_tid., i32* noalias %.bound_tid.) #0 { define internal void @__omp_outlined__3(i32* noalias %.global_tid., i32* noalias %.bound_tid.) #0 {
; AMDGPU-LABEL: define {{[^@]+}}@__omp_outlined__3 ; AMDGPU-LABEL: define {{[^@]+}}@__omp_outlined__3
; AMDGPU-SAME: (i32* noalias nocapture nofree readnone [[DOTGLOBAL_TID_:%.*]], i32* noalias nocapture nofree readnone [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] { ; AMDGPU-SAME: (i32* noalias nocapture nofree readnone [[DOTGLOBAL_TID_:%.*]], i32* noalias nocapture nofree readnone [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] {
; AMDGPU-NEXT: entry: ; AMDGPU-NEXT: entry:
; AMDGPU-NEXT: call void @unknown() #[[ATTR7]] ; AMDGPU-NEXT: call void @unknown() #[[ATTR6]]
; AMDGPU-NEXT: ret void ; AMDGPU-NEXT: ret void
; ;
; NVPTX-LABEL: define {{[^@]+}}@__omp_outlined__3 ; NVPTX-LABEL: define {{[^@]+}}@__omp_outlined__3
; NVPTX-SAME: (i32* noalias nocapture nofree readnone [[DOTGLOBAL_TID_:%.*]], i32* noalias nocapture nofree readnone [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] { ; NVPTX-SAME: (i32* noalias nocapture nofree readnone [[DOTGLOBAL_TID_:%.*]], i32* noalias nocapture nofree readnone [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] {
; NVPTX-NEXT: entry: ; NVPTX-NEXT: entry:
; NVPTX-NEXT: call void @unknown() #[[ATTR7]] ; NVPTX-NEXT: call void @unknown() #[[ATTR6]]
; NVPTX-NEXT: ret void ; NVPTX-NEXT: ret void
; ;
; AMDGPU-DISABLED-LABEL: define {{[^@]+}}@__omp_outlined__3 ; AMDGPU-DISABLED-LABEL: define {{[^@]+}}@__omp_outlined__3
; AMDGPU-DISABLED-SAME: (i32* noalias nocapture nofree readnone [[DOTGLOBAL_TID_:%.*]], i32* noalias nocapture nofree readnone [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] { ; AMDGPU-DISABLED-SAME: (i32* noalias nocapture nofree readnone [[DOTGLOBAL_TID_:%.*]], i32* noalias nocapture nofree readnone [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] {
; AMDGPU-DISABLED-NEXT: entry: ; AMDGPU-DISABLED-NEXT: entry:
; AMDGPU-DISABLED-NEXT: call void @unknown() #[[ATTR7]] ; AMDGPU-DISABLED-NEXT: call void @unknown() #[[ATTR6]]
; AMDGPU-DISABLED-NEXT: ret void ; AMDGPU-DISABLED-NEXT: ret void
; ;
; NVPTX-DISABLED-LABEL: define {{[^@]+}}@__omp_outlined__3 ; NVPTX-DISABLED-LABEL: define {{[^@]+}}@__omp_outlined__3
; NVPTX-DISABLED-SAME: (i32* noalias nocapture nofree readnone [[DOTGLOBAL_TID_:%.*]], i32* noalias nocapture nofree readnone [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] { ; NVPTX-DISABLED-SAME: (i32* noalias nocapture nofree readnone [[DOTGLOBAL_TID_:%.*]], i32* noalias nocapture nofree readnone [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] {
; NVPTX-DISABLED-NEXT: entry: ; NVPTX-DISABLED-NEXT: entry:
; NVPTX-DISABLED-NEXT: call void @unknown() #[[ATTR7]] ; NVPTX-DISABLED-NEXT: call void @unknown() #[[ATTR6]]
; NVPTX-DISABLED-NEXT: ret void ; NVPTX-DISABLED-NEXT: ret void
; ;
entry: entry:
call void @unknown() #11 call void @unknown() #11
ret void ret void
} }
; Function Attrs: convergent norecurse nounwind ; Function Attrs: convergent norecurse nounwind
define internal void @__omp_outlined__3_wrapper(i16 zeroext %0, i32 %1) #3 { define internal void @__omp_outlined__3_wrapper(i16 zeroext %0, i32 %1) #3 {
; AMDGPU-LABEL: define {{[^@]+}}@__omp_outlined__3_wrapper ; AMDGPU-LABEL: define {{[^@]+}}@__omp_outlined__3_wrapper
; AMDGPU-SAME: (i16 zeroext [[TMP0:%.*]], i32 [[TMP1:%.*]]) #[[ATTR1]] { ; AMDGPU-SAME: (i16 zeroext [[TMP0:%.*]], i32 [[TMP1:%.*]]) #[[ATTR1]] {
; AMDGPU-NEXT: entry: ; AMDGPU-NEXT: entry:
; AMDGPU-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4 ; AMDGPU-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4
; AMDGPU-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 ; AMDGPU-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
; AMDGPU-NEXT: [[GLOBAL_ARGS:%.*]] = alloca i8**, align 8 ; AMDGPU-NEXT: [[GLOBAL_ARGS:%.*]] = alloca i8**, align 8
; AMDGPU-NEXT: call void @__kmpc_get_shared_variables(i8*** [[GLOBAL_ARGS]]) ; AMDGPU-NEXT: call void @__kmpc_get_shared_variables(i8*** [[GLOBAL_ARGS]])
; AMDGPU-NEXT: call void @__omp_outlined__3(i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTADDR1]], i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTZERO_ADDR]]) #[[ATTR3]] ; AMDGPU-NEXT: call void @__omp_outlined__3(i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTADDR1]], i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTZERO_ADDR]]) #[[ATTR2]]
; AMDGPU-NEXT: ret void ; AMDGPU-NEXT: ret void
; ;
; NVPTX-LABEL: define {{[^@]+}}@__omp_outlined__3_wrapper ; NVPTX-LABEL: define {{[^@]+}}@__omp_outlined__3_wrapper
; NVPTX-SAME: (i16 zeroext [[TMP0:%.*]], i32 [[TMP1:%.*]]) #[[ATTR1]] { ; NVPTX-SAME: (i16 zeroext [[TMP0:%.*]], i32 [[TMP1:%.*]]) #[[ATTR1]] {
; NVPTX-NEXT: entry: ; NVPTX-NEXT: entry:
; NVPTX-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4 ; NVPTX-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4
; NVPTX-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 ; NVPTX-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
; NVPTX-NEXT: [[GLOBAL_ARGS:%.*]] = alloca i8**, align 8 ; NVPTX-NEXT: [[GLOBAL_ARGS:%.*]] = alloca i8**, align 8
; NVPTX-NEXT: call void @__kmpc_get_shared_variables(i8*** [[GLOBAL_ARGS]]) ; NVPTX-NEXT: call void @__kmpc_get_shared_variables(i8*** [[GLOBAL_ARGS]])
; NVPTX-NEXT: call void @__omp_outlined__3(i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTADDR1]], i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTZERO_ADDR]]) #[[ATTR3]] ; NVPTX-NEXT: call void @__omp_outlined__3(i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTADDR1]], i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTZERO_ADDR]]) #[[ATTR2]]
; NVPTX-NEXT: ret void ; NVPTX-NEXT: ret void
; ;
; AMDGPU-DISABLED-LABEL: define {{[^@]+}}@__omp_outlined__3_wrapper ; AMDGPU-DISABLED-LABEL: define {{[^@]+}}@__omp_outlined__3_wrapper
; AMDGPU-DISABLED-SAME: (i16 zeroext [[TMP0:%.*]], i32 [[TMP1:%.*]]) #[[ATTR1]] { ; AMDGPU-DISABLED-SAME: (i16 zeroext [[TMP0:%.*]], i32 [[TMP1:%.*]]) #[[ATTR1]] {
; AMDGPU-DISABLED-NEXT: entry: ; AMDGPU-DISABLED-NEXT: entry:
; AMDGPU-DISABLED-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4 ; AMDGPU-DISABLED-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4
; AMDGPU-DISABLED-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 ; AMDGPU-DISABLED-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
; AMDGPU-DISABLED-NEXT: [[GLOBAL_ARGS:%.*]] = alloca i8**, align 8 ; AMDGPU-DISABLED-NEXT: [[GLOBAL_ARGS:%.*]] = alloca i8**, align 8
; AMDGPU-DISABLED-NEXT: call void @__kmpc_get_shared_variables(i8*** [[GLOBAL_ARGS]]) ; AMDGPU-DISABLED-NEXT: call void @__kmpc_get_shared_variables(i8*** [[GLOBAL_ARGS]])
; AMDGPU-DISABLED-NEXT: call void @__omp_outlined__3(i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTADDR1]], i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTZERO_ADDR]]) #[[ATTR3]] ; AMDGPU-DISABLED-NEXT: call void @__omp_outlined__3(i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTADDR1]], i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTZERO_ADDR]]) #[[ATTR2]]
; AMDGPU-DISABLED-NEXT: ret void ; AMDGPU-DISABLED-NEXT: ret void
; ;
; NVPTX-DISABLED-LABEL: define {{[^@]+}}@__omp_outlined__3_wrapper ; NVPTX-DISABLED-LABEL: define {{[^@]+}}@__omp_outlined__3_wrapper
; NVPTX-DISABLED-SAME: (i16 zeroext [[TMP0:%.*]], i32 [[TMP1:%.*]]) #[[ATTR1]] { ; NVPTX-DISABLED-SAME: (i16 zeroext [[TMP0:%.*]], i32 [[TMP1:%.*]]) #[[ATTR1]] {
; NVPTX-DISABLED-NEXT: entry: ; NVPTX-DISABLED-NEXT: entry:
; NVPTX-DISABLED-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4 ; NVPTX-DISABLED-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4
; NVPTX-DISABLED-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 ; NVPTX-DISABLED-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
; NVPTX-DISABLED-NEXT: [[GLOBAL_ARGS:%.*]] = alloca i8**, align 8 ; NVPTX-DISABLED-NEXT: [[GLOBAL_ARGS:%.*]] = alloca i8**, align 8
; NVPTX-DISABLED-NEXT: call void @__kmpc_get_shared_variables(i8*** [[GLOBAL_ARGS]]) ; NVPTX-DISABLED-NEXT: call void @__kmpc_get_shared_variables(i8*** [[GLOBAL_ARGS]])
; NVPTX-DISABLED-NEXT: call void @__omp_outlined__3(i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTADDR1]], i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTZERO_ADDR]]) #[[ATTR3]] ; NVPTX-DISABLED-NEXT: call void @__omp_outlined__3(i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTADDR1]], i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTZERO_ADDR]]) #[[ATTR2]]
; NVPTX-DISABLED-NEXT: ret void ; NVPTX-DISABLED-NEXT: ret void
; ;
entry: entry:
%.addr1 = alloca i32, align 4 %.addr1 = alloca i32, align 4
%.zero.addr = alloca i32, align 4 %.zero.addr = alloca i32, align 4
%global_args = alloca i8**, align 8 %global_args = alloca i8**, align 8
store i32 %1, i32* %.addr1, align 4, !tbaa !18 store i32 %1, i32* %.addr1, align 4, !tbaa !18
store i32 0, i32* %.zero.addr, align 4 store i32 0, i32* %.zero.addr, align 4
Show All 11 Lines
; AMDGPU-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 ; AMDGPU-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
; AMDGPU-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 ; AMDGPU-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
; AMDGPU-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false, i1 false) ; AMDGPU-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false, i1 false)
; AMDGPU-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 ; AMDGPU-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
; AMDGPU-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[COMMON_RET:%.*]] ; AMDGPU-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[COMMON_RET:%.*]]
; AMDGPU: common.ret: ; AMDGPU: common.ret:
; AMDGPU-NEXT: ret void ; AMDGPU-NEXT: ret void
; AMDGPU: user_code.entry: ; AMDGPU: user_code.entry:
; AMDGPU-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) #[[ATTR3]] ; AMDGPU-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) #[[ATTR2]]
; AMDGPU-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4, !tbaa [[TBAA18]] ; AMDGPU-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4, !tbaa [[TBAA18]]
; AMDGPU-NEXT: call void @__omp_outlined__4(i32* noalias nocapture noundef nonnull readonly align 4 dereferenceable(4) [[DOTTHREADID_TEMP_]], i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTZERO_ADDR]]) #[[ATTR3]] ; AMDGPU-NEXT: call void @__omp_outlined__4(i32* noalias nocapture noundef nonnull readonly align 4 dereferenceable(4) [[DOTTHREADID_TEMP_]], i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTZERO_ADDR]]) #[[ATTR2]]
; AMDGPU-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) ; AMDGPU-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2, i1 false)
; AMDGPU-NEXT: br label [[COMMON_RET]] ; AMDGPU-NEXT: br label [[COMMON_RET]]
; ;
; NVPTX-LABEL: define {{[^@]+}}@__omp_offloading_fd02_2044372e_sequential_loop_to_shared_var_l35 ; NVPTX-LABEL: define {{[^@]+}}@__omp_offloading_fd02_2044372e_sequential_loop_to_shared_var_l35
; NVPTX-SAME: () #[[ATTR0]] { ; NVPTX-SAME: () #[[ATTR0]] {
; NVPTX-NEXT: entry: ; NVPTX-NEXT: entry:
; NVPTX-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 ; NVPTX-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
; NVPTX-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 ; NVPTX-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
; NVPTX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false, i1 false) ; NVPTX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false, i1 false)
; NVPTX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 ; NVPTX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
; NVPTX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[COMMON_RET:%.*]] ; NVPTX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[COMMON_RET:%.*]]
; NVPTX: common.ret: ; NVPTX: common.ret:
; NVPTX-NEXT: ret void ; NVPTX-NEXT: ret void
; NVPTX: user_code.entry: ; NVPTX: user_code.entry:
; NVPTX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) #[[ATTR3]] ; NVPTX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) #[[ATTR2]]
; NVPTX-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4, !tbaa [[TBAA18]] ; NVPTX-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4, !tbaa [[TBAA18]]
; NVPTX-NEXT: call void @__omp_outlined__4(i32* noalias nocapture noundef nonnull readonly align 4 dereferenceable(4) [[DOTTHREADID_TEMP_]], i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTZERO_ADDR]]) #[[ATTR3]] ; NVPTX-NEXT: call void @__omp_outlined__4(i32* noalias nocapture noundef nonnull readonly align 4 dereferenceable(4) [[DOTTHREADID_TEMP_]], i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTZERO_ADDR]]) #[[ATTR2]]
; NVPTX-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) ; NVPTX-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2, i1 false)
; NVPTX-NEXT: br label [[COMMON_RET]] ; NVPTX-NEXT: br label [[COMMON_RET]]
; ;
; AMDGPU-DISABLED-LABEL: define {{[^@]+}}@__omp_offloading_fd02_2044372e_sequential_loop_to_shared_var_l35 ; AMDGPU-DISABLED-LABEL: define {{[^@]+}}@__omp_offloading_fd02_2044372e_sequential_loop_to_shared_var_l35
; AMDGPU-DISABLED-SAME: () #[[ATTR0]] { ; AMDGPU-DISABLED-SAME: () #[[ATTR0]] {
; AMDGPU-DISABLED-NEXT: entry: ; AMDGPU-DISABLED-NEXT: entry:
; AMDGPU-DISABLED-NEXT: [[WORKER_WORK_FN_ADDR:%.*]] = alloca i8*, align 8, addrspace(5) ; AMDGPU-DISABLED-NEXT: [[WORKER_WORK_FN_ADDR:%.*]] = alloca i8*, align 8, addrspace(5)
; AMDGPU-DISABLED-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 ; AMDGPU-DISABLED-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
Show All 35 Lines
; AMDGPU-DISABLED-NEXT: call void @__kmpc_barrier_simple_generic(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]]) ; AMDGPU-DISABLED-NEXT: call void @__kmpc_barrier_simple_generic(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
; AMDGPU-DISABLED-NEXT: br label [[WORKER_STATE_MACHINE_BEGIN]] ; AMDGPU-DISABLED-NEXT: br label [[WORKER_STATE_MACHINE_BEGIN]]
; AMDGPU-DISABLED: thread.user_code.check: ; AMDGPU-DISABLED: thread.user_code.check:
; AMDGPU-DISABLED-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 ; AMDGPU-DISABLED-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
; AMDGPU-DISABLED-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[COMMON_RET:%.*]] ; AMDGPU-DISABLED-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[COMMON_RET:%.*]]
; AMDGPU-DISABLED: common.ret: ; AMDGPU-DISABLED: common.ret:
; AMDGPU-DISABLED-NEXT: ret void ; AMDGPU-DISABLED-NEXT: ret void
; AMDGPU-DISABLED: user_code.entry: ; AMDGPU-DISABLED: user_code.entry:
; AMDGPU-DISABLED-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) #[[ATTR3]] ; AMDGPU-DISABLED-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) #[[ATTR2]]
; AMDGPU-DISABLED-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4, !tbaa [[TBAA18]] ; AMDGPU-DISABLED-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4, !tbaa [[TBAA18]]
; AMDGPU-DISABLED-NEXT: call void @__omp_outlined__4(i32* noalias nocapture noundef nonnull readonly align 4 dereferenceable(4) [[DOTTHREADID_TEMP_]], i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTZERO_ADDR]]) #[[ATTR3]] ; AMDGPU-DISABLED-NEXT: call void @__omp_outlined__4(i32* noalias nocapture noundef nonnull readonly align 4 dereferenceable(4) [[DOTTHREADID_TEMP_]], i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTZERO_ADDR]]) #[[ATTR2]]
; AMDGPU-DISABLED-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 1, i1 true) ; AMDGPU-DISABLED-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 1, i1 true)
; AMDGPU-DISABLED-NEXT: br label [[COMMON_RET]] ; AMDGPU-DISABLED-NEXT: br label [[COMMON_RET]]
; ;
; NVPTX-DISABLED-LABEL: define {{[^@]+}}@__omp_offloading_fd02_2044372e_sequential_loop_to_shared_var_l35 ; NVPTX-DISABLED-LABEL: define {{[^@]+}}@__omp_offloading_fd02_2044372e_sequential_loop_to_shared_var_l35
; NVPTX-DISABLED-SAME: () #[[ATTR0]] { ; NVPTX-DISABLED-SAME: () #[[ATTR0]] {
; NVPTX-DISABLED-NEXT: entry: ; NVPTX-DISABLED-NEXT: entry:
; NVPTX-DISABLED-NEXT: [[WORKER_WORK_FN_ADDR:%.*]] = alloca i8*, align 8 ; NVPTX-DISABLED-NEXT: [[WORKER_WORK_FN_ADDR:%.*]] = alloca i8*, align 8
; NVPTX-DISABLED-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 ; NVPTX-DISABLED-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
Show All 34 Lines
; NVPTX-DISABLED-NEXT: call void @__kmpc_barrier_simple_generic(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]]) ; NVPTX-DISABLED-NEXT: call void @__kmpc_barrier_simple_generic(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
; NVPTX-DISABLED-NEXT: br label [[WORKER_STATE_MACHINE_BEGIN]] ; NVPTX-DISABLED-NEXT: br label [[WORKER_STATE_MACHINE_BEGIN]]
; NVPTX-DISABLED: thread.user_code.check: ; NVPTX-DISABLED: thread.user_code.check:
; NVPTX-DISABLED-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 ; NVPTX-DISABLED-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
; NVPTX-DISABLED-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[COMMON_RET:%.*]] ; NVPTX-DISABLED-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[COMMON_RET:%.*]]
; NVPTX-DISABLED: common.ret: ; NVPTX-DISABLED: common.ret:
; NVPTX-DISABLED-NEXT: ret void ; NVPTX-DISABLED-NEXT: ret void
; NVPTX-DISABLED: user_code.entry: ; NVPTX-DISABLED: user_code.entry:
; NVPTX-DISABLED-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) #[[ATTR3]] ; NVPTX-DISABLED-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) #[[ATTR2]]
; NVPTX-DISABLED-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4, !tbaa [[TBAA18]] ; NVPTX-DISABLED-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4, !tbaa [[TBAA18]]
; NVPTX-DISABLED-NEXT: call void @__omp_outlined__4(i32* noalias nocapture noundef nonnull readonly align 4 dereferenceable(4) [[DOTTHREADID_TEMP_]], i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTZERO_ADDR]]) #[[ATTR3]] ; NVPTX-DISABLED-NEXT: call void @__omp_outlined__4(i32* noalias nocapture noundef nonnull readonly align 4 dereferenceable(4) [[DOTTHREADID_TEMP_]], i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTZERO_ADDR]]) #[[ATTR2]]
; NVPTX-DISABLED-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 1, i1 true) ; NVPTX-DISABLED-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 1, i1 true)
; NVPTX-DISABLED-NEXT: br label [[COMMON_RET]] ; NVPTX-DISABLED-NEXT: br label [[COMMON_RET]]
; ;
entry: entry:
%.zero.addr = alloca i32, align 4 %.zero.addr = alloca i32, align 4
%.threadid_temp. = alloca i32, align 4 %.threadid_temp. = alloca i32, align 4
%0 = call i32 @__kmpc_target_init(%struct.ident_t* @1, i8 1, i1 true, i1 true) %0 = call i32 @__kmpc_target_init(%struct.ident_t* @1, i8 1, i1 true, i1 true)
%exec_user_code = icmp eq i32 %0, -1 %exec_user_code = icmp eq i32 %0, -1
Show All 18 Lines
; AMDGPU-NEXT: entry: ; AMDGPU-NEXT: entry:
; AMDGPU-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [1 x i8*], align 8 ; AMDGPU-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [1 x i8*], align 8
; AMDGPU-NEXT: br label [[FOR_COND:%.*]] ; AMDGPU-NEXT: br label [[FOR_COND:%.*]]
; AMDGPU: for.cond: ; AMDGPU: for.cond:
; AMDGPU-NEXT: [[I_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INC:%.*]], [[FOR_BODY:%.*]] ] ; AMDGPU-NEXT: [[I_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INC:%.*]], [[FOR_BODY:%.*]] ]
; AMDGPU-NEXT: [[CMP:%.*]] = icmp slt i32 [[I_0]], 100 ; AMDGPU-NEXT: [[CMP:%.*]] = icmp slt i32 [[I_0]], 100
; AMDGPU-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_COND_CLEANUP:%.*]] ; AMDGPU-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_COND_CLEANUP:%.*]]
; AMDGPU: for.cond.cleanup: ; AMDGPU: for.cond.cleanup:
; AMDGPU-NEXT: call void @spmd_amenable() #[[ATTR6]] ; AMDGPU-NEXT: call void @spmd_amenable() #[[ATTR5]]
; AMDGPU-NEXT: ret void ; AMDGPU-NEXT: ret void
; AMDGPU: for.body: ; AMDGPU: for.body:
; AMDGPU-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0 ; AMDGPU-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
; AMDGPU-NEXT: store i8* addrspacecast (i8 addrspace(3)* getelementptr inbounds ([4 x i8], [4 x i8] addrspace(3)* @x_shared, i32 0, i32 0) to i8*), i8** [[TMP0]], align 8, !tbaa [[TBAA26:![0-9]+]] ; AMDGPU-NEXT: store i8* addrspacecast (i8 addrspace(3)* getelementptr inbounds ([4 x i8], [4 x i8] addrspace(3)* @x_shared, i32 0, i32 0) to i8*), i8** [[TMP0]], align 8, !tbaa [[TBAA26:![0-9]+]]
; AMDGPU-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTGLOBAL_TID_]], align 4, !tbaa [[TBAA18]] ; AMDGPU-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTGLOBAL_TID_]], align 4, !tbaa [[TBAA18]]
; AMDGPU-NEXT: [[TMP2:%.*]] = bitcast [1 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** ; AMDGPU-NEXT: [[TMP2:%.*]] = bitcast [1 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
; AMDGPU-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* noundef @[[GLOB1]], i32 [[TMP1]], i32 noundef 1, i32 noundef -1, i32 noundef -1, i8* noundef bitcast (void (i32*, i32*, i32*)* @__omp_outlined__5 to i8*), i8* noundef bitcast (void (i16, i32)* @__omp_outlined__5_wrapper to i8*), i8** noundef [[TMP2]], i64 noundef 1) ; AMDGPU-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* noundef @[[GLOB1]], i32 [[TMP1]], i32 noundef 1, i32 noundef -1, i32 noundef -1, i8* noundef bitcast (void (i32*, i32*, i32*)* @__omp_outlined__5 to i8*), i8* noundef bitcast (void (i16, i32)* @__omp_outlined__5_wrapper to i8*), i8** noundef [[TMP2]], i64 noundef 1)
; AMDGPU-NEXT: [[INC]] = add nsw i32 [[I_0]], 1 ; AMDGPU-NEXT: [[INC]] = add nsw i32 [[I_0]], 1
; AMDGPU-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP28:![0-9]+]] ; AMDGPU-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP28:![0-9]+]]
; ;
; NVPTX-LABEL: define {{[^@]+}}@__omp_outlined__4 ; NVPTX-LABEL: define {{[^@]+}}@__omp_outlined__4
; NVPTX-SAME: (i32* noalias nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[DOTGLOBAL_TID_:%.*]], i32* noalias nocapture nofree nonnull readnone align 4 dereferenceable(4) [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] { ; NVPTX-SAME: (i32* noalias nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[DOTGLOBAL_TID_:%.*]], i32* noalias nocapture nofree nonnull readnone align 4 dereferenceable(4) [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] {
; NVPTX-NEXT: entry: ; NVPTX-NEXT: entry:
; NVPTX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [1 x i8*], align 8 ; NVPTX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [1 x i8*], align 8
; NVPTX-NEXT: br label [[FOR_COND:%.*]] ; NVPTX-NEXT: br label [[FOR_COND:%.*]]
; NVPTX: for.cond: ; NVPTX: for.cond:
; NVPTX-NEXT: [[I_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INC:%.*]], [[FOR_BODY:%.*]] ] ; NVPTX-NEXT: [[I_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INC:%.*]], [[FOR_BODY:%.*]] ]
; NVPTX-NEXT: [[CMP:%.*]] = icmp slt i32 [[I_0]], 100 ; NVPTX-NEXT: [[CMP:%.*]] = icmp slt i32 [[I_0]], 100
; NVPTX-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_COND_CLEANUP:%.*]] ; NVPTX-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_COND_CLEANUP:%.*]]
; NVPTX: for.cond.cleanup: ; NVPTX: for.cond.cleanup:
; NVPTX-NEXT: call void @spmd_amenable() #[[ATTR6]] ; NVPTX-NEXT: call void @spmd_amenable() #[[ATTR5]]
; NVPTX-NEXT: ret void ; NVPTX-NEXT: ret void
; NVPTX: for.body: ; NVPTX: for.body:
; NVPTX-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0 ; NVPTX-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
; NVPTX-NEXT: store i8* addrspacecast (i8 addrspace(3)* getelementptr inbounds ([4 x i8], [4 x i8] addrspace(3)* @x_shared, i32 0, i32 0) to i8*), i8** [[TMP0]], align 8, !tbaa [[TBAA26:![0-9]+]] ; NVPTX-NEXT: store i8* addrspacecast (i8 addrspace(3)* getelementptr inbounds ([4 x i8], [4 x i8] addrspace(3)* @x_shared, i32 0, i32 0) to i8*), i8** [[TMP0]], align 8, !tbaa [[TBAA26:![0-9]+]]
; NVPTX-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTGLOBAL_TID_]], align 4, !tbaa [[TBAA18]] ; NVPTX-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTGLOBAL_TID_]], align 4, !tbaa [[TBAA18]]
; NVPTX-NEXT: [[TMP2:%.*]] = bitcast [1 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** ; NVPTX-NEXT: [[TMP2:%.*]] = bitcast [1 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
; NVPTX-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* noundef @[[GLOB1]], i32 [[TMP1]], i32 noundef 1, i32 noundef -1, i32 noundef -1, i8* noundef bitcast (void (i32*, i32*, i32*)* @__omp_outlined__5 to i8*), i8* noundef bitcast (void (i16, i32)* @__omp_outlined__5_wrapper to i8*), i8** noundef [[TMP2]], i64 noundef 1) ; NVPTX-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* noundef @[[GLOB1]], i32 [[TMP1]], i32 noundef 1, i32 noundef -1, i32 noundef -1, i8* noundef bitcast (void (i32*, i32*, i32*)* @__omp_outlined__5 to i8*), i8* noundef bitcast (void (i16, i32)* @__omp_outlined__5_wrapper to i8*), i8** noundef [[TMP2]], i64 noundef 1)
; NVPTX-NEXT: [[INC]] = add nsw i32 [[I_0]], 1 ; NVPTX-NEXT: [[INC]] = add nsw i32 [[I_0]], 1
; NVPTX-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP28:![0-9]+]] ; NVPTX-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP28:![0-9]+]]
; ;
; AMDGPU-DISABLED-LABEL: define {{[^@]+}}@__omp_outlined__4 ; AMDGPU-DISABLED-LABEL: define {{[^@]+}}@__omp_outlined__4
; AMDGPU-DISABLED-SAME: (i32* noalias nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[DOTGLOBAL_TID_:%.*]], i32* noalias nocapture nofree nonnull readnone align 4 dereferenceable(4) [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] { ; AMDGPU-DISABLED-SAME: (i32* noalias nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[DOTGLOBAL_TID_:%.*]], i32* noalias nocapture nofree nonnull readnone align 4 dereferenceable(4) [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] {
; AMDGPU-DISABLED-NEXT: entry: ; AMDGPU-DISABLED-NEXT: entry:
; AMDGPU-DISABLED-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [1 x i8*], align 8 ; AMDGPU-DISABLED-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [1 x i8*], align 8
; AMDGPU-DISABLED-NEXT: br label [[FOR_COND:%.*]] ; AMDGPU-DISABLED-NEXT: br label [[FOR_COND:%.*]]
; AMDGPU-DISABLED: for.cond: ; AMDGPU-DISABLED: for.cond:
; AMDGPU-DISABLED-NEXT: [[I_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INC:%.*]], [[FOR_BODY:%.*]] ] ; AMDGPU-DISABLED-NEXT: [[I_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INC:%.*]], [[FOR_BODY:%.*]] ]
; AMDGPU-DISABLED-NEXT: [[CMP:%.*]] = icmp slt i32 [[I_0]], 100 ; AMDGPU-DISABLED-NEXT: [[CMP:%.*]] = icmp slt i32 [[I_0]], 100
; AMDGPU-DISABLED-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_COND_CLEANUP:%.*]] ; AMDGPU-DISABLED-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_COND_CLEANUP:%.*]]
; AMDGPU-DISABLED: for.cond.cleanup: ; AMDGPU-DISABLED: for.cond.cleanup:
; AMDGPU-DISABLED-NEXT: call void @spmd_amenable() #[[ATTR6]] ; AMDGPU-DISABLED-NEXT: call void @spmd_amenable() #[[ATTR5]]
; AMDGPU-DISABLED-NEXT: ret void ; AMDGPU-DISABLED-NEXT: ret void
; AMDGPU-DISABLED: for.body: ; AMDGPU-DISABLED: for.body:
; AMDGPU-DISABLED-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0 ; AMDGPU-DISABLED-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
; AMDGPU-DISABLED-NEXT: store i8* addrspacecast (i8 addrspace(3)* getelementptr inbounds ([4 x i8], [4 x i8] addrspace(3)* @x_shared, i32 0, i32 0) to i8*), i8** [[TMP0]], align 8, !tbaa [[TBAA26:![0-9]+]] ; AMDGPU-DISABLED-NEXT: store i8* addrspacecast (i8 addrspace(3)* getelementptr inbounds ([4 x i8], [4 x i8] addrspace(3)* @x_shared, i32 0, i32 0) to i8*), i8** [[TMP0]], align 8, !tbaa [[TBAA26:![0-9]+]]
; AMDGPU-DISABLED-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTGLOBAL_TID_]], align 4, !tbaa [[TBAA18]] ; AMDGPU-DISABLED-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTGLOBAL_TID_]], align 4, !tbaa [[TBAA18]]
; AMDGPU-DISABLED-NEXT: [[TMP2:%.*]] = bitcast [1 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** ; AMDGPU-DISABLED-NEXT: [[TMP2:%.*]] = bitcast [1 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
; AMDGPU-DISABLED-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* noundef @[[GLOB1]], i32 [[TMP1]], i32 noundef 1, i32 noundef -1, i32 noundef -1, i8* noundef bitcast (void (i32*, i32*, i32*)* @__omp_outlined__5 to i8*), i8* noundef @__omp_outlined__5_wrapper.ID, i8** noundef [[TMP2]], i64 noundef 1) ; AMDGPU-DISABLED-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* noundef @[[GLOB1]], i32 [[TMP1]], i32 noundef 1, i32 noundef -1, i32 noundef -1, i8* noundef bitcast (void (i32*, i32*, i32*)* @__omp_outlined__5 to i8*), i8* noundef @__omp_outlined__5_wrapper.ID, i8** noundef [[TMP2]], i64 noundef 1)
; AMDGPU-DISABLED-NEXT: [[INC]] = add nsw i32 [[I_0]], 1 ; AMDGPU-DISABLED-NEXT: [[INC]] = add nsw i32 [[I_0]], 1
; AMDGPU-DISABLED-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP28:![0-9]+]] ; AMDGPU-DISABLED-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP28:![0-9]+]]
; ;
; NVPTX-DISABLED-LABEL: define {{[^@]+}}@__omp_outlined__4 ; NVPTX-DISABLED-LABEL: define {{[^@]+}}@__omp_outlined__4
; NVPTX-DISABLED-SAME: (i32* noalias nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[DOTGLOBAL_TID_:%.*]], i32* noalias nocapture nofree nonnull readnone align 4 dereferenceable(4) [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] { ; NVPTX-DISABLED-SAME: (i32* noalias nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[DOTGLOBAL_TID_:%.*]], i32* noalias nocapture nofree nonnull readnone align 4 dereferenceable(4) [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] {
; NVPTX-DISABLED-NEXT: entry: ; NVPTX-DISABLED-NEXT: entry:
; NVPTX-DISABLED-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [1 x i8*], align 8 ; NVPTX-DISABLED-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [1 x i8*], align 8
; NVPTX-DISABLED-NEXT: br label [[FOR_COND:%.*]] ; NVPTX-DISABLED-NEXT: br label [[FOR_COND:%.*]]
; NVPTX-DISABLED: for.cond: ; NVPTX-DISABLED: for.cond:
; NVPTX-DISABLED-NEXT: [[I_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INC:%.*]], [[FOR_BODY:%.*]] ] ; NVPTX-DISABLED-NEXT: [[I_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INC:%.*]], [[FOR_BODY:%.*]] ]
; NVPTX-DISABLED-NEXT: [[CMP:%.*]] = icmp slt i32 [[I_0]], 100 ; NVPTX-DISABLED-NEXT: [[CMP:%.*]] = icmp slt i32 [[I_0]], 100
; NVPTX-DISABLED-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_COND_CLEANUP:%.*]] ; NVPTX-DISABLED-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_COND_CLEANUP:%.*]]
; NVPTX-DISABLED: for.cond.cleanup: ; NVPTX-DISABLED: for.cond.cleanup:
; NVPTX-DISABLED-NEXT: call void @spmd_amenable() #[[ATTR6]] ; NVPTX-DISABLED-NEXT: call void @spmd_amenable() #[[ATTR5]]
; NVPTX-DISABLED-NEXT: ret void ; NVPTX-DISABLED-NEXT: ret void
; NVPTX-DISABLED: for.body: ; NVPTX-DISABLED: for.body:
; NVPTX-DISABLED-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0 ; NVPTX-DISABLED-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
; NVPTX-DISABLED-NEXT: store i8* addrspacecast (i8 addrspace(3)* getelementptr inbounds ([4 x i8], [4 x i8] addrspace(3)* @x_shared, i32 0, i32 0) to i8*), i8** [[TMP0]], align 8, !tbaa [[TBAA26:![0-9]+]] ; NVPTX-DISABLED-NEXT: store i8* addrspacecast (i8 addrspace(3)* getelementptr inbounds ([4 x i8], [4 x i8] addrspace(3)* @x_shared, i32 0, i32 0) to i8*), i8** [[TMP0]], align 8, !tbaa [[TBAA26:![0-9]+]]
; NVPTX-DISABLED-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTGLOBAL_TID_]], align 4, !tbaa [[TBAA18]] ; NVPTX-DISABLED-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTGLOBAL_TID_]], align 4, !tbaa [[TBAA18]]
; NVPTX-DISABLED-NEXT: [[TMP2:%.*]] = bitcast [1 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** ; NVPTX-DISABLED-NEXT: [[TMP2:%.*]] = bitcast [1 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
; NVPTX-DISABLED-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* noundef @[[GLOB1]], i32 [[TMP1]], i32 noundef 1, i32 noundef -1, i32 noundef -1, i8* noundef bitcast (void (i32*, i32*, i32*)* @__omp_outlined__5 to i8*), i8* noundef @__omp_outlined__5_wrapper.ID, i8** noundef [[TMP2]], i64 noundef 1) ; NVPTX-DISABLED-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* noundef @[[GLOB1]], i32 [[TMP1]], i32 noundef 1, i32 noundef -1, i32 noundef -1, i8* noundef bitcast (void (i32*, i32*, i32*)* @__omp_outlined__5 to i8*), i8* noundef @__omp_outlined__5_wrapper.ID, i8** noundef [[TMP2]], i64 noundef 1)
; NVPTX-DISABLED-NEXT: [[INC]] = add nsw i32 [[I_0]], 1 ; NVPTX-DISABLED-NEXT: [[INC]] = add nsw i32 [[I_0]], 1
Show All 28 Lines
; Function Attrs: alwaysinline convergent norecurse nounwind ; Function Attrs: alwaysinline convergent norecurse nounwind
define internal void @__omp_outlined__5(i32* noalias %.global_tid., i32* noalias %.bound_tid., i32* nonnull align 4 dereferenceable(4) %x) #0 { define internal void @__omp_outlined__5(i32* noalias %.global_tid., i32* noalias %.bound_tid., i32* nonnull align 4 dereferenceable(4) %x) #0 {
; AMDGPU-LABEL: define {{[^@]+}}@__omp_outlined__5 ; AMDGPU-LABEL: define {{[^@]+}}@__omp_outlined__5
; AMDGPU-SAME: (i32* noalias nocapture nofree readnone [[DOTGLOBAL_TID_:%.*]], i32* noalias nocapture nofree readnone [[DOTBOUND_TID_:%.*]], i32* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[X:%.*]]) #[[ATTR0]] { ; AMDGPU-SAME: (i32* noalias nocapture nofree readnone [[DOTGLOBAL_TID_:%.*]], i32* noalias nocapture nofree readnone [[DOTBOUND_TID_:%.*]], i32* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[X:%.*]]) #[[ATTR0]] {
; AMDGPU-NEXT: entry: ; AMDGPU-NEXT: entry:
; AMDGPU-NEXT: [[TMP0:%.*]] = load i32, i32* [[X]], align 4, !tbaa [[TBAA18]] ; AMDGPU-NEXT: [[TMP0:%.*]] = load i32, i32* [[X]], align 4, !tbaa [[TBAA18]]
; AMDGPU-NEXT: [[INC:%.*]] = add nsw i32 [[TMP0]], 1 ; AMDGPU-NEXT: [[INC:%.*]] = add nsw i32 [[TMP0]], 1
; AMDGPU-NEXT: store i32 [[INC]], i32* [[X]], align 4, !tbaa [[TBAA18]] ; AMDGPU-NEXT: store i32 [[INC]], i32* [[X]], align 4, !tbaa [[TBAA18]]
; AMDGPU-NEXT: call void @unknown() #[[ATTR7]] ; AMDGPU-NEXT: call void @unknown() #[[ATTR6]]
; AMDGPU-NEXT: ret void ; AMDGPU-NEXT: ret void
; ;
; NVPTX-LABEL: define {{[^@]+}}@__omp_outlined__5 ; NVPTX-LABEL: define {{[^@]+}}@__omp_outlined__5
; NVPTX-SAME: (i32* noalias nocapture nofree readnone [[DOTGLOBAL_TID_:%.*]], i32* noalias nocapture nofree readnone [[DOTBOUND_TID_:%.*]], i32* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[X:%.*]]) #[[ATTR0]] { ; NVPTX-SAME: (i32* noalias nocapture nofree readnone [[DOTGLOBAL_TID_:%.*]], i32* noalias nocapture nofree readnone [[DOTBOUND_TID_:%.*]], i32* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[X:%.*]]) #[[ATTR0]] {
; NVPTX-NEXT: entry: ; NVPTX-NEXT: entry:
; NVPTX-NEXT: [[TMP0:%.*]] = load i32, i32* [[X]], align 4, !tbaa [[TBAA18]] ; NVPTX-NEXT: [[TMP0:%.*]] = load i32, i32* [[X]], align 4, !tbaa [[TBAA18]]
; NVPTX-NEXT: [[INC:%.*]] = add nsw i32 [[TMP0]], 1 ; NVPTX-NEXT: [[INC:%.*]] = add nsw i32 [[TMP0]], 1
; NVPTX-NEXT: store i32 [[INC]], i32* [[X]], align 4, !tbaa [[TBAA18]] ; NVPTX-NEXT: store i32 [[INC]], i32* [[X]], align 4, !tbaa [[TBAA18]]
; NVPTX-NEXT: call void @unknown() #[[ATTR7]] ; NVPTX-NEXT: call void @unknown() #[[ATTR6]]
; NVPTX-NEXT: ret void ; NVPTX-NEXT: ret void
; ;
; AMDGPU-DISABLED-LABEL: define {{[^@]+}}@__omp_outlined__5 ; AMDGPU-DISABLED-LABEL: define {{[^@]+}}@__omp_outlined__5
; AMDGPU-DISABLED-SAME: (i32* noalias nocapture nofree readnone [[DOTGLOBAL_TID_:%.*]], i32* noalias nocapture nofree readnone [[DOTBOUND_TID_:%.*]], i32* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[X:%.*]]) #[[ATTR0]] { ; AMDGPU-DISABLED-SAME: (i32* noalias nocapture nofree readnone [[DOTGLOBAL_TID_:%.*]], i32* noalias nocapture nofree readnone [[DOTBOUND_TID_:%.*]], i32* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[X:%.*]]) #[[ATTR0]] {
; AMDGPU-DISABLED-NEXT: entry: ; AMDGPU-DISABLED-NEXT: entry:
; AMDGPU-DISABLED-NEXT: [[TMP0:%.*]] = load i32, i32* [[X]], align 4, !tbaa [[TBAA18]] ; AMDGPU-DISABLED-NEXT: [[TMP0:%.*]] = load i32, i32* [[X]], align 4, !tbaa [[TBAA18]]
; AMDGPU-DISABLED-NEXT: [[INC:%.*]] = add nsw i32 [[TMP0]], 1 ; AMDGPU-DISABLED-NEXT: [[INC:%.*]] = add nsw i32 [[TMP0]], 1
; AMDGPU-DISABLED-NEXT: store i32 [[INC]], i32* [[X]], align 4, !tbaa [[TBAA18]] ; AMDGPU-DISABLED-NEXT: store i32 [[INC]], i32* [[X]], align 4, !tbaa [[TBAA18]]
; AMDGPU-DISABLED-NEXT: call void @unknown() #[[ATTR7]] ; AMDGPU-DISABLED-NEXT: call void @unknown() #[[ATTR6]]
; AMDGPU-DISABLED-NEXT: ret void ; AMDGPU-DISABLED-NEXT: ret void
; ;
; NVPTX-DISABLED-LABEL: define {{[^@]+}}@__omp_outlined__5 ; NVPTX-DISABLED-LABEL: define {{[^@]+}}@__omp_outlined__5
; NVPTX-DISABLED-SAME: (i32* noalias nocapture nofree readnone [[DOTGLOBAL_TID_:%.*]], i32* noalias nocapture nofree readnone [[DOTBOUND_TID_:%.*]], i32* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[X:%.*]]) #[[ATTR0]] { ; NVPTX-DISABLED-SAME: (i32* noalias nocapture nofree readnone [[DOTGLOBAL_TID_:%.*]], i32* noalias nocapture nofree readnone [[DOTBOUND_TID_:%.*]], i32* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[X:%.*]]) #[[ATTR0]] {
; NVPTX-DISABLED-NEXT: entry: ; NVPTX-DISABLED-NEXT: entry:
; NVPTX-DISABLED-NEXT: [[TMP0:%.*]] = load i32, i32* [[X]], align 4, !tbaa [[TBAA18]] ; NVPTX-DISABLED-NEXT: [[TMP0:%.*]] = load i32, i32* [[X]], align 4, !tbaa [[TBAA18]]
; NVPTX-DISABLED-NEXT: [[INC:%.*]] = add nsw i32 [[TMP0]], 1 ; NVPTX-DISABLED-NEXT: [[INC:%.*]] = add nsw i32 [[TMP0]], 1
; NVPTX-DISABLED-NEXT: store i32 [[INC]], i32* [[X]], align 4, !tbaa [[TBAA18]] ; NVPTX-DISABLED-NEXT: store i32 [[INC]], i32* [[X]], align 4, !tbaa [[TBAA18]]
; NVPTX-DISABLED-NEXT: call void @unknown() #[[ATTR7]] ; NVPTX-DISABLED-NEXT: call void @unknown() #[[ATTR6]]
; NVPTX-DISABLED-NEXT: ret void ; NVPTX-DISABLED-NEXT: ret void
; ;
entry: entry:
%0 = load i32, i32* %x, align 4, !tbaa !18 %0 = load i32, i32* %x, align 4, !tbaa !18
%inc = add nsw i32 %0, 1 %inc = add nsw i32 %0, 1
store i32 %inc, i32* %x, align 4, !tbaa !18 store i32 %inc, i32* %x, align 4, !tbaa !18
call void @unknown() #11 call void @unknown() #11
ret void ret void
} }
; Function Attrs: convergent norecurse nounwind ; Function Attrs: convergent norecurse nounwind
define internal void @__omp_outlined__5_wrapper(i16 zeroext %0, i32 %1) #3 { define internal void @__omp_outlined__5_wrapper(i16 zeroext %0, i32 %1) #3 {
; AMDGPU-LABEL: define {{[^@]+}}@__omp_outlined__5_wrapper ; AMDGPU-LABEL: define {{[^@]+}}@__omp_outlined__5_wrapper
; AMDGPU-SAME: (i16 zeroext [[TMP0:%.*]], i32 [[TMP1:%.*]]) #[[ATTR1]] { ; AMDGPU-SAME: (i16 zeroext [[TMP0:%.*]], i32 [[TMP1:%.*]]) #[[ATTR1]] {
; AMDGPU-NEXT: entry: ; AMDGPU-NEXT: entry:
; AMDGPU-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4 ; AMDGPU-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4
; AMDGPU-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 ; AMDGPU-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
; AMDGPU-NEXT: [[GLOBAL_ARGS:%.*]] = alloca i8**, align 8 ; AMDGPU-NEXT: [[GLOBAL_ARGS:%.*]] = alloca i8**, align 8
; AMDGPU-NEXT: call void @__kmpc_get_shared_variables(i8*** [[GLOBAL_ARGS]]) ; AMDGPU-NEXT: call void @__kmpc_get_shared_variables(i8*** [[GLOBAL_ARGS]])
; AMDGPU-NEXT: [[TMP2:%.*]] = load i8**, i8*** [[GLOBAL_ARGS]], align 8 ; AMDGPU-NEXT: [[TMP2:%.*]] = load i8**, i8*** [[GLOBAL_ARGS]], align 8
; AMDGPU-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to i32** ; AMDGPU-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to i32**
; AMDGPU-NEXT: [[TMP4:%.*]] = load i32*, i32** [[TMP3]], align 8, !tbaa [[TBAA26]] ; AMDGPU-NEXT: [[TMP4:%.*]] = load i32*, i32** [[TMP3]], align 8, !tbaa [[TBAA26]]
; AMDGPU-NEXT: call void @__omp_outlined__5(i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTADDR1]], i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTZERO_ADDR]], i32* nonnull align 4 dereferenceable(4) [[TMP4]]) #[[ATTR3]] ; AMDGPU-NEXT: call void @__omp_outlined__5(i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTADDR1]], i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTZERO_ADDR]], i32* nonnull align 4 dereferenceable(4) [[TMP4]]) #[[ATTR2]]
; AMDGPU-NEXT: ret void ; AMDGPU-NEXT: ret void
; ;
; NVPTX-LABEL: define {{[^@]+}}@__omp_outlined__5_wrapper ; NVPTX-LABEL: define {{[^@]+}}@__omp_outlined__5_wrapper
; NVPTX-SAME: (i16 zeroext [[TMP0:%.*]], i32 [[TMP1:%.*]]) #[[ATTR1]] { ; NVPTX-SAME: (i16 zeroext [[TMP0:%.*]], i32 [[TMP1:%.*]]) #[[ATTR1]] {
; NVPTX-NEXT: entry: ; NVPTX-NEXT: entry:
; NVPTX-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4 ; NVPTX-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4
; NVPTX-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 ; NVPTX-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
; NVPTX-NEXT: [[GLOBAL_ARGS:%.*]] = alloca i8**, align 8 ; NVPTX-NEXT: [[GLOBAL_ARGS:%.*]] = alloca i8**, align 8
; NVPTX-NEXT: call void @__kmpc_get_shared_variables(i8*** [[GLOBAL_ARGS]]) ; NVPTX-NEXT: call void @__kmpc_get_shared_variables(i8*** [[GLOBAL_ARGS]])
; NVPTX-NEXT: [[TMP2:%.*]] = load i8**, i8*** [[GLOBAL_ARGS]], align 8 ; NVPTX-NEXT: [[TMP2:%.*]] = load i8**, i8*** [[GLOBAL_ARGS]], align 8
; NVPTX-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to i32** ; NVPTX-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to i32**
; NVPTX-NEXT: [[TMP4:%.*]] = load i32*, i32** [[TMP3]], align 8, !tbaa [[TBAA26]] ; NVPTX-NEXT: [[TMP4:%.*]] = load i32*, i32** [[TMP3]], align 8, !tbaa [[TBAA26]]
; NVPTX-NEXT: call void @__omp_outlined__5(i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTADDR1]], i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTZERO_ADDR]], i32* nonnull align 4 dereferenceable(4) [[TMP4]]) #[[ATTR3]] ; NVPTX-NEXT: call void @__omp_outlined__5(i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTADDR1]], i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTZERO_ADDR]], i32* nonnull align 4 dereferenceable(4) [[TMP4]]) #[[ATTR2]]
; NVPTX-NEXT: ret void ; NVPTX-NEXT: ret void
; ;
; AMDGPU-DISABLED-LABEL: define {{[^@]+}}@__omp_outlined__5_wrapper ; AMDGPU-DISABLED-LABEL: define {{[^@]+}}@__omp_outlined__5_wrapper
; AMDGPU-DISABLED-SAME: (i16 zeroext [[TMP0:%.*]], i32 [[TMP1:%.*]]) #[[ATTR1]] { ; AMDGPU-DISABLED-SAME: (i16 zeroext [[TMP0:%.*]], i32 [[TMP1:%.*]]) #[[ATTR1]] {
; AMDGPU-DISABLED-NEXT: entry: ; AMDGPU-DISABLED-NEXT: entry:
; AMDGPU-DISABLED-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4 ; AMDGPU-DISABLED-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4
; AMDGPU-DISABLED-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 ; AMDGPU-DISABLED-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
; AMDGPU-DISABLED-NEXT: [[GLOBAL_ARGS:%.*]] = alloca i8**, align 8 ; AMDGPU-DISABLED-NEXT: [[GLOBAL_ARGS:%.*]] = alloca i8**, align 8
; AMDGPU-DISABLED-NEXT: call void @__kmpc_get_shared_variables(i8*** [[GLOBAL_ARGS]]) ; AMDGPU-DISABLED-NEXT: call void @__kmpc_get_shared_variables(i8*** [[GLOBAL_ARGS]])
; AMDGPU-DISABLED-NEXT: [[TMP2:%.*]] = load i8**, i8*** [[GLOBAL_ARGS]], align 8 ; AMDGPU-DISABLED-NEXT: [[TMP2:%.*]] = load i8**, i8*** [[GLOBAL_ARGS]], align 8
; AMDGPU-DISABLED-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to i32** ; AMDGPU-DISABLED-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to i32**
; AMDGPU-DISABLED-NEXT: [[TMP4:%.*]] = load i32*, i32** [[TMP3]], align 8, !tbaa [[TBAA26]] ; AMDGPU-DISABLED-NEXT: [[TMP4:%.*]] = load i32*, i32** [[TMP3]], align 8, !tbaa [[TBAA26]]
; AMDGPU-DISABLED-NEXT: call void @__omp_outlined__5(i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTADDR1]], i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTZERO_ADDR]], i32* nonnull align 4 dereferenceable(4) [[TMP4]]) #[[ATTR3]] ; AMDGPU-DISABLED-NEXT: call void @__omp_outlined__5(i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTADDR1]], i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTZERO_ADDR]], i32* nonnull align 4 dereferenceable(4) [[TMP4]]) #[[ATTR2]]
; AMDGPU-DISABLED-NEXT: ret void ; AMDGPU-DISABLED-NEXT: ret void
; ;
; NVPTX-DISABLED-LABEL: define {{[^@]+}}@__omp_outlined__5_wrapper ; NVPTX-DISABLED-LABEL: define {{[^@]+}}@__omp_outlined__5_wrapper
; NVPTX-DISABLED-SAME: (i16 zeroext [[TMP0:%.*]], i32 [[TMP1:%.*]]) #[[ATTR1]] { ; NVPTX-DISABLED-SAME: (i16 zeroext [[TMP0:%.*]], i32 [[TMP1:%.*]]) #[[ATTR1]] {
; NVPTX-DISABLED-NEXT: entry: ; NVPTX-DISABLED-NEXT: entry:
; NVPTX-DISABLED-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4 ; NVPTX-DISABLED-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4
; NVPTX-DISABLED-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 ; NVPTX-DISABLED-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
; NVPTX-DISABLED-NEXT: [[GLOBAL_ARGS:%.*]] = alloca i8**, align 8 ; NVPTX-DISABLED-NEXT: [[GLOBAL_ARGS:%.*]] = alloca i8**, align 8
; NVPTX-DISABLED-NEXT: call void @__kmpc_get_shared_variables(i8*** [[GLOBAL_ARGS]]) ; NVPTX-DISABLED-NEXT: call void @__kmpc_get_shared_variables(i8*** [[GLOBAL_ARGS]])
; NVPTX-DISABLED-NEXT: [[TMP2:%.*]] = load i8**, i8*** [[GLOBAL_ARGS]], align 8 ; NVPTX-DISABLED-NEXT: [[TMP2:%.*]] = load i8**, i8*** [[GLOBAL_ARGS]], align 8
; NVPTX-DISABLED-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to i32** ; NVPTX-DISABLED-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to i32**
; NVPTX-DISABLED-NEXT: [[TMP4:%.*]] = load i32*, i32** [[TMP3]], align 8, !tbaa [[TBAA26]] ; NVPTX-DISABLED-NEXT: [[TMP4:%.*]] = load i32*, i32** [[TMP3]], align 8, !tbaa [[TBAA26]]
; NVPTX-DISABLED-NEXT: call void @__omp_outlined__5(i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTADDR1]], i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTZERO_ADDR]], i32* nonnull align 4 dereferenceable(4) [[TMP4]]) #[[ATTR3]] ; NVPTX-DISABLED-NEXT: call void @__omp_outlined__5(i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTADDR1]], i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTZERO_ADDR]], i32* nonnull align 4 dereferenceable(4) [[TMP4]]) #[[ATTR2]]
; NVPTX-DISABLED-NEXT: ret void ; NVPTX-DISABLED-NEXT: ret void
; ;
entry: entry:
%.addr1 = alloca i32, align 4 %.addr1 = alloca i32, align 4
%.zero.addr = alloca i32, align 4 %.zero.addr = alloca i32, align 4
%global_args = alloca i8**, align 8 %global_args = alloca i8**, align 8
store i32 %1, i32* %.addr1, align 4, !tbaa !18 store i32 %1, i32* %.addr1, align 4, !tbaa !18
store i32 0, i32* %.zero.addr, align 4 store i32 0, i32* %.zero.addr, align 4
Show All 13 Lines
; AMDGPU-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 ; AMDGPU-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
; AMDGPU-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 ; AMDGPU-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
; AMDGPU-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false, i1 false) ; AMDGPU-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false, i1 false)
; AMDGPU-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 ; AMDGPU-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
; AMDGPU-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[COMMON_RET:%.*]] ; AMDGPU-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[COMMON_RET:%.*]]
; AMDGPU: common.ret: ; AMDGPU: common.ret:
; AMDGPU-NEXT: ret void ; AMDGPU-NEXT: ret void
; AMDGPU: user_code.entry: ; AMDGPU: user_code.entry:
; AMDGPU-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) #[[ATTR3]] ; AMDGPU-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) #[[ATTR2]]
; AMDGPU-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4, !tbaa [[TBAA18]] ; AMDGPU-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4, !tbaa [[TBAA18]]
; AMDGPU-NEXT: call void @__omp_outlined__6(i32* noalias nocapture noundef nonnull readonly align 4 dereferenceable(4) [[DOTTHREADID_TEMP_]], i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTZERO_ADDR]]) #[[ATTR3]] ; AMDGPU-NEXT: call void @__omp_outlined__6(i32* noalias nocapture noundef nonnull readonly align 4 dereferenceable(4) [[DOTTHREADID_TEMP_]], i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTZERO_ADDR]]) #[[ATTR2]]
; AMDGPU-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) ; AMDGPU-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2, i1 false)
; AMDGPU-NEXT: br label [[COMMON_RET]] ; AMDGPU-NEXT: br label [[COMMON_RET]]
; ;
; NVPTX-LABEL: define {{[^@]+}}@__omp_offloading_fd02_2044372e_sequential_loop_to_shared_var_guarded_l50 ; NVPTX-LABEL: define {{[^@]+}}@__omp_offloading_fd02_2044372e_sequential_loop_to_shared_var_guarded_l50
; NVPTX-SAME: () #[[ATTR0]] { ; NVPTX-SAME: () #[[ATTR0]] {
; NVPTX-NEXT: entry: ; NVPTX-NEXT: entry:
; NVPTX-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 ; NVPTX-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
; NVPTX-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 ; NVPTX-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
; NVPTX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false, i1 false) ; NVPTX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false, i1 false)
; NVPTX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 ; NVPTX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
; NVPTX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[COMMON_RET:%.*]] ; NVPTX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[COMMON_RET:%.*]]
; NVPTX: common.ret: ; NVPTX: common.ret:
; NVPTX-NEXT: ret void ; NVPTX-NEXT: ret void
; NVPTX: user_code.entry: ; NVPTX: user_code.entry:
; NVPTX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) #[[ATTR3]] ; NVPTX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) #[[ATTR2]]
; NVPTX-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4, !tbaa [[TBAA18]] ; NVPTX-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4, !tbaa [[TBAA18]]
; NVPTX-NEXT: call void @__omp_outlined__6(i32* noalias nocapture noundef nonnull readonly align 4 dereferenceable(4) [[DOTTHREADID_TEMP_]], i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTZERO_ADDR]]) #[[ATTR3]] ; NVPTX-NEXT: call void @__omp_outlined__6(i32* noalias nocapture noundef nonnull readonly align 4 dereferenceable(4) [[DOTTHREADID_TEMP_]], i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTZERO_ADDR]]) #[[ATTR2]]
; NVPTX-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) ; NVPTX-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2, i1 false)
; NVPTX-NEXT: br label [[COMMON_RET]] ; NVPTX-NEXT: br label [[COMMON_RET]]
; ;
; AMDGPU-DISABLED-LABEL: define {{[^@]+}}@__omp_offloading_fd02_2044372e_sequential_loop_to_shared_var_guarded_l50 ; AMDGPU-DISABLED-LABEL: define {{[^@]+}}@__omp_offloading_fd02_2044372e_sequential_loop_to_shared_var_guarded_l50
; AMDGPU-DISABLED-SAME: () #[[ATTR0]] { ; AMDGPU-DISABLED-SAME: () #[[ATTR0]] {
; AMDGPU-DISABLED-NEXT: entry: ; AMDGPU-DISABLED-NEXT: entry:
; AMDGPU-DISABLED-NEXT: [[WORKER_WORK_FN_ADDR:%.*]] = alloca i8*, align 8, addrspace(5) ; AMDGPU-DISABLED-NEXT: [[WORKER_WORK_FN_ADDR:%.*]] = alloca i8*, align 8, addrspace(5)
; AMDGPU-DISABLED-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 ; AMDGPU-DISABLED-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
Show All 35 Lines
; AMDGPU-DISABLED-NEXT: call void @__kmpc_barrier_simple_generic(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]]) ; AMDGPU-DISABLED-NEXT: call void @__kmpc_barrier_simple_generic(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
; AMDGPU-DISABLED-NEXT: br label [[WORKER_STATE_MACHINE_BEGIN]] ; AMDGPU-DISABLED-NEXT: br label [[WORKER_STATE_MACHINE_BEGIN]]
; AMDGPU-DISABLED: thread.user_code.check: ; AMDGPU-DISABLED: thread.user_code.check:
; AMDGPU-DISABLED-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 ; AMDGPU-DISABLED-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
; AMDGPU-DISABLED-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[COMMON_RET:%.*]] ; AMDGPU-DISABLED-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[COMMON_RET:%.*]]
; AMDGPU-DISABLED: common.ret: ; AMDGPU-DISABLED: common.ret:
; AMDGPU-DISABLED-NEXT: ret void ; AMDGPU-DISABLED-NEXT: ret void
; AMDGPU-DISABLED: user_code.entry: ; AMDGPU-DISABLED: user_code.entry:
; AMDGPU-DISABLED-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) #[[ATTR3]] ; AMDGPU-DISABLED-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) #[[ATTR2]]
; AMDGPU-DISABLED-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4, !tbaa [[TBAA18]] ; AMDGPU-DISABLED-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4, !tbaa [[TBAA18]]
; AMDGPU-DISABLED-NEXT: call void @__omp_outlined__6(i32* noalias nocapture noundef nonnull readonly align 4 dereferenceable(4) [[DOTTHREADID_TEMP_]], i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTZERO_ADDR]]) #[[ATTR3]] ; AMDGPU-DISABLED-NEXT: call void @__omp_outlined__6(i32* noalias nocapture noundef nonnull readonly align 4 dereferenceable(4) [[DOTTHREADID_TEMP_]], i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTZERO_ADDR]]) #[[ATTR2]]
; AMDGPU-DISABLED-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 1, i1 true) ; AMDGPU-DISABLED-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 1, i1 true)
; AMDGPU-DISABLED-NEXT: br label [[COMMON_RET]] ; AMDGPU-DISABLED-NEXT: br label [[COMMON_RET]]
; ;
; NVPTX-DISABLED-LABEL: define {{[^@]+}}@__omp_offloading_fd02_2044372e_sequential_loop_to_shared_var_guarded_l50 ; NVPTX-DISABLED-LABEL: define {{[^@]+}}@__omp_offloading_fd02_2044372e_sequential_loop_to_shared_var_guarded_l50
; NVPTX-DISABLED-SAME: () #[[ATTR0]] { ; NVPTX-DISABLED-SAME: () #[[ATTR0]] {
; NVPTX-DISABLED-NEXT: entry: ; NVPTX-DISABLED-NEXT: entry:
; NVPTX-DISABLED-NEXT: [[WORKER_WORK_FN_ADDR:%.*]] = alloca i8*, align 8 ; NVPTX-DISABLED-NEXT: [[WORKER_WORK_FN_ADDR:%.*]] = alloca i8*, align 8
; NVPTX-DISABLED-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 ; NVPTX-DISABLED-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
Show All 34 Lines
; NVPTX-DISABLED-NEXT: call void @__kmpc_barrier_simple_generic(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]]) ; NVPTX-DISABLED-NEXT: call void @__kmpc_barrier_simple_generic(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
; NVPTX-DISABLED-NEXT: br label [[WORKER_STATE_MACHINE_BEGIN]] ; NVPTX-DISABLED-NEXT: br label [[WORKER_STATE_MACHINE_BEGIN]]
; NVPTX-DISABLED: thread.user_code.check: ; NVPTX-DISABLED: thread.user_code.check:
; NVPTX-DISABLED-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 ; NVPTX-DISABLED-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
; NVPTX-DISABLED-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[COMMON_RET:%.*]] ; NVPTX-DISABLED-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[COMMON_RET:%.*]]
; NVPTX-DISABLED: common.ret: ; NVPTX-DISABLED: common.ret:
; NVPTX-DISABLED-NEXT: ret void ; NVPTX-DISABLED-NEXT: ret void
; NVPTX-DISABLED: user_code.entry: ; NVPTX-DISABLED: user_code.entry:
; NVPTX-DISABLED-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) #[[ATTR3]] ; NVPTX-DISABLED-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) #[[ATTR2]]
; NVPTX-DISABLED-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4, !tbaa [[TBAA18]] ; NVPTX-DISABLED-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4, !tbaa [[TBAA18]]
; NVPTX-DISABLED-NEXT: call void @__omp_outlined__6(i32* noalias nocapture noundef nonnull readonly align 4 dereferenceable(4) [[DOTTHREADID_TEMP_]], i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTZERO_ADDR]]) #[[ATTR3]] ; NVPTX-DISABLED-NEXT: call void @__omp_outlined__6(i32* noalias nocapture noundef nonnull readonly align 4 dereferenceable(4) [[DOTTHREADID_TEMP_]], i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTZERO_ADDR]]) #[[ATTR2]]
; NVPTX-DISABLED-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 1, i1 true) ; NVPTX-DISABLED-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 1, i1 true)
; NVPTX-DISABLED-NEXT: br label [[COMMON_RET]] ; NVPTX-DISABLED-NEXT: br label [[COMMON_RET]]
; ;
entry: entry:
%.zero.addr = alloca i32, align 4 %.zero.addr = alloca i32, align 4
%.threadid_temp. = alloca i32, align 4 %.threadid_temp. = alloca i32, align 4
%0 = call i32 @__kmpc_target_init(%struct.ident_t* @1, i8 1, i1 true, i1 true) %0 = call i32 @__kmpc_target_init(%struct.ident_t* @1, i8 1, i1 true, i1 true)
%exec_user_code = icmp eq i32 %0, -1 %exec_user_code = icmp eq i32 %0, -1
Show All 33 Lines
; AMDGPU-NEXT: br label [[REGION_EXIT:%.*]] ; AMDGPU-NEXT: br label [[REGION_EXIT:%.*]]
; AMDGPU: region.exit: ; AMDGPU: region.exit:
; AMDGPU-NEXT: br label [[FOR_COND:%.*]] ; AMDGPU-NEXT: br label [[FOR_COND:%.*]]
; AMDGPU: for.cond: ; AMDGPU: for.cond:
; AMDGPU-NEXT: [[I_0:%.*]] = phi i32 [ 0, [[REGION_EXIT]] ], [ [[INC:%.*]], [[FOR_BODY:%.*]] ] ; AMDGPU-NEXT: [[I_0:%.*]] = phi i32 [ 0, [[REGION_EXIT]] ], [ [[INC:%.*]], [[FOR_BODY:%.*]] ]
; AMDGPU-NEXT: [[CMP:%.*]] = icmp slt i32 [[I_0]], 100 ; AMDGPU-NEXT: [[CMP:%.*]] = icmp slt i32 [[I_0]], 100
; AMDGPU-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_COND_CLEANUP:%.*]] ; AMDGPU-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_COND_CLEANUP:%.*]]
; AMDGPU: for.cond.cleanup: ; AMDGPU: for.cond.cleanup:
; AMDGPU-NEXT: call void @spmd_amenable() #[[ATTR6]] ; AMDGPU-NEXT: call void @spmd_amenable() #[[ATTR5]]
; AMDGPU-NEXT: ret void ; AMDGPU-NEXT: ret void
; AMDGPU: for.body: ; AMDGPU: for.body:
; AMDGPU-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0 ; AMDGPU-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
; AMDGPU-NEXT: store i8* addrspacecast (i8 addrspace(3)* getelementptr inbounds ([4 x i8], [4 x i8] addrspace(3)* @x_shared.1, i32 0, i32 0) to i8*), i8** [[TMP2]], align 8, !tbaa [[TBAA26]] ; AMDGPU-NEXT: store i8* addrspacecast (i8 addrspace(3)* getelementptr inbounds ([4 x i8], [4 x i8] addrspace(3)* @x_shared.1, i32 0, i32 0) to i8*), i8** [[TMP2]], align 8, !tbaa [[TBAA26]]
; AMDGPU-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTGLOBAL_TID_]], align 4, !tbaa [[TBAA18]] ; AMDGPU-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTGLOBAL_TID_]], align 4, !tbaa [[TBAA18]]
; AMDGPU-NEXT: [[TMP4:%.*]] = bitcast [1 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** ; AMDGPU-NEXT: [[TMP4:%.*]] = bitcast [1 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
; AMDGPU-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* noundef @[[GLOB1]], i32 [[TMP3]], i32 noundef 1, i32 noundef -1, i32 noundef -1, i8* noundef bitcast (void (i32*, i32*, i32*)* @__omp_outlined__7 to i8*), i8* noundef bitcast (void (i16, i32)* @__omp_outlined__7_wrapper to i8*), i8** noundef [[TMP4]], i64 noundef 1) ; AMDGPU-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* noundef @[[GLOB1]], i32 [[TMP3]], i32 noundef 1, i32 noundef -1, i32 noundef -1, i8* noundef bitcast (void (i32*, i32*, i32*)* @__omp_outlined__7 to i8*), i8* noundef bitcast (void (i16, i32)* @__omp_outlined__7_wrapper to i8*), i8** noundef [[TMP4]], i64 noundef 1)
; AMDGPU-NEXT: [[INC]] = add nsw i32 [[I_0]], 1 ; AMDGPU-NEXT: [[INC]] = add nsw i32 [[I_0]], 1
Show All 19 Lines
; NVPTX-NEXT: br label [[REGION_EXIT:%.*]] ; NVPTX-NEXT: br label [[REGION_EXIT:%.*]]
; NVPTX: region.exit: ; NVPTX: region.exit:
; NVPTX-NEXT: br label [[FOR_COND:%.*]] ; NVPTX-NEXT: br label [[FOR_COND:%.*]]
; NVPTX: for.cond: ; NVPTX: for.cond:
; NVPTX-NEXT: [[I_0:%.*]] = phi i32 [ 0, [[REGION_EXIT]] ], [ [[INC:%.*]], [[FOR_BODY:%.*]] ] ; NVPTX-NEXT: [[I_0:%.*]] = phi i32 [ 0, [[REGION_EXIT]] ], [ [[INC:%.*]], [[FOR_BODY:%.*]] ]
; NVPTX-NEXT: [[CMP:%.*]] = icmp slt i32 [[I_0]], 100 ; NVPTX-NEXT: [[CMP:%.*]] = icmp slt i32 [[I_0]], 100
; NVPTX-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_COND_CLEANUP:%.*]] ; NVPTX-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_COND_CLEANUP:%.*]]
; NVPTX: for.cond.cleanup: ; NVPTX: for.cond.cleanup:
; NVPTX-NEXT: call void @spmd_amenable() #[[ATTR6]] ; NVPTX-NEXT: call void @spmd_amenable() #[[ATTR5]]
; NVPTX-NEXT: ret void ; NVPTX-NEXT: ret void
; NVPTX: for.body: ; NVPTX: for.body:
; NVPTX-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0 ; NVPTX-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
; NVPTX-NEXT: store i8* addrspacecast (i8 addrspace(3)* getelementptr inbounds ([4 x i8], [4 x i8] addrspace(3)* @x_shared1, i32 0, i32 0) to i8*), i8** [[TMP2]], align 8, !tbaa [[TBAA26]] ; NVPTX-NEXT: store i8* addrspacecast (i8 addrspace(3)* getelementptr inbounds ([4 x i8], [4 x i8] addrspace(3)* @x_shared1, i32 0, i32 0) to i8*), i8** [[TMP2]], align 8, !tbaa [[TBAA26]]
; NVPTX-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTGLOBAL_TID_]], align 4, !tbaa [[TBAA18]] ; NVPTX-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTGLOBAL_TID_]], align 4, !tbaa [[TBAA18]]
; NVPTX-NEXT: [[TMP4:%.*]] = bitcast [1 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** ; NVPTX-NEXT: [[TMP4:%.*]] = bitcast [1 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
; NVPTX-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* noundef @[[GLOB1]], i32 [[TMP3]], i32 noundef 1, i32 noundef -1, i32 noundef -1, i8* noundef bitcast (void (i32*, i32*, i32*)* @__omp_outlined__7 to i8*), i8* noundef bitcast (void (i16, i32)* @__omp_outlined__7_wrapper to i8*), i8** noundef [[TMP4]], i64 noundef 1) ; NVPTX-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* noundef @[[GLOB1]], i32 [[TMP3]], i32 noundef 1, i32 noundef -1, i32 noundef -1, i8* noundef bitcast (void (i32*, i32*, i32*)* @__omp_outlined__7 to i8*), i8* noundef bitcast (void (i16, i32)* @__omp_outlined__7_wrapper to i8*), i8** noundef [[TMP4]], i64 noundef 1)
; NVPTX-NEXT: [[INC]] = add nsw i32 [[I_0]], 1 ; NVPTX-NEXT: [[INC]] = add nsw i32 [[I_0]], 1
; NVPTX-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP29:![0-9]+]] ; NVPTX-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP29:![0-9]+]]
; ;
; AMDGPU-DISABLED-LABEL: define {{[^@]+}}@__omp_outlined__6 ; AMDGPU-DISABLED-LABEL: define {{[^@]+}}@__omp_outlined__6
; AMDGPU-DISABLED-SAME: (i32* noalias nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[DOTGLOBAL_TID_:%.*]], i32* noalias nocapture nofree nonnull readnone align 4 dereferenceable(4) [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] { ; AMDGPU-DISABLED-SAME: (i32* noalias nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[DOTGLOBAL_TID_:%.*]], i32* noalias nocapture nofree nonnull readnone align 4 dereferenceable(4) [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] {
; AMDGPU-DISABLED-NEXT: entry: ; AMDGPU-DISABLED-NEXT: entry:
; AMDGPU-DISABLED-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [1 x i8*], align 8 ; AMDGPU-DISABLED-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [1 x i8*], align 8
; AMDGPU-DISABLED-NEXT: [[X_ON_STACK:%.*]] = bitcast i8* addrspacecast (i8 addrspace(3)* getelementptr inbounds ([4 x i8], [4 x i8] addrspace(3)* @x_shared.1, i32 0, i32 0) to i8*) to i32* ; AMDGPU-DISABLED-NEXT: [[X_ON_STACK:%.*]] = bitcast i8* addrspacecast (i8 addrspace(3)* getelementptr inbounds ([4 x i8], [4 x i8] addrspace(3)* @x_shared.1, i32 0, i32 0) to i8*) to i32*
; AMDGPU-DISABLED-NEXT: store i32 42, i32* [[X_ON_STACK]], align 4, !tbaa [[TBAA18]] ; AMDGPU-DISABLED-NEXT: store i32 42, i32* [[X_ON_STACK]], align 4, !tbaa [[TBAA18]]
; AMDGPU-DISABLED-NEXT: br label [[FOR_COND:%.*]] ; AMDGPU-DISABLED-NEXT: br label [[FOR_COND:%.*]]
; AMDGPU-DISABLED: for.cond: ; AMDGPU-DISABLED: for.cond:
; AMDGPU-DISABLED-NEXT: [[I_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INC:%.*]], [[FOR_BODY:%.*]] ] ; AMDGPU-DISABLED-NEXT: [[I_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INC:%.*]], [[FOR_BODY:%.*]] ]
; AMDGPU-DISABLED-NEXT: [[CMP:%.*]] = icmp slt i32 [[I_0]], 100 ; AMDGPU-DISABLED-NEXT: [[CMP:%.*]] = icmp slt i32 [[I_0]], 100
; AMDGPU-DISABLED-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_COND_CLEANUP:%.*]] ; AMDGPU-DISABLED-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_COND_CLEANUP:%.*]]
; AMDGPU-DISABLED: for.cond.cleanup: ; AMDGPU-DISABLED: for.cond.cleanup:
; AMDGPU-DISABLED-NEXT: call void @spmd_amenable() #[[ATTR6]] ; AMDGPU-DISABLED-NEXT: call void @spmd_amenable() #[[ATTR5]]
; AMDGPU-DISABLED-NEXT: ret void ; AMDGPU-DISABLED-NEXT: ret void
; AMDGPU-DISABLED: for.body: ; AMDGPU-DISABLED: for.body:
; AMDGPU-DISABLED-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0 ; AMDGPU-DISABLED-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
; AMDGPU-DISABLED-NEXT: store i8* addrspacecast (i8 addrspace(3)* getelementptr inbounds ([4 x i8], [4 x i8] addrspace(3)* @x_shared.1, i32 0, i32 0) to i8*), i8** [[TMP0]], align 8, !tbaa [[TBAA26]] ; AMDGPU-DISABLED-NEXT: store i8* addrspacecast (i8 addrspace(3)* getelementptr inbounds ([4 x i8], [4 x i8] addrspace(3)* @x_shared.1, i32 0, i32 0) to i8*), i8** [[TMP0]], align 8, !tbaa [[TBAA26]]
; AMDGPU-DISABLED-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTGLOBAL_TID_]], align 4, !tbaa [[TBAA18]] ; AMDGPU-DISABLED-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTGLOBAL_TID_]], align 4, !tbaa [[TBAA18]]
; AMDGPU-DISABLED-NEXT: [[TMP2:%.*]] = bitcast [1 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** ; AMDGPU-DISABLED-NEXT: [[TMP2:%.*]] = bitcast [1 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
; AMDGPU-DISABLED-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* noundef @[[GLOB1]], i32 [[TMP1]], i32 noundef 1, i32 noundef -1, i32 noundef -1, i8* noundef bitcast (void (i32*, i32*, i32*)* @__omp_outlined__7 to i8*), i8* noundef @__omp_outlined__7_wrapper.ID, i8** noundef [[TMP2]], i64 noundef 1) ; AMDGPU-DISABLED-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* noundef @[[GLOB1]], i32 [[TMP1]], i32 noundef 1, i32 noundef -1, i32 noundef -1, i8* noundef bitcast (void (i32*, i32*, i32*)* @__omp_outlined__7 to i8*), i8* noundef @__omp_outlined__7_wrapper.ID, i8** noundef [[TMP2]], i64 noundef 1)
; AMDGPU-DISABLED-NEXT: [[INC]] = add nsw i32 [[I_0]], 1 ; AMDGPU-DISABLED-NEXT: [[INC]] = add nsw i32 [[I_0]], 1
; AMDGPU-DISABLED-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP29:![0-9]+]] ; AMDGPU-DISABLED-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP29:![0-9]+]]
; ;
; NVPTX-DISABLED-LABEL: define {{[^@]+}}@__omp_outlined__6 ; NVPTX-DISABLED-LABEL: define {{[^@]+}}@__omp_outlined__6
; NVPTX-DISABLED-SAME: (i32* noalias nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[DOTGLOBAL_TID_:%.*]], i32* noalias nocapture nofree nonnull readnone align 4 dereferenceable(4) [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] { ; NVPTX-DISABLED-SAME: (i32* noalias nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[DOTGLOBAL_TID_:%.*]], i32* noalias nocapture nofree nonnull readnone align 4 dereferenceable(4) [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] {
; NVPTX-DISABLED-NEXT: entry: ; NVPTX-DISABLED-NEXT: entry:
; NVPTX-DISABLED-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [1 x i8*], align 8 ; NVPTX-DISABLED-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [1 x i8*], align 8
; NVPTX-DISABLED-NEXT: [[X_ON_STACK:%.*]] = bitcast i8* addrspacecast (i8 addrspace(3)* getelementptr inbounds ([4 x i8], [4 x i8] addrspace(3)* @x_shared1, i32 0, i32 0) to i8*) to i32* ; NVPTX-DISABLED-NEXT: [[X_ON_STACK:%.*]] = bitcast i8* addrspacecast (i8 addrspace(3)* getelementptr inbounds ([4 x i8], [4 x i8] addrspace(3)* @x_shared1, i32 0, i32 0) to i8*) to i32*
; NVPTX-DISABLED-NEXT: store i32 42, i32* [[X_ON_STACK]], align 4, !tbaa [[TBAA18]] ; NVPTX-DISABLED-NEXT: store i32 42, i32* [[X_ON_STACK]], align 4, !tbaa [[TBAA18]]
; NVPTX-DISABLED-NEXT: br label [[FOR_COND:%.*]] ; NVPTX-DISABLED-NEXT: br label [[FOR_COND:%.*]]
; NVPTX-DISABLED: for.cond: ; NVPTX-DISABLED: for.cond:
; NVPTX-DISABLED-NEXT: [[I_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INC:%.*]], [[FOR_BODY:%.*]] ] ; NVPTX-DISABLED-NEXT: [[I_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INC:%.*]], [[FOR_BODY:%.*]] ]
; NVPTX-DISABLED-NEXT: [[CMP:%.*]] = icmp slt i32 [[I_0]], 100 ; NVPTX-DISABLED-NEXT: [[CMP:%.*]] = icmp slt i32 [[I_0]], 100
; NVPTX-DISABLED-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_COND_CLEANUP:%.*]] ; NVPTX-DISABLED-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_COND_CLEANUP:%.*]]
; NVPTX-DISABLED: for.cond.cleanup: ; NVPTX-DISABLED: for.cond.cleanup:
; NVPTX-DISABLED-NEXT: call void @spmd_amenable() #[[ATTR6]] ; NVPTX-DISABLED-NEXT: call void @spmd_amenable() #[[ATTR5]]
; NVPTX-DISABLED-NEXT: ret void ; NVPTX-DISABLED-NEXT: ret void
; NVPTX-DISABLED: for.body: ; NVPTX-DISABLED: for.body:
; NVPTX-DISABLED-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0 ; NVPTX-DISABLED-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
; NVPTX-DISABLED-NEXT: store i8* addrspacecast (i8 addrspace(3)* getelementptr inbounds ([4 x i8], [4 x i8] addrspace(3)* @x_shared1, i32 0, i32 0) to i8*), i8** [[TMP0]], align 8, !tbaa [[TBAA26]] ; NVPTX-DISABLED-NEXT: store i8* addrspacecast (i8 addrspace(3)* getelementptr inbounds ([4 x i8], [4 x i8] addrspace(3)* @x_shared1, i32 0, i32 0) to i8*), i8** [[TMP0]], align 8, !tbaa [[TBAA26]]
; NVPTX-DISABLED-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTGLOBAL_TID_]], align 4, !tbaa [[TBAA18]] ; NVPTX-DISABLED-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTGLOBAL_TID_]], align 4, !tbaa [[TBAA18]]
; NVPTX-DISABLED-NEXT: [[TMP2:%.*]] = bitcast [1 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** ; NVPTX-DISABLED-NEXT: [[TMP2:%.*]] = bitcast [1 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
; NVPTX-DISABLED-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* noundef @[[GLOB1]], i32 [[TMP1]], i32 noundef 1, i32 noundef -1, i32 noundef -1, i8* noundef bitcast (void (i32*, i32*, i32*)* @__omp_outlined__7 to i8*), i8* noundef @__omp_outlined__7_wrapper.ID, i8** noundef [[TMP2]], i64 noundef 1) ; NVPTX-DISABLED-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* noundef @[[GLOB1]], i32 [[TMP1]], i32 noundef 1, i32 noundef -1, i32 noundef -1, i8* noundef bitcast (void (i32*, i32*, i32*)* @__omp_outlined__7 to i8*), i8* noundef @__omp_outlined__7_wrapper.ID, i8** noundef [[TMP2]], i64 noundef 1)
; NVPTX-DISABLED-NEXT: [[INC]] = add nsw i32 [[I_0]], 1 ; NVPTX-DISABLED-NEXT: [[INC]] = add nsw i32 [[I_0]], 1
Show All 29 Lines
; Function Attrs: alwaysinline convergent norecurse nounwind ; Function Attrs: alwaysinline convergent norecurse nounwind
define internal void @__omp_outlined__7(i32* noalias %.global_tid., i32* noalias %.bound_tid., i32* nonnull align 4 dereferenceable(4) %x) #0 { define internal void @__omp_outlined__7(i32* noalias %.global_tid., i32* noalias %.bound_tid., i32* nonnull align 4 dereferenceable(4) %x) #0 {
; AMDGPU-LABEL: define {{[^@]+}}@__omp_outlined__7 ; AMDGPU-LABEL: define {{[^@]+}}@__omp_outlined__7
; AMDGPU-SAME: (i32* noalias nocapture nofree readnone [[DOTGLOBAL_TID_:%.*]], i32* noalias nocapture nofree readnone [[DOTBOUND_TID_:%.*]], i32* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[X:%.*]]) #[[ATTR0]] { ; AMDGPU-SAME: (i32* noalias nocapture nofree readnone [[DOTGLOBAL_TID_:%.*]], i32* noalias nocapture nofree readnone [[DOTBOUND_TID_:%.*]], i32* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[X:%.*]]) #[[ATTR0]] {
; AMDGPU-NEXT: entry: ; AMDGPU-NEXT: entry:
; AMDGPU-NEXT: [[TMP0:%.*]] = load i32, i32* [[X]], align 4, !tbaa [[TBAA18]] ; AMDGPU-NEXT: [[TMP0:%.*]] = load i32, i32* [[X]], align 4, !tbaa [[TBAA18]]
; AMDGPU-NEXT: [[INC:%.*]] = add nsw i32 [[TMP0]], 1 ; AMDGPU-NEXT: [[INC:%.*]] = add nsw i32 [[TMP0]], 1
; AMDGPU-NEXT: store i32 [[INC]], i32* [[X]], align 4, !tbaa [[TBAA18]] ; AMDGPU-NEXT: store i32 [[INC]], i32* [[X]], align 4, !tbaa [[TBAA18]]
; AMDGPU-NEXT: call void @unknown() #[[ATTR7]] ; AMDGPU-NEXT: call void @unknown() #[[ATTR6]]
; AMDGPU-NEXT: ret void ; AMDGPU-NEXT: ret void
; ;
; NVPTX-LABEL: define {{[^@]+}}@__omp_outlined__7 ; NVPTX-LABEL: define {{[^@]+}}@__omp_outlined__7
; NVPTX-SAME: (i32* noalias nocapture nofree readnone [[DOTGLOBAL_TID_:%.*]], i32* noalias nocapture nofree readnone [[DOTBOUND_TID_:%.*]], i32* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[X:%.*]]) #[[ATTR0]] { ; NVPTX-SAME: (i32* noalias nocapture nofree readnone [[DOTGLOBAL_TID_:%.*]], i32* noalias nocapture nofree readnone [[DOTBOUND_TID_:%.*]], i32* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[X:%.*]]) #[[ATTR0]] {
; NVPTX-NEXT: entry: ; NVPTX-NEXT: entry:
; NVPTX-NEXT: [[TMP0:%.*]] = load i32, i32* [[X]], align 4, !tbaa [[TBAA18]] ; NVPTX-NEXT: [[TMP0:%.*]] = load i32, i32* [[X]], align 4, !tbaa [[TBAA18]]
; NVPTX-NEXT: [[INC:%.*]] = add nsw i32 [[TMP0]], 1 ; NVPTX-NEXT: [[INC:%.*]] = add nsw i32 [[TMP0]], 1
; NVPTX-NEXT: store i32 [[INC]], i32* [[X]], align 4, !tbaa [[TBAA18]] ; NVPTX-NEXT: store i32 [[INC]], i32* [[X]], align 4, !tbaa [[TBAA18]]
; NVPTX-NEXT: call void @unknown() #[[ATTR7]] ; NVPTX-NEXT: call void @unknown() #[[ATTR6]]
; NVPTX-NEXT: ret void ; NVPTX-NEXT: ret void
; ;
; AMDGPU-DISABLED-LABEL: define {{[^@]+}}@__omp_outlined__7 ; AMDGPU-DISABLED-LABEL: define {{[^@]+}}@__omp_outlined__7
; AMDGPU-DISABLED-SAME: (i32* noalias nocapture nofree readnone [[DOTGLOBAL_TID_:%.*]], i32* noalias nocapture nofree readnone [[DOTBOUND_TID_:%.*]], i32* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[X:%.*]]) #[[ATTR0]] { ; AMDGPU-DISABLED-SAME: (i32* noalias nocapture nofree readnone [[DOTGLOBAL_TID_:%.*]], i32* noalias nocapture nofree readnone [[DOTBOUND_TID_:%.*]], i32* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[X:%.*]]) #[[ATTR0]] {
; AMDGPU-DISABLED-NEXT: entry: ; AMDGPU-DISABLED-NEXT: entry:
; AMDGPU-DISABLED-NEXT: [[TMP0:%.*]] = load i32, i32* [[X]], align 4, !tbaa [[TBAA18]] ; AMDGPU-DISABLED-NEXT: [[TMP0:%.*]] = load i32, i32* [[X]], align 4, !tbaa [[TBAA18]]
; AMDGPU-DISABLED-NEXT: [[INC:%.*]] = add nsw i32 [[TMP0]], 1 ; AMDGPU-DISABLED-NEXT: [[INC:%.*]] = add nsw i32 [[TMP0]], 1
; AMDGPU-DISABLED-NEXT: store i32 [[INC]], i32* [[X]], align 4, !tbaa [[TBAA18]] ; AMDGPU-DISABLED-NEXT: store i32 [[INC]], i32* [[X]], align 4, !tbaa [[TBAA18]]
; AMDGPU-DISABLED-NEXT: call void @unknown() #[[ATTR7]] ; AMDGPU-DISABLED-NEXT: call void @unknown() #[[ATTR6]]
; AMDGPU-DISABLED-NEXT: ret void ; AMDGPU-DISABLED-NEXT: ret void
; ;
; NVPTX-DISABLED-LABEL: define {{[^@]+}}@__omp_outlined__7 ; NVPTX-DISABLED-LABEL: define {{[^@]+}}@__omp_outlined__7
; NVPTX-DISABLED-SAME: (i32* noalias nocapture nofree readnone [[DOTGLOBAL_TID_:%.*]], i32* noalias nocapture nofree readnone [[DOTBOUND_TID_:%.*]], i32* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[X:%.*]]) #[[ATTR0]] { ; NVPTX-DISABLED-SAME: (i32* noalias nocapture nofree readnone [[DOTGLOBAL_TID_:%.*]], i32* noalias nocapture nofree readnone [[DOTBOUND_TID_:%.*]], i32* nocapture nofree noundef nonnull align 4 dereferenceable(4) [[X:%.*]]) #[[ATTR0]] {
; NVPTX-DISABLED-NEXT: entry: ; NVPTX-DISABLED-NEXT: entry:
; NVPTX-DISABLED-NEXT: [[TMP0:%.*]] = load i32, i32* [[X]], align 4, !tbaa [[TBAA18]] ; NVPTX-DISABLED-NEXT: [[TMP0:%.*]] = load i32, i32* [[X]], align 4, !tbaa [[TBAA18]]
; NVPTX-DISABLED-NEXT: [[INC:%.*]] = add nsw i32 [[TMP0]], 1 ; NVPTX-DISABLED-NEXT: [[INC:%.*]] = add nsw i32 [[TMP0]], 1
; NVPTX-DISABLED-NEXT: store i32 [[INC]], i32* [[X]], align 4, !tbaa [[TBAA18]] ; NVPTX-DISABLED-NEXT: store i32 [[INC]], i32* [[X]], align 4, !tbaa [[TBAA18]]
; NVPTX-DISABLED-NEXT: call void @unknown() #[[ATTR7]] ; NVPTX-DISABLED-NEXT: call void @unknown() #[[ATTR6]]
; NVPTX-DISABLED-NEXT: ret void ; NVPTX-DISABLED-NEXT: ret void
; ;
entry: entry:
%0 = load i32, i32* %x, align 4, !tbaa !18 %0 = load i32, i32* %x, align 4, !tbaa !18
%inc = add nsw i32 %0, 1 %inc = add nsw i32 %0, 1
store i32 %inc, i32* %x, align 4, !tbaa !18 store i32 %inc, i32* %x, align 4, !tbaa !18
call void @unknown() #11 call void @unknown() #11
ret void ret void
} }
; Function Attrs: convergent norecurse nounwind ; Function Attrs: convergent norecurse nounwind
define internal void @__omp_outlined__7_wrapper(i16 zeroext %0, i32 %1) #3 { define internal void @__omp_outlined__7_wrapper(i16 zeroext %0, i32 %1) #3 {
; AMDGPU-LABEL: define {{[^@]+}}@__omp_outlined__7_wrapper ; AMDGPU-LABEL: define {{[^@]+}}@__omp_outlined__7_wrapper
; AMDGPU-SAME: (i16 zeroext [[TMP0:%.*]], i32 [[TMP1:%.*]]) #[[ATTR1]] { ; AMDGPU-SAME: (i16 zeroext [[TMP0:%.*]], i32 [[TMP1:%.*]]) #[[ATTR1]] {
; AMDGPU-NEXT: entry: ; AMDGPU-NEXT: entry:
; AMDGPU-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4 ; AMDGPU-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4
; AMDGPU-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 ; AMDGPU-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
; AMDGPU-NEXT: [[GLOBAL_ARGS:%.*]] = alloca i8**, align 8 ; AMDGPU-NEXT: [[GLOBAL_ARGS:%.*]] = alloca i8**, align 8
; AMDGPU-NEXT: call void @__kmpc_get_shared_variables(i8*** [[GLOBAL_ARGS]]) ; AMDGPU-NEXT: call void @__kmpc_get_shared_variables(i8*** [[GLOBAL_ARGS]])
; AMDGPU-NEXT: [[TMP2:%.*]] = load i8**, i8*** [[GLOBAL_ARGS]], align 8 ; AMDGPU-NEXT: [[TMP2:%.*]] = load i8**, i8*** [[GLOBAL_ARGS]], align 8
; AMDGPU-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to i32** ; AMDGPU-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to i32**
; AMDGPU-NEXT: [[TMP4:%.*]] = load i32*, i32** [[TMP3]], align 8, !tbaa [[TBAA26]] ; AMDGPU-NEXT: [[TMP4:%.*]] = load i32*, i32** [[TMP3]], align 8, !tbaa [[TBAA26]]
; AMDGPU-NEXT: call void @__omp_outlined__7(i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTADDR1]], i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTZERO_ADDR]], i32* nonnull align 4 dereferenceable(4) [[TMP4]]) #[[ATTR3]] ; AMDGPU-NEXT: call void @__omp_outlined__7(i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTADDR1]], i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTZERO_ADDR]], i32* nonnull align 4 dereferenceable(4) [[TMP4]]) #[[ATTR2]]
; AMDGPU-NEXT: ret void ; AMDGPU-NEXT: ret void
; ;
; NVPTX-LABEL: define {{[^@]+}}@__omp_outlined__7_wrapper ; NVPTX-LABEL: define {{[^@]+}}@__omp_outlined__7_wrapper
; NVPTX-SAME: (i16 zeroext [[TMP0:%.*]], i32 [[TMP1:%.*]]) #[[ATTR1]] { ; NVPTX-SAME: (i16 zeroext [[TMP0:%.*]], i32 [[TMP1:%.*]]) #[[ATTR1]] {
; NVPTX-NEXT: entry: ; NVPTX-NEXT: entry:
; NVPTX-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4 ; NVPTX-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4
; NVPTX-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 ; NVPTX-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
; NVPTX-NEXT: [[GLOBAL_ARGS:%.*]] = alloca i8**, align 8 ; NVPTX-NEXT: [[GLOBAL_ARGS:%.*]] = alloca i8**, align 8
; NVPTX-NEXT: call void @__kmpc_get_shared_variables(i8*** [[GLOBAL_ARGS]]) ; NVPTX-NEXT: call void @__kmpc_get_shared_variables(i8*** [[GLOBAL_ARGS]])
; NVPTX-NEXT: [[TMP2:%.*]] = load i8**, i8*** [[GLOBAL_ARGS]], align 8 ; NVPTX-NEXT: [[TMP2:%.*]] = load i8**, i8*** [[GLOBAL_ARGS]], align 8
; NVPTX-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to i32** ; NVPTX-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to i32**
; NVPTX-NEXT: [[TMP4:%.*]] = load i32*, i32** [[TMP3]], align 8, !tbaa [[TBAA26]] ; NVPTX-NEXT: [[TMP4:%.*]] = load i32*, i32** [[TMP3]], align 8, !tbaa [[TBAA26]]
; NVPTX-NEXT: call void @__omp_outlined__7(i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTADDR1]], i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTZERO_ADDR]], i32* nonnull align 4 dereferenceable(4) [[TMP4]]) #[[ATTR3]] ; NVPTX-NEXT: call void @__omp_outlined__7(i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTADDR1]], i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTZERO_ADDR]], i32* nonnull align 4 dereferenceable(4) [[TMP4]]) #[[ATTR2]]
; NVPTX-NEXT: ret void ; NVPTX-NEXT: ret void
; ;
; AMDGPU-DISABLED-LABEL: define {{[^@]+}}@__omp_outlined__7_wrapper ; AMDGPU-DISABLED-LABEL: define {{[^@]+}}@__omp_outlined__7_wrapper
; AMDGPU-DISABLED-SAME: (i16 zeroext [[TMP0:%.*]], i32 [[TMP1:%.*]]) #[[ATTR1]] { ; AMDGPU-DISABLED-SAME: (i16 zeroext [[TMP0:%.*]], i32 [[TMP1:%.*]]) #[[ATTR1]] {
; AMDGPU-DISABLED-NEXT: entry: ; AMDGPU-DISABLED-NEXT: entry:
; AMDGPU-DISABLED-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4 ; AMDGPU-DISABLED-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4
; AMDGPU-DISABLED-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 ; AMDGPU-DISABLED-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
; AMDGPU-DISABLED-NEXT: [[GLOBAL_ARGS:%.*]] = alloca i8**, align 8 ; AMDGPU-DISABLED-NEXT: [[GLOBAL_ARGS:%.*]] = alloca i8**, align 8
; AMDGPU-DISABLED-NEXT: call void @__kmpc_get_shared_variables(i8*** [[GLOBAL_ARGS]]) ; AMDGPU-DISABLED-NEXT: call void @__kmpc_get_shared_variables(i8*** [[GLOBAL_ARGS]])
; AMDGPU-DISABLED-NEXT: [[TMP2:%.*]] = load i8**, i8*** [[GLOBAL_ARGS]], align 8 ; AMDGPU-DISABLED-NEXT: [[TMP2:%.*]] = load i8**, i8*** [[GLOBAL_ARGS]], align 8
; AMDGPU-DISABLED-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to i32** ; AMDGPU-DISABLED-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to i32**
; AMDGPU-DISABLED-NEXT: [[TMP4:%.*]] = load i32*, i32** [[TMP3]], align 8, !tbaa [[TBAA26]] ; AMDGPU-DISABLED-NEXT: [[TMP4:%.*]] = load i32*, i32** [[TMP3]], align 8, !tbaa [[TBAA26]]
; AMDGPU-DISABLED-NEXT: call void @__omp_outlined__7(i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTADDR1]], i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTZERO_ADDR]], i32* nonnull align 4 dereferenceable(4) [[TMP4]]) #[[ATTR3]] ; AMDGPU-DISABLED-NEXT: call void @__omp_outlined__7(i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTADDR1]], i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTZERO_ADDR]], i32* nonnull align 4 dereferenceable(4) [[TMP4]]) #[[ATTR2]]
; AMDGPU-DISABLED-NEXT: ret void ; AMDGPU-DISABLED-NEXT: ret void
; ;
; NVPTX-DISABLED-LABEL: define {{[^@]+}}@__omp_outlined__7_wrapper ; NVPTX-DISABLED-LABEL: define {{[^@]+}}@__omp_outlined__7_wrapper
; NVPTX-DISABLED-SAME: (i16 zeroext [[TMP0:%.*]], i32 [[TMP1:%.*]]) #[[ATTR1]] { ; NVPTX-DISABLED-SAME: (i16 zeroext [[TMP0:%.*]], i32 [[TMP1:%.*]]) #[[ATTR1]] {
; NVPTX-DISABLED-NEXT: entry: ; NVPTX-DISABLED-NEXT: entry:
; NVPTX-DISABLED-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4 ; NVPTX-DISABLED-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4
; NVPTX-DISABLED-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 ; NVPTX-DISABLED-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
; NVPTX-DISABLED-NEXT: [[GLOBAL_ARGS:%.*]] = alloca i8**, align 8 ; NVPTX-DISABLED-NEXT: [[GLOBAL_ARGS:%.*]] = alloca i8**, align 8
; NVPTX-DISABLED-NEXT: call void @__kmpc_get_shared_variables(i8*** [[GLOBAL_ARGS]]) ; NVPTX-DISABLED-NEXT: call void @__kmpc_get_shared_variables(i8*** [[GLOBAL_ARGS]])
; NVPTX-DISABLED-NEXT: [[TMP2:%.*]] = load i8**, i8*** [[GLOBAL_ARGS]], align 8 ; NVPTX-DISABLED-NEXT: [[TMP2:%.*]] = load i8**, i8*** [[GLOBAL_ARGS]], align 8
; NVPTX-DISABLED-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to i32** ; NVPTX-DISABLED-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to i32**
; NVPTX-DISABLED-NEXT: [[TMP4:%.*]] = load i32*, i32** [[TMP3]], align 8, !tbaa [[TBAA26]] ; NVPTX-DISABLED-NEXT: [[TMP4:%.*]] = load i32*, i32** [[TMP3]], align 8, !tbaa [[TBAA26]]
; NVPTX-DISABLED-NEXT: call void @__omp_outlined__7(i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTADDR1]], i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTZERO_ADDR]], i32* nonnull align 4 dereferenceable(4) [[TMP4]]) #[[ATTR3]] ; NVPTX-DISABLED-NEXT: call void @__omp_outlined__7(i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTADDR1]], i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTZERO_ADDR]], i32* nonnull align 4 dereferenceable(4) [[TMP4]]) #[[ATTR2]]
; NVPTX-DISABLED-NEXT: ret void ; NVPTX-DISABLED-NEXT: ret void
; ;
entry: entry:
%.addr1 = alloca i32, align 4 %.addr1 = alloca i32, align 4
%.zero.addr = alloca i32, align 4 %.zero.addr = alloca i32, align 4
%global_args = alloca i8**, align 8 %global_args = alloca i8**, align 8
store i32 %1, i32* %.addr1, align 4, !tbaa !18 store i32 %1, i32* %.addr1, align 4, !tbaa !18
store i32 0, i32* %.zero.addr, align 4 store i32 0, i32* %.zero.addr, align 4
▲ Show 20 Lines • Show All 44 Lines • ▼ Show 20 Lines
; AMDGPU-NEXT: call void @__kmpc_barrier_simple_generic(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]]) ; AMDGPU-NEXT: call void @__kmpc_barrier_simple_generic(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
; AMDGPU-NEXT: br label [[WORKER_STATE_MACHINE_BEGIN]] ; AMDGPU-NEXT: br label [[WORKER_STATE_MACHINE_BEGIN]]
; AMDGPU: thread.user_code.check: ; AMDGPU: thread.user_code.check:
; AMDGPU-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 ; AMDGPU-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
; AMDGPU-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[COMMON_RET:%.*]] ; AMDGPU-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[COMMON_RET:%.*]]
; AMDGPU: common.ret: ; AMDGPU: common.ret:
; AMDGPU-NEXT: ret void ; AMDGPU-NEXT: ret void
; AMDGPU: user_code.entry: ; AMDGPU: user_code.entry:
; AMDGPU-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) #[[ATTR3]] ; AMDGPU-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) #[[ATTR2]]
; AMDGPU-NEXT: call void @__omp_outlined__8(i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTTHREADID_TEMP_]], i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTZERO_ADDR]]) #[[ATTR3]] ; AMDGPU-NEXT: call void @__omp_outlined__8(i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTTHREADID_TEMP_]], i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTZERO_ADDR]]) #[[ATTR2]]
; AMDGPU-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 1, i1 true) ; AMDGPU-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 1, i1 true)
; AMDGPU-NEXT: br label [[COMMON_RET]] ; AMDGPU-NEXT: br label [[COMMON_RET]]
; ;
; NVPTX-LABEL: define {{[^@]+}}@__omp_offloading_fd02_2044372e_do_not_spmdize_target_l65 ; NVPTX-LABEL: define {{[^@]+}}@__omp_offloading_fd02_2044372e_do_not_spmdize_target_l65
; NVPTX-SAME: () #[[ATTR0]] { ; NVPTX-SAME: () #[[ATTR0]] {
; NVPTX-NEXT: entry: ; NVPTX-NEXT: entry:
; NVPTX-NEXT: [[WORKER_WORK_FN_ADDR:%.*]] = alloca i8*, align 8 ; NVPTX-NEXT: [[WORKER_WORK_FN_ADDR:%.*]] = alloca i8*, align 8
; NVPTX-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 ; NVPTX-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
Show All 28 Lines
; NVPTX-NEXT: call void @__kmpc_barrier_simple_generic(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]]) ; NVPTX-NEXT: call void @__kmpc_barrier_simple_generic(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
; NVPTX-NEXT: br label [[WORKER_STATE_MACHINE_BEGIN]] ; NVPTX-NEXT: br label [[WORKER_STATE_MACHINE_BEGIN]]
; NVPTX: thread.user_code.check: ; NVPTX: thread.user_code.check:
; NVPTX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 ; NVPTX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
; NVPTX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[COMMON_RET:%.*]] ; NVPTX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[COMMON_RET:%.*]]
; NVPTX: common.ret: ; NVPTX: common.ret:
; NVPTX-NEXT: ret void ; NVPTX-NEXT: ret void
; NVPTX: user_code.entry: ; NVPTX: user_code.entry:
; NVPTX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) #[[ATTR3]] ; NVPTX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) #[[ATTR2]]
; NVPTX-NEXT: call void @__omp_outlined__8(i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTTHREADID_TEMP_]], i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTZERO_ADDR]]) #[[ATTR3]] ; NVPTX-NEXT: call void @__omp_outlined__8(i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTTHREADID_TEMP_]], i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTZERO_ADDR]]) #[[ATTR2]]
; NVPTX-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 1, i1 true) ; NVPTX-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 1, i1 true)
; NVPTX-NEXT: br label [[COMMON_RET]] ; NVPTX-NEXT: br label [[COMMON_RET]]
; ;
; AMDGPU-DISABLED-LABEL: define {{[^@]+}}@__omp_offloading_fd02_2044372e_do_not_spmdize_target_l65 ; AMDGPU-DISABLED-LABEL: define {{[^@]+}}@__omp_offloading_fd02_2044372e_do_not_spmdize_target_l65
; AMDGPU-DISABLED-SAME: () #[[ATTR0]] { ; AMDGPU-DISABLED-SAME: () #[[ATTR0]] {
; AMDGPU-DISABLED-NEXT: entry: ; AMDGPU-DISABLED-NEXT: entry:
; AMDGPU-DISABLED-NEXT: [[WORKER_WORK_FN_ADDR:%.*]] = alloca i8*, align 8, addrspace(5) ; AMDGPU-DISABLED-NEXT: [[WORKER_WORK_FN_ADDR:%.*]] = alloca i8*, align 8, addrspace(5)
; AMDGPU-DISABLED-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 ; AMDGPU-DISABLED-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
Show All 29 Lines
; AMDGPU-DISABLED-NEXT: call void @__kmpc_barrier_simple_generic(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]]) ; AMDGPU-DISABLED-NEXT: call void @__kmpc_barrier_simple_generic(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
; AMDGPU-DISABLED-NEXT: br label [[WORKER_STATE_MACHINE_BEGIN]] ; AMDGPU-DISABLED-NEXT: br label [[WORKER_STATE_MACHINE_BEGIN]]
; AMDGPU-DISABLED: thread.user_code.check: ; AMDGPU-DISABLED: thread.user_code.check:
; AMDGPU-DISABLED-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 ; AMDGPU-DISABLED-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
; AMDGPU-DISABLED-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[COMMON_RET:%.*]] ; AMDGPU-DISABLED-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[COMMON_RET:%.*]]
; AMDGPU-DISABLED: common.ret: ; AMDGPU-DISABLED: common.ret:
; AMDGPU-DISABLED-NEXT: ret void ; AMDGPU-DISABLED-NEXT: ret void
; AMDGPU-DISABLED: user_code.entry: ; AMDGPU-DISABLED: user_code.entry:
; AMDGPU-DISABLED-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) #[[ATTR3]] ; AMDGPU-DISABLED-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) #[[ATTR2]]
; AMDGPU-DISABLED-NEXT: call void @__omp_outlined__8(i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTTHREADID_TEMP_]], i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTZERO_ADDR]]) #[[ATTR3]] ; AMDGPU-DISABLED-NEXT: call void @__omp_outlined__8(i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTTHREADID_TEMP_]], i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTZERO_ADDR]]) #[[ATTR2]]
; AMDGPU-DISABLED-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 1, i1 true) ; AMDGPU-DISABLED-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 1, i1 true)
; AMDGPU-DISABLED-NEXT: br label [[COMMON_RET]] ; AMDGPU-DISABLED-NEXT: br label [[COMMON_RET]]
; ;
; NVPTX-DISABLED-LABEL: define {{[^@]+}}@__omp_offloading_fd02_2044372e_do_not_spmdize_target_l65 ; NVPTX-DISABLED-LABEL: define {{[^@]+}}@__omp_offloading_fd02_2044372e_do_not_spmdize_target_l65
; NVPTX-DISABLED-SAME: () #[[ATTR0]] { ; NVPTX-DISABLED-SAME: () #[[ATTR0]] {
; NVPTX-DISABLED-NEXT: entry: ; NVPTX-DISABLED-NEXT: entry:
; NVPTX-DISABLED-NEXT: [[WORKER_WORK_FN_ADDR:%.*]] = alloca i8*, align 8 ; NVPTX-DISABLED-NEXT: [[WORKER_WORK_FN_ADDR:%.*]] = alloca i8*, align 8
; NVPTX-DISABLED-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 ; NVPTX-DISABLED-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
Show All 28 Lines
; NVPTX-DISABLED-NEXT: call void @__kmpc_barrier_simple_generic(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]]) ; NVPTX-DISABLED-NEXT: call void @__kmpc_barrier_simple_generic(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
; NVPTX-DISABLED-NEXT: br label [[WORKER_STATE_MACHINE_BEGIN]] ; NVPTX-DISABLED-NEXT: br label [[WORKER_STATE_MACHINE_BEGIN]]
; NVPTX-DISABLED: thread.user_code.check: ; NVPTX-DISABLED: thread.user_code.check:
; NVPTX-DISABLED-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 ; NVPTX-DISABLED-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
; NVPTX-DISABLED-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[COMMON_RET:%.*]] ; NVPTX-DISABLED-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[COMMON_RET:%.*]]
; NVPTX-DISABLED: common.ret: ; NVPTX-DISABLED: common.ret:
; NVPTX-DISABLED-NEXT: ret void ; NVPTX-DISABLED-NEXT: ret void
; NVPTX-DISABLED: user_code.entry: ; NVPTX-DISABLED: user_code.entry:
; NVPTX-DISABLED-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) #[[ATTR3]] ; NVPTX-DISABLED-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) #[[ATTR2]]
; NVPTX-DISABLED-NEXT: call void @__omp_outlined__8(i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTTHREADID_TEMP_]], i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTZERO_ADDR]]) #[[ATTR3]] ; NVPTX-DISABLED-NEXT: call void @__omp_outlined__8(i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTTHREADID_TEMP_]], i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTZERO_ADDR]]) #[[ATTR2]]
; NVPTX-DISABLED-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 1, i1 true) ; NVPTX-DISABLED-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 1, i1 true)
; NVPTX-DISABLED-NEXT: br label [[COMMON_RET]] ; NVPTX-DISABLED-NEXT: br label [[COMMON_RET]]
; ;
entry: entry:
%.zero.addr = alloca i32, align 4 %.zero.addr = alloca i32, align 4
%.threadid_temp. = alloca i32, align 4 %.threadid_temp. = alloca i32, align 4
%0 = call i32 @__kmpc_target_init(%struct.ident_t* @1, i8 1, i1 true, i1 true) %0 = call i32 @__kmpc_target_init(%struct.ident_t* @1, i8 1, i1 true, i1 true)
%exec_user_code = icmp eq i32 %0, -1 %exec_user_code = icmp eq i32 %0, -1
Show All 11 Linesuser_code.entry: ; preds = %entry
br label %common.ret br label %common.ret
} }
; Function Attrs: alwaysinline convergent norecurse nounwind ; Function Attrs: alwaysinline convergent norecurse nounwind
define internal void @__omp_outlined__8(i32* noalias %.global_tid., i32* noalias %.bound_tid.) #0 { define internal void @__omp_outlined__8(i32* noalias %.global_tid., i32* noalias %.bound_tid.) #0 {
; AMDGPU-LABEL: define {{[^@]+}}@__omp_outlined__8 ; AMDGPU-LABEL: define {{[^@]+}}@__omp_outlined__8
; AMDGPU-SAME: (i32* noalias nocapture nofree nonnull readnone align 4 dereferenceable(4) [[DOTGLOBAL_TID_:%.*]], i32* noalias nocapture nofree nonnull readnone align 4 dereferenceable(4) [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] { ; AMDGPU-SAME: (i32* noalias nocapture nofree nonnull readnone align 4 dereferenceable(4) [[DOTGLOBAL_TID_:%.*]], i32* noalias nocapture nofree nonnull readnone align 4 dereferenceable(4) [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] {
; AMDGPU-NEXT: entry: ; AMDGPU-NEXT: entry:
; AMDGPU-NEXT: call void @unknown() #[[ATTR7]] ; AMDGPU-NEXT: call void @unknown() #[[ATTR6]]
; AMDGPU-NEXT: ret void ; AMDGPU-NEXT: ret void
; ;
; NVPTX-LABEL: define {{[^@]+}}@__omp_outlined__8 ; NVPTX-LABEL: define {{[^@]+}}@__omp_outlined__8
; NVPTX-SAME: (i32* noalias nocapture nofree nonnull readnone align 4 dereferenceable(4) [[DOTGLOBAL_TID_:%.*]], i32* noalias nocapture nofree nonnull readnone align 4 dereferenceable(4) [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] { ; NVPTX-SAME: (i32* noalias nocapture nofree nonnull readnone align 4 dereferenceable(4) [[DOTGLOBAL_TID_:%.*]], i32* noalias nocapture nofree nonnull readnone align 4 dereferenceable(4) [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] {
; NVPTX-NEXT: entry: ; NVPTX-NEXT: entry:
; NVPTX-NEXT: call void @unknown() #[[ATTR7]] ; NVPTX-NEXT: call void @unknown() #[[ATTR6]]
; NVPTX-NEXT: ret void ; NVPTX-NEXT: ret void
; ;
; AMDGPU-DISABLED-LABEL: define {{[^@]+}}@__omp_outlined__8 ; AMDGPU-DISABLED-LABEL: define {{[^@]+}}@__omp_outlined__8
; AMDGPU-DISABLED-SAME: (i32* noalias nocapture nofree nonnull readnone align 4 dereferenceable(4) [[DOTGLOBAL_TID_:%.*]], i32* noalias nocapture nofree nonnull readnone align 4 dereferenceable(4) [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] { ; AMDGPU-DISABLED-SAME: (i32* noalias nocapture nofree nonnull readnone align 4 dereferenceable(4) [[DOTGLOBAL_TID_:%.*]], i32* noalias nocapture nofree nonnull readnone align 4 dereferenceable(4) [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] {
; AMDGPU-DISABLED-NEXT: entry: ; AMDGPU-DISABLED-NEXT: entry:
; AMDGPU-DISABLED-NEXT: call void @unknown() #[[ATTR7]] ; AMDGPU-DISABLED-NEXT: call void @unknown() #[[ATTR6]]
; AMDGPU-DISABLED-NEXT: ret void ; AMDGPU-DISABLED-NEXT: ret void
; ;
; NVPTX-DISABLED-LABEL: define {{[^@]+}}@__omp_outlined__8 ; NVPTX-DISABLED-LABEL: define {{[^@]+}}@__omp_outlined__8
; NVPTX-DISABLED-SAME: (i32* noalias nocapture nofree nonnull readnone align 4 dereferenceable(4) [[DOTGLOBAL_TID_:%.*]], i32* noalias nocapture nofree nonnull readnone align 4 dereferenceable(4) [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] { ; NVPTX-DISABLED-SAME: (i32* noalias nocapture nofree nonnull readnone align 4 dereferenceable(4) [[DOTGLOBAL_TID_:%.*]], i32* noalias nocapture nofree nonnull readnone align 4 dereferenceable(4) [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] {
; NVPTX-DISABLED-NEXT: entry: ; NVPTX-DISABLED-NEXT: entry:
; NVPTX-DISABLED-NEXT: call void @unknown() #[[ATTR7]] ; NVPTX-DISABLED-NEXT: call void @unknown() #[[ATTR6]]
; NVPTX-DISABLED-NEXT: ret void ; NVPTX-DISABLED-NEXT: ret void
; ;
entry: entry:
call void @unknown() #11 call void @unknown() #11
ret void ret void
} }
; Function Attrs: alwaysinline convergent norecurse nounwind ; Function Attrs: alwaysinline convergent norecurse nounwind
Show All 40 Lines
; AMDGPU-NEXT: call void @__kmpc_barrier_simple_generic(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]]) ; AMDGPU-NEXT: call void @__kmpc_barrier_simple_generic(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
; AMDGPU-NEXT: br label [[WORKER_STATE_MACHINE_BEGIN]] ; AMDGPU-NEXT: br label [[WORKER_STATE_MACHINE_BEGIN]]
; AMDGPU: thread.user_code.check: ; AMDGPU: thread.user_code.check:
; AMDGPU-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 ; AMDGPU-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
; AMDGPU-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[COMMON_RET:%.*]] ; AMDGPU-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[COMMON_RET:%.*]]
; AMDGPU: common.ret: ; AMDGPU: common.ret:
; AMDGPU-NEXT: ret void ; AMDGPU-NEXT: ret void
; AMDGPU: user_code.entry: ; AMDGPU: user_code.entry:
; AMDGPU-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) #[[ATTR3]] ; AMDGPU-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) #[[ATTR2]]
; AMDGPU-NEXT: [[TMP2:%.*]] = call i8* @__kmpc_omp_task_alloc(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i64 40, i64 0, i32 (i32, i8*)* bitcast (i32 (i32, %struct.kmp_task_t_with_privates*)* @"_omp_task_entry$" to i32 (i32, i8*)*)) #[[ATTR3]] ; AMDGPU-NEXT: [[TMP2:%.*]] = call i8* @__kmpc_omp_task_alloc(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i64 40, i64 0, i32 (i32, i8*)* bitcast (i32 (i32, %struct.kmp_task_t_with_privates*)* @"_omp_task_entry$" to i32 (i32, i8*)*)) #[[ATTR2]]
; AMDGPU-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to %struct.kmp_task_t_with_privates* ; AMDGPU-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to %struct.kmp_task_t_with_privates*
; AMDGPU-NEXT: [[TMP4:%.*]] = call i32 @__kmpc_omp_task(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i8* [[TMP2]]) #[[ATTR3]] ; AMDGPU-NEXT: [[TMP4:%.*]] = call i32 @__kmpc_omp_task(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i8* [[TMP2]]) #[[ATTR2]]
; AMDGPU-NEXT: [[TMP5:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** ; AMDGPU-NEXT: [[TMP5:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
; AMDGPU-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*)* @__omp_outlined__9 to i8*), i8* @__omp_outlined__9_wrapper.ID, i8** [[TMP5]], i64 0) ; AMDGPU-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*)* @__omp_outlined__9 to i8*), i8* @__omp_outlined__9_wrapper.ID, i8** [[TMP5]], i64 0)
; AMDGPU-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 1, i1 true) ; AMDGPU-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 1, i1 true)
; AMDGPU-NEXT: br label [[COMMON_RET]] ; AMDGPU-NEXT: br label [[COMMON_RET]]
; ;
; NVPTX-LABEL: define {{[^@]+}}@__omp_offloading_fd02_2044372e_do_not_spmdize_task_l74 ; NVPTX-LABEL: define {{[^@]+}}@__omp_offloading_fd02_2044372e_do_not_spmdize_task_l74
; NVPTX-SAME: () #[[ATTR0]] { ; NVPTX-SAME: () #[[ATTR0]] {
; NVPTX-NEXT: entry: ; NVPTX-NEXT: entry:
Show All 35 Lines
; NVPTX-NEXT: call void @__kmpc_barrier_simple_generic(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]]) ; NVPTX-NEXT: call void @__kmpc_barrier_simple_generic(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
; NVPTX-NEXT: br label [[WORKER_STATE_MACHINE_BEGIN]] ; NVPTX-NEXT: br label [[WORKER_STATE_MACHINE_BEGIN]]
; NVPTX: thread.user_code.check: ; NVPTX: thread.user_code.check:
; NVPTX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 ; NVPTX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
; NVPTX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[COMMON_RET:%.*]] ; NVPTX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[COMMON_RET:%.*]]
; NVPTX: common.ret: ; NVPTX: common.ret:
; NVPTX-NEXT: ret void ; NVPTX-NEXT: ret void
; NVPTX: user_code.entry: ; NVPTX: user_code.entry:
; NVPTX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) #[[ATTR3]] ; NVPTX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) #[[ATTR2]]
; NVPTX-NEXT: [[TMP2:%.*]] = call i8* @__kmpc_omp_task_alloc(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i64 40, i64 0, i32 (i32, i8*)* bitcast (i32 (i32, %struct.kmp_task_t_with_privates*)* @"_omp_task_entry$" to i32 (i32, i8*)*)) #[[ATTR3]] ; NVPTX-NEXT: [[TMP2:%.*]] = call i8* @__kmpc_omp_task_alloc(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i64 40, i64 0, i32 (i32, i8*)* bitcast (i32 (i32, %struct.kmp_task_t_with_privates*)* @"_omp_task_entry$" to i32 (i32, i8*)*)) #[[ATTR2]]
; NVPTX-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to %struct.kmp_task_t_with_privates* ; NVPTX-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to %struct.kmp_task_t_with_privates*
; NVPTX-NEXT: [[TMP4:%.*]] = call i32 @__kmpc_omp_task(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i8* [[TMP2]]) #[[ATTR3]] ; NVPTX-NEXT: [[TMP4:%.*]] = call i32 @__kmpc_omp_task(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i8* [[TMP2]]) #[[ATTR2]]
; NVPTX-NEXT: [[TMP5:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** ; NVPTX-NEXT: [[TMP5:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
; NVPTX-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*)* @__omp_outlined__9 to i8*), i8* @__omp_outlined__9_wrapper.ID, i8** [[TMP5]], i64 0) ; NVPTX-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*)* @__omp_outlined__9 to i8*), i8* @__omp_outlined__9_wrapper.ID, i8** [[TMP5]], i64 0)
; NVPTX-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 1, i1 true) ; NVPTX-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 1, i1 true)
; NVPTX-NEXT: br label [[COMMON_RET]] ; NVPTX-NEXT: br label [[COMMON_RET]]
; ;
; AMDGPU-DISABLED-LABEL: define {{[^@]+}}@__omp_offloading_fd02_2044372e_do_not_spmdize_task_l74 ; AMDGPU-DISABLED-LABEL: define {{[^@]+}}@__omp_offloading_fd02_2044372e_do_not_spmdize_task_l74
; AMDGPU-DISABLED-SAME: () #[[ATTR0]] { ; AMDGPU-DISABLED-SAME: () #[[ATTR0]] {
; AMDGPU-DISABLED-NEXT: entry: ; AMDGPU-DISABLED-NEXT: entry:
Show All 36 Lines
; AMDGPU-DISABLED-NEXT: call void @__kmpc_barrier_simple_generic(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]]) ; AMDGPU-DISABLED-NEXT: call void @__kmpc_barrier_simple_generic(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
; AMDGPU-DISABLED-NEXT: br label [[WORKER_STATE_MACHINE_BEGIN]] ; AMDGPU-DISABLED-NEXT: br label [[WORKER_STATE_MACHINE_BEGIN]]
; AMDGPU-DISABLED: thread.user_code.check: ; AMDGPU-DISABLED: thread.user_code.check:
; AMDGPU-DISABLED-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 ; AMDGPU-DISABLED-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
; AMDGPU-DISABLED-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[COMMON_RET:%.*]] ; AMDGPU-DISABLED-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[COMMON_RET:%.*]]
; AMDGPU-DISABLED: common.ret: ; AMDGPU-DISABLED: common.ret:
; AMDGPU-DISABLED-NEXT: ret void ; AMDGPU-DISABLED-NEXT: ret void
; AMDGPU-DISABLED: user_code.entry: ; AMDGPU-DISABLED: user_code.entry:
; AMDGPU-DISABLED-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) #[[ATTR3]] ; AMDGPU-DISABLED-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) #[[ATTR2]]
; AMDGPU-DISABLED-NEXT: [[TMP2:%.*]] = call i8* @__kmpc_omp_task_alloc(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i64 40, i64 0, i32 (i32, i8*)* bitcast (i32 (i32, %struct.kmp_task_t_with_privates*)* @"_omp_task_entry$" to i32 (i32, i8*)*)) #[[ATTR3]] ; AMDGPU-DISABLED-NEXT: [[TMP2:%.*]] = call i8* @__kmpc_omp_task_alloc(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i64 40, i64 0, i32 (i32, i8*)* bitcast (i32 (i32, %struct.kmp_task_t_with_privates*)* @"_omp_task_entry$" to i32 (i32, i8*)*)) #[[ATTR2]]
; AMDGPU-DISABLED-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to %struct.kmp_task_t_with_privates* ; AMDGPU-DISABLED-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to %struct.kmp_task_t_with_privates*
; AMDGPU-DISABLED-NEXT: [[TMP4:%.*]] = call i32 @__kmpc_omp_task(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i8* [[TMP2]]) #[[ATTR3]] ; AMDGPU-DISABLED-NEXT: [[TMP4:%.*]] = call i32 @__kmpc_omp_task(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i8* [[TMP2]]) #[[ATTR2]]
; AMDGPU-DISABLED-NEXT: [[TMP5:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** ; AMDGPU-DISABLED-NEXT: [[TMP5:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
; AMDGPU-DISABLED-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*)* @__omp_outlined__9 to i8*), i8* @__omp_outlined__9_wrapper.ID, i8** [[TMP5]], i64 0) ; AMDGPU-DISABLED-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*)* @__omp_outlined__9 to i8*), i8* @__omp_outlined__9_wrapper.ID, i8** [[TMP5]], i64 0)
; AMDGPU-DISABLED-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 1, i1 true) ; AMDGPU-DISABLED-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 1, i1 true)
; AMDGPU-DISABLED-NEXT: br label [[COMMON_RET]] ; AMDGPU-DISABLED-NEXT: br label [[COMMON_RET]]
; ;
; NVPTX-DISABLED-LABEL: define {{[^@]+}}@__omp_offloading_fd02_2044372e_do_not_spmdize_task_l74 ; NVPTX-DISABLED-LABEL: define {{[^@]+}}@__omp_offloading_fd02_2044372e_do_not_spmdize_task_l74
; NVPTX-DISABLED-SAME: () #[[ATTR0]] { ; NVPTX-DISABLED-SAME: () #[[ATTR0]] {
; NVPTX-DISABLED-NEXT: entry: ; NVPTX-DISABLED-NEXT: entry:
Show All 35 Lines
; NVPTX-DISABLED-NEXT: call void @__kmpc_barrier_simple_generic(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]]) ; NVPTX-DISABLED-NEXT: call void @__kmpc_barrier_simple_generic(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
; NVPTX-DISABLED-NEXT: br label [[WORKER_STATE_MACHINE_BEGIN]] ; NVPTX-DISABLED-NEXT: br label [[WORKER_STATE_MACHINE_BEGIN]]
; NVPTX-DISABLED: thread.user_code.check: ; NVPTX-DISABLED: thread.user_code.check:
; NVPTX-DISABLED-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 ; NVPTX-DISABLED-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
; NVPTX-DISABLED-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[COMMON_RET:%.*]] ; NVPTX-DISABLED-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[COMMON_RET:%.*]]
; NVPTX-DISABLED: common.ret: ; NVPTX-DISABLED: common.ret:
; NVPTX-DISABLED-NEXT: ret void ; NVPTX-DISABLED-NEXT: ret void
; NVPTX-DISABLED: user_code.entry: ; NVPTX-DISABLED: user_code.entry:
; NVPTX-DISABLED-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) #[[ATTR3]] ; NVPTX-DISABLED-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) #[[ATTR2]]
; NVPTX-DISABLED-NEXT: [[TMP2:%.*]] = call i8* @__kmpc_omp_task_alloc(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i64 40, i64 0, i32 (i32, i8*)* bitcast (i32 (i32, %struct.kmp_task_t_with_privates*)* @"_omp_task_entry$" to i32 (i32, i8*)*)) #[[ATTR3]] ; NVPTX-DISABLED-NEXT: [[TMP2:%.*]] = call i8* @__kmpc_omp_task_alloc(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i64 40, i64 0, i32 (i32, i8*)* bitcast (i32 (i32, %struct.kmp_task_t_with_privates*)* @"_omp_task_entry$" to i32 (i32, i8*)*)) #[[ATTR2]]
; NVPTX-DISABLED-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to %struct.kmp_task_t_with_privates* ; NVPTX-DISABLED-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to %struct.kmp_task_t_with_privates*
; NVPTX-DISABLED-NEXT: [[TMP4:%.*]] = call i32 @__kmpc_omp_task(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i8* [[TMP2]]) #[[ATTR3]] ; NVPTX-DISABLED-NEXT: [[TMP4:%.*]] = call i32 @__kmpc_omp_task(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i8* [[TMP2]]) #[[ATTR2]]
; NVPTX-DISABLED-NEXT: [[TMP5:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** ; NVPTX-DISABLED-NEXT: [[TMP5:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
; NVPTX-DISABLED-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*)* @__omp_outlined__9 to i8*), i8* @__omp_outlined__9_wrapper.ID, i8** [[TMP5]], i64 0) ; NVPTX-DISABLED-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*)* @__omp_outlined__9 to i8*), i8* @__omp_outlined__9_wrapper.ID, i8** [[TMP5]], i64 0)
; NVPTX-DISABLED-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 1, i1 true) ; NVPTX-DISABLED-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 1, i1 true)
; NVPTX-DISABLED-NEXT: br label [[COMMON_RET]] ; NVPTX-DISABLED-NEXT: br label [[COMMON_RET]]
; ;
entry: entry:
%captured_vars_addrs = alloca [0 x i8*], align 8 %captured_vars_addrs = alloca [0 x i8*], align 8
%0 = call i32 @__kmpc_target_init(%struct.ident_t* @1, i8 1, i1 true, i1 true) %0 = call i32 @__kmpc_target_init(%struct.ident_t* @1, i8 1, i1 true, i1 true)
Show All 12 Linesuser_code.entry: ; preds = %entry
call void @__kmpc_parallel_51(%struct.ident_t* @1, i32 %1, i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*)* @__omp_outlined__9 to i8*), i8* bitcast (void (i16, i32)* @__omp_outlined__9_wrapper to i8*), i8** %5, i64 0) call void @__kmpc_parallel_51(%struct.ident_t* @1, i32 %1, i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*)* @__omp_outlined__9 to i8*), i8* bitcast (void (i16, i32)* @__omp_outlined__9_wrapper to i8*), i8** %5, i64 0)
call void @__kmpc_target_deinit(%struct.ident_t* @1, i8 1, i1 true) call void @__kmpc_target_deinit(%struct.ident_t* @1, i8 1, i1 true)
br label %common.ret br label %common.ret
} }
; Function Attrs: alwaysinline convergent nounwind ; Function Attrs: alwaysinline convergent nounwind
define internal void @.omp_outlined.(i32 %.global_tid., i32* noalias %.part_id., i8* noalias %.privates., void (i8*, ...)* noalias %.copy_fn., i8* %.task_t., %struct.anon* noalias %__context) #9 { define internal void @.omp_outlined.(i32 %.global_tid., i32* noalias %.part_id., i8* noalias %.privates., void (i8*, ...)* noalias %.copy_fn., i8* %.task_t., %struct.anon* noalias %__context) #9 {
; AMDGPU-LABEL: define {{[^@]+}}@.omp_outlined. ; AMDGPU-LABEL: define {{[^@]+}}@.omp_outlined.
; AMDGPU-SAME: (i32 [[DOTGLOBAL_TID_:%.*]], i32* noalias nocapture nofree nonnull readnone [[DOTPART_ID_:%.*]], i8* noalias nocapture nofree readnone align 4294967296 [[DOTPRIVATES_:%.*]], void (i8*, ...)* noalias nocapture nofree readnone [[DOTCOPY_FN_:%.*]], i8* noalias nocapture nofree nonnull readnone align 8 dereferenceable(8) [[DOTTASK_T_:%.*]], %struct.anon* noalias nocapture nofree readnone [[__CONTEXT:%.*]]) #[[ATTR2:[0-9]+]] { ; AMDGPU-SAME: (i32 [[DOTGLOBAL_TID_:%.*]], i32* noalias nocapture nofree nonnull readnone [[DOTPART_ID_:%.*]], i8* noalias nocapture nofree readnone align 4294967296 [[DOTPRIVATES_:%.*]], void (i8*, ...)* noalias nocapture nofree readnone [[DOTCOPY_FN_:%.*]], i8* noalias nocapture nofree nonnull readnone align 8 dereferenceable(8) [[DOTTASK_T_:%.*]], %struct.anon* noalias nocapture nofree readnone [[__CONTEXT:%.*]]) #[[ATTR0]] {
; AMDGPU-NEXT: entry: ; AMDGPU-NEXT: entry:
; AMDGPU-NEXT: call void @spmd_amenable() #[[ATTR6]] ; AMDGPU-NEXT: call void @spmd_amenable() #[[ATTR5]]
; AMDGPU-NEXT: ret void ; AMDGPU-NEXT: ret void
; ;
; NVPTX-LABEL: define {{[^@]+}}@.omp_outlined. ; NVPTX-LABEL: define {{[^@]+}}@.omp_outlined.
; NVPTX-SAME: (i32 [[DOTGLOBAL_TID_:%.*]], i32* noalias nocapture nofree nonnull readnone [[DOTPART_ID_:%.*]], i8* noalias nocapture nofree readnone align 4294967296 [[DOTPRIVATES_:%.*]], void (i8*, ...)* noalias nocapture nofree readnone [[DOTCOPY_FN_:%.*]], i8* noalias nocapture nofree nonnull readnone align 8 dereferenceable(8) [[DOTTASK_T_:%.*]], %struct.anon* noalias nocapture nofree readnone [[__CONTEXT:%.*]]) #[[ATTR2:[0-9]+]] { ; NVPTX-SAME: (i32 [[DOTGLOBAL_TID_:%.*]], i32* noalias nocapture nofree nonnull readnone [[DOTPART_ID_:%.*]], i8* noalias nocapture nofree readnone align 4294967296 [[DOTPRIVATES_:%.*]], void (i8*, ...)* noalias nocapture nofree readnone [[DOTCOPY_FN_:%.*]], i8* noalias nocapture nofree nonnull readnone align 8 dereferenceable(8) [[DOTTASK_T_:%.*]], %struct.anon* noalias nocapture nofree readnone [[__CONTEXT:%.*]]) #[[ATTR0]] {
; NVPTX-NEXT: entry: ; NVPTX-NEXT: entry:
; NVPTX-NEXT: call void @spmd_amenable() #[[ATTR6]] ; NVPTX-NEXT: call void @spmd_amenable() #[[ATTR5]]
; NVPTX-NEXT: ret void ; NVPTX-NEXT: ret void
; ;
; AMDGPU-DISABLED-LABEL: define {{[^@]+}}@.omp_outlined. ; AMDGPU-DISABLED-LABEL: define {{[^@]+}}@.omp_outlined.
; AMDGPU-DISABLED-SAME: (i32 [[DOTGLOBAL_TID_:%.*]], i32* noalias nocapture nofree nonnull readnone [[DOTPART_ID_:%.*]], i8* noalias nocapture nofree readnone align 4294967296 [[DOTPRIVATES_:%.*]], void (i8*, ...)* noalias nocapture nofree readnone [[DOTCOPY_FN_:%.*]], i8* noalias nocapture nofree nonnull readnone align 8 dereferenceable(8) [[DOTTASK_T_:%.*]], %struct.anon* noalias nocapture nofree readnone [[__CONTEXT:%.*]]) #[[ATTR2:[0-9]+]] { ; AMDGPU-DISABLED-SAME: (i32 [[DOTGLOBAL_TID_:%.*]], i32* noalias nocapture nofree nonnull readnone [[DOTPART_ID_:%.*]], i8* noalias nocapture nofree readnone align 4294967296 [[DOTPRIVATES_:%.*]], void (i8*, ...)* noalias nocapture nofree readnone [[DOTCOPY_FN_:%.*]], i8* noalias nocapture nofree nonnull readnone align 8 dereferenceable(8) [[DOTTASK_T_:%.*]], %struct.anon* noalias nocapture nofree readnone [[__CONTEXT:%.*]]) #[[ATTR0]] {
; AMDGPU-DISABLED-NEXT: entry: ; AMDGPU-DISABLED-NEXT: entry:
; AMDGPU-DISABLED-NEXT: call void @spmd_amenable() #[[ATTR6]] ; AMDGPU-DISABLED-NEXT: call void @spmd_amenable() #[[ATTR5]]
; AMDGPU-DISABLED-NEXT: ret void ; AMDGPU-DISABLED-NEXT: ret void
; ;
; NVPTX-DISABLED-LABEL: define {{[^@]+}}@.omp_outlined. ; NVPTX-DISABLED-LABEL: define {{[^@]+}}@.omp_outlined.
; NVPTX-DISABLED-SAME: (i32 [[DOTGLOBAL_TID_:%.*]], i32* noalias nocapture nofree nonnull readnone [[DOTPART_ID_:%.*]], i8* noalias nocapture nofree readnone align 4294967296 [[DOTPRIVATES_:%.*]], void (i8*, ...)* noalias nocapture nofree readnone [[DOTCOPY_FN_:%.*]], i8* noalias nocapture nofree nonnull readnone align 8 dereferenceable(8) [[DOTTASK_T_:%.*]], %struct.anon* noalias nocapture nofree readnone [[__CONTEXT:%.*]]) #[[ATTR2:[0-9]+]] { ; NVPTX-DISABLED-SAME: (i32 [[DOTGLOBAL_TID_:%.*]], i32* noalias nocapture nofree nonnull readnone [[DOTPART_ID_:%.*]], i8* noalias nocapture nofree readnone align 4294967296 [[DOTPRIVATES_:%.*]], void (i8*, ...)* noalias nocapture nofree readnone [[DOTCOPY_FN_:%.*]], i8* noalias nocapture nofree nonnull readnone align 8 dereferenceable(8) [[DOTTASK_T_:%.*]], %struct.anon* noalias nocapture nofree readnone [[__CONTEXT:%.*]]) #[[ATTR0]] {
; NVPTX-DISABLED-NEXT: entry: ; NVPTX-DISABLED-NEXT: entry:
; NVPTX-DISABLED-NEXT: call void @spmd_amenable() #[[ATTR6]] ; NVPTX-DISABLED-NEXT: call void @spmd_amenable() #[[ATTR5]]
; NVPTX-DISABLED-NEXT: ret void ; NVPTX-DISABLED-NEXT: ret void
; ;
entry: entry:
call void @spmd_amenable() #10 call void @spmd_amenable() #10
ret void ret void
} }
; Function Attrs: convergent norecurse nounwind ; Function Attrs: convergent norecurse nounwind
▲ Show 20 Lines • Show All 49 Lines • ▼ Show 20 Lines
declare void @__kmpc_target_deinit(%struct.ident_t*, i8, i1) declare void @__kmpc_target_deinit(%struct.ident_t*, i8, i1)
; Function Attrs: alwaysinline convergent norecurse nounwind ; Function Attrs: alwaysinline convergent norecurse nounwind
define internal void @__omp_outlined__9(i32* noalias %.global_tid., i32* noalias %.bound_tid.) #0 { define internal void @__omp_outlined__9(i32* noalias %.global_tid., i32* noalias %.bound_tid.) #0 {
; AMDGPU-LABEL: define {{[^@]+}}@__omp_outlined__9 ; AMDGPU-LABEL: define {{[^@]+}}@__omp_outlined__9
; AMDGPU-SAME: (i32* noalias nocapture nofree readnone [[DOTGLOBAL_TID_:%.*]], i32* noalias nocapture nofree readnone [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] { ; AMDGPU-SAME: (i32* noalias nocapture nofree readnone [[DOTGLOBAL_TID_:%.*]], i32* noalias nocapture nofree readnone [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] {
; AMDGPU-NEXT: entry: ; AMDGPU-NEXT: entry:
; AMDGPU-NEXT: call void @unknown() #[[ATTR7]] ; AMDGPU-NEXT: call void @unknown() #[[ATTR6]]
; AMDGPU-NEXT: ret void ; AMDGPU-NEXT: ret void
; ;
; NVPTX-LABEL: define {{[^@]+}}@__omp_outlined__9 ; NVPTX-LABEL: define {{[^@]+}}@__omp_outlined__9
; NVPTX-SAME: (i32* noalias nocapture nofree readnone [[DOTGLOBAL_TID_:%.*]], i32* noalias nocapture nofree readnone [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] { ; NVPTX-SAME: (i32* noalias nocapture nofree readnone [[DOTGLOBAL_TID_:%.*]], i32* noalias nocapture nofree readnone [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] {
; NVPTX-NEXT: entry: ; NVPTX-NEXT: entry:
; NVPTX-NEXT: call void @unknown() #[[ATTR7]] ; NVPTX-NEXT: call void @unknown() #[[ATTR6]]
; NVPTX-NEXT: ret void ; NVPTX-NEXT: ret void
; ;
; AMDGPU-DISABLED-LABEL: define {{[^@]+}}@__omp_outlined__9 ; AMDGPU-DISABLED-LABEL: define {{[^@]+}}@__omp_outlined__9
; AMDGPU-DISABLED-SAME: (i32* noalias nocapture nofree readnone [[DOTGLOBAL_TID_:%.*]], i32* noalias nocapture nofree readnone [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] { ; AMDGPU-DISABLED-SAME: (i32* noalias nocapture nofree readnone [[DOTGLOBAL_TID_:%.*]], i32* noalias nocapture nofree readnone [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] {
; AMDGPU-DISABLED-NEXT: entry: ; AMDGPU-DISABLED-NEXT: entry:
; AMDGPU-DISABLED-NEXT: call void @unknown() #[[ATTR7]] ; AMDGPU-DISABLED-NEXT: call void @unknown() #[[ATTR6]]
; AMDGPU-DISABLED-NEXT: ret void ; AMDGPU-DISABLED-NEXT: ret void
; ;
; NVPTX-DISABLED-LABEL: define {{[^@]+}}@__omp_outlined__9 ; NVPTX-DISABLED-LABEL: define {{[^@]+}}@__omp_outlined__9
; NVPTX-DISABLED-SAME: (i32* noalias nocapture nofree readnone [[DOTGLOBAL_TID_:%.*]], i32* noalias nocapture nofree readnone [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] { ; NVPTX-DISABLED-SAME: (i32* noalias nocapture nofree readnone [[DOTGLOBAL_TID_:%.*]], i32* noalias nocapture nofree readnone [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] {
; NVPTX-DISABLED-NEXT: entry: ; NVPTX-DISABLED-NEXT: entry:
; NVPTX-DISABLED-NEXT: call void @unknown() #[[ATTR7]] ; NVPTX-DISABLED-NEXT: call void @unknown() #[[ATTR6]]
; NVPTX-DISABLED-NEXT: ret void ; NVPTX-DISABLED-NEXT: ret void
; ;
entry: entry:
call void @unknown() #11 call void @unknown() #11
ret void ret void
} }
; Function Attrs: convergent norecurse nounwind ; Function Attrs: convergent norecurse nounwind
define internal void @__omp_outlined__9_wrapper(i16 zeroext %0, i32 %1) #3 { define internal void @__omp_outlined__9_wrapper(i16 zeroext %0, i32 %1) #3 {
; AMDGPU-LABEL: define {{[^@]+}}@__omp_outlined__9_wrapper ; AMDGPU-LABEL: define {{[^@]+}}@__omp_outlined__9_wrapper
; AMDGPU-SAME: (i16 zeroext [[TMP0:%.*]], i32 [[TMP1:%.*]]) #[[ATTR1]] { ; AMDGPU-SAME: (i16 zeroext [[TMP0:%.*]], i32 [[TMP1:%.*]]) #[[ATTR1]] {
; AMDGPU-NEXT: entry: ; AMDGPU-NEXT: entry:
; AMDGPU-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4 ; AMDGPU-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4
; AMDGPU-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 ; AMDGPU-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
; AMDGPU-NEXT: [[GLOBAL_ARGS:%.*]] = alloca i8**, align 8 ; AMDGPU-NEXT: [[GLOBAL_ARGS:%.*]] = alloca i8**, align 8
; AMDGPU-NEXT: call void @__kmpc_get_shared_variables(i8*** [[GLOBAL_ARGS]]) ; AMDGPU-NEXT: call void @__kmpc_get_shared_variables(i8*** [[GLOBAL_ARGS]])
; AMDGPU-NEXT: call void @__omp_outlined__9(i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTADDR1]], i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTZERO_ADDR]]) #[[ATTR3]] ; AMDGPU-NEXT: call void @__omp_outlined__9(i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTADDR1]], i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTZERO_ADDR]]) #[[ATTR2]]
; AMDGPU-NEXT: ret void ; AMDGPU-NEXT: ret void
; ;
; NVPTX-LABEL: define {{[^@]+}}@__omp_outlined__9_wrapper ; NVPTX-LABEL: define {{[^@]+}}@__omp_outlined__9_wrapper
; NVPTX-SAME: (i16 zeroext [[TMP0:%.*]], i32 [[TMP1:%.*]]) #[[ATTR1]] { ; NVPTX-SAME: (i16 zeroext [[TMP0:%.*]], i32 [[TMP1:%.*]]) #[[ATTR1]] {
; NVPTX-NEXT: entry: ; NVPTX-NEXT: entry:
; NVPTX-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4 ; NVPTX-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4
; NVPTX-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 ; NVPTX-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
; NVPTX-NEXT: [[GLOBAL_ARGS:%.*]] = alloca i8**, align 8 ; NVPTX-NEXT: [[GLOBAL_ARGS:%.*]] = alloca i8**, align 8
; NVPTX-NEXT: call void @__kmpc_get_shared_variables(i8*** [[GLOBAL_ARGS]]) ; NVPTX-NEXT: call void @__kmpc_get_shared_variables(i8*** [[GLOBAL_ARGS]])
; NVPTX-NEXT: call void @__omp_outlined__9(i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTADDR1]], i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTZERO_ADDR]]) #[[ATTR3]] ; NVPTX-NEXT: call void @__omp_outlined__9(i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTADDR1]], i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTZERO_ADDR]]) #[[ATTR2]]
; NVPTX-NEXT: ret void ; NVPTX-NEXT: ret void
; ;
; AMDGPU-DISABLED-LABEL: define {{[^@]+}}@__omp_outlined__9_wrapper ; AMDGPU-DISABLED-LABEL: define {{[^@]+}}@__omp_outlined__9_wrapper
; AMDGPU-DISABLED-SAME: (i16 zeroext [[TMP0:%.*]], i32 [[TMP1:%.*]]) #[[ATTR1]] { ; AMDGPU-DISABLED-SAME: (i16 zeroext [[TMP0:%.*]], i32 [[TMP1:%.*]]) #[[ATTR1]] {
; AMDGPU-DISABLED-NEXT: entry: ; AMDGPU-DISABLED-NEXT: entry:
; AMDGPU-DISABLED-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4 ; AMDGPU-DISABLED-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4
; AMDGPU-DISABLED-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 ; AMDGPU-DISABLED-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
; AMDGPU-DISABLED-NEXT: [[GLOBAL_ARGS:%.*]] = alloca i8**, align 8 ; AMDGPU-DISABLED-NEXT: [[GLOBAL_ARGS:%.*]] = alloca i8**, align 8
; AMDGPU-DISABLED-NEXT: call void @__kmpc_get_shared_variables(i8*** [[GLOBAL_ARGS]]) ; AMDGPU-DISABLED-NEXT: call void @__kmpc_get_shared_variables(i8*** [[GLOBAL_ARGS]])
; AMDGPU-DISABLED-NEXT: call void @__omp_outlined__9(i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTADDR1]], i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTZERO_ADDR]]) #[[ATTR3]] ; AMDGPU-DISABLED-NEXT: call void @__omp_outlined__9(i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTADDR1]], i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTZERO_ADDR]]) #[[ATTR2]]
; AMDGPU-DISABLED-NEXT: ret void ; AMDGPU-DISABLED-NEXT: ret void
; ;
; NVPTX-DISABLED-LABEL: define {{[^@]+}}@__omp_outlined__9_wrapper ; NVPTX-DISABLED-LABEL: define {{[^@]+}}@__omp_outlined__9_wrapper
; NVPTX-DISABLED-SAME: (i16 zeroext [[TMP0:%.*]], i32 [[TMP1:%.*]]) #[[ATTR1]] { ; NVPTX-DISABLED-SAME: (i16 zeroext [[TMP0:%.*]], i32 [[TMP1:%.*]]) #[[ATTR1]] {
; NVPTX-DISABLED-NEXT: entry: ; NVPTX-DISABLED-NEXT: entry:
; NVPTX-DISABLED-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4 ; NVPTX-DISABLED-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4
; NVPTX-DISABLED-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 ; NVPTX-DISABLED-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
; NVPTX-DISABLED-NEXT: [[GLOBAL_ARGS:%.*]] = alloca i8**, align 8 ; NVPTX-DISABLED-NEXT: [[GLOBAL_ARGS:%.*]] = alloca i8**, align 8
; NVPTX-DISABLED-NEXT: call void @__kmpc_get_shared_variables(i8*** [[GLOBAL_ARGS]]) ; NVPTX-DISABLED-NEXT: call void @__kmpc_get_shared_variables(i8*** [[GLOBAL_ARGS]])
; NVPTX-DISABLED-NEXT: call void @__omp_outlined__9(i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTADDR1]], i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTZERO_ADDR]]) #[[ATTR3]] ; NVPTX-DISABLED-NEXT: call void @__omp_outlined__9(i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTADDR1]], i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTZERO_ADDR]]) #[[ATTR2]]
; NVPTX-DISABLED-NEXT: ret void ; NVPTX-DISABLED-NEXT: ret void
; ;
entry: entry:
%.addr1 = alloca i32, align 4 %.addr1 = alloca i32, align 4
%.zero.addr = alloca i32, align 4 %.zero.addr = alloca i32, align 4
%global_args = alloca i8**, align 8 %global_args = alloca i8**, align 8
store i32 %1, i32* %.addr1, align 4, !tbaa !18 store i32 %1, i32* %.addr1, align 4, !tbaa !18
store i32 0, i32* %.zero.addr, align 4 store i32 0, i32* %.zero.addr, align 4
▲ Show 20 Lines • Show All 53 Lines • ▼ Show 20 Lines
!28 = distinct !{!28, !23, !24} !28 = distinct !{!28, !23, !24}
!29 = distinct !{!29, !23, !24} !29 = distinct !{!29, !23, !24}
!30 = !{!31, !27, i64 0} !30 = !{!31, !27, i64 0}
!31 = !{!"kmp_task_t_with_privates", !32, i64 0} !31 = !{!"kmp_task_t_with_privates", !32, i64 0}
!32 = !{!"kmp_task_t", !27, i64 0, !27, i64 8, !19, i64 16, !20, i64 24, !20, i64 32} !32 = !{!"kmp_task_t", !27, i64 0, !27, i64 8, !19, i64 16, !20, i64 24, !20, i64 32}
;. ;.
; AMDGPU: attributes #[[ATTR0]] = { alwaysinline convergent norecurse nounwind } ; AMDGPU: attributes #[[ATTR0]] = { alwaysinline convergent norecurse nounwind }
; AMDGPU: attributes #[[ATTR1]] = { convergent norecurse nounwind } ; AMDGPU: attributes #[[ATTR1]] = { convergent norecurse nounwind }
; AMDGPU: attributes #[[ATTR2]] = { alwaysinline convergent nounwind } ; AMDGPU: attributes #[[ATTR2]] = { nounwind }
; AMDGPU: attributes #[[ATTR3]] = { nounwind } ; AMDGPU: attributes #[[ATTR3:[0-9]+]] = { nosync nounwind }
; AMDGPU: attributes #[[ATTR4:[0-9]+]] = { nosync nounwind } ; AMDGPU: attributes #[[ATTR4:[0-9]+]] = { nofree nosync nounwind }
; AMDGPU: attributes #[[ATTR5:[0-9]+]] = { nofree nosync nounwind } ; AMDGPU: attributes #[[ATTR5]] = { convergent "llvm.assume"="ompx_spmd_amenable" }
; AMDGPU: attributes #[[ATTR6]] = { convergent "llvm.assume"="ompx_spmd_amenable" } ; AMDGPU: attributes #[[ATTR6]] = { convergent }
; AMDGPU: attributes #[[ATTR7]] = { convergent } ; AMDGPU: attributes #[[ATTR7:[0-9]+]] = { argmemonly nofree nosync nounwind willreturn }
; AMDGPU: attributes #[[ATTR8:[0-9]+]] = { argmemonly nofree nosync nounwind willreturn } ; AMDGPU: attributes #[[ATTR8:[0-9]+]] = { alwaysinline }
; AMDGPU: attributes #[[ATTR9:[0-9]+]] = { alwaysinline } ; AMDGPU: attributes #[[ATTR9:[0-9]+]] = { convergent nounwind }
; AMDGPU: attributes #[[ATTR10:[0-9]+]] = { convergent nounwind }
;. ;.
; NVPTX: attributes #[[ATTR0]] = { alwaysinline convergent norecurse nounwind } ; NVPTX: attributes #[[ATTR0]] = { alwaysinline convergent norecurse nounwind }
; NVPTX: attributes #[[ATTR1]] = { convergent norecurse nounwind } ; NVPTX: attributes #[[ATTR1]] = { convergent norecurse nounwind }
; NVPTX: attributes #[[ATTR2]] = { alwaysinline convergent nounwind } ; NVPTX: attributes #[[ATTR2]] = { nounwind }
; NVPTX: attributes #[[ATTR3]] = { nounwind } ; NVPTX: attributes #[[ATTR3:[0-9]+]] = { nosync nounwind }
; NVPTX: attributes #[[ATTR4:[0-9]+]] = { nosync nounwind } ; NVPTX: attributes #[[ATTR4:[0-9]+]] = { nofree nosync nounwind }
; NVPTX: attributes #[[ATTR5:[0-9]+]] = { nofree nosync nounwind } ; NVPTX: attributes #[[ATTR5]] = { convergent "llvm.assume"="ompx_spmd_amenable" }
; NVPTX: attributes #[[ATTR6]] = { convergent "llvm.assume"="ompx_spmd_amenable" } ; NVPTX: attributes #[[ATTR6]] = { convergent }
; NVPTX: attributes #[[ATTR7]] = { convergent } ; NVPTX: attributes #[[ATTR7:[0-9]+]] = { argmemonly nofree nosync nounwind willreturn }
; NVPTX: attributes #[[ATTR8:[0-9]+]] = { argmemonly nofree nosync nounwind willreturn } ; NVPTX: attributes #[[ATTR8:[0-9]+]] = { alwaysinline }
; NVPTX: attributes #[[ATTR9:[0-9]+]] = { alwaysinline } ; NVPTX: attributes #[[ATTR9:[0-9]+]] = { convergent nounwind }
; NVPTX: attributes #[[ATTR10:[0-9]+]] = { convergent nounwind }
;. ;.
; AMDGPU-DISABLED: attributes #[[ATTR0]] = { alwaysinline convergent norecurse nounwind } ; AMDGPU-DISABLED: attributes #[[ATTR0]] = { alwaysinline convergent norecurse nounwind }
; AMDGPU-DISABLED: attributes #[[ATTR1]] = { convergent norecurse nounwind } ; AMDGPU-DISABLED: attributes #[[ATTR1]] = { convergent norecurse nounwind }
; AMDGPU-DISABLED: attributes #[[ATTR2]] = { alwaysinline convergent nounwind } ; AMDGPU-DISABLED: attributes #[[ATTR2]] = { nounwind }
; AMDGPU-DISABLED: attributes #[[ATTR3]] = { nounwind } ; AMDGPU-DISABLED: attributes #[[ATTR3:[0-9]+]] = { nosync nounwind }
; AMDGPU-DISABLED: attributes #[[ATTR4:[0-9]+]] = { nosync nounwind } ; AMDGPU-DISABLED: attributes #[[ATTR4:[0-9]+]] = { nofree nosync nounwind }
; AMDGPU-DISABLED: attributes #[[ATTR5:[0-9]+]] = { nofree nosync nounwind } ; AMDGPU-DISABLED: attributes #[[ATTR5]] = { convergent "llvm.assume"="ompx_spmd_amenable" }
; AMDGPU-DISABLED: attributes #[[ATTR6]] = { convergent "llvm.assume"="ompx_spmd_amenable" } ; AMDGPU-DISABLED: attributes #[[ATTR6]] = { convergent }
; AMDGPU-DISABLED: attributes #[[ATTR7]] = { convergent } ; AMDGPU-DISABLED: attributes #[[ATTR7:[0-9]+]] = { argmemonly nofree nosync nounwind willreturn }
; AMDGPU-DISABLED: attributes #[[ATTR8:[0-9]+]] = { argmemonly nofree nosync nounwind willreturn } ; AMDGPU-DISABLED: attributes #[[ATTR8:[0-9]+]] = { alwaysinline }
; AMDGPU-DISABLED: attributes #[[ATTR9:[0-9]+]] = { alwaysinline } ; AMDGPU-DISABLED: attributes #[[ATTR9:[0-9]+]] = { convergent nounwind }
; AMDGPU-DISABLED: attributes #[[ATTR10:[0-9]+]] = { convergent nounwind }
;. ;.
; NVPTX-DISABLED: attributes #[[ATTR0]] = { alwaysinline convergent norecurse nounwind } ; NVPTX-DISABLED: attributes #[[ATTR0]] = { alwaysinline convergent norecurse nounwind }
; NVPTX-DISABLED: attributes #[[ATTR1]] = { convergent norecurse nounwind } ; NVPTX-DISABLED: attributes #[[ATTR1]] = { convergent norecurse nounwind }
; NVPTX-DISABLED: attributes #[[ATTR2]] = { alwaysinline convergent nounwind } ; NVPTX-DISABLED: attributes #[[ATTR2]] = { nounwind }
; NVPTX-DISABLED: attributes #[[ATTR3]] = { nounwind } ; NVPTX-DISABLED: attributes #[[ATTR3:[0-9]+]] = { nosync nounwind }
; NVPTX-DISABLED: attributes #[[ATTR4:[0-9]+]] = { nosync nounwind } ; NVPTX-DISABLED: attributes #[[ATTR4:[0-9]+]] = { nofree nosync nounwind }
; NVPTX-DISABLED: attributes #[[ATTR5:[0-9]+]] = { nofree nosync nounwind } ; NVPTX-DISABLED: attributes #[[ATTR5]] = { convergent "llvm.assume"="ompx_spmd_amenable" }
; NVPTX-DISABLED: attributes #[[ATTR6]] = { convergent "llvm.assume"="ompx_spmd_amenable" } ; NVPTX-DISABLED: attributes #[[ATTR6]] = { convergent }
; NVPTX-DISABLED: attributes #[[ATTR7]] = { convergent } ; NVPTX-DISABLED: attributes #[[ATTR7:[0-9]+]] = { argmemonly nofree nosync nounwind willreturn }
; NVPTX-DISABLED: attributes #[[ATTR8:[0-9]+]] = { argmemonly nofree nosync nounwind willreturn } ; NVPTX-DISABLED: attributes #[[ATTR8:[0-9]+]] = { alwaysinline }
; NVPTX-DISABLED: attributes #[[ATTR9:[0-9]+]] = { alwaysinline } ; NVPTX-DISABLED: attributes #[[ATTR9:[0-9]+]] = { convergent nounwind }
; NVPTX-DISABLED: attributes #[[ATTR10:[0-9]+]] = { convergent nounwind }
;. ;.
; AMDGPU: [[META0:![0-9]+]] = !{i32 0, i32 64770, i32 541341486, !"do_not_spmdize_task", i32 74, i32 5} ; AMDGPU: [[META0:![0-9]+]] = !{i32 0, i32 64770, i32 541341486, !"do_not_spmdize_task", i32 74, i32 5}
; AMDGPU: [[META1:![0-9]+]] = !{i32 0, i32 64770, i32 541341486, !"sequential_loop_to_stack_var", i32 20, i32 1} ; AMDGPU: [[META1:![0-9]+]] = !{i32 0, i32 64770, i32 541341486, !"sequential_loop_to_stack_var", i32 20, i32 1}
; AMDGPU: [[META2:![0-9]+]] = !{i32 0, i32 64770, i32 541341486, !"sequential_loop", i32 5, i32 0} ; AMDGPU: [[META2:![0-9]+]] = !{i32 0, i32 64770, i32 541341486, !"sequential_loop", i32 5, i32 0}
; AMDGPU: [[META3:![0-9]+]] = !{i32 0, i32 64770, i32 541341486, !"sequential_loop_to_shared_var", i32 35, i32 2} ; AMDGPU: [[META3:![0-9]+]] = !{i32 0, i32 64770, i32 541341486, !"sequential_loop_to_shared_var", i32 35, i32 2}
; AMDGPU: [[META4:![0-9]+]] = !{i32 0, i32 64770, i32 541341486, !"do_not_spmdize_target", i32 65, i32 4} ; AMDGPU: [[META4:![0-9]+]] = !{i32 0, i32 64770, i32 541341486, !"do_not_spmdize_target", i32 65, i32 4}
; AMDGPU: [[META5:![0-9]+]] = !{i32 0, i32 64770, i32 541341486, !"sequential_loop_to_shared_var_guarded", i32 50, i32 3} ; AMDGPU: [[META5:![0-9]+]] = !{i32 0, i32 64770, i32 541341486, !"sequential_loop_to_shared_var_guarded", i32 50, i32 3}
; AMDGPU: [[META6:![0-9]+]] = !{void ()* @__omp_offloading_fd02_2044372e_sequential_loop_l5, !"kernel", i32 1} ; AMDGPU: [[META6:![0-9]+]] = !{void ()* @__omp_offloading_fd02_2044372e_sequential_loop_l5, !"kernel", i32 1}
▲ Show 20 Lines • Show All 129 Lines • Show Last 20 Lines

llvm/test/Transforms/OpenMP/spmdization_guarding_two_reaching_kernels.ll

Show First 20 Lines • Show All 85 Lines • ▼ Show 20 Lines
; CHECK-NEXT: br label [[WORKER_STATE_MACHINE_DONE_BARRIER]] ; CHECK-NEXT: br label [[WORKER_STATE_MACHINE_DONE_BARRIER]]
; CHECK: worker_state_machine.done.barrier: ; CHECK: worker_state_machine.done.barrier:
; CHECK-NEXT: call void @__kmpc_barrier_simple_generic(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]]) ; CHECK-NEXT: call void @__kmpc_barrier_simple_generic(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]])
; CHECK-NEXT: br label [[WORKER_STATE_MACHINE_BEGIN]] ; CHECK-NEXT: br label [[WORKER_STATE_MACHINE_BEGIN]]
; CHECK: thread.user_code.check: ; CHECK: thread.user_code.check:
; CHECK-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 ; CHECK-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
; CHECK-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] ; CHECK-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
; CHECK: user_code.entry: ; CHECK: user_code.entry:
; CHECK-NEXT: call void @spmd_helper() #[[ATTR5:[0-9]+]] ; CHECK-NEXT: call void @spmd_helper() #[[ATTR4:[0-9]+]]
; CHECK-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 1, i1 true) ; CHECK-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 1, i1 true)
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; CHECK: worker.exit: ; CHECK: worker.exit:
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
entry: entry:
%0 = call i32 @__kmpc_target_init(%struct.ident_t* @1, i8 1, i1 true, i1 true) %0 = call i32 @__kmpc_target_init(%struct.ident_t* @1, i8 1, i1 true, i1 true)
%exec_user_code = icmp eq i32 %0, -1 %exec_user_code = icmp eq i32 %0, -1
Show All 16 Lines
define weak void @__omp_offloading_2b_10393b5_generic_l20() #0 { define weak void @__omp_offloading_2b_10393b5_generic_l20() #0 {
; CHECK-LABEL: define {{[^@]+}}@__omp_offloading_2b_10393b5_generic_l20 ; CHECK-LABEL: define {{[^@]+}}@__omp_offloading_2b_10393b5_generic_l20
; CHECK-SAME: () #[[ATTR0]] { ; CHECK-SAME: () #[[ATTR0]] {
; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 1, i1 false, i1 true) ; CHECK-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 1, i1 false, i1 true)
; CHECK-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 ; CHECK-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
; CHECK-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] ; CHECK-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
; CHECK: user_code.entry: ; CHECK: user_code.entry:
; CHECK-NEXT: call void @generic_helper() #[[ATTR6:[0-9]+]] ; CHECK-NEXT: call void @generic_helper() #[[ATTR5:[0-9]+]]
; CHECK-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 1, i1 true) ; CHECK-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 1, i1 true)
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; CHECK: worker.exit: ; CHECK: worker.exit:
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
entry: entry:
%0 = call i32 @__kmpc_target_init(%struct.ident_t* @1, i8 1, i1 true, i1 true) %0 = call i32 @__kmpc_target_init(%struct.ident_t* @1, i8 1, i1 true, i1 true)
%exec_user_code = icmp eq i32 %0, -1 %exec_user_code = icmp eq i32 %0, -1
br i1 %exec_user_code, label %user_code.entry, label %worker.exit br i1 %exec_user_code, label %user_code.entry, label %worker.exit
user_code.entry: ; preds = %entry user_code.entry: ; preds = %entry
call void @generic_helper() #5 call void @generic_helper() #5
call void @__kmpc_target_deinit(%struct.ident_t* @1, i8 1, i1 true) call void @__kmpc_target_deinit(%struct.ident_t* @1, i8 1, i1 true)
ret void ret void
worker.exit: ; preds = %entry worker.exit: ; preds = %entry
ret void ret void
} }
; Function Attrs: convergent noinline nounwind ; Function Attrs: convergent noinline nounwind
define internal void @spmd_helper() #1 { define internal void @spmd_helper() #1 {
; CHECK-LABEL: define {{[^@]+}}@spmd_helper ; CHECK-LABEL: define {{[^@]+}}@spmd_helper
; CHECK-SAME: () #[[ATTR1:[0-9]+]] { ; CHECK-SAME: () #[[ATTR0]] {
; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 8 ; CHECK-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 8
; CHECK-NEXT: call void @leaf() #[[ATTR7:[0-9]+]] ; CHECK-NEXT: call void @leaf() #[[ATTR6:[0-9]+]]
; CHECK-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* noundef @[[GLOB2]]) #[[ATTR2:[0-9]+]] ; CHECK-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* noundef @[[GLOB2]]) #[[ATTR1:[0-9]+]]
; CHECK-NEXT: [[TMP1:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** ; CHECK-NEXT: [[TMP1:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8**
; CHECK-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* noundef @[[GLOB2]], i32 [[TMP0]], i32 noundef 1, i32 noundef -1, i32 noundef -1, i8* noundef bitcast (void (i32*, i32*)* @__omp_outlined__ to i8*), i8* noundef @__omp_outlined___wrapper.ID, i8** noundef [[TMP1]], i64 noundef 0) ; CHECK-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* noundef @[[GLOB2]], i32 [[TMP0]], i32 noundef 1, i32 noundef -1, i32 noundef -1, i8* noundef bitcast (void (i32*, i32*)* @__omp_outlined__ to i8*), i8* noundef @__omp_outlined___wrapper.ID, i8** noundef [[TMP1]], i64 noundef 0)
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
entry: entry:
%captured_vars_addrs = alloca [0 x i8*], align 8 %captured_vars_addrs = alloca [0 x i8*], align 8
call void @leaf() #5 call void @leaf() #5
%0 = call i32 @__kmpc_global_thread_num(%struct.ident_t* @2) %0 = call i32 @__kmpc_global_thread_num(%struct.ident_t* @2)
%1 = bitcast [0 x i8*]* %captured_vars_addrs to i8** %1 = bitcast [0 x i8*]* %captured_vars_addrs to i8**
call void @__kmpc_parallel_51(%struct.ident_t* @2, i32 %0, i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*)* @__omp_outlined__ to i8*), i8* bitcast (void (i16, i32)* @__omp_outlined___wrapper to i8*), i8** %1, i64 0) call void @__kmpc_parallel_51(%struct.ident_t* @2, i32 %0, i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*)* @__omp_outlined__ to i8*), i8* bitcast (void (i16, i32)* @__omp_outlined___wrapper to i8*), i8** %1, i64 0)
ret void ret void
} }
; Function Attrs: convergent noinline norecurse nounwind ; Function Attrs: convergent noinline norecurse nounwind
define internal void @__omp_outlined__(i32* noalias %.global_tid., i32* noalias %.bound_tid.) #0 { define internal void @__omp_outlined__(i32* noalias %.global_tid., i32* noalias %.bound_tid.) #0 {
; CHECK-LABEL: define {{[^@]+}}@__omp_outlined__ ; CHECK-LABEL: define {{[^@]+}}@__omp_outlined__
; CHECK-SAME: (i32* noalias nocapture nofree readnone [[DOTGLOBAL_TID_:%.*]], i32* noalias nocapture nofree readnone [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] { ; CHECK-SAME: (i32* noalias nocapture nofree readnone [[DOTGLOBAL_TID_:%.*]], i32* noalias nocapture nofree readnone [[DOTBOUND_TID_:%.*]]) #[[ATTR0]] {
; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 ; CHECK-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
; CHECK-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 ; CHECK-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
; CHECK-NEXT: call void @unknown() #[[ATTR8:[0-9]+]] ; CHECK-NEXT: call void @unknown() #[[ATTR7:[0-9]+]]
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
entry: entry:
%.global_tid..addr = alloca i32*, align 8 %.global_tid..addr = alloca i32*, align 8
%.bound_tid..addr = alloca i32*, align 8 %.bound_tid..addr = alloca i32*, align 8
store i32* %.global_tid., i32** %.global_tid..addr, align 8 store i32* %.global_tid., i32** %.global_tid..addr, align 8
store i32* %.bound_tid., i32** %.bound_tid..addr, align 8 store i32* %.bound_tid., i32** %.bound_tid..addr, align 8
call void @unknown() #5 call void @unknown() #5
ret void ret void
} }
; Function Attrs: convergent noinline norecurse nounwind ; Function Attrs: convergent noinline norecurse nounwind
define internal void @__omp_outlined___wrapper(i16 zeroext %0, i32 %1) #2 { define internal void @__omp_outlined___wrapper(i16 zeroext %0, i32 %1) #2 {
; CHECK-LABEL: define {{[^@]+}}@__omp_outlined___wrapper ; CHECK-LABEL: define {{[^@]+}}@__omp_outlined___wrapper
; CHECK-SAME: (i16 zeroext [[TMP0:%.*]], i32 [[TMP1:%.*]]) #[[ATTR0]] { ; CHECK-SAME: (i16 zeroext [[TMP0:%.*]], i32 [[TMP1:%.*]]) #[[ATTR0]] {
; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: [[DOTADDR:%.*]] = alloca i16, align 2 ; CHECK-NEXT: [[DOTADDR:%.*]] = alloca i16, align 2
; CHECK-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4 ; CHECK-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4
; CHECK-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 ; CHECK-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
; CHECK-NEXT: [[GLOBAL_ARGS:%.*]] = alloca i8**, align 8 ; CHECK-NEXT: [[GLOBAL_ARGS:%.*]] = alloca i8**, align 8
; CHECK-NEXT: call void @__kmpc_get_shared_variables(i8*** [[GLOBAL_ARGS]]) ; CHECK-NEXT: call void @__kmpc_get_shared_variables(i8*** [[GLOBAL_ARGS]])
; CHECK-NEXT: call void @__omp_outlined__(i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTADDR1]], i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTZERO_ADDR]]) #[[ATTR2]] ; CHECK-NEXT: call void @__omp_outlined__(i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTADDR1]], i32* noalias nocapture noundef nonnull readnone align 4 dereferenceable(4) [[DOTZERO_ADDR]]) #[[ATTR1]]
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
entry: entry:
%.addr = alloca i16, align 2 %.addr = alloca i16, align 2
%.addr1 = alloca i32, align 4 %.addr1 = alloca i32, align 4
%.zero.addr = alloca i32, align 4 %.zero.addr = alloca i32, align 4
%global_args = alloca i8**, align 8 %global_args = alloca i8**, align 8
store i16 %0, i16* %.addr, align 2 store i16 %0, i16* %.addr, align 2
Show All 10 Lines
declare i32 @__kmpc_global_thread_num(%struct.ident_t*) #3 declare i32 @__kmpc_global_thread_num(%struct.ident_t*) #3
; Function Attrs: alwaysinline ; Function Attrs: alwaysinline
declare void @__kmpc_parallel_51(%struct.ident_t*, i32, i32, i32, i32, i8*, i8*, i8**, i64) #4 declare void @__kmpc_parallel_51(%struct.ident_t*, i32, i32, i32, i32, i8*, i8*, i8**, i64) #4
; Function Attrs: convergent noinline nounwind ; Function Attrs: convergent noinline nounwind
define internal void @leaf() #1 { define internal void @leaf() #1 {
; CHECK-LABEL: define {{[^@]+}}@leaf ; CHECK-LABEL: define {{[^@]+}}@leaf
; CHECK-SAME: () #[[ATTR4:[0-9]+]] { ; CHECK-SAME: () #[[ATTR3:[0-9]+]] {
; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: store i32 42, i32* @G, align 4 ; CHECK-NEXT: store i32 42, i32* @G, align 4
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
entry: entry:
store i32 42, i32* @G, align 4 store i32 42, i32* @G, align 4
ret void ret void
} }
; Function Attrs: convergent noinline nounwind ; Function Attrs: convergent noinline nounwind
define internal void @generic_helper() #1 { define internal void @generic_helper() #1 {
; CHECK-LABEL: define {{[^@]+}}@generic_helper ; CHECK-LABEL: define {{[^@]+}}@generic_helper
; CHECK-SAME: () #[[ATTR4]] { ; CHECK-SAME: () #[[ATTR3]] {
; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: call void @leaf() #[[ATTR7]] ; CHECK-NEXT: call void @leaf() #[[ATTR6]]
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
entry: entry:
call void @leaf() #5 call void @leaf() #5
ret void ret void
} }
declare void @unknown() declare void @unknown()
Show All 17 Lines
!4 = !{i32 1, !"wchar_size", i32 4} !4 = !{i32 1, !"wchar_size", i32 4}
!5 = !{i32 7, !"openmp", i32 50} !5 = !{i32 7, !"openmp", i32 50}
!6 = !{i32 7, !"openmp-device", i32 50} !6 = !{i32 7, !"openmp-device", i32 50}
!7 = !{i32 7, !"PIC Level", i32 2} !7 = !{i32 7, !"PIC Level", i32 2}
!8 = !{i32 7, !"frame-pointer", i32 2} !8 = !{i32 7, !"frame-pointer", i32 2}
!9 = !{!"clang version 14.0.0"} !9 = !{!"clang version 14.0.0"}
;. ;.
; CHECK: attributes #[[ATTR0]] = { convergent noinline norecurse nounwind "frame-pointer"="all" "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="sm_53" "target-features"="+ptx32,+sm_53" } ; CHECK: attributes #[[ATTR0]] = { convergent noinline norecurse nounwind "frame-pointer"="all" "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="sm_53" "target-features"="+ptx32,+sm_53" }
; CHECK: attributes #[[ATTR1]] = { convergent noinline nounwind "frame-pointer"="all" "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="sm_53" "target-features"="+ptx32,+sm_53" } ; CHECK: attributes #[[ATTR1]] = { nounwind }
; CHECK: attributes #[[ATTR2]] = { nounwind } ; CHECK: attributes #[[ATTR2:[0-9]+]] = { alwaysinline }
; CHECK: attributes #[[ATTR3:[0-9]+]] = { alwaysinline } ; CHECK: attributes #[[ATTR3]] = { convergent nofree noinline norecurse nosync nounwind willreturn writeonly "frame-pointer"="all" "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="sm_53" "target-features"="+ptx32,+sm_53" }
; CHECK: attributes #[[ATTR4]] = { convergent nofree noinline nosync nounwind willreturn writeonly "frame-pointer"="all" "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="sm_53" "target-features"="+ptx32,+sm_53" } ; CHECK: attributes #[[ATTR4]] = { convergent nounwind }
; CHECK: attributes #[[ATTR5]] = { convergent nounwind } ; CHECK: attributes #[[ATTR5]] = { convergent nounwind writeonly }
; CHECK: attributes #[[ATTR6]] = { convergent nounwind writeonly } ; CHECK: attributes #[[ATTR6]] = { convergent nofree nosync nounwind willreturn writeonly }
; CHECK: attributes #[[ATTR7]] = { convergent nofree nosync nounwind willreturn writeonly } ; CHECK: attributes #[[ATTR7]] = { convergent }
; CHECK: attributes #[[ATTR8]] = { convergent }
;. ;.
; CHECK: [[META0:![0-9]+]] = !{i32 0, i32 43, i32 17011637, !"spmd", i32 12, i32 0} ; CHECK: [[META0:![0-9]+]] = !{i32 0, i32 43, i32 17011637, !"spmd", i32 12, i32 0}
; CHECK: [[META1:![0-9]+]] = !{i32 0, i32 43, i32 17011637, !"generic", i32 20, i32 1} ; CHECK: [[META1:![0-9]+]] = !{i32 0, i32 43, i32 17011637, !"generic", i32 20, i32 1}
; CHECK: [[META2:![0-9]+]] = !{void ()* @__omp_offloading_2b_10393b5_spmd_l12, !"kernel", i32 1} ; CHECK: [[META2:![0-9]+]] = !{void ()* @__omp_offloading_2b_10393b5_spmd_l12, !"kernel", i32 1}
; CHECK: [[META3:![0-9]+]] = !{void ()* @__omp_offloading_2b_10393b5_generic_l20, !"kernel", i32 1} ; CHECK: [[META3:![0-9]+]] = !{void ()* @__omp_offloading_2b_10393b5_generic_l20, !"kernel", i32 1}
; CHECK: [[META4:![0-9]+]] = !{i32 1, !"wchar_size", i32 4} ; CHECK: [[META4:![0-9]+]] = !{i32 1, !"wchar_size", i32 4}
; CHECK: [[META5:![0-9]+]] = !{i32 7, !"openmp", i32 50} ; CHECK: [[META5:![0-9]+]] = !{i32 7, !"openmp", i32 50}
; CHECK: [[META6:![0-9]+]] = !{i32 7, !"openmp-device", i32 50} ; CHECK: [[META6:![0-9]+]] = !{i32 7, !"openmp-device", i32 50}
; CHECK: [[META7:![0-9]+]] = !{i32 7, !"PIC Level", i32 2} ; CHECK: [[META7:![0-9]+]] = !{i32 7, !"PIC Level", i32 2}
; CHECK: [[META8:![0-9]+]] = !{i32 7, !"frame-pointer", i32 2} ; CHECK: [[META8:![0-9]+]] = !{i32 7, !"frame-pointer", i32 2}
; CHECK: [[META9:![0-9]+]] = !{!"clang version 14.0.0"} ; CHECK: [[META9:![0-9]+]] = !{!"clang version 14.0.0"}
;. ;.