The patch adds microMIPS32r6 and microMIPS64r6 tests for existing 16-bit ADDIUR1SP, ADDIUR2, ADDIUS5 and ADDIUSP instructions.
Details
Details
Diff Detail
Diff Detail
- Repository
- rL LLVM
Event Timeline
Comment Actions
LGTM, possibly with a couple nits.
test/MC/Mips/micromips32r6/invalid.s | ||
---|---|---|
6–7 ↗ | (On Diff #29082) | Should these (and the one on line 4) be: error: immediate operand value out of range If so, they should be in invalid-wrong-error.s. If the current error is the one we want then it's ok here. |
test/MC/Mips/micromips64r6/invalid.s | ||
6–7 ↗ | (On Diff #29082) | Likewise. |