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zbuljan (Zlatko Buljan)
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Apr 22 2015, 4:55 AM (334 w, 5 d)

Recent Activity

Jul 11 2016

zbuljan committed rL275050: [mips][microMIPS] Implement LDC1, SDC1, LDC2, SDC2, LWC1, SWC1, LWC2 and SWC2….
[mips][microMIPS] Implement LDC1, SDC1, LDC2, SDC2, LWC1, SWC1, LWC2 and SWC2…
Jul 11 2016, 12:49 AM
zbuljan closed D18824: [mips][microMIPS] Implement LDC1, SDC1, LDC2, SDC2, LWC1, SWC1, LWC2 and SWC2 instructions and add CodeGen support by committing rL275050: [mips][microMIPS] Implement LDC1, SDC1, LDC2, SDC2, LWC1, SWC1, LWC2 and SWC2….
Jul 11 2016, 12:49 AM

Jul 1 2016

zbuljan added a comment to D18824: [mips][microMIPS] Implement LDC1, SDC1, LDC2, SDC2, LWC1, SWC1, LWC2 and SWC2 instructions and add CodeGen support.

Please, can someone make a review on this patch?

Jul 1 2016, 12:52 AM

Jun 15 2016

zbuljan committed rL272764: [mips][microMIPS] Add CodeGen support for AND*, OR16, OR*, XOR*, NOT16 and….
[mips][microMIPS] Add CodeGen support for AND*, OR16, OR*, XOR*, NOT16 and…
Jun 15 2016, 12:53 AM
zbuljan closed D16719: [mips][microMIPS] Add CodeGen support for AND*, OR16, OR*, XOR*, NOT16 and NOR instructions by committing rL272764: [mips][microMIPS] Add CodeGen support for AND*, OR16, OR*, XOR*, NOT16 and….
Jun 15 2016, 12:53 AM

Jun 9 2016

zbuljan updated the diff for D16719: [mips][microMIPS] Add CodeGen support for AND*, OR16, OR*, XOR*, NOT16 and NOR instructions.

Rebased to work with TOT.
Removed ISA_NOT_MICROMIPS because it is not needed and used "let AdditionalPredicates = [NotInMicroMips]" instead.
Replaced MMR6 check prefix with MM.
Added 'not' with a register and immediate to invalid tests.

Jun 9 2016, 6:03 AM
zbuljan committed rL272256: [mips][microMIPS] Add CodeGen support for SEL.*, SELEQZ, SELNEZ, SELEQZ.*….
[mips][microMIPS] Add CodeGen support for SEL.*, SELEQZ, SELNEZ, SELEQZ.*…
Jun 9 2016, 4:22 AM
zbuljan closed D20862: [mips][microMIPS] Add CodeGen support for SEL.*, SELEQZ, SELNEZ, SELEQZ.*, SELNEZ.* and CMP.condn.fmt instructions by committing rL272256: [mips][microMIPS] Add CodeGen support for SEL.*, SELEQZ, SELNEZ, SELEQZ.*….
Jun 9 2016, 4:22 AM

Jun 8 2016

zbuljan added a comment to D16719: [mips][microMIPS] Add CodeGen support for AND*, OR16, OR*, XOR*, NOT16 and NOR instructions.

As I can see now there is no reason for usage of ISA_NOT_MICROMIPS instead of "let AdditionalPredicates = [NotInMicroMips] in" so I'll change it.

Jun 8 2016, 5:22 AM
zbuljan updated the diff for D20862: [mips][microMIPS] Add CodeGen support for SEL.*, SELEQZ, SELNEZ, SELEQZ.*, SELNEZ.* and CMP.condn.fmt instructions.

Rebased to work with TOT.
Changed defs for MIPS32r6 CMP.condn.fmt to inherit from MipsR6Arch class.
Changed order of inheritance (R6MMR6Rel class) for microMIPS32r6 CMP.condn.fmt defs.
Updated fcmp.ll with CodeGen tests for microMIPS32r6 CMP.condn.fmt instructions.

Jun 8 2016, 12:24 AM

Jun 6 2016

zbuljan updated the diff for D18824: [mips][microMIPS] Implement LDC1, SDC1, LDC2, SDC2, LWC1, SWC1, LWC2 and SWC2 instructions and add CodeGen support.

Moved implementation of LDC1 and LDC2 to this patch.
Added addrimm11 and addrimm16 complex pattern definitions.
Added DAG patterns (LoadRegImmPat and StoreRegImmPat).
Added operand checkings for LDC*, SDC*, LWC* and SWC* instructions.
Updated isMemWithSimmOffset method for relocation support.
Added tests for the standard encodings and invalid tests.
Updated .ll files with CodeGen tests for microMIPSr6.
Added micromips-lwc1-swc1.ll with CodeGen tests for microMIPSr6.

Jun 6 2016, 11:29 PM

Jun 1 2016

zbuljan retitled D20862: [mips][microMIPS] Add CodeGen support for SEL.*, SELEQZ, SELNEZ, SELEQZ.*, SELNEZ.* and CMP.condn.fmt instructions from to [mips][microMIPS] Add CodeGen support for SEL.*, SELEQZ, SELNEZ, SELEQZ.* and SELNEZ.* instructions.
Jun 1 2016, 6:53 AM

May 31 2016

zbuljan updated the diff for D16719: [mips][microMIPS] Add CodeGen support for AND*, OR16, OR*, XOR*, NOT16 and NOR instructions.

Rebased to work with TOT.
Added AddedComplexity = 1 to ORI and NOT16 description classes.
Added DAG patterns for proper selection of ORI and XORI instructions.
Separated MIPS ANDI, ORI and XORI from equivalent microMIPS instructions using ISA_NOT_MICROMIPS predicate.
Updated not.ll with tests for NOR instruction.
Removed redundant asm/disasm tests.
Added asm/disasm tests for the instructions which were not covered.

May 31 2016, 1:56 AM

May 23 2016

zbuljan abandoned D16918: [mips][microMIPS] Implement LLX, LLXE, SCX and SCXE instructions.

LLX, LLXE, SCX and SCXE have been removed from spec.

May 23 2016, 11:15 PM

May 19 2016

zbuljan committed rL270030: [mips][microMIPS] Implement BC1EQZC, BC1NEZC, BC2EQZC and BC2NEZC instructions.
[mips][microMIPS] Implement BC1EQZC, BC1NEZC, BC2EQZC and BC2NEZC instructions
May 19 2016, 12:37 AM
zbuljan closed D18352: [mips][microMIPS] Implement BC1EQZC, BC1NEZC, BC2EQZC and BC2NEZC instructions by committing rL270030: [mips][microMIPS] Implement BC1EQZC, BC1NEZC, BC2EQZC and BC2NEZC instructions.
May 19 2016, 12:37 AM

May 18 2016

zbuljan updated the diff for D18352: [mips][microMIPS] Implement BC1EQZC, BC1NEZC, BC2EQZC and BC2NEZC instructions.

Rebased to work with TOT.

May 18 2016, 12:46 AM
zbuljan committed rL269883: [mips][microMIPS] Implement LH, LHE, LHU and LHUE instructions and add….
[mips][microMIPS] Implement LH, LHE, LHU and LHUE instructions and add…
May 18 2016, 12:01 AM
zbuljan closed D15418: [mips][microMIPS] Implement LH, LHE, LHU and LHUE instructions and add CodeGen support by committing rL269883: [mips][microMIPS] Implement LH, LHE, LHU and LHUE instructions and add….
May 18 2016, 12:01 AM

May 17 2016

zbuljan added inline comments to D16719: [mips][microMIPS] Add CodeGen support for AND*, OR16, OR*, XOR*, NOT16 and NOR instructions.
May 17 2016, 4:06 AM
zbuljan updated the diff for D15418: [mips][microMIPS] Implement LH, LHE, LHU and LHUE instructions and add CodeGen support.

Rebased to work with TOT.
Changed LH_LHU_FM_MM format class to inherit from MMArch.
Removed the line "list<Pattern> = []" from the definition of MMArch class.
Added "int AddedComplexity = 1" parameter to definition of 16-bit instructions.
Updated lh_lhu.ll with test for microMIPS64r6.

May 17 2016, 3:56 AM
zbuljan committed rL269752: [mips][microMIPS][DSP] Implement BALIGN, BITREV, BPOSGE32, CMP*, CMPGDU*….
[mips][microMIPS][DSP] Implement BALIGN, BITREV, BPOSGE32, CMP*, CMPGDU*…
May 17 2016, 2:39 AM
zbuljan closed D16182: [mips][microMIPS][DSP] Implement BALIGN, BITREV, BPOSGE32, CMP*, CMPGDU*, CMPGU* and CMPU* instructions by committing rL269752: [mips][microMIPS][DSP] Implement BALIGN, BITREV, BPOSGE32, CMP*, CMPGDU*….
May 17 2016, 2:39 AM

May 16 2016

zbuljan updated the diff for D18352: [mips][microMIPS] Implement BC1EQZC, BC1NEZC, BC2EQZC and BC2NEZC instructions.

Rebased to work with TOT.
Changed POOL32I_BRANCH_COP_1_2_FM_MMR6 format class to inherit from MMR6Arch.

May 16 2016, 5:28 AM

May 13 2016

zbuljan updated the diff for D16182: [mips][microMIPS][DSP] Implement BALIGN, BITREV, BPOSGE32, CMP*, CMPGDU*, CMPGU* and CMPU* instructions.

Rebased to work with TOT.
Renamed format class POOL32_3RB0_FMT to POOL32S_3RB0_FMT and removed unnecessary parametar.
Test files for microMIPS32r3 + DSPr1 are placed in micromips-dsp folders.
Added invalid tests for BPOSGE32 (BPOSGE32 is microMIPS DSP instruction but it is removed in release 6).

May 13 2016, 3:59 AM

May 12 2016

zbuljan updated the diff for D16719: [mips][microMIPS] Add CodeGen support for AND*, OR16, OR*, XOR*, NOT16 and NOR instructions.

Rebased to work with TOT.
Changed immediate to uimm16 in alias definitions for AND instruction.
Added DAG patterns to description clases of AND, OR and XOR instructions.
Added AddedComplexity parameter to definitions of AND16, OR16 and XOR16 instructions so they can be prioritized during instruction selection.
Updated and.ll and or.ll with IR code to check some constants that are and are not encodable in 16-bit form.
Added invalid tests for operand checking.

May 12 2016, 6:22 AM

May 9 2016

zbuljan committed rL268896: [mips][microMIPS] Implement LWP and SWP instructions.
[mips][microMIPS] Implement LWP and SWP instructions
May 9 2016, 1:13 AM
zbuljan closed D10640: [mips][microMIPS] Implement LWP and SWP instructions by committing rL268896: [mips][microMIPS] Implement LWP and SWP instructions.
May 9 2016, 1:13 AM

May 6 2016

zbuljan updated the diff for D16182: [mips][microMIPS][DSP] Implement BALIGN, BITREV, BPOSGE32, CMP*, CMPGDU*, CMPGU* and CMPU* instructions.

Rebased to work with TOT.
Class POOL32_3RB0_FMT renamed to POOL32_3RB0POOL_FMT.
Changed BALIGN_MMR2_DESC to be parameterless class.
Instruction BPOSGE32 separated from microMIPSDSPR6 using ISA_MIPS1_NOT_32R6_64R6 flag.
ISA_DSPR2 is returned to CMPGDU* and BALIGN because these instructions are for DSP2.
Added valid-dsp.txt and valid-dsp.s for test of microMIPSDSP BPOSGE32 instruction which is removed in microMIPSr6.

May 6 2016, 4:50 AM
zbuljan committed rL268714: [mips][microMIPS] Add CodeGen support for MUL* and DMUL* instructions.
[mips][microMIPS] Add CodeGen support for MUL* and DMUL* instructions
May 6 2016, 1:30 AM
zbuljan closed D15744: [mips][microMIPS] Add CodeGen support for MUL* and DMUL* instructions by committing rL268714: [mips][microMIPS] Add CodeGen support for MUL* and DMUL* instructions.
May 6 2016, 1:30 AM

May 5 2016

zbuljan updated the diff for D15744: [mips][microMIPS] Add CodeGen support for MUL* and DMUL* instructions.

Rebased to work with TOT.
Updated according to comments received from sdardis.

May 5 2016, 1:06 AM

May 4 2016

zbuljan committed rL268491: [mips][microMIPS] Add CodeGen support for microMIPSr6 ROTR and ROTRV and add….
[mips][microMIPS] Add CodeGen support for microMIPSr6 ROTR and ROTRV and add…
May 4 2016, 5:08 AM
zbuljan closed D19857: [mips][microMIPS] Add CodeGen support for microMIPSr6 ROTR and ROTRV and add tests for LL, SC, SYSCALL, ROTR, ROTRV, LWM32, SWM32 and MOVEP instructions by committing rL268491: [mips][microMIPS] Add CodeGen support for microMIPSr6 ROTR and ROTRV and add….
May 4 2016, 5:08 AM
zbuljan updated the diff for D18352: [mips][microMIPS] Implement BC1EQZC, BC1NEZC, BC2EQZC and BC2NEZC instructions.

Used only one format class POOL32I_BRANCH_COP_1_2_FM_MMR6 (other one was redundant so it is deleted).
Modified desc. class BRANCH_COP1_MMR6_DESC_BASE to inherit the relevant parameterised InstSE<> class.
Register $at is now defined in both desc. classes (BRANCH_COP1_MMR6_DESC_BASE and BRANCH_COP2_MMR6_DESC_BASE).
Removed redundant tests and added additional invalid tests.

May 4 2016, 4:13 AM

May 3 2016

zbuljan retitled D19857: [mips][microMIPS] Add CodeGen support for microMIPSr6 ROTR and ROTRV and add tests for LL, SC, SYSCALL, ROTR, ROTRV, LWM32, SWM32 and MOVEP instructions from to [mips][microMIPS] Add CodeGen support for microMIPSr6 ROTR and ROTRV and add tests for LL, SC, SYSCALL, ROTR, ROTRV, LWM32, SWM32 and MOVEP instructions.
May 3 2016, 12:09 AM

Apr 29 2016

zbuljan updated the diff for D15418: [mips][microMIPS] Implement LH, LHE, LHU and LHUE instructions and add CodeGen support.

Rebased to work with TOT.
Removed microMIPS32r6 implementation of LH and LHU instructions because it is not required.
Added required DAG patterns for microMIPS LH and LHU instructions so they can be selected properly.
Expanded .ll test with load atomic to check added DAG pattern.
Tests for the standard encodings are sorted in alphabetical order.
Added invalid tests for the negative ranges.

Apr 29 2016, 4:20 AM
zbuljan committed rL268012: [mips][microMIPS] Fix offsets for LLE, LWE, SBE, SCE and SHE instructions.
[mips][microMIPS] Fix offsets for LLE, LWE, SBE, SCE and SHE instructions
Apr 29 2016, 1:43 AM
zbuljan closed D18645: [mips][microMIPS] Fix offsets for LLE, LWE, SBE, SCE and SHE instructions by committing rL268012: [mips][microMIPS] Fix offsets for LLE, LWE, SBE, SCE and SHE instructions.
Apr 29 2016, 1:42 AM
zbuljan updated the diff for D10640: [mips][microMIPS] Implement LWP and SWP instructions.

Rebased to work with TOT.
Added check for Rd and Base registers of LWP to MipsAsmParser::checkTargetMatchPredicate method.
Added invalid test for the case of same Rd and Base registers of LWP instruction.
Renamed mem_simm12gpr to mem_simm12 and added DiagnosticType "MemSImm12" to MipsMemSimm12AsmOperand class.
Added selection of proper register class (32/64-bit) to addRegPairOperands method (MipsAsmParser.cpp).

Apr 29 2016, 12:40 AM

Apr 27 2016

zbuljan committed rL267694: [mips][microMIPS] Add CodeGen support for SUBU16, SUB, SUBU, DSUB and DSUBU….
[mips][microMIPS] Add CodeGen support for SUBU16, SUB, SUBU, DSUB and DSUBU…
Apr 27 2016, 4:37 AM
zbuljan closed D16676: [mips][microMIPS] Add CodeGen support for SUBU16, SUB, SUBU, DSUB and DSUBU instructions by committing rL267694: [mips][microMIPS] Add CodeGen support for SUBU16, SUB, SUBU, DSUB and DSUBU….
Apr 27 2016, 4:37 AM
zbuljan committed rL267693: [mips][microMIPS] Add CodeGen support for SLL16, SRL16, SLL, SLLV, SRA, SRAV….
[mips][microMIPS] Add CodeGen support for SLL16, SRL16, SLL, SLLV, SRA, SRAV…
Apr 27 2016, 4:08 AM
zbuljan closed D17989: [mips][microMIPS] Add CodeGen support for SLL16, SRL16, SLL, SLLV, SRA, SRAV, SRL and SRLV instructions by committing rL267693: [mips][microMIPS] Add CodeGen support for SLL16, SRL16, SLL, SLLV, SRA, SRAV….
Apr 27 2016, 4:08 AM

Apr 25 2016

zbuljan committed rL267418: [mips][microMIPS] Revert commit r266977.
[mips][microMIPS] Revert commit r266977
Apr 25 2016, 8:40 AM

Apr 22 2016

zbuljan updated the diff for D16676: [mips][microMIPS] Add CodeGen support for SUBU16, SUB, SUBU, DSUB and DSUBU instructions.

Rebased to work with TOT.
Removed redundant POOL32S_DSUB_FM_MMR6 class and replaced with existing POOL32S_ARITH_FM_MMR6.
Added alias for dnegu $rt.
Added invalid tests for dneg and dnegu with immediate operands.

Apr 22 2016, 5:36 AM

Apr 21 2016

zbuljan committed rL267114: [mips][microMIPS] Implement DVP, EVP and JALRC.HB instructions.
[mips][microMIPS] Implement DVP, EVP and JALRC.HB instructions
Apr 21 2016, 11:50 PM
zbuljan closed D18687: [mips][microMIPS] Implement DVP, EVP and JALRC.HB instructions by committing rL267114: [mips][microMIPS] Implement DVP, EVP and JALRC.HB instructions.
Apr 21 2016, 11:50 PM
zbuljan committed rL266980: [mips][microMIPS] Implement TLBP, TLBR, TLBWI and TLBWR instructions.
[mips][microMIPS] Implement TLBP, TLBR, TLBWI and TLBWR instructions
Apr 21 2016, 4:39 AM
zbuljan closed D18855: [mips][microMIPS] Implement TLBP, TLBR, TLBWI and TLBWR instructions by committing rL266980: [mips][microMIPS] Implement TLBP, TLBR, TLBWI and TLBWR instructions.
Apr 21 2016, 4:38 AM
zbuljan committed rL266977: [mips][microMIPS] Implement LL, SC, MOVEP, ROTR, ROTRV and SYSCALL….
[mips][microMIPS] Implement LL, SC, MOVEP, ROTR, ROTRV and SYSCALL…
Apr 21 2016, 4:07 AM
zbuljan closed D19150: [mips][microMIPS] Implement LL, SC, MOVEP, ROTR, ROTRV and SYSCALL instructions and add tests for LWM32 and SWM32 by committing rL266977: [mips][microMIPS] Implement LL, SC, MOVEP, ROTR, ROTRV and SYSCALL….
Apr 21 2016, 4:07 AM
zbuljan updated the diff for D19150: [mips][microMIPS] Implement LL, SC, MOVEP, ROTR, ROTRV and SYSCALL instructions and add tests for LWM32 and SWM32.

Rearranged tests according to comments from sdardis.

Apr 21 2016, 1:57 AM

Apr 20 2016

zbuljan updated the diff for D19150: [mips][microMIPS] Implement LL, SC, MOVEP, ROTR, ROTRV and SYSCALL instructions and add tests for LWM32 and SWM32.

Rebased to work with TOT.
All tests (valid.s/valid.txt/invalid.s) sorted in alphabetical order.
Added invalid test for rotrv with an immediate operand.
Invalid tests for syscall with a register operand and syscall with an out of range immediate placed in invalid-wrong-error.s because they currently emit wrong error messages.

Apr 20 2016, 6:11 AM

Apr 19 2016

zbuljan updated the diff for D17989: [mips][microMIPS] Add CodeGen support for SLL16, SRL16, SLL, SLLV, SRA, SRAV, SRL and SRLV instructions.

Rebased to work with TOT.
Added -relocation-model=pic switch to microMIPS CodeGen tests for consistency with other tests.
Removed redundant tests for sllv, srav and srlv.

Apr 19 2016, 12:49 AM

Apr 15 2016

zbuljan retitled D19150: [mips][microMIPS] Implement LL, SC, MOVEP, ROTR, ROTRV and SYSCALL instructions and add tests for LWM32 and SWM32 from to [mips][microMIPS] Implement LL, SC, LWM32, SWM32, MOVEP, ROTR, ROTRV and SYSCALL instructions.
Apr 15 2016, 12:14 AM

Apr 13 2016

zbuljan committed rL266179: [mips][microMIPS] Add CodeGen support for DIV, MOD, DIVU, MODU, DDIV, DMOD….
[mips][microMIPS] Add CodeGen support for DIV, MOD, DIVU, MODU, DDIV, DMOD…
Apr 13 2016, 1:08 AM

Apr 11 2016

zbuljan updated the diff for D18645: [mips][microMIPS] Fix offsets for LLE, LWE, SBE, SCE and SHE instructions.

Removed mem_simm9gpr because it is redundand (also removed MipsMemSimm9GPRAsmOperand class and isMemWithSimmOffsetGPR() method).
Replaced all usages of mem_simm9gpr with mem_simm9.
Removed changes in enc. classes because they are not needed for this patch.
Added more invalid tests for instructions with mem_simm9 operand.

Apr 11 2016, 5:34 AM
zbuljan updated the diff for D18855: [mips][microMIPS] Implement TLBP, TLBR, TLBWI and TLBWR instructions.

Added invalid tests for TLBP, TLBR, TLBWI and TLBWR instructions.

Apr 11 2016, 12:36 AM

Apr 8 2016

zbuljan committed rL265772: [mips][microMIPS] Add CodeGen support for ADD, ADDIU*, ADDU* and DADD*….
[mips][microMIPS] Add CodeGen support for ADD, ADDIU*, ADDU* and DADD*…
Apr 8 2016, 12:33 AM
zbuljan closed D16454: [mips][microMIPS] Add CodeGen support for ADD, ADDIU*, ADDU* and DADD* instructions by committing rL265772: [mips][microMIPS] Add CodeGen support for ADD, ADDIU*, ADDU* and DADD*….
Apr 8 2016, 12:32 AM

Apr 7 2016

zbuljan retitled D18855: [mips][microMIPS] Implement TLBP, TLBR, TLBWI and TLBWR instructions from to [mips][microMIPS] Implement TLBP, TLBR, TLBWI and TLBWR instructions.
Apr 7 2016, 6:23 AM

Apr 6 2016

zbuljan retitled D18824: [mips][microMIPS] Implement LDC1, SDC1, LDC2, SDC2, LWC1, SWC1, LWC2 and SWC2 instructions and add CodeGen support from to [mips][microMIPS] Implement LWC1, LWC2, SDC1, SDC2, SWC1 and SWC2 instructions.
Apr 6 2016, 6:24 AM

Apr 1 2016

zbuljan retitled D18687: [mips][microMIPS] Implement DVP, EVP and JALRC.HB instructions from to [mips][microMIPS] Implement DVP, EVP and JALRC.HB instructions.
Apr 1 2016, 1:46 AM

Mar 31 2016

zbuljan added a comment to D16918: [mips][microMIPS] Implement LLX, LLXE, SCX and SCXE instructions.

Patch for 9-bit offset is placed on Phabricator at D18645.

Mar 31 2016, 6:25 AM
zbuljan retitled D18645: [mips][microMIPS] Fix offsets for LLE, LWE, SBE, SCE and SHE instructions from to [mips][microMIPS] Fix offsets for LLE, LWE, SBE, SCE and SHE instructions.
Mar 31 2016, 6:22 AM
zbuljan committed rL265002: [mips][microMIPS] Implement MFC*, MFHC* and DMFC* instructions.
[mips][microMIPS] Implement MFC*, MFHC* and DMFC* instructions
Mar 31 2016, 1:57 AM
zbuljan closed D17334: [mips][microMIPS] Implement MFC*, MFHC* and DMFC* instructions by committing rL265002: [mips][microMIPS] Implement MFC*, MFHC* and DMFC* instructions.
Mar 31 2016, 1:56 AM

Mar 24 2016

zbuljan committed rL264248: [mips][microMIPS] Add CodeGen support for DIV, MOD, DIVU, MODU, DDIV, DMOD….
[mips][microMIPS] Add CodeGen support for DIV, MOD, DIVU, MODU, DDIV, DMOD…
Mar 24 2016, 2:28 AM
zbuljan closed D17137: [mips][microMIPS] Add CodeGen support for DIV, MOD, DIVU, MODU, DDIV, DMOD, DDIVU and DMODU instructions by committing rL264248: [mips][microMIPS] Add CodeGen support for DIV, MOD, DIVU, MODU, DDIV, DMOD….
Mar 24 2016, 2:28 AM

Mar 23 2016

zbuljan updated the diff for D17334: [mips][microMIPS] Implement MFC*, MFHC* and DMFC* instructions.

Rebased to work with top of the tree.
Added instruction definition for 64-bit version of MFHC1.
Added decoder table for 64-bit FPU version.
Invalid tests for MF* and DMFC* in MIPS32 and MIPS64 moved to another patch (already commited).
Fixed indentations.

Mar 23 2016, 6:25 AM

Mar 22 2016

zbuljan retitled D18352: [mips][microMIPS] Implement BC1EQZC, BC1NEZC, BC2EQZC and BC2NEZC instructions from to [mips][microMIPS] Implement BC1EQZC, BC1NEZC, BC2EQZC and BC2NEZC instructions.
Mar 22 2016, 7:41 AM

Mar 14 2016

zbuljan committed rL263428: [mips] Fix an issue with long double when function roundl is defined.
[mips] Fix an issue with long double when function roundl is defined
Mar 14 2016, 5:55 AM
zbuljan closed D17760: [mips] Fix an issue with long double when function roundl is defined by committing rL263428: [mips] Fix an issue with long double when function roundl is defined.
Mar 14 2016, 5:55 AM

Mar 11 2016

zbuljan updated the diff for D10640: [mips][microMIPS] Implement LWP and SWP instructions.

Rebased to work with top of the tree.

Mar 11 2016, 3:53 AM
zbuljan updated the diff for D15418: [mips][microMIPS] Implement LH, LHE, LHU and LHUE instructions and add CodeGen support.

Rebased to work with top of the tree.

Mar 11 2016, 1:55 AM
zbuljan updated the diff for D16182: [mips][microMIPS][DSP] Implement BALIGN, BITREV, BPOSGE32, CMP*, CMPGDU*, CMPGU* and CMPU* instructions.

Rebased to work with top of the tree.
Added new template argument (DAGOperand) to existing BPOSGE32_DESC_BASE class.
Desc. class for microMIPSDSP BPOSGE32 now uses brtarget_mm operand instead of brtarget operand.
Removed unnecessary changes in encoder and decoder method of brtarget operand.

Mar 11 2016, 12:17 AM

Mar 9 2016

zbuljan retitled D17989: [mips][microMIPS] Add CodeGen support for SLL16, SRL16, SLL, SLLV, SRA, SRAV, SRL and SRLV instructions from to [mips][microMIPS] Add CodeGen support for SLL16, SRL16, SLL, SLLV, SRA, SRAV, SRL and SRLV instructions.
Mar 9 2016, 5:13 AM

Mar 8 2016

zbuljan updated the diff for D16454: [mips][microMIPS] Add CodeGen support for ADD, ADDIU*, ADDU* and DADD* instructions.

Rebased to work with top of the tree.
Added ASE_NOT_DSP class.

Mar 8 2016, 3:54 AM

Mar 4 2016

zbuljan updated the diff for D17760: [mips] Fix an issue with long double when function roundl is defined.

Updated .ll with tests for N32 and soft-float.
Removed unnecessary IR code.
.ll file moved to test/CodeGen/Mips/cconv/ folder.

Mar 4 2016, 1:54 AM

Mar 1 2016

zbuljan updated D17760: [mips] Fix an issue with long double when function roundl is defined.
Mar 1 2016, 11:38 PM
zbuljan retitled D17760: [mips] Fix an issue with long double when function roundl is defined from to [mips] Fix an issue with long double when function roundl is defined.
Mar 1 2016, 5:19 AM

Feb 26 2016

zbuljan updated the diff for D17137: [mips][microMIPS] Add CodeGen support for DIV, MOD, DIVU, MODU, DDIV, DMOD, DDIVU and DMODU instructions.
  • rebased to work with top of the tree
  • removed fix for "Cannot copy registers" as this patch depends on D17068 (rebased on D17068 patch)
  • removed checkings for nop instructions (they are not needed for microMIPS)
Feb 26 2016, 1:15 AM

Feb 18 2016

zbuljan committed rL261211: [mips][microMIPS] Implement TLBINV and TLBINVF instructions.
[mips][microMIPS] Implement TLBINV and TLBINVF instructions
Feb 18 2016, 6:15 AM
zbuljan closed D16849: [mips][microMIPS] Implement TLBINV and TLBINVF instructions by committing rL261211: [mips][microMIPS] Implement TLBINV and TLBINVF instructions.
Feb 18 2016, 6:15 AM
zbuljan updated the diff for D17334: [mips][microMIPS] Implement MFC*, MFHC* and DMFC* instructions.

Changed names of format classes.
Rebased to work with top of the tree.

Feb 18 2016, 12:54 AM
zbuljan added inline comments to D16454: [mips][microMIPS] Add CodeGen support for ADD, ADDIU*, ADDU* and DADD* instructions.
Feb 18 2016, 12:45 AM

Feb 17 2016

zbuljan retitled D17334: [mips][microMIPS] Implement MFC*, MFHC* and DMFC* instructions from to [mips][microMIPS] Implement MFC*, MFHC* and DMFC* instructions.
Feb 17 2016, 6:00 AM

Feb 11 2016

zbuljan retitled D17137: [mips][microMIPS] Add CodeGen support for DIV, MOD, DIVU, MODU, DDIV, DMOD, DDIVU and DMODU instructions from to [mips][microMIPS] Add CodeGen support for DIV, MOD, DIVU, MODU, DDIV, DMOD, DDIVU and DMODU instructions.
Feb 11 2016, 6:01 AM

Feb 7 2016

zbuljan added a comment to D16918: [mips][microMIPS] Implement LLX, LLXE, SCX and SCXE instructions.

Hi Daniel,

Feb 7 2016, 11:48 PM

Feb 5 2016

zbuljan retitled D16918: [mips][microMIPS] Implement LLX, LLXE, SCX and SCXE instructions from to [mips][microMIPS] Implement LLX, LLXE, SCX and SCXE instructions.
Feb 5 2016, 12:58 AM

Feb 3 2016

zbuljan retitled D16849: [mips][microMIPS] Implement TLBINV and TLBINVF instructions from to [mips][microMIPS] Implement TLBINV and TLBINVF instructions.
Feb 3 2016, 5:11 AM

Jan 29 2016

zbuljan retitled D16719: [mips][microMIPS] Add CodeGen support for AND*, OR16, OR*, XOR*, NOT16 and NOR instructions from to [mips][microMIPS] Add CodeGen support for AND*, OR16, OR*, XOR*, NOT16 and NOR instructions.
Jan 29 2016, 2:48 AM

Jan 28 2016

zbuljan retitled D16676: [mips][microMIPS] Add CodeGen support for SUBU16, SUB, SUBU, DSUB and DSUBU instructions from to [mips][microMIPS] Add CodeGen support for SUBU16, SUB, SUBU, DSUB and DSUBU instructions.
Jan 28 2016, 1:21 AM

Jan 22 2016

zbuljan updated the diff for D15744: [mips][microMIPS] Add CodeGen support for MUL* and DMUL* instructions.

Rebased to work with top of the tree.
Updated mul.ll with test for microMIPS32r3.

Jan 22 2016, 4:39 AM
zbuljan retitled D16454: [mips][microMIPS] Add CodeGen support for ADD, ADDIU*, ADDU* and DADD* instructions from to [mips][microMIPS] Add CodeGen support for ADD, ADDIU*, ADDU* and DADD* instructions.
Jan 22 2016, 1:33 AM

Jan 14 2016

zbuljan retitled D16182: [mips][microMIPS][DSP] Implement BALIGN, BITREV, BPOSGE32, CMP*, CMPGDU*, CMPGU* and CMPU* instructions from to [mips][microMIPS][DSP] Implement BALIGN, BITREV, BPOSGE32, CMP*, CMPGDU*, CMPGU* and CMPU* instructions.
Jan 14 2016, 4:48 AM

Dec 23 2015

zbuljan retitled D15744: [mips][microMIPS] Add CodeGen support for MUL* and DMUL* instructions from to [mips][microMIPS] Add CodeGen support for MUL* and DMUL* instructions.
Dec 23 2015, 5:44 AM

Dec 21 2015

zbuljan committed rL256152: [mips][microMIPS] Implement DERET and DI instructions and check size operand….
[mips][microMIPS] Implement DERET and DI instructions and check size operand…
Dec 21 2015, 5:12 AM
zbuljan closed D15570: [mips][microMIPS] Implement DERET and DI instructions and check size operand for EXT and DEXT* instructions by committing rL256152: [mips][microMIPS] Implement DERET and DI instructions and check size operand….
Dec 21 2015, 5:12 AM