[InstCombine] Convert xor (ashr X, BW-1), C -> select(X >=s 0, C, ~C)

[dmgreen]

Summary

The sequence of instructions xor (ashr X, BW-1), C (or with a truncation xor (trunc (ashr X, BW-1)), C) takes a value, produces all zeros or all ones and with it optionally inverts a constant depending on whether the original input was positive or negative. This is the same as checking if the value is positive, and selecting between the constant and ~constant.
https://alive2.llvm.org/ce/z/NJ85qY

This is a fairly general version of the fold as part of D108049, which really only needs the constant to be a saturate INTMAX/INTMIN pair.

[foad]

... optionally negates a constant ...

It's not integer negation. I like "inverts" better.

[spatel]

llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp

3595

"xor X, 0" - seems like that should be an assert because it means this instruction escaped from instsimplify.

"xor X, -1" - I think we should handle this too for consistency. The transform holds for any value unless I'm missing something:
https://alive2.llvm.org/ce/z/R7qEeT
(If that's right, please add a test so we know we are not or will not conflict with some other transform.)

3596

Might as well create this as "SGT X, -1" to save a step since the "SGE" will get canonicalized to that form.

[dmgreen]

llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp

3595

Yeah that apparently comes up a few times in the existing tests.

From what I can tell, we would convert a select c, -1, 0 to a sext c:
https://godbolt.org/z/zKePx154f
And a (x >s -1) ? -1 : 0 -> not (ashr x, 31):
https://github.com/llvm/llvm-project/blob/c01b76e733d6e5e2d21e4277dceaa1f319794c6a/llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp#L1408

It makes sense to treat "not" as special to me, more canonical than the other folds here.

3596

Will do.

[dmgreen]

Add an assert for zero, and change to s> -1.

[lebedev.ri]

llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp

3593

I'm not sure this one-use check does what you want it to do when there's trunc

3593

Should this use m_APIntAllowUndef?

[dmgreen]

Sorry for the delay, other things came up. This is a rebase, plus makes used of m_APIntAllowUndef and moves the m_OneUse before the m_TruncOrSelf.

[lebedev.ri]

FWIW, we don't strictly need this to be xor-by-constant: https://alive2.llvm.org/ce/z/snX3_H
If everything is one-use, then we could allow xor-by-value too.
Not sure if it improves things or not though?

[lebedev.ri]

In D109151#3046283, @lebedev.ri wrote:

FWIW, we don't strictly need this to be xor-by-constant: https://alive2.llvm.org/ce/z/snX3_H

Err, i of course meant https://alive2.llvm.org/ce/z/NJ85qY
... which can also be spelled as: https://alive2.llvm.org/ce/z/FTGTu7
which brings me to the real question: isn't the main pattern here: https://alive2.llvm.org/ce/z/B8TUY6 ?

If everything is one-use, then we could allow xor-by-value too.
Not sure if it improves things or not though?

[foad]

isn't the main pattern here: https://alive2.llvm.org/ce/z/B8TUY6 ?

This is (trunc (ashr i16 %input, 15) to i8) -> (select i1 (icmp sgt i16 %input, 65535), i8 0, i8 255), but I don't understand why you include the trunc in the transformation.

Don't we want to fold (ashr i16 %input, 15) -> (select i1 (icmp sgt i16 %input, 65535), i16 0, i16 65535) in any situation where the user(s) of this expression can be pushed into the select? I.e. not just a trunc, but also things like an XOR with constant from the original motivating example "xor (ashr X, BW-1), C".

[dmgreen]

which brings me to the real question: isn't the main pattern here: https://alive2.llvm.org/ce/z/B8TUY6 ?

Not sure. This is already more general than I need it to be. I really just need this awkward saturate to fold into a more canonical pattern :)

A select %c, -1, 0 is just a sext c (or in this case select c, 0, -1 -> sext(not(c)), which inverts the condition c). https://github.com/llvm/llvm-project/blob/c01b76e733d6e5e2d21e4277dceaa1f319794c6a/llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp#L1408 will convert that to a ashr. If you think any of that should change then let me know, but it seems like it might break a few things.

[lebedev.ri]

Seems fine to me.

llvm/test/Transforms/InstCombine/xor-ashr.ll

66–76

We fail to fully propagate undefs. This should be
https://alive2.llvm.org/ce/z/ZGMsRq
(see Constant::mergeUndefsWith())

llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp

Instruction *InstCombinerImpl::visitXor(BinaryOperator &I) {
   Value *M;
   if (match(&I, m_c_Xor(m_c_And(m_Not(m_Value(M)), m_Value()),
                         m_c_And(m_Deferred(M), m_Value()))))
     return BinaryOperator::CreateOr(Op0, Op1);
 
   if (Instruction *Xor = visitMaskedMerge(I, Builder))
     return Xor;
 
-  // Use DeMorgan and reassociation to eliminate a 'not' op.
   Value *X, *Y;
   Constant *C1;
   if (match(Op1, m_Constant(C1))) {
+    // Use DeMorgan and reassociation to eliminate a 'not' op.
     Constant *C2;
     if (match(Op0, m_OneUse(m_Or(m_Not(m_Value(X)), m_Constant(C2))))) {
       // (~X | C2) ^ C1 --> ((X & ~C2) ^ -1) ^ C1 --> (X & ~C2) ^ ~C1
       Value *And = Builder.CreateAnd(X, ConstantExpr::getNot(C2));
       return BinaryOperator::CreateXor(And, ConstantExpr::getNot(C1));
     }
     if (match(Op0, m_OneUse(m_And(m_Not(m_Value(X)), m_Constant(C2))))) {
       // (~X & C2) ^ C1 --> ((X | ~C2) ^ -1) ^ C1 --> (X | ~C2) ^ ~C1
       Value *Or = Builder.CreateOr(X, ConstantExpr::getNot(C2));
       return BinaryOperator::CreateXor(Or, ConstantExpr::getNot(C1));
     }
+
+    // Convert xor ([trunc] (ashr X, BW-1)), C =>
+    //   select(X >s -1, C, ~C)
+    // The ashr creates "AllZeroOrAllOne's", which then optionally inverses the
+    // constant depending on whether this input is less than 0.
+    const APInt *CA;
+    if (match(Op0, m_OneUse(m_TruncOrSelf(
+                       m_AShr(m_Value(X), m_APIntAllowUndef(CA))))) &&
+        *CA == X->getType()->getScalarSizeInBits() - 1 &&
+        !C1->isAllOnesValue()) {
+      assert(!C1->isZeroValue() && "Unexpected xor with 0");
+      Value *ICmp =
+          Builder.CreateICmpSGT(X, Constant::getAllOnesValue(X->getType()));
+      return SelectInst::Create(ICmp, Op1, Builder.CreateNot(Op1));
+    }
   }
 
   Type *Ty = I.getType();
   {
     const APInt *RHSC;
     if (match(Op1, m_APInt(RHSC))) {
       Value *X;
       const APInt *C;

llvm/test/Transforms/InstCombine/truncating-saturate.ll

 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
 ; RUN: opt < %s -instcombine -S | FileCheck %s
 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
 
 declare void @use(i32)
 declare void @use16(i16)
 declare void @use1(i1)
 
 define i8 @testi16i8(i16 %add) {
 ; CHECK-LABEL: @testi16i8(
 ; CHECK-NEXT:    [[SH:%.*]] = lshr i16 [[ADD:%.*]], 8
 ; CHECK-NEXT:    [[CONV_I:%.*]] = trunc i16 [[SH]] to i8
 ; CHECK-NEXT:    [[CONV1_I:%.*]] = trunc i16 [[ADD]] to i8
 ; CHECK-NEXT:    [[SHR2_I:%.*]] = ashr i8 [[CONV1_I]], 7
 ; CHECK-NEXT:    [[CMP_NOT_I:%.*]] = icmp eq i8 [[SHR2_I]], [[CONV_I]]
-; CHECK-NEXT:    [[SHR4_I:%.*]] = ashr i16 [[ADD]], 15
-; CHECK-NEXT:    [[CONV5_I:%.*]] = trunc i16 [[SHR4_I]] to i8
-; CHECK-NEXT:    [[XOR_I:%.*]] = xor i8 [[CONV5_I]], 127
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp sgt i16 [[ADD]], -1
+; CHECK-NEXT:    [[XOR_I:%.*]] = select i1 [[TMP1]], i8 127, i8 -128
 ; CHECK-NEXT:    [[COND_I:%.*]] = select i1 [[CMP_NOT_I]], i8 [[CONV1_I]], i8 [[XOR_I]]
 ; CHECK-NEXT:    ret i8 [[COND_I]]
 ;
   %sh = lshr i16 %add, 8
   %conv.i = trunc i16 %sh to i8
   %conv1.i = trunc i16 %add to i8
   %shr2.i = ashr i8 %conv1.i, 7
   %cmp.not.i = icmp eq i8 %shr2.i, %conv.i
   %shr4.i = ashr i16 %add, 15
   %conv5.i = trunc i16 %shr4.i to i8
   %xor.i = xor i8 %conv5.i, 127
   %cond.i = select i1 %cmp.not.i, i8 %conv1.i, i8 %xor.i
   ret i8 %cond.i
 }
 
 define i32 @testi64i32(i64 %add) {
 ; CHECK-LABEL: @testi64i32(
 ; CHECK-NEXT:    [[SH:%.*]] = lshr i64 [[ADD:%.*]], 32
 ; CHECK-NEXT:    [[CONV_I:%.*]] = trunc i64 [[SH]] to i32
 ; CHECK-NEXT:    [[CONV1_I:%.*]] = trunc i64 [[ADD]] to i32
 ; CHECK-NEXT:    [[SHR2_I:%.*]] = ashr i32 [[CONV1_I]], 31
 ; CHECK-NEXT:    [[CMP_NOT_I:%.*]] = icmp eq i32 [[SHR2_I]], [[CONV_I]]
-; CHECK-NEXT:    [[SHR4_I:%.*]] = ashr i64 [[ADD]], 63
-; CHECK-NEXT:    [[CONV5_I:%.*]] = trunc i64 [[SHR4_I]] to i32
-; CHECK-NEXT:    [[XOR_I:%.*]] = xor i32 [[CONV5_I]], 2147483647
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp sgt i64 [[ADD]], -1
+; CHECK-NEXT:    [[XOR_I:%.*]] = select i1 [[TMP1]], i32 2147483647, i32 -2147483648
 ; CHECK-NEXT:    [[COND_I:%.*]] = select i1 [[CMP_NOT_I]], i32 [[CONV1_I]], i32 [[XOR_I]]
 ; CHECK-NEXT:    ret i32 [[COND_I]]
 ;
   %sh = lshr i64 %add, 32
   %conv.i = trunc i64 %sh to i32
   %conv1.i = trunc i64 %add to i32
   %shr2.i = ashr i32 %conv1.i, 31
   %cmp.not.i = icmp eq i32 %shr2.i, %conv.i

 ; CHECK-NEXT:    [[SA:%.*]] = sext i32 [[A:%.*]] to i64
 ; CHECK-NEXT:    [[SB:%.*]] = sext i32 [[B:%.*]] to i64
 ; CHECK-NEXT:    [[ADD:%.*]] = add nsw i64 [[SA]], [[SB]]
 ; CHECK-NEXT:    [[SH:%.*]] = lshr i64 [[ADD]], 32
 ; CHECK-NEXT:    [[CONV_I:%.*]] = trunc i64 [[SH]] to i32
 ; CHECK-NEXT:    [[CONV1_I:%.*]] = trunc i64 [[ADD]] to i32
 ; CHECK-NEXT:    [[SHR2_I:%.*]] = ashr i32 [[CONV1_I]], 31
 ; CHECK-NEXT:    [[CMP_NOT_I:%.*]] = icmp eq i32 [[SHR2_I]], [[CONV_I]]
-; CHECK-NEXT:    [[SHR4_I:%.*]] = ashr i64 [[ADD]], 63
-; CHECK-NEXT:    [[CONV5_I:%.*]] = trunc i64 [[SHR4_I]] to i32
-; CHECK-NEXT:    [[XOR_I:%.*]] = xor i32 [[CONV5_I]], 2147483647
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp sgt i64 [[ADD]], -1
+; CHECK-NEXT:    [[XOR_I:%.*]] = select i1 [[TMP1]], i32 2147483647, i32 -2147483648
 ; CHECK-NEXT:    [[COND_I:%.*]] = select i1 [[CMP_NOT_I]], i32 [[CONV1_I]], i32 [[XOR_I]]
 ; CHECK-NEXT:    ret i32 [[COND_I]]
 ;
   %sa = sext i32 %a to i64
   %sb = sext i32 %b to i64
   %add = add i64 %sa, %sb
   %sh = lshr i64 %add, 32
   %conv.i = trunc i64 %sh to i32

 
 define <4 x i8> @testv4i16i8(<4 x i16> %add) {
 ; CHECK-LABEL: @testv4i16i8(
 ; CHECK-NEXT:    [[SH:%.*]] = lshr <4 x i16> [[ADD:%.*]], <i16 8, i16 8, i16 8, i16 8>
 ; CHECK-NEXT:    [[CONV_I:%.*]] = trunc <4 x i16> [[SH]] to <4 x i8>
 ; CHECK-NEXT:    [[CONV1_I:%.*]] = trunc <4 x i16> [[ADD]] to <4 x i8>
 ; CHECK-NEXT:    [[SHR2_I:%.*]] = ashr <4 x i8> [[CONV1_I]], <i8 7, i8 7, i8 7, i8 7>
 ; CHECK-NEXT:    [[CMP_NOT_I:%.*]] = icmp eq <4 x i8> [[SHR2_I]], [[CONV_I]]
-; CHECK-NEXT:    [[SHR4_I:%.*]] = ashr <4 x i16> [[ADD]], <i16 15, i16 15, i16 15, i16 15>
-; CHECK-NEXT:    [[CONV5_I:%.*]] = trunc <4 x i16> [[SHR4_I]] to <4 x i8>
-; CHECK-NEXT:    [[XOR_I:%.*]] = xor <4 x i8> [[CONV5_I]], <i8 127, i8 127, i8 127, i8 127>
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp sgt <4 x i16> [[ADD]], <i16 -1, i16 -1, i16 -1, i16 -1>
+; CHECK-NEXT:    [[XOR_I:%.*]] = select <4 x i1> [[TMP1]], <4 x i8> <i8 127, i8 127, i8 127, i8 127>, <4 x i8> <i8 -128, i8 -128, i8 -128, i8 -128>
 ; CHECK-NEXT:    [[COND_I:%.*]] = select <4 x i1> [[CMP_NOT_I]], <4 x i8> [[CONV1_I]], <4 x i8> [[XOR_I]]
 ; CHECK-NEXT:    ret <4 x i8> [[COND_I]]
 ;
   %sh = lshr <4 x i16> %add, <i16 8, i16 8, i16 8, i16 8>
   %conv.i = trunc <4 x i16> %sh to <4 x i8>
   %conv1.i = trunc <4 x i16> %add to <4 x i8>
   %shr2.i = ashr <4 x i8> %conv1.i, <i8 7, i8 7, i8 7, i8 7>
   %cmp.not.i = icmp eq <4 x i8> %shr2.i, %conv.i

 ; CHECK-NEXT:    [[SA:%.*]] = sext <4 x i8> [[A:%.*]] to <4 x i16>
 ; CHECK-NEXT:    [[SB:%.*]] = sext <4 x i8> [[B:%.*]] to <4 x i16>
 ; CHECK-NEXT:    [[ADD:%.*]] = add nsw <4 x i16> [[SA]], [[SB]]
 ; CHECK-NEXT:    [[SH:%.*]] = lshr <4 x i16> [[ADD]], <i16 8, i16 8, i16 8, i16 8>
 ; CHECK-NEXT:    [[CONV_I:%.*]] = trunc <4 x i16> [[SH]] to <4 x i8>
 ; CHECK-NEXT:    [[CONV1_I:%.*]] = trunc <4 x i16> [[ADD]] to <4 x i8>
 ; CHECK-NEXT:    [[SHR2_I:%.*]] = ashr <4 x i8> [[CONV1_I]], <i8 7, i8 7, i8 7, i8 7>
 ; CHECK-NEXT:    [[CMP_NOT_I:%.*]] = icmp eq <4 x i8> [[SHR2_I]], [[CONV_I]]
-; CHECK-NEXT:    [[SHR4_I:%.*]] = ashr <4 x i16> [[ADD]], <i16 15, i16 15, i16 15, i16 15>
-; CHECK-NEXT:    [[CONV5_I:%.*]] = trunc <4 x i16> [[SHR4_I]] to <4 x i8>
-; CHECK-NEXT:    [[XOR_I:%.*]] = xor <4 x i8> [[CONV5_I]], <i8 127, i8 127, i8 127, i8 127>
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp sgt <4 x i16> [[ADD]], <i16 -1, i16 -1, i16 -1, i16 -1>
+; CHECK-NEXT:    [[XOR_I:%.*]] = select <4 x i1> [[TMP1]], <4 x i8> <i8 127, i8 127, i8 127, i8 127>, <4 x i8> <i8 -128, i8 -128, i8 -128, i8 -128>
 ; CHECK-NEXT:    [[COND_I:%.*]] = select <4 x i1> [[CMP_NOT_I]], <4 x i8> [[CONV1_I]], <4 x i8> [[XOR_I]]
 ; CHECK-NEXT:    ret <4 x i8> [[COND_I]]
 ;
   %sa = sext <4 x i8> %a to <4 x i16>
   %sb = sext <4 x i8> %b to <4 x i16>
   %add = add <4 x i16> %sa, %sb
   %sh = lshr <4 x i16> %add, <i16 8, i16 8, i16 8, i16 8>
   %conv.i = trunc <4 x i16> %sh to <4 x i8>

 
 define i8 @testi16i8_revcmp(i16 %add) {
 ; CHECK-LABEL: @testi16i8_revcmp(
 ; CHECK-NEXT:    [[SH:%.*]] = lshr i16 [[ADD:%.*]], 8
 ; CHECK-NEXT:    [[CONV_I:%.*]] = trunc i16 [[SH]] to i8
 ; CHECK-NEXT:    [[CONV1_I:%.*]] = trunc i16 [[ADD]] to i8
 ; CHECK-NEXT:    [[SHR2_I:%.*]] = ashr i8 [[CONV1_I]], 7
 ; CHECK-NEXT:    [[CMP_NOT_I:%.*]] = icmp eq i8 [[SHR2_I]], [[CONV_I]]
-; CHECK-NEXT:    [[SHR4_I:%.*]] = ashr i16 [[ADD]], 15
-; CHECK-NEXT:    [[CONV5_I:%.*]] = trunc i16 [[SHR4_I]] to i8
-; CHECK-NEXT:    [[XOR_I:%.*]] = xor i8 [[CONV5_I]], 127
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp sgt i16 [[ADD]], -1
+; CHECK-NEXT:    [[XOR_I:%.*]] = select i1 [[TMP1]], i8 127, i8 -128
 ; CHECK-NEXT:    [[COND_I:%.*]] = select i1 [[CMP_NOT_I]], i8 [[CONV1_I]], i8 [[XOR_I]]
 ; CHECK-NEXT:    ret i8 [[COND_I]]
 ;
   %sh = lshr i16 %add, 8
   %conv.i = trunc i16 %sh to i8
   %conv1.i = trunc i16 %add to i8
   %shr2.i = ashr i8 %conv1.i, 7
   %cmp.not.i = icmp eq i8 %conv.i, %shr2.i
   %shr4.i = ashr i16 %add, 15
   %conv5.i = trunc i16 %shr4.i to i8
   %xor.i = xor i8 %conv5.i, 127
   %cond.i = select i1 %cmp.not.i, i8 %conv1.i, i8 %xor.i
   ret i8 %cond.i
 }
 
 define i8 @testi16i8_revselect(i16 %add) {
 ; CHECK-LABEL: @testi16i8_revselect(
 ; CHECK-NEXT:    [[SH:%.*]] = lshr i16 [[ADD:%.*]], 8
 ; CHECK-NEXT:    [[CONV_I:%.*]] = trunc i16 [[SH]] to i8
 ; CHECK-NEXT:    [[CONV1_I:%.*]] = trunc i16 [[ADD]] to i8
 ; CHECK-NEXT:    [[SHR2_I:%.*]] = ashr i8 [[CONV1_I]], 7
 ; CHECK-NEXT:    [[CMP_NOT_I_NOT:%.*]] = icmp eq i8 [[SHR2_I]], [[CONV_I]]
-; CHECK-NEXT:    [[SHR4_I:%.*]] = ashr i16 [[ADD]], 15
-; CHECK-NEXT:    [[CONV5_I:%.*]] = trunc i16 [[SHR4_I]] to i8
-; CHECK-NEXT:    [[XOR_I:%.*]] = xor i8 [[CONV5_I]], 127
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp sgt i16 [[ADD]], -1
+; CHECK-NEXT:    [[XOR_I:%.*]] = select i1 [[TMP1]], i8 127, i8 -128
 ; CHECK-NEXT:    [[COND_I:%.*]] = select i1 [[CMP_NOT_I_NOT]], i8 [[CONV1_I]], i8 [[XOR_I]]
 ; CHECK-NEXT:    ret i8 [[COND_I]]
 ;
   %sh = lshr i16 %add, 8
   %conv.i = trunc i16 %sh to i8
   %conv1.i = trunc i16 %add to i8
   %shr2.i = ashr i8 %conv1.i, 7
   %cmp.not.i = icmp ne i8 %conv.i, %shr2.i

 
 define i8 @badimm1(i16 %add) {
 ; CHECK-LABEL: @badimm1(
 ; CHECK-NEXT:    [[SH:%.*]] = lshr i16 [[ADD:%.*]], 9
 ; CHECK-NEXT:    [[CONV_I:%.*]] = trunc i16 [[SH]] to i8
 ; CHECK-NEXT:    [[CONV1_I:%.*]] = trunc i16 [[ADD]] to i8
 ; CHECK-NEXT:    [[SHR2_I:%.*]] = ashr i8 [[CONV1_I]], 7
 ; CHECK-NEXT:    [[CMP_NOT_I:%.*]] = icmp eq i8 [[SHR2_I]], [[CONV_I]]
-; CHECK-NEXT:    [[SHR4_I:%.*]] = ashr i16 [[ADD]], 15
-; CHECK-NEXT:    [[CONV5_I:%.*]] = trunc i16 [[SHR4_I]] to i8
-; CHECK-NEXT:    [[XOR_I:%.*]] = xor i8 [[CONV5_I]], 127
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp sgt i16 [[ADD]], -1
+; CHECK-NEXT:    [[XOR_I:%.*]] = select i1 [[TMP1]], i8 127, i8 -128
 ; CHECK-NEXT:    [[COND_I:%.*]] = select i1 [[CMP_NOT_I]], i8 [[CONV1_I]], i8 [[XOR_I]]
 ; CHECK-NEXT:    ret i8 [[COND_I]]
 ;
   %sh = lshr i16 %add, 9
   %conv.i = trunc i16 %sh to i8
   %conv1.i = trunc i16 %add to i8
   %shr2.i = ashr i8 %conv1.i, 7
   %cmp.not.i = icmp eq i8 %shr2.i, %conv.i
   %shr4.i = ashr i16 %add, 15
   %conv5.i = trunc i16 %shr4.i to i8
   %xor.i = xor i8 %conv5.i, 127
   %cond.i = select i1 %cmp.not.i, i8 %conv1.i, i8 %xor.i
   ret i8 %cond.i
 }
 
 define i8 @badimm2(i16 %add) {
 ; CHECK-LABEL: @badimm2(
 ; CHECK-NEXT:    [[SH:%.*]] = lshr i16 [[ADD:%.*]], 8
 ; CHECK-NEXT:    [[CONV_I:%.*]] = trunc i16 [[SH]] to i8
 ; CHECK-NEXT:    [[CONV1_I:%.*]] = trunc i16 [[ADD]] to i8
 ; CHECK-NEXT:    [[SHR2_I:%.*]] = ashr i8 [[CONV1_I]], 6
 ; CHECK-NEXT:    [[CMP_NOT_I:%.*]] = icmp eq i8 [[SHR2_I]], [[CONV_I]]
-; CHECK-NEXT:    [[SHR4_I:%.*]] = ashr i16 [[ADD]], 15
-; CHECK-NEXT:    [[CONV5_I:%.*]] = trunc i16 [[SHR4_I]] to i8
-; CHECK-NEXT:    [[XOR_I:%.*]] = xor i8 [[CONV5_I]], 127
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp sgt i16 [[ADD]], -1
+; CHECK-NEXT:    [[XOR_I:%.*]] = select i1 [[TMP1]], i8 127, i8 -128
 ; CHECK-NEXT:    [[COND_I:%.*]] = select i1 [[CMP_NOT_I]], i8 [[CONV1_I]], i8 [[XOR_I]]
 ; CHECK-NEXT:    ret i8 [[COND_I]]
 ;
   %sh = lshr i16 %add, 8
   %conv.i = trunc i16 %sh to i8
   %conv1.i = trunc i16 %add to i8
   %shr2.i = ashr i8 %conv1.i, 6
   %cmp.not.i = icmp eq i8 %shr2.i, %conv.i

 
 define i8 @badimm4(i16 %add) {
 ; CHECK-LABEL: @badimm4(
 ; CHECK-NEXT:    [[SH:%.*]] = lshr i16 [[ADD:%.*]], 8
 ; CHECK-NEXT:    [[CONV_I:%.*]] = trunc i16 [[SH]] to i8
 ; CHECK-NEXT:    [[CONV1_I:%.*]] = trunc i16 [[ADD]] to i8
 ; CHECK-NEXT:    [[SHR2_I:%.*]] = ashr i8 [[CONV1_I]], 7
 ; CHECK-NEXT:    [[CMP_NOT_I:%.*]] = icmp eq i8 [[SHR2_I]], [[CONV_I]]
-; CHECK-NEXT:    [[SHR4_I:%.*]] = ashr i16 [[ADD]], 15
-; CHECK-NEXT:    [[CONV5_I:%.*]] = trunc i16 [[SHR4_I]] to i8
-; CHECK-NEXT:    [[XOR_I:%.*]] = xor i8 [[CONV5_I]], 126
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp sgt i16 [[ADD]], -1
+; CHECK-NEXT:    [[XOR_I:%.*]] = select i1 [[TMP1]], i8 126, i8 -127
 ; CHECK-NEXT:    [[COND_I:%.*]] = select i1 [[CMP_NOT_I]], i8 [[CONV1_I]], i8 [[XOR_I]]
 ; CHECK-NEXT:    ret i8 [[COND_I]]
 ;
   %sh = lshr i16 %add, 8
   %conv.i = trunc i16 %sh to i8
   %conv1.i = trunc i16 %add to i8
   %shr2.i = ashr i8 %conv1.i, 7
   %cmp.not.i = icmp eq i8 %shr2.i, %conv.i
   %shr4.i = ashr i16 %add, 15
   %conv5.i = trunc i16 %shr4.i to i8
   %xor.i = xor i8 %conv5.i, 126
   %cond.i = select i1 %cmp.not.i, i8 %conv1.i, i8 %xor.i
   ret i8 %cond.i
 }
 
 ; One use checks
 
 define i32 @oneusexor(i64 %add) {
 ; CHECK-LABEL: @oneusexor(
 ; CHECK-NEXT:    [[SH:%.*]] = lshr i64 [[ADD:%.*]], 32
 ; CHECK-NEXT:    [[CONV_I:%.*]] = trunc i64 [[SH]] to i32
 ; CHECK-NEXT:    [[CONV1_I:%.*]] = trunc i64 [[ADD]] to i32
 ; CHECK-NEXT:    [[SHR2_I:%.*]] = ashr i32 [[CONV1_I]], 31
 ; CHECK-NEXT:    [[CMP_NOT_I:%.*]] = icmp eq i32 [[SHR2_I]], [[CONV_I]]
-; CHECK-NEXT:    [[SHR4_I:%.*]] = ashr i64 [[ADD]], 63
-; CHECK-NEXT:    [[CONV5_I:%.*]] = trunc i64 [[SHR4_I]] to i32
-; CHECK-NEXT:    [[XOR_I:%.*]] = xor i32 [[CONV5_I]], 2147483647
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp sgt i64 [[ADD]], -1
+; CHECK-NEXT:    [[XOR_I:%.*]] = select i1 [[TMP1]], i32 2147483647, i32 -2147483648
 ; CHECK-NEXT:    [[COND_I:%.*]] = select i1 [[CMP_NOT_I]], i32 [[CONV1_I]], i32 [[XOR_I]]
 ; CHECK-NEXT:    call void @use(i32 [[XOR_I]])
 ; CHECK-NEXT:    ret i32 [[COND_I]]
 ;
   %sh = lshr i64 %add, 32
   %conv.i = trunc i64 %sh to i32
   %conv1.i = trunc i64 %add to i32
   %shr2.i = ashr i32 %conv1.i, 31
   %cmp.not.i = icmp eq i32 %shr2.i, %conv.i
   %shr4.i = ashr i64 %add, 63
   %conv5.i = trunc i64 %shr4.i to i32
   %xor.i = xor i32 %conv5.i, 2147483647
   %cond.i = select i1 %cmp.not.i, i32 %conv1.i, i32 %xor.i
   call void @use(i32 %xor.i)
   ret i32 %cond.i
 }
 
 define i32 @oneuseconv(i64 %add) {
 ; CHECK-LABEL: @oneuseconv(
 ; CHECK-NEXT:    [[SH:%.*]] = lshr i64 [[ADD:%.*]], 32
 ; CHECK-NEXT:    [[CONV_I:%.*]] = trunc i64 [[SH]] to i32
 ; CHECK-NEXT:    [[CONV1_I:%.*]] = trunc i64 [[ADD]] to i32
 ; CHECK-NEXT:    [[SHR2_I:%.*]] = ashr i32 [[CONV1_I]], 31
 ; CHECK-NEXT:    [[CMP_NOT_I:%.*]] = icmp eq i32 [[SHR2_I]], [[CONV_I]]
-; CHECK-NEXT:    [[SHR4_I:%.*]] = ashr i64 [[ADD]], 63
-; CHECK-NEXT:    [[CONV5_I:%.*]] = trunc i64 [[SHR4_I]] to i32
-; CHECK-NEXT:    [[XOR_I:%.*]] = xor i32 [[CONV5_I]], 2147483647
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp sgt i64 [[ADD]], -1
+; CHECK-NEXT:    [[XOR_I:%.*]] = select i1 [[TMP1]], i32 2147483647, i32 -2147483648
 ; CHECK-NEXT:    [[COND_I:%.*]] = select i1 [[CMP_NOT_I]], i32 [[CONV1_I]], i32 [[XOR_I]]
 ; CHECK-NEXT:    call void @use(i32 [[CONV1_I]])
 ; CHECK-NEXT:    ret i32 [[COND_I]]
 ;
   %sh = lshr i64 %add, 32
   %conv.i = trunc i64 %sh to i32
   %conv1.i = trunc i64 %add to i32
   %shr2.i = ashr i32 %conv1.i, 31
   %cmp.not.i = icmp eq i32 %shr2.i, %conv.i
   %shr4.i = ashr i64 %add, 63
   %conv5.i = trunc i64 %shr4.i to i32
   %xor.i = xor i32 %conv5.i, 2147483647
   %cond.i = select i1 %cmp.not.i, i32 %conv1.i, i32 %xor.i
   call void @use(i32 %conv1.i)
   ret i32 %cond.i
 }
 
 define i32 @oneusecmp(i64 %add) {
 ; CHECK-LABEL: @oneusecmp(
 ; CHECK-NEXT:    [[SH:%.*]] = lshr i64 [[ADD:%.*]], 32
 ; CHECK-NEXT:    [[CONV_I:%.*]] = trunc i64 [[SH]] to i32
 ; CHECK-NEXT:    [[CONV1_I:%.*]] = trunc i64 [[ADD]] to i32
 ; CHECK-NEXT:    [[SHR2_I:%.*]] = ashr i32 [[CONV1_I]], 31
 ; CHECK-NEXT:    [[CMP_NOT_I:%.*]] = icmp eq i32 [[SHR2_I]], [[CONV_I]]
-; CHECK-NEXT:    [[SHR4_I:%.*]] = ashr i64 [[ADD]], 63
-; CHECK-NEXT:    [[CONV5_I:%.*]] = trunc i64 [[SHR4_I]] to i32
-; CHECK-NEXT:    [[XOR_I:%.*]] = xor i32 [[CONV5_I]], 2147483647
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp sgt i64 [[ADD]], -1
+; CHECK-NEXT:    [[XOR_I:%.*]] = select i1 [[TMP1]], i32 2147483647, i32 -2147483648
 ; CHECK-NEXT:    [[COND_I:%.*]] = select i1 [[CMP_NOT_I]], i32 [[CONV1_I]], i32 [[XOR_I]]
 ; CHECK-NEXT:    call void @use1(i1 [[CMP_NOT_I]])
 ; CHECK-NEXT:    ret i32 [[COND_I]]
 ;
   %sh = lshr i64 %add, 32
   %conv.i = trunc i64 %sh to i32
   %conv1.i = trunc i64 %add to i32
   %shr2.i = ashr i32 %conv1.i, 31
   %cmp.not.i = icmp eq i32 %shr2.i, %conv.i
   %shr4.i = ashr i64 %add, 63
   %conv5.i = trunc i64 %shr4.i to i32
   %xor.i = xor i32 %conv5.i, 2147483647
   %cond.i = select i1 %cmp.not.i, i32 %conv1.i, i32 %xor.i
   call void @use1(i1 %cmp.not.i)
   ret i32 %cond.i
 }
 
 define i32 @oneuseboth(i64 %add) {
 ; CHECK-LABEL: @oneuseboth(
 ; CHECK-NEXT:    [[SH:%.*]] = lshr i64 [[ADD:%.*]], 32
 ; CHECK-NEXT:    [[CONV_I:%.*]] = trunc i64 [[SH]] to i32
 ; CHECK-NEXT:    [[CONV1_I:%.*]] = trunc i64 [[ADD]] to i32
 ; CHECK-NEXT:    [[SHR2_I:%.*]] = ashr i32 [[CONV1_I]], 31
 ; CHECK-NEXT:    [[CMP_NOT_I:%.*]] = icmp eq i32 [[SHR2_I]], [[CONV_I]]
-; CHECK-NEXT:    [[SHR4_I:%.*]] = ashr i64 [[ADD]], 63
-; CHECK-NEXT:    [[CONV5_I:%.*]] = trunc i64 [[SHR4_I]] to i32
-; CHECK-NEXT:    [[XOR_I:%.*]] = xor i32 [[CONV5_I]], 2147483647
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp sgt i64 [[ADD]], -1
+; CHECK-NEXT:    [[XOR_I:%.*]] = select i1 [[TMP1]], i32 2147483647, i32 -2147483648
 ; CHECK-NEXT:    [[COND_I:%.*]] = select i1 [[CMP_NOT_I]], i32 [[CONV1_I]], i32 [[XOR_I]]
 ; CHECK-NEXT:    call void @use(i32 [[XOR_I]])
 ; CHECK-NEXT:    call void @use(i32 [[CONV1_I]])
 ; CHECK-NEXT:    ret i32 [[COND_I]]
 ;
   %sh = lshr i64 %add, 32
   %conv.i = trunc i64 %sh to i32
   %conv1.i = trunc i64 %add to i32

 
 define i32 @oneusethree(i64 %add) {
 ; CHECK-LABEL: @oneusethree(
 ; CHECK-NEXT:    [[SH:%.*]] = lshr i64 [[ADD:%.*]], 32
 ; CHECK-NEXT:    [[CONV_I:%.*]] = trunc i64 [[SH]] to i32
 ; CHECK-NEXT:    [[CONV1_I:%.*]] = trunc i64 [[ADD]] to i32
 ; CHECK-NEXT:    [[SHR2_I:%.*]] = ashr i32 [[CONV1_I]], 31
 ; CHECK-NEXT:    [[CMP_NOT_I:%.*]] = icmp eq i32 [[SHR2_I]], [[CONV_I]]
-; CHECK-NEXT:    [[SHR4_I:%.*]] = ashr i64 [[ADD]], 63
-; CHECK-NEXT:    [[CONV5_I:%.*]] = trunc i64 [[SHR4_I]] to i32
-; CHECK-NEXT:    [[XOR_I:%.*]] = xor i32 [[CONV5_I]], 2147483647
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp sgt i64 [[ADD]], -1
+; CHECK-NEXT:    [[XOR_I:%.*]] = select i1 [[TMP1]], i32 2147483647, i32 -2147483648
 ; CHECK-NEXT:    [[COND_I:%.*]] = select i1 [[CMP_NOT_I]], i32 [[CONV1_I]], i32 [[XOR_I]]
 ; CHECK-NEXT:    call void @use(i32 [[XOR_I]])
 ; CHECK-NEXT:    call void @use(i32 [[CONV1_I]])
 ; CHECK-NEXT:    call void @use1(i1 [[CMP_NOT_I]])
 ; CHECK-NEXT:    ret i32 [[COND_I]]
 ;
   %sh = lshr i64 %add, 32
   %conv.i = trunc i64 %sh to i32

llvm/test/Transforms/InstCombine/xor-ashr.ll

 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
 ; RUN: opt < %s -instcombine -S | FileCheck %s
 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
 
 declare void @use16(i16)
 declare void @use32(i32)
 
 define i8 @testi8i8(i8 %add) {
 ; CHECK-LABEL: @testi8i8(
-; CHECK-NEXT:    [[SH:%.*]] = ashr i8 [[ADD:%.*]], 7
-; CHECK-NEXT:    [[X:%.*]] = xor i8 [[SH]], 127
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp sgt i8 [[ADD:%.*]], -1
+; CHECK-NEXT:    [[X:%.*]] = select i1 [[TMP1]], i8 127, i8 -128
 ; CHECK-NEXT:    ret i8 [[X]]
 ;
   %sh = ashr i8 %add, 7
   %x = xor i8 %sh, 127
   ret i8 %x
 }
 
 define i8 @testi16i8(i16 %add) {
 ; CHECK-LABEL: @testi16i8(
-; CHECK-NEXT:    [[SH:%.*]] = ashr i16 [[ADD:%.*]], 15
-; CHECK-NEXT:    [[T:%.*]] = trunc i16 [[SH]] to i8
-; CHECK-NEXT:    [[X:%.*]] = xor i8 [[T]], 27
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp sgt i16 [[ADD:%.*]], -1
+; CHECK-NEXT:    [[X:%.*]] = select i1 [[TMP1]], i8 27, i8 -28
 ; CHECK-NEXT:    ret i8 [[X]]
 ;
   %sh = ashr i16 %add, 15
   %t = trunc i16 %sh to i8
   %x = xor i8 %t, 27
   ret i8 %x
 }
 
 define i32 @testi64i32(i64 %add) {
 ; CHECK-LABEL: @testi64i32(
-; CHECK-NEXT:    [[SH:%.*]] = ashr i64 [[ADD:%.*]], 63
-; CHECK-NEXT:    [[T:%.*]] = trunc i64 [[SH]] to i32
-; CHECK-NEXT:    [[X:%.*]] = xor i32 [[T]], 127
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp sgt i64 [[ADD:%.*]], -1
+; CHECK-NEXT:    [[X:%.*]] = select i1 [[TMP1]], i32 127, i32 -128
 ; CHECK-NEXT:    ret i32 [[X]]
 ;
   %sh = ashr i64 %add, 63
   %t = trunc i64 %sh to i32
   %x = xor i32 %t, 127
   ret i32 %x
 }
 
 define i128 @testi128i128(i128 %add) {
 ; CHECK-LABEL: @testi128i128(
-; CHECK-NEXT:    [[SH:%.*]] = ashr i128 [[ADD:%.*]], 127
-; CHECK-NEXT:    [[X:%.*]] = xor i128 [[SH]], 27
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp sgt i128 [[ADD:%.*]], -1
+; CHECK-NEXT:    [[X:%.*]] = select i1 [[TMP1]], i128 27, i128 -28
 ; CHECK-NEXT:    ret i128 [[X]]
 ;
   %sh = ashr i128 %add, 127
   %x = xor i128 %sh, 27
   ret i128 %x
 }
 
 define <4 x i8> @testv4i16i8(<4 x i16> %add) {
 ; CHECK-LABEL: @testv4i16i8(
-; CHECK-NEXT:    [[SH:%.*]] = ashr <4 x i16> [[ADD:%.*]], <i16 15, i16 15, i16 15, i16 15>
-; CHECK-NEXT:    [[T:%.*]] = trunc <4 x i16> [[SH]] to <4 x i8>
-; CHECK-NEXT:    [[X:%.*]] = xor <4 x i8> [[T]], <i8 27, i8 27, i8 27, i8 27>
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp sgt <4 x i16> [[ADD:%.*]], <i16 -1, i16 -1, i16 -1, i16 -1>
+; CHECK-NEXT:    [[X:%.*]] = select <4 x i1> [[TMP1]], <4 x i8> <i8 27, i8 27, i8 27, i8 27>, <4 x i8> <i8 -28, i8 -28, i8 -28, i8 -28>
 ; CHECK-NEXT:    ret <4 x i8> [[X]]
 ;
   %sh = ashr <4 x i16> %add, <i16 15, i16 15, i16 15, i16 15>
   %t = trunc <4 x i16> %sh to <4 x i8>
   %x = xor <4 x i8> %t, <i8 27, i8 27, i8 27, i8 27>
   ret <4 x i8> %x
 }
 
 define <4 x i8> @testv4i16i8_undef(<4 x i16> %add) {
 ; CHECK-LABEL: @testv4i16i8_undef(
-; CHECK-NEXT:    [[SH:%.*]] = ashr <4 x i16> [[ADD:%.*]], <i16 15, i16 undef, i16 15, i16 15>
-; CHECK-NEXT:    [[T:%.*]] = trunc <4 x i16> [[SH]] to <4 x i8>
-; CHECK-NEXT:    [[X:%.*]] = xor <4 x i8> [[T]], <i8 27, i8 27, i8 undef, i8 27>
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp sgt <4 x i16> [[ADD:%.*]], <i16 -1, i16 -1, i16 -1, i16 -1>
+; CHECK-NEXT:    [[X:%.*]] = select <4 x i1> [[TMP1]], <4 x i8> <i8 27, i8 27, i8 undef, i8 27>, <4 x i8> <i8 -28, i8 -28, i8 undef, i8 -28>
 ; CHECK-NEXT:    ret <4 x i8> [[X]]
 ;
   %sh = ashr <4 x i16> %add, <i16 15, i16 undef, i16 15, i16 15>
   %t = trunc <4 x i16> %sh to <4 x i8>
   %x = xor <4 x i8> %t, <i8 27, i8 27, i8 undef, i8 27>
   ret <4 x i8> %x
 }
 
 ; Negative tests
 
 define i8 @wrongimm(i16 %add) {
 ; CHECK-LABEL: @wrongimm(
 ; CHECK-NEXT:    [[SH:%.*]] = ashr i16 [[ADD:%.*]], 14
 ; CHECK-NEXT:    [[T:%.*]] = trunc i16 [[SH]] to i8
 ; CHECK-NEXT:    [[X:%.*]] = xor i8 [[T]], 27
;
   %x = xor i16 %sh, 27
   call void @use16(i16 %sh)
   ret i16 %x
 }
 
 define i16 @extrause_trunc1(i32 %add) {
 ; CHECK-LABEL: @extrause_trunc1(
 ; CHECK-NEXT:    [[SH:%.*]] = ashr i32 [[ADD:%.*]], 31
-; CHECK-NEXT:    [[T:%.*]] = trunc i32 [[SH]] to i16
 ; CHECK-NEXT:    call void @use32(i32 [[SH]])
-; CHECK-NEXT:    [[X:%.*]] = xor i16 [[T]], 127
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp sgt i32 [[ADD]], -1
+; CHECK-NEXT:    [[X:%.*]] = select i1 [[TMP1]], i16 127, i16 -128
 ; CHECK-NEXT:    ret i16 [[X]]
 ;
   %sh = ashr i32 %add, 31
   %t = trunc i32 %sh to i16
   call void @use32(i32 %sh)
   %x = xor i16 %t, 127
   ret i16 %x
 }