After D79171, there is a type reversal in the insertelement
operation and its inputs resulting in a new IR pattern that during
SROA prevents speculateSelectInstLoads and PromoteMemToReg
for certain input scenarios. This patch will restore them.
Details
Diff Detail
- Repository
- rG LLVM Github Monorepo
Unit Tests
Event Timeline
The lit test select-bitcast.ll is an extract from a potential application that caused a bad performance due to the missing alloca promotion.
The intervening bitcast instruction in the load-bitcast-select sequence turned out to be a hurdle to perform alloca promotion during SROA.
Can you explain why AggLoadStoreRewriter currently fails due to that bitcast?
Which check in particular prevents the transformation?
While i agree it's obviously an improvement,
i'm wondering if there is some simpler solution.
I don't think currently there is anything that exists in the AggLoadStoreRewriter for bitcast (select cond V1 V2) pattern.
As I mentioned earlier, D79171 introduced this new pattern. Earlier, it was GEP in place of bitcast and the gep (select) folding already exists in the Rewriter.
I took a look, and like i suspected, this isn't the fix i'd envision.
I believe isSafeSelectToSpeculate() should, instead of only looking at direct uses of the SI,
add them all into worklist, iterate through it, and if any item is a bitcast, recurse into it,
else if it's a load then do what it currently does, and abort otherwise.
Posted D106667 to handle it during speculateSelectInstLoads. This review can be abandoned later.