[WebAssembly] Remove datalayout strings from llc tests

[tlively]

Summary

The data layout strings do not have any effect on llc tests and will become
misleadingly out of date as we continue to update the canonical data layout, so
remove them from the tests.

[aheejin]

Some of them seem to be opt tests..?

[tlively]

In D105842#2872230, @aheejin wrote:

Some of them seem to be opt tests..?

Good catch. I had to keep the data layout string in some opt tests for them to pass, so I'll go through and make sure to keep the data layout string in all the opt tests.

[tlively]

• Restore data layout string in all opt tests

[dschuff]

I'm ok with this change. I do hope we won't be continuing to update the canonical datalayout though.

[aheejin]

Also I’m not sure if the data layout doesn’t really matter for llc tests, becuse llc also runs some IR passes. For example, WasmEHPrepare and LowerEmscriptenEHSjLj passes both run within llc and IIRC at least LowerEmscripten~ pass uses datalayout.

[sbc100]

In D105842#2872408, @aheejin wrote:

Also I’m not sure if the data layout doesn’t really matter for llc tests, becuse llc also runs some IR passes. For example, WasmEHPrepare and LowerEmscriptenEHSjLj passes both run within llc and IIRC at least LowerEmscripten~ pass uses datalayout.

Surely we always want to let llvm set the data layout based on the triple though don't we? Does opt not do this too? What data layout other than default one for the given triple could it rationally select?

[aheejin]

I think that makes sense. Currently it looks if the data layout string is missing we have the default here: https://github.com/llvm/llvm-project/blob/dfd9808b6cea59ff075498ee7e6e57f2b5b3a798/llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp#L125-L131

But because this is from WebAssemblyTargetMachine, this only works for llc and not opt. I think we need to keep opt strings but maybe not llc then.

llvm/test/CodeGen/WebAssembly/PR40172.ll

 ; RUN: llc < %s -O0 -wasm-disable-explicit-locals -wasm-keep-registers | FileCheck %s
 
 ; Regression test for bug 40172. The problem was that FastISel assumed
 ; that CmpInst results did not need to be zero extended because
 ; WebAssembly's compare instructions always return 0 or 1. But in this
 ; test case FastISel falls back to DAG ISel, which combines away the
 ; comparison, invalidating FastISel's assumption.
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; CHECK:  i32.sub $[[BASE:[0-9]+]]=,
 ; CHECK:  local.copy $[[ARG:[0-9]+]]=, $0{{$}}
 ; CHECK:  i32.const $[[A0:[0-9]+]]=, 1{{$}}
 ; CHECK:  i32.and $[[A1:[0-9]+]]=, $[[ARG]], $[[A0]]{{$}}
 ; CHECK:  i32.store8 8($[[BASE]]), $[[A1]]{{$}}
 

llvm/test/CodeGen/WebAssembly/PR40267.ll

 ; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers
 
 ; Regression test for PR40267. Tests that invalid indices in
 ; extract_vector_elt can be handled when vectors ops are split. Notice
 ; that SIMD is not enabled for this test. Check only that llc does not
 ; crash, since it would previously trigger an assertion.
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 define void @foo() {
   %L6 = load i32, i32* undef
   br label %BB1
 
 BB1:                                              ; preds = %BB1, %0
   %bj = select <4 x i1> <i1 true, i1 true, i1 false, i1 false>, <4 x i32> <i32 55, i32 21, i32 92, i32 68>, <4 x i32> <i32 51, i32 61, i32 62, i32 39>
   %E1 = extractelement <4 x i32> %bj, i32 0
   %E23 = extractelement <4 x i32> zeroinitializer, i32 %E1
   %I33 = insertelement <4 x i32> undef, i32 %E23, i1 undef
   store <4 x i32> %I33, <4 x i32>* undef
   br label %BB1
 }

llvm/test/CodeGen/WebAssembly/PR41149.ll

 ; CHECK-NEXT: i32.store8      0
   %tmp = load <4 x i8>, <4 x i8>* undef
   %tmp2 = icmp slt <4 x i8> %tmp, zeroinitializer
   %tmp3 = sub <4 x i8> zeroinitializer, %tmp
   %tmp4 = select <4 x i1> %tmp2, <4 x i8> %tmp3, <4 x i8> %tmp
   store <4 x i8> %tmp4, <4 x i8>* undef
   ret void
 }
-

llvm/test/CodeGen/WebAssembly/PR41841.ll

 ; RUN: llc < %s -O0 -wasm-disable-explicit-locals -wasm-keep-registers -asm-verbose=false | FileCheck %s
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 declare void @foo(i128)
 
 ; CHECK-LABEL: test_zext:
 ; CHECK-NEXT: .functype test_zext (i32) -> (){{$}}
 ; CHECK-NEXT: i64.extend_i32_u $[[TMP3:[0-9]+]]=, $0{{$}}
 ; CHECK-NEXT: i64.const $[[TMP4:[0-9]+]]=, 1{{$}}

llvm/test/CodeGen/WebAssembly/add-prototypes-conflict.ll

 ; RUN: opt -S -wasm-add-missing-prototypes -o %t.ll %s 2>&1 | FileCheck %s -check-prefix=WARNING
 ; RUN: cat %t.ll | FileCheck %s
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; WARNING: warning: prototype-less function used with conflicting signatures: foo
 
 ; CHECK-LABEL: @call_with_conflicting_prototypes
 ; CHECK: %call1 = call i64 @foo(i32 42)
 ; CHECK: %call2 = call i64 bitcast (i64 (i32)* @foo to i64 (i32, i32)*)(i32 42, i32 43)
 define void @call_with_conflicting_prototypes() {

llvm/test/CodeGen/WebAssembly/add-prototypes.ll

 ; RUN: opt -S -wasm-add-missing-prototypes %s | FileCheck %s
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; CHECK: @foo_addr = global i64 (i32)* @foo, align 8
 @foo_addr = global i64 (i32)* bitcast (i64 (...)* @foo to i64 (i32)*), align 8
 
 ; CHECK: @foo_addr_i8 = global i8* bitcast (i64 (i32)* @foo to i8*), align 8
 @foo_addr_i8 = global i8* bitcast (i64 (...)* @foo to i8*), align 8
 

llvm/test/CodeGen/WebAssembly/address-offsets.ll

 ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -relocation-model=pic | FileCheck %s -check-prefixes=CHECK,PIC
 
 
 ; Test folding constant offsets and symbols into load and store addresses under
 ; a variety of circumstances.
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-emscripten"
 
 @g = external global [0 x i32], align 4
 
 ; CHECK-LABEL: load_test0:
 ; CHECK-NEXT: .functype load_test0 () -> (i32){{$}}
 ; PIC-NEXT:   global.get $push0=, g@GOT{{$}}
 ; PIC-NEXT:   i32.load  $push1=, 40($pop0){{$}}

llvm/test/CodeGen/WebAssembly/atomic-fence.ll

 ; RUN: llc < %s | FileCheck %s --check-prefix NOATOMIC
 ; RUN: llc < %s -asm-verbose=false -wasm-disable-explicit-locals -wasm-keep-registers -mattr=+atomics | FileCheck %s
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; A multithread fence is lowered to an atomic.fence instruction.
 ; CHECK-LABEL: multithread_fence:
 ; CHECK:  atomic.fence
 ; NOATOMIC-NOT: i32.atomic.rmw.or
 define void @multithread_fence() {
   fence seq_cst

llvm/test/CodeGen/WebAssembly/atomic-fence.mir

 # RUN: llc -mtriple=wasm32-unknown-unknown -run-pass wasm-reg-stackify -run-pass wasm-explicit-locals %s -o - | FileCheck %s
 
 # In the two tests below, without compiler_fence or atomic.fence in between,
 # memory.atomic.notify and i32.add will be reordered by register stackify pass
 # to meet 'call @foo''s requirements. But because we have fences between
 # memory.atomic.notify and i32.add, they cannot be reordered, and local.set and
 # local.get are inserted to save and load memory.atomic.notify's return value.
 
 --- |
-  target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
   target triple = "wasm32-unknown-unknown"
 
   declare void @foo(i32, i32)
   define void @compiler_fence_test(i32) {
     ret void
   }
   define void @atomic_fence_test(i32) {
     ret void

llvm/test/CodeGen/WebAssembly/atomic-mem-consistency.ll

 ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt
 ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=+atomics,+sign-ext | FileCheck %s
 
 ; Currently all wasm atomic memory access instructions are sequentially
 ; consistent, so even if LLVM IR specifies weaker orderings than that, we
 ; should upgrade them to sequential ordering and treat them in the same way.
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ;===----------------------------------------------------------------------------
 ; Atomic loads
 ;===----------------------------------------------------------------------------
 
 ; The 'release' and 'acq_rel' orderings are not valid on load instructions.
 

llvm/test/CodeGen/WebAssembly/atomic-pic.ll

 ; RUN: llc < %s -asm-verbose=false -relocation-model=pic -fast-isel -wasm-disable-explicit-locals -wasm-keep-registers -mattr=+atomics,+sign-ext | FileCheck %s
 ; RUN: llc < %s -asm-verbose=false -relocation-model=pic -fast-isel=false -wasm-disable-explicit-locals -wasm-keep-registers -mattr=+atomics,+sign-ext | FileCheck %s
 
 ; Test that atomic operations in PIC mode.  Specifically we verify
 ; that atomic operations on global address load addres via @GOT or
 ; @MBREL relocations.
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-emscripten"
 
 @external_global       = external        global i32
 @hidden_global         = external hidden global i32
 
 define i32 @rmw_add_external_global() {
 ; CHECK-LABEL: rmw_add_external_global:
 ; CHECK:         global.get $push[[L0:[0-9]+]]=, external_global@GOT{{$}}

llvm/test/CodeGen/WebAssembly/atomic-rmw.ll

 ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers
 ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=+atomics,+sign-ext | FileCheck %s
 
 ; Test atomic RMW (read-modify-write) instructions are assembled properly.
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ;===----------------------------------------------------------------------------
 ; Atomic read-modify-writes: 32-bit
 ;===----------------------------------------------------------------------------
 
 ; CHECK-LABEL: add_i32:
 ; CHECK-NEXT: .functype add_i32 (i32, i32) -> (i32){{$}}

llvm/test/CodeGen/WebAssembly/bulk-memory.ll

 ; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=+bulk-memory | FileCheck %s --check-prefixes CHECK,BULK-MEM
 ; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=-bulk-memory | FileCheck %s --check-prefixes CHECK,NO-BULK-MEM
 
 ; Test that basic bulk memory codegen works correctly
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 declare void @llvm.memcpy.p0i8.p0i8.i8(i8*, i8*, i8, i1)
 declare void @llvm.memcpy.p0i8.p0i8.i32(i8*, i8*, i32, i1)
 declare void @llvm.memcpy.p0i32.p0i32.i32(i32*, i32*, i32, i1)
 
 declare void @llvm.memmove.p0i8.p0i8.i8(i8*, i8*, i8, i1)
 declare void @llvm.memmove.p0i8.p0i8.i32(i8*, i8*, i32, i1)

llvm/test/CodeGen/WebAssembly/bulk-memory64.ll

 ; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=+bulk-memory | FileCheck %s --check-prefixes CHECK,BULK-MEM
 ; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=-bulk-memory | FileCheck %s --check-prefixes CHECK,NO-BULK-MEM
 
 ; Test that basic bulk memory codegen works correctly
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm64-unknown-unknown"
 
 declare void @llvm.memcpy.p0i8.p0i8.i8(i8*, i8*, i8, i1)
 declare void @llvm.memcpy.p0i8.p0i8.i64(i8*, i8*, i64, i1)
 declare void @llvm.memcpy.p0i32.p0i32.i64(i32*, i32*, i64, i1)
 
 declare void @llvm.memmove.p0i8.p0i8.i8(i8*, i8*, i8, i1)
 declare void @llvm.memmove.p0i8.p0i8.i64(i8*, i8*, i64, i1)

llvm/test/CodeGen/WebAssembly/byval.ll

 ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -verify-machineinstrs | FileCheck %s
 ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -verify-machineinstrs -fast-isel | FileCheck %s
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 %SmallStruct = type { i32 }
 %OddStruct = type { i32, i8, i32 }
 %AlignedStruct = type { double, double }
 %BigStruct = type { double, double, double, double, double, double, double, double, double, double, double, i8, i8, i8 }
 %EmptyStruct = type { }
 

llvm/test/CodeGen/WebAssembly/call-indirect.ll

 ; RUN: llc < %s -asm-verbose=false -O2 | FileCheck --check-prefix=CHECK %s
 ; RUN: llc < %s -asm-verbose=false -O2 --filetype=obj | obj2yaml | FileCheck --check-prefix=OBJ %s
 
 ; Test that compilation units with call_indirect but without any
 ; function pointer declarations still get a table.
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; CHECK-LABEL: call_indirect_void:
 ; CHECK-NEXT: .functype call_indirect_void (i32) -> ()
 ; CHECK-NEXT: local.get 0
 ; CHECK-NEXT: call_indirect () -> ()
 ; CHECK-NEXT: end_function
 define void @call_indirect_void(void ()* %callee) {

llvm/test/CodeGen/WebAssembly/call-pic.ll

 ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers -relocation-model=pic -fast-isel=1 | FileCheck %s
 ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers -relocation-model=pic -fast-isel=0 | FileCheck %s
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-emscripten"
 
 declare i32 @foo()
 declare i32 @bar()
 declare hidden i32 @hidden_function()
 
 @indirect_func = hidden global i32 ()* @foo
 @alias_func = hidden alias i32 (), i32 ()* @local_function

llvm/test/CodeGen/WebAssembly/call.ll

 ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers -mattr=+sign-ext,+simd128 | FileCheck --check-prefixes=CHECK,NO-TAIL %s
 ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers -fast-isel -fast-isel-abort=1 -mattr=+sign-ext,+simd128 | FileCheck --check-prefixes=CHECK,NO-TAIL %s
 ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers -mattr=+sign-ext,+simd128,+tail-call | FileCheck --check-prefixes=CHECK,SLOW-TAIL %s
 ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers -fast-isel -fast-isel-abort=1 -mattr=+sign-ext,+simd128,+tail-call | FileCheck --check-prefixes=CHECK,FAST-TAIL %s
 
 ; Test that basic call operations assemble as expected.
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 declare i32 @i32_nullary()
 declare i32 @i32_unary(i32)
 declare i32 @i32_binary(i32, i32)
 declare i64 @i64_nullary()
 declare float @float_nullary()
 declare double @double_nullary()

llvm/test/CodeGen/WebAssembly/cfg-stackify-eh.ll

 ; REQUIRES: asserts
 ; RUN: llc < %s -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -disable-block-placement -verify-machineinstrs -fast-isel=false -machine-sink-split-probability-threshold=0 -cgp-freq-ratio-to-skip-merge=1000 -exception-model=wasm -mattr=+exception-handling | FileCheck %s
 ; RUN: llc < %s -disable-wasm-fallthrough-return-opt -disable-block-placement -verify-machineinstrs -fast-isel=false -machine-sink-split-probability-threshold=0 -cgp-freq-ratio-to-skip-merge=1000 -exception-model=wasm -mattr=+exception-handling
 ; RUN: llc < %s -O0 -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -verify-machineinstrs -exception-model=wasm -mattr=+exception-handling | FileCheck %s --check-prefix=NOOPT
 ; RUN: llc < %s -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -disable-block-placement -verify-machineinstrs -fast-isel=false -machine-sink-split-probability-threshold=0 -cgp-freq-ratio-to-skip-merge=1000 -exception-model=wasm -mattr=+exception-handling -wasm-disable-ehpad-sort -stats 2>&1 | FileCheck %s --check-prefix=NOSORT
 ; RUN: llc < %s -disable-wasm-fallthrough-return-opt -disable-block-placement -verify-machineinstrs -fast-isel=false -machine-sink-split-probability-threshold=0 -cgp-freq-ratio-to-skip-merge=1000 -exception-model=wasm -mattr=+exception-handling -wasm-disable-ehpad-sort | FileCheck %s --check-prefix=NOSORT-LOCALS
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 @_ZTIi = external constant i8*
 @_ZTId = external constant i8*
 
 %class.Object = type { i8 }
 %class.MyClass = type { i32 }
 

llvm/test/CodeGen/WebAssembly/cfg-stackify-eh.mir

 # RUN: llc -mtriple=wasm32-unknown-unknown -exception-model=wasm -mattr=+exception-handling -run-pass wasm-cfg-stackify %s -o - | FileCheck %s
 
 --- |
-  target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
   target triple = "wasm32-unknown-unknown"
 
   declare i32 @__gxx_wasm_personality_v0(...)
   declare void @foo()
   define void @rethrow_arg_test() personality i8* bitcast (i32 (...)* @__gxx_wasm_personality_v0 to i8*) {
     ret void
   }
   define i32 @fix_end_function_test() personality i8* bitcast (i32 (...)* @__gxx_wasm_personality_v0 to i8*) {

llvm/test/CodeGen/WebAssembly/cfg-stackify.ll

 ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -disable-block-placement -verify-machineinstrs -fast-isel=false -machine-sink-split-probability-threshold=0 -cgp-freq-ratio-to-skip-merge=1000 | FileCheck %s
 
 ; Test the CFG stackifier pass.
 
 ; Explicitly disable fast-isel, since it gets implicitly enabled in the
 ; optnone test.
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 declare void @something()
 
 ; Test that loops are made contiguous, even in the presence of split backedges.
 
 ; CHECK-LABEL: test0:
 ; CHECK: loop

llvm/test/CodeGen/WebAssembly/cfi.ll

 ; RUN: opt -S -lowertypetests < %s | llc -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers | FileCheck %s
 
 ; Tests that we correctly assign indexes for control flow integrity.
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 @0 = private unnamed_addr constant [2 x void (...)*] [void (...)* bitcast (void ()* @f to void (...)*), void (...)* bitcast (void ()* @g to void (...)*)], align 16
 
 ; CHECK-LABEL: h:
 ; CHECK-NOT: .indidx
 define void @h() !type !0 {
   ret void

llvm/test/CodeGen/WebAssembly/clear-cache.ll

 ; RUN: not --crash llc < %s -asm-verbose=false 2>&1 | FileCheck %s
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; CHECK: LLVM ERROR: llvm.clear_cache is not supported on wasm
 define void @clear_cache(i8* %begin, i8* %end) {
 entry:
   call void @llvm.clear_cache(i8* %begin, i8* %end)
   ret void
 }
 
 declare void @llvm.clear_cache(i8*, i8*)

llvm/test/CodeGen/WebAssembly/comparisons-f32.ll

 ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers | FileCheck %s
 
 ; Test that basic 32-bit floating-point comparison operations assemble as
 ; expected.
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; CHECK-LABEL: ord_f32:
 ; CHECK-NEXT: .functype ord_f32 (f32, f32) -> (i32){{$}}
 ; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
 ; CHECK-NEXT: local.get $push[[L1:[0-9]+]]=, 0{{$}}
 ; CHECK-NEXT: f32.eq $push[[NUM0:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
 ; CHECK-NEXT: local.get $push[[L2:[0-9]+]]=, 1{{$}}

llvm/test/CodeGen/WebAssembly/comparisons-f64.ll

 ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers | FileCheck %s
 
 ; Test that basic 64-bit floating-point comparison operations assemble as
 ; expected.
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; CHECK-LABEL: ord_f64:
 ; CHECK-NEXT: .functype ord_f64 (f64, f64) -> (i32){{$}}
 ; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
 ; CHECK-NEXT: local.get $push[[L1:[0-9]+]]=, 0{{$}}
 ; CHECK-NEXT: f64.eq $push[[NUM0:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
 ; CHECK-NEXT: local.get $push[[L2:[0-9]+]]=, 1{{$}}

llvm/test/CodeGen/WebAssembly/comparisons-i32.ll

 ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers | FileCheck %s --check-prefixes CHECK,SLOW
 ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefixes CHECK,FAST
 
 ; Test that basic 32-bit integer comparison operations assemble as expected.
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; CHECK-LABEL: eq_i32:
 ; CHECK-NEXT: .functype eq_i32 (i32, i32) -> (i32){{$}}
 ; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
 ; CHECK-NEXT: local.get $push[[L1:[0-9]+]]=, 1{{$}}
 ; CHECK-NEXT: i32.eq $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
 ; SLOW-NEXT: return $pop[[L2]]{{$}}

llvm/test/CodeGen/WebAssembly/comparisons-i64.ll

 ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers | FileCheck %s --check-prefixes CHECK,SLOW
 ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefixes CHECK,FAST
 
 ; Test that basic 64-bit integer comparison operations assemble as expected.
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; CHECK-LABEL: eq_i64:
 ; CHECK-NEXT: .functype eq_i64 (i64, i64) -> (i32){{$}}
 ; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
 ; CHECK-NEXT: local.get $push[[L1:[0-9]+]]=, 1{{$}}
 ; CHECK-NEXT: i64.eq $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
 ; SLOW-NEXT:  return $pop[[L2]]{{$}}

llvm/test/CodeGen/WebAssembly/conv-trap.ll

 ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=-nontrapping-fptoint | FileCheck %s
 
 ; Test that basic conversion operations assemble as expected using
 ; the trapping opcodes and explicit code to suppress the trapping.
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; CHECK-LABEL: i32_trunc_s_f32:
 ; CHECK-NEXT: .functype i32_trunc_s_f32 (f32) -> (i32){{$}}
 ; CHECK-NEXT: block
 ; CHECK-NEXT: f32.abs $push[[ABS:[0-9]+]]=, $0{{$}}
 ; CHECK-NEXT: f32.const $push[[LIMIT:[0-9]+]]=, 0x1p31{{$}}
 ; CHECK-NEXT: f32.lt $push[[LT:[0-9]+]]=, $pop[[ABS]], $pop[[LIMIT]]{{$}}

llvm/test/CodeGen/WebAssembly/conv.ll

 ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=+nontrapping-fptoint | FileCheck %s
 
 ; Test that basic conversion operations assemble as expected.
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; CHECK-LABEL: i32_wrap_i64:
 ; CHECK-NEXT: .functype i32_wrap_i64 (i64) -> (i32){{$}}
 ; CHECK-NEXT: i32.wrap_i64 $push[[NUM:[0-9]+]]=, $0{{$}}
 ; CHECK-NEXT: return $pop[[NUM]]{{$}}
 define i32 @i32_wrap_i64(i64 %x) {
   %a = trunc i64 %x to i32

llvm/test/CodeGen/WebAssembly/copysign-casts.ll

 ; RUN: llc < %s -asm-verbose=false -wasm-keep-registers | FileCheck %s
 
 ; DAGCombiner oddly folds casts into the rhs of copysign. Test that they get
 ; unfolded.
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 declare double @copysign(double, double) nounwind readnone
 declare float @copysignf(float, float) nounwind readnone
 
 ; CHECK-LABEL: fold_promote:
 ; CHECK: f64.promote_f32 $push0=, $pop{{[0-9]+}}{{$}}
 ; CHECK: f64.copysign    $push1=, $pop{{[0-9]+}}, $pop0{{$}}

llvm/test/CodeGen/WebAssembly/custom-sections.ll

 ; RUN: llc < %s -asm-verbose=false | FileCheck %s
 
 ; Test the mechanism for defining user custom sections.
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 !0 = !{ !"red", !"foo" }
 !1 = !{ !"green", !"bar" }
 !2 = !{ !"green", !"qux" }
 !wasm.custom_sections = !{ !0, !1, !2 }
 
 !llvm.ident = !{!3}

llvm/test/CodeGen/WebAssembly/dbgvalue.ll

 ; RUN: llc < %s -O0 -verify-machineinstrs | FileCheck %s
 
 ; CHECK: %bb.0
 ; CHECK: #DEBUG_VALUE: usage:self <- !target-index(0,0)
 ; CHECK: %bb.1
 ; CHECK: DW_TAG_variable
 source_filename = "test/CodeGen/WebAssembly/dbgvalue.ll"
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 @key = external local_unnamed_addr global [15 x i8], align 1
 @.str = external unnamed_addr constant [33 x i8], align 1
 
 define internal i32 @0(i8*) local_unnamed_addr !dbg !15 !type !23 {
   tail call void @llvm.dbg.value(metadata i8* %0, i64 0, metadata !22, metadata !24), !dbg !25
   %2 = tail call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i32 0, i32 0), i8* %0), !dbg !26

 !20 = !DIBasicType(name: "char", size: 8, align: 8, encoding: DW_ATE_signed_char)
 !21 = !{!22}
 !22 = !DILocalVariable(name: "self", arg: 1, scope: !15, file: !1, line: 15, type: !19)
 !23 = !{i64 0, !"_ZTSFiPcE"}
 !24 = !DIExpression()
 !25 = !DILocation(line: 15, column: 17, scope: !15)
 !26 = !DILocation(line: 16, column: 3, scope: !15)
 !27 = !DILocation(line: 17, column: 3, scope: !15)
-

llvm/test/CodeGen/WebAssembly/dead-vreg.ll

 ; RUN: llc < %s -asm-verbose=false -verify-machineinstrs | FileCheck %s
 
 ; Check that unused vregs aren't assigned registers.
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 define void @foo(i32* nocapture %a, i32 %w, i32 %h) {
 ; CHECK-LABEL: foo:
 ; CHECK-NEXT: .functype foo (i32, i32, i32) -> (){{$}}
 ; CHECK-NEXT: .local i32, i32, i32, i32, i32, i32{{$}}
 entry:
   %cmp.19 = icmp sgt i32 %h, 0

llvm/test/CodeGen/WebAssembly/debugtest-opt.ll

 ; CHECK-NEXT:                DW_AT_high_pc
 ;; Check that we fall back to the default frame base (the global)
 ; CHECK-NEXT:                DW_AT_frame_base (DW_OP_WASM_location_int 0x3 0x0, DW_OP_stack_value)
 
 ; TODO: Find a more-reduced test case for The fix in WebAssemblyRegColoring
 
 ; ModuleID = 'debugtest-opt.c'
 source_filename = "debugtest-opt.c"
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32"
 
 @globl = hidden local_unnamed_addr global i32* null, align 4, !dbg !0
 
 ; Function Attrs: nounwind writeonly
 define hidden void @baz(i32 %arg) local_unnamed_addr #0 !dbg !12 {
 entry:
   %locl = alloca i32, align 4

llvm/test/CodeGen/WebAssembly/debugtrap.ll

 ; RUN: llc < %s -asm-verbose=false -verify-machineinstrs | FileCheck %s
 
 ; Test lowering of __builtin_debugtrap in cases where lowering it via
 ; the normal UNREACHABLE instruction would yield invalid
 ; MachineFunctions.
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32"
 
 declare void @llvm.debugtrap()
 
 ; CHECK-LABEL: foo:
 ; CHECK-NEXT: .functype       foo (i32) -> ()
 ; CHECK-NEXT: .LBB0_1:
 ; CHECK-NEXT: loop

llvm/test/CodeGen/WebAssembly/divrem-constant.ll

 ; RUN: llc < %s -asm-verbose=false -wasm-keep-registers | FileCheck %s
 
 ; Test that integer div and rem by constant are optimized appropriately.
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; CHECK-LABEL: test_udiv_2:
 ; CHECK: i32.shr_u
 define i32 @test_udiv_2(i32 %x) {
     %t = udiv i32 %x, 2
     ret i32 %t
 }

llvm/test/CodeGen/WebAssembly/eh-lsda.ll

 ; RUN: llc < %s -disable-wasm-fallthrough-return-opt -wasm-keep-registers -exception-model=wasm -mattr=+exception-handling | FileCheck -allow-deprecated-dag-overlap %s
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 @_ZTIi = external constant i8*
 @_ZTIf = external constant i8*
 @_ZTId = external constant i8*
 
 ; Single catch (...) does not need an exception table.
 ;

llvm/test/CodeGen/WebAssembly/exception.ll

 ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -exception-model=wasm -mattr=+exception-handling -verify-machineinstrs | FileCheck --implicit-check-not=ehgcr -allow-deprecated-dag-overlap %s
 ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -exception-model=wasm -mattr=+exception-handling -verify-machineinstrs -O0
 ; RUN: llc < %s -disable-wasm-fallthrough-return-opt -wasm-keep-registers -exception-model=wasm -mattr=+exception-handling
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 %struct.Temp = type { i8 }
 
 @_ZTIi = external dso_local constant i8*
 
 ; CHECK: .tagtype  __cpp_exception i32
 

llvm/test/CodeGen/WebAssembly/exception.mir

 # RUN: llc -mtriple=wasm32-unknown-unknown -exception-model=wasm -mattr=+exception-handling -run-pass wasm-late-eh-prepare -run-pass wasm-cfg-stackify %s -o - | FileCheck %s
 
 --- |
-  target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
   target triple = "wasm32-unknown-unknown"
 
   declare i32 @__gxx_wasm_personality_v0(...)
   declare void @foo()
   define void @eh_label_test() personality i8* bitcast (i32 (...)* @__gxx_wasm_personality_v0 to i8*) {
     ret void
   }
   define void @unreachable_ehpad_test() personality i8* bitcast (i32 (...)* @__gxx_wasm_personality_v0 to i8*) {

llvm/test/CodeGen/WebAssembly/export-name.ll

 ; RUN: llc < %s -asm-verbose=false -wasm-keep-registers | FileCheck %s
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 define void @test() #0 {
   ret void
 }
 
 declare void @test2() #1
 
 
 attributes #0 = { "wasm-export-name"="foo" }
 attributes #1 = { "wasm-export-name"="bar" }
 
 ; CHECK: .export_name test, foo
 ; CHECK: .export_name test2, bar

llvm/test/CodeGen/WebAssembly/f16.ll

 ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers | FileCheck %s
 ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers -fast-isel | FileCheck %s
 
 ; Test that f16 is expanded.
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; CHECK-LABEL: demote.f32:
 ; CHECK-NEXT: .functype demote.f32 (f32) -> (f32){{$}}
 ; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
 ; CHECK-NEXT: call  $push[[L1:[0-9]+]]=, __truncsfhf2, $pop[[L0]]{{$}}
 ; CHECK-NEXT: call  $push[[L2:[0-9]+]]=, __extendhfsf2, $pop[[L1]]{{$}}
 ; CHECK-NEXT: return    $pop[[L2]]{{$}}

llvm/test/CodeGen/WebAssembly/f32.ll

 ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers | FileCheck %s
 
 ; Test that basic 32-bit floating-point operations assemble as expected.
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 declare float @llvm.fabs.f32(float)
 declare float @llvm.copysign.f32(float, float)
 declare float @llvm.sqrt.f32(float)
 declare float @llvm.ceil.f32(float)
 declare float @llvm.floor.f32(float)
 declare float @llvm.trunc.f32(float)

llvm/test/CodeGen/WebAssembly/f64.ll

 ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers | FileCheck %s
 
 ; Test that basic 64-bit floating-point operations assemble as expected.
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 declare double @llvm.fabs.f64(double)
 declare double @llvm.copysign.f64(double, double)
 declare double @llvm.sqrt.f64(double)
 declare double @llvm.ceil.f64(double)
 declare double @llvm.floor.f64(double)
 declare double @llvm.trunc.f64(double)

llvm/test/CodeGen/WebAssembly/fast-isel-br-i1.ll

 ; RUN: llc < %s -fast-isel -asm-verbose=false -wasm-keep-registers | FileCheck %s
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; Fast-isel uses a 32-bit xor with -1 to negate i1 values, because it doesn't
 ; make any guarantees about the contents of the high bits of a register holding
 ; an i1 value. Test that when we do a `br_if` or `br_unless` with what what an
 ; i1 value in LLVM IR, that we only test the low bit.
 
 ; CHECK: i32.xor

llvm/test/CodeGen/WebAssembly/fast-isel-call-indirect64.ll

 ; RUN: llc < %s -fast-isel --mtriple=wasm64 -asm-verbose=false -wasm-keep-registers | FileCheck %s
 
-target datalayout = "e-m:e-p:64:64-i64:64-n32:64-S128"
 target triple = "wasm64"
 
 ; Ensure fast isel also lowers function pointers to 32-bit.
 
 ; CHECK:       local.get $push[[L0:[0-9]+]]=, 0
 ; CHECK-NEXT:  i32.wrap_i64 $push[[L1:[0-9]+]]=, $pop[[L0]]
 ; CHECK-NEXT:  call_indirect $pop[[L1]]
 
 define hidden void @f(void ()* %g) {
   call void %g()
   ret void
 }

llvm/test/CodeGen/WebAssembly/fast-isel-i24.ll

 ; RUN: llc < %s -O0 -wasm-keep-registers
 ; PR36564
 ; PR37546
 
 ; Test that fast-isel properly copes with i24 arguments and return types.
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; CHECK-LABEL: add:
 ; CHECK-NEXT: .functype add (i32, i32) -> (i32){{$}}
 ; CHECK-NEXT: local.get $push2=, 0{{$}}
 ; CHECK-NEXT: local.get $push1=, 1{{$}}
 ; CHECK-NEXT: i32.add   $push0=, $pop2, $pop1{{$}}
 ; CHECK-NEXT: end_function

llvm/test/CodeGen/WebAssembly/fast-isel-i256.ll

 ; RUN: llc < %s -O0 -wasm-keep-registers
 ; PR36564
 ; PR37546
 
 ; Test that fast-isel properly copes with i256 arguments and return types.
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; CHECK-LABEL: add:
 ; CHECK-NEXT: .functype add (i32, i64, i64, i64, i64, i64, i64, i64, i64) -> (){{$}}
 ; CHECK-NOT:  .result
 ; CHECK: end_function
 define i256 @add(i256 %x, i256 %y) {
     %z = add i256 %x, %y

llvm/test/CodeGen/WebAssembly/fast-isel-noreg.ll

 ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers -verify-machineinstrs | FileCheck %s
 ; RUN: llc < %s -asm-verbose=false -wasm-keep-registers -fast-isel -verify-machineinstrs | FileCheck %s
 
 ; Test that FastISel does not generate instructions with NoReg
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; CHECK: i32.const $push0=, 0
 define hidden i32 @a() #0 {
 entry:
   ret i32 zext (i1 icmp eq (void (...)* inttoptr (i32 10 to void (...)*), void (...)* null) to i32)
 }
 

llvm/test/CodeGen/WebAssembly/fast-isel-pr47040.ll

 ; RUN: llc < %s -fast-isel -fast-isel-abort=1 -verify-machineinstrs
 
 ; Regression test for PR47040, in which an assertion was improperly
 ; triggered during FastISel's address computation. The issue was that
 ; an `Address` set to be relative to FrameIndex zero was incorrectly
 ; considered to have an unset base. When the left hand side of an add
 ; set the Address to have a FrameIndex base of 0, the right side would
 ; not detect that the Address base had already been set and could try
 ; to set the Address to be relative to a register instead, triggering
 ; an assertion.
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 define i32 @foo() {
   %stack_addr = alloca i32
   %stack_i = ptrtoint i32* %stack_addr to i32
   %added = add i32 %stack_i, undef
   %added_addr = inttoptr i32 %added to i32*
   %ret = load i32, i32* %added_addr
   ret i32 %ret
 }

llvm/test/CodeGen/WebAssembly/fast-isel.ll

 ; RUN: llc < %s -asm-verbose=false \
 ; RUN:   -fast-isel -fast-isel-abort=1 -verify-machineinstrs \
 ; RUN:   -wasm-disable-explicit-locals -wasm-keep-registers \
 ; RUN:   | FileCheck %s
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; This tests very minimal fast-isel functionality.
 
 ; CHECK-LABEL: immediate_f32:
 ; CHECK: f32.const $push{{[0-9]+}}=, 0x1.4p1{{$}}
 define float @immediate_f32() {
   ret float 2.5

llvm/test/CodeGen/WebAssembly/frem.ll

 ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers | FileCheck %s
 
 ; Test that the frem instruction works.
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; CHECK-LABEL: frem32:
 ; CHECK-NEXT: .functype frem32 (f32, f32) -> (f32){{$}}
 ; CHECK-NEXT: {{^}} call $push0=, fmodf, $0, $1{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 define float @frem32(float %x, float %y) {
   %a = frem float %x, %y

llvm/test/CodeGen/WebAssembly/func.ll

 ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers | FileCheck %s
 
 ; Test that basic functions assemble as expected.
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; CHECK-LABEL: f0:
 ; CHECK: return{{$}}
 ; CHECK: end_function{{$}}
 ; CHECK: .size f0,
 define void @f0() {
   ret void

llvm/test/CodeGen/WebAssembly/function-bitcasts-varargs.ll

 ; RUN: llc < %s -asm-verbose=false -wasm-keep-registers | FileCheck %s
 
 ; Test that function pointer casts casting away varargs are replaced with
 ; wrappers.
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 define void @callWithArgs() {
 entry:
   call void bitcast (void (...)* @underspecified to void (i32, i32)*)(i32 0, i32 1)
   call void(...) bitcast (void (i32, i32)* @specified to void (...)*)(i32 0, i32 1)
   ret void
 }

llvm/test/CodeGen/WebAssembly/function-bitcasts.ll

 ; RUN: llc < %s -asm-verbose=false -wasm-disable-explicit-locals -wasm-keep-registers -enable-emscripten-cxx-exceptions | FileCheck %s
 
 ; Test that function pointer casts are replaced with wrappers.
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 define void @has_i32_arg(i32) {
 entry:
   ret void
 }
 
 declare void @has_struct_arg({i32})

llvm/test/CodeGen/WebAssembly/function-info.mir

 # RUN: llc -mtriple=wasm32-unknown-unknown -exception-model=wasm -mattr=+exception-handling,+multivalue,+simd128 -run-pass wasm-cfg-sort -run-pass wasm-cfg-stackify %s -o - | FileCheck %s
 
 --- |
-  target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
   target triple = "wasm32-unknown-unknown"
 
   declare i32 @__gxx_wasm_personality_v0(...)
   declare void @foo()
   define void @function_property_test() {
     ret void
   }
   define void @wasm_eh_info_test() personality i8* bitcast (i32 (...)* @__gxx_wasm_personality_v0 to i8*) {

llvm/test/CodeGen/WebAssembly/function-pointer64.ll

 ; RUN: llc < %s -asm-verbose=false -O2 | FileCheck %s
 ; RUN: llc < %s -asm-verbose=false -mattr=+reference-types -O2 | FileCheck --check-prefix=REF %s
 ; RUN: llc < %s -asm-verbose=false -O2 --filetype=obj | obj2yaml | FileCheck --check-prefix=YAML %s
 
 ; This tests pointer features that may codegen differently in wasm64.
 
-target datalayout = "e-m:e-p:64:64-i64:64-n32:64-S128"
 target triple = "wasm64-unknown-unknown"
 
 define void @bar(i32 %n) {
 entry:
   ret void
 }
 
 define void @foo(void (i32)* %fp) {

llvm/test/CodeGen/WebAssembly/global.ll

 ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=-atomics | FileCheck %s
 ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=+atomics | FileCheck %s
 
 ; Test that globals assemble as expected.
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; CHECK-NOT: llvm.used
 ; CHECK-NOT: llvm.metadata
 @llvm.used = appending global [1 x i32*] [i32* @g], section "llvm.metadata"
 
 ; CHECK: foo:
 ; CHECK: i32.const $push0=, 0{{$}}

llvm/test/CodeGen/WebAssembly/global_dtors.ll

 ; RUN: llc < %s
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; Check that we do not crash when attempting to lower away
 ; global_dtors without a definition.
 
 @llvm.global_dtors = external global [2 x { i32, void ()*, i8* }]

llvm/test/CodeGen/WebAssembly/globl.ll

 ; RUN: llc < %s -asm-verbose=false | FileCheck %s
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; CHECK: .globl foo
 ; CHECK: .type foo,@function
 ; CHECK-LABEL: foo:
 ; CHECK: .size foo,
 define i32* @foo() {
   ret i32* @bar
 }
 
 ; CHECK: .type bar,@object
 ; CHECK: .globl bar
 ; CHECK: .size bar, 4
 @bar = global i32 2

llvm/test/CodeGen/WebAssembly/i128-returned.ll

 ; RUN: llc < %s -asm-verbose=false | FileCheck %s
 
 ; Test that the "returned" attribute works with i128 types.
 ; PR36128
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 declare i128 @bar(i128 returned)
 
 define i128 @foo(i128) {
   %r = tail call i128 @bar(i128 %0)
   ret i128 %r
 }
 
 ; CHECK: .functype bar (i32, i64, i64) -> ()
 
 ; CHECK-LABEL: foo:
 ; CHECK-NEXT: .functype foo (i32, i64, i64) -> ()
-

llvm/test/CodeGen/WebAssembly/i128.ll

 ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers | FileCheck %s
 
 ; Test that basic 128-bit integer operations assemble as expected.
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 declare i128 @llvm.ctlz.i128(i128, i1)
 declare i128 @llvm.cttz.i128(i128, i1)
 declare i128 @llvm.ctpop.i128(i128)
 
 ; CHECK-LABEL: add128:
 ; CHECK-NEXT: .functype add128 (i32, i64, i64, i64, i64) -> (){{$}}

llvm/test/CodeGen/WebAssembly/i32-load-store-alignment.ll

 ; RUN: llc < %s -mattr=+atomics -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers | FileCheck %s
 
 ; Test loads and stores with custom alignment values.
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ;===----------------------------------------------------------------------------
 ; Loads
 ;===----------------------------------------------------------------------------
 
 ; CHECK-LABEL: ldi32_a1:
 ; CHECK-NEXT: .functype ldi32_a1 (i32) -> (i32){{$}}

llvm/test/CodeGen/WebAssembly/i32.ll

 ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers | FileCheck %s
 
 ; Test that basic 32-bit integer operations assemble as expected.
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 declare i32 @llvm.ctlz.i32(i32, i1)
 declare i32 @llvm.cttz.i32(i32, i1)
 declare i32 @llvm.ctpop.i32(i32)
 
 ; CHECK-LABEL: add32:
 ; CHECK-NEXT: .functype add32 (i32, i32) -> (i32){{$}}

llvm/test/CodeGen/WebAssembly/i64-load-store-alignment.ll

 ; RUN: llc < %s -mattr=+atomics -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers | FileCheck %s
 
 ; Test loads and stores with custom alignment values.
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ;===----------------------------------------------------------------------------
 ; Loads
 ;===----------------------------------------------------------------------------
 
 ; CHECK-LABEL: ldi64_a1:
 ; CHECK-NEXT: .functype ldi64_a1 (i32) -> (i64){{$}}

llvm/test/CodeGen/WebAssembly/i64.ll

 ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers | FileCheck %s
 
 ; Test that basic 64-bit integer operations assemble as expected.
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 declare i64 @llvm.ctlz.i64(i64, i1)
 declare i64 @llvm.cttz.i64(i64, i1)
 declare i64 @llvm.ctpop.i64(i64)
 
 ; CHECK-LABEL: add64:
 ; CHECK-NEXT: .functype add64 (i64, i64) -> (i64){{$}}

llvm/test/CodeGen/WebAssembly/ident.ll

 ; RUN: llc < %s -asm-verbose=false -wasm-keep-registers | FileCheck %s
 
 ; Test llvm.ident.
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; CHECK: .ident "hello world"
 
 !llvm.ident = !{!0}
 
 !0 = !{!"hello world"}

llvm/test/CodeGen/WebAssembly/immediates.ll

 ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers | FileCheck %s
 
 ; Usually MIPS hosts uses a legacy (non IEEE 754-2008) encoding for NaNs.
 ; Tests like `nan_f32` failed in attempt to compare hard-coded IEEE 754-2008
 ; NaN value and a legacy NaN value provided by a system.
 ; XFAIL: mips-, mipsel-, mips64-, mips64el-
 
 ; Test that basic immediates assemble as expected.
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; CHECK-LABEL: zero_i32:
 ; CHECK-NEXT: .functype zero_i32 () -> (i32){{$}}
 ; CHECK-NEXT: i32.const $push[[NUM:[0-9]+]]=, 0{{$}}
 ; CHECK-NEXT: return $pop[[NUM]]{{$}}
 define i32 @zero_i32() {
   ret i32 0

llvm/test/CodeGen/WebAssembly/implicit-def.ll

 ; RUN: llc -o - %s -asm-verbose=false -wasm-keep-registers -disable-wasm-fallthrough-return-opt -mattr=+simd128 | FileCheck %s
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; Test that stackified IMPLICIT_DEF instructions are converted into
 ; CONST_XXX instructions to provide an explicit push.
 
 ; CHECK-LABEL: implicit_def_i32:
 ; CHECK:      i32.const $push{{[0-9]+}}=, 0{{$}}
 ; CHECK:      i32.const $push{{[0-9]+}}=, 0{{$}}

llvm/test/CodeGen/WebAssembly/import-module.ll

 ; RUN: llc < %s -asm-verbose=false -wasm-keep-registers | FileCheck %s
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 define void @test() {
   call void @foo()
   call void @plain()
   ret void
 }
 

llvm/test/CodeGen/WebAssembly/indirect-import.ll

 ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers -verify-machineinstrs | FileCheck %s
 ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers -verify-machineinstrs -fast-isel | FileCheck %s
 
 ; ModuleID = 'test/dot_s/indirect-import.c'
 source_filename = "test/dot_s/indirect-import.c"
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32"
 
 ; CHECK: .functype extern_fd (f64) -> (f32)
 ; CHECK: .functype extern_vj (i64) -> ()
 ; CHECK: .functype extern_v () -> ()
 ; CHECK: .functype extern_ijidf  (i64, i32, f64, f32) -> (i32)
 ; CHECK: .functype extern_struct (i32) -> ()
 ; CHECK: .functype extern_sret (i32) -> ()

 declare void @extern_struct(%struct.big* byval(%struct.big) align 8) #1
 
 declare void @extern_sret(%struct.big* sret(%struct.big)) #1
 
 declare i128 @extern_i128ret(i64) #1
 
 attributes #0 = { nounwind "disable-tail-calls"="false" "less-precise-fpmad"="false" "frame-pointer"="none" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="generic" "unsafe-fp-math"="false" "use-soft-float"="false" }
 attributes #1 = { "disable-tail-calls"="false" "less-precise-fpmad"="false" "frame-pointer"="none" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="generic" "unsafe-fp-math"="false" "use-soft-float"="false" }
-
-

llvm/test/CodeGen/WebAssembly/inline-asm-m.ll

 ; RUN: not llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -no-integrated-as
 
 ; Test basic inline assembly "m" operands, which are unsupported. Pass
 ; -no-integrated-as since these aren't actually valid assembly syntax.
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 define void @bar(i32* %r, i32* %s) {
 entry:
   tail call void asm sideeffect "# $0 = bbb($1)", "=*m,*m"(i32* %s, i32* %r) #0, !srcloc !1
   ret void
 }

llvm/test/CodeGen/WebAssembly/inline-asm-roundtrip.ll

 ;        "\tlocal.get\t%1\n"
 ;        "\ti32.add\n"
 ;        "\tlocal.set\t%0"
 ;        : "=r" (dst)
 ;        : "r" (src));
 ;   return dst != 3;
 ; }
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; CHECK-LABEL: main:
 ; CHECK-NEXT: .functype main (i32, i32) -> (i32)
 ; CHECK-NEXT: .local    i32
 ; CHECK-NEXT: i32.const 1
 ; CHECK-NEXT: local.set [[SRC:[0-9]+]]
 ; CHECK-NEXT: i32.const 2
 ; CHECK-NEXT: local.get [[SRC]]
 ; CHECK-NEXT: i32.add
 ; CHECK-NEXT: local.set [[DST:[0-9]+]]
 ; CHECK-NEXT: local.get [[DST]]
 ; CHECK-NEXT: i32.const 3
 ; CHECK-NEXT: i32.ne
 
 define i32 @main(i32 %argc, i8** nocapture readnone %argv) #0 {
 entry:
   %0 = tail call i32 asm "i32.const\092\0A\09local.get\09$1\0A\09i32.add\0A\09local.set\09$0", "=r,r"(i32 1) #1
   %cmp = icmp ne i32 %0, 3
   %conv = zext i1 %cmp to i32
   ret i32 %conv
 }
-

llvm/test/CodeGen/WebAssembly/inline-asm.ll

 ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers -no-integrated-as -verify-machineinstrs | FileCheck %s
 
 ; Test basic inline assembly. Pass -no-integrated-as since these aren't
 ; actually valid assembly syntax.
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; CHECK-LABEL: foo:
 ; CHECK-NEXT: .functype foo (i32) -> (i32){{$}}
 ; CHECK-NEXT: #APP{{$}}
 ; CHECK-NEXT: # 0 = aaa(0){{$}}
 ; CHECK-NEXT: #NO_APP{{$}}
 ; CHECK-NEXT: local.get $push0=, 0{{$}}

llvm/test/CodeGen/WebAssembly/irreducible-cfg-exceptions.ll

 ; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-block-placement -wasm-disable-explicit-locals -wasm-keep-registers -enable-emscripten-cxx-exceptions | FileCheck %s
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 declare i32 @__gxx_personality_v0(...)
 
 ; Check an interesting case of complex control flow due to exceptions CFG rewriting.
 ; There should *not* be any irreducible control flow here.
 
 ; CHECK-LABEL: crashy:

llvm/test/CodeGen/WebAssembly/irreducible-cfg.ll

 ; RUN: llc < %s -O0 -asm-verbose=false -verify-machineinstrs -disable-block-placement -wasm-disable-explicit-locals -wasm-keep-registers | FileCheck %s
 
 ; Test irreducible CFG handling.
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; A simple loop with two entries.
 
 ; CHECK-LABEL: test0:
 ; CHECK: f64.load
 ; CHECK: i32.const $[[REG:[^,]+]]=
 ; CHECK: br_table  $[[REG]],

llvm/test/CodeGen/WebAssembly/irreducible-cfg.mir

 # RUN: llc -mtriple=wasm32-unknown-unknown -run-pass wasm-fix-irreducible-control-flow %s -o - | FileCheck %s
 
 # This tests if we correctly create at most 2 routing blocks per entry block,
 # and also whether those routing blocks are generated in the correct place. If
 # one of the predecessor is the layout predecessor of an entry, a routing block
 # for the entry should be generated right after the layout predecessor.
 
 --- |
-  target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
   target triple = "wasm32-unknown-unknown"
 
   define void @test0() {
   pred0:
     ret void
   pred1:
     ret void
   entry0:

llvm/test/CodeGen/WebAssembly/legalize.ll

 ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers | FileCheck %s
 
 ; Test various types and operators that need to be legalized.
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; CHECK-LABEL: shl_i3:
 ; CHECK: i32.const   $push0=, 7{{$}}
 ; CHECK: i32.and     $push1=, $1, $pop0{{$}}
 ; CHECK: i32.shl     $push2=, $0, $pop1{{$}}
 define i3 @shl_i3(i3 %a, i3 %b, i3* %p) {
   %t = shl i3 %a, %b

llvm/test/CodeGen/WebAssembly/libcalls.ll

 ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers | FileCheck %s
 
 ; Test a subset of compiler-rt/libm libcalls expected to be emitted by the wasm backend
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 declare fp128 @llvm.sqrt.f128(fp128)
 declare fp128 @llvm.floor.f128(fp128)
 declare fp128 @llvm.trunc.f128(fp128)
 declare fp128 @llvm.nearbyint.f128(fp128)
 declare fp128 @llvm.pow.f128(fp128, fp128)
 declare fp128 @llvm.powi.f128.i32(fp128, i32)

llvm/test/CodeGen/WebAssembly/load-store-static.ll

 ; RUN: llc < %s -asm-verbose=false -wasm-disable-explicit-locals -wasm-keep-registers | FileCheck %s -check-prefixes=NON-PIC,CHECK
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-emscripten"
 
 @hidden_global         = external hidden global i32
 @hidden_global_array   = external hidden global [10 x i32]
 @external_global       = external dso_local global i32
 @external_global_array = external dso_local global [10 x i32]
 
 declare i32 @foo();

llvm/test/CodeGen/WebAssembly/lower-em-ehsjlj-multi-return.ll

 ; RUN: not --crash llc < %s -enable-emscripten-cxx-exceptions -mattr=+multivalue 2>&1 | FileCheck %s --check-prefix=EH
 ; RUN: not --crash llc < %s -enable-emscripten-sjlj -mattr=+multivalue 2>&1 | FileCheck %s --check-prefix=SJLJ
 
 ; Currently multivalue returning functions are not supported in Emscripten EH /
 ; SjLj. Make sure they error out.
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 %struct.__jmp_buf_tag = type { [6 x i32], i32, [32 x i32] }
 
 define void @exception() personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
 entry:
   invoke {i32, i32} @foo(i32 3)
           to label %try.cont unwind label %lpad

llvm/test/CodeGen/WebAssembly/lower-em-ehsjlj-options.ll

 ; RUN: llc < %s -enable-emscripten-cxx-exceptions | FileCheck %s --check-prefix=EH
 ; RUN: llc < %s -enable-emscripten-sjlj | FileCheck %s --check-prefix=SJLJ
 ; RUN: llc < %s | FileCheck %s --check-prefix=NONE
 ; RUN: not --crash llc < %s -enable-emscripten-cxx-exceptions -exception-model=wasm 2>&1 | FileCheck %s --check-prefix=WASM-EH-EM-EH
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; EH: .functype  invoke_vi (i32, i32) -> ()
 ; EH: .import_module  invoke_vi, env
 ; EH: .import_name  invoke_vi, invoke_vi
 ; EH-NOT: .functype  __invoke_void_i32
 ; EH-NOT: .import_module  __invoke_void_i32
 ; EH-NOT: .import_name  __invoke_void_i32

llvm/test/CodeGen/WebAssembly/lower-em-sjlj-alias.ll

 ; RUN: opt < %s -wasm-lower-em-ehsjlj -S | FileCheck %s
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-emscripten"
 
 ; Tests if an alias to a function (here malloc) is correctly handled as a
 ; function that cannot longjmp.
 
 %struct.__jmp_buf_tag = type { [6 x i32], i32, [32 x i32] }
 @malloc = weak alias i8* (i32), i8* (i32)* @dlmalloc
 

llvm/test/CodeGen/WebAssembly/lower-em-sjlj-debuginfo.ll

 ; RUN: opt < %s -wasm-lower-em-ehsjlj -S | FileCheck %s
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 %struct.__jmp_buf_tag = type { [6 x i32], i32, [32 x i32] }
 
 ; Basic debug info test. All existing instructions have debug info and inserted
 ; 'malloc' and 'free' calls take debug info from the next instruction.
 define void @setjmp_debug_info0() !dbg !3 {
 ; CHECK-LABEL: @setjmp_debug_info0

llvm/test/CodeGen/WebAssembly/lower-em-sjlj-sret.ll

 ; RUN: llc < %s -asm-verbose=false -enable-emscripten-sjlj -wasm-keep-registers | FileCheck %s
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 %struct.__jmp_buf_tag = type { [6 x i32], i32, [32 x i32] }
 
 declare i32 @setjmp(%struct.__jmp_buf_tag*) #0
 declare {i32, i32} @returns_struct()
 
 ; Test the combination of backend legalization of large return types and the

llvm/test/CodeGen/WebAssembly/lower-global-dtors.ll

 ; RUN: llc < %s -asm-verbose=false -wasm-keep-registers | FileCheck --check-prefix=CHECK --check-prefix=FINI --check-prefix=NULL %s
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; Test that @llvm.global_dtors is properly lowered into @llvm.global_ctors,
 ; grouping dtor calls by priority and associated symbol.
 
 declare void @orig_ctor()
 declare void @orig_dtor0()
 declare void @orig_dtor1a()

llvm/test/CodeGen/WebAssembly/main-declaration.ll

 ; RUN: llc < %s -asm-verbose=false | FileCheck %s
 
 ; Test main functions with alternate signatures.
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 declare i32 @main()
 
 define i32 @foo() {
   %t = call i32 @main()
   ret i32 %t
 }
 
 ; CHECK-LABEL: foo:
 ; CHECK-NEXT:    .functype foo () -> (i32)
 ; CHECK-NEXT:    call __original_main
 ; CHECK-NEXT:    end_function

llvm/test/CodeGen/WebAssembly/main-no-args.ll

 ; RUN: llc < %s -asm-verbose=false | FileCheck %s
 
 ; Test main functions with alternate signatures.
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 define i32 @main() {
   ret i32 0
 }
 
 ; CHECK-LABEL: __original_main:
 ; CHECK-NEXT: .functype __original_main () -> (i32)
 ; CHECK-NEXT: i32.const 0
 ; CHECK-NEXT: end_function
 
 ; CHECK-LABEL: main:
 ; CHECK-NEXT: .functype main (i32, i32) -> (i32)
 ; CHECK:      call __original_main

llvm/test/CodeGen/WebAssembly/main-three-args.ll

 ; RUN: llc < %s -asm-verbose=false | FileCheck %s
 
 ; Test that main function with a non-standard third argument is
 ; not wrapped.
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 define i32 @main(i32 %a, i8** %b, i8** %c) {
   ret i32 0
 }
 
 ; CHECK-LABEL: main:
 ; CHECK-NEXT: .functype main (i32, i32, i32) -> (i32)
 
 ; CHECK-NOT: __original_main:

llvm/test/CodeGen/WebAssembly/main-with-args.ll

 ; RUN: llc < %s -asm-verbose=false | FileCheck %s
 
 ; Test that main function with expected signature is not wrapped
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 define i32 @main(i32 %a, i8** %b) {
   ret i32 0
 }
 
 ; CHECK-LABEL: main:
 ; CHECK-NEXT: .functype main (i32, i32) -> (i32)
 
 ; CHECK-NOT: __original_main:

llvm/test/CodeGen/WebAssembly/masked-shifts.ll

 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc < %s -verify-machineinstrs -mattr=+simd128 | FileCheck %s
 
 ;; Check that masked shift counts are optimized out.
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 define i32 @shl_i32(i32 %v, i32 %x) {
 ; CHECK-LABEL: shl_i32:
 ; CHECK:         .functype shl_i32 (i32, i32) -> (i32)
 ; CHECK-NEXT:  # %bb.0:
 ; CHECK-NEXT:    local.get 0
 ; CHECK-NEXT:    local.get 1

llvm/test/CodeGen/WebAssembly/mem-intrinsics.ll

 ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -tail-dup-placement=0 | FileCheck %s
 
 ; Test memcpy, memmove, and memset intrinsics.
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture readonly, i32, i1)
 declare void @llvm.memmove.p0i8.p0i8.i32(i8* nocapture, i8* nocapture readonly, i32, i1)
 declare void @llvm.memset.p0i8.i32(i8* nocapture, i8, i32, i1)
 
 ; Test that return values are optimized.
 

llvm/test/CodeGen/WebAssembly/memory-addr32.ll

 ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers | FileCheck %s
 
 ; Test that basic memory operations assemble as expected with 32-bit addresses.
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 declare i32 @llvm.wasm.memory.size.i32(i32) nounwind readonly
 declare i32 @llvm.wasm.memory.grow.i32(i32, i32) nounwind
 
 ; CHECK-LABEL: memory_size:
 ; CHECK-NEXT: .functype memory_size () -> (i32){{$}}
 ; CHECK-NEXT: memory.size $push0=, 0{{$}}

llvm/test/CodeGen/WebAssembly/memory-addr64.ll

 ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers | FileCheck %s
 
 ; Test that basic memory operations assemble as expected with 64-bit addresses.
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm64-unknown-unknown"
 
 declare i64 @llvm.wasm.memory.size.i64(i32) nounwind readonly
 declare i64 @llvm.wasm.memory.grow.i64(i32, i64) nounwind
 
 ; CHECK-LABEL: memory_size:
 ; CHECK-NEXT: .functype memory_size () -> (i64){{$}}
 ; CHECK-NEXT: memory.size $push0=, 0{{$}}

llvm/test/CodeGen/WebAssembly/muloti4.ll

 ; RUN: llc -asm-verbose=false < %s -wasm-keep-registers | FileCheck %s
 
 ; Test that 128-bit smul.with.overflow assembles as expected.
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 define i128 @call_muloti4(i128 %a, i128 %b) nounwind {
 entry:
   %smul = tail call { i128, i1 } @llvm.smul.with.overflow.i128(i128 %a, i128 %b)
   %cmp = extractvalue { i128, i1 } %smul, 1
   %smul.result = extractvalue { i128, i1 } %smul, 0
   %X = select i1 %cmp, i128 %smul.result, i128 42
   ret i128 %X
 }
 
 ; CHECK: call __muloti4, $pop{{[0-9]*}}, $pop{{[0-9]*}}, $pop{{[0-9]*}}, $pop{{[0-9]*}}, $pop{{[0-9]*}}, $pop{{[0-9]*}}{{$}}
 
 declare { i128, i1 } @llvm.smul.with.overflow.i128(i128, i128) nounwind readnone

llvm/test/CodeGen/WebAssembly/multi-return.ll

 ; RUN: llc < %s -asm-verbose=false -wasm-disable-explicit-locals -wasm-keep-registers | FileCheck %s
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; Return multiple values, some of which will be legalized into multiple values.
 declare { i64, i128, i192, i128, i64 } @return_multi_multi()
 
 ; Test returning a single value from @return_multi_multi.
 
 define i64 @test0() {

llvm/test/CodeGen/WebAssembly/multivalue-stackify.ll

 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; NOTE: Test functions have been generated by multivalue-stackify.py.
 
 ; RUN: llc < %s -verify-machineinstrs -mattr=+multivalue | FileCheck %s
 
 ; Test that the multivalue stackification works
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 declare {i32} @op_0_to_1()
 declare {i32, i32} @op_0_to_2()
 declare {i32, i32, i32} @op_0_to_3()
 declare void @op_1_to_0(i32 %t0)
 declare {i32} @op_1_to_1(i32 %t0)
 declare {i32, i32} @op_1_to_2(i32 %t0)
; CHECK-NEXT:    # fallthrough-return
   %t1 = extractvalue {i32, i32, i32} %t0, 2
   %t2 = extractvalue {i32, i32, i32} %t0, 2
   call void @op_2_to_0(i32 %t1, i32 %t2)
   %t3 = extractvalue {i32, i32, i32} %t0, 1
   %t4 = extractvalue {i32, i32, i32} %t0, 1
   call void @op_2_to_0(i32 %t3, i32 %t4)
   ret void
 }
-

llvm/test/CodeGen/WebAssembly/multivalue-stackify.py

 def print_header():
   print('; NOTE: Test functions have been generated by multivalue-stackify.py.')
   print()
   print('; RUN: llc < %s -verify-machineinstrs -mattr=+multivalue',
         '| FileCheck %s')
   print()
   print('; Test that the multivalue stackification works')
   print()
-  print('target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"')
   print('target triple = "wasm32-unknown-unknown"')
   print()
   for num_uses in range(MAX_OP_USES + 1):
     for num_defs in range(MAX_PROGRAM_DEFS + 1):
       if num_uses == 0 and num_defs == 0:
         continue
       ret_type = make_llvm_type(num_defs)
       op_name = make_llvm_op_name(num_uses, num_defs)

llvm/test/CodeGen/WebAssembly/multivalue.ll

 ; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -mattr=+multivalue,+tail-call | FileCheck %s
 ; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -mattr=+reference-types,+multivalue,+tail-call | FileCheck --check-prefix REF %s
 ; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=+multivalue,+tail-call | FileCheck %s --check-prefix REGS
 ; RUN: llc < %s --filetype=obj -mattr=+multivalue,+tail-call | obj2yaml | FileCheck %s --check-prefix OBJ
 
 ; Test that the multivalue calls, returns, function types, and block
 ; types work as expected.
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 %pair = type { i32, i64 }
 %rpair = type { i64, i32 }
 
 declare void @use_i32(i32)
 declare void @use_i64(i64)
 

llvm/test/CodeGen/WebAssembly/mutable-globals.ll

 ; RUN: llc < %s -mattr=+mutable-globals | FileCheck %s
 
 ; Test that mutable globals is properly emitted into the target features section
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 define void @foo() {
   ret void
 }
 
 ; CHECK-LABEL: .custom_section.target_features
 ; CHECK-NEXT: .int8 1
 ; CHECK-NEXT: .int8 43
 ; CHECK-NEXT: .int8 15
 ; CHECK-NEXT: .ascii "mutable-globals"

llvm/test/CodeGen/WebAssembly/negative-base-reg.ll

 ; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-wasm-fallthrough-return-opt -wasm-keep-registers | FileCheck %s
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 @args = hidden local_unnamed_addr global [32 x i32] zeroinitializer, align 16
 
 ; Function Attrs: norecurse nounwind
 define hidden i32 @main() local_unnamed_addr #0 {
 
 ; If LSR stops selecting a negative base reg value, then this test will no

llvm/test/CodeGen/WebAssembly/null-streamer.ll

 ; RUN: llc < %s -O0 -filetype=null -exception-model=wasm -mattr=+exception-handling
 ; RUN: llc < %s -O0 -filetype=asm -asm-verbose=false -exception-model=wasm -mattr=+exception-handling | FileCheck %s
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 declare void @llvm.wasm.throw(i32, i8*)
 declare void @g()
 
 define i32 @test(i8* %p)  {
   %n = alloca i32
   call void @llvm.wasm.throw(i32 0, i8* %p)
   call void @g()
   ret i32 0
 }
 
 ; CHECK-DAG: .globaltype
 ; CHECK-DAG: .tagtype
 ; CHECK-DAG: .functype

llvm/test/CodeGen/WebAssembly/offset-atomics.ll

 ; RUN: not --crash llc > /dev/null < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt
 ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=+atomics,+sign-ext | FileCheck %s
 
 ; Test that atomic loads are assembled properly.
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ;===----------------------------------------------------------------------------
 ; Atomic loads: 32-bit
 ;===----------------------------------------------------------------------------
 
 ; Basic load.
 

llvm/test/CodeGen/WebAssembly/offset-fastisel.ll

 ; RUN: llc < %s -asm-verbose=false -wasm-disable-explicit-locals -wasm-keep-registers -fast-isel -fast-isel-abort=1 | FileCheck %s
 
 ; TODO: Merge this with offset.ll when fast-isel matches better.
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; CHECK-LABEL: store_i8_with_variable_gep_offset:
 ; CHECK: i32.add    $push[[L0:[0-9]+]]=, $0, $1{{$}}
 ; CHECK: i32.const  $push[[L1:[0-9]+]]=, 0{{$}}
 ; CHECK: i32.store8 0($pop[[L0]]), $pop[[L1]]{{$}}
 define void @store_i8_with_variable_gep_offset(i8* %p, i32 %idx) {
   %s = getelementptr inbounds i8, i8* %p, i32 %idx

llvm/test/CodeGen/WebAssembly/offset-folding.ll

 ; RUN: llc < %s -asm-verbose=false -wasm-keep-registers | FileCheck %s
 
 ; Test that constant offsets can be folded into global addresses.
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 @x = external dso_local global [0 x i32]
 @y = dso_local global [50 x i32] zeroinitializer
 
 ; Test basic constant offsets of both defined and external symbols.
 
 ; CHECK-LABEL: test0:

llvm/test/CodeGen/WebAssembly/offset.ll

 ; RUN: llc < %s -asm-verbose=false -wasm-disable-explicit-locals -wasm-keep-registers -disable-wasm-fallthrough-return-opt | FileCheck %s
 
 ; Test constant load and store address offsets.
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ;===----------------------------------------------------------------------------
 ; Loads: 32-bit
 ;===----------------------------------------------------------------------------
 
 ; Basic load.
 

llvm/test/CodeGen/WebAssembly/phi.ll

 ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -verify-machineinstrs | FileCheck %s
 
 ; Test that phis are lowered.
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; Basic phi triangle.
 
 ; CHECK-LABEL: test0:
 ; CHECK: div_s $[[NUM0:[0-9]+]]=, $0, $pop[[NUM1:[0-9]+]]{{$}}
 ; CHECK: return $[[NUM0]]{{$}}
 define i32 @test0(i32 %p) {

llvm/test/CodeGen/WebAssembly/pr47375.ll

 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc < %s | FileCheck %s
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; Regression test for pr47375, in which an assertion was triggering
 ; because WebAssemblyTargetLowering::isVectorLoadExtDesirable was
 ; improperly assuming the use of simple value types.
 
 define void @sext_vec() {
 ; CHECK-LABEL: sext_vec:

llvm/test/CodeGen/WebAssembly/reference-types.ll

 ; RUN: llc < %s -mattr=+reference-types | FileCheck %s
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; CHECK-LABEL: reference-types
 define void @reference-types() {
   ret void
 }
 
 ; CHECK:      .int8 1
 ; CHECK-NEXT: .int8 43
 ; CHECK-NEXT: .int8 15
 ; CHECK-NEXT: .ascii "reference-types"

llvm/test/CodeGen/WebAssembly/reg-stackify.ll

 ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -verify-machineinstrs | FileCheck %s
 ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -verify-machineinstrs | FileCheck %s --check-prefix=NOREGS
 
 ; Test the register stackifier pass.
 
 ; We have two sets of tests, one with registers and implicit locals, and
 ; a stack / explicit locals based version (NOREGS).
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; No because of pointer aliasing.
 
 ; CHECK-LABEL: no0:
 ; CHECK: return $1{{$}}
 ; NOREGS-LABEL: no0:
 ; NOREGS: return{{$}}

llvm/test/CodeGen/WebAssembly/return-address-emscripten.ll

 ; RUN: llc < %s -asm-verbose=false | FileCheck %s
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-emscripten"
 
 ; This tests the implementation of __builtin_return_address on emscripten
 
 ; CHECK-LABEL: test_returnaddress:
 ; CHECK-NEXT: .functype test_returnaddress () -> (i32){{$}}
 ; CHECK-NEXT: {{^}} i32.const 0{{$}}
 ; CHECK-NEXT: {{^}} call emscripten_return_address{{$}}
 ; CHECK-NEXT: {{^}} end_function{{$}}
 define i8* @test_returnaddress() {
   %r = call i8* @llvm.returnaddress(i32 0)
   ret i8* %r
 }
 
 ; LLVM represents __builtin_return_address as call to this function in IR.
 declare i8* @llvm.returnaddress(i32 immarg)

llvm/test/CodeGen/WebAssembly/return-address-unknown.ll

 ; RUN: not llc < %s -asm-verbose=false 2>&1 | FileCheck %s
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; This tests the implementation of __builtin_return_address on the unknown OS.
 ; Since this is not implemented, it should fail.
 
 ; CHECK: Non-Emscripten WebAssembly hasn't implemented __builtin_return_address
 define i8* @test_returnaddress() {
   %r = call i8* @llvm.returnaddress(i32 0)
   ret i8* %r
 }
 
 ; LLVM represents __builtin_return_address as call to this function in IR.
 declare i8* @llvm.returnaddress(i32 immarg)

llvm/test/CodeGen/WebAssembly/return-int32.ll

 ; RUN: llc < %s -asm-verbose=false -wasm-keep-registers | FileCheck %s
 ; RUN: llc < %s -asm-verbose=false -wasm-keep-registers -fast-isel -fast-isel-abort=1 | FileCheck %s
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; CHECK-LABEL: return_i32:
 ; CHECK-NEXT:  .functype return_i32 (i32) -> (i32){{$}}
 ; CHECK-NEXT:  local.get  $push0=, 0
 ; CHECK-NEXT:  end_function{{$}}
 define i32 @return_i32(i32 %p) {
   ret i32 %p

llvm/test/CodeGen/WebAssembly/return-void.ll

 ; RUN: llc < %s -asm-verbose=false | FileCheck %s
 ; RUN: llc < %s -asm-verbose=false -fast-isel -fast-isel-abort=1 | FileCheck %s
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; CHECK-LABEL: return_void:
 ; CHECK: end_function{{$}}
 define void @return_void() {
   ret void
 }
 

llvm/test/CodeGen/WebAssembly/returned.ll

 ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers | FileCheck %s
 
 ; Test that the "returned" attribute is optimized effectively.
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; CHECK-LABEL: _Z3foov:
 ; CHECK-NEXT: .functype _Z3foov () -> (i32){{$}}
 ; CHECK-NEXT: i32.const $push0=, 1{{$}}
 ; CHECK-NEXT: {{^}} call      $push1=, _Znwm, $pop0{{$}}
 ; CHECK-NEXT: {{^}} call      $push2=, _ZN5AppleC1Ev, $pop1{{$}}
 ; CHECK-NEXT: return    $pop2{{$}}

llvm/test/CodeGen/WebAssembly/select.ll

 ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers | FileCheck %s --check-prefixes CHECK,SLOW
 ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -fast-isel -fast-isel-abort=1 | FileCheck %s
 
 ; Test that wasm select instruction is selected from LLVM select instruction.
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; CHECK-LABEL: select_i32_bool:
 ; CHECK-NEXT: .functype select_i32_bool (i32, i32, i32) -> (i32){{$}}
 ; CHECK-NEXT: i32.select $push0=, $1, $2, $0{{$}}
 ; CHECK-NEXT: return     $pop0{{$}}
 define i32 @select_i32_bool(i1 zeroext %a, i32 %b, i32 %c) {
   %cond = select i1 %a, i32 %b, i32 %c

llvm/test/CodeGen/WebAssembly/signext-arg.ll

 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc < %s -asm-verbose=false -wasm-disable-explicit-locals -wasm-keep-registers | FileCheck %s
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 declare i32 @get_int(i16 %arg)
 
 define i32 @func_1(i16 %arg1 , i32 %arg2) #0 {
 ; CHECK-LABEL: func_1:
 ; CHECK:         i32.const $push1=, 16
 ; CHECK-NEXT:    i32.shl $push2=, $0, $pop1

llvm/test/CodeGen/WebAssembly/signext-inreg.ll

 ; RUN: llc < %s -mattr=+sign-ext -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers | FileCheck %s
 ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers | FileCheck %s --check-prefix=NOSIGNEXT
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; CHECK-LABEL: i32_extend8_s:
 ; CHECK-NEXT: .functype i32_extend8_s (i32) -> (i32){{$}}
 ; CHECK-NEXT: i32.extend8_s $push[[NUM:[0-9]+]]=, $0{{$}}
 ; CHECK-NEXT: return $pop[[NUM]]{{$}}
 
 ; NOSIGNEXT-LABEL: i32_extend8_s

 ; CHECK-LABEL: i64_extend32_s:
 ; CHECK-NEXT: .functype i64_extend32_s (i32) -> (i64){{$}}
 ; CHECK-NEXT: i64.extend_i32_s $push[[NUM:[0-9]+]]=, $0{{$}}
 ; CHECK-NEXT: return $pop[[NUM]]{{$}}
 define i64 @i64_extend32_s(i32 %x) {
   %a = sext i32 %x to i64
   ret i64 %a
 }
-

llvm/test/CodeGen/WebAssembly/signext-zeroext.ll

 ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers | FileCheck %s
 
 ; Test zeroext and signext ABI keywords
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; CHECK-LABEL: z2s_func:
 ; CHECK-NEXT: .functype z2s_func (i32) -> (i32){{$}}
 ; CHECK-NEXT: i32.const $push[[NUM0:[0-9]+]]=, 24{{$}}
 ; CHECK-NEXT: i32.shl $push[[NUM2:[0-9]+]]=, $0, $pop[[NUM0]]{{$}}
 ; CHECK-NEXT: i32.const $push[[NUM1:[0-9]+]]=, 24{{$}}
 ; CHECK-NEXT: i32.shr_s $push[[NUM3:[0-9]+]]=, $pop[[NUM2]], $pop[[NUM1]]{{$}}

llvm/test/CodeGen/WebAssembly/simd-arith.ll

 ; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=+simd128 | FileCheck %s --check-prefixes CHECK,SIMD128,SIMD128-SLOW
 
 ; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=+simd128 -fast-isel | FileCheck %s --check-prefixes CHECK,SIMD128,SIMD128-FAST
 
 ; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers | FileCheck %s --check-prefixes CHECK,NO-SIMD128
 
 ; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -fast-isel | FileCheck %s --check-prefixes CHECK,NO-SIMD128
 
 ; check that a non-test run (including explicit locals pass) at least finishes
 ; RUN: llc < %s -O0 -mattr=+simd128
 ; RUN: llc < %s -O2 -mattr=+simd128
 
 ; Test that basic SIMD128 arithmetic operations assemble as expected.
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; ==============================================================================
 ; 16 x i8
 ; ==============================================================================
 ; CHECK-LABEL: add_v16i8:
 ; NO-SIMD128-NOT: i8x16
 ; SIMD128-NEXT: .functype add_v16i8 (v128, v128) -> (v128){{$}}

llvm/test/CodeGen/WebAssembly/simd-bitcasts.ll

 ; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-wasm-fallthrough-return-opt -wasm-keep-registers -wasm-disable-explicit-locals -mattr=+simd128 | FileCheck %s --check-prefixes CHECK,SIMD128
 ; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-wasm-fallthrough-return-opt -wasm-keep-registers -wasm-disable-explicit-locals | FileCheck %s --check-prefixes CHECK,NO-SIMD128
 
 ; Test that bitcasts between vector types are lowered to zero instructions
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; CHECK-LABEL: v16i8_to_v16i8:
 ; NO-SIMD128-NOT: return $0
 ; SIMD128: return $0
 define <16 x i8> @v16i8_to_v16i8(<16 x i8> %v) {
   %res = bitcast <16 x i8> %v to <16 x i8>
   ret <16 x i8> %res

llvm/test/CodeGen/WebAssembly/simd-build-pair.ll

 ; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=simd128 | FileCheck %s --check-prefixes CHECK
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; Test that BUILD_PAIR dag nodes are correctly lowered.
 ; This code produces a selection DAG like the following:
 
 ;    t0: ch = EntryToken
 ;  t3: v4i32,ch = load<(load 16 from `<4 x i32>* undef`)> t0, undef:i32, undef:i32
 ;        t30: i32 = extract_vector_elt t3, Constant:i32<2>

llvm/test/CodeGen/WebAssembly/simd-build-vector.ll

 ; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=+simd128 | FileCheck %s
 
 ; Test that the logic to choose between v128.const vector
 ; initialization and splat vector initialization and to optimize the
 ; choice of splat value works correctly.
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; CHECK-LABEL: same_const_one_replaced_i16x8:
 ; CHECK-NEXT:  .functype       same_const_one_replaced_i16x8 (i32) -> (v128)
 ; CHECK-NEXT:  v128.const      $push[[L0:[0-9]+]]=, 42, 42, 42, 42, 42, 0, 42, 42
 ; CHECK-NEXT:  i16x8.replace_lane      $push[[L1:[0-9]+]]=, $pop[[L0]], 5, $0
 ; CHECK-NEXT:  return          $pop[[L1]]
 define <8 x i16> @same_const_one_replaced_i16x8(i16 %x) {

llvm/test/CodeGen/WebAssembly/simd-comparisons.ll

 ; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-wasm-fallthrough-return-opt -wasm-keep-registers -wasm-disable-explicit-locals -mattr=+simd128 | FileCheck %s --check-prefixes CHECK,SIMD128
 ; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-wasm-fallthrough-return-opt -wasm-keep-registers -wasm-disable-explicit-locals | FileCheck %s --check-prefixes CHECK,NO-SIMD128
 
 ; Test SIMD comparison operators
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; CHECK-LABEL: compare_eq_v16i8:
 ; NO-SIMD128-NOT: i8x16
 ; SIMD128-NEXT: .functype compare_eq_v16i8 (v128, v128) -> (v128){{$}}
 ; SIMD128-NEXT: i8x16.eq $push[[R:[0-9]+]]=, $0, $1{{$}}
 ; SIMD128-NEXT: return $pop[[R]]{{$}}
 define <16 x i1> @compare_eq_v16i8 (<16 x i8> %x, <16 x i8> %y) {

llvm/test/CodeGen/WebAssembly/simd-concat.ll

 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc < %s -verify-machineinstrs -mattr=+simd128 | FileCheck %s
 
 ; Check that all varieties of vector concatenations get lowered to shuffles.
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown--wasm"
 
 define <16 x i8> @concat_v8i8(<8 x i8> %a, <8 x i8> %b) {
 ; CHECK-LABEL: concat_v8i8:
 ; CHECK:         .functype concat_v8i8 (v128, v128) -> (v128)
 ; CHECK-NEXT:  # %bb.0:
 ; CHECK-NEXT:    local.get 0
 ; CHECK-NEXT:    local.get 1

llvm/test/CodeGen/WebAssembly/simd-conversions.ll

 ; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -wasm-keep-registers -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -mattr=+simd128 | FileCheck %s --check-prefixes CHECK,SIMD128
 ; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -wasm-keep-registers -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals | FileCheck %s --check-prefixes CHECK,NO-SIMD128
 
 ; Test that vector float-to-int and int-to-float instructions lower correctly
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; CHECK-LABEL: convert_s_v4f32:
 ; NO-SIMD128-NOT: i32x4
 ; SIMD128-NEXT: .functype convert_s_v4f32 (v128) -> (v128){{$}}
 ; SIMD128-NEXT: f32x4.convert_i32x4_s $push[[R:[0-9]+]]=, $0
 ; SIMD128-NEXT: return $pop[[R]]
 define <4 x float> @convert_s_v4f32(<4 x i32> %x) {

llvm/test/CodeGen/WebAssembly/simd-extended-extract.ll

 ; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -mattr=+simd128 | FileCheck %s
 
 ; Regression test for an issue with patterns like the following:
 ;
 ;     t101: v4i32 = BUILD_VECTOR t99, t99, t99, t99
 ;         t92: i32 = extract_vector_elt t101, Constant:i32<0>
 ;             t89: i32 = sign_extend_inreg t92, ValueType:ch:i8
 ;
 ; Notice that the sign_extend_inreg has source value type i8 but the
 ; extracted vector has type v4i32. There are no ISel patterns that
 ; handle mismatched types like this, so we insert a bitcast before the
 ; extract. This was previously an ISel failure. This test case is
 ; reduced from a private user bug report, and the vector extracts are
 ; optimized out via subsequent DAG combines.
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; CHECK-LABEL: foo:
 ; CHECK:         .functype foo (i32) -> ()
 ; Implementation omitted...
 ; CHECK:         return
 define void @foo(<4 x i8>* %p) {
   %1 = load <4 x i8>, <4 x i8>* %p
   %2 = sitofp <4 x i8> %1 to <4 x double>
   %3 = fmul <4 x double> zeroinitializer, %2
   %4 = fadd <4 x double> %3, zeroinitializer
   %5 = fptrunc <4 x double> %4 to <4 x float>
   store <4 x float> %5, <4 x float>* undef
   ret void
 }

llvm/test/CodeGen/WebAssembly/simd-extending.ll

 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc < %s -mattr=+simd128 | FileCheck %s
 
 ;; Test that SIMD extending operations can be successfully selected
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 define <8 x i16> @extend_low_i8x16_s(<16 x i8> %v) {
 ; CHECK-LABEL: extend_low_i8x16_s:
 ; CHECK:         .functype extend_low_i8x16_s (v128) -> (v128)
 ; CHECK-NEXT:  # %bb.0:
 ; CHECK-NEXT:    local.get 0
 ; CHECK-NEXT:    i16x8.extend_low_i8x16_s

llvm/test/CodeGen/WebAssembly/simd-illegal-signext.ll

 ; RUN: llc < %s -mattr=+simd128 | FileCheck %s
 
 ; Regression test for a crash caused by
 ; WebAssemblyTargetLowering::ReplaceNodeResults not being
 ; implemented. Since SIMD is enabled, sign_ext_inreg is custom lowered
 ; but the result is i16, an illegal value. This requires
 ; ReplaceNodeResults to resolve, but the default implementation is to
 ; abort.
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-emscripten"
 
 ; CHECK: i32.load8_s
 ; CHECK-NEXT: i32.store16
 define void @foo() {
 entry:
   %0 = load i32*, i32** undef, align 4
   %1 = load i32, i32* %0, align 4
   %2 = load i32, i32* undef, align 4
   %conv67 = trunc i32 %2 to i8
   %conv68 = sext i8 %conv67 to i16
   store i16 %conv68, i16* null, align 2
   ret void
 }

llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll

 ; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=+simd128 | FileCheck %s --check-prefixes=CHECK,SLOW
 ; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=+simd128 -fast-isel | FileCheck %s
 
 ; Test that SIMD128 intrinsics lower as expected. These intrinsics are
 ; only expected to lower successfully if the simd128 attribute is
 ; enabled and legal types are used.
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; ==============================================================================
 ; 16 x i8
 ; ==============================================================================
 ; CHECK-LABEL: swizzle_v16i8:
 ; CHECK-NEXT: .functype swizzle_v16i8 (v128, v128) -> (v128){{$}}
 ; CHECK-NEXT: i8x16.swizzle $push[[R:[0-9]+]]=, $0, $1{{$}}

llvm/test/CodeGen/WebAssembly/simd-load-lane-offset.ll

 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc < %s -verify-machineinstrs -mattr=+simd128 | FileCheck %s
 
 ; Test SIMD v128.load{8,16,32,64}_lane instructions.
 
 ; TODO: Use the offset field by supporting more patterns. Right now only the
 ; equivalents of LoadPatNoOffset/StorePatNoOffset are supported.
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 declare <16 x i8> @llvm.wasm.load8.lane(i8*, <16 x i8>, i32)
 declare <8 x i16> @llvm.wasm.load16.lane(i16*, <8 x i16>, i32)
 declare <4 x i32> @llvm.wasm.load32.lane(i32*, <4 x i32>, i32)
 declare <2 x i64> @llvm.wasm.load64.lane(i64*, <2 x i64>, i32)
 
 declare void @llvm.wasm.store8.lane(i8*, <16 x i8>, i32)

llvm/test/CodeGen/WebAssembly/simd-load-splat.ll

 ; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-wasm-fallthrough-return-opt -wasm-keep-registers -wasm-disable-explicit-locals -mattr=+simd128 | FileCheck %s
 
 ; Regression test for an ISel failure when a splatted load had more
 ; than one use. The main tests for load_splat are in simd-offset.ll.
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; CHECK-LABEL: load_splat:
 ; CHECK-NEXT: .functype load_splat (i32, i32) -> (i32)
 ; CHECK-NEXT: i32.load8_u $[[E:[0-9]+]]=, 0($0){{$}}
 ; CHECK-NEXT: v128.load8_splat $push[[V:[0-9]+]]=, 0($0){{$}}
 ; CHECK-NEXT: v128.store 0($1), $pop[[V]]{{$}}
 ; CHECK-NEXT: return $[[E]]{{$}}
 define i8 @load_splat(i8* %p, <16 x i8>* %out) {
   %e = load i8, i8* %p
   %v1 = insertelement <16 x i8> undef, i8 %e, i32 0
   %v2 = shufflevector <16 x i8> %v1, <16 x i8> undef, <16 x i32> zeroinitializer
   store <16 x i8> %v2, <16 x i8>* %out
   ret i8 %e
 }

llvm/test/CodeGen/WebAssembly/simd-load-store-alignment.ll

 ; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=+simd128 | FileCheck %s
 
 ; Test loads and stores with custom alignment values.
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; ==============================================================================
 ; 16 x i8
 ; ==============================================================================
 
 ; CHECK-LABEL: load_v16i8_a1:
 ; CHECK-NEXT: .functype load_v16i8_a1 (i32) -> (v128){{$}}

llvm/test/CodeGen/WebAssembly/simd-load-zero-offset.ll

 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc < %s -verify-machineinstrs -mattr=+simd128 | FileCheck %s
 
 ; Test SIMD v128.load{32,64}_zero instructions
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 declare <4 x i32> @llvm.wasm.load32.zero(i32*)
 declare <2 x i64> @llvm.wasm.load64.zero(i64*)
 
 ;===----------------------------------------------------------------------------
 ; v128.load32_zero
 ;===----------------------------------------------------------------------------

llvm/test/CodeGen/WebAssembly/simd-nested-shuffles.ll

 ; RUN: llc < %s -mattr=+simd128 -verify-machineinstrs | FileCheck %s --check-prefixes CHECK
 
 ; Check that shuffles maintain their type when being custom
 ; lowered. Regression test for bug 39275.
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; CHECK: i8x16.shuffle
 define <4 x i32> @foo(<4 x i32> %x) {
   %1 = shufflevector <4 x i32> %x, <4 x i32> undef,
     <4 x i32> <i32 2, i32 3, i32 undef, i32 undef>
   %2 = shufflevector <4 x i32> %1, <4 x i32> undef,
     <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef>
   %3 = add <4 x i32> %2, %2
   ret <4 x i32> %3
 }

llvm/test/CodeGen/WebAssembly/simd-nonconst-sext.ll

 ; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -mattr=+simd128 | FileCheck %s
 
 ; A regression test for a bug in the lowering of SIGN_EXTEND_INREG
 ; with SIMD and without sign-ext where ISel would crash if the index
 ; of the vector extract was not a constant.
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32"
 
 ; CHECK-LABEL: foo:
 ; CHECK-NEXT: .functype foo () -> (f32)
 ; CHECK: i32x4.load16x4_u
 ; CHECK: f32.convert_i32_s
 define float @foo() {
   %1 = load <4 x i16>, <4 x i16>* undef, align 8
   %2 = load i32, i32* undef, align 4
   %vecext = extractelement <4 x i16> %1, i32 %2
   %conv = sitofp i16 %vecext to float
   ret float %conv
 }

llvm/test/CodeGen/WebAssembly/simd-offset.ll

 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc < %s -verify-machineinstrs -mattr=+simd128 | FileCheck %s
 
 ; Test SIMD loads and stores
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; ==============================================================================
 ; 16 x i8
 ; ==============================================================================
 define <16 x i8> @load_v16i8(<16 x i8>* %p) {
 ; CHECK-LABEL: load_v16i8:
 ; CHECK:         .functype load_v16i8 (i32) -> (v128)

llvm/test/CodeGen/WebAssembly/simd-reductions.ll

 ; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=+simd128 | FileCheck %s
 
 ; Tests that redundant masking and conversions are folded out
 ; following SIMD reduction instructions.
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; ==============================================================================
 ; 16 x i8
 ; ==============================================================================
 declare i32 @llvm.wasm.anytrue.v16i8(<16 x i8>)
 declare i32 @llvm.wasm.alltrue.v16i8(<16 x i8>)
 

llvm/test/CodeGen/WebAssembly/simd-scalar-to-vector.ll

 ;     t53: ch = store<(store 2 into `<4 x i16>* undef` + 2, align 1), trunc to i16> t32:1, t50, undef:i32, undef:i32
 ;       t49: i32 = extract_vector_elt t34, Constant:i32<2>
 ;     t55: ch = store<(store 2 into `<4 x i16>* undef` + 4, align 1), trunc to i16> t32:1, t49, undef:i32, undef:i32
 ;       t48: i32 = extract_vector_elt t34, Constant:i32<3>
 ;     t57: ch = store<(store 2 into `<4 x i16>* undef` + 6, align 1), trunc to i16> t32:1, t48, undef:i32, undef:i32
 ;   t58: ch = TokenFactor t52, t53, t55, t57
 ; t24: ch = WebAssemblyISD::RETURN t58
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; CHECK-LABEL: foo:
 ; CHECK: i64x2.splat
 define void @foo() {
 entry:
   %a = load <2 x i16>, <2 x i16>* undef, align 1
   %b = shufflevector <2 x i16> %a, <2 x i16> undef, <8 x i32> <i32 0, i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>

llvm/test/CodeGen/WebAssembly/simd-select.ll

 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc < %s -verify-machineinstrs -mattr=+simd128 | FileCheck %s
 
 ; Test that vector selects of various varieties lower correctly.
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; ==============================================================================
 ; 16 x i8
 ; ==============================================================================
 define <16 x i8> @vselect_v16i8(<16 x i1> %c, <16 x i8> %x, <16 x i8> %y) {
 ; CHECK-LABEL: vselect_v16i8:
 ; CHECK:         .functype vselect_v16i8 (v128, v128, v128) -> (v128)

llvm/test/CodeGen/WebAssembly/simd-sext-inreg.ll

 ; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -wasm-keep-registers -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -mattr=+simd128 | FileCheck %s --check-prefixes CHECK,SIMD128
 ; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -wasm-keep-registers -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals | FileCheck %s --check-prefixes CHECK,NO-SIMD128
 
 ; Test that vector sign extensions lower to shifts
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; CHECK-LABEL: sext_v16i8:
 ; NO-SIMD128-NOT: i8x16
 ; SIMD128-NEXT: .functype sext_v16i8 (v128) -> (v128){{$}}
 ; SIMD128-NEXT: i32.const $push[[T0:[0-9]+]]=, 7{{$}}
 ; SIMD128-NEXT: i8x16.shl $push[[T1:[0-9]+]]=, $0, $pop[[T0]]{{$}}
 ; SIMD128-NEXT: i32.const $push[[T2:[0-9]+]]=, 7{{$}}

llvm/test/CodeGen/WebAssembly/simd-shift-complex-splats.ll

 ; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=+simd128 | FileCheck %s
 
 ; Test that SIMD shifts can be lowered correctly even with shift
 ; values that are more complex than plain splats.
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ;; TODO: Optimize this further by scalarizing the add
 
 ; CHECK-LABEL: shl_add:
 ; CHECK-NEXT: .functype shl_add (v128, i32, i32) -> (v128)
 ; CHECK-NEXT: i8x16.splat $push1=, $1
 ; CHECK-NEXT: i8x16.splat $push0=, $2

llvm/test/CodeGen/WebAssembly/simd-shuffle-bitcast.ll

 ; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=+simd128 | FileCheck %s
 
 ; Test that a splat shuffle of an fp-to-int bitcasted vector correctly
 ; optimizes and lowers to a single splat instruction. Without a custom
 ; DAG combine, this ends up doing both a splat and a shuffle.
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; CHECK-LABEL: f32x4_splat:
 ; CHECK-NEXT: .functype f32x4_splat (f32) -> (v128){{$}}
 ; CHECK-NEXT: f32x4.splat $push[[R:[0-9]+]]=, $0{{$}}
 ; CHECK-NEXT: return $pop[[R]]{{$}}
 define <4 x i32> @f32x4_splat(float %x) {
   %vecinit = insertelement <4 x float> undef, float %x, i32 0

llvm/test/CodeGen/WebAssembly/simd-unsupported.ll

 ; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=+simd128 | FileCheck %s
 
 ; Test that operations that are not supported by SIMD are properly
 ; unrolled.
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; ==============================================================================
 ; 16 x i8
 ; ==============================================================================
 
 ; CHECK-LABEL: ctlz_v16i8:
 ; CHECK: i32.clz

llvm/test/CodeGen/WebAssembly/simd.ll

 ; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=+simd128,+sign-ext | FileCheck %s --check-prefixes CHECK,SIMD128
 ; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers | FileCheck %s --check-prefixes CHECK,NO-SIMD128
 
 ; Test that basic SIMD128 vector manipulation operations assemble as expected.
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; ==============================================================================
 ; 16 x i8
 ; ==============================================================================
 ; CHECK-LABEL: const_v16i8:
 ; NO-SIMD128-NOT: i8x16
 ; SIMD128-NEXT: .functype const_v16i8 () -> (v128){{$}}

llvm/test/CodeGen/WebAssembly/snan_literal.ll

 ; RUN: llc < %s --filetype=obj | llvm-objdump -d - | FileCheck %s
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 define float @float_sNaN() #0 {
 entry:
 ; CHECK: 00 00 a0 7f
   ret float 0x7ff4000000000000
 }
 
; CHECK: 00 00 00 00 00 00 f4 7f
   ret double 0x7ff4000000000000
 }
 
 define double @double_qNaN() #0 {
 entry:
 ; CHECK: 00 00 00 00 00 00 fc 7f
   ret double 0x7ffc000000000000
 }
-

llvm/test/CodeGen/WebAssembly/stack-insts.ll

 ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -disable-block-placement -verify-machineinstrs | FileCheck %s
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 declare void @foo0()
 declare void @foo1()
 
 ; Tests if br_table is printed correctly with a tab.
 ; CHECK-LABEL: test0:
 ; CHECK: br_table {0, 1, 0, 1, 2}

llvm/test/CodeGen/WebAssembly/store.ll

 ; RUN: llc < %s --mtriple=wasm32-unknown-unknown -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers | FileCheck --check-prefixes CHECK,CHK32 %s
 ; RUN: llc < %s --mtriple=wasm32-unknown-unknown -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers -fast-isel -fast-isel-abort=1 | FileCheck --check-prefixes CHECK,CHK32 %s
 ; RUN: llc < %s --mtriple=wasm64-unknown-unknown -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers | FileCheck --check-prefixes CHECK,CHK64 %s
 ; RUN: llc < %s --mtriple=wasm64-unknown-unknown -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers -fast-isel -fast-isel-abort=1 | FileCheck --check-prefixes CHECK,CHK64 %s
 
 ; Test that basic stores are assembled properly.
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; CHECK-LABEL: sti32:
 ; CHK32-NEXT: .functype sti32 (i32, i32) -> (){{$}}
 ; CHK64-NEXT: .functype sti32 (i64, i32) -> (){{$}}
 ; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
 ; CHECK-NEXT: local.get $push[[L1:[0-9]+]]=, 1{{$}}
 ; CHECK-NEXT: i32.store 0($pop[[L0]]), $pop[[L1]]{{$}}

llvm/test/CodeGen/WebAssembly/swiftcc.ll

 ; RUN: llc < %s -asm-verbose=false -wasm-keep-registers | FileCheck %s --check-prefix=REG
 ; RUN: llc < %s -asm-verbose=false | FileCheck %s
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; Test direct and indirect function call between mismatched signatures
 ; CHECK-LABEL: foo:
 ; CHECK-NEXT: .functype       foo (i32, i32, i32, i32) -> ()
 define swiftcc void @foo(i32, i32) {
   ret void
 }
; CHECK: call_indirect   (i32, i32, i32, i32) -> ()
 
   %5 = bitcast i8* %1 to void (i32, i32, i32, i32**)*
 ; REG: call_indirect   $pop{{[0-9]+}}, $pop{{[0-9]+}}, $pop{{[0-9]+}}, $pop{{[0-9]+}}
 ; CHECK: call_indirect   (i32, i32, i32, i32) -> ()
   call swiftcc void %5(i32 1, i32 2, i32 swiftself 3, i32** swifterror %err)
 
   ret void
 }
-

llvm/test/CodeGen/WebAssembly/switch-in-loop.ll

 ; RUN: llc < %s -asm-verbose=false -verify-machineinstrs | FileCheck %s
 
 ;; Test that a small but nontrivial switch in a loop (like in a
 ;; bytecode interpreter) lowers reasonably without any irreducible
 ;; control flow being introduced.
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32"
 
 declare void @a(i32*)
 declare void @b(i32*)
 
 ; CHECK-LABEL: switch_in_loop:
 ; CHECK-NEXT: .functype switch_in_loop (i32, i32) -> (i32)
 ; CHECK:    global.get __stack_pointer

llvm/test/CodeGen/WebAssembly/switch-unreachable-default.ll

 ; RUN: llc < %s -asm-verbose=false -verify-machineinstrs | FileCheck %s
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; Test that switches are lowered correctly in the presence of an
 ; unreachable default branch target.
 
 ; CHECK-LABEL: foo:
 ; CHECK-NEXT:    .functype foo (i32) -> (i32)
 ; CHECK-NEXT:    block

llvm/test/CodeGen/WebAssembly/tailcall.ll

 ; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=+tail-call | FileCheck --check-prefixes=CHECK,SLOW %s
 ; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -fast-isel -mattr=+tail-call | FileCheck --check-prefixes=CHECK,FAST %s
 ; RUN: llc < %s --filetype=obj -mattr=+tail-call | obj2yaml | FileCheck --check-prefix=YAML %s
 
 ; Test that the tail calls lower correctly
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 %fn = type <{i32 (%fn, i32, i32)*}>
 declare i1 @foo(i1)
 declare i1 @bar(i1)
 
 ; CHECK-LABEL: recursive_notail_nullary:
 ; CHECK: {{^}} call recursive_notail_nullary{{$}}

llvm/test/CodeGen/WebAssembly/target-features-tls.ll

 ; RUN: llc < %s -mattr=-bulk-memory | FileCheck %s --check-prefixes NO-BULK-MEM
 ; RUN: llc < %s -mattr=+bulk-memory | FileCheck %s --check-prefixes BULK-MEM
 
 ; Test that the target features section contains -atomics or +atomics
 ; for modules that have thread local storage in their source.
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 @foo = internal thread_local global i32 0
 
 ; -bulk-memory
 ; NO-BULK-MEM-LABEL: .custom_section.target_features,"",@
 ; NO-BULK-MEM-NEXT: .int8 1
 ; NO-BULK-MEM-NEXT: .int8 45

llvm/test/CodeGen/WebAssembly/target-features.ll

 ; RUN: llc < %s | FileCheck %s --check-prefixes CHECK,ATTRS
 ; RUN: llc < %s -mattr=+simd128 | FileCheck %s --check-prefixes CHECK,SIMD128
 ; RUN: llc < %s -mcpu=bleeding-edge | FileCheck %s --check-prefixes CHECK,BLEEDING-EDGE
 
 ; Test that codegen emits target features from the command line or
 ; function attributes correctly and that features are enabled for the
 ; entire module if they are enabled for any function in the module.
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 define void @fn_atomics(i32* %p1, float %f2) #0 {
   %a = atomicrmw min i32* undef, i32 42 seq_cst
   %v = fptoui float %f2 to i32
   store i32 %v, i32* %p1
   ret void
 }

llvm/test/CodeGen/WebAssembly/tls-general-dynamic.ll

 ; RUN: not --crash llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -mattr=+bulk-memory 2>&1 | FileCheck %s --check-prefix=ERROR
 ; RUN: not --crash llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -mattr=+bulk-memory -fast-isel 2>&1 | FileCheck %s --check-prefix=ERROR
 ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -mattr=+bulk-memory --mtriple wasm32-unknown-emscripten | FileCheck %s --check-prefixes=CHECK,TLS
 ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -mattr=+bulk-memory --mtriple wasm32-unknown-emscripten -fast-isel | FileCheck %s --check-prefixes=CHECK,TLS
 ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -mattr=-bulk-memory | FileCheck %s --check-prefixes=CHECK,NO-TLS
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; ERROR: LLVM ERROR: only -ftls-model=local-exec is supported for now on non-Emscripten OSes: variable tls
 
 ; CHECK-LABEL: address_of_tls:
 ; CHECK-NEXT: .functype  address_of_tls () -> (i32)
 define i32 @address_of_tls() {
   ; TLS-DAG: global.get __tls_base

llvm/test/CodeGen/WebAssembly/tls-local-exec.ll

 ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -mattr=+bulk-memory | FileCheck %s --check-prefixes=CHECK,TLS
 ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -mattr=+bulk-memory -fast-isel | FileCheck %s --check-prefixes=CHECK,TLS
 ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -mattr=-bulk-memory | FileCheck %s --check-prefixes=CHECK,NO-TLS
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; CHECK-LABEL: address_of_tls:
 ; CHECK-NEXT: .functype  address_of_tls () -> (i32)
 define i32 @address_of_tls() {
   ; TLS-DAG: global.get __tls_base
   ; TLS-DAG: i32.const tls@TLSREL
   ; TLS-NEXT: i32.add

llvm/test/CodeGen/WebAssembly/umulo-i64.ll

 ; RUN: llc < %s -asm-verbose=false -wasm-disable-explicit-locals -wasm-keep-registers | FileCheck %s
 ; Test that UMULO works correctly on 64-bit operands.
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; CHECK-LABEL: _ZN4core3num21_$LT$impl$u20$u64$GT$15overflowing_mul17h07be88b4cbac028fE:
 ; CHECK:     __multi3
 ; Function Attrs: inlinehint
 define void @"_ZN4core3num21_$LT$impl$u20$u64$GT$15overflowing_mul17h07be88b4cbac028fE"(i64, i64) unnamed_addr #0 {
 start:
   %2 = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %0, i64 %1)

 ; CHECK: call     __multi3, $2, $0, $pop0, $1, $pop7
 ; CHECK: i64.load $0=, 8($2)
 define i1 @wut(i64, i64) {
 start:
   %2 = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %0, i64 %1)
   %3 = extractvalue { i64, i1 } %2, 1
   ret i1 %3
 }
-

llvm/test/CodeGen/WebAssembly/unreachable.ll

 ; RUN: llc < %s -asm-verbose=false -verify-machineinstrs | FileCheck %s
 ; RUN: llc < %s -asm-verbose=false -fast-isel -fast-isel-abort=1 -verify-machineinstrs | FileCheck %s
 
 ; Test that LLVM unreachable instruction and trap intrinsic are lowered to
 ; wasm unreachable
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 declare void @llvm.trap()
 declare void @llvm.debugtrap()
 declare void @abort()
 
 ; CHECK-LABEL: f1:
 ; CHECK: call abort{{$}}

llvm/test/CodeGen/WebAssembly/unsupported-function-bitcasts.ll

 ; RUN: llc < %s -asm-verbose=false -wasm-keep-registers | FileCheck %s
 
 ; Test that function pointer casts that require conversions of arguments or
 ; return types are converted to unreachable.
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 declare i32 @has_i64_arg(i64)
 declare i32 @has_ptr_arg(i8*)
 
 ; CHECK-LABEL: test_invalid_rtn:
 ; CHECK:      i32.const   $push[[L0:[0-9]+]]=, 0{{$}}
 ; CHECK-NEXT: call $push[[L1:[0-9]+]]=, .Lhas_i64_arg_bitcast_invalid.2, $pop[[L0]]{{$}}

llvm/test/CodeGen/WebAssembly/unused-argument.ll

 ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers | FileCheck %s
 
 ; Make sure that argument offsets are correct even if some arguments are unused.
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; CHECK-LABEL: unused_first:
 ; CHECK-NEXT: .functype unused_first (i32, i32) -> (i32){{$}}
 ; CHECK-NEXT: return $1{{$}}
 define i32 @unused_first(i32 %x, i32 %y) {
   ret i32 %y
 }

llvm/test/CodeGen/WebAssembly/vector-sdiv.ll

 ; RUN: llc < %s -asm-verbose=false -fast-isel=false -disable-wasm-fallthrough-return-opt | FileCheck %s
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; This should be treated as a non-splat vector of pow2 divisor, so sdivs will be
 ; transformed to shrs in DAGCombiner. There will be 4 stores and 3 shrs (For '1'
 ; entry we don't need a shr).
 
 ; CHECK-LABEL: vector_sdiv:
 ; CHECK-DAG:  i32.store

llvm/test/CodeGen/WebAssembly/vtable.ll

 ; RUN: llc < %s -asm-verbose=false -wasm-disable-explicit-locals -wasm-keep-registers | FileCheck %s --check-prefix=TYPEINFONAME
 ; RUN: llc < %s -asm-verbose=false -wasm-disable-explicit-locals -wasm-keep-registers | FileCheck %s --check-prefix=VTABLE
 ; RUN: llc < %s -asm-verbose=false -wasm-disable-explicit-locals -wasm-keep-registers | FileCheck %s --check-prefix=TYPEINFO
 
 ; Test that simple vtables assemble as expected.
 ;
 ; The class hierarchy is:
 ;   struct A;
 ;   struct B : public A;
 ;   struct C : public A;
 ;   struct D : public B;
 ; Each with a virtual dtor and method foo.
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 %struct.A = type { i32 (...)** }
 %struct.B = type { %struct.A }
 %struct.C = type { %struct.A }
 %struct.D = type { %struct.B }
 
 @_ZTVN10__cxxabiv117__class_type_infoE = external global i8*

llvm/test/CodeGen/WebAssembly/wasmehprepare.ll

 ; RUN: opt < %s -winehprepare -demote-catchswitch-only -wasmehprepare -S | FileCheck %s
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; CHECK: @__wasm_lpad_context = external global { i32, i8*, i32 }
 
 @_ZTIi = external constant i8*
 %struct.Temp = type { i8 }
 
 ; A single 'catch (int)' clause.

llvm/test/CodeGen/WebAssembly/weak.ll

 ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers | FileCheck %s
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; CHECK: .weak f
 define weak i32 @f() {
   unreachable
 }
 
 ; CHECK: g:

llvm/test/MC/WebAssembly/array-fill.ll

 ; RUN: llc -filetype=obj %s -o - | obj2yaml | FileCheck %s
 ; PR33624
 
 source_filename = "ws.c"
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 %struct.bd = type { i8 }
 
 @gBd = hidden global [2 x %struct.bd] [%struct.bd { i8 1 }, %struct.bd { i8 2 }], align 1
 
 ; CHECK:        - Type:            DATA
 ; CHECK:              Content:         '0102'

llvm/test/MC/WebAssembly/assembler-binary.ll

 ; RUN: llc -filetype=asm -asm-verbose=false %s -o %t.s
 ; RUN: FileCheck -check-prefix=ASM -input-file %t.s %s
 ; RUN: llvm-mc -triple=wasm32-unknown-unknown -filetype=asm %t.s -o - | FileCheck -check-prefix=ASM %s
 ; RUN: llc -filetype=obj %s -o - | obj2yaml | FileCheck %s
 ; RUN: llvm-mc -triple=wasm32-unknown-unknown -filetype=obj %t.s -o - | obj2yaml | FileCheck %s
 
 ; This specifically tests that we can generate a binary from the assembler
 ; that produces the same binary as the backend would.
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 declare void @bar()
 
 define void @foo(i32 %n) {
 entry:
   call void @bar()
   ret void

llvm/test/MC/WebAssembly/comdat-sections.ll

 ; ASM-NEXT: .Ldebug_info_start0:
 ; ASM-NEXT: .int16  4                               # DWARF version number
 ; ASM-NEXT: .int32  .debug_abbrev0                  # Offset Into Abbrev. Section
 ; ASM-NEXT: .int8 4                               # Address Size (in bytes)
 ; ASM-NEXT: .int64  4721183873463917179             # Type Signature
 
 ; ModuleID = 't.cpp'
 source_filename = "t.cpp"
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown-wasm"
 
 %struct.S = type { i32 }
 
 @s = global %struct.S zeroinitializer, align 4, !dbg !0
 
 !llvm.dbg.cu = !{!2}
 !llvm.module.flags = !{!10, !11}

llvm/test/MC/WebAssembly/data-symbol-in-text-section.ll

 ; RUN: not --crash llc -filetype=obj %s -o /dev/null 2>&1 | FileCheck %s
 ; CHECK: data symbols must live in a data section: data_symbol
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 @data_symbol = constant [1024 x i32] zeroinitializer, section ".text", align 16
 
 define hidden i32 @main() local_unnamed_addr #0 {
 entry:
   %0 = load i32, i32* getelementptr inbounds ([1024 x i32], [1024 x i32]* @data_symbol, i32 0, i32 10)
   ret i32 %0
 }

llvm/test/MC/WebAssembly/debug-byval-struct.ll

 ; RUN: llc -filetype=obj %s -o - | llvm-dwarfdump -  | FileCheck %s
 
 ; Test that byval args get correct DWARF debug locations.
 ; These end up in the callee as Wasm locals, which is atypical.
 
 ; From C code:
 
 ; typedef union { int x; float y; } u;
 ; typedef struct { int x; float y; } s;
 ; int some_func(int x, u some_union, s some_struct, int a[3]) {
 ;     return x + some_union.x + some_struct.x + a[0];
 ; }
 
 
 ; ModuleID = 't.c'
 source_filename = "t.c"
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 %union.u = type { i32 }
 %struct.s = type { i32, float }
 
 ; Function Attrs: noinline nounwind optnone
 define hidden i32 @some_func(i32 %x, %union.u* byval(%union.u) align 4 %some_union, %struct.s* byval(%struct.s) align 4 %some_struct, i32* %a) #0 !dbg !7 {
 entry:

 
 ; CHECK-LABEL:  DW_TAG_formal_parameter
 ; CHECK-NEXT:     DW_AT_location        (DW_OP_WASM_location 0x0 0x2)
 ; CHECK-NEXT:     DW_AT_name    ("some_struct")
 
 ; CHECK-LABEL:  DW_TAG_formal_parameter
 ; CHECK-NEXT:     DW_AT_location        (DW_OP_fbreg +8)
 ; CHECK-NEXT:     DW_AT_name    ("a")
-

llvm/test/MC/WebAssembly/debug-localvar.ll

 ; RUN: llc -filetype=obj %s -o - | llvm-dwarfdump -  | FileCheck %s
 
 ; ModuleID = 'debugtest.c'
 source_filename = "debugtest.c"
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32"
 ; Function Attrs: noinline nounwind optnone
 define hidden i32 @foo(i32 %arg) #0 !dbg !7 {
 entry:
   %arg.addr = alloca i32, align 4
   %a = alloca i32, align 4
   %b = alloca i32, align 4
   store i32 %arg, i32* %arg.addr, align 4

llvm/test/MC/WebAssembly/file-headers.ll

 ; RUN: llc -filetype=obj %s -o - | llvm-readobj --file-headers - | FileCheck %s
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; CHECK: Format: WASM{{$}}
 ; CHECK: Arch: wasm32{{$}}
 ; CHECK: AddressSize: 32bit{{$}}
 ; CHECK: Version: 0x1{{$}}

llvm/test/MC/WebAssembly/function-alias.ll

 ; RUN: llc -filetype=obj %s -o - | llvm-readobj --symbols - | FileCheck %s
 ; RUN: llc -filetype=obj %s -mattr=+reference-types -o - | llvm-readobj --symbols - | FileCheck --check-prefix=REF %s
 
-target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown-wasm"
 
 @foo = alias i8, bitcast (i8* ()* @func to i8*)
 @bar = alias i8* (), i8* ()* @func
 @bar2 = alias i8* (), i8* ()* @bar
 
 define i8* @func() {
   call i8* @bar2();