[AMDGPU] Do not run IR optimizations at -O0

llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp

if (TM.getOptLevel() > CodeGenOpt::None) {
     if (EnableAMDGPUAliasAnalysis) {
       addPass(createAMDGPUAAWrapperPass());
       addPass(createExternalAAWrapperPass([](Pass &P, Function &,
                                              AAResults &AAR) {
         if (auto *WrapperPass = P.getAnalysisIfAvailable<AMDGPUAAWrapperPass>())
           AAR.addAAResult(WrapperPass->getResult());
         }));
     }
-  }
 
     if (TM.getTargetTriple().getArch() == Triple::amdgcn) {
       // TODO: May want to move later or split into an early and late one.
       addPass(createAMDGPUCodeGenPreparePass());
     }
+  }
 
   TargetPassConfig::addIRPasses();
 
   // EarlyCSE is not always strong enough to clean up what LSR produces. For
   // example, GVN can combine
   //
   //   %0 = add %a, %b
   //   %1 = add %b, %a
ScheduleDAGInstrs *GCNPassConfig::createMachineScheduler(
   if (ST.enableSIScheduler())
     return createSIMachineScheduler(C);
   return createGCNMaxOccupancyMachineScheduler(C);
 }
 
 bool GCNPassConfig::addPreISel() {
   AMDGPUPassConfig::addPreISel();
 
+  if (TM->getOptLevel() > CodeGenOpt::None)
     addPass(createAMDGPULateCodeGenPreparePass());
+
   if (EnableAtomicOptimizations) {
     addPass(createAMDGPUAtomicOptimizerPass());
   }
 
   // FIXME: We need to run a pass to propagate the attributes when calls are
   // supported.
 
   addPass(createSinkingPass());

llvm/test/CodeGen/AMDGPU/llc-pipeline.ll

 ; GCN-O0-NEXT:     AMDGPU Inline All Functions
 ; GCN-O0-NEXT:     CallGraph Construction
 ; GCN-O0-NEXT:     Call Graph SCC Pass Manager
 ; GCN-O0-NEXT:       Inliner for always_inline functions
 ; GCN-O0-NEXT:     A No-Op Barrier Pass
 ; GCN-O0-NEXT:     Lower OpenCL enqueued blocks
 ; GCN-O0-NEXT:     Lower uses of LDS variables from non-kernel functions
 ; GCN-O0-NEXT:     FunctionPass Manager
-; GCN-O0-NEXT:       Dominator Tree Construction
-; GCN-O0-NEXT:       Post-Dominator Tree Construction
-; GCN-O0-NEXT:       Natural Loop Information
-; GCN-O0-NEXT:       Legacy Divergence Analysis
-; GCN-O0-NEXT:       AMDGPU IR optimizations
 ; GCN-O0-NEXT:       Lower Garbage Collection Instructions
 ; GCN-O0-NEXT:       Shadow Stack GC Lowering
 ; GCN-O0-NEXT:       Lower constant intrinsics
 ; GCN-O0-NEXT:       Remove unreachable blocks from the CFG
 ; GCN-O0-NEXT:       Expand vector predication intrinsics
 ; GCN-O0-NEXT:       Scalarize Masked Memory Intrinsics
 ; GCN-O0-NEXT:       Expand reduction intrinsics
 ; GCN-O0-NEXT:     CallGraph Construction
 ; GCN-O0-NEXT:     Call Graph SCC Pass Manager
 ; GCN-O0-NEXT:       AMDGPU Annotate Kernel Features
 ; GCN-O0-NEXT:       FunctionPass Manager
 ; GCN-O0-NEXT:         AMDGPU Lower Kernel Arguments
 ; GCN-O0-NEXT:       Analysis if a function is memory bound
 ; GCN-O0-NEXT:       FunctionPass Manager
 ; GCN-O0-NEXT:       Lazy Value Information Analysis
 ; GCN-O0-NEXT:       Lower SwitchInst's to branches
 ; GCN-O0-NEXT:       Lower invoke and unwind, for unwindless code generators
 ; GCN-O0-NEXT:       Remove unreachable blocks from the CFG
 ; GCN-O0-NEXT:       Dominator Tree Construction
 ; GCN-O0-NEXT:       Basic Alias Analysis (stateless AA impl)
 ; GCN-O0-NEXT:       Function Alias Analysis Results
 ; GCN-O0-NEXT:       Flatten the CFG
 ; GCN-O0-NEXT:       Dominator Tree Construction
-; GCN-O0-NEXT:       Post-Dominator Tree Construction
-; GCN-O0-NEXT:       Natural Loop Information
-; GCN-O0-NEXT:       Legacy Divergence Analysis
-; GCN-O0-NEXT:       AMDGPU IR late optimizations
 ; GCN-O0-NEXT:       Basic Alias Analysis (stateless AA impl)
 ; GCN-O0-NEXT:       Function Alias Analysis Results
+; GCN-O0-NEXT:       Natural Loop Information
 ; GCN-O0-NEXT:       Code sinking
+; GCN-O0-NEXT:       Post-Dominator Tree Construction
 ; GCN-O0-NEXT:       Legacy Divergence Analysis
 ; GCN-O0-NEXT:       Unify divergent function exit nodes
 ; GCN-O0-NEXT:       Lazy Value Information Analysis
 ; GCN-O0-NEXT:       Lower SwitchInst's to branches
 ; GCN-O0-NEXT:       Dominator Tree Construction
 ; GCN-O0-NEXT:       Natural Loop Information
 ; GCN-O0-NEXT:       Convert irreducible control-flow into natural loops
 ; GCN-O0-NEXT:       Fixup each natural loop to have a single exit block