[PowerPC] Move PPCBranchSelector as close to asm printer as possible

[lkail]

Summary

Currently, PPCBranchSelector is not immediately preceding asm printer pass. -debug-pass=Structure gives

PowerPC Branch Selector
Contiguously Lay Out Funclets
StackMap Liveness Analysis
Live DEBUG_VALUE analysis
Lazy Machine Block Frequency Analysis
Machine Optimization Remark Emitter
Linux PPC Assembly Printer

After the patch

Contiguously Lay Out Funclets
StackMap Liveness Analysis
Live DEBUG_VALUE analysis
PowerPC Branch Selector
Lazy Machine Block Frequency Analysis
Machine Optimization Remark Emitter
Linux PPC Assembly Printer

[shchenz]

Make sense to me. We should run this pass just before the assembly printer pass like the pass description says at the beginning of this file.

Otherwise, any (new added) transformation passes after this pass changing the instruction size would be at the risk of introducing performance or functionality issues.

[nemanjai]

This is presumably something that diverged from the original position for this pass. Please add a LIT test that will check the result of -debug-pass so we ensure that if anything gets added between the branch selector and the asm printer, it will cause a failure. Then we can evaluate on a case-by-case basis whether the pass may change the size/order of instructions/blocks and thereby whether it needs to be inserted elsewhere in the pipeline.

[lkail]

Show pipeline change.

[nemanjai]

LGTM. Thank you.

llvm/lib/Target/PowerPC/PPCTargetMachine.cpp

public:
   void addIRPasses() override;
   bool addPreISel() override;
   bool addILPOpts() override;
   bool addInstSelector() override;
   void addMachineSSAOptimization() override;
   void addPreRegAlloc() override;
   void addPreSched2() override;
   void addPreEmitPass() override;
+  void addPreEmitPass2() override;
   // GlobalISEL
   bool addIRTranslator() override;
   bool addLegalizeMachineIR() override;
   bool addRegBankSelect() override;
   bool addGlobalInstructionSelect() override;
 
   ScheduleDAGInstrs *
   createMachineScheduler(MachineSchedContext *C) const override {

 }
 
 void PPCPassConfig::addPreEmitPass() {
   addPass(createPPCPreEmitPeepholePass());
   addPass(createPPCExpandISELPass());
 
   if (getOptLevel() != CodeGenOpt::None)
     addPass(createPPCEarlyReturnPass());
+}
+
+void PPCPassConfig::addPreEmitPass2() {
   // Must run branch selection immediately preceding the asm printer.
   addPass(createPPCBranchSelectionPass());
 }
 
 TargetTransformInfo
 PPCTargetMachine::getTargetTransformInfo(const Function &F) {
   return TargetTransformInfo(PPCTTIImpl(this, F));
 }

llvm/test/CodeGen/PowerPC/O3-pipeline.ll

 ; CHECK-NEXT:       MachinePostDominator Tree Construction
 ; CHECK-NEXT:       Branch Probability Basic Block Placement
 ; CHECK-NEXT:       Insert fentry calls
 ; CHECK-NEXT:       Insert XRay ops
 ; CHECK-NEXT:       Implement the 'patchable-function' attribute
 ; CHECK-NEXT:       PowerPC Pre-Emit Peephole
 ; CHECK-NEXT:       PowerPC Expand ISEL Generation
 ; CHECK-NEXT:       PowerPC Early-Return Creation
-; CHECK-NEXT:       PowerPC Branch Selector
 ; CHECK-NEXT:       Contiguously Lay Out Funclets
 ; CHECK-NEXT:       StackMap Liveness Analysis
 ; CHECK-NEXT:       Live DEBUG_VALUE analysis
+; CHECK-NEXT:       PowerPC Branch Selector
 ; CHECK-NEXT:       Lazy Machine Block Frequency Analysis
 ; CHECK-NEXT:       Machine Optimization Remark Emitter
 ; CHECK-NEXT:       Linux PPC Assembly Printer
 ; CHECK-NEXT:       Free MachineFunction
 
 define void @f() {
   ret void
 }
 No newline at end of file