[X86] Update MachineLoopInfo in CMOV conversion.

[tianqing]

Summary

If a CMOV is in a loop and is converted to branches, CMOV conversion wouldn't
add newly created basic blocks to loop info. Since the candidates is collected
based on loops, instructions in these basic blocks will be ignored.

[xbolva00]

llvm/test/CodeGen/X86/x86-cmov-converter.ll

494

Full checks? Use script to generate checks

[pengfei]

llvm/lib/Target/X86/X86CmovConversion.cpp

854

Is it possible the MBB is in more than one loop, e.g. nested?

llvm/test/CodeGen/X86/x86-cmov-converter.ll

494

Maybe you can commit the test first, then show the diff in this patch.

[tianqing]

llvm/lib/Target/X86/X86CmovConversion.cpp

854

addBasicBlockToLoop() already handles nested loop.

llvm/test/CodeGen/X86/x86-cmov-converter.ll

494

See D104692.

[pengfei]

LGTM.

[tianqing]

Update test.

llvm/lib/Target/X86/X86CmovConversion.cpp

public:
 
   /// Pass identification, replacement for typeid.
   static char ID;
 
 private:
   MachineRegisterInfo *MRI = nullptr;
   const TargetInstrInfo *TII = nullptr;
   const TargetRegisterInfo *TRI = nullptr;
+  MachineLoopInfo *MLI = nullptr;
   TargetSchedModel TSchedModel;
 
   /// List of consecutive CMOV instructions.
   using CmovGroup = SmallVector<MachineInstr *, 2>;
   using CmovGroups = SmallVector<CmovGroup, 2>;
 
   /// Collect all CMOV-group-candidates in \p CurrLoop and update \p
   /// CmovInstGroups accordingly.
if (skipFunction(MF.getFunction()))
     return false;
   if (!EnableCmovConverter)
     return false;
 
   LLVM_DEBUG(dbgs() << "********** " << getPassName() << " : " << MF.getName()
                     << "**********\n");
 
   bool Changed = false;
-  MachineLoopInfo &MLI = getAnalysis<MachineLoopInfo>();
+  MLI = &getAnalysis<MachineLoopInfo>();
   const TargetSubtargetInfo &STI = MF.getSubtarget();
   MRI = &MF.getRegInfo();
   TII = STI.getInstrInfo();
   TRI = STI.getRegisterInfo();
   TSchedModel.init(&STI);
 
   // Before we handle the more subtle cases of register-register CMOVs inside
   // of potentially hot loops, we want to quickly remove all CMOVs with
bool X86CmovConverterPass::runOnMachineFunction(MachineFunction &MF) {
   //           * Create FalseBB, SinkBB, Conditional branch to SinkBB.
   //           * Replace each CMOV instruction with a PHI instruction in SinkBB.
   //       }
   //
   // Note: For more details, see each function description.
   //===--------------------------------------------------------------------===//
 
   // Build up the loops in pre-order.
-  SmallVector<MachineLoop *, 4> Loops(MLI.begin(), MLI.end());
+  SmallVector<MachineLoop *, 4> Loops(MLI->begin(), MLI->end());
   // Note that we need to check size on each iteration as we accumulate child
   // loops.
   for (int i = 0; i < (int)Loops.size(); ++i)
     for (MachineLoop *Child : Loops[i]->getSubLoops())
       Loops.push_back(Child);
 
   for (MachineLoop *CurrLoop : Loops) {
     // Optimize only inner most loops.
for (MachineBasicBlock::iterator MIIt = MIItBegin; MIIt != MIItEnd; ++MIIt) {
     LLVM_DEBUG(dbgs() << "\tTo: "; MIB->dump());
 
     // Add this PHI to the rewrite table.
     RegRewriteTable[DestReg] = std::make_pair(Op1Reg, Op2Reg);
   }
 
   // Now remove the CMOV(s).
   MBB->erase(MIItBegin, MIItEnd);
+
+  // Add new basic blocks to MachineLoopInfo.
+  if (MachineLoop *L = MLI->getLoopFor(MBB)) {
+    L->addBasicBlockToLoop(FalseMBB, MLI->getBase());
+    L->addBasicBlockToLoop(SinkMBB, MLI->getBase());
+  }
 }
 
 INITIALIZE_PASS_BEGIN(X86CmovConverterPass, DEBUG_TYPE, "X86 cmov Conversion",
                       false, false)
 INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo)
 INITIALIZE_PASS_END(X86CmovConverterPass, DEBUG_TYPE, "X86 cmov Conversion",
                     false, false)
 
 FunctionPass *llvm::createX86CmovConverterPass() {
   return new X86CmovConverterPass();
 }

llvm/test/CodeGen/X86/x86-cmov-converter.ll

 @begin = external global i32*
 @end = external global i32*
 
 define void @test_memoperand_loop(i32 %data) #0 {
 ; CHECK-LABEL: test_memoperand_loop:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    movq begin@GOTPCREL(%rip), %r8
 ; CHECK-NEXT:    movq (%r8), %rax
 ; CHECK-NEXT:    movq end@GOTPCREL(%rip), %rcx
 ; CHECK-NEXT:    movq (%rcx), %rdx
 ; CHECK-NEXT:    xorl %esi, %esi
 ; CHECK-NEXT:    movq %rax, %rcx
 entry:
   %begin = load i32*, i32** @begin, align 8
   %end = load i32*, i32** @end, align 8
   br label %loop.body
 
 ; CHECK-NEXT:  .LBB13_1: # %loop.body
 ; CHECK-NEXT:    # =>This Inner Loop Header: Depth=1
 ; CHECK-NEXT:    addq $8, %rcx
 ; CHECK-NEXT:    cmpq %rdx, %rcx
 ; CHECK-NEXT:    ja .LBB13_3
 ; CHECK-NEXT:  # %bb.2: # %loop.body
 ; CHECK-NEXT:    # in Loop: Header=BB13_1 Depth=1
 ; CHECK-NEXT:    movq (%r8), %rcx
 ; CHECK-NEXT:  .LBB13_3: # %loop.body
 ; CHECK-NEXT:    # in Loop: Header=BB13_1 Depth=1
 ; CHECK-NEXT:    movl %edi, (%rcx)
 ; CHECK-NEXT:    addq $8, %rcx
 ; CHECK-NEXT:    cmpq %rdx, %rcx
-; CHECK-NEXT:    cmovbeq %rax, %rcx
+; CHECK-NEXT:    ja .LBB13_5
+; CHECK-NEXT:  # %bb.4: # %loop.body
+; CHECK-NEXT:    # in Loop: Header=BB13_1 Depth=1
+; CHECK-NEXT:    movq %rax, %rcx
+; CHECK-NEXT:  .LBB13_5: # %loop.body
+; CHECK-NEXT:    # in Loop: Header=BB13_1 Depth=1
 ; CHECK-NEXT:    movl %edi, (%rcx)
 ; CHECK-NEXT:    addl $1, %esi
 ; CHECK-NEXT:    cmpl $1024, %esi # imm = 0x400
 ; CHECK-NEXT:    jl .LBB13_1
 loop.body:
   %phi.iv = phi i32 [ 0, %entry ], [ %iv.next, %loop.body ]
   %phi.ptr = phi i32* [ %begin, %entry ], [ %dst2, %loop.body ]
   %gep1 = getelementptr inbounds i32, i32 *%phi.ptr, i64 2
   %cmp1 = icmp ugt i32* %gep1, %end
   %begin_dup = load i32*, i32** @begin, align 8
   %dst1 = select i1 %cmp1, i32* %gep1, i32* %begin_dup
   store i32 %data, i32 *%dst1, align 4
   %gep2 = getelementptr inbounds i32, i32 *%dst1, i64 2
   %cmp2 = icmp ugt i32* %gep2, %end
   %dst2 = select i1 %cmp2, i32* %gep2, i32* %begin
   store i32 %data, i32 *%dst2, align 4
   %iv.next = add i32 %phi.iv, 1
   %cond = icmp slt i32 %iv.next, 1024
   br i1 %cond, label %loop.body, label %exit
 
-; CHECK-NEXT:  # %bb.4: # %exit
+; CHECK-NEXT:  # %bb.6: # %exit
 ; CHECK-NEXT:    retq
 exit:
   ret void
 }
 
 attributes #0 = {"target-cpu"="x86-64"}