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[PowerPC][Dwarf] Assign MMA register's dwarf register number to negative value

Authored by lkail on Jun 6 2021, 12:15 AM.



According to ELF V2 ABI, 0 should be the dwarf number of r0. Currently MMA's register also uses 0 as its dwarf number, this confuses RegisterInfoEmitter and generates wrong dwarf -> llvm mapping.

extern const MCRegisterInfo::DwarfLLVMRegPair PPCDwarfFlavour1Dwarf2L[] = {
  { 0U, PPC::VSRp31 },

This leads to wrong cfi output in

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