[AMDGPU] Stop using LegacyLegalizerInfo. NFCI.

[dsanders]

LGTM, Thanks!

llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp

505

I'm not 100% sure off-hand if this one had any implicit clampScalar-like rules in the legacy info. I can believe that G_BRCOND only ever forms with s1/s32 though.

[foad]

llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp

505

I admit that I don't know anything about implicit clamping in the legacy legalizer. But at least this patch passed all our tests.

llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp

AMDGPULegalizerInfo::AMDGPULegalizerInfo(const GCNSubtarget &ST_,
   };
 
   const std::initializer_list<LLT> FPTypesPK16 = {
     S32, S64, S16, V2S16
   };
 
   const LLT MinScalarFPTy = ST.has16BitInsts() ? S16 : S32;
 
-  auto &LegacyInfo = getLegacyLegalizerInfo();
-  LegacyInfo.setAction({G_BRCOND, S1},
-                       LegacyLegalizeActions::Legal); // VCC branches
-  LegacyInfo.setAction({G_BRCOND, S32},
-                       LegacyLegalizeActions::Legal); // SCC branches
+  // s1 for VCC branches, s32 for SCC branches.
+  getActionDefinitionsBuilder(G_BRCOND).legalFor({S1, S32});
 
   // TODO: All multiples of 32, vectors of pointers, all v2s16 pairs, more
   // elements for v3s16
   getActionDefinitionsBuilder(G_PHI)
     .legalFor({S32, S64, V2S16, S16, V4S16, S1, S128, S256})
     .legalFor(AllS32Vectors)
     .legalFor(AllS64Vectors)
     .legalFor(AddrSpaces64)
getActionDefinitionsBuilder({G_IMPLICIT_DEF, G_FREEZE})
       // s1 and s16 are special cases because they have legal operations on
       // them, but don't really occupy registers in the normal way.
       .legalFor({S1, S16})
       .moreElementsIf(isSmallOddVector(0), oneMoreElement(0))
       .clampScalarOrElt(0, S32, MaxScalar)
       .widenScalarToNextPow2(0, 32)
       .clampMaxNumElements(0, S32, 16);
 
-  LegacyInfo.setAction({G_FRAME_INDEX, PrivatePtr},
-                       LegacyLegalizeActions::Legal);
+  getActionDefinitionsBuilder(G_FRAME_INDEX).legalFor({PrivatePtr});
 
   // If the amount is divergent, we have to do a wave reduction to get the
   // maximum value, so this is expanded during RegBankSelect.
   getActionDefinitionsBuilder(G_DYN_STACKALLOC)
     .legalFor({{PrivatePtr, S32}});
 
   getActionDefinitionsBuilder(G_GLOBAL_VALUE)
     .customIf(typeIsNot(0, PrivatePtr));
 
-  LegacyInfo.setAction({G_BLOCK_ADDR, CodePtr}, LegacyLegalizeActions::Legal);
+  getActionDefinitionsBuilder(G_BLOCK_ADDR).legalFor({CodePtr});
 
   auto &FPOpActions = getActionDefinitionsBuilder(
     { G_FADD, G_FMUL, G_FMA, G_FCANONICALIZE})
     .legalFor({S32, S64});
   auto &TrigActions = getActionDefinitionsBuilder({G_FSIN, G_FCOS})
     .customFor({S32, S64});
   auto &FDIVActions = getActionDefinitionsBuilder(G_FDIV)
     .customFor({S32, S64});